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Repository: BestRyze/Hexapod
Branch: master
Commit: baa9508b7455
Files: 1094
Total size: 24.7 MB
Directory structure:
gitextract__f2548al/
├── .gitignore
├── SourceCode/
│ ├── .mxproject
│ ├── Core/
│ │ ├── Inc/
│ │ │ ├── FreeRTOSConfig.h
│ │ │ ├── dma.h
│ │ │ ├── gpio.h
│ │ │ ├── i2c.h
│ │ │ ├── main.h
│ │ │ ├── stm32h7xx_hal_conf.h
│ │ │ ├── stm32h7xx_it.h
│ │ │ └── usart.h
│ │ └── Src/
│ │ ├── dma.c
│ │ ├── freertos.c
│ │ ├── gpio.c
│ │ ├── i2c.c
│ │ ├── main.c
│ │ ├── stm32h7xx_hal_msp.c
│ │ ├── stm32h7xx_hal_timebase_tim.c
│ │ ├── stm32h7xx_it.c
│ │ ├── system_stm32h7xx.c
│ │ └── usart.c
│ ├── Drivers/
│ │ ├── CMSIS/
│ │ │ ├── Core/
│ │ │ │ ├── Include/
│ │ │ │ │ ├── cmsis_armcc.h
│ │ │ │ │ ├── cmsis_armclang.h
│ │ │ │ │ ├── cmsis_armclang_ltm.h
│ │ │ │ │ ├── cmsis_compiler.h
│ │ │ │ │ ├── cmsis_gcc.h
│ │ │ │ │ ├── cmsis_iccarm.h
│ │ │ │ │ ├── cmsis_version.h
│ │ │ │ │ ├── core_armv81mml.h
│ │ │ │ │ ├── core_armv8mbl.h
│ │ │ │ │ ├── core_armv8mml.h
│ │ │ │ │ ├── core_cm0.h
│ │ │ │ │ ├── core_cm0plus.h
│ │ │ │ │ ├── core_cm1.h
│ │ │ │ │ ├── core_cm23.h
│ │ │ │ │ ├── core_cm3.h
│ │ │ │ │ ├── core_cm33.h
│ │ │ │ │ ├── core_cm35p.h
│ │ │ │ │ ├── core_cm4.h
│ │ │ │ │ ├── core_cm7.h
│ │ │ │ │ ├── core_sc000.h
│ │ │ │ │ ├── core_sc300.h
│ │ │ │ │ ├── mpu_armv7.h
│ │ │ │ │ ├── mpu_armv8.h
│ │ │ │ │ └── tz_context.h
│ │ │ │ └── Template/
│ │ │ │ └── ARMv8-M/
│ │ │ │ ├── main_s.c
│ │ │ │ └── tz_context.c
│ │ │ ├── Core_A/
│ │ │ │ ├── Include/
│ │ │ │ │ ├── cmsis_armcc.h
│ │ │ │ │ ├── cmsis_armclang.h
│ │ │ │ │ ├── cmsis_compiler.h
│ │ │ │ │ ├── cmsis_cp15.h
│ │ │ │ │ ├── cmsis_gcc.h
│ │ │ │ │ ├── cmsis_iccarm.h
│ │ │ │ │ ├── core_ca.h
│ │ │ │ │ └── irq_ctrl.h
│ │ │ │ └── Source/
│ │ │ │ └── irq_ctrl_gic.c
│ │ │ ├── DSP/
│ │ │ │ ├── DSP_Lib_TestSuite/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── Common/
│ │ │ │ │ │ ├── JTest/
│ │ │ │ │ │ │ ├── inc/
│ │ │ │ │ │ │ │ ├── arr_desc/
│ │ │ │ │ │ │ │ │ └── arr_desc.h
│ │ │ │ │ │ │ │ ├── jtest.h
│ │ │ │ │ │ │ │ ├── jtest_cycle.h
│ │ │ │ │ │ │ │ ├── jtest_define.h
│ │ │ │ │ │ │ │ ├── jtest_fw.h
│ │ │ │ │ │ │ │ ├── jtest_group.h
│ │ │ │ │ │ │ │ ├── jtest_group_call.h
│ │ │ │ │ │ │ │ ├── jtest_group_define.h
│ │ │ │ │ │ │ │ ├── jtest_pf.h
│ │ │ │ │ │ │ │ ├── jtest_systick.h
│ │ │ │ │ │ │ │ ├── jtest_test.h
│ │ │ │ │ │ │ │ ├── jtest_test_call.h
│ │ │ │ │ │ │ │ ├── jtest_test_define.h
│ │ │ │ │ │ │ │ ├── jtest_test_ret.h
│ │ │ │ │ │ │ │ ├── jtest_util.h
│ │ │ │ │ │ │ │ ├── opt_arg/
│ │ │ │ │ │ │ │ │ ├── opt_arg.h
│ │ │ │ │ │ │ │ │ ├── pp_narg.h
│ │ │ │ │ │ │ │ │ └── splice.h
│ │ │ │ │ │ │ │ └── util/
│ │ │ │ │ │ │ │ └── util.h
│ │ │ │ │ │ │ └── src/
│ │ │ │ │ │ │ ├── jtest_cycle.c
│ │ │ │ │ │ │ ├── jtest_dump_str_segments.c
│ │ │ │ │ │ │ ├── jtest_fw.c
│ │ │ │ │ │ │ └── jtest_trigger_action.c
│ │ │ │ │ │ ├── inc/
│ │ │ │ │ │ │ ├── all_tests.h
│ │ │ │ │ │ │ ├── basic_math_tests/
│ │ │ │ │ │ │ │ ├── basic_math_templates.h
│ │ │ │ │ │ │ │ ├── basic_math_test_data.h
│ │ │ │ │ │ │ │ ├── basic_math_test_group.h
│ │ │ │ │ │ │ │ └── basic_math_tests.h
│ │ │ │ │ │ │ ├── complex_math_tests/
│ │ │ │ │ │ │ │ ├── complex_math_templates.h
│ │ │ │ │ │ │ │ ├── complex_math_test_data.h
│ │ │ │ │ │ │ │ ├── complex_math_test_group.h
│ │ │ │ │ │ │ │ └── complex_math_tests.h
│ │ │ │ │ │ │ ├── controller_tests/
│ │ │ │ │ │ │ │ ├── controller_templates.h
│ │ │ │ │ │ │ │ ├── controller_test_data.h
│ │ │ │ │ │ │ │ ├── controller_test_group.h
│ │ │ │ │ │ │ │ └── controller_tests.h
│ │ │ │ │ │ │ ├── fast_math_tests/
│ │ │ │ │ │ │ │ ├── fast_math_templates.h
│ │ │ │ │ │ │ │ ├── fast_math_test_data.h
│ │ │ │ │ │ │ │ └── fast_math_test_group.h
│ │ │ │ │ │ │ ├── filtering_tests/
│ │ │ │ │ │ │ │ ├── filtering_templates.h
│ │ │ │ │ │ │ │ ├── filtering_test_data.h
│ │ │ │ │ │ │ │ ├── filtering_test_group.h
│ │ │ │ │ │ │ │ └── filtering_tests.h
│ │ │ │ │ │ │ ├── intrinsics_tests/
│ │ │ │ │ │ │ │ ├── intrinsics_templates.h
│ │ │ │ │ │ │ │ ├── intrinsics_test_data.h
│ │ │ │ │ │ │ │ └── intrinsics_test_group.h
│ │ │ │ │ │ │ ├── math_helper.h
│ │ │ │ │ │ │ ├── matrix_tests/
│ │ │ │ │ │ │ │ ├── matrix_templates.h
│ │ │ │ │ │ │ │ ├── matrix_test_data.h
│ │ │ │ │ │ │ │ ├── matrix_test_group.h
│ │ │ │ │ │ │ │ └── matrix_tests.h
│ │ │ │ │ │ │ ├── statistics_tests/
│ │ │ │ │ │ │ │ ├── statistics_templates.h
│ │ │ │ │ │ │ │ ├── statistics_test_data.h
│ │ │ │ │ │ │ │ ├── statistics_test_group.h
│ │ │ │ │ │ │ │ └── statistics_tests.h
│ │ │ │ │ │ │ ├── support_tests/
│ │ │ │ │ │ │ │ ├── support_templates.h
│ │ │ │ │ │ │ │ ├── support_test_data.h
│ │ │ │ │ │ │ │ ├── support_test_group.h
│ │ │ │ │ │ │ │ └── support_tests.h
│ │ │ │ │ │ │ ├── templates/
│ │ │ │ │ │ │ │ ├── template.h
│ │ │ │ │ │ │ │ └── test_templates.h
│ │ │ │ │ │ │ ├── transform_tests/
│ │ │ │ │ │ │ │ ├── transform_templates.h
│ │ │ │ │ │ │ │ ├── transform_test_data.h
│ │ │ │ │ │ │ │ ├── transform_test_group.h
│ │ │ │ │ │ │ │ └── transform_tests.h
│ │ │ │ │ │ │ └── type_abbrev.h
│ │ │ │ │ │ ├── platform/
│ │ │ │ │ │ │ ├── ARMCC/
│ │ │ │ │ │ │ │ ├── Retarget.c
│ │ │ │ │ │ │ │ ├── startup_armv6-m.s
│ │ │ │ │ │ │ │ └── startup_armv7-m.s
│ │ │ │ │ │ │ ├── ARMCLANG/
│ │ │ │ │ │ │ │ ├── startup_armv6-m.S
│ │ │ │ │ │ │ │ └── startup_armv7-m.S
│ │ │ │ │ │ │ ├── GCC/
│ │ │ │ │ │ │ │ ├── Retarget.c
│ │ │ │ │ │ │ │ ├── startup_armv6-m.S
│ │ │ │ │ │ │ │ └── startup_armv7-m.S
│ │ │ │ │ │ │ ├── startup_generic.S
│ │ │ │ │ │ │ ├── system_ARMCM0.c
│ │ │ │ │ │ │ ├── system_ARMCM23.c
│ │ │ │ │ │ │ ├── system_ARMCM3.c
│ │ │ │ │ │ │ ├── system_ARMCM33.c
│ │ │ │ │ │ │ ├── system_ARMCM4.c
│ │ │ │ │ │ │ ├── system_ARMCM7.c
│ │ │ │ │ │ │ ├── system_ARMSC000.c
│ │ │ │ │ │ │ ├── system_ARMSC300.c
│ │ │ │ │ │ │ ├── system_ARMv8MBL.c
│ │ │ │ │ │ │ ├── system_ARMv8MML.c
│ │ │ │ │ │ │ └── system_generic.c
│ │ │ │ │ │ └── src/
│ │ │ │ │ │ ├── all_tests.c
│ │ │ │ │ │ ├── basic_math_tests/
│ │ │ │ │ │ │ ├── abs_tests.c
│ │ │ │ │ │ │ ├── add_tests.c
│ │ │ │ │ │ │ ├── basic_math_test_common_data.c
│ │ │ │ │ │ │ ├── basic_math_test_group.c
│ │ │ │ │ │ │ ├── dot_prod_tests.c
│ │ │ │ │ │ │ ├── mult_tests.c
│ │ │ │ │ │ │ ├── negate_tests.c
│ │ │ │ │ │ │ ├── offset_tests.c
│ │ │ │ │ │ │ ├── scale_tests.c
│ │ │ │ │ │ │ ├── shift_tests.c
│ │ │ │ │ │ │ └── sub_tests.c
│ │ │ │ │ │ ├── complex_math_tests/
│ │ │ │ │ │ │ ├── cmplx_conj_tests.c
│ │ │ │ │ │ │ ├── cmplx_dot_prod_tests.c
│ │ │ │ │ │ │ ├── cmplx_mag_squared_tests.c
│ │ │ │ │ │ │ ├── cmplx_mag_tests.c
│ │ │ │ │ │ │ ├── cmplx_mult_cmplx_tests.c
│ │ │ │ │ │ │ ├── cmplx_mult_real_test.c
│ │ │ │ │ │ │ ├── complex_math_test_common_data.c
│ │ │ │ │ │ │ └── complex_math_test_group.c
│ │ │ │ │ │ ├── controller_tests/
│ │ │ │ │ │ │ ├── controller_test_common_data.c
│ │ │ │ │ │ │ ├── controller_test_group.c
│ │ │ │ │ │ │ ├── pid_reset_tests.c
│ │ │ │ │ │ │ ├── pid_tests.c
│ │ │ │ │ │ │ └── sin_cos_tests.c
│ │ │ │ │ │ ├── fast_math_tests/
│ │ │ │ │ │ │ ├── fast_math_tests.c
│ │ │ │ │ │ │ └── fast_math_tests_common_data.c
│ │ │ │ │ │ ├── filtering_tests/
│ │ │ │ │ │ │ ├── biquad_tests.c
│ │ │ │ │ │ │ ├── conv_tests.c
│ │ │ │ │ │ │ ├── correlate_tests.c
│ │ │ │ │ │ │ ├── filtering_test_common_data.c
│ │ │ │ │ │ │ ├── filtering_test_group.c
│ │ │ │ │ │ │ ├── fir_tests.c
│ │ │ │ │ │ │ ├── iir_tests.c
│ │ │ │ │ │ │ └── lms_tests.c
│ │ │ │ │ │ ├── intrinsics_tests/
│ │ │ │ │ │ │ ├── intrinsics_tests.c
│ │ │ │ │ │ │ └── intrinsics_tests_common_data.c
│ │ │ │ │ │ ├── main.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ ├── matrix_tests/
│ │ │ │ │ │ │ ├── mat_add_tests.c
│ │ │ │ │ │ │ ├── mat_cmplx_mult_tests.c
│ │ │ │ │ │ │ ├── mat_init_tests.c
│ │ │ │ │ │ │ ├── mat_inverse_tests.c
│ │ │ │ │ │ │ ├── mat_mult_fast_tests.c
│ │ │ │ │ │ │ ├── mat_mult_tests.c
│ │ │ │ │ │ │ ├── mat_scale_tests.c
│ │ │ │ │ │ │ ├── mat_sub_tests.c
│ │ │ │ │ │ │ ├── mat_trans_tests.c
│ │ │ │ │ │ │ ├── matrix_test_common_data.c
│ │ │ │ │ │ │ └── matrix_test_group.c
│ │ │ │ │ │ ├── statistics_tests/
│ │ │ │ │ │ │ ├── max_tests.c
│ │ │ │ │ │ │ ├── mean_tests.c
│ │ │ │ │ │ │ ├── min_tests.c
│ │ │ │ │ │ │ ├── power_tests.c
│ │ │ │ │ │ │ ├── rms_tests.c
│ │ │ │ │ │ │ ├── statistics_test_common_data.c
│ │ │ │ │ │ │ ├── statistics_test_group.c
│ │ │ │ │ │ │ ├── std_tests.c
│ │ │ │ │ │ │ └── var_tests.c
│ │ │ │ │ │ ├── support_tests/
│ │ │ │ │ │ │ ├── copy_tests.c
│ │ │ │ │ │ │ ├── fill_tests.c
│ │ │ │ │ │ │ ├── support_test_common_data.c
│ │ │ │ │ │ │ ├── support_test_group.c
│ │ │ │ │ │ │ └── x_to_y_tests.c
│ │ │ │ │ │ └── transform_tests/
│ │ │ │ │ │ ├── cfft_family_tests.c
│ │ │ │ │ │ ├── cfft_tests.c
│ │ │ │ │ │ ├── dct4_tests.c
│ │ │ │ │ │ ├── rfft_fast_tests.c
│ │ │ │ │ │ ├── rfft_tests.c
│ │ │ │ │ │ ├── transform_test_group.c
│ │ │ │ │ │ └── transform_tests_common_data.c
│ │ │ │ │ ├── DspLibTest_FVP/
│ │ │ │ │ │ ├── ARMv8MBLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLld_config.txt
│ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt
│ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt
│ │ │ │ │ │ ├── cortexM0l_config.txt
│ │ │ │ │ │ ├── cortexM3l_config.txt
│ │ │ │ │ │ ├── cortexM4l_config.txt
│ │ │ │ │ │ ├── cortexM4lf_config.txt
│ │ │ │ │ │ ├── cortexM7l_config.txt
│ │ │ │ │ │ ├── cortexM7lfdp_config.txt
│ │ │ │ │ │ └── cortexM7lfsp_config.txt
│ │ │ │ │ ├── DspLibTest_FVP_A5/
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ ├── CMSIS/
│ │ │ │ │ │ │ │ ├── RTX_Config.c
│ │ │ │ │ │ │ │ ├── RTX_Config.h
│ │ │ │ │ │ │ │ └── handlers.c
│ │ │ │ │ │ │ ├── Device/
│ │ │ │ │ │ │ │ └── ARMCA5/
│ │ │ │ │ │ │ │ ├── mem_ARMCA5.h
│ │ │ │ │ │ │ │ ├── mmu_ARMCA5.c
│ │ │ │ │ │ │ │ ├── startup_ARMCA5.c
│ │ │ │ │ │ │ │ ├── system_ARMCA5.c
│ │ │ │ │ │ │ │ └── system_ARMCA5.h
│ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ └── main.c
│ │ │ │ │ ├── DspLibTest_MPS2/
│ │ │ │ │ │ └── HowTo.txt
│ │ │ │ │ ├── DspLibTest_SV_FVP/
│ │ │ │ │ │ ├── ARMv8MBLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLld_config.txt
│ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt
│ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt
│ │ │ │ │ │ ├── cortexM0l_config.txt
│ │ │ │ │ │ ├── cortexM3l_config.txt
│ │ │ │ │ │ ├── cortexM4l_config.txt
│ │ │ │ │ │ ├── cortexM4lf_config.txt
│ │ │ │ │ │ ├── cortexM7l_config.txt
│ │ │ │ │ │ ├── cortexM7lfdp_config.txt
│ │ │ │ │ │ └── cortexM7lfsp_config.txt
│ │ │ │ │ ├── DspLibTest_SV_MPS2/
│ │ │ │ │ │ ├── ARMv8MBLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLl_config.txt
│ │ │ │ │ │ ├── ARMv8MMLld_config.txt
│ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt
│ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt
│ │ │ │ │ │ ├── cortexM0l_config.txt
│ │ │ │ │ │ ├── cortexM3l_config.txt
│ │ │ │ │ │ ├── cortexM4l_config.txt
│ │ │ │ │ │ ├── cortexM4lf_config.txt
│ │ │ │ │ │ ├── cortexM7l_config.txt
│ │ │ │ │ │ ├── cortexM7lfdp_config.txt
│ │ │ │ │ │ └── cortexM7lfsp_config.txt
│ │ │ │ │ ├── HowTo.txt
│ │ │ │ │ ├── HowTo_SV.txt
│ │ │ │ │ └── RefLibs/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── inc/
│ │ │ │ │ │ └── ref.h
│ │ │ │ │ └── src/
│ │ │ │ │ ├── BasicMathFunctions/
│ │ │ │ │ │ ├── BasicMathFunctions.c
│ │ │ │ │ │ ├── abs.c
│ │ │ │ │ │ ├── add.c
│ │ │ │ │ │ ├── dot_prod.c
│ │ │ │ │ │ ├── mult.c
│ │ │ │ │ │ ├── negate.c
│ │ │ │ │ │ ├── offset.c
│ │ │ │ │ │ ├── scale.c
│ │ │ │ │ │ ├── shift.c
│ │ │ │ │ │ └── sub.c
│ │ │ │ │ ├── ComplexMathFunctions/
│ │ │ │ │ │ ├── ComplexMathFunctions.c
│ │ │ │ │ │ ├── cmplx_conj.c
│ │ │ │ │ │ ├── cmplx_dot_prod.c
│ │ │ │ │ │ ├── cmplx_mag.c
│ │ │ │ │ │ ├── cmplx_mag_squared.c
│ │ │ │ │ │ ├── cmplx_mult_cmplx.c
│ │ │ │ │ │ └── cmplx_mult_real.c
│ │ │ │ │ ├── ControllerFunctions/
│ │ │ │ │ │ ├── ControllerFunctions.c
│ │ │ │ │ │ ├── pid.c
│ │ │ │ │ │ └── sin_cos.c
│ │ │ │ │ ├── FastMathFunctions/
│ │ │ │ │ │ ├── FastMathFunctions.c
│ │ │ │ │ │ ├── cos.c
│ │ │ │ │ │ ├── sin.c
│ │ │ │ │ │ └── sqrt.c
│ │ │ │ │ ├── FilteringFunctions/
│ │ │ │ │ │ ├── FilteringFunctions.c
│ │ │ │ │ │ ├── biquad.c
│ │ │ │ │ │ ├── conv.c
│ │ │ │ │ │ ├── correlate.c
│ │ │ │ │ │ ├── fir.c
│ │ │ │ │ │ ├── fir_decimate.c
│ │ │ │ │ │ ├── fir_interpolate.c
│ │ │ │ │ │ ├── fir_lattice.c
│ │ │ │ │ │ ├── fir_sparse.c
│ │ │ │ │ │ ├── iir_lattice.c
│ │ │ │ │ │ └── lms.c
│ │ │ │ │ ├── HelperFunctions/
│ │ │ │ │ │ ├── HelperFunctions.c
│ │ │ │ │ │ ├── mat_helper.c
│ │ │ │ │ │ └── ref_helper.c
│ │ │ │ │ ├── Intrinsics/
│ │ │ │ │ │ ├── Intrinsics_.c
│ │ │ │ │ │ └── intrinsics.c
│ │ │ │ │ ├── MatrixFunctions/
│ │ │ │ │ │ ├── MatrixFunctions.c
│ │ │ │ │ │ ├── mat_add.c
│ │ │ │ │ │ ├── mat_cmplx_mult.c
│ │ │ │ │ │ ├── mat_inverse.c
│ │ │ │ │ │ ├── mat_mult.c
│ │ │ │ │ │ ├── mat_scale.c
│ │ │ │ │ │ ├── mat_sub.c
│ │ │ │ │ │ └── mat_trans.c
│ │ │ │ │ ├── StatisticsFunctions/
│ │ │ │ │ │ ├── StatisticsFunctions.c
│ │ │ │ │ │ ├── max.c
│ │ │ │ │ │ ├── mean.c
│ │ │ │ │ │ ├── min.c
│ │ │ │ │ │ ├── power.c
│ │ │ │ │ │ ├── rms.c
│ │ │ │ │ │ ├── std.c
│ │ │ │ │ │ └── var.c
│ │ │ │ │ ├── SupportFunctions/
│ │ │ │ │ │ ├── SupportFunctions.c
│ │ │ │ │ │ ├── copy.c
│ │ │ │ │ │ ├── fill.c
│ │ │ │ │ │ ├── fixed_to_fixed.c
│ │ │ │ │ │ ├── fixed_to_float.c
│ │ │ │ │ │ └── float_to_fixed.c
│ │ │ │ │ └── TransformFunctions/
│ │ │ │ │ ├── TransformFunctions.c
│ │ │ │ │ ├── bitreversal.c
│ │ │ │ │ ├── cfft.c
│ │ │ │ │ ├── dct4.c
│ │ │ │ │ └── rfft.c
│ │ │ │ ├── Examples/
│ │ │ │ │ └── ARM/
│ │ │ │ │ ├── arm_class_marks_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ └── arm_class_marks_example_f32.c
│ │ │ │ │ ├── arm_convolution_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_convolution_example_f32.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_dotproduct_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ └── arm_dotproduct_example_f32.c
│ │ │ │ │ ├── arm_fft_bin_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_fft_bin_data.c
│ │ │ │ │ │ └── arm_fft_bin_example_f32.c
│ │ │ │ │ ├── arm_fir_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_fir_data.c
│ │ │ │ │ │ ├── arm_fir_example_f32.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_graphic_equalizer_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_graphic_equalizer_data.c
│ │ │ │ │ │ ├── arm_graphic_equalizer_example_q31.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_linear_interp_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_linear_interp_data.c
│ │ │ │ │ │ ├── arm_linear_interp_example_f32.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_matrix_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_matrix_example_f32.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_signal_converge_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ ├── arm_signal_converge_data.c
│ │ │ │ │ │ ├── arm_signal_converge_example_f32.c
│ │ │ │ │ │ ├── math_helper.c
│ │ │ │ │ │ └── math_helper.h
│ │ │ │ │ ├── arm_sin_cos_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ └── arm_sin_cos_example_f32.c
│ │ │ │ │ ├── arm_variance_example/
│ │ │ │ │ │ ├── Abstract.txt
│ │ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ └── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ └── arm_variance_example_f32.c
│ │ │ │ │ └── boot/
│ │ │ │ │ └── RTE_Components.h
│ │ │ │ ├── Include/
│ │ │ │ │ ├── arm_common_tables.h
│ │ │ │ │ ├── arm_const_structs.h
│ │ │ │ │ └── arm_math.h
│ │ │ │ ├── Lib/
│ │ │ │ │ ├── ARM/
│ │ │ │ │ │ ├── arm_ARMv8MBLl_math.lib
│ │ │ │ │ │ ├── arm_ARMv8MMLl_math.lib
│ │ │ │ │ │ ├── arm_ARMv8MMLld_math.lib
│ │ │ │ │ │ ├── arm_ARMv8MMLldfsp_math.lib
│ │ │ │ │ │ ├── arm_ARMv8MMLlfsp_math.lib
│ │ │ │ │ │ ├── arm_cortexM0b_math.lib
│ │ │ │ │ │ ├── arm_cortexM0l_math.lib
│ │ │ │ │ │ ├── arm_cortexM3b_math.lib
│ │ │ │ │ │ ├── arm_cortexM3l_math.lib
│ │ │ │ │ │ ├── arm_cortexM4b_math.lib
│ │ │ │ │ │ ├── arm_cortexM4bf_math.lib
│ │ │ │ │ │ ├── arm_cortexM4l_math.lib
│ │ │ │ │ │ ├── arm_cortexM4lf_math.lib
│ │ │ │ │ │ ├── arm_cortexM7b_math.lib
│ │ │ │ │ │ ├── arm_cortexM7bfdp_math.lib
│ │ │ │ │ │ ├── arm_cortexM7bfsp_math.lib
│ │ │ │ │ │ ├── arm_cortexM7l_math.lib
│ │ │ │ │ │ ├── arm_cortexM7lfdp_math.lib
│ │ │ │ │ │ └── arm_cortexM7lfsp_math.lib
│ │ │ │ │ ├── GCC/
│ │ │ │ │ │ ├── libarm_ARMv8MBLl_math.a
│ │ │ │ │ │ ├── libarm_ARMv8MMLl_math.a
│ │ │ │ │ │ ├── libarm_ARMv8MMLld_math.a
│ │ │ │ │ │ ├── libarm_ARMv8MMLldfsp_math.a
│ │ │ │ │ │ ├── libarm_ARMv8MMLlfsp_math.a
│ │ │ │ │ │ ├── libarm_cortexM0l_math.a
│ │ │ │ │ │ ├── libarm_cortexM3l_math.a
│ │ │ │ │ │ ├── libarm_cortexM4l_math.a
│ │ │ │ │ │ ├── libarm_cortexM4lf_math.a
│ │ │ │ │ │ ├── libarm_cortexM7l_math.a
│ │ │ │ │ │ ├── libarm_cortexM7lfdp_math.a
│ │ │ │ │ │ └── libarm_cortexM7lfsp_math.a
│ │ │ │ │ └── IAR/
│ │ │ │ │ ├── iar_ARMv8MBLl_math.a
│ │ │ │ │ ├── iar_ARMv8MMLl_math.a
│ │ │ │ │ ├── iar_ARMv8MMLld_math.a
│ │ │ │ │ ├── iar_ARMv8MMLldfdp_math.a
│ │ │ │ │ ├── iar_ARMv8MMLldfsp_math.a
│ │ │ │ │ ├── iar_ARMv8MMLlfdp_math.a
│ │ │ │ │ ├── iar_ARMv8MMLlfsp_math.a
│ │ │ │ │ ├── iar_cortexM0b_math.a
│ │ │ │ │ ├── iar_cortexM0l_math.a
│ │ │ │ │ ├── iar_cortexM3b_math.a
│ │ │ │ │ ├── iar_cortexM3l_math.a
│ │ │ │ │ ├── iar_cortexM4b_math.a
│ │ │ │ │ ├── iar_cortexM4bf_math.a
│ │ │ │ │ ├── iar_cortexM4l_math.a
│ │ │ │ │ ├── iar_cortexM4lf_math.a
│ │ │ │ │ ├── iar_cortexM7b_math.a
│ │ │ │ │ ├── iar_cortexM7bf_math.a
│ │ │ │ │ ├── iar_cortexM7bs_math.a
│ │ │ │ │ ├── iar_cortexM7l_math.a
│ │ │ │ │ ├── iar_cortexM7lf_math.a
│ │ │ │ │ └── iar_cortexM7ls_math.a
│ │ │ │ ├── PythonWrapper/
│ │ │ │ │ └── cmsisdsp_pkg/
│ │ │ │ │ └── src/
│ │ │ │ │ ├── cmsismodule.c
│ │ │ │ │ ├── cmsismodule.h
│ │ │ │ │ └── fftinit.c
│ │ │ │ └── Source/
│ │ │ │ ├── BasicMathFunctions/
│ │ │ │ │ ├── BasicMathFunctions.c
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── arm_abs_f32.c
│ │ │ │ │ ├── arm_abs_q15.c
│ │ │ │ │ ├── arm_abs_q31.c
│ │ │ │ │ ├── arm_abs_q7.c
│ │ │ │ │ ├── arm_add_f32.c
│ │ │ │ │ ├── arm_add_q15.c
│ │ │ │ │ ├── arm_add_q31.c
│ │ │ │ │ ├── arm_add_q7.c
│ │ │ │ │ ├── arm_dot_prod_f32.c
│ │ │ │ │ ├── arm_dot_prod_q15.c
│ │ │ │ │ ├── arm_dot_prod_q31.c
│ │ │ │ │ ├── arm_dot_prod_q7.c
│ │ │ │ │ ├── arm_mult_f32.c
│ │ │ │ │ ├── arm_mult_q15.c
│ │ │ │ │ ├── arm_mult_q31.c
│ │ │ │ │ ├── arm_mult_q7.c
│ │ │ │ │ ├── arm_negate_f32.c
│ │ │ │ │ ├── arm_negate_q15.c
│ │ │ │ │ ├── arm_negate_q31.c
│ │ │ │ │ ├── arm_negate_q7.c
│ │ │ │ │ ├── arm_offset_f32.c
│ │ │ │ │ ├── arm_offset_q15.c
│ │ │ │ │ ├── arm_offset_q31.c
│ │ │ │ │ ├── arm_offset_q7.c
│ │ │ │ │ ├── arm_scale_f32.c
│ │ │ │ │ ├── arm_scale_q15.c
│ │ │ │ │ ├── arm_scale_q31.c
│ │ │ │ │ ├── arm_scale_q7.c
│ │ │ │ │ ├── arm_shift_q15.c
│ │ │ │ │ ├── arm_shift_q31.c
│ │ │ │ │ ├── arm_shift_q7.c
│ │ │ │ │ ├── arm_sub_f32.c
│ │ │ │ │ ├── arm_sub_q15.c
│ │ │ │ │ ├── arm_sub_q31.c
│ │ │ │ │ └── arm_sub_q7.c
│ │ │ │ ├── CMakeLists.txt
│ │ │ │ ├── CommonTables/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── CommonTables.c
│ │ │ │ │ ├── arm_common_tables.c
│ │ │ │ │ └── arm_const_structs.c
│ │ │ │ ├── ComplexMathFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── ComplexMathFunctions.c
│ │ │ │ │ ├── arm_cmplx_conj_f32.c
│ │ │ │ │ ├── arm_cmplx_conj_q15.c
│ │ │ │ │ ├── arm_cmplx_conj_q31.c
│ │ │ │ │ ├── arm_cmplx_dot_prod_f32.c
│ │ │ │ │ ├── arm_cmplx_dot_prod_q15.c
│ │ │ │ │ ├── arm_cmplx_dot_prod_q31.c
│ │ │ │ │ ├── arm_cmplx_mag_f32.c
│ │ │ │ │ ├── arm_cmplx_mag_q15.c
│ │ │ │ │ ├── arm_cmplx_mag_q31.c
│ │ │ │ │ ├── arm_cmplx_mag_squared_f32.c
│ │ │ │ │ ├── arm_cmplx_mag_squared_q15.c
│ │ │ │ │ ├── arm_cmplx_mag_squared_q31.c
│ │ │ │ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ │ │ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ │ │ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ │ │ │ ├── arm_cmplx_mult_real_f32.c
│ │ │ │ │ ├── arm_cmplx_mult_real_q15.c
│ │ │ │ │ └── arm_cmplx_mult_real_q31.c
│ │ │ │ ├── ControllerFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── ControllerFunctions.c
│ │ │ │ │ ├── arm_pid_init_f32.c
│ │ │ │ │ ├── arm_pid_init_q15.c
│ │ │ │ │ ├── arm_pid_init_q31.c
│ │ │ │ │ ├── arm_pid_reset_f32.c
│ │ │ │ │ ├── arm_pid_reset_q15.c
│ │ │ │ │ ├── arm_pid_reset_q31.c
│ │ │ │ │ ├── arm_sin_cos_f32.c
│ │ │ │ │ └── arm_sin_cos_q31.c
│ │ │ │ ├── FastMathFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── FastMathFunctions.c
│ │ │ │ │ ├── arm_cos_f32.c
│ │ │ │ │ ├── arm_cos_q15.c
│ │ │ │ │ ├── arm_cos_q31.c
│ │ │ │ │ ├── arm_sin_f32.c
│ │ │ │ │ ├── arm_sin_q15.c
│ │ │ │ │ ├── arm_sin_q31.c
│ │ │ │ │ ├── arm_sqrt_q15.c
│ │ │ │ │ └── arm_sqrt_q31.c
│ │ │ │ ├── FilteringFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── FilteringFunctions.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_f32.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_q15.c
│ │ │ │ │ ├── arm_biquad_cascade_df1_q31.c
│ │ │ │ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ │ │ │ ├── arm_biquad_cascade_df2T_f64.c
│ │ │ │ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ │ │ │ ├── arm_biquad_cascade_df2T_init_f64.c
│ │ │ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c
│ │ │ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c
│ │ │ │ │ ├── arm_conv_f32.c
│ │ │ │ │ ├── arm_conv_fast_opt_q15.c
│ │ │ │ │ ├── arm_conv_fast_q15.c
│ │ │ │ │ ├── arm_conv_fast_q31.c
│ │ │ │ │ ├── arm_conv_opt_q15.c
│ │ │ │ │ ├── arm_conv_opt_q7.c
│ │ │ │ │ ├── arm_conv_partial_f32.c
│ │ │ │ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ │ │ │ ├── arm_conv_partial_fast_q15.c
│ │ │ │ │ ├── arm_conv_partial_fast_q31.c
│ │ │ │ │ ├── arm_conv_partial_opt_q15.c
│ │ │ │ │ ├── arm_conv_partial_opt_q7.c
│ │ │ │ │ ├── arm_conv_partial_q15.c
│ │ │ │ │ ├── arm_conv_partial_q31.c
│ │ │ │ │ ├── arm_conv_partial_q7.c
│ │ │ │ │ ├── arm_conv_q15.c
│ │ │ │ │ ├── arm_conv_q31.c
│ │ │ │ │ ├── arm_conv_q7.c
│ │ │ │ │ ├── arm_correlate_f32.c
│ │ │ │ │ ├── arm_correlate_fast_opt_q15.c
│ │ │ │ │ ├── arm_correlate_fast_q15.c
│ │ │ │ │ ├── arm_correlate_fast_q31.c
│ │ │ │ │ ├── arm_correlate_opt_q15.c
│ │ │ │ │ ├── arm_correlate_opt_q7.c
│ │ │ │ │ ├── arm_correlate_q15.c
│ │ │ │ │ ├── arm_correlate_q31.c
│ │ │ │ │ ├── arm_correlate_q7.c
│ │ │ │ │ ├── arm_fir_decimate_f32.c
│ │ │ │ │ ├── arm_fir_decimate_fast_q15.c
│ │ │ │ │ ├── arm_fir_decimate_fast_q31.c
│ │ │ │ │ ├── arm_fir_decimate_init_f32.c
│ │ │ │ │ ├── arm_fir_decimate_init_q15.c
│ │ │ │ │ ├── arm_fir_decimate_init_q31.c
│ │ │ │ │ ├── arm_fir_decimate_q15.c
│ │ │ │ │ ├── arm_fir_decimate_q31.c
│ │ │ │ │ ├── arm_fir_f32.c
│ │ │ │ │ ├── arm_fir_fast_q15.c
│ │ │ │ │ ├── arm_fir_fast_q31.c
│ │ │ │ │ ├── arm_fir_init_f32.c
│ │ │ │ │ ├── arm_fir_init_q15.c
│ │ │ │ │ ├── arm_fir_init_q31.c
│ │ │ │ │ ├── arm_fir_init_q7.c
│ │ │ │ │ ├── arm_fir_interpolate_f32.c
│ │ │ │ │ ├── arm_fir_interpolate_init_f32.c
│ │ │ │ │ ├── arm_fir_interpolate_init_q15.c
│ │ │ │ │ ├── arm_fir_interpolate_init_q31.c
│ │ │ │ │ ├── arm_fir_interpolate_q15.c
│ │ │ │ │ ├── arm_fir_interpolate_q31.c
│ │ │ │ │ ├── arm_fir_lattice_f32.c
│ │ │ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ │ │ ├── arm_fir_lattice_q15.c
│ │ │ │ │ ├── arm_fir_lattice_q31.c
│ │ │ │ │ ├── arm_fir_q15.c
│ │ │ │ │ ├── arm_fir_q31.c
│ │ │ │ │ ├── arm_fir_q7.c
│ │ │ │ │ ├── arm_fir_sparse_f32.c
│ │ │ │ │ ├── arm_fir_sparse_init_f32.c
│ │ │ │ │ ├── arm_fir_sparse_init_q15.c
│ │ │ │ │ ├── arm_fir_sparse_init_q31.c
│ │ │ │ │ ├── arm_fir_sparse_init_q7.c
│ │ │ │ │ ├── arm_fir_sparse_q15.c
│ │ │ │ │ ├── arm_fir_sparse_q31.c
│ │ │ │ │ ├── arm_fir_sparse_q7.c
│ │ │ │ │ ├── arm_iir_lattice_f32.c
│ │ │ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ │ │ ├── arm_iir_lattice_q15.c
│ │ │ │ │ ├── arm_iir_lattice_q31.c
│ │ │ │ │ ├── arm_lms_f32.c
│ │ │ │ │ ├── arm_lms_init_f32.c
│ │ │ │ │ ├── arm_lms_init_q15.c
│ │ │ │ │ ├── arm_lms_init_q31.c
│ │ │ │ │ ├── arm_lms_norm_f32.c
│ │ │ │ │ ├── arm_lms_norm_init_f32.c
│ │ │ │ │ ├── arm_lms_norm_init_q15.c
│ │ │ │ │ ├── arm_lms_norm_init_q31.c
│ │ │ │ │ ├── arm_lms_norm_q15.c
│ │ │ │ │ ├── arm_lms_norm_q31.c
│ │ │ │ │ ├── arm_lms_q15.c
│ │ │ │ │ └── arm_lms_q31.c
│ │ │ │ ├── MatrixFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── MatrixFunctions.c
│ │ │ │ │ ├── arm_mat_add_f32.c
│ │ │ │ │ ├── arm_mat_add_q15.c
│ │ │ │ │ ├── arm_mat_add_q31.c
│ │ │ │ │ ├── arm_mat_cmplx_mult_f32.c
│ │ │ │ │ ├── arm_mat_cmplx_mult_q15.c
│ │ │ │ │ ├── arm_mat_cmplx_mult_q31.c
│ │ │ │ │ ├── arm_mat_init_f32.c
│ │ │ │ │ ├── arm_mat_init_q15.c
│ │ │ │ │ ├── arm_mat_init_q31.c
│ │ │ │ │ ├── arm_mat_inverse_f32.c
│ │ │ │ │ ├── arm_mat_inverse_f64.c
│ │ │ │ │ ├── arm_mat_mult_f32.c
│ │ │ │ │ ├── arm_mat_mult_fast_q15.c
│ │ │ │ │ ├── arm_mat_mult_fast_q31.c
│ │ │ │ │ ├── arm_mat_mult_q15.c
│ │ │ │ │ ├── arm_mat_mult_q31.c
│ │ │ │ │ ├── arm_mat_scale_f32.c
│ │ │ │ │ ├── arm_mat_scale_q15.c
│ │ │ │ │ ├── arm_mat_scale_q31.c
│ │ │ │ │ ├── arm_mat_sub_f32.c
│ │ │ │ │ ├── arm_mat_sub_q15.c
│ │ │ │ │ ├── arm_mat_sub_q31.c
│ │ │ │ │ ├── arm_mat_trans_f32.c
│ │ │ │ │ ├── arm_mat_trans_q15.c
│ │ │ │ │ └── arm_mat_trans_q31.c
│ │ │ │ ├── StatisticsFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── StatisticsFunctions.c
│ │ │ │ │ ├── arm_max_f32.c
│ │ │ │ │ ├── arm_max_q15.c
│ │ │ │ │ ├── arm_max_q31.c
│ │ │ │ │ ├── arm_max_q7.c
│ │ │ │ │ ├── arm_mean_f32.c
│ │ │ │ │ ├── arm_mean_q15.c
│ │ │ │ │ ├── arm_mean_q31.c
│ │ │ │ │ ├── arm_mean_q7.c
│ │ │ │ │ ├── arm_min_f32.c
│ │ │ │ │ ├── arm_min_q15.c
│ │ │ │ │ ├── arm_min_q31.c
│ │ │ │ │ ├── arm_min_q7.c
│ │ │ │ │ ├── arm_power_f32.c
│ │ │ │ │ ├── arm_power_q15.c
│ │ │ │ │ ├── arm_power_q31.c
│ │ │ │ │ ├── arm_power_q7.c
│ │ │ │ │ ├── arm_rms_f32.c
│ │ │ │ │ ├── arm_rms_q15.c
│ │ │ │ │ ├── arm_rms_q31.c
│ │ │ │ │ ├── arm_std_f32.c
│ │ │ │ │ ├── arm_std_q15.c
│ │ │ │ │ ├── arm_std_q31.c
│ │ │ │ │ ├── arm_var_f32.c
│ │ │ │ │ ├── arm_var_q15.c
│ │ │ │ │ └── arm_var_q31.c
│ │ │ │ ├── SupportFunctions/
│ │ │ │ │ ├── CMakeLists.txt
│ │ │ │ │ ├── SupportFunctions.c
│ │ │ │ │ ├── arm_copy_f32.c
│ │ │ │ │ ├── arm_copy_q15.c
│ │ │ │ │ ├── arm_copy_q31.c
│ │ │ │ │ ├── arm_copy_q7.c
│ │ │ │ │ ├── arm_fill_f32.c
│ │ │ │ │ ├── arm_fill_q15.c
│ │ │ │ │ ├── arm_fill_q31.c
│ │ │ │ │ ├── arm_fill_q7.c
│ │ │ │ │ ├── arm_float_to_q15.c
│ │ │ │ │ ├── arm_float_to_q31.c
│ │ │ │ │ ├── arm_float_to_q7.c
│ │ │ │ │ ├── arm_q15_to_float.c
│ │ │ │ │ ├── arm_q15_to_q31.c
│ │ │ │ │ ├── arm_q15_to_q7.c
│ │ │ │ │ ├── arm_q31_to_float.c
│ │ │ │ │ ├── arm_q31_to_q15.c
│ │ │ │ │ ├── arm_q31_to_q7.c
│ │ │ │ │ ├── arm_q7_to_float.c
│ │ │ │ │ ├── arm_q7_to_q15.c
│ │ │ │ │ └── arm_q7_to_q31.c
│ │ │ │ └── TransformFunctions/
│ │ │ │ ├── CMakeLists.txt
│ │ │ │ ├── TransformFunctions.c
│ │ │ │ ├── arm_bitreversal.c
│ │ │ │ ├── arm_bitreversal2.S
│ │ │ │ ├── arm_bitreversal2.c
│ │ │ │ ├── arm_cfft_f32.c
│ │ │ │ ├── arm_cfft_q15.c
│ │ │ │ ├── arm_cfft_q31.c
│ │ │ │ ├── arm_cfft_radix2_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_q15.c
│ │ │ │ ├── arm_cfft_radix2_init_q31.c
│ │ │ │ ├── arm_cfft_radix2_q15.c
│ │ │ │ ├── arm_cfft_radix2_q31.c
│ │ │ │ ├── arm_cfft_radix4_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_q15.c
│ │ │ │ ├── arm_cfft_radix4_init_q31.c
│ │ │ │ ├── arm_cfft_radix4_q15.c
│ │ │ │ ├── arm_cfft_radix4_q31.c
│ │ │ │ ├── arm_cfft_radix8_f32.c
│ │ │ │ ├── arm_dct4_f32.c
│ │ │ │ ├── arm_dct4_init_f32.c
│ │ │ │ ├── arm_dct4_init_q15.c
│ │ │ │ ├── arm_dct4_init_q31.c
│ │ │ │ ├── arm_dct4_q15.c
│ │ │ │ ├── arm_dct4_q31.c
│ │ │ │ ├── arm_rfft_f32.c
│ │ │ │ ├── arm_rfft_fast_f32.c
│ │ │ │ ├── arm_rfft_fast_init_f32.c
│ │ │ │ ├── arm_rfft_init_f32.c
│ │ │ │ ├── arm_rfft_init_q15.c
│ │ │ │ ├── arm_rfft_init_q31.c
│ │ │ │ ├── arm_rfft_q15.c
│ │ │ │ └── arm_rfft_q31.c
│ │ │ ├── Device/
│ │ │ │ └── ST/
│ │ │ │ └── STM32H7xx/
│ │ │ │ ├── Include/
│ │ │ │ │ ├── stm32h750xx.h
│ │ │ │ │ ├── stm32h7xx.h
│ │ │ │ │ └── system_stm32h7xx.h
│ │ │ │ └── LICENSE.txt
│ │ │ ├── Include/
│ │ │ │ ├── cmsis_armcc.h
│ │ │ │ ├── cmsis_armclang.h
│ │ │ │ ├── cmsis_armclang_ltm.h
│ │ │ │ ├── cmsis_compiler.h
│ │ │ │ ├── cmsis_gcc.h
│ │ │ │ ├── cmsis_iccarm.h
│ │ │ │ ├── cmsis_version.h
│ │ │ │ ├── core_armv81mml.h
│ │ │ │ ├── core_armv8mbl.h
│ │ │ │ ├── core_armv8mml.h
│ │ │ │ ├── core_cm0.h
│ │ │ │ ├── core_cm0plus.h
│ │ │ │ ├── core_cm1.h
│ │ │ │ ├── core_cm23.h
│ │ │ │ ├── core_cm3.h
│ │ │ │ ├── core_cm33.h
│ │ │ │ ├── core_cm35p.h
│ │ │ │ ├── core_cm4.h
│ │ │ │ ├── core_cm7.h
│ │ │ │ ├── core_sc000.h
│ │ │ │ ├── core_sc300.h
│ │ │ │ ├── mpu_armv7.h
│ │ │ │ ├── mpu_armv8.h
│ │ │ │ └── tz_context.h
│ │ │ ├── LICENSE.txt
│ │ │ ├── NN/
│ │ │ │ ├── Examples/
│ │ │ │ │ ├── ARM/
│ │ │ │ │ │ └── arm_nn_examples/
│ │ │ │ │ │ ├── cifar10/
│ │ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ │ ├── Compiler/
│ │ │ │ │ │ │ │ │ └── EventRecorderConf.h
│ │ │ │ │ │ │ │ ├── Device/
│ │ │ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.c
│ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ │ │ ├── _ARMCM0/
│ │ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ │ ├── _ARMCM3/
│ │ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ │ ├── _ARMCM4_FP/
│ │ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ │ └── _ARMCM7_SP/
│ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ ├── arm_nnexamples_cifar10.cpp
│ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_inputs.h
│ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_parameter.h
│ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_weights.h
│ │ │ │ │ │ │ └── readme.txt
│ │ │ │ │ │ └── gru/
│ │ │ │ │ │ ├── RTE/
│ │ │ │ │ │ │ ├── Compiler/
│ │ │ │ │ │ │ │ └── EventRecorderConf.h
│ │ │ │ │ │ │ ├── Device/
│ │ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ │ └── ARMCM7_SP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM7.c
│ │ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ │ ├── _ARMCM0/
│ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ ├── _ARMCM3/
│ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ ├── _ARMCM4_FP/
│ │ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ │ └── _ARMCM7_SP/
│ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ ├── arm_nnexamples_gru.cpp
│ │ │ │ │ │ ├── arm_nnexamples_gru_test_data.h
│ │ │ │ │ │ └── readme.txt
│ │ │ │ │ └── IAR/
│ │ │ │ │ └── iar_nn_examples/
│ │ │ │ │ ├── NN-example-cifar10/
│ │ │ │ │ │ ├── arm_nnexamples_cifar10.cpp
│ │ │ │ │ │ ├── arm_nnexamples_cifar10_inputs.h
│ │ │ │ │ │ ├── arm_nnexamples_cifar10_parameter.h
│ │ │ │ │ │ ├── arm_nnexamples_cifar10_weights.h
│ │ │ │ │ │ └── readme_iar.txt
│ │ │ │ │ └── NN-example-gru/
│ │ │ │ │ ├── arm_nnexamples_gru.cpp
│ │ │ │ │ ├── arm_nnexamples_gru_test_data.h
│ │ │ │ │ └── readme_iar.txt
│ │ │ │ ├── Include/
│ │ │ │ │ ├── arm_nn_tables.h
│ │ │ │ │ ├── arm_nnfunctions.h
│ │ │ │ │ └── arm_nnsupportfunctions.h
│ │ │ │ ├── NN_Lib_Tests/
│ │ │ │ │ └── nn_test/
│ │ │ │ │ ├── RTE/
│ │ │ │ │ │ ├── Device/
│ │ │ │ │ │ │ ├── ARMCM0/
│ │ │ │ │ │ │ │ ├── startup_ARMCM0.s
│ │ │ │ │ │ │ │ └── system_ARMCM0.c
│ │ │ │ │ │ │ ├── ARMCM3/
│ │ │ │ │ │ │ │ ├── startup_ARMCM3.s
│ │ │ │ │ │ │ │ └── system_ARMCM3.c
│ │ │ │ │ │ │ ├── ARMCM4/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ ├── ARMCM4_FP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM4.s
│ │ │ │ │ │ │ │ └── system_ARMCM4.c
│ │ │ │ │ │ │ ├── ARMCM7_SP/
│ │ │ │ │ │ │ │ ├── startup_ARMCM7.c
│ │ │ │ │ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ │ │ │ │ └── system_ARMCM7.c
│ │ │ │ │ │ │ └── STM32F411RETx/
│ │ │ │ │ │ │ ├── startup_stm32f411xe.s
│ │ │ │ │ │ │ └── system_stm32f4xx.c
│ │ │ │ │ │ ├── _ARMCM0/
│ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ ├── _ARMCM3/
│ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ ├── _ARMCM4_FP/
│ │ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ │ └── _ARMCM7_SP/
│ │ │ │ │ │ └── RTE_Components.h
│ │ │ │ │ ├── Ref_Implementations/
│ │ │ │ │ │ ├── arm_convolve_HWC_q15_ref.c
│ │ │ │ │ │ ├── arm_convolve_HWC_q15_ref_nonsquare.c
│ │ │ │ │ │ ├── arm_convolve_HWC_q7_ref.c
│ │ │ │ │ │ ├── arm_convolve_HWC_q7_ref_nonsquare.c
│ │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_ref.c
│ │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c
│ │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_opt_ref.c
│ │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_ref.c
│ │ │ │ │ │ ├── arm_fully_connected_q15_opt_ref.c
│ │ │ │ │ │ ├── arm_fully_connected_q15_ref.c
│ │ │ │ │ │ ├── arm_fully_connected_q7_opt_ref.c
│ │ │ │ │ │ ├── arm_fully_connected_q7_ref.c
│ │ │ │ │ │ ├── arm_nn_mult_ref.c
│ │ │ │ │ │ ├── arm_pool_ref.c
│ │ │ │ │ │ ├── arm_relu_ref.c
│ │ │ │ │ │ ├── fully_connected_testing_weights.h
│ │ │ │ │ │ └── ref_functions.h
│ │ │ │ │ ├── arm_nnexamples_nn_test.cpp
│ │ │ │ │ ├── arm_nnexamples_nn_test.h
│ │ │ │ │ └── readme.txt
│ │ │ │ └── Source/
│ │ │ │ ├── ActivationFunctions/
│ │ │ │ │ ├── arm_nn_activations_q15.c
│ │ │ │ │ ├── arm_nn_activations_q7.c
│ │ │ │ │ ├── arm_relu_q15.c
│ │ │ │ │ └── arm_relu_q7.c
│ │ │ │ ├── ConvolutionFunctions/
│ │ │ │ │ ├── arm_convolve_1x1_HWC_q7_fast_nonsquare.c
│ │ │ │ │ ├── arm_convolve_HWC_q15_basic.c
│ │ │ │ │ ├── arm_convolve_HWC_q15_fast.c
│ │ │ │ │ ├── arm_convolve_HWC_q15_fast_nonsquare.c
│ │ │ │ │ ├── arm_convolve_HWC_q7_RGB.c
│ │ │ │ │ ├── arm_convolve_HWC_q7_basic.c
│ │ │ │ │ ├── arm_convolve_HWC_q7_basic_nonsquare.c
│ │ │ │ │ ├── arm_convolve_HWC_q7_fast.c
│ │ │ │ │ ├── arm_convolve_HWC_q7_fast_nonsquare.c
│ │ │ │ │ ├── arm_depthwise_conv_u8_basic_ver1.c
│ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7.c
│ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_nonsquare.c
│ │ │ │ │ ├── arm_nn_mat_mult_kernel_q7_q15.c
│ │ │ │ │ └── arm_nn_mat_mult_kernel_q7_q15_reordered.c
│ │ │ │ ├── FullyConnectedFunctions/
│ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15.c
│ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_opt.c
│ │ │ │ │ ├── arm_fully_connected_q15.c
│ │ │ │ │ ├── arm_fully_connected_q15_opt.c
│ │ │ │ │ ├── arm_fully_connected_q7.c
│ │ │ │ │ └── arm_fully_connected_q7_opt.c
│ │ │ │ ├── NNSupportFunctions/
│ │ │ │ │ ├── arm_nn_mult_q15.c
│ │ │ │ │ ├── arm_nn_mult_q7.c
│ │ │ │ │ ├── arm_nntables.c
│ │ │ │ │ ├── arm_q7_to_q15_no_shift.c
│ │ │ │ │ └── arm_q7_to_q15_reordered_no_shift.c
│ │ │ │ ├── PoolingFunctions/
│ │ │ │ │ └── arm_pool_q7_HWC.c
│ │ │ │ └── SoftmaxFunctions/
│ │ │ │ ├── arm_softmax_q15.c
│ │ │ │ └── arm_softmax_q7.c
│ │ │ ├── RTOS/
│ │ │ │ └── Template/
│ │ │ │ └── cmsis_os.h
│ │ │ ├── RTOS2/
│ │ │ │ ├── Include/
│ │ │ │ │ ├── cmsis_os2.h
│ │ │ │ │ └── os_tick.h
│ │ │ │ ├── Source/
│ │ │ │ │ ├── os_systick.c
│ │ │ │ │ ├── os_tick_gtim.c
│ │ │ │ │ └── os_tick_ptim.c
│ │ │ │ └── Template/
│ │ │ │ ├── cmsis_os.h
│ │ │ │ └── cmsis_os1.c
│ │ │ └── docs/
│ │ │ └── General/
│ │ │ └── html/
│ │ │ └── LICENSE.txt
│ │ └── STM32H7xx_HAL_Driver/
│ │ ├── Inc/
│ │ │ ├── Legacy/
│ │ │ │ └── stm32_hal_legacy.h
│ │ │ ├── stm32h7xx_hal.h
│ │ │ ├── stm32h7xx_hal_cortex.h
│ │ │ ├── stm32h7xx_hal_def.h
│ │ │ ├── stm32h7xx_hal_dma.h
│ │ │ ├── stm32h7xx_hal_dma_ex.h
│ │ │ ├── stm32h7xx_hal_exti.h
│ │ │ ├── stm32h7xx_hal_flash.h
│ │ │ ├── stm32h7xx_hal_flash_ex.h
│ │ │ ├── stm32h7xx_hal_gpio.h
│ │ │ ├── stm32h7xx_hal_gpio_ex.h
│ │ │ ├── stm32h7xx_hal_hsem.h
│ │ │ ├── stm32h7xx_hal_i2c.h
│ │ │ ├── stm32h7xx_hal_i2c_ex.h
│ │ │ ├── stm32h7xx_hal_mdma.h
│ │ │ ├── stm32h7xx_hal_pwr.h
│ │ │ ├── stm32h7xx_hal_pwr_ex.h
│ │ │ ├── stm32h7xx_hal_rcc.h
│ │ │ ├── stm32h7xx_hal_rcc_ex.h
│ │ │ ├── stm32h7xx_hal_tim.h
│ │ │ ├── stm32h7xx_hal_tim_ex.h
│ │ │ ├── stm32h7xx_hal_uart.h
│ │ │ └── stm32h7xx_hal_uart_ex.h
│ │ ├── LICENSE.txt
│ │ └── Src/
│ │ ├── stm32h7xx_hal.c
│ │ ├── stm32h7xx_hal_cortex.c
│ │ ├── stm32h7xx_hal_dma.c
│ │ ├── stm32h7xx_hal_dma_ex.c
│ │ ├── stm32h7xx_hal_exti.c
│ │ ├── stm32h7xx_hal_flash.c
│ │ ├── stm32h7xx_hal_flash_ex.c
│ │ ├── stm32h7xx_hal_gpio.c
│ │ ├── stm32h7xx_hal_hsem.c
│ │ ├── stm32h7xx_hal_i2c.c
│ │ ├── stm32h7xx_hal_i2c_ex.c
│ │ ├── stm32h7xx_hal_mdma.c
│ │ ├── stm32h7xx_hal_pwr.c
│ │ ├── stm32h7xx_hal_pwr_ex.c
│ │ ├── stm32h7xx_hal_rcc.c
│ │ ├── stm32h7xx_hal_rcc_ex.c
│ │ ├── stm32h7xx_hal_tim.c
│ │ ├── stm32h7xx_hal_tim_ex.c
│ │ ├── stm32h7xx_hal_uart.c
│ │ └── stm32h7xx_hal_uart_ex.c
│ ├── MDK-ARM/
│ │ ├── .vscode/
│ │ │ ├── c_cpp_properties.json
│ │ │ ├── keil-assistant.log
│ │ │ ├── settings.json
│ │ │ └── uv4.log
│ │ ├── DebugConfig/
│ │ │ ├── Hexapod_STM32H750VBTx_1.1.0.dbgconf
│ │ │ └── app_test_STM32H750VBTx_1.1.0.dbgconf
│ │ ├── EventRecorderStub.scvd
│ │ ├── Hexapod.uvguix.97088
│ │ ├── Hexapod.uvoptx
│ │ ├── Hexapod.uvprojx
│ │ ├── JLinkLog.txt
│ │ ├── JLinkSettings.ini
│ │ ├── RTE/
│ │ │ ├── _Hexapod/
│ │ │ │ └── RTE_Components.h
│ │ │ └── _app_test/
│ │ │ └── RTE_Components.h
│ │ ├── USER/
│ │ │ ├── APP/
│ │ │ │ ├── Servo.cpp
│ │ │ │ ├── Servo.h
│ │ │ │ ├── arm.cpp
│ │ │ │ ├── arm.h
│ │ │ │ ├── bsp.h
│ │ │ │ ├── debug_uart.c
│ │ │ │ ├── debug_uart.h
│ │ │ │ ├── dwt_delay_us.c
│ │ │ │ ├── dwt_delay_us.h
│ │ │ │ ├── gait_prg.cpp
│ │ │ │ ├── gait_prg.h
│ │ │ │ ├── leg.cpp
│ │ │ │ ├── leg.h
│ │ │ │ ├── mpu6050.cpp
│ │ │ │ ├── mpu6050.h
│ │ │ │ ├── my_math.cpp
│ │ │ │ ├── my_math.h
│ │ │ │ ├── remote.c
│ │ │ │ └── remote.h
│ │ │ ├── DMP/
│ │ │ │ ├── dmpKey.h
│ │ │ │ ├── dmp_interface.c
│ │ │ │ ├── dmp_interface.h
│ │ │ │ ├── dmpmap.h
│ │ │ │ ├── inv_mpu.c
│ │ │ │ ├── inv_mpu.h
│ │ │ │ ├── inv_mpu_dmp_motion_driver.c
│ │ │ │ └── inv_mpu_dmp_motion_driver.h
│ │ │ └── TASK/
│ │ │ ├── LegControl_task.cpp
│ │ │ ├── LegControl_task.h
│ │ │ ├── MPU_task.cpp
│ │ │ ├── MPU_task.h
│ │ │ ├── led_task.cpp
│ │ │ └── led_task.h
│ │ ├── startup_stm32h750xx.lst
│ │ └── startup_stm32h750xx.s
│ ├── Middlewares/
│ │ ├── ST/
│ │ │ └── ARM/
│ │ │ └── DSP/
│ │ │ └── Inc/
│ │ │ └── arm_math.h
│ │ └── Third_Party/
│ │ └── FreeRTOS/
│ │ └── Source/
│ │ ├── CMSIS_RTOS/
│ │ │ ├── cmsis_os.c
│ │ │ └── cmsis_os.h
│ │ ├── LICENSE
│ │ ├── croutine.c
│ │ ├── event_groups.c
│ │ ├── include/
│ │ │ ├── FreeRTOS.h
│ │ │ ├── StackMacros.h
│ │ │ ├── atomic.h
│ │ │ ├── croutine.h
│ │ │ ├── deprecated_definitions.h
│ │ │ ├── event_groups.h
│ │ │ ├── list.h
│ │ │ ├── message_buffer.h
│ │ │ ├── mpu_prototypes.h
│ │ │ ├── mpu_wrappers.h
│ │ │ ├── portable.h
│ │ │ ├── projdefs.h
│ │ │ ├── queue.h
│ │ │ ├── semphr.h
│ │ │ ├── stack_macros.h
│ │ │ ├── stream_buffer.h
│ │ │ ├── task.h
│ │ │ └── timers.h
│ │ ├── list.c
│ │ ├── portable/
│ │ │ ├── MemMang/
│ │ │ │ └── heap_4.c
│ │ │ └── RVDS/
│ │ │ └── ARM_CM4F/
│ │ │ ├── port.c
│ │ │ └── portmacro.h
│ │ ├── queue.c
│ │ ├── stream_buffer.c
│ │ ├── tasks.c
│ │ └── timers.c
│ ├── hexapod.ioc
│ └── kill.bat
└── readme.txt
================================================
FILE CONTENTS
================================================
================================================
FILE: .gitignore
================================================
SourceCode/MDK-ARM/app_test/
================================================
FILE: SourceCode/.mxproject
================================================
[PreviousLibFiles]
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_hal_legacy.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_exti.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart_ex.h;Middlewares\Third_Party\FreeRTOS\Source\include\croutine.h;Middlewares\Third_Party\FreeRTOS\Source\include\deprecated_definitions.h;Middlewares\Third_Party\FreeRTOS\Source\include\event_groups.h;Middlewares\Third_Party\FreeRTOS\Source\include\FreeRTOS.h;Middlewares\Third_Party\FreeRTOS\Source\include\list.h;Middlewares\Third_Party\FreeRTOS\Source\include\message_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_prototypes.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_wrappers.h;Middlewares\Third_Party\FreeRTOS\Source\include\portable.h;Middlewares\Third_Party\FreeRTOS\Source\include\projdefs.h;Middlewares\Third_Party\FreeRTOS\Source\include\queue.h;Middlewares\Third_Party\FreeRTOS\Source\include\semphr.h;Middlewares\Third_Party\FreeRTOS\Source\include\stack_macros.h;Middlewares\Third_Party\FreeRTOS\Source\include\StackMacros.h;Middlewares\Third_Party\FreeRTOS\Source\include\stream_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\task.h;Middlewares\Third_Party\FreeRTOS\Source\include\timers.h;Middlewares\Third_Party\FreeRTOS\Source\include\atomic.h;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.h;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\portmacro.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h750xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\system_stm32h7xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
[PreviousUsedKeilFiles]
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HeaderPath=..\Drivers\STM32H7xx_HAL_Driver\Inc;..\Drivers\STM32H7xx_HAL_Driver\Inc\Legacy;..\Middlewares\Third_Party\FreeRTOS\Source\include;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F;..\Drivers\CMSIS\Device\ST\STM32H7xx\Include;..\Drivers\CMSIS\Include;..\Middlewares\ST\ARM\DSP\Inc;..\Core\Inc;
CDefines=USE_HAL_DRIVER;STM32H750xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
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SourceFiles#2=E:/Hexapod/Hexapod/SourceCode/Core/Src/dma.c
SourceFiles#3=E:/Hexapod/Hexapod/SourceCode/Core/Src/i2c.c
SourceFiles#4=E:/Hexapod/Hexapod/SourceCode/Core/Src/usart.c
SourceFiles#5=E:/Hexapod/Hexapod/SourceCode/Core/Src/stm32h7xx_it.c
SourceFiles#6=E:/Hexapod/Hexapod/SourceCode/Core/Src/stm32h7xx_hal_msp.c
SourceFiles#7=E:/Hexapod/Hexapod/SourceCode/Core/Src/stm32h7xx_hal_timebase_tim.c
SourceFiles#8=E:/Hexapod/Hexapod/SourceCode/Core/Src/main.c
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header=..\Middlewares\ST\ARM\DSP\Inc\arm_math.h;
================================================
FILE: SourceCode/Core/Inc/FreeRTOSConfig.h
================================================
/* USER CODE BEGIN Header */
/*
* FreeRTOS Kernel V10.3.1
* Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/* USER CODE END Header */
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* These parameters and more are described within the 'configuration' section of the
* FreeRTOS API documentation available on the FreeRTOS.org web site.
*
* See http://www.freertos.org/a00110.html
*----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* Section where include file can be added */
/* USER CODE END Includes */
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
extern uint32_t SystemCoreClock;
#endif
#define configENABLE_FPU 1
#define configENABLE_MPU 0
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)15360)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
/* Defaults to size_t for backward compatibility, but can be changed
if lengths will always be less than the number of bytes in a size_t. */
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
/* USER CODE BEGIN 1 */
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
/* USER CODE END 1 */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
#define xPortSysTickHandler SysTick_Handler
/* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
/* USER CODE END Defines */
#endif /* FREERTOS_CONFIG_H */
================================================
FILE: SourceCode/Core/Inc/dma.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.h
* @brief This file contains all the function prototypes for
* the dma.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DMA_H__
#define __DMA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* DMA memory to memory transfer handles -------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_DMA_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __DMA_H__ */
================================================
FILE: SourceCode/Core/Inc/gpio.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.h
* @brief This file contains all the function prototypes for
* the gpio.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __GPIO_H__
#define __GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_GPIO_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__ GPIO_H__ */
================================================
FILE: SourceCode/Core/Inc/i2c.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.h
* @brief This file contains all the function prototypes for
* the i2c.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __I2C_H__
#define __I2C_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern I2C_HandleTypeDef hi2c4;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_I2C4_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __I2C_H__ */
================================================
FILE: SourceCode/Core/Inc/main.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define LED_Pin GPIO_PIN_3
#define LED_GPIO_Port GPIOE
#define ARM_TXE_Pin GPIO_PIN_1
#define ARM_TXE_GPIO_Port GPIOA
#define ARM_RXE_Pin GPIO_PIN_0
#define ARM_RXE_GPIO_Port GPIOA
#define LEG3_TXE_Pin GPIO_PIN_14
#define LEG3_TXE_GPIO_Port GPIOE
#define LEG3_RXE_Pin GPIO_PIN_15
#define LEG3_RXE_GPIO_Port GPIOE
#define LEG1_TXE_Pin GPIO_PIN_12
#define LEG1_TXE_GPIO_Port GPIOB
#define LEG1_RXE_Pin GPIO_PIN_13
#define LEG1_RXE_GPIO_Port GPIOB
#define LEG6_TXE_Pin GPIO_PIN_8
#define LEG6_TXE_GPIO_Port GPIOC
#define LEG6_RXE_Pin GPIO_PIN_9
#define LEG6_RXE_GPIO_Port GPIOC
#define LEG4_RXE_Pin GPIO_PIN_9
#define LEG4_RXE_GPIO_Port GPIOA
#define LEG4_TXE_Pin GPIO_PIN_10
#define LEG4_TXE_GPIO_Port GPIOA
#define LEG5_TXE_Pin GPIO_PIN_0
#define LEG5_TXE_GPIO_Port GPIOD
#define LEG5_RXE_Pin GPIO_PIN_1
#define LEG5_RXE_GPIO_Port GPIOD
#define LEG2_TXE_Pin GPIO_PIN_3
#define LEG2_TXE_GPIO_Port GPIOD
#define LEG2_RXE_Pin GPIO_PIN_4
#define LEG2_RXE_GPIO_Port GPIOD
#define MPU6050_SDA_Pin GPIO_PIN_7
#define MPU6050_SDA_GPIO_Port GPIOB
#define MPU6050_SCL_Pin GPIO_PIN_8
#define MPU6050_SCL_GPIO_Port GPIOB
#define MPU6050_INT_Pin GPIO_PIN_9
#define MPU6050_INT_GPIO_Port GPIOB
#define MPU6050_INT_EXTI_IRQn EXTI9_5_IRQn
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
================================================
FILE: SourceCode/Core/Inc/stm32h7xx_hal_conf.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32h7xx_hal_conf.h
* @author MCD Application Team
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_CONF_H
#define STM32H7xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_FDCAN_MODULE_ENABLED */
/* #define HAL_FMAC_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_COMP_MODULE_ENABLED */
/* #define HAL_CORDIC_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_OTFDEC_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_HRTIM_MODULE_ENABLED */
/* #define HAL_HSEM_MODULE_ENABLED */
/* #define HAL_GFXMMU_MODULE_ENABLED */
/* #define HAL_JPEG_MODULE_ENABLED */
/* #define HAL_OPAMP_MODULE_ENABLED */
/* #define HAL_OSPI_MODULE_ENABLED */
/* #define HAL_OSPI_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_RAMECC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_SWPMI_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_JPEG_MODULE_ENABLED */
/* #define HAL_MDIOS_MODULE_ENABLED */
/* #define HAL_PSSI_MODULE_ENABLED */
/* #define HAL_DTS_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_MDMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_HSEM_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal oscillator (CSI) default value.
* This value is the default CSI value after Reset.
*/
#if !defined (CSI_VALUE)
#define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* CSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
#if !defined (LSI_VALUE)
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */
#define USE_RTOS 0
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */
#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
/* ########################### Ethernet Configuration ######################### */
#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
#define ETH_MAC_ADDR0 (0x02UL)
#define ETH_MAC_ADDR1 (0x00UL)
#define ETH_MAC_ADDR2 (0x00UL)
#define ETH_MAC_ADDR3 (0x00UL)
#define ETH_MAC_ADDR4 (0x00UL)
#define ETH_MAC_ADDR5 (0x00UL)
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32h7xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32h7xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32h7xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_MDMA_MODULE_ENABLED
#include "stm32h7xx_hal_mdma.h"
#endif /* HAL_MDMA_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32h7xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32h7xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32h7xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32h7xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32h7xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_DTS_MODULE_ENABLED
#include "stm32h7xx_hal_dts.h"
#endif /* HAL_DTS_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32h7xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32h7xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32h7xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32h7xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_FDCAN_MODULE_ENABLED
#include "stm32h7xx_hal_fdcan.h"
#endif /* HAL_FDCAN_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32h7xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32h7xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CORDIC_MODULE_ENABLED
#include "stm32h7xx_hal_cordic.h"
#endif /* HAL_CORDIC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32h7xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32h7xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32h7xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32h7xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_GFXMMU_MODULE_ENABLED
#include "stm32h7xx_hal_gfxmmu.h"
#endif /* HAL_GFXMMU_MODULE_ENABLED */
#ifdef HAL_FMAC_MODULE_ENABLED
#include "stm32h7xx_hal_fmac.h"
#endif /* HAL_FMAC_MODULE_ENABLED */
#ifdef HAL_HRTIM_MODULE_ENABLED
#include "stm32h7xx_hal_hrtim.h"
#endif /* HAL_HRTIM_MODULE_ENABLED */
#ifdef HAL_HSEM_MODULE_ENABLED
#include "stm32h7xx_hal_hsem.h"
#endif /* HAL_HSEM_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32h7xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32h7xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32h7xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32h7xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32h7xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32h7xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_JPEG_MODULE_ENABLED
#include "stm32h7xx_hal_jpeg.h"
#endif /* HAL_JPEG_MODULE_ENABLED */
#ifdef HAL_MDIOS_MODULE_ENABLED
#include "stm32h7xx_hal_mdios.h"
#endif /* HAL_MDIOS_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32h7xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32h7xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32h7xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32h7xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_OSPI_MODULE_ENABLED
#include "stm32h7xx_hal_ospi.h"
#endif /* HAL_OSPI_MODULE_ENABLED */
#ifdef HAL_OTFDEC_MODULE_ENABLED
#include "stm32h7xx_hal_otfdec.h"
#endif /* HAL_OTFDEC_MODULE_ENABLED */
#ifdef HAL_PSSI_MODULE_ENABLED
#include "stm32h7xx_hal_pssi.h"
#endif /* HAL_PSSI_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32h7xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32h7xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_RAMECC_MODULE_ENABLED
#include "stm32h7xx_hal_ramecc.h"
#endif /* HAL_RAMECC_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32h7xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32h7xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32h7xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32h7xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32h7xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32h7xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32h7xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_SWPMI_MODULE_ENABLED
#include "stm32h7xx_hal_swpmi.h"
#endif /* HAL_SWPMI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32h7xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32h7xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32h7xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32h7xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32h7xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32h7xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32h7xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32h7xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32h7xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_HAL_CONF_H */
================================================
FILE: SourceCode/Core/Inc/stm32h7xx_it.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32h7xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32H7xx_IT_H
#define __STM32H7xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void DebugMon_Handler(void);
void DMA1_Stream0_IRQHandler(void);
void DMA1_Stream1_IRQHandler(void);
void DMA1_Stream2_IRQHandler(void);
void DMA1_Stream3_IRQHandler(void);
void EXTI9_5_IRQHandler(void);
void TIM1_UP_IRQHandler(void);
void USART1_IRQHandler(void);
void USART2_IRQHandler(void);
void USART3_IRQHandler(void);
void UART4_IRQHandler(void);
void UART5_IRQHandler(void);
void DMA2_Stream0_IRQHandler(void);
void DMA2_Stream1_IRQHandler(void);
void DMA2_Stream2_IRQHandler(void);
void USART6_IRQHandler(void);
void UART7_IRQHandler(void);
void UART8_IRQHandler(void);
void I2C4_EV_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32H7xx_IT_H */
================================================
FILE: SourceCode/Core/Inc/usart.h
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.h
* @brief This file contains all the function prototypes for
* the usart.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USART_H__
#define __USART_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern UART_HandleTypeDef huart4;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart7;
extern UART_HandleTypeDef huart8;
extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
extern UART_HandleTypeDef huart6;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_UART4_Init(void);
void MX_UART5_Init(void);
void MX_UART7_Init(void);
void MX_UART8_Init(void);
void MX_USART1_UART_Init(void);
void MX_USART2_UART_Init(void);
void MX_USART3_UART_Init(void);
void MX_USART6_UART_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __USART_H__ */
================================================
FILE: SourceCode/Core/Src/dma.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* DMA1_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
/* DMA1_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
/* DMA1_Stream3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
/* DMA2_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
/* DMA2_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
================================================
FILE: SourceCode/Core/Src/freertos.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : freertos.c
* Description : Code for freertos applications
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "FreeRTOS.h"
#include "task.h"
#include "main.h"
#include "cmsis_os.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN Variables */
/* USER CODE END Variables */
osThreadId defaultTaskHandle;
osThreadId LED_taskHandle;
osThreadId LegControl_taskHandle;
osThreadId MPU_taskHandle;
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */
/* USER CODE END FunctionPrototypes */
void StartDefaultTask(void const * argument);
extern void LED_Task(void const * argument);
extern void LegControl_Task(void const * argument);
extern void MPU_Task(void const * argument);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
{
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
*ppxIdleTaskStackBuffer = &xIdleStack[0];
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
/* place for user code */
}
/* USER CODE END GET_IDLE_TASK_MEMORY */
/**
* @brief FreeRTOS initialization
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */
/* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* USER CODE BEGIN RTOS_TIMERS */
/* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */
/* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* definition and creation of defaultTask */
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
/* definition and creation of LED_task */
osThreadDef(LED_task, LED_Task, osPriorityIdle, 0, 128);
LED_taskHandle = osThreadCreate(osThread(LED_task), NULL);
/* definition and creation of LegControl_task */
osThreadDef(LegControl_task, LegControl_Task, osPriorityRealtime, 0, 1024);
LegControl_taskHandle = osThreadCreate(osThread(LegControl_task), NULL);
/* definition and creation of MPU_task */
osThreadDef(MPU_task, MPU_Task, osPriorityRealtime, 0, 512);
MPU_taskHandle = osThreadCreate(osThread(MPU_task), NULL);
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
}
/* USER CODE BEGIN Header_StartDefaultTask */
/**
* @brief Function implementing the defaultTask thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void const * argument)
{
/* USER CODE BEGIN StartDefaultTask */
/* Infinite loop */
for(;;)
{
osDelay(1);
}
/* USER CODE END StartDefaultTask */
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */
/* USER CODE END Application */
================================================
FILE: SourceCode/Core/Src/gpio.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
* @brief This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins
PH0-OSC_IN (PH0) ------> RCC_OSC_IN
PH1-OSC_OUT (PH1) ------> RCC_OSC_OUT
PA13 (JTMS/SWDIO) ------> DEBUG_JTMS-SWDIO
PA14 (JTCK/SWCLK) ------> DEBUG_JTCK-SWCLK
PA15 (JTDI) ------> DEBUG_JTDI
PB3 (JTDO/TRACESWO) ------> DEBUG_JTDO-SWO
*/
void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, LED_Pin|LEG3_TXE_Pin|LEG3_RXE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, ARM_TXE_Pin|ARM_RXE_Pin|LEG4_RXE_Pin|LEG4_TXE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, LEG1_TXE_Pin|LEG1_RXE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, LEG6_TXE_Pin|LEG6_RXE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, LEG5_TXE_Pin|LEG5_RXE_Pin|LEG2_TXE_Pin|LEG2_RXE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : PEPin PEPin PEPin */
GPIO_InitStruct.Pin = LED_Pin|LEG3_TXE_Pin|LEG3_RXE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pins : PAPin PAPin PAPin PAPin */
GPIO_InitStruct.Pin = ARM_TXE_Pin|ARM_RXE_Pin|LEG4_RXE_Pin|LEG4_TXE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : PBPin PBPin */
GPIO_InitStruct.Pin = LEG1_TXE_Pin|LEG1_RXE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : PCPin PCPin */
GPIO_InitStruct.Pin = LEG6_TXE_Pin|LEG6_RXE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pins : PDPin PDPin PDPin PDPin */
GPIO_InitStruct.Pin = LEG5_TXE_Pin|LEG5_RXE_Pin|LEG2_TXE_Pin|LEG2_RXE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = MPU6050_INT_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(MPU6050_INT_GPIO_Port, &GPIO_InitStruct);
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
================================================
FILE: SourceCode/Core/Src/i2c.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.c
* @brief This file provides code for the configuration
* of the I2C instances.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
I2C_HandleTypeDef hi2c4;
/* I2C4 init function */
void MX_I2C4_Init(void)
{
/* USER CODE BEGIN I2C4_Init 0 */
/* USER CODE END I2C4_Init 0 */
/* USER CODE BEGIN I2C4_Init 1 */
/* USER CODE END I2C4_Init 1 */
hi2c4.Instance = I2C4;
hi2c4.Init.Timing = 0x00501E6C;
hi2c4.Init.OwnAddress1 = 0;
hi2c4.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c4.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c4.Init.OwnAddress2 = 0;
hi2c4.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hi2c4.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c4.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c4) != HAL_OK)
{
Error_Handler();
}
/** Configure Analogue filter
*/
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c4, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
{
Error_Handler();
}
/** Configure Digital filter
*/
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c4, 0) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C4_Init 2 */
/* USER CODE END I2C4_Init 2 */
}
void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(i2cHandle->Instance==I2C4)
{
/* USER CODE BEGIN I2C4_MspInit 0 */
/* USER CODE END I2C4_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2C4;
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
__HAL_RCC_GPIOB_CLK_ENABLE();
/**I2C4 GPIO Configuration
PB7 ------> I2C4_SDA
PB8 ------> I2C4_SCL
*/
GPIO_InitStruct.Pin = MPU6050_SDA_Pin|MPU6050_SCL_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF6_I2C4;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* I2C4 clock enable */
__HAL_RCC_I2C4_CLK_ENABLE();
/* I2C4 interrupt Init */
HAL_NVIC_SetPriority(I2C4_EV_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(I2C4_EV_IRQn);
/* USER CODE BEGIN I2C4_MspInit 1 */
/* USER CODE END I2C4_MspInit 1 */
}
}
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
{
if(i2cHandle->Instance==I2C4)
{
/* USER CODE BEGIN I2C4_MspDeInit 0 */
/* USER CODE END I2C4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C4_CLK_DISABLE();
/**I2C4 GPIO Configuration
PB7 ------> I2C4_SDA
PB8 ------> I2C4_SCL
*/
HAL_GPIO_DeInit(MPU6050_SDA_GPIO_Port, MPU6050_SDA_Pin);
HAL_GPIO_DeInit(MPU6050_SCL_GPIO_Port, MPU6050_SCL_Pin);
/* I2C4 interrupt Deinit */
HAL_NVIC_DisableIRQ(I2C4_EV_IRQn);
/* USER CODE BEGIN I2C4_MspDeInit 1 */
/* USER CODE END I2C4_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
================================================
FILE: SourceCode/Core/Src/main.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "cmsis_os.h"
#include "dma.h"
#include "i2c.h"
#include "usart.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "debug_uart.h"
#include "remote.h"
#include "dwt_delay_us.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MPU_Config(void);
void MX_FREERTOS_Init(void);
/* USER CODE BEGIN PFP */
/**
* @brief ʹSTM32H7L1-Cache, ͬʱD cacheǿд
* @param
* @retval
*/
void sys_cache_enable(void)
{
//SCB_EnableICache(); /* ʹI-Cache,core_cm7.h涨 */
SCB_EnableDCache(); /* ʹD-Cache,core_cm7.h涨 */
SCB->CACR |= 1 << 2;/* ǿD-Cacheд,粻д,ʵʹп */
}
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
SCB->VTOR = 0x90000000; /* жַ */
sys_cache_enable();
//MPU_Config(); //ȥעͻᵼ½쳣
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* Configure the system clock */
SystemClock_Config();
MX_DMA_Init();
MX_GPIO_Init();
/************Ӳʼ***************/
Debug_UART_Init();
Remote_Init();
DWT_Delay_Init();
/************FreeRTOS***************/
MX_FREERTOS_Init(); //ʼ
osKernelStart(); //ʼ
//ʼȺﲻᱻִ
while (1)
{
HAL_GPIO_TogglePin(LED_GPIO_Port,LED_Pin);
//APP_PRINT("HelloWorld\r\n");
HAL_Delay(1);
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Supply configuration update enable
*/
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 60;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/* MPU Configuration */
void MPU_Config(void)
{
MPU_Region_InitTypeDef MPU_InitStruct = {0};
/* Disables the MPU */
HAL_MPU_Disable();
/** Initializes and configures the Region and the memory to be protected
*/
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.BaseAddress = 0x0;
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
MPU_InitStruct.SubRegionDisable = 0x87;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);
/* Enables the MPU */
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}
/**
* @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM1 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param htim : TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
if (htim->Instance == TIM1) {
HAL_IncTick();
}
/* USER CODE BEGIN Callback 1 */
/* USER CODE END Callback 1 */
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
================================================
FILE: SourceCode/Core/Src/stm32h7xx_hal_msp.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32h7xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* System interrupt init*/
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
================================================
FILE: SourceCode/Core/Src/stm32h7xx_hal_timebase_tim.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32h7xx_hal_timebase_TIM.c
* @brief HAL time base based on the hardware TIM.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
#include "stm32h7xx_hal_tim.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
TIM_HandleTypeDef htim1;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @brief This function configures the TIM1 as a time base source.
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority: Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
RCC_ClkInitTypeDef clkconfig;
uint32_t uwTimclock;
uint32_t uwPrescalerValue;
uint32_t pFLatency;
/*Configure the TIM1 IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(TIM1_UP_IRQn, TickPriority ,0U);
/* Enable the TIM1 global Interrupt */
HAL_NVIC_EnableIRQ(TIM1_UP_IRQn);
uwTickPrio = TickPriority;
}
else
{
return HAL_ERROR;
}
/* Enable TIM1 clock */
__HAL_RCC_TIM1_CLK_ENABLE();
/* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
/* Compute TIM1 clock */
uwTimclock = 2*HAL_RCC_GetPCLK2Freq();
/* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
/* Initialize TIM1 */
htim1.Instance = TIM1;
/* Initialize TIMx peripheral as follow:
+ Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ ClockDivision = 0
+ Counter direction = Up
*/
htim1.Init.Period = (1000000U / 1000U) - 1U;
htim1.Init.Prescaler = uwPrescalerValue;
htim1.Init.ClockDivision = 0;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
if(HAL_TIM_Base_Init(&htim1) == HAL_OK)
{
/* Start the TIM time Base generation in interrupt mode */
return HAL_TIM_Base_Start_IT(&htim1);
}
/* Return function status */
return HAL_ERROR;
}
/**
* @brief Suspend Tick increment.
* @note Disable the tick increment by disabling TIM1 update interrupt.
* @param None
* @retval None
*/
void HAL_SuspendTick(void)
{
/* Disable TIM1 update Interrupt */
__HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
}
/**
* @brief Resume Tick increment.
* @note Enable the tick increment by Enabling TIM1 update interrupt.
* @param None
* @retval None
*/
void HAL_ResumeTick(void)
{
/* Enable TIM1 Update interrupt */
__HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
}
================================================
FILE: SourceCode/Core/Src/stm32h7xx_it.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32h7xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32h7xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "debug_uart.h"
#include "remote.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern I2C_HandleTypeDef hi2c4;
extern DMA_HandleTypeDef hdma_uart4_tx;
extern DMA_HandleTypeDef hdma_uart5_tx;
extern DMA_HandleTypeDef hdma_uart8_tx;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern DMA_HandleTypeDef hdma_usart2_tx;
extern DMA_HandleTypeDef hdma_usart3_tx;
extern DMA_HandleTypeDef hdma_usart6_tx;
extern UART_HandleTypeDef huart4;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart7;
extern UART_HandleTypeDef huart8;
extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
extern UART_HandleTypeDef huart6;
extern TIM_HandleTypeDef htim1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
__set_FAULTMASK(1);
NVIC_SystemReset();
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
__set_FAULTMASK(1);
NVIC_SystemReset();
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/******************************************************************************/
/* STM32H7xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32h7xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 stream0 global interrupt.
*/
void DMA1_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
/* USER CODE END DMA1_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart3_tx);
/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
/* USER CODE END DMA1_Stream0_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream1 global interrupt.
*/
void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
/* USER CODE END DMA1_Stream1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart8_tx);
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
/* USER CODE END DMA1_Stream1_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream2 global interrupt.
*/
void DMA1_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
/* USER CODE END DMA1_Stream2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_tx);
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
/* USER CODE END DMA1_Stream2_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream3 global interrupt.
*/
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
/* USER CODE END DMA1_Stream3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart2_tx);
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */
}
/**
* @brief This function handles EXTI line[9:5] interrupts.
*/
void EXTI9_5_IRQHandler(void)
{
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
/* USER CODE END EXTI9_5_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(MPU6050_INT_Pin);
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
/* USER CODE END EXTI9_5_IRQn 1 */
}
/**
* @brief This function handles TIM1 update interrupt.
*/
void TIM1_UP_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_UP_IRQn 0 */
/* USER CODE END TIM1_UP_IRQn 0 */
HAL_TIM_IRQHandler(&htim1);
/* USER CODE BEGIN TIM1_UP_IRQn 1 */
/* USER CODE END TIM1_UP_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
/* USER CODE BEGIN USART3_IRQn 1 */
/* USER CODE END USART3_IRQn 1 */
}
/**
* @brief This function handles UART4 global interrupt.
*/
void UART4_IRQHandler(void)
{
/* USER CODE BEGIN UART4_IRQn 0 */
/* USER CODE END UART4_IRQn 0 */
HAL_UART_IRQHandler(&huart4);
/* USER CODE BEGIN UART4_IRQn 1 */
/* USER CODE END UART4_IRQn 1 */
}
/**
* @brief This function handles UART5 global interrupt.
*/
void UART5_IRQHandler(void)
{
/* USER CODE BEGIN UART5_IRQn 0 */
/* USER CODE END UART5_IRQn 0 */
HAL_UART_IRQHandler(&huart5);
/* USER CODE BEGIN UART5_IRQn 1 */
/* USER CODE END UART5_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream0 global interrupt.
*/
void DMA2_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
/* USER CODE END DMA2_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart4_tx);
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
/* USER CODE END DMA2_Stream0_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream1 global interrupt.
*/
void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
/* USER CODE END DMA2_Stream1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart5_tx);
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
/* USER CODE END DMA2_Stream1_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream2 global interrupt.
*/
void DMA2_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
/* USER CODE END DMA2_Stream2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart6_tx);
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
/* USER CODE END DMA2_Stream2_IRQn 1 */
}
/**
* @brief This function handles USART6 global interrupt.
*/
void USART6_IRQHandler(void)
{
/* USER CODE BEGIN USART6_IRQn 0 */
/* USER CODE END USART6_IRQn 0 */
HAL_UART_IRQHandler(&huart6);
/* USER CODE BEGIN USART6_IRQn 1 */
/* USER CODE END USART6_IRQn 1 */
}
/**
* @brief This function handles UART7 global interrupt.
*/
void UART7_IRQHandler(void)
{
/* USER CODE BEGIN UART7_IRQn 0 */
/* USER CODE END UART7_IRQn 0 */
HAL_UART_IRQHandler(&huart7);
/* USER CODE BEGIN UART7_IRQn 1 */
/* USER CODE END UART7_IRQn 1 */
}
/**
* @brief This function handles UART8 global interrupt.
*/
void UART8_IRQHandler(void)
{
/* USER CODE BEGIN UART8_IRQn 0 */
/* USER CODE END UART8_IRQn 0 */
HAL_UART_IRQHandler(&huart8);
/* USER CODE BEGIN UART8_IRQn 1 */
/* USER CODE END UART8_IRQn 1 */
}
/**
* @brief This function handles I2C4 event interrupt.
*/
void I2C4_EV_IRQHandler(void)
{
/* USER CODE BEGIN I2C4_EV_IRQn 0 */
/* USER CODE END I2C4_EV_IRQn 0 */
HAL_I2C_EV_IRQHandler(&hi2c4);
/* USER CODE BEGIN I2C4_EV_IRQn 1 */
/* USER CODE END I2C4_EV_IRQn 1 */
}
/* USER CODE BEGIN 1 */
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
if(huart->Instance==DEBUG_UART)
{
Debug_UART_Callback(huart);
}
if(huart->Instance==REMOTE_UART)
{
Remote_UART_Callback(huart);
}
}
/* USER CODE END 1 */
================================================
FILE: SourceCode/Core/Src/system_stm32h7xx.c
================================================
/**
******************************************************************************
* @file system_stm32h7xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32h7xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock, it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32h7xx_system
* @{
*/
/** @addtogroup STM32H7xx_System_Private_Includes
* @{
*/
#include "stm32h7xx.h"
#include <math.h>
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (CSI_VALUE)
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* CSI_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */
/* #define DATA_IN_D2_SRAM */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
#if defined(DUAL_CORE) && defined(CORE_CM4)
/*!< Uncomment the following line if you need to relocate your vector Table
in D2 AXI SRAM else user remap will be done in FLASH BANK2. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x300. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x300. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x300. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x300. */
#endif /* VECT_TAB_SRAM */
#else
/*!< Uncomment the following line if you need to relocate your vector Table
in D1 AXI SRAM else user remap will be done in FLASH BANK1. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x300. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x300. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x300. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x300. */
#endif /* VECT_TAB_SRAM */
#endif /* DUAL_CORE && CORE_CM4 */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 64000000;
uint32_t SystemD2Clock = 64000000;
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32H7xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the FPU setting and vector table location
* configuration.
* @param None
* @retval None
*/
void SystemInit (void)
{
#if defined (DATA_IN_D2_SRAM)
__IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
#endif
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Increasing the CPU frequency */
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
}
/* Set HSION bit */
RCC->CR |= RCC_CR_HSION;
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
RCC->CR &= 0xEAF6ED7FU;
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
}
#if defined(D3_SRAM_BASE)
/* Reset D1CFGR register */
RCC->D1CFGR = 0x00000000;
/* Reset D2CFGR register */
RCC->D2CFGR = 0x00000000;
/* Reset D3CFGR register */
RCC->D3CFGR = 0x00000000;
#else
/* Reset CDCFGR1 register */
RCC->CDCFGR1 = 0x00000000;
/* Reset CDCFGR2 register */
RCC->CDCFGR2 = 0x00000000;
/* Reset SRDCFGR register */
RCC->SRDCFGR = 0x00000000;
#endif
/* Reset PLLCKSELR register */
RCC->PLLCKSELR = 0x02020200;
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x01FF0000;
/* Reset PLL1DIVR register */
RCC->PLL1DIVR = 0x01010280;
/* Reset PLL1FRACR register */
RCC->PLL1FRACR = 0x00000000;
/* Reset PLL2DIVR register */
RCC->PLL2DIVR = 0x01010280;
/* Reset PLL2FRACR register */
RCC->PLL2FRACR = 0x00000000;
/* Reset PLL3DIVR register */
RCC->PLL3DIVR = 0x01010280;
/* Reset PLL3FRACR register */
RCC->PLL3FRACR = 0x00000000;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Disable all interrupts */
RCC->CIER = 0x00000000;
#if (STM32H7_DEV_ID == 0x450UL)
/* dual core CM7 or single core line */
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
{
/* if stm32h7 revY*/
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
*((__IO uint32_t*)0x51008108) = 0x000000001U;
}
#endif /* STM32H7_DEV_ID */
#if defined(DATA_IN_D2_SRAM)
/* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */
#if defined(RCC_AHB2ENR_D2SRAM3EN)
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
#elif defined(RCC_AHB2ENR_D2SRAM2EN)
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
#else
RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
#endif /* RCC_AHB2ENR_D2SRAM3EN */
tmpreg = RCC->AHB2ENR;
(void) tmpreg;
#endif /* DATA_IN_D2_SRAM */
#if defined(DUAL_CORE) && defined(CORE_CM4)
/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */
#else
/*
* Disable the FMC bank1 (enabled after reset).
* This, prevents CPU speculation access on this bank which blocks the use of FMC during
* 24us. During this time the others FMC master (such as LTDC) cannot use it!
*/
FMC_Bank1_R->BTCR[0] = 0x000030D2;
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */
#endif /*DUAL_CORE && CORE_CM4*/
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock , it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
* - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
* HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
*
* (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
* 4 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
* (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
* 64 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
uint32_t common_system_clock;
float_t fracn1, pllvco;
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
break;
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
common_system_clock = CSI_VALUE;
break;
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
common_system_clock = HSE_VALUE;
break;
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
if (pllm != 0U)
{
switch (pllsource)
{
case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
break;
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
break;
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
break;
default:
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
break;
}
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp);
}
else
{
common_system_clock = 0U;
}
break;
default:
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
break;
}
/* Compute SystemClock frequency --------------------------------------------------*/
#if defined (RCC_D1CFGR_D1CPRE)
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos];
/* common_system_clock frequency : CM7 CPU frequency */
common_system_clock >>= tmp;
/* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
#else
tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos];
/* common_system_clock frequency : CM7 CPU frequency */
common_system_clock >>= tmp;
/* SystemD2Clock frequency : AXI and AHBs Clock frequency */
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
#endif
#if defined(DUAL_CORE) && defined(CORE_CM4)
SystemCoreClock = SystemD2Clock;
#else
SystemCoreClock = common_system_clock;
#endif /* DUAL_CORE && CORE_CM4 */
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
================================================
FILE: SourceCode/Core/Src/usart.c
================================================
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.c
* @brief This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
UART_HandleTypeDef huart4;
UART_HandleTypeDef huart5;
UART_HandleTypeDef huart7;
UART_HandleTypeDef huart8;
UART_HandleTypeDef huart1;
UART_HandleTypeDef huart2;
UART_HandleTypeDef huart3;
UART_HandleTypeDef huart6;
DMA_HandleTypeDef hdma_uart4_tx;
DMA_HandleTypeDef hdma_uart5_tx;
DMA_HandleTypeDef hdma_uart8_tx;
DMA_HandleTypeDef hdma_usart1_tx;
DMA_HandleTypeDef hdma_usart2_tx;
DMA_HandleTypeDef hdma_usart3_tx;
DMA_HandleTypeDef hdma_usart6_tx;
/* UART4 init function */
void MX_UART4_Init(void)
{
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4;
huart4.Init.BaudRate = 115200;
huart4.Init.WordLength = UART_WORDLENGTH_8B;
huart4.Init.StopBits = UART_STOPBITS_1;
huart4.Init.Parity = UART_PARITY_NONE;
huart4.Init.Mode = UART_MODE_TX_RX;
huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart4.Init.OverSampling = UART_OVERSAMPLING_16;
huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart4) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
}
/* UART5 init function */
void MX_UART5_Init(void)
{
/* USER CODE BEGIN UART5_Init 0 */
/* USER CODE END UART5_Init 0 */
/* USER CODE BEGIN UART5_Init 1 */
/* USER CODE END UART5_Init 1 */
huart5.Instance = UART5;
huart5.Init.BaudRate = 115200;
huart5.Init.WordLength = UART_WORDLENGTH_8B;
huart5.Init.StopBits = UART_STOPBITS_1;
huart5.Init.Parity = UART_PARITY_NONE;
huart5.Init.Mode = UART_MODE_TX_RX;
huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart5.Init.OverSampling = UART_OVERSAMPLING_16;
huart5.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart5.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart5.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart5) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart5, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart5, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart5) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART5_Init 2 */
/* USER CODE END UART5_Init 2 */
}
/* UART7 init function */
void MX_UART7_Init(void)
{
/* USER CODE BEGIN UART7_Init 0 */
/* USER CODE END UART7_Init 0 */
/* USER CODE BEGIN UART7_Init 1 */
/* USER CODE END UART7_Init 1 */
huart7.Instance = UART7;
huart7.Init.BaudRate = 100000;
huart7.Init.WordLength = UART_WORDLENGTH_8B;
huart7.Init.StopBits = UART_STOPBITS_1;
huart7.Init.Parity = UART_PARITY_EVEN;
huart7.Init.Mode = UART_MODE_RX;
huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart7.Init.OverSampling = UART_OVERSAMPLING_16;
huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXINVERT_INIT;
huart7.AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE;
if (HAL_UART_Init(&huart7) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART7_Init 2 */
/* USER CODE END UART7_Init 2 */
}
/* UART8 init function */
void MX_UART8_Init(void)
{
/* USER CODE BEGIN UART8_Init 0 */
/* USER CODE END UART8_Init 0 */
/* USER CODE BEGIN UART8_Init 1 */
/* USER CODE END UART8_Init 1 */
huart8.Instance = UART8;
huart8.Init.BaudRate = 115200;
huart8.Init.WordLength = UART_WORDLENGTH_8B;
huart8.Init.StopBits = UART_STOPBITS_1;
huart8.Init.Parity = UART_PARITY_NONE;
huart8.Init.Mode = UART_MODE_TX_RX;
huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart8.Init.OverSampling = UART_OVERSAMPLING_16;
huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT;
huart8.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE;
if (HAL_UART_Init(&huart8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART8_Init 2 */
/* USER CODE END UART8_Init 2 */
}
/* USART1 init function */
void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/* USART2 init function */
void MX_USART2_UART_Init(void)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
/* USART3 init function */
void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
huart3.Init.Mode = UART_MODE_TX_RX;
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT;
huart3.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE;
if (HAL_UART_Init(&huart3) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
/* USART6 init function */
void MX_USART6_UART_Init(void)
{
/* USER CODE BEGIN USART6_Init 0 */
/* USER CODE END USART6_Init 0 */
/* USER CODE BEGIN USART6_Init 1 */
/* USER CODE END USART6_Init 1 */
huart6.Instance = USART6;
huart6.Init.BaudRate = 115200;
huart6.Init.WordLength = UART_WORDLENGTH_8B;
huart6.Init.StopBits = UART_STOPBITS_1;
huart6.Init.Parity = UART_PARITY_NONE;
huart6.Init.Mode = UART_MODE_TX_RX;
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart6) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART6_Init 2 */
/* USER CODE END USART6_Init 2 */
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(uartHandle->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART4;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* UART4 clock enable */
__HAL_RCC_UART4_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**UART4 GPIO Configuration
PA11 ------> UART4_RX
PA12 ------> UART4_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF6_UART4;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* UART4 DMA Init */
/* UART4_TX Init */
hdma_uart4_tx.Instance = DMA2_Stream0;
hdma_uart4_tx.Init.Request = DMA_REQUEST_UART4_TX;
hdma_uart4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_uart4_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart4_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart4_tx.Init.Mode = DMA_NORMAL;
hdma_uart4_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_uart4_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_uart4_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx);
/* UART4 interrupt Init */
HAL_NVIC_SetPriority(UART4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspInit 1 */
/* USER CODE END UART4_MspInit 1 */
}
else if(uartHandle->Instance==UART5)
{
/* USER CODE BEGIN UART5_MspInit 0 */
/* USER CODE END UART5_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART5;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* UART5 clock enable */
__HAL_RCC_UART5_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**UART5 GPIO Configuration
PC12 ------> UART5_TX
PD2 ------> UART5_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* UART5 DMA Init */
/* UART5_TX Init */
hdma_uart5_tx.Instance = DMA2_Stream1;
hdma_uart5_tx.Init.Request = DMA_REQUEST_UART5_TX;
hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart5_tx.Init.Mode = DMA_NORMAL;
hdma_uart5_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_uart5_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx);
/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspInit 1 */
/* USER CODE END UART5_MspInit 1 */
}
else if(uartHandle->Instance==UART7)
{
/* USER CODE BEGIN UART7_MspInit 0 */
/* USER CODE END UART7_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART7;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* UART7 clock enable */
__HAL_RCC_UART7_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
/**UART7 GPIO Configuration
PE7 ------> UART7_RX
PE8 ------> UART7_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_UART7;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* UART7 interrupt Init */
HAL_NVIC_SetPriority(UART7_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART7_IRQn);
/* USER CODE BEGIN UART7_MspInit 1 */
/* USER CODE END UART7_MspInit 1 */
}
else if(uartHandle->Instance==UART8)
{
/* USER CODE BEGIN UART8_MspInit 0 */
/* USER CODE END UART8_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* UART8 clock enable */
__HAL_RCC_UART8_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
/**UART8 GPIO Configuration
PE0 ------> UART8_RX
PE1 ------> UART8_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* UART8 DMA Init */
/* UART8_TX Init */
hdma_uart8_tx.Instance = DMA1_Stream1;
hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart8_tx.Init.Mode = DMA_NORMAL;
hdma_uart8_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart8_tx);
/* UART8 interrupt Init */
HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART8_IRQn);
/* USER CODE BEGIN UART8_MspInit 1 */
/* USER CODE END UART8_MspInit 1 */
}
else if(uartHandle->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**USART1 GPIO Configuration
PB14 ------> USART1_TX
PB15 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART1 DMA Init */
/* USART1_TX Init */
hdma_usart1_tx.Instance = DMA1_Stream2;
hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
else if(uartHandle->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**USART2 GPIO Configuration
PD5 ------> USART2_TX
PD6 ------> USART2_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USART2 DMA Init */
/* USART2_TX Init */
hdma_usart2_tx.Instance = DMA1_Stream3;
hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX;
hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_tx.Init.Mode = DMA_NORMAL;
hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
else if(uartHandle->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspInit 0 */
/* USER CODE END USART3_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* USART3 clock enable */
__HAL_RCC_USART3_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB11 ------> USART3_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART3 DMA Init */
/* USART3_TX Init */
hdma_usart3_tx.Instance = DMA1_Stream0;
hdma_usart3_tx.Init.Request = DMA_REQUEST_USART3_TX;
hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart3_tx.Init.Mode = DMA_NORMAL;
hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx);
/* USART3 interrupt Init */
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */
}
else if(uartHandle->Instance==USART6)
{
/* USER CODE BEGIN USART6_MspInit 0 */
/* USER CODE END USART6_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* USART6 clock enable */
__HAL_RCC_USART6_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USART6 DMA Init */
/* USART6_TX Init */
hdma_usart6_tx.Instance = DMA2_Stream2;
hdma_usart6_tx.Init.Request = DMA_REQUEST_USART6_TX;
hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart6_tx.Init.Mode = DMA_NORMAL;
hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx);
/* USART6 interrupt Init */
HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART6_IRQn);
/* USER CODE BEGIN USART6_MspInit 1 */
/* USER CODE END USART6_MspInit 1 */
}
}
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
{
if(uartHandle->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspDeInit 0 */
/* USER CODE END UART4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART4_CLK_DISABLE();
/**UART4 GPIO Configuration
PA11 ------> UART4_RX
PA12 ------> UART4_TX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
/* UART4 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* UART4 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspDeInit 1 */
/* USER CODE END UART4_MspDeInit 1 */
}
else if(uartHandle->Instance==UART5)
{
/* USER CODE BEGIN UART5_MspDeInit 0 */
/* USER CODE END UART5_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART5_CLK_DISABLE();
/**UART5 GPIO Configuration
PC12 ------> UART5_TX
PD2 ------> UART5_RX
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
/* UART5 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* UART5 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspDeInit 1 */
/* USER CODE END UART5_MspDeInit 1 */
}
else if(uartHandle->Instance==UART7)
{
/* USER CODE BEGIN UART7_MspDeInit 0 */
/* USER CODE END UART7_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART7_CLK_DISABLE();
/**UART7 GPIO Configuration
PE7 ------> UART7_RX
PE8 ------> UART7_TX
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8);
/* UART7 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART7_IRQn);
/* USER CODE BEGIN UART7_MspDeInit 1 */
/* USER CODE END UART7_MspDeInit 1 */
}
else if(uartHandle->Instance==UART8)
{
/* USER CODE BEGIN UART8_MspDeInit 0 */
/* USER CODE END UART8_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART8_CLK_DISABLE();
/**UART8 GPIO Configuration
PE0 ------> UART8_RX
PE1 ------> UART8_TX
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
/* UART8 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* UART8 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART8_IRQn);
/* USER CODE BEGIN UART8_MspDeInit 1 */
/* USER CODE END UART8_MspDeInit 1 */
}
else if(uartHandle->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
/**USART1 GPIO Configuration
PB14 ------> USART1_TX
PB15 ------> USART1_RX
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15);
/* USART1 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
else if(uartHandle->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PD5 ------> USART2_TX
PD6 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
/* USART2 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
else if(uartHandle->Instance==USART3)
{
/* USER CODE BEGIN USART3_MspDeInit 0 */
/* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB11 ------> USART3_RX
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11);
/* USART3 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART3 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspDeInit 1 */
/* USER CODE END USART3_MspDeInit 1 */
}
else if(uartHandle->Instance==USART6)
{
/* USER CODE BEGIN USART6_MspDeInit 0 */
/* USER CODE END USART6_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART6_CLK_DISABLE();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7);
/* USART6 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART6 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART6_IRQn);
/* USER CODE BEGIN USART6_MspDeInit 1 */
/* USER CODE END USART6_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
================================================
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_armcc.h
================================================
/**************************************************************************//**
* @file cmsis_armcc.h
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
* @version V5.1.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_ARMCC_H
#define __CMSIS_ARMCC_H
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
#endif
/* CMSIS compiler control architecture macros */
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
#define __ARM_ARCH_6M__ 1
#endif
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
#define __ARM_ARCH_7M__ 1
#endif
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
#define __ARM_ARCH_7EM__ 1
#endif
/* __ARM_ARCH_8M_BASE__ not applicable */
/* __ARM_ARCH_8M_MAIN__ not applicable */
/* CMSIS compiler control DSP macros */
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __ARM_FEATURE_DSP 1
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT __packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION __packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __memory_changed()
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xFFU);
}
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
register uint32_t __regBasePriMax __ASM("basepri_max");
__regBasePriMax = (basePri & 0xFFU);
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1U);
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_INLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#else
(void)fpscr;
#endif
}
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#endif
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
#define __ROR __ror
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __breakpoint(value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __RBIT __rbit
#else
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
return result;
}
#endif
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
#else
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
#else
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
#else
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXB(value, ptr) __strex(value, ptr)
#else
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXH(value, ptr) __strex(value, ptr)
#else
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXW(value, ptr) __strex(value, ptr)
#else
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
{
rrx r0, r0
bx lr
}
#endif
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRBT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRHT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRT(value, ptr) __strt(value, ptr)
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
((int64_t)(ARG3) << 32U) ) >> 32U))
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCC_H */
================================================
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_armclang.h
================================================
/**************************************************************************//**
* @file cmsis_armclang.h
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
* @version V5.2.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
#ifndef __CMSIS_ARMCLANG_H
#define __CMSIS_ARMCLANG_H
#pragma clang system_header /* treat file as system include file */
#ifndef __ARM_COMPAT_H
#include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wpacked"
/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#pragma clang diagnostic pop
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); see arm_compat.h */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); see arm_compat.h */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
\return non-secure Control Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
{
__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
}
#endif
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
}
#endif
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
}
#endif
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
\return SP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
return(result);
}
/**
\brief Set Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
\param [in] topOfStack Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
#endif
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
{
__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
}
#endif
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
{
__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
#endif
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
return(result);
}
#endif
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
}
#endif
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief Get Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
#endif
}
#endif
/**
\brief Get Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim" : "=r" (result) );
return result;
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
return 0U;
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
return result;
#endif
}
#endif
/**
\brief Set Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
#endif
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
\param [in] MainStackPtrLimit Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
#endif
}
#endif
#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
#else
#define __get_FPSCR() ((uint32_t)0U)
#endif
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __set_FPSCR __builtin_arm_set_fpscr
#else
#define __set_FPSCR(x) ((void)(x))
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/* Define macros for porting to both thumb1 and thumb2.
* For thumb1, use low register (r0-r7), specified by constraint "l"
* Otherwise, use general registers, specified by constraint "r" */
#if defined (__thumb__) && !defined (__thumb2__)
#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
#define __CMSIS_GCC_RW_REG(r) "+l" (r)
#define __CMSIS_GCC_USE_REG(r) "l" (r)
#else
#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define __CMSIS_GCC_RW_REG(r) "+r" (r)
#define __CMSIS_GCC_USE_REG(r) "r" (r)
#endif
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __builtin_arm_nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __builtin_arm_wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __builtin_arm_wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __builtin_arm_sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() __builtin_arm_isb(0xF)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() __builtin_arm_dsb(0xF)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() __builtin_arm_dmb(0xF)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV(value) __builtin_bswap32(value)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV16(value) __ROR(__REV(value), 16)
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REVSH(value) (int16_t)__builtin_bswap16(value)
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
op2 %= 32U;
if (op2 == 0U)
{
return op1;
}
return (op1 >> op2) | (op1 << (32U - op2));
}
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __ASM volatile ("bkpt "#value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __RBIT __builtin_arm_rbit
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
{
/* Even though __builtin_clz produces a CLZ instruction on ARM, formally
__builtin_clz(0) is undefined behaviour, so handle this case specially.
This guarantees ARM-compatible results if happening to compile on a non-ARM
target, and ensures the compiler doesn't decide to activate any
optimisations using the logic "value was passed to __builtin_clz, so it
is non-zero".
ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
single CLZ instruction.
*/
if (value == 0U)
{
return 32U;
}
return __builtin_clz(value);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDREXB (uint8_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDREXH (uint16_t)__builtin_arm_ldrex
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDREXW (uint32_t)__builtin_arm_ldrex
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXB (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXH (uint32_t)__builtin_arm_strex
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXW (uint32_t)__builtin_arm_strex
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __builtin_arm_clrex
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in]
gitextract__f2548al/ ├── .gitignore ├── SourceCode/ │ ├── .mxproject │ ├── Core/ │ │ ├── Inc/ │ │ │ ├── FreeRTOSConfig.h │ │ │ ├── dma.h │ │ │ ├── gpio.h │ │ │ ├── i2c.h │ │ │ ├── main.h │ │ │ ├── stm32h7xx_hal_conf.h │ │ │ ├── stm32h7xx_it.h │ │ │ └── usart.h │ │ └── Src/ │ │ ├── dma.c │ │ ├── freertos.c │ │ ├── gpio.c │ │ ├── i2c.c │ │ ├── main.c │ │ ├── stm32h7xx_hal_msp.c │ │ ├── stm32h7xx_hal_timebase_tim.c │ │ ├── stm32h7xx_it.c │ │ ├── system_stm32h7xx.c │ │ └── usart.c │ ├── Drivers/ │ │ ├── CMSIS/ │ │ │ ├── Core/ │ │ │ │ ├── Include/ │ │ │ │ │ ├── cmsis_armcc.h │ │ │ │ │ ├── cmsis_armclang.h │ │ │ │ │ ├── cmsis_armclang_ltm.h │ │ │ │ │ ├── cmsis_compiler.h │ │ │ │ │ ├── cmsis_gcc.h │ │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ │ ├── cmsis_version.h │ │ │ │ │ ├── core_armv81mml.h │ │ │ │ │ ├── core_armv8mbl.h │ │ │ │ │ ├── core_armv8mml.h │ │ │ │ │ ├── core_cm0.h │ │ │ │ │ ├── core_cm0plus.h │ │ │ │ │ ├── core_cm1.h │ │ │ │ │ ├── core_cm23.h │ │ │ │ │ ├── core_cm3.h │ │ │ │ │ ├── core_cm33.h │ │ │ │ │ ├── core_cm35p.h │ │ │ │ │ ├── core_cm4.h │ │ │ │ │ ├── core_cm7.h │ │ │ │ │ ├── core_sc000.h │ │ │ │ │ ├── core_sc300.h │ │ │ │ │ ├── mpu_armv7.h │ │ │ │ │ ├── mpu_armv8.h │ │ │ │ │ └── tz_context.h │ │ │ │ └── Template/ │ │ │ │ └── ARMv8-M/ │ │ │ │ ├── main_s.c │ │ │ │ └── tz_context.c │ │ │ ├── Core_A/ │ │ │ │ ├── Include/ │ │ │ │ │ ├── cmsis_armcc.h │ │ │ │ │ ├── cmsis_armclang.h │ │ │ │ │ ├── cmsis_compiler.h │ │ │ │ │ ├── cmsis_cp15.h │ │ │ │ │ ├── cmsis_gcc.h │ │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ │ ├── core_ca.h │ │ │ │ │ └── irq_ctrl.h │ │ │ │ └── Source/ │ │ │ │ └── irq_ctrl_gic.c │ │ │ ├── DSP/ │ │ │ │ ├── DSP_Lib_TestSuite/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── Common/ │ │ │ │ │ │ ├── JTest/ │ │ │ │ │ │ │ ├── inc/ │ │ │ │ │ │ │ │ ├── arr_desc/ │ │ │ │ │ │ │ │ │ └── arr_desc.h │ │ │ │ │ │ │ │ ├── jtest.h │ │ │ │ │ │ │ │ ├── jtest_cycle.h │ │ │ │ │ │ │ │ ├── jtest_define.h │ │ │ │ │ │ │ │ ├── jtest_fw.h │ │ │ │ │ │ │ │ ├── jtest_group.h │ │ │ │ │ │ │ │ ├── jtest_group_call.h │ │ │ │ │ │ │ │ ├── jtest_group_define.h │ │ │ │ │ │ │ │ ├── jtest_pf.h │ │ │ │ │ │ │ │ ├── jtest_systick.h │ │ │ │ │ │ │ │ ├── jtest_test.h │ │ │ │ │ │ │ │ ├── jtest_test_call.h │ │ │ │ │ │ │ │ ├── jtest_test_define.h │ │ │ │ │ │ │ │ ├── jtest_test_ret.h │ │ │ │ │ │ │ │ ├── jtest_util.h │ │ │ │ │ │ │ │ ├── opt_arg/ │ │ │ │ │ │ │ │ │ ├── opt_arg.h │ │ │ │ │ │ │ │ │ ├── pp_narg.h │ │ │ │ │ │ │ │ │ └── splice.h │ │ │ │ │ │ │ │ └── util/ │ │ │ │ │ │ │ │ └── util.h │ │ │ │ │ │ │ └── src/ │ │ │ │ │ │ │ ├── jtest_cycle.c │ │ │ │ │ │ │ ├── jtest_dump_str_segments.c │ │ │ │ │ │ │ ├── jtest_fw.c │ │ │ │ │ │ │ └── jtest_trigger_action.c │ │ │ │ │ │ ├── inc/ │ │ │ │ │ │ │ ├── all_tests.h │ │ │ │ │ │ │ ├── basic_math_tests/ │ │ │ │ │ │ │ │ ├── basic_math_templates.h │ │ │ │ │ │ │ │ ├── basic_math_test_data.h │ │ │ │ │ │ │ │ ├── basic_math_test_group.h │ │ │ │ │ │ │ │ └── basic_math_tests.h │ │ │ │ │ │ │ ├── complex_math_tests/ │ │ │ │ │ │ │ │ ├── complex_math_templates.h │ │ │ │ │ │ │ │ ├── complex_math_test_data.h │ │ │ │ │ │ │ │ ├── complex_math_test_group.h │ │ │ │ │ │ │ │ └── complex_math_tests.h │ │ │ │ │ │ │ ├── controller_tests/ │ │ │ │ │ │ │ │ ├── controller_templates.h │ │ │ │ │ │ │ │ ├── controller_test_data.h │ │ │ │ │ │ │ │ ├── controller_test_group.h │ │ │ │ │ │ │ │ └── controller_tests.h │ │ │ │ │ │ │ ├── fast_math_tests/ │ │ │ │ │ │ │ │ ├── fast_math_templates.h │ │ │ │ │ │ │ │ ├── fast_math_test_data.h │ │ │ │ │ │ │ │ └── fast_math_test_group.h │ │ │ │ │ │ │ ├── filtering_tests/ │ │ │ │ │ │ │ │ ├── filtering_templates.h │ │ │ │ │ │ │ │ ├── filtering_test_data.h │ │ │ │ │ │ │ │ ├── filtering_test_group.h │ │ │ │ │ │ │ │ └── filtering_tests.h │ │ │ │ │ │ │ ├── intrinsics_tests/ │ │ │ │ │ │ │ │ ├── intrinsics_templates.h │ │ │ │ │ │ │ │ ├── intrinsics_test_data.h │ │ │ │ │ │ │ │ └── intrinsics_test_group.h │ │ │ │ │ │ │ ├── math_helper.h │ │ │ │ │ │ │ ├── matrix_tests/ │ │ │ │ │ │ │ │ ├── matrix_templates.h │ │ │ │ │ │ │ │ ├── matrix_test_data.h │ │ │ │ │ │ │ │ ├── matrix_test_group.h │ │ │ │ │ │ │ │ └── matrix_tests.h │ │ │ │ │ │ │ ├── statistics_tests/ │ │ │ │ │ │ │ │ ├── statistics_templates.h │ │ │ │ │ │ │ │ ├── statistics_test_data.h │ │ │ │ │ │ │ │ ├── statistics_test_group.h │ │ │ │ │ │ │ │ └── statistics_tests.h │ │ │ │ │ │ │ ├── support_tests/ │ │ │ │ │ │ │ │ ├── support_templates.h │ │ │ │ │ │ │ │ ├── support_test_data.h │ │ │ │ │ │ │ │ ├── support_test_group.h │ │ │ │ │ │ │ │ └── support_tests.h │ │ │ │ │ │ │ ├── templates/ │ │ │ │ │ │ │ │ ├── template.h │ │ │ │ │ │ │ │ └── test_templates.h │ │ │ │ │ │ │ ├── transform_tests/ │ │ │ │ │ │ │ │ ├── transform_templates.h │ │ │ │ │ │ │ │ ├── transform_test_data.h │ │ │ │ │ │ │ │ ├── transform_test_group.h │ │ │ │ │ │ │ │ └── transform_tests.h │ │ │ │ │ │ │ └── type_abbrev.h │ │ │ │ │ │ ├── platform/ │ │ │ │ │ │ │ ├── ARMCC/ │ │ │ │ │ │ │ │ ├── Retarget.c │ │ │ │ │ │ │ │ ├── startup_armv6-m.s │ │ │ │ │ │ │ │ └── startup_armv7-m.s │ │ │ │ │ │ │ ├── ARMCLANG/ │ │ │ │ │ │ │ │ ├── startup_armv6-m.S │ │ │ │ │ │ │ │ └── startup_armv7-m.S │ │ │ │ │ │ │ ├── GCC/ │ │ │ │ │ │ │ │ ├── Retarget.c │ │ │ │ │ │ │ │ ├── startup_armv6-m.S │ │ │ │ │ │ │ │ └── startup_armv7-m.S │ │ │ │ │ │ │ ├── startup_generic.S │ │ │ │ │ │ │ ├── system_ARMCM0.c │ │ │ │ │ │ │ ├── system_ARMCM23.c │ │ │ │ │ │ │ ├── system_ARMCM3.c │ │ │ │ │ │ │ ├── system_ARMCM33.c │ │ │ │ │ │ │ ├── system_ARMCM4.c │ │ │ │ │ │ │ ├── system_ARMCM7.c │ │ │ │ │ │ │ ├── system_ARMSC000.c │ │ │ │ │ │ │ ├── system_ARMSC300.c │ │ │ │ │ │ │ ├── system_ARMv8MBL.c │ │ │ │ │ │ │ ├── system_ARMv8MML.c │ │ │ │ │ │ │ └── system_generic.c │ │ │ │ │ │ └── src/ │ │ │ │ │ │ ├── all_tests.c │ │ │ │ │ │ ├── basic_math_tests/ │ │ │ │ │ │ │ ├── abs_tests.c │ │ │ │ │ │ │ ├── add_tests.c │ │ │ │ │ │ │ ├── basic_math_test_common_data.c │ │ │ │ │ │ │ ├── basic_math_test_group.c │ │ │ │ │ │ │ ├── dot_prod_tests.c │ │ │ │ │ │ │ ├── mult_tests.c │ │ │ │ │ │ │ ├── negate_tests.c │ │ │ │ │ │ │ ├── offset_tests.c │ │ │ │ │ │ │ ├── scale_tests.c │ │ │ │ │ │ │ ├── shift_tests.c │ │ │ │ │ │ │ └── sub_tests.c │ │ │ │ │ │ ├── complex_math_tests/ │ │ │ │ │ │ │ ├── cmplx_conj_tests.c │ │ │ │ │ │ │ ├── cmplx_dot_prod_tests.c │ │ │ │ │ │ │ ├── cmplx_mag_squared_tests.c │ │ │ │ │ │ │ ├── cmplx_mag_tests.c │ │ │ │ │ │ │ ├── cmplx_mult_cmplx_tests.c │ │ │ │ │ │ │ ├── cmplx_mult_real_test.c │ │ │ │ │ │ │ ├── complex_math_test_common_data.c │ │ │ │ │ │ │ └── complex_math_test_group.c │ │ │ │ │ │ ├── controller_tests/ │ │ │ │ │ │ │ ├── controller_test_common_data.c │ │ │ │ │ │ │ ├── controller_test_group.c │ │ │ │ │ │ │ ├── pid_reset_tests.c │ │ │ │ │ │ │ ├── pid_tests.c │ │ │ │ │ │ │ └── sin_cos_tests.c │ │ │ │ │ │ ├── fast_math_tests/ │ │ │ │ │ │ │ ├── fast_math_tests.c │ │ │ │ │ │ │ └── fast_math_tests_common_data.c │ │ │ │ │ │ ├── filtering_tests/ │ │ │ │ │ │ │ ├── biquad_tests.c │ │ │ │ │ │ │ ├── conv_tests.c │ │ │ │ │ │ │ ├── correlate_tests.c │ │ │ │ │ │ │ ├── filtering_test_common_data.c │ │ │ │ │ │ │ ├── filtering_test_group.c │ │ │ │ │ │ │ ├── fir_tests.c │ │ │ │ │ │ │ ├── iir_tests.c │ │ │ │ │ │ │ └── lms_tests.c │ │ │ │ │ │ ├── intrinsics_tests/ │ │ │ │ │ │ │ ├── intrinsics_tests.c │ │ │ │ │ │ │ └── intrinsics_tests_common_data.c │ │ │ │ │ │ ├── main.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ ├── matrix_tests/ │ │ │ │ │ │ │ ├── mat_add_tests.c │ │ │ │ │ │ │ ├── mat_cmplx_mult_tests.c │ │ │ │ │ │ │ ├── mat_init_tests.c │ │ │ │ │ │ │ ├── mat_inverse_tests.c │ │ │ │ │ │ │ ├── mat_mult_fast_tests.c │ │ │ │ │ │ │ ├── mat_mult_tests.c │ │ │ │ │ │ │ ├── mat_scale_tests.c │ │ │ │ │ │ │ ├── mat_sub_tests.c │ │ │ │ │ │ │ ├── mat_trans_tests.c │ │ │ │ │ │ │ ├── matrix_test_common_data.c │ │ │ │ │ │ │ └── matrix_test_group.c │ │ │ │ │ │ ├── statistics_tests/ │ │ │ │ │ │ │ ├── max_tests.c │ │ │ │ │ │ │ ├── mean_tests.c │ │ │ │ │ │ │ ├── min_tests.c │ │ │ │ │ │ │ ├── power_tests.c │ │ │ │ │ │ │ ├── rms_tests.c │ │ │ │ │ │ │ ├── statistics_test_common_data.c │ │ │ │ │ │ │ ├── statistics_test_group.c │ │ │ │ │ │ │ ├── std_tests.c │ │ │ │ │ │ │ └── var_tests.c │ │ │ │ │ │ ├── support_tests/ │ │ │ │ │ │ │ ├── copy_tests.c │ │ │ │ │ │ │ ├── fill_tests.c │ │ │ │ │ │ │ ├── support_test_common_data.c │ │ │ │ │ │ │ ├── support_test_group.c │ │ │ │ │ │ │ └── x_to_y_tests.c │ │ │ │ │ │ └── transform_tests/ │ │ │ │ │ │ ├── cfft_family_tests.c │ │ │ │ │ │ ├── cfft_tests.c │ │ │ │ │ │ ├── dct4_tests.c │ │ │ │ │ │ ├── rfft_fast_tests.c │ │ │ │ │ │ ├── rfft_tests.c │ │ │ │ │ │ ├── transform_test_group.c │ │ │ │ │ │ └── transform_tests_common_data.c │ │ │ │ │ ├── DspLibTest_FVP/ │ │ │ │ │ │ ├── ARMv8MBLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLld_config.txt │ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt │ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt │ │ │ │ │ │ ├── cortexM0l_config.txt │ │ │ │ │ │ ├── cortexM3l_config.txt │ │ │ │ │ │ ├── cortexM4l_config.txt │ │ │ │ │ │ ├── cortexM4lf_config.txt │ │ │ │ │ │ ├── cortexM7l_config.txt │ │ │ │ │ │ ├── cortexM7lfdp_config.txt │ │ │ │ │ │ └── cortexM7lfsp_config.txt │ │ │ │ │ ├── DspLibTest_FVP_A5/ │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ ├── CMSIS/ │ │ │ │ │ │ │ │ ├── RTX_Config.c │ │ │ │ │ │ │ │ ├── RTX_Config.h │ │ │ │ │ │ │ │ └── handlers.c │ │ │ │ │ │ │ ├── Device/ │ │ │ │ │ │ │ │ └── ARMCA5/ │ │ │ │ │ │ │ │ ├── mem_ARMCA5.h │ │ │ │ │ │ │ │ ├── mmu_ARMCA5.c │ │ │ │ │ │ │ │ ├── startup_ARMCA5.c │ │ │ │ │ │ │ │ ├── system_ARMCA5.c │ │ │ │ │ │ │ │ └── system_ARMCA5.h │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ └── main.c │ │ │ │ │ ├── DspLibTest_MPS2/ │ │ │ │ │ │ └── HowTo.txt │ │ │ │ │ ├── DspLibTest_SV_FVP/ │ │ │ │ │ │ ├── ARMv8MBLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLld_config.txt │ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt │ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt │ │ │ │ │ │ ├── cortexM0l_config.txt │ │ │ │ │ │ ├── cortexM3l_config.txt │ │ │ │ │ │ ├── cortexM4l_config.txt │ │ │ │ │ │ ├── cortexM4lf_config.txt │ │ │ │ │ │ ├── cortexM7l_config.txt │ │ │ │ │ │ ├── cortexM7lfdp_config.txt │ │ │ │ │ │ └── cortexM7lfsp_config.txt │ │ │ │ │ ├── DspLibTest_SV_MPS2/ │ │ │ │ │ │ ├── ARMv8MBLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLl_config.txt │ │ │ │ │ │ ├── ARMv8MMLld_config.txt │ │ │ │ │ │ ├── ARMv8MMLldfsp_config.txt │ │ │ │ │ │ ├── ARMv8MMLlfsp_config.txt │ │ │ │ │ │ ├── cortexM0l_config.txt │ │ │ │ │ │ ├── cortexM3l_config.txt │ │ │ │ │ │ ├── cortexM4l_config.txt │ │ │ │ │ │ ├── cortexM4lf_config.txt │ │ │ │ │ │ ├── cortexM7l_config.txt │ │ │ │ │ │ ├── cortexM7lfdp_config.txt │ │ │ │ │ │ └── cortexM7lfsp_config.txt │ │ │ │ │ ├── HowTo.txt │ │ │ │ │ ├── HowTo_SV.txt │ │ │ │ │ └── RefLibs/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── inc/ │ │ │ │ │ │ └── ref.h │ │ │ │ │ └── src/ │ │ │ │ │ ├── BasicMathFunctions/ │ │ │ │ │ │ ├── BasicMathFunctions.c │ │ │ │ │ │ ├── abs.c │ │ │ │ │ │ ├── add.c │ │ │ │ │ │ ├── dot_prod.c │ │ │ │ │ │ ├── mult.c │ │ │ │ │ │ ├── negate.c │ │ │ │ │ │ ├── offset.c │ │ │ │ │ │ ├── scale.c │ │ │ │ │ │ ├── shift.c │ │ │ │ │ │ └── sub.c │ │ │ │ │ ├── ComplexMathFunctions/ │ │ │ │ │ │ ├── ComplexMathFunctions.c │ │ │ │ │ │ ├── cmplx_conj.c │ │ │ │ │ │ ├── cmplx_dot_prod.c │ │ │ │ │ │ ├── cmplx_mag.c │ │ │ │ │ │ ├── cmplx_mag_squared.c │ │ │ │ │ │ ├── cmplx_mult_cmplx.c │ │ │ │ │ │ └── cmplx_mult_real.c │ │ │ │ │ ├── ControllerFunctions/ │ │ │ │ │ │ ├── ControllerFunctions.c │ │ │ │ │ │ ├── pid.c │ │ │ │ │ │ └── sin_cos.c │ │ │ │ │ ├── FastMathFunctions/ │ │ │ │ │ │ ├── FastMathFunctions.c │ │ │ │ │ │ ├── cos.c │ │ │ │ │ │ ├── sin.c │ │ │ │ │ │ └── sqrt.c │ │ │ │ │ ├── FilteringFunctions/ │ │ │ │ │ │ ├── FilteringFunctions.c │ │ │ │ │ │ ├── biquad.c │ │ │ │ │ │ ├── conv.c │ │ │ │ │ │ ├── correlate.c │ │ │ │ │ │ ├── fir.c │ │ │ │ │ │ ├── fir_decimate.c │ │ │ │ │ │ ├── fir_interpolate.c │ │ │ │ │ │ ├── fir_lattice.c │ │ │ │ │ │ ├── fir_sparse.c │ │ │ │ │ │ ├── iir_lattice.c │ │ │ │ │ │ └── lms.c │ │ │ │ │ ├── HelperFunctions/ │ │ │ │ │ │ ├── HelperFunctions.c │ │ │ │ │ │ ├── mat_helper.c │ │ │ │ │ │ └── ref_helper.c │ │ │ │ │ ├── Intrinsics/ │ │ │ │ │ │ ├── Intrinsics_.c │ │ │ │ │ │ └── intrinsics.c │ │ │ │ │ ├── MatrixFunctions/ │ │ │ │ │ │ ├── MatrixFunctions.c │ │ │ │ │ │ ├── mat_add.c │ │ │ │ │ │ ├── mat_cmplx_mult.c │ │ │ │ │ │ ├── mat_inverse.c │ │ │ │ │ │ ├── mat_mult.c │ │ │ │ │ │ ├── mat_scale.c │ │ │ │ │ │ ├── mat_sub.c │ │ │ │ │ │ └── mat_trans.c │ │ │ │ │ ├── StatisticsFunctions/ │ │ │ │ │ │ ├── StatisticsFunctions.c │ │ │ │ │ │ ├── max.c │ │ │ │ │ │ ├── mean.c │ │ │ │ │ │ ├── min.c │ │ │ │ │ │ ├── power.c │ │ │ │ │ │ ├── rms.c │ │ │ │ │ │ ├── std.c │ │ │ │ │ │ └── var.c │ │ │ │ │ ├── SupportFunctions/ │ │ │ │ │ │ ├── SupportFunctions.c │ │ │ │ │ │ ├── copy.c │ │ │ │ │ │ ├── fill.c │ │ │ │ │ │ ├── fixed_to_fixed.c │ │ │ │ │ │ ├── fixed_to_float.c │ │ │ │ │ │ └── float_to_fixed.c │ │ │ │ │ └── TransformFunctions/ │ │ │ │ │ ├── TransformFunctions.c │ │ │ │ │ ├── bitreversal.c │ │ │ │ │ ├── cfft.c │ │ │ │ │ ├── dct4.c │ │ │ │ │ └── rfft.c │ │ │ │ ├── Examples/ │ │ │ │ │ └── ARM/ │ │ │ │ │ ├── arm_class_marks_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ └── arm_class_marks_example_f32.c │ │ │ │ │ ├── arm_convolution_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_convolution_example_f32.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_dotproduct_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ └── arm_dotproduct_example_f32.c │ │ │ │ │ ├── arm_fft_bin_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_fft_bin_data.c │ │ │ │ │ │ └── arm_fft_bin_example_f32.c │ │ │ │ │ ├── arm_fir_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_fir_data.c │ │ │ │ │ │ ├── arm_fir_example_f32.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_graphic_equalizer_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_graphic_equalizer_data.c │ │ │ │ │ │ ├── arm_graphic_equalizer_example_q31.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_linear_interp_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_linear_interp_data.c │ │ │ │ │ │ ├── arm_linear_interp_example_f32.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_matrix_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_matrix_example_f32.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_signal_converge_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ ├── arm_signal_converge_data.c │ │ │ │ │ │ ├── arm_signal_converge_example_f32.c │ │ │ │ │ │ ├── math_helper.c │ │ │ │ │ │ └── math_helper.h │ │ │ │ │ ├── arm_sin_cos_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ └── arm_sin_cos_example_f32.c │ │ │ │ │ ├── arm_variance_example/ │ │ │ │ │ │ ├── Abstract.txt │ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ └── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ └── arm_variance_example_f32.c │ │ │ │ │ └── boot/ │ │ │ │ │ └── RTE_Components.h │ │ │ │ ├── Include/ │ │ │ │ │ ├── arm_common_tables.h │ │ │ │ │ ├── arm_const_structs.h │ │ │ │ │ └── arm_math.h │ │ │ │ ├── Lib/ │ │ │ │ │ ├── ARM/ │ │ │ │ │ │ ├── arm_ARMv8MBLl_math.lib │ │ │ │ │ │ ├── arm_ARMv8MMLl_math.lib │ │ │ │ │ │ ├── arm_ARMv8MMLld_math.lib │ │ │ │ │ │ ├── arm_ARMv8MMLldfsp_math.lib │ │ │ │ │ │ ├── arm_ARMv8MMLlfsp_math.lib │ │ │ │ │ │ ├── arm_cortexM0b_math.lib │ │ │ │ │ │ ├── arm_cortexM0l_math.lib │ │ │ │ │ │ ├── arm_cortexM3b_math.lib │ │ │ │ │ │ ├── arm_cortexM3l_math.lib │ │ │ │ │ │ ├── arm_cortexM4b_math.lib │ │ │ │ │ │ ├── arm_cortexM4bf_math.lib │ │ │ │ │ │ ├── arm_cortexM4l_math.lib │ │ │ │ │ │ ├── arm_cortexM4lf_math.lib │ │ │ │ │ │ ├── arm_cortexM7b_math.lib │ │ │ │ │ │ ├── arm_cortexM7bfdp_math.lib │ │ │ │ │ │ ├── arm_cortexM7bfsp_math.lib │ │ │ │ │ │ ├── arm_cortexM7l_math.lib │ │ │ │ │ │ ├── arm_cortexM7lfdp_math.lib │ │ │ │ │ │ └── arm_cortexM7lfsp_math.lib │ │ │ │ │ ├── GCC/ │ │ │ │ │ │ ├── libarm_ARMv8MBLl_math.a │ │ │ │ │ │ ├── libarm_ARMv8MMLl_math.a │ │ │ │ │ │ ├── libarm_ARMv8MMLld_math.a │ │ │ │ │ │ ├── libarm_ARMv8MMLldfsp_math.a │ │ │ │ │ │ ├── libarm_ARMv8MMLlfsp_math.a │ │ │ │ │ │ ├── libarm_cortexM0l_math.a │ │ │ │ │ │ ├── libarm_cortexM3l_math.a │ │ │ │ │ │ ├── libarm_cortexM4l_math.a │ │ │ │ │ │ ├── libarm_cortexM4lf_math.a │ │ │ │ │ │ ├── libarm_cortexM7l_math.a │ │ │ │ │ │ ├── libarm_cortexM7lfdp_math.a │ │ │ │ │ │ └── libarm_cortexM7lfsp_math.a │ │ │ │ │ └── IAR/ │ │ │ │ │ ├── iar_ARMv8MBLl_math.a │ │ │ │ │ ├── iar_ARMv8MMLl_math.a │ │ │ │ │ ├── iar_ARMv8MMLld_math.a │ │ │ │ │ ├── iar_ARMv8MMLldfdp_math.a │ │ │ │ │ ├── iar_ARMv8MMLldfsp_math.a │ │ │ │ │ ├── iar_ARMv8MMLlfdp_math.a │ │ │ │ │ ├── iar_ARMv8MMLlfsp_math.a │ │ │ │ │ ├── iar_cortexM0b_math.a │ │ │ │ │ ├── iar_cortexM0l_math.a │ │ │ │ │ ├── iar_cortexM3b_math.a │ │ │ │ │ ├── iar_cortexM3l_math.a │ │ │ │ │ ├── iar_cortexM4b_math.a │ │ │ │ │ ├── iar_cortexM4bf_math.a │ │ │ │ │ ├── iar_cortexM4l_math.a │ │ │ │ │ ├── iar_cortexM4lf_math.a │ │ │ │ │ ├── iar_cortexM7b_math.a │ │ │ │ │ ├── iar_cortexM7bf_math.a │ │ │ │ │ ├── iar_cortexM7bs_math.a │ │ │ │ │ ├── iar_cortexM7l_math.a │ │ │ │ │ ├── iar_cortexM7lf_math.a │ │ │ │ │ └── iar_cortexM7ls_math.a │ │ │ │ ├── PythonWrapper/ │ │ │ │ │ └── cmsisdsp_pkg/ │ │ │ │ │ └── src/ │ │ │ │ │ ├── cmsismodule.c │ │ │ │ │ ├── cmsismodule.h │ │ │ │ │ └── fftinit.c │ │ │ │ └── Source/ │ │ │ │ ├── BasicMathFunctions/ │ │ │ │ │ ├── BasicMathFunctions.c │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── arm_abs_f32.c │ │ │ │ │ ├── arm_abs_q15.c │ │ │ │ │ ├── arm_abs_q31.c │ │ │ │ │ ├── arm_abs_q7.c │ │ │ │ │ ├── arm_add_f32.c │ │ │ │ │ ├── arm_add_q15.c │ │ │ │ │ ├── arm_add_q31.c │ │ │ │ │ ├── arm_add_q7.c │ │ │ │ │ ├── arm_dot_prod_f32.c │ │ │ │ │ ├── arm_dot_prod_q15.c │ │ │ │ │ ├── arm_dot_prod_q31.c │ │ │ │ │ ├── arm_dot_prod_q7.c │ │ │ │ │ ├── arm_mult_f32.c │ │ │ │ │ ├── arm_mult_q15.c │ │ │ │ │ ├── arm_mult_q31.c │ │ │ │ │ ├── arm_mult_q7.c │ │ │ │ │ ├── arm_negate_f32.c │ │ │ │ │ ├── arm_negate_q15.c │ │ │ │ │ ├── arm_negate_q31.c │ │ │ │ │ ├── arm_negate_q7.c │ │ │ │ │ ├── arm_offset_f32.c │ │ │ │ │ ├── arm_offset_q15.c │ │ │ │ │ ├── arm_offset_q31.c │ │ │ │ │ ├── arm_offset_q7.c │ │ │ │ │ ├── arm_scale_f32.c │ │ │ │ │ ├── arm_scale_q15.c │ │ │ │ │ ├── arm_scale_q31.c │ │ │ │ │ ├── arm_scale_q7.c │ │ │ │ │ ├── arm_shift_q15.c │ │ │ │ │ ├── arm_shift_q31.c │ │ │ │ │ ├── arm_shift_q7.c │ │ │ │ │ ├── arm_sub_f32.c │ │ │ │ │ ├── arm_sub_q15.c │ │ │ │ │ ├── arm_sub_q31.c │ │ │ │ │ └── arm_sub_q7.c │ │ │ │ ├── CMakeLists.txt │ │ │ │ ├── CommonTables/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── CommonTables.c │ │ │ │ │ ├── arm_common_tables.c │ │ │ │ │ └── arm_const_structs.c │ │ │ │ ├── ComplexMathFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── ComplexMathFunctions.c │ │ │ │ │ ├── arm_cmplx_conj_f32.c │ │ │ │ │ ├── arm_cmplx_conj_q15.c │ │ │ │ │ ├── arm_cmplx_conj_q31.c │ │ │ │ │ ├── arm_cmplx_dot_prod_f32.c │ │ │ │ │ ├── arm_cmplx_dot_prod_q15.c │ │ │ │ │ ├── arm_cmplx_dot_prod_q31.c │ │ │ │ │ ├── arm_cmplx_mag_f32.c │ │ │ │ │ ├── arm_cmplx_mag_q15.c │ │ │ │ │ ├── arm_cmplx_mag_q31.c │ │ │ │ │ ├── arm_cmplx_mag_squared_f32.c │ │ │ │ │ ├── arm_cmplx_mag_squared_q15.c │ │ │ │ │ ├── arm_cmplx_mag_squared_q31.c │ │ │ │ │ ├── arm_cmplx_mult_cmplx_f32.c │ │ │ │ │ ├── arm_cmplx_mult_cmplx_q15.c │ │ │ │ │ ├── arm_cmplx_mult_cmplx_q31.c │ │ │ │ │ ├── arm_cmplx_mult_real_f32.c │ │ │ │ │ ├── arm_cmplx_mult_real_q15.c │ │ │ │ │ └── arm_cmplx_mult_real_q31.c │ │ │ │ ├── ControllerFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── ControllerFunctions.c │ │ │ │ │ ├── arm_pid_init_f32.c │ │ │ │ │ ├── arm_pid_init_q15.c │ │ │ │ │ ├── arm_pid_init_q31.c │ │ │ │ │ ├── arm_pid_reset_f32.c │ │ │ │ │ ├── arm_pid_reset_q15.c │ │ │ │ │ ├── arm_pid_reset_q31.c │ │ │ │ │ ├── arm_sin_cos_f32.c │ │ │ │ │ └── arm_sin_cos_q31.c │ │ │ │ ├── FastMathFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── FastMathFunctions.c │ │ │ │ │ ├── arm_cos_f32.c │ │ │ │ │ ├── arm_cos_q15.c │ │ │ │ │ ├── arm_cos_q31.c │ │ │ │ │ ├── arm_sin_f32.c │ │ │ │ │ ├── arm_sin_q15.c │ │ │ │ │ ├── arm_sin_q31.c │ │ │ │ │ ├── arm_sqrt_q15.c │ │ │ │ │ └── arm_sqrt_q31.c │ │ │ │ ├── FilteringFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── FilteringFunctions.c │ │ │ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c │ │ │ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c │ │ │ │ │ ├── arm_biquad_cascade_df1_f32.c │ │ │ │ │ ├── arm_biquad_cascade_df1_fast_q15.c │ │ │ │ │ ├── arm_biquad_cascade_df1_fast_q31.c │ │ │ │ │ ├── arm_biquad_cascade_df1_init_f32.c │ │ │ │ │ ├── arm_biquad_cascade_df1_init_q15.c │ │ │ │ │ ├── arm_biquad_cascade_df1_init_q31.c │ │ │ │ │ ├── arm_biquad_cascade_df1_q15.c │ │ │ │ │ ├── arm_biquad_cascade_df1_q31.c │ │ │ │ │ ├── arm_biquad_cascade_df2T_f32.c │ │ │ │ │ ├── arm_biquad_cascade_df2T_f64.c │ │ │ │ │ ├── arm_biquad_cascade_df2T_init_f32.c │ │ │ │ │ ├── arm_biquad_cascade_df2T_init_f64.c │ │ │ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c │ │ │ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c │ │ │ │ │ ├── arm_conv_f32.c │ │ │ │ │ ├── arm_conv_fast_opt_q15.c │ │ │ │ │ ├── arm_conv_fast_q15.c │ │ │ │ │ ├── arm_conv_fast_q31.c │ │ │ │ │ ├── arm_conv_opt_q15.c │ │ │ │ │ ├── arm_conv_opt_q7.c │ │ │ │ │ ├── arm_conv_partial_f32.c │ │ │ │ │ ├── arm_conv_partial_fast_opt_q15.c │ │ │ │ │ ├── arm_conv_partial_fast_q15.c │ │ │ │ │ ├── arm_conv_partial_fast_q31.c │ │ │ │ │ ├── arm_conv_partial_opt_q15.c │ │ │ │ │ ├── arm_conv_partial_opt_q7.c │ │ │ │ │ ├── arm_conv_partial_q15.c │ │ │ │ │ ├── arm_conv_partial_q31.c │ │ │ │ │ ├── arm_conv_partial_q7.c │ │ │ │ │ ├── arm_conv_q15.c │ │ │ │ │ ├── arm_conv_q31.c │ │ │ │ │ ├── arm_conv_q7.c │ │ │ │ │ ├── arm_correlate_f32.c │ │ │ │ │ ├── arm_correlate_fast_opt_q15.c │ │ │ │ │ ├── arm_correlate_fast_q15.c │ │ │ │ │ ├── arm_correlate_fast_q31.c │ │ │ │ │ ├── arm_correlate_opt_q15.c │ │ │ │ │ ├── arm_correlate_opt_q7.c │ │ │ │ │ ├── arm_correlate_q15.c │ │ │ │ │ ├── arm_correlate_q31.c │ │ │ │ │ ├── arm_correlate_q7.c │ │ │ │ │ ├── arm_fir_decimate_f32.c │ │ │ │ │ ├── arm_fir_decimate_fast_q15.c │ │ │ │ │ ├── arm_fir_decimate_fast_q31.c │ │ │ │ │ ├── arm_fir_decimate_init_f32.c │ │ │ │ │ ├── arm_fir_decimate_init_q15.c │ │ │ │ │ ├── arm_fir_decimate_init_q31.c │ │ │ │ │ ├── arm_fir_decimate_q15.c │ │ │ │ │ ├── arm_fir_decimate_q31.c │ │ │ │ │ ├── arm_fir_f32.c │ │ │ │ │ ├── arm_fir_fast_q15.c │ │ │ │ │ ├── arm_fir_fast_q31.c │ │ │ │ │ ├── arm_fir_init_f32.c │ │ │ │ │ ├── arm_fir_init_q15.c │ │ │ │ │ ├── arm_fir_init_q31.c │ │ │ │ │ ├── arm_fir_init_q7.c │ │ │ │ │ ├── arm_fir_interpolate_f32.c │ │ │ │ │ ├── arm_fir_interpolate_init_f32.c │ │ │ │ │ ├── arm_fir_interpolate_init_q15.c │ │ │ │ │ ├── arm_fir_interpolate_init_q31.c │ │ │ │ │ ├── arm_fir_interpolate_q15.c │ │ │ │ │ ├── arm_fir_interpolate_q31.c │ │ │ │ │ ├── arm_fir_lattice_f32.c │ │ │ │ │ ├── arm_fir_lattice_init_f32.c │ │ │ │ │ ├── arm_fir_lattice_init_q15.c │ │ │ │ │ ├── arm_fir_lattice_init_q31.c │ │ │ │ │ ├── arm_fir_lattice_q15.c │ │ │ │ │ ├── arm_fir_lattice_q31.c │ │ │ │ │ ├── arm_fir_q15.c │ │ │ │ │ ├── arm_fir_q31.c │ │ │ │ │ ├── arm_fir_q7.c │ │ │ │ │ ├── arm_fir_sparse_f32.c │ │ │ │ │ ├── arm_fir_sparse_init_f32.c │ │ │ │ │ ├── arm_fir_sparse_init_q15.c │ │ │ │ │ ├── arm_fir_sparse_init_q31.c │ │ │ │ │ ├── arm_fir_sparse_init_q7.c │ │ │ │ │ ├── arm_fir_sparse_q15.c │ │ │ │ │ ├── arm_fir_sparse_q31.c │ │ │ │ │ ├── arm_fir_sparse_q7.c │ │ │ │ │ ├── arm_iir_lattice_f32.c │ │ │ │ │ ├── arm_iir_lattice_init_f32.c │ │ │ │ │ ├── arm_iir_lattice_init_q15.c │ │ │ │ │ ├── arm_iir_lattice_init_q31.c │ │ │ │ │ ├── arm_iir_lattice_q15.c │ │ │ │ │ ├── arm_iir_lattice_q31.c │ │ │ │ │ ├── arm_lms_f32.c │ │ │ │ │ ├── arm_lms_init_f32.c │ │ │ │ │ ├── arm_lms_init_q15.c │ │ │ │ │ ├── arm_lms_init_q31.c │ │ │ │ │ ├── arm_lms_norm_f32.c │ │ │ │ │ ├── arm_lms_norm_init_f32.c │ │ │ │ │ ├── arm_lms_norm_init_q15.c │ │ │ │ │ ├── arm_lms_norm_init_q31.c │ │ │ │ │ ├── arm_lms_norm_q15.c │ │ │ │ │ ├── arm_lms_norm_q31.c │ │ │ │ │ ├── arm_lms_q15.c │ │ │ │ │ └── arm_lms_q31.c │ │ │ │ ├── MatrixFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── MatrixFunctions.c │ │ │ │ │ ├── arm_mat_add_f32.c │ │ │ │ │ ├── arm_mat_add_q15.c │ │ │ │ │ ├── arm_mat_add_q31.c │ │ │ │ │ ├── arm_mat_cmplx_mult_f32.c │ │ │ │ │ ├── arm_mat_cmplx_mult_q15.c │ │ │ │ │ ├── arm_mat_cmplx_mult_q31.c │ │ │ │ │ ├── arm_mat_init_f32.c │ │ │ │ │ ├── arm_mat_init_q15.c │ │ │ │ │ ├── arm_mat_init_q31.c │ │ │ │ │ ├── arm_mat_inverse_f32.c │ │ │ │ │ ├── arm_mat_inverse_f64.c │ │ │ │ │ ├── arm_mat_mult_f32.c │ │ │ │ │ ├── arm_mat_mult_fast_q15.c │ │ │ │ │ ├── arm_mat_mult_fast_q31.c │ │ │ │ │ ├── arm_mat_mult_q15.c │ │ │ │ │ ├── arm_mat_mult_q31.c │ │ │ │ │ ├── arm_mat_scale_f32.c │ │ │ │ │ ├── arm_mat_scale_q15.c │ │ │ │ │ ├── arm_mat_scale_q31.c │ │ │ │ │ ├── arm_mat_sub_f32.c │ │ │ │ │ ├── arm_mat_sub_q15.c │ │ │ │ │ ├── arm_mat_sub_q31.c │ │ │ │ │ ├── arm_mat_trans_f32.c │ │ │ │ │ ├── arm_mat_trans_q15.c │ │ │ │ │ └── arm_mat_trans_q31.c │ │ │ │ ├── StatisticsFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── StatisticsFunctions.c │ │ │ │ │ ├── arm_max_f32.c │ │ │ │ │ ├── arm_max_q15.c │ │ │ │ │ ├── arm_max_q31.c │ │ │ │ │ ├── arm_max_q7.c │ │ │ │ │ ├── arm_mean_f32.c │ │ │ │ │ ├── arm_mean_q15.c │ │ │ │ │ ├── arm_mean_q31.c │ │ │ │ │ ├── arm_mean_q7.c │ │ │ │ │ ├── arm_min_f32.c │ │ │ │ │ ├── arm_min_q15.c │ │ │ │ │ ├── arm_min_q31.c │ │ │ │ │ ├── arm_min_q7.c │ │ │ │ │ ├── arm_power_f32.c │ │ │ │ │ ├── arm_power_q15.c │ │ │ │ │ ├── arm_power_q31.c │ │ │ │ │ ├── arm_power_q7.c │ │ │ │ │ ├── arm_rms_f32.c │ │ │ │ │ ├── arm_rms_q15.c │ │ │ │ │ ├── arm_rms_q31.c │ │ │ │ │ ├── arm_std_f32.c │ │ │ │ │ ├── arm_std_q15.c │ │ │ │ │ ├── arm_std_q31.c │ │ │ │ │ ├── arm_var_f32.c │ │ │ │ │ ├── arm_var_q15.c │ │ │ │ │ └── arm_var_q31.c │ │ │ │ ├── SupportFunctions/ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── SupportFunctions.c │ │ │ │ │ ├── arm_copy_f32.c │ │ │ │ │ ├── arm_copy_q15.c │ │ │ │ │ ├── arm_copy_q31.c │ │ │ │ │ ├── arm_copy_q7.c │ │ │ │ │ ├── arm_fill_f32.c │ │ │ │ │ ├── arm_fill_q15.c │ │ │ │ │ ├── arm_fill_q31.c │ │ │ │ │ ├── arm_fill_q7.c │ │ │ │ │ ├── arm_float_to_q15.c │ │ │ │ │ ├── arm_float_to_q31.c │ │ │ │ │ ├── arm_float_to_q7.c │ │ │ │ │ ├── arm_q15_to_float.c │ │ │ │ │ ├── arm_q15_to_q31.c │ │ │ │ │ ├── arm_q15_to_q7.c │ │ │ │ │ ├── arm_q31_to_float.c │ │ │ │ │ ├── arm_q31_to_q15.c │ │ │ │ │ ├── arm_q31_to_q7.c │ │ │ │ │ ├── arm_q7_to_float.c │ │ │ │ │ ├── arm_q7_to_q15.c │ │ │ │ │ └── arm_q7_to_q31.c │ │ │ │ └── TransformFunctions/ │ │ │ │ ├── CMakeLists.txt │ │ │ │ ├── TransformFunctions.c │ │ │ │ ├── arm_bitreversal.c │ │ │ │ ├── arm_bitreversal2.S │ │ │ │ ├── arm_bitreversal2.c │ │ │ │ ├── arm_cfft_f32.c │ │ │ │ ├── arm_cfft_q15.c │ │ │ │ ├── arm_cfft_q31.c │ │ │ │ ├── arm_cfft_radix2_f32.c │ │ │ │ ├── arm_cfft_radix2_init_f32.c │ │ │ │ ├── arm_cfft_radix2_init_q15.c │ │ │ │ ├── arm_cfft_radix2_init_q31.c │ │ │ │ ├── arm_cfft_radix2_q15.c │ │ │ │ ├── arm_cfft_radix2_q31.c │ │ │ │ ├── arm_cfft_radix4_f32.c │ │ │ │ ├── arm_cfft_radix4_init_f32.c │ │ │ │ ├── arm_cfft_radix4_init_q15.c │ │ │ │ ├── arm_cfft_radix4_init_q31.c │ │ │ │ ├── arm_cfft_radix4_q15.c │ │ │ │ ├── arm_cfft_radix4_q31.c │ │ │ │ ├── arm_cfft_radix8_f32.c │ │ │ │ ├── arm_dct4_f32.c │ │ │ │ ├── arm_dct4_init_f32.c │ │ │ │ ├── arm_dct4_init_q15.c │ │ │ │ ├── arm_dct4_init_q31.c │ │ │ │ ├── arm_dct4_q15.c │ │ │ │ ├── arm_dct4_q31.c │ │ │ │ ├── arm_rfft_f32.c │ │ │ │ ├── arm_rfft_fast_f32.c │ │ │ │ ├── arm_rfft_fast_init_f32.c │ │ │ │ ├── arm_rfft_init_f32.c │ │ │ │ ├── arm_rfft_init_q15.c │ │ │ │ ├── arm_rfft_init_q31.c │ │ │ │ ├── arm_rfft_q15.c │ │ │ │ └── arm_rfft_q31.c │ │ │ ├── Device/ │ │ │ │ └── ST/ │ │ │ │ └── STM32H7xx/ │ │ │ │ ├── Include/ │ │ │ │ │ ├── stm32h750xx.h │ │ │ │ │ ├── stm32h7xx.h │ │ │ │ │ └── system_stm32h7xx.h │ │ │ │ └── LICENSE.txt │ │ │ ├── Include/ │ │ │ │ ├── cmsis_armcc.h │ │ │ │ ├── cmsis_armclang.h │ │ │ │ ├── cmsis_armclang_ltm.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ ├── cmsis_version.h │ │ │ │ ├── core_armv81mml.h │ │ │ │ ├── core_armv8mbl.h │ │ │ │ ├── core_armv8mml.h │ │ │ │ ├── core_cm0.h │ │ │ │ ├── core_cm0plus.h │ │ │ │ ├── core_cm1.h │ │ │ │ ├── core_cm23.h │ │ │ │ ├── core_cm3.h │ │ │ │ ├── core_cm33.h │ │ │ │ ├── core_cm35p.h │ │ │ │ ├── core_cm4.h │ │ │ │ ├── core_cm7.h │ │ │ │ ├── core_sc000.h │ │ │ │ ├── core_sc300.h │ │ │ │ ├── mpu_armv7.h │ │ │ │ ├── mpu_armv8.h │ │ │ │ └── tz_context.h │ │ │ ├── LICENSE.txt │ │ │ ├── NN/ │ │ │ │ ├── Examples/ │ │ │ │ │ ├── ARM/ │ │ │ │ │ │ └── arm_nn_examples/ │ │ │ │ │ │ ├── cifar10/ │ │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ │ ├── Compiler/ │ │ │ │ │ │ │ │ │ └── EventRecorderConf.h │ │ │ │ │ │ │ │ ├── Device/ │ │ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.c │ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ │ │ ├── _ARMCM0/ │ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ │ ├── _ARMCM3/ │ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ │ ├── _ARMCM4_FP/ │ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ │ └── _ARMCM7_SP/ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ ├── arm_nnexamples_cifar10.cpp │ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_inputs.h │ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_parameter.h │ │ │ │ │ │ │ ├── arm_nnexamples_cifar10_weights.h │ │ │ │ │ │ │ └── readme.txt │ │ │ │ │ │ └── gru/ │ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ │ ├── Compiler/ │ │ │ │ │ │ │ │ └── EventRecorderConf.h │ │ │ │ │ │ │ ├── Device/ │ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ │ └── ARMCM7_SP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.c │ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ │ ├── _ARMCM0/ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ ├── _ARMCM3/ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ ├── _ARMCM4_FP/ │ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ │ └── _ARMCM7_SP/ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ ├── arm_nnexamples_gru.cpp │ │ │ │ │ │ ├── arm_nnexamples_gru_test_data.h │ │ │ │ │ │ └── readme.txt │ │ │ │ │ └── IAR/ │ │ │ │ │ └── iar_nn_examples/ │ │ │ │ │ ├── NN-example-cifar10/ │ │ │ │ │ │ ├── arm_nnexamples_cifar10.cpp │ │ │ │ │ │ ├── arm_nnexamples_cifar10_inputs.h │ │ │ │ │ │ ├── arm_nnexamples_cifar10_parameter.h │ │ │ │ │ │ ├── arm_nnexamples_cifar10_weights.h │ │ │ │ │ │ └── readme_iar.txt │ │ │ │ │ └── NN-example-gru/ │ │ │ │ │ ├── arm_nnexamples_gru.cpp │ │ │ │ │ ├── arm_nnexamples_gru_test_data.h │ │ │ │ │ └── readme_iar.txt │ │ │ │ ├── Include/ │ │ │ │ │ ├── arm_nn_tables.h │ │ │ │ │ ├── arm_nnfunctions.h │ │ │ │ │ └── arm_nnsupportfunctions.h │ │ │ │ ├── NN_Lib_Tests/ │ │ │ │ │ └── nn_test/ │ │ │ │ │ ├── RTE/ │ │ │ │ │ │ ├── Device/ │ │ │ │ │ │ │ ├── ARMCM0/ │ │ │ │ │ │ │ │ ├── startup_ARMCM0.s │ │ │ │ │ │ │ │ └── system_ARMCM0.c │ │ │ │ │ │ │ ├── ARMCM3/ │ │ │ │ │ │ │ │ ├── startup_ARMCM3.s │ │ │ │ │ │ │ │ └── system_ARMCM3.c │ │ │ │ │ │ │ ├── ARMCM4/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ ├── ARMCM4_FP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM4.s │ │ │ │ │ │ │ │ └── system_ARMCM4.c │ │ │ │ │ │ │ ├── ARMCM7_SP/ │ │ │ │ │ │ │ │ ├── startup_ARMCM7.c │ │ │ │ │ │ │ │ ├── startup_ARMCM7.s │ │ │ │ │ │ │ │ └── system_ARMCM7.c │ │ │ │ │ │ │ └── STM32F411RETx/ │ │ │ │ │ │ │ ├── startup_stm32f411xe.s │ │ │ │ │ │ │ └── system_stm32f4xx.c │ │ │ │ │ │ ├── _ARMCM0/ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ ├── _ARMCM3/ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ ├── _ARMCM4_FP/ │ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ │ └── _ARMCM7_SP/ │ │ │ │ │ │ └── RTE_Components.h │ │ │ │ │ ├── Ref_Implementations/ │ │ │ │ │ │ ├── arm_convolve_HWC_q15_ref.c │ │ │ │ │ │ ├── arm_convolve_HWC_q15_ref_nonsquare.c │ │ │ │ │ │ ├── arm_convolve_HWC_q7_ref.c │ │ │ │ │ │ ├── arm_convolve_HWC_q7_ref_nonsquare.c │ │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_ref.c │ │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c │ │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_opt_ref.c │ │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_ref.c │ │ │ │ │ │ ├── arm_fully_connected_q15_opt_ref.c │ │ │ │ │ │ ├── arm_fully_connected_q15_ref.c │ │ │ │ │ │ ├── arm_fully_connected_q7_opt_ref.c │ │ │ │ │ │ ├── arm_fully_connected_q7_ref.c │ │ │ │ │ │ ├── arm_nn_mult_ref.c │ │ │ │ │ │ ├── arm_pool_ref.c │ │ │ │ │ │ ├── arm_relu_ref.c │ │ │ │ │ │ ├── fully_connected_testing_weights.h │ │ │ │ │ │ └── ref_functions.h │ │ │ │ │ ├── arm_nnexamples_nn_test.cpp │ │ │ │ │ ├── arm_nnexamples_nn_test.h │ │ │ │ │ └── readme.txt │ │ │ │ └── Source/ │ │ │ │ ├── ActivationFunctions/ │ │ │ │ │ ├── arm_nn_activations_q15.c │ │ │ │ │ ├── arm_nn_activations_q7.c │ │ │ │ │ ├── arm_relu_q15.c │ │ │ │ │ └── arm_relu_q7.c │ │ │ │ ├── ConvolutionFunctions/ │ │ │ │ │ ├── arm_convolve_1x1_HWC_q7_fast_nonsquare.c │ │ │ │ │ ├── arm_convolve_HWC_q15_basic.c │ │ │ │ │ ├── arm_convolve_HWC_q15_fast.c │ │ │ │ │ ├── arm_convolve_HWC_q15_fast_nonsquare.c │ │ │ │ │ ├── arm_convolve_HWC_q7_RGB.c │ │ │ │ │ ├── arm_convolve_HWC_q7_basic.c │ │ │ │ │ ├── arm_convolve_HWC_q7_basic_nonsquare.c │ │ │ │ │ ├── arm_convolve_HWC_q7_fast.c │ │ │ │ │ ├── arm_convolve_HWC_q7_fast_nonsquare.c │ │ │ │ │ ├── arm_depthwise_conv_u8_basic_ver1.c │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7.c │ │ │ │ │ ├── arm_depthwise_separable_conv_HWC_q7_nonsquare.c │ │ │ │ │ ├── arm_nn_mat_mult_kernel_q7_q15.c │ │ │ │ │ └── arm_nn_mat_mult_kernel_q7_q15_reordered.c │ │ │ │ ├── FullyConnectedFunctions/ │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15.c │ │ │ │ │ ├── arm_fully_connected_mat_q7_vec_q15_opt.c │ │ │ │ │ ├── arm_fully_connected_q15.c │ │ │ │ │ ├── arm_fully_connected_q15_opt.c │ │ │ │ │ ├── arm_fully_connected_q7.c │ │ │ │ │ └── arm_fully_connected_q7_opt.c │ │ │ │ ├── NNSupportFunctions/ │ │ │ │ │ ├── arm_nn_mult_q15.c │ │ │ │ │ ├── arm_nn_mult_q7.c │ │ │ │ │ ├── arm_nntables.c │ │ │ │ │ ├── arm_q7_to_q15_no_shift.c │ │ │ │ │ └── arm_q7_to_q15_reordered_no_shift.c │ │ │ │ ├── PoolingFunctions/ │ │ │ │ │ └── arm_pool_q7_HWC.c │ │ │ │ └── SoftmaxFunctions/ │ │ │ │ ├── arm_softmax_q15.c │ │ │ │ └── arm_softmax_q7.c │ │ │ ├── RTOS/ │ │ │ │ └── Template/ │ │ │ │ └── cmsis_os.h │ │ │ ├── RTOS2/ │ │ │ │ ├── Include/ │ │ │ │ │ ├── cmsis_os2.h │ │ │ │ │ └── os_tick.h │ │ │ │ ├── Source/ │ │ │ │ │ ├── os_systick.c │ │ │ │ │ ├── os_tick_gtim.c │ │ │ │ │ └── os_tick_ptim.c │ │ │ │ └── Template/ │ │ │ │ ├── cmsis_os.h │ │ │ │ └── cmsis_os1.c │ │ │ └── docs/ │ │ │ └── General/ │ │ │ └── html/ │ │ │ └── LICENSE.txt │ │ └── STM32H7xx_HAL_Driver/ │ │ ├── Inc/ │ │ │ ├── Legacy/ │ │ │ │ └── stm32_hal_legacy.h │ │ │ ├── stm32h7xx_hal.h │ │ │ ├── stm32h7xx_hal_cortex.h │ │ │ ├── stm32h7xx_hal_def.h │ │ │ ├── stm32h7xx_hal_dma.h │ │ │ ├── stm32h7xx_hal_dma_ex.h │ │ │ ├── stm32h7xx_hal_exti.h │ │ │ ├── stm32h7xx_hal_flash.h │ │ │ ├── stm32h7xx_hal_flash_ex.h │ │ │ ├── stm32h7xx_hal_gpio.h │ │ │ ├── stm32h7xx_hal_gpio_ex.h │ │ │ ├── stm32h7xx_hal_hsem.h │ │ │ ├── stm32h7xx_hal_i2c.h │ │ │ ├── stm32h7xx_hal_i2c_ex.h │ │ │ ├── stm32h7xx_hal_mdma.h │ │ │ ├── stm32h7xx_hal_pwr.h │ │ │ ├── stm32h7xx_hal_pwr_ex.h │ │ │ ├── stm32h7xx_hal_rcc.h │ │ │ ├── stm32h7xx_hal_rcc_ex.h │ │ │ ├── stm32h7xx_hal_tim.h │ │ │ ├── stm32h7xx_hal_tim_ex.h │ │ │ ├── stm32h7xx_hal_uart.h │ │ │ └── stm32h7xx_hal_uart_ex.h │ │ ├── LICENSE.txt │ │ └── Src/ │ │ ├── stm32h7xx_hal.c │ │ ├── stm32h7xx_hal_cortex.c │ │ ├── stm32h7xx_hal_dma.c │ │ ├── stm32h7xx_hal_dma_ex.c │ │ ├── stm32h7xx_hal_exti.c │ │ ├── stm32h7xx_hal_flash.c │ │ ├── stm32h7xx_hal_flash_ex.c │ │ ├── stm32h7xx_hal_gpio.c │ │ ├── stm32h7xx_hal_hsem.c │ │ ├── stm32h7xx_hal_i2c.c │ │ ├── stm32h7xx_hal_i2c_ex.c │ │ ├── stm32h7xx_hal_mdma.c │ │ ├── stm32h7xx_hal_pwr.c │ │ ├── stm32h7xx_hal_pwr_ex.c │ │ ├── stm32h7xx_hal_rcc.c │ │ ├── stm32h7xx_hal_rcc_ex.c │ │ ├── stm32h7xx_hal_tim.c │ │ ├── stm32h7xx_hal_tim_ex.c │ │ ├── stm32h7xx_hal_uart.c │ │ └── stm32h7xx_hal_uart_ex.c │ ├── MDK-ARM/ │ │ ├── .vscode/ │ │ │ ├── c_cpp_properties.json │ │ │ ├── keil-assistant.log │ │ │ ├── settings.json │ │ │ └── uv4.log │ │ ├── DebugConfig/ │ │ │ ├── Hexapod_STM32H750VBTx_1.1.0.dbgconf │ │ │ └── app_test_STM32H750VBTx_1.1.0.dbgconf │ │ ├── EventRecorderStub.scvd │ │ ├── Hexapod.uvguix.97088 │ │ ├── Hexapod.uvoptx │ │ ├── Hexapod.uvprojx │ │ ├── JLinkLog.txt │ │ ├── JLinkSettings.ini │ │ ├── RTE/ │ │ │ ├── _Hexapod/ │ │ │ │ └── RTE_Components.h │ │ │ └── _app_test/ │ │ │ └── RTE_Components.h │ │ ├── USER/ │ │ │ ├── APP/ │ │ │ │ ├── Servo.cpp │ │ │ │ ├── Servo.h │ │ │ │ ├── arm.cpp │ │ │ │ ├── arm.h │ │ │ │ ├── bsp.h │ │ │ │ ├── debug_uart.c │ │ │ │ ├── debug_uart.h │ │ │ │ ├── dwt_delay_us.c │ │ │ │ ├── dwt_delay_us.h │ │ │ │ ├── gait_prg.cpp │ │ │ │ ├── gait_prg.h │ │ │ │ ├── leg.cpp │ │ │ │ ├── leg.h │ │ │ │ ├── mpu6050.cpp │ │ │ │ ├── mpu6050.h │ │ │ │ ├── my_math.cpp │ │ │ │ ├── my_math.h │ │ │ │ ├── remote.c │ │ │ │ └── remote.h │ │ │ ├── DMP/ │ │ │ │ ├── dmpKey.h │ │ │ │ ├── dmp_interface.c │ │ │ │ ├── dmp_interface.h │ │ │ │ ├── dmpmap.h │ │ │ │ ├── inv_mpu.c │ │ │ │ ├── inv_mpu.h │ │ │ │ ├── inv_mpu_dmp_motion_driver.c │ │ │ │ └── inv_mpu_dmp_motion_driver.h │ │ │ └── TASK/ │ │ │ ├── LegControl_task.cpp │ │ │ ├── LegControl_task.h │ │ │ ├── MPU_task.cpp │ │ │ ├── MPU_task.h │ │ │ ├── led_task.cpp │ │ │ └── led_task.h │ │ ├── startup_stm32h750xx.lst │ │ └── startup_stm32h750xx.s │ ├── Middlewares/ │ │ ├── ST/ │ │ │ └── ARM/ │ │ │ └── DSP/ │ │ │ └── Inc/ │ │ │ └── arm_math.h │ │ └── Third_Party/ │ │ └── FreeRTOS/ │ │ └── Source/ │ │ ├── CMSIS_RTOS/ │ │ │ ├── cmsis_os.c │ │ │ └── cmsis_os.h │ │ ├── LICENSE │ │ ├── croutine.c │ │ ├── event_groups.c │ │ ├── include/ │ │ │ ├── FreeRTOS.h │ │ │ ├── StackMacros.h │ │ │ ├── atomic.h │ │ │ ├── croutine.h │ │ │ ├── deprecated_definitions.h │ │ │ ├── event_groups.h │ │ │ ├── list.h │ │ │ ├── message_buffer.h │ │ │ ├── mpu_prototypes.h │ │ │ ├── mpu_wrappers.h │ │ │ ├── portable.h │ │ │ ├── projdefs.h │ │ │ ├── queue.h │ │ │ ├── semphr.h │ │ │ ├── stack_macros.h │ │ │ ├── stream_buffer.h │ │ │ ├── task.h │ │ │ └── timers.h │ │ ├── list.c │ │ ├── portable/ │ │ │ ├── MemMang/ │ │ │ │ └── heap_4.c │ │ │ └── RVDS/ │ │ │ └── ARM_CM4F/ │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── queue.c │ │ ├── stream_buffer.c │ │ ├── tasks.c │ │ └── timers.c │ ├── hexapod.ioc │ └── kill.bat └── readme.txt
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SYMBOL INDEX (5469 symbols across 711 files)
FILE: SourceCode/Core/Src/dma.c
function MX_DMA_Init (line 39) | void MX_DMA_Init(void)
FILE: SourceCode/Core/Src/freertos.c
function vApplicationGetIdleTaskMemory (line 74) | void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer,...
function MX_FREERTOS_Init (line 88) | void MX_FREERTOS_Init(void) {
function StartDefaultTask (line 139) | void StartDefaultTask(void const * argument)
FILE: SourceCode/Core/Src/gpio.c
function MX_GPIO_Init (line 43) | void MX_GPIO_Init(void)
FILE: SourceCode/Core/Src/i2c.c
function MX_I2C4_Init (line 30) | void MX_I2C4_Init(void)
function HAL_I2C_MspInit (line 73) | void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
function HAL_I2C_MspDeInit (line 117) | void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
FILE: SourceCode/Core/Src/main.c
function sys_cache_enable (line 64) | void sys_cache_enable(void)
function main (line 78) | int main(void)
function SystemClock_Config (line 119) | void SystemClock_Config(void)
function MPU_Config (line 180) | void MPU_Config(void)
function HAL_TIM_PeriodElapsedCallback (line 215) | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
function Error_Handler (line 232) | void Error_Handler(void)
function assert_failed (line 251) | void assert_failed(uint8_t *file, uint32_t line)
FILE: SourceCode/Core/Src/stm32h7xx_hal_msp.c
function HAL_MspInit (line 63) | void HAL_MspInit(void)
FILE: SourceCode/Core/Src/stm32h7xx_hal_timebase_tim.c
function HAL_StatusTypeDef (line 41) | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
function HAL_SuspendTick (line 105) | void HAL_SuspendTick(void)
function HAL_ResumeTick (line 117) | void HAL_ResumeTick(void)
FILE: SourceCode/Core/Src/stm32h7xx_it.c
function NMI_Handler (line 88) | void NMI_Handler(void)
function HardFault_Handler (line 103) | void HardFault_Handler(void)
function MemManage_Handler (line 119) | void MemManage_Handler(void)
function BusFault_Handler (line 135) | void BusFault_Handler(void)
function UsageFault_Handler (line 150) | void UsageFault_Handler(void)
function DebugMon_Handler (line 165) | void DebugMon_Handler(void)
function DMA1_Stream0_IRQHandler (line 185) | void DMA1_Stream0_IRQHandler(void)
function DMA1_Stream1_IRQHandler (line 199) | void DMA1_Stream1_IRQHandler(void)
function DMA1_Stream2_IRQHandler (line 213) | void DMA1_Stream2_IRQHandler(void)
function DMA1_Stream3_IRQHandler (line 227) | void DMA1_Stream3_IRQHandler(void)
function EXTI9_5_IRQHandler (line 241) | void EXTI9_5_IRQHandler(void)
function TIM1_UP_IRQHandler (line 255) | void TIM1_UP_IRQHandler(void)
function USART1_IRQHandler (line 269) | void USART1_IRQHandler(void)
function USART2_IRQHandler (line 283) | void USART2_IRQHandler(void)
function USART3_IRQHandler (line 297) | void USART3_IRQHandler(void)
function UART4_IRQHandler (line 311) | void UART4_IRQHandler(void)
function UART5_IRQHandler (line 325) | void UART5_IRQHandler(void)
function DMA2_Stream0_IRQHandler (line 339) | void DMA2_Stream0_IRQHandler(void)
function DMA2_Stream1_IRQHandler (line 353) | void DMA2_Stream1_IRQHandler(void)
function DMA2_Stream2_IRQHandler (line 367) | void DMA2_Stream2_IRQHandler(void)
function USART6_IRQHandler (line 381) | void USART6_IRQHandler(void)
function UART7_IRQHandler (line 395) | void UART7_IRQHandler(void)
function UART8_IRQHandler (line 409) | void UART8_IRQHandler(void)
function I2C4_EV_IRQHandler (line 423) | void I2C4_EV_IRQHandler(void)
function HAL_UART_RxCpltCallback (line 435) | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
FILE: SourceCode/Core/Src/system_stm32h7xx.c
function SystemInit (line 175) | void SystemInit (void)
function SystemCoreClockUpdate (line 340) | void SystemCoreClockUpdate (void)
FILE: SourceCode/Core/Src/usart.c
function MX_UART4_Init (line 44) | void MX_UART4_Init(void)
function MX_UART5_Init (line 87) | void MX_UART5_Init(void)
function MX_UART7_Init (line 130) | void MX_UART7_Init(void)
function MX_UART8_Init (line 174) | void MX_UART8_Init(void)
function MX_USART1_UART_Init (line 219) | void MX_USART1_UART_Init(void)
function MX_USART2_UART_Init (line 263) | void MX_USART2_UART_Init(void)
function MX_USART3_UART_Init (line 307) | void MX_USART3_UART_Init(void)
function MX_USART6_UART_Init (line 352) | void MX_USART6_UART_Init(void)
function HAL_UART_MspInit (line 395) | void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
function HAL_UART_MspDeInit (line 846) | void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_armcc.h
function __STATIC_INLINE (line 159) | __STATIC_INLINE uint32_t __get_CONTROL(void)
function __STATIC_INLINE (line 171) | __STATIC_INLINE void __set_CONTROL(uint32_t control)
function __STATIC_INLINE (line 183) | __STATIC_INLINE uint32_t __get_IPSR(void)
function __STATIC_INLINE (line 195) | __STATIC_INLINE uint32_t __get_APSR(void)
function __STATIC_INLINE (line 207) | __STATIC_INLINE uint32_t __get_xPSR(void)
function __STATIC_INLINE (line 219) | __STATIC_INLINE uint32_t __get_PSP(void)
function __STATIC_INLINE (line 231) | __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_INLINE (line 243) | __STATIC_INLINE uint32_t __get_MSP(void)
function __STATIC_INLINE (line 255) | __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_INLINE (line 267) | __STATIC_INLINE uint32_t __get_PRIMASK(void)
function __STATIC_INLINE (line 279) | __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_INLINE (line 310) | __STATIC_INLINE uint32_t __get_BASEPRI(void)
function __STATIC_INLINE (line 322) | __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_INLINE (line 335) | __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_INLINE (line 347) | __STATIC_INLINE uint32_t __get_FAULTMASK(void)
function __STATIC_INLINE (line 359) | __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_INLINE (line 374) | __STATIC_INLINE uint32_t __get_FPSCR(void)
function __STATIC_INLINE (line 391) | __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
function __REV16 (line 492) | uint32_t __REV16(uint32_t value)
function __REVSH (line 507) | int16_t __REVSH(int16_t value)
function __STATIC_INLINE (line 545) | __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t ...
function __RRX (line 694) | uint32_t __RRX(uint32_t value)
function __STATIC_INLINE (line 765) | __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t va...
function __STATIC_INLINE (line 790) | __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t v...
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_armclang.h
type T_UINT32 (line 71) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 79) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 87) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 95) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 103) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 166) | __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
function __STATIC_FORCEINLINE (line 181) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 196) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 208) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 220) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 234) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 248) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 262) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 277) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 292) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 304) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 316) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 331) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 346) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 358) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 371) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 385) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 397) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 412) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 427) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 439) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 470) | __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
function __STATIC_FORCEINLINE (line 485) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 500) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 512) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 525) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 536) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 551) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 566) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 578) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 601) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 624) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 647) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 669) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 689) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 712) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 734) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 755) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 902) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 937) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1063) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1078) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1093) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1108) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1123) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1135) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1147) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1163) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1188) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1218) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1233) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1248) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1263) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1275) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1287) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1432) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_armclang_ltm.h
type T_UINT32 (line 71) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 79) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 87) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 95) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 103) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 167) | __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
function __STATIC_FORCEINLINE (line 182) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 197) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 209) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 221) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 235) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 249) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 263) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 278) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 293) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 305) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 317) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 332) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 347) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 359) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 372) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 386) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 398) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 413) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 428) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 440) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 471) | __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
function __STATIC_FORCEINLINE (line 486) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 501) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 513) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 526) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 537) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 552) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 567) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 579) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 602) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 625) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 648) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 670) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 690) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 713) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 735) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 756) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 901) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 936) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1062) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1077) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1092) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1107) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1122) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1134) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1146) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1162) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1187) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1217) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1232) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1247) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1262) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1274) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1286) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1365) | __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1373) | __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1381) | __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1389) | __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1397) | __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1405) | __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1414) | __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1422) | __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1430) | __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1438) | __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1446) | __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1454) | __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1463) | __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1471) | __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1479) | __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1487) | __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1495) | __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1503) | __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1511) | __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1519) | __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1527) | __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1535) | __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1543) | __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1551) | __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1559) | __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1567) | __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1575) | __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1583) | __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1591) | __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1599) | __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1607) | __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1615) | __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1623) | __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1631) | __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1639) | __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1647) | __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1655) | __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1663) | __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1685) | __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1693) | __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1701) | __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1709) | __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1717) | __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1725) | __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1733) | __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1741) | __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1749) | __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1766) | __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 1783) | __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1791) | __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1799) | __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1807) | __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1815) | __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 1832) | __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 1849) | __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1857) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 1865) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 1879) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_compiler.h
type T_UINT32 (line 101) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 105) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 109) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 113) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 117) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function T_UINT32 (line 173) | struct __packed__ T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 177) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 181) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 185) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 189) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function packed (line 244) | packed struct T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 248) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 252) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 256) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 260) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_gcc.h
type T_UINT32 (line 74) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function __PACKED_STRUCT (line 82) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 90) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 98) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 106) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __cmsis_start (line 131) | void __cmsis_start(void)
function __STATIC_FORCEINLINE (line 233) | __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
function __STATIC_FORCEINLINE (line 248) | __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
function __STATIC_FORCEINLINE (line 260) | __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
function __STATIC_FORCEINLINE (line 272) | __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
function __STATIC_FORCEINLINE (line 286) | __STATIC_FORCEINLINE uint32_t __get_APSR(void)
function __STATIC_FORCEINLINE (line 300) | __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
function __STATIC_FORCEINLINE (line 314) | __STATIC_FORCEINLINE uint32_t __get_PSP(void)
function __STATIC_FORCEINLINE (line 329) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
function __STATIC_FORCEINLINE (line 344) | __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 356) | __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 368) | __STATIC_FORCEINLINE uint32_t __get_MSP(void)
function __STATIC_FORCEINLINE (line 383) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
function __STATIC_FORCEINLINE (line 398) | __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 410) | __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
function __STATIC_FORCEINLINE (line 423) | __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
function __STATIC_FORCEINLINE (line 437) | __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
function __STATIC_FORCEINLINE (line 449) | __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
function __STATIC_FORCEINLINE (line 464) | __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
function __STATIC_FORCEINLINE (line 479) | __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
function __STATIC_FORCEINLINE (line 491) | __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
function __STATIC_FORCEINLINE (line 543) | __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
function __STATIC_FORCEINLINE (line 558) | __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
function __STATIC_FORCEINLINE (line 570) | __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
function __STATIC_FORCEINLINE (line 583) | __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
function __STATIC_FORCEINLINE (line 594) | __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
function __STATIC_FORCEINLINE (line 609) | __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
function __STATIC_FORCEINLINE (line 624) | __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 636) | __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
function __STATIC_FORCEINLINE (line 659) | __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
function __STATIC_FORCEINLINE (line 681) | __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 704) | __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 725) | __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
function __STATIC_FORCEINLINE (line 746) | __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
function __STATIC_FORCEINLINE (line 769) | __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
function __STATIC_FORCEINLINE (line 792) | __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 813) | __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
function __STATIC_FORCEINLINE (line 833) | __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
function __STATIC_FORCEINLINE (line 859) | __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
function __STATIC_FORCEINLINE (line 986) | __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
function __STATIC_FORCEINLINE (line 1001) | __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
function __STATIC_FORCEINLINE (line 1021) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1048) | __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
function __STATIC_FORCEINLINE (line 1078) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 1107) | __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
function __STATIC_FORCEINLINE (line 1129) | __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
function __STATIC_FORCEINLINE (line 1151) | __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
function __STATIC_FORCEINLINE (line 1168) | __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *...
function __STATIC_FORCEINLINE (line 1185) | __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t...
function __STATIC_FORCEINLINE (line 1202) | __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t...
function __STATIC_FORCEINLINE (line 1215) | __STATIC_FORCEINLINE void __CLREX(void)
function __STATIC_FORCEINLINE (line 1268) | __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
function __STATIC_FORCEINLINE (line 1283) | __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1305) | __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1327) | __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1342) | __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1354) | __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1366) | __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1382) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1407) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 1437) | __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1452) | __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1467) | __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1482) | __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1494) | __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1506) | __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1518) | __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
function __STATIC_FORCEINLINE (line 1533) | __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
function __STATIC_FORCEINLINE (line 1548) | __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
function __STATIC_FORCEINLINE (line 1565) | __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *...
function __STATIC_FORCEINLINE (line 1582) | __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t...
function __STATIC_FORCEINLINE (line 1599) | __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t ...
function __STATIC_FORCEINLINE (line 1621) | __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1629) | __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1637) | __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1645) | __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1653) | __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1661) | __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1670) | __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1678) | __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1686) | __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1694) | __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1702) | __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1710) | __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1719) | __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1727) | __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1735) | __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1743) | __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1751) | __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1759) | __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1767) | __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1775) | __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1783) | __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1791) | __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1799) | __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1807) | __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1815) | __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1823) | __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1831) | __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1839) | __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1847) | __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1855) | __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1863) | __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1871) | __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1879) | __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1887) | __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1895) | __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1903) | __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1911) | __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1919) | __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1941) | __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1949) | __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1957) | __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
function __STATIC_FORCEINLINE (line 1965) | __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1973) | __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1981) | __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 1989) | __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 1997) | __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2005) | __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2022) | __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 2039) | __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2047) | __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2055) | __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 2063) | __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2071) | __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 2088) | __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 2105) | __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 2113) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 2121) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 2154) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
FILE: SourceCode/Drivers/CMSIS/Core/Include/cmsis_iccarm.h
function __IAR_FT (line 181) | __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
function __IAR_FT (line 193) | __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
function __IAR_FT (line 204) | __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
function __IAR_FT (line 215) | __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
function __packed (line 226) | __packed struct __iar_u32 { uint32_t v; }
function __IAR_FT (line 403) | __IAR_FT int16_t __REVSH(int16_t val)
function __STATIC_INLINE (line 525) | __STATIC_INLINE uint8_t __CLZ(uint32_t data)
function __STATIC_INLINE (line 540) | __STATIC_INLINE uint32_t __RBIT(uint32_t v)
function __STATIC_INLINE (line 553) | __STATIC_INLINE uint32_t __get_APSR(void)
function __IAR_FT (line 581) | __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
function __IAR_FT (line 586) | __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
function __IAR_FT (line 596) | __IAR_FT uint32_t __RRX(uint32_t value)
function __IAR_FT (line 603) | __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
function __IAR_FT (line 615) | __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
function __IAR_FT (line 623) | __IAR_FT uint32_t __get_MSPLIM(void)
function __IAR_FT (line 636) | __IAR_FT void __set_MSPLIM(uint32_t value)
function __IAR_FT (line 647) | __IAR_FT uint32_t __get_PSPLIM(void)
function __IAR_FT (line 660) | __IAR_FT void __set_PSPLIM(uint32_t value)
function __IAR_FT (line 671) | __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
function __IAR_FT (line 678) | __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
function __IAR_FT (line 683) | __IAR_FT uint32_t __TZ_get_PSP_NS(void)
function __IAR_FT (line 690) | __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
function __IAR_FT (line 695) | __IAR_FT uint32_t __TZ_get_MSP_NS(void)
function __IAR_FT (line 702) | __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
function __IAR_FT (line 707) | __IAR_FT uint32_t __TZ_get_SP_NS(void)
function __IAR_FT (line 713) | __IAR_FT void __TZ_set_SP_NS(uint32_t value)
function __IAR_FT (line 718) | __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
function __IAR_FT (line 725) | __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
function __IAR_FT (line 730) | __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
function __IAR_FT (line 737) | __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
function __IAR_FT (line 742) | __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
function __IAR_FT (line 749) | __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
function __IAR_FT (line 754) | __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
function __IAR_FT (line 767) | __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
function __IAR_FT (line 778) | __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
function __IAR_FT (line 785) | __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
function __STATIC_INLINE (line 797) | __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_INLINE (line 815) | __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __IAR_FT (line 835) | __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
function __IAR_FT (line 842) | __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
function __IAR_FT (line 849) | __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
function __IAR_FT (line 856) | __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
function __IAR_FT (line 861) | __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
function __IAR_FT (line 866) | __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
function __IAR_FT (line 877) | __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
function __IAR_FT (line 884) | __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
function __IAR_FT (line 891) | __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
function __IAR_FT (line 898) | __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
function __IAR_FT (line 903) | __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
function __IAR_FT (line 908) | __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
function __IAR_FT (line 913) | __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
function __IAR_FT (line 920) | __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
function __IAR_FT (line 927) | __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
function __IAR_FT (line 934) | __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
function __IAR_FT (line 941) | __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
function __IAR_FT (line 948) | __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_armv81mml.h
type APSR_Type (line 315) | typedef union
type IPSR_Type (line 354) | typedef union
type xPSR_Type (line 372) | typedef union
type CONTROL_Type (line 423) | typedef union
type NVIC_Type (line 462) | typedef struct
type SCB_Type (line 498) | typedef struct
type SCnSCB_Type (line 1010) | typedef struct
type SysTick_Type (line 1035) | typedef struct
type DWT_Type (line 1202) | typedef struct
type TPI_Type (line 1388) | typedef struct
type MPU_Type (line 1544) | typedef struct
type SAU_Type (line 1660) | typedef struct
type FPU_Type (line 1746) | typedef struct
type CoreDebug_Type (line 1876) | typedef struct
function __STATIC_INLINE (line 2156) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2175) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2187) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2204) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2223) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2242) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2261) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2276) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2293) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2315) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2336) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2358) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2382) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2404) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2429) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2456) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2479) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2495) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2506) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2531) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2550) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2562) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2579) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2598) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2615) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2634) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2649) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2666) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2688) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2709) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2749) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2787) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2798) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2831) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2860) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2903) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2924) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2944) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_armv8mbl.h
type APSR_Type (line 233) | typedef union
type IPSR_Type (line 263) | typedef union
type xPSR_Type (line 281) | typedef union
type CONTROL_Type (line 320) | typedef union
type NVIC_Type (line 351) | typedef struct
type SCB_Type (line 381) | typedef struct
type SysTick_Type (line 558) | typedef struct
type DWT_Type (line 610) | typedef struct
type TPI_Type (line 725) | typedef struct
type MPU_Type (line 824) | typedef struct
type SAU_Type (line 931) | typedef struct
type CoreDebug_Type (line 988) | typedef struct
function __STATIC_INLINE (line 1252) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1271) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1290) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1309) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1328) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1343) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1360) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1382) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1403) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1425) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1449) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1473) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1498) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1525) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1549) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1569) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1584) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1605) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1622) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1641) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1658) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1677) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1692) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1709) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1731) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 1754) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1794) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1818) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 1829) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 1862) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1891) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_armv8mml.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1391) | typedef struct
type SAU_Type (line 1504) | typedef struct
type FPU_Type (line 1590) | typedef struct
type CoreDebug_Type (line 1720) | typedef struct
function __STATIC_INLINE (line 2021) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2040) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2052) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2071) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2090) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2109) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2128) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2143) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2160) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2182) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2225) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2249) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2271) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2296) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2323) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2346) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2362) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2373) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2417) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2429) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2446) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2465) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2482) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2501) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2516) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2533) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2555) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2576) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2616) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2654) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2665) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2698) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2727) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2770) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2791) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2811) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm0.h
type APSR_Type (line 199) | typedef union
type IPSR_Type (line 229) | typedef union
type xPSR_Type (line 247) | typedef union
type CONTROL_Type (line 286) | typedef union
type NVIC_Type (line 314) | typedef struct
type SCB_Type (line 341) | typedef struct
type SysTick_Type (line 448) | typedef struct
function __STATIC_INLINE (line 623) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 642) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 661) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 680) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 699) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 714) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 732) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 756) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 781) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 808) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 832) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 848) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 859) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 892) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 923) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm0plus.h
type APSR_Type (line 210) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 297) | typedef union
type NVIC_Type (line 328) | typedef struct
type SCB_Type (line 355) | typedef struct
type SysTick_Type (line 472) | typedef struct
type MPU_Type (line 524) | typedef struct
function __STATIC_INLINE (line 741) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 760) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 779) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 798) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 817) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 832) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 850) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 874) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 899) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 926) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 950) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 970) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 985) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1025) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1056) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm1.h
type APSR_Type (line 199) | typedef union
type IPSR_Type (line 229) | typedef union
type xPSR_Type (line 247) | typedef union
type CONTROL_Type (line 286) | typedef union
type NVIC_Type (line 314) | typedef struct
type SCB_Type (line 341) | typedef struct
type SCnSCB_Type (line 448) | typedef struct
type SysTick_Type (line 474) | typedef struct
function __STATIC_INLINE (line 650) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 669) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 688) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 707) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 726) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 741) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 759) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 783) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 808) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 835) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 859) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 875) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 886) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 919) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 950) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm23.h
type APSR_Type (line 233) | typedef union
type IPSR_Type (line 263) | typedef union
type xPSR_Type (line 281) | typedef union
type CONTROL_Type (line 320) | typedef union
type NVIC_Type (line 351) | typedef struct
type SCB_Type (line 381) | typedef struct
type SysTick_Type (line 558) | typedef struct
type DWT_Type (line 610) | typedef struct
type TPI_Type (line 725) | typedef struct
type MPU_Type (line 899) | typedef struct
type SAU_Type (line 1006) | typedef struct
type CoreDebug_Type (line 1063) | typedef struct
function __STATIC_INLINE (line 1327) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1346) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1365) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1384) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1403) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1418) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1435) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1457) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1478) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1500) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 1524) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1548) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1573) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1600) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1624) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1644) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1659) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1680) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1697) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1716) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1733) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1752) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1767) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1784) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1806) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 1829) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 1869) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1893) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 1904) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 1937) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1966) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm3.h
type APSR_Type (line 206) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 309) | typedef union
type NVIC_Type (line 340) | typedef struct
type SCB_Type (line 374) | typedef struct
type SCnSCB_Type (line 655) | typedef struct
type SysTick_Type (line 701) | typedef struct
type DWT_Type (line 841) | typedef struct
type TPI_Type (line 988) | typedef struct
type MPU_Type (line 1150) | typedef struct
type CoreDebug_Type (line 1246) | typedef struct
function __STATIC_INLINE (line 1472) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1491) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1503) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1522) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1541) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1560) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1579) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1594) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1611) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1633) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1655) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1680) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1707) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1730) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1746) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1757) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1799) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1830) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1872) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 1893) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 1913) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm33.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1466) | typedef struct
type SAU_Type (line 1579) | typedef struct
type FPU_Type (line 1665) | typedef struct
type CoreDebug_Type (line 1795) | typedef struct
function __STATIC_INLINE (line 2096) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2115) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2127) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2146) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2165) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2184) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2218) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2235) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2257) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2278) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2300) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2324) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2346) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2371) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2421) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2437) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2448) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2473) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2492) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2504) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2521) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2540) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2557) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2576) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2591) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2608) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2630) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2651) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2691) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2729) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2740) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2773) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2802) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2845) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2866) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2886) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm35p.h
type APSR_Type (line 314) | typedef union
type IPSR_Type (line 353) | typedef union
type xPSR_Type (line 371) | typedef union
type CONTROL_Type (line 422) | typedef union
type NVIC_Type (line 461) | typedef struct
type SCB_Type (line 497) | typedef struct
type SCnSCB_Type (line 929) | typedef struct
type SysTick_Type (line 954) | typedef struct
type DWT_Type (line 1106) | typedef struct
type TPI_Type (line 1292) | typedef struct
type MPU_Type (line 1466) | typedef struct
type SAU_Type (line 1579) | typedef struct
type FPU_Type (line 1665) | typedef struct
type CoreDebug_Type (line 1795) | typedef struct
function __STATIC_INLINE (line 2096) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2115) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 2127) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2146) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2165) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2184) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2203) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2218) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2235) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2257) | __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2278) | __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2300) | __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
function __STATIC_INLINE (line 2324) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2346) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2371) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2398) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2421) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2437) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2448) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2473) | __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
function __STATIC_INLINE (line 2492) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
function __STATIC_INLINE (line 2504) | __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2521) | __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2540) | __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2557) | __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2576) | __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2591) | __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2608) | __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2630) | __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t pri...
function __STATIC_INLINE (line 2651) | __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
function __STATIC_INLINE (line 2691) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2729) | __STATIC_INLINE void TZ_SAU_Enable(void)
function __STATIC_INLINE (line 2740) | __STATIC_INLINE void TZ_SAU_Disable(void)
function __STATIC_INLINE (line 2773) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2802) | __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
function __STATIC_INLINE (line 2845) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2866) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2886) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm4.h
type APSR_Type (line 259) | typedef union
type IPSR_Type (line 298) | typedef union
type xPSR_Type (line 316) | typedef union
type CONTROL_Type (line 371) | typedef union
type NVIC_Type (line 406) | typedef struct
type SCB_Type (line 440) | typedef struct
type SCnSCB_Type (line 719) | typedef struct
type SysTick_Type (line 759) | typedef struct
type DWT_Type (line 899) | typedef struct
type TPI_Type (line 1046) | typedef struct
type MPU_Type (line 1208) | typedef struct
type FPU_Type (line 1304) | typedef struct
type CoreDebug_Type (line 1416) | typedef struct
function __STATIC_INLINE (line 1648) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1667) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1679) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1698) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1717) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1736) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1755) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1770) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1787) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1809) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1831) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1856) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1883) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1906) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1922) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1933) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1976) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 2017) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2059) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2080) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2100) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_cm7.h
type APSR_Type (line 274) | typedef union
type IPSR_Type (line 313) | typedef union
type xPSR_Type (line 331) | typedef union
type CONTROL_Type (line 386) | typedef union
type NVIC_Type (line 421) | typedef struct
type SCB_Type (line 455) | typedef struct
type SCnSCB_Type (line 921) | typedef struct
type SysTick_Type (line 979) | typedef struct
type DWT_Type (line 1119) | typedef struct
type TPI_Type (line 1269) | typedef struct
type MPU_Type (line 1431) | typedef struct
type FPU_Type (line 1527) | typedef struct
type CoreDebug_Type (line 1639) | typedef struct
function __STATIC_INLINE (line 1871) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1890) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1902) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1921) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1940) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1959) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1978) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1993) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 2010) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 2032) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 2054) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 2079) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 2106) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 2129) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 2145) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 2156) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 2199) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_FORCEINLINE (line 2241) | __STATIC_FORCEINLINE void SCB_EnableICache (void)
function __STATIC_FORCEINLINE (line 2262) | __STATIC_FORCEINLINE void SCB_DisableICache (void)
function __STATIC_FORCEINLINE (line 2279) | __STATIC_FORCEINLINE void SCB_InvalidateICache (void)
function __STATIC_FORCEINLINE (line 2299) | __STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int3...
function __STATIC_FORCEINLINE (line 2325) | __STATIC_FORCEINLINE void SCB_EnableDCache (void)
function __STATIC_FORCEINLINE (line 2365) | __STATIC_FORCEINLINE void SCB_DisableDCache (void)
function __STATIC_FORCEINLINE (line 2403) | __STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
function __STATIC_FORCEINLINE (line 2438) | __STATIC_FORCEINLINE void SCB_CleanDCache (void)
function __STATIC_FORCEINLINE (line 2473) | __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
function __STATIC_FORCEINLINE (line 2512) | __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int3...
function __STATIC_FORCEINLINE (line 2542) | __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32...
function __STATIC_FORCEINLINE (line 2572) | __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *a...
function __STATIC_INLINE (line 2618) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 2660) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 2681) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 2701) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_sc000.h
type APSR_Type (line 205) | typedef union
type IPSR_Type (line 235) | typedef union
type xPSR_Type (line 253) | typedef union
type CONTROL_Type (line 292) | typedef union
type NVIC_Type (line 320) | typedef struct
type SCB_Type (line 347) | typedef struct
type SCnSCB_Type (line 460) | typedef struct
type SysTick_Type (line 483) | typedef struct
type MPU_Type (line 535) | typedef struct
function __STATIC_INLINE (line 749) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 768) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 787) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 806) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 825) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 840) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 858) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 882) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 905) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 921) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 932) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 965) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 996) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
FILE: SourceCode/Drivers/CMSIS/Core/Include/core_sc300.h
type APSR_Type (line 206) | typedef union
type IPSR_Type (line 240) | typedef union
type xPSR_Type (line 258) | typedef union
type CONTROL_Type (line 309) | typedef union
type NVIC_Type (line 340) | typedef struct
type SCB_Type (line 374) | typedef struct
type SCnSCB_Type (line 652) | typedef struct
type SysTick_Type (line 686) | typedef struct
type DWT_Type (line 826) | typedef struct
type TPI_Type (line 973) | typedef struct
type MPU_Type (line 1135) | typedef struct
type CoreDebug_Type (line 1229) | typedef struct
function __STATIC_INLINE (line 1455) | __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
function __STATIC_INLINE (line 1474) | __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
function __STATIC_INLINE (line 1486) | __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1505) | __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1524) | __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1543) | __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1562) | __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1577) | __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
function __STATIC_INLINE (line 1594) | __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
function __STATIC_INLINE (line 1616) | __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
function __STATIC_INLINE (line 1638) | __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
function __STATIC_INLINE (line 1663) | __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, ui...
function __STATIC_INLINE (line 1690) | __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t Pr...
function __STATIC_INLINE (line 1713) | __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
function __STATIC_INLINE (line 1729) | __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
function __NVIC_SystemReset (line 1740) | void __NVIC_SystemReset(void)
function __STATIC_INLINE (line 1774) | __STATIC_INLINE uint32_t SCB_GetFPUType(void)
function __STATIC_INLINE (line 1805) | __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
function __STATIC_INLINE (line 1847) | __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
function __STATIC_INLINE (line 1868) | __STATIC_INLINE int32_t ITM_ReceiveChar (void)
function __STATIC_INLINE (line 1888) | __STATIC_INLINE int32_t ITM_CheckChar (void)
FILE: SourceCode/Drivers/CMSIS/Core/Include/mpu_armv7.h
type ARM_MPU_Region_t (line 183) | typedef struct {
function __STATIC_INLINE (line 191) | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
function __STATIC_INLINE (line 203) | __STATIC_INLINE void ARM_MPU_Disable(void)
function __STATIC_INLINE (line 215) | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
function __STATIC_INLINE (line 225) | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
function __STATIC_INLINE (line 236) | __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, ui...
function __STATIC_INLINE (line 248) | __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const...
function __STATIC_INLINE (line 261) | __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_...
FILE: SourceCode/Drivers/CMSIS/Core/Include/mpu_armv8.h
type ARM_MPU_Region_t (line 122) | typedef struct {
function __STATIC_INLINE (line 130) | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
function __STATIC_INLINE (line 142) | __STATIC_INLINE void ARM_MPU_Disable(void)
function __STATIC_INLINE (line 155) | __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
function __STATIC_INLINE (line 167) | __STATIC_INLINE void ARM_MPU_Disable_NS(void)
function __STATIC_INLINE (line 182) | __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, ui...
function __STATIC_INLINE (line 199) | __STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
function __STATIC_INLINE (line 209) | __STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
function __STATIC_INLINE (line 219) | __STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
function __STATIC_INLINE (line 228) | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
function __STATIC_INLINE (line 237) | __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
function __STATIC_INLINE (line 249) | __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, ui...
function __STATIC_INLINE (line 261) | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint...
function __STATIC_INLINE (line 272) | __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, u...
function __STATIC_INLINE (line 283) | __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const...
function __STATIC_INLINE (line 298) | __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU...
function __STATIC_INLINE (line 328) | __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* ...
function __STATIC_INLINE (line 339) | __STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t cons...
FILE: SourceCode/Drivers/CMSIS/Core/Include/tz_context.h
type TZ_ModuleId_t (line 39) | typedef uint32_t TZ_ModuleId_t;
type TZ_MemoryId_t (line 43) | typedef uint32_t TZ_MemoryId_t;
FILE: SourceCode/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c
function main (line 40) | int main(void) {
FILE: SourceCode/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c
type stack_info_t (line 39) | typedef struct {
function TZ_InitContextSystem_S (line 52) | __attribute__((cmse_nonsecure_entry))
function TZ_MemoryId_t (line 85) | __attribute__((cmse_nonsecure_entry))
function TZ_FreeModuleContext_S (line 111) | __attribute__((cmse_nonsecure_entry))
function TZ_LoadContext_S (line 140) | __attribute__((cmse_nonsecure_entry))
function TZ_StoreContext_S (line 169) | __attribute__((cmse_nonsecure_entry))
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_armcc.h
function __REV16 (line 156) | uint32_t __REV16(uint32_t value)
function __REVSH (line 170) | int16_t __REVSH(int16_t value)
function __STATIC_INLINE (line 315) | __STATIC_INLINE uint32_t __get_FPSCR(void)
function __STATIC_INLINE (line 330) | __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
function __STATIC_INLINE (line 344) | __STATIC_INLINE uint32_t __get_CPSR(void)
function __STATIC_INLINE (line 354) | __STATIC_INLINE void __set_CPSR(uint32_t cpsr)
function __STATIC_INLINE (line 363) | __STATIC_INLINE uint32_t __get_mode(void)
function __set_mode (line 371) | void __set_mode(uint32_t mode)
function __set_SP_usr (line 416) | void __set_SP_usr(uint32_t topOfProcStack)
function __STATIC_INLINE (line 432) | __STATIC_INLINE uint32_t __get_FPEXC(void)
function __STATIC_INLINE (line 445) | __STATIC_INLINE void __set_FPEXC(uint32_t fpexc)
function __FPU_Enable (line 480) | void __FPU_Enable(void)
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_armclang.h
function __PACKED_STRUCT (line 72) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 80) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 88) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 95) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 190) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 220) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 348) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 356) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 370) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
function __STATIC_FORCEINLINE (line 399) | __STATIC_FORCEINLINE uint32_t __get_CPSR(void)
function __STATIC_FORCEINLINE (line 409) | __STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
function __STATIC_FORCEINLINE (line 417) | __STATIC_FORCEINLINE uint32_t __get_mode(void)
function __STATIC_FORCEINLINE (line 425) | __STATIC_FORCEINLINE void __set_mode(uint32_t mode)
function __STATIC_FORCEINLINE (line 433) | __STATIC_FORCEINLINE uint32_t __get_SP()
function __STATIC_FORCEINLINE (line 443) | __STATIC_FORCEINLINE void __set_SP(uint32_t stack)
function __STATIC_FORCEINLINE (line 451) | __STATIC_FORCEINLINE uint32_t __get_SP_usr()
function __STATIC_FORCEINLINE (line 468) | __STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 483) | __STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
function __STATIC_FORCEINLINE (line 497) | __STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
function __STATIC_INLINE (line 519) | __STATIC_INLINE void __FPU_Enable(void)
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_compiler.h
type T_UINT32 (line 92) | struct __attribute__((packed)) T_UINT32 { uint32_t v; }
function T_UINT32 (line 142) | struct __packed__ T_UINT32 { uint32_t v; }
function packed (line 191) | packed struct T_UINT32 { uint32_t v; }
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_cp15.h
function __STATIC_FORCEINLINE (line 37) | __STATIC_FORCEINLINE uint32_t __get_ACTLR(void)
function __STATIC_FORCEINLINE (line 47) | __STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr)
function __STATIC_FORCEINLINE (line 55) | __STATIC_FORCEINLINE uint32_t __get_CPACR(void)
function __STATIC_FORCEINLINE (line 65) | __STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr)
function __STATIC_FORCEINLINE (line 73) | __STATIC_FORCEINLINE uint32_t __get_DFSR(void)
function __STATIC_FORCEINLINE (line 83) | __STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr)
function __STATIC_FORCEINLINE (line 91) | __STATIC_FORCEINLINE uint32_t __get_IFSR(void)
function __STATIC_FORCEINLINE (line 101) | __STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr)
function __STATIC_FORCEINLINE (line 109) | __STATIC_FORCEINLINE uint32_t __get_ISR(void)
function __STATIC_FORCEINLINE (line 119) | __STATIC_FORCEINLINE uint32_t __get_CBAR(void)
function __STATIC_FORCEINLINE (line 132) | __STATIC_FORCEINLINE uint32_t __get_TTBR0(void)
function __STATIC_FORCEINLINE (line 145) | __STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0)
function __STATIC_FORCEINLINE (line 156) | __STATIC_FORCEINLINE uint32_t __get_DACR(void)
function __STATIC_FORCEINLINE (line 169) | __STATIC_FORCEINLINE void __set_DACR(uint32_t dacr)
function __STATIC_FORCEINLINE (line 180) | __STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr)
function __STATIC_FORCEINLINE (line 188) | __STATIC_FORCEINLINE uint32_t __get_SCTLR(void)
function __STATIC_FORCEINLINE (line 198) | __STATIC_FORCEINLINE void __set_ACTRL(uint32_t actrl)
function __STATIC_FORCEINLINE (line 206) | __STATIC_FORCEINLINE uint32_t __get_ACTRL(void)
function __STATIC_FORCEINLINE (line 219) | __STATIC_FORCEINLINE uint32_t __get_MPIDR(void)
function __STATIC_FORCEINLINE (line 232) | __STATIC_FORCEINLINE uint32_t __get_VBAR(void)
function __STATIC_FORCEINLINE (line 245) | __STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar)
function __STATIC_FORCEINLINE (line 256) | __STATIC_FORCEINLINE uint32_t __get_MVBAR(void)
function __STATIC_FORCEINLINE (line 269) | __STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar)
function __STATIC_FORCEINLINE (line 284) | __STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value)
function __STATIC_FORCEINLINE (line 295) | __STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void)
function __STATIC_FORCEINLINE (line 308) | __STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value)
function __STATIC_FORCEINLINE (line 319) | __STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void)
function __STATIC_FORCEINLINE (line 332) | __STATIC_FORCEINLINE uint64_t __get_CNTPCT(void)
function __STATIC_FORCEINLINE (line 345) | __STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value)
function __STATIC_FORCEINLINE (line 356) | __STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void)
function __STATIC_FORCEINLINE (line 369) | __STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value)
function __STATIC_FORCEINLINE (line 377) | __STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)
function __STATIC_FORCEINLINE (line 390) | __STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value)
function __STATIC_FORCEINLINE (line 399) | __STATIC_FORCEINLINE void __set_BPIALL(uint32_t value)
function __STATIC_FORCEINLINE (line 408) | __STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value)
function __STATIC_FORCEINLINE (line 417) | __STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value)
function __STATIC_FORCEINLINE (line 426) | __STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value)
function __STATIC_FORCEINLINE (line 435) | __STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value)
function __STATIC_FORCEINLINE (line 442) | __STATIC_FORCEINLINE void __set_CSSELR(uint32_t value)
function __STATIC_FORCEINLINE (line 451) | __STATIC_FORCEINLINE uint32_t __get_CSSELR(void)
function __set_CCSIDR (line 463) | void __set_CCSIDR(uint32_t value)
function __STATIC_FORCEINLINE (line 471) | __STATIC_FORCEINLINE uint32_t __get_CCSIDR(void)
function __STATIC_FORCEINLINE (line 482) | __STATIC_FORCEINLINE uint32_t __get_CLIDR(void)
function __STATIC_FORCEINLINE (line 492) | __STATIC_FORCEINLINE void __set_DCISW(uint32_t value)
function __STATIC_FORCEINLINE (line 500) | __STATIC_FORCEINLINE void __set_DCCSW(uint32_t value)
function __STATIC_FORCEINLINE (line 508) | __STATIC_FORCEINLINE void __set_DCCISW(uint32_t value)
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_gcc.h
function __PACKED_STRUCT (line 78) | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }
function __PACKED_STRUCT (line 86) | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }
function __PACKED_STRUCT (line 94) | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }
function __PACKED_STRUCT (line 101) | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }
function __STATIC_FORCEINLINE (line 113) | __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 122) | __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 130) | __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 138) | __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 155) | __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
function __STATIC_FORCEINLINE (line 163) | __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 174) | __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint3...
function __STATIC_FORCEINLINE (line 182) | __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 190) | __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint...
function __STATIC_FORCEINLINE (line 198) | __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uin...
function __STATIC_FORCEINLINE (line 215) | __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t ...
function __STATIC_INLINE (line 304) | __attribute__((section(".rev16_text"))) __STATIC_INLINE uint32_t __REV16...
function __STATIC_FORCEINLINE (line 318) | __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
function __STATIC_FORCEINLINE (line 337) | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
function __STATIC_FORCEINLINE (line 360) | __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
function __STATIC_FORCEINLINE (line 388) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
function __STATIC_FORCEINLINE (line 412) | __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
function __STATIC_FORCEINLINE (line 434) | __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
function __STATIC_FORCEINLINE (line 456) | __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
function __STATIC_FORCEINLINE (line 473) | __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t ...
function __STATIC_FORCEINLINE (line 490) | __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_...
function __STATIC_FORCEINLINE (line 507) | __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_...
function __STATIC_FORCEINLINE (line 520) | __STATIC_FORCEINLINE void __CLREX(void)
function __STATIC_FORCEINLINE (line 608) | __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
function __STATIC_FORCEINLINE (line 628) | __STATIC_FORCEINLINE uint32_t __get_CPSR(void)
function __STATIC_FORCEINLINE (line 638) | __STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
function __STATIC_FORCEINLINE (line 646) | __STATIC_FORCEINLINE uint32_t __get_mode(void)
function __STATIC_FORCEINLINE (line 654) | __STATIC_FORCEINLINE void __set_mode(uint32_t mode)
function __STATIC_FORCEINLINE (line 662) | __STATIC_FORCEINLINE uint32_t __get_SP(void)
function __STATIC_FORCEINLINE (line 672) | __STATIC_FORCEINLINE void __set_SP(uint32_t stack)
function __STATIC_FORCEINLINE (line 680) | __STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
function __STATIC_FORCEINLINE (line 696) | __STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
function __STATIC_FORCEINLINE (line 710) | __STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
function __STATIC_FORCEINLINE (line 724) | __STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
function __STATIC_INLINE (line 746) | __STATIC_INLINE void __FPU_Enable(void)
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/cmsis_iccarm.h
function __IAR_FT (line 144) | __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
function __IAR_FT (line 156) | __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
function __IAR_FT (line 167) | __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
function __IAR_FT (line 178) | __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
function __packed (line 190) | __packed struct __iar_u32 { uint32_t v; }
function __IAR_FT (line 293) | __IAR_FT int16_t __REVSH(int16_t val)
function __IAR_FT (line 404) | __IAR_FT void __set_mode(uint32_t mode)
function __IAR_FT (line 409) | __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
function __IAR_FT (line 414) | __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
function __IAR_FT (line 420) | __IAR_FT uint32_t __RRX(uint32_t value)
function __IAR_FT (line 428) | __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
function __IAR_FT (line 433) | __IAR_FT uint32_t __get_FPEXC(void)
function __IAR_FT (line 444) | __IAR_FT void __set_FPEXC(uint32_t fpexc)
function __IAR_FT (line 468) | __IAR_FT uint32_t __get_SP_usr(void)
function __IAR_FT (line 482) | __IAR_FT void __set_SP_usr(uint32_t topOfProcStack)
function __STATIC_INLINE (line 496) | __STATIC_INLINE
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/core_ca.h
type CPSR_Type (line 192) | typedef union
FILE: SourceCode/Drivers/CMSIS/Core_A/Include/irq_ctrl.h
type IRQn_ID_t (line 45) | typedef int32_t IRQn_ID_t;
FILE: SourceCode/Drivers/CMSIS/Core_A/Source/irq_ctrl_gic.c
function __WEAK (line 43) | __WEAK int32_t IRQ_Initialize (void) {
function __WEAK (line 55) | __WEAK int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler) {
function __WEAK (line 70) | __WEAK IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn) {
function __WEAK (line 87) | __WEAK int32_t IRQ_Enable (IRQn_ID_t irqn) {
function __WEAK (line 102) | __WEAK int32_t IRQ_Disable (IRQn_ID_t irqn) {
function __WEAK (line 117) | __WEAK uint32_t IRQ_GetEnableState (IRQn_ID_t irqn) {
function __WEAK (line 131) | __WEAK int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode) {
function __WEAK (line 201) | __WEAK uint32_t IRQ_GetMode (IRQn_ID_t irqn) {
function __WEAK (line 231) | __WEAK IRQn_ID_t IRQ_GetActiveIRQ (void) {
function __WEAK (line 269) | __WEAK IRQn_ID_t IRQ_GetActiveFIQ (void) {
function __WEAK (line 275) | __WEAK int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn) {
function __WEAK (line 298) | __WEAK int32_t IRQ_SetPending (IRQn_ID_t irqn) {
function __WEAK (line 312) | __WEAK uint32_t IRQ_GetPending (IRQn_ID_t irqn) {
function __WEAK (line 326) | __WEAK int32_t IRQ_ClearPending (IRQn_ID_t irqn) {
function __WEAK (line 341) | __WEAK int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority) {
function __WEAK (line 356) | __WEAK uint32_t IRQ_GetPriority (IRQn_ID_t irqn) {
function __WEAK (line 370) | __WEAK int32_t IRQ_SetPriorityMask (uint32_t priority) {
function __WEAK (line 377) | __WEAK uint32_t IRQ_GetPriorityMask (void) {
function __WEAK (line 383) | __WEAK int32_t IRQ_SetPriorityGroupBits (uint32_t bits) {
function __WEAK (line 402) | __WEAK uint32_t IRQ_GetPriorityGroupBits (void) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/arr_desc/arr_desc.h
type ARR_DESC_t (line 18) | typedef struct ARR_DESC_struct
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h
type JTEST_FW_t (line 21) | typedef struct JTEST_FW_struct
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_group.h
type JTEST_GROUP_t (line 19) | typedef struct JTEST_GROUP_struct
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test.h
type JTEST_TEST_t (line 20) | typedef struct JTEST_TEST_struct
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test_ret.h
type JTEST_TEST_RET_t (line 11) | typedef enum JTEST_TEST_RET_enum
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_dump_str_segments.c
function jtest_dump_str_segments (line 9) | void jtest_dump_str_segments(void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_trigger_action.c
function test_start (line 4) | void test_start (void) {
function test_end (line 9) | void test_end (void) {
function group_start (line 14) | void group_start (void) {
function group_end (line 19) | void group_end (void) {
function dump_str (line 24) | void dump_str (void) {
function dump_data (line 29) | void dump_data (void) {
function exit_fw (line 34) | void exit_fw (void) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/Retarget.c
type __FILE (line 24) | struct __FILE { int handle; /* Add whatever you need here */ }
function fputc (line 29) | int fputc(int c, FILE *f) {
function fgetc (line 34) | int fgetc(FILE *f) {
function ferror (line 39) | int ferror(FILE *f) {
function _ttywrch (line 45) | void _ttywrch(int c) {
function _sys_exit (line 50) | void _sys_exit(int return_code) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/GCC/Retarget.c
function SER_PutChar (line 20) | int SER_PutChar (int c) {
function SER_GetChar (line 25) | int SER_GetChar (void) {
function _open (line 35) | int _open (const char * path, int flags, ...)
function _close (line 40) | int _close (int fd)
function _lseek (line 45) | int _lseek (int fd, int ptr, int dir)
function _fstat (line 50) | int __attribute__((weak)) _fstat (int fd, struct stat * st)
function _isatty (line 57) | int _isatty (int fd)
function _read (line 62) | int _read (int fd, char * ptr, int len)
function _write (line 77) | int _write (int fd, char * ptr, int len)
function caddr_t (line 85) | caddr_t _sbrk (int incr)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM23.c
function SystemCoreClockUpdate (line 62) | void SystemCoreClockUpdate (void)
function SystemInit (line 70) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM33.c
function SystemCoreClockUpdate (line 70) | void SystemCoreClockUpdate (void)
function SystemInit (line 78) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMSC000.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMSC300.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMv8MBL.c
function SystemCoreClockUpdate (line 56) | void SystemCoreClockUpdate (void)
function SystemInit (line 64) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMv8MML.c
function SystemCoreClockUpdate (line 70) | void SystemCoreClockUpdate (void)
function SystemInit (line 78) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c
function JTEST_DEFINE_GROUP (line 13) | JTEST_DEFINE_GROUP(all_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/abs_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(abs_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/add_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(add_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/basic_math_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(basic_math_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/dot_prod_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(dot_prod_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/mult_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(mult_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/negate_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(negate_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/offset_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(offset_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/scale_tests.c
function JTEST_DEFINE_GROUP (line 46) | JTEST_DEFINE_GROUP(scale_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/shift_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(shift_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/sub_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(sub_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_conj_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_conj_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_dot_prod_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_dot_prod_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mag_squared_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_mag_squared_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mag_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_mag_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mult_cmplx_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_mult_cmplx_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mult_real_test.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(cmplx_mult_real_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/complex_math_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(complex_math_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/controller_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(controller_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/pid_reset_tests.c
function JTEST_DEFINE_GROUP (line 44) | JTEST_DEFINE_GROUP(pid_reset_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/pid_tests.c
function JTEST_DEFINE_GROUP (line 71) | JTEST_DEFINE_GROUP(pid_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/sin_cos_tests.c
function JTEST_DEFINE_GROUP (line 144) | JTEST_DEFINE_GROUP(sin_cos_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests.c
function JTEST_DEFINE_GROUP (line 23) | JTEST_DEFINE_GROUP(fast_math_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/biquad_tests.c
function JTEST_DEFINE_GROUP (line 230) | JTEST_DEFINE_GROUP(biquad_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c
function JTEST_DEFINE_GROUP (line 443) | JTEST_DEFINE_GROUP(conv_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/correlate_tests.c
function JTEST_DEFINE_GROUP (line 293) | JTEST_DEFINE_GROUP(correlate_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(filtering_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/fir_tests.c
function JTEST_DEFINE_GROUP (line 372) | JTEST_DEFINE_GROUP(fir_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/iir_tests.c
function JTEST_DEFINE_GROUP (line 68) | JTEST_DEFINE_GROUP(iir_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/lms_tests.c
function JTEST_DEFINE_GROUP (line 207) | JTEST_DEFINE_GROUP(lms_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/intrinsics_tests/intrinsics_tests.c
function JTEST_DEFINE_GROUP (line 35) | JTEST_DEFINE_GROUP(intrinsics_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/main.c
function debug_init (line 11) | void debug_init(void)
function main (line 17) | int main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c
function arm_snr_f32 (line 51) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_snr_f64 (line 109) | double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 175) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 193) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 219) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSam...
function arm_compare_fixed_q31 (line 247) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 277) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 299) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 321) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 345) | void arm_apply_guard_bits (float32_t * pIn,
function arm_calc_2pow (line 362) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 384) | void arm_float_to_q14 (float *pIn, q15_t * pOut,
function arm_float_to_q30 (line 413) | void arm_float_to_q30 (float *pIn, q31_t * pOut,
function arm_float_to_q29 (line 439) | void arm_float_to_q29 (float *pIn, q31_t * pOut,
function arm_float_to_q28 (line 466) | void arm_float_to_q28 (float *pIn, q31_t * pOut,
function arm_clip_f32 (line 493) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_add_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(mat_add_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_cmplx_mult_tests.c
function JTEST_DEFINE_GROUP (line 51) | JTEST_DEFINE_GROUP(mat_cmplx_mult_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_init_tests.c
function JTEST_DEFINE_GROUP (line 50) | JTEST_DEFINE_GROUP(mat_init_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_inverse_tests.c
function JTEST_DEFINE_GROUP (line 85) | JTEST_DEFINE_GROUP(mat_inverse_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_mult_fast_tests.c
function JTEST_DEFINE_GROUP (line 50) | JTEST_DEFINE_GROUP(mat_mult_fast_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_mult_tests.c
function JTEST_DEFINE_GROUP (line 51) | JTEST_DEFINE_GROUP(mat_mult_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_scale_tests.c
function JTEST_DEFINE_GROUP (line 82) | JTEST_DEFINE_GROUP(mat_scale_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_sub_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(mat_sub_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_trans_tests.c
function JTEST_DEFINE_GROUP (line 25) | JTEST_DEFINE_GROUP(mat_trans_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(matrix_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/max_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(max_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/mean_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(mean_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/min_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(min_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/power_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(power_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/rms_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(rms_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/statistics_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(statistics_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/std_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(std_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/var_tests.c
function JTEST_DEFINE_GROUP (line 26) | JTEST_DEFINE_GROUP(var_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/support_tests/copy_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(copy_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/support_tests/fill_tests.c
function JTEST_DEFINE_GROUP (line 27) | JTEST_DEFINE_GROUP(fill_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/support_tests/support_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(support_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/support_tests/x_to_y_tests.c
function JTEST_DEFINE_GROUP (line 60) | JTEST_DEFINE_GROUP(x_to_y_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/cfft_family_tests.c
function JTEST_DEFINE_GROUP (line 161) | JTEST_DEFINE_GROUP(cfft_family_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/cfft_tests.c
function JTEST_DEFINE_GROUP (line 134) | JTEST_DEFINE_GROUP(cfft_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/dct4_tests.c
function JTEST_DEFINE_GROUP (line 192) | JTEST_DEFINE_GROUP(dct4_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/rfft_fast_tests.c
function JTEST_DEFINE_GROUP (line 71) | JTEST_DEFINE_GROUP(rfft_fast_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/rfft_tests.c
function JTEST_DEFINE_GROUP (line 87) | JTEST_DEFINE_GROUP(rfft_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/transform_tests/transform_test_group.c
function JTEST_DEFINE_GROUP (line 4) | JTEST_DEFINE_GROUP(transform_tests)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c
function osRtxIdleThread (line 32) | void osRtxIdleThread (void *argument) {
function __WEAK (line 39) | __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c
function CDAbtHandler (line 53) | void CDAbtHandler(uint32_t DFSR, uint32_t DFAR, uint32_t LR) {
function CPAbtHandler (line 88) | void CPAbtHandler(uint32_t IFSR, uint32_t IFAR, uint32_t LR) {
function CUndefHandler (line 124) | uint32_t CUndefHandler(uint32_t opcode, uint32_t state, uint32_t LR) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c
function MMU_CreateTranslationTable (line 139) | void MMU_CreateTranslationTable(void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c
function Vectors (line 60) | void Vectors(void) {
function Reset_Handler (line 76) | void Reset_Handler(void) {
function Default_Handler (line 136) | void Default_Handler(void) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c
function SystemCoreClockUpdate (line 42) | void SystemCoreClockUpdate (void)
function SystemInit (line 50) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c
function main (line 27) | int main (void) {
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h
type dataType (line 53) | typedef enum
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/abs.c
function ref_abs_f32 (line 3) | void ref_abs_f32(
function ref_abs_q31 (line 16) | void ref_abs_q31(
function ref_abs_q15 (line 29) | void ref_abs_q15(
function ref_abs_q7 (line 42) | void ref_abs_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/add.c
function ref_add_f32 (line 3) | void ref_add_f32(
function ref_add_q31 (line 17) | void ref_add_q31(
function ref_add_q15 (line 31) | void ref_add_q15(
function ref_add_q7 (line 45) | void ref_add_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/dot_prod.c
function ref_dot_prod_f32 (line 3) | void ref_dot_prod_f32(
function ref_dot_prod_q31 (line 19) | void ref_dot_prod_q31(
function ref_dot_prod_q15 (line 35) | void ref_dot_prod_q15(
function ref_dot_prod_q7 (line 51) | void ref_dot_prod_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/mult.c
function ref_mult_f32 (line 3) | void ref_mult_f32(
function ref_mult_q31 (line 17) | void ref_mult_q31(
function ref_mult_q15 (line 34) | void ref_mult_q15(
function ref_mult_q7 (line 50) | void ref_mult_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/negate.c
function ref_negate_f32 (line 3) | void ref_negate_f32(
function ref_negate_q31 (line 16) | void ref_negate_q31(
function ref_negate_q15 (line 29) | void ref_negate_q15(
function ref_negate_q7 (line 42) | void ref_negate_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/offset.c
function ref_offset_f32 (line 3) | void ref_offset_f32(
function ref_offset_q31 (line 17) | void ref_offset_q31(
function ref_offset_q15 (line 31) | void ref_offset_q15(
function ref_offset_q7 (line 45) | void ref_offset_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/scale.c
function ref_scale_f32 (line 3) | void ref_scale_f32(
function ref_scale_q31 (line 17) | void ref_scale_q31(
function ref_scale_q15 (line 39) | void ref_scale_q15(
function ref_scale_q7 (line 55) | void ref_scale_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/shift.c
function ref_shift_q31 (line 3) | void ref_shift_q31(
function ref_shift_q15 (line 27) | void ref_shift_q15(
function ref_shift_q7 (line 51) | void ref_shift_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/sub.c
function ref_sub_f32 (line 3) | void ref_sub_f32(
function ref_sub_q31 (line 17) | void ref_sub_q31(
function ref_sub_q15 (line 31) | void ref_sub_q15(
function ref_sub_q7 (line 45) | void ref_sub_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_conj.c
function ref_cmplx_conj_f32 (line 3) | void ref_cmplx_conj_f32(
function ref_cmplx_conj_q31 (line 16) | void ref_cmplx_conj_q31(
function ref_cmplx_conj_q15 (line 29) | void ref_cmplx_conj_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_dot_prod.c
function ref_cmplx_dot_prod_f32 (line 3) | void ref_cmplx_dot_prod_f32(
function ref_cmplx_dot_prod_q31 (line 26) | void ref_cmplx_dot_prod_q31(
function ref_cmplx_dot_prod_q15 (line 50) | void ref_cmplx_dot_prod_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_mag.c
function ref_cmplx_mag_f32 (line 3) | void ref_cmplx_mag_f32(
function ref_cmplx_mag_q31 (line 16) | void ref_cmplx_mag_q31(
function ref_cmplx_mag_q15 (line 33) | void ref_cmplx_mag_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_mag_squared.c
function ref_cmplx_mag_squared_f32 (line 3) | void ref_cmplx_mag_squared_f32(
function ref_cmplx_mag_squared_q31 (line 16) | void ref_cmplx_mag_squared_q31(
function ref_cmplx_mag_squared_q15 (line 32) | void ref_cmplx_mag_squared_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_mult_cmplx.c
function ref_cmplx_mult_cmplx_f32 (line 3) | void ref_cmplx_mult_cmplx_f32(
function ref_cmplx_mult_cmplx_q31 (line 18) | void ref_cmplx_mult_cmplx_q31(
function ref_cmplx_mult_cmplx_q15 (line 38) | void ref_cmplx_mult_cmplx_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/cmplx_mult_real.c
function ref_cmplx_mult_real_f32 (line 3) | void ref_cmplx_mult_real_f32(
function ref_cmplx_mult_real_q31 (line 18) | void ref_cmplx_mult_real_q31(
function ref_cmplx_mult_real_q15 (line 36) | void ref_cmplx_mult_real_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/pid.c
function float32_t (line 3) | float32_t ref_pid_f32(
function q31_t (line 21) | q31_t ref_pid_q31(
function q15_t (line 52) | q15_t ref_pid_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/sin_cos.c
function ref_sin_cos_f32 (line 3) | void ref_sin_cos_f32(
function ref_sin_cos_q31 (line 13) | void ref_sin_cos_q31(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/cos.c
function q31_t (line 3) | q31_t ref_cos_q31(q31_t x)
function q15_t (line 8) | q15_t ref_cos_q15(q15_t x)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/sin.c
function q31_t (line 3) | q31_t ref_sin_q31(q31_t x)
function q15_t (line 8) | q15_t ref_sin_q15(q15_t x)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/sqrt.c
function arm_status (line 3) | arm_status ref_sqrt_q31(q31_t in, q31_t * pOut)
function arm_status (line 10) | arm_status ref_sqrt_q15(q15_t in, q15_t * pOut)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
function ref_biquad_cascade_df2T_f32 (line 3) | void ref_biquad_cascade_df2T_f32(
function ref_biquad_cascade_stereo_df2T_f32 (line 73) | void ref_biquad_cascade_stereo_df2T_f32(
function ref_biquad_cascade_df2T_f64 (line 152) | void ref_biquad_cascade_df2T_f64(
function ref_biquad_cascade_df1_f32 (line 221) | void ref_biquad_cascade_df1_f32(
function ref_biquad_cas_df1_32x64_q31 (line 303) | void ref_biquad_cas_df1_32x64_q31(
function ref_biquad_cascade_df1_q31 (line 392) | void ref_biquad_cascade_df1_q31(
function ref_biquad_cascade_df1_fast_q31 (line 487) | void ref_biquad_cascade_df1_fast_q31(
function ref_biquad_cascade_df1_fast_q15 (line 565) | void ref_biquad_cascade_df1_fast_q15(
function ref_biquad_cascade_df1_q15 (line 640) | void ref_biquad_cascade_df1_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/conv.c
function ref_conv_f32 (line 3) | void ref_conv_f32(
function arm_status (line 34) | arm_status ref_conv_partial_f32(
function ref_conv_q31 (line 48) | void ref_conv_q31(
function ref_conv_fast_q31 (line 80) | void ref_conv_fast_q31(
function arm_status (line 113) | arm_status ref_conv_partial_q31(
function arm_status (line 127) | arm_status ref_conv_partial_fast_q31(
function ref_conv_q15 (line 141) | void ref_conv_q15(
function arm_status (line 173) | arm_status ref_conv_partial_fast_opt_q15(
function ref_conv_fast_q15 (line 211) | void ref_conv_fast_q15(
function ref_conv_fast_opt_q15 (line 243) | void ref_conv_fast_opt_q15(
function arm_status (line 277) | arm_status ref_conv_partial_q15(
function arm_status (line 291) | arm_status ref_conv_partial_fast_q15(
function ref_conv_q7 (line 306) | void ref_conv_q7(
function arm_status (line 338) | arm_status ref_conv_partial_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/correlate.c
function ref_correlate_f32 (line 3) | void ref_correlate_f32(
function ref_correlate_q31 (line 87) | void ref_correlate_q31(
function ref_correlate_fast_q31 (line 158) | void ref_correlate_fast_q31(
function ref_correlate_q15 (line 230) | void ref_correlate_q15(
function ref_correlate_fast_q15 (line 301) | void ref_correlate_fast_q15(
function ref_correlate_fast_opt_q15 (line 372) | void ref_correlate_fast_opt_q15(
function ref_correlate_q7 (line 444) | void ref_correlate_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
function ref_fir_f32 (line 3) | void ref_fir_f32(
function ref_fir_q31 (line 57) | void ref_fir_q31(
function ref_fir_fast_q31 (line 111) | void ref_fir_fast_q31(
function ref_fir_q15 (line 165) | void ref_fir_q15(
function ref_fir_fast_q15 (line 219) | void ref_fir_fast_q15(
function ref_fir_q7 (line 273) | void ref_fir_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
function ref_fir_decimate_f32 (line 3) | void ref_fir_decimate_f32(
function ref_fir_decimate_q31 (line 79) | void ref_fir_decimate_q31(
function ref_fir_decimate_fast_q31 (line 156) | void ref_fir_decimate_fast_q31(
function ref_fir_decimate_q15 (line 233) | void ref_fir_decimate_q15(
function ref_fir_decimate_fast_q15 (line 310) | void ref_fir_decimate_fast_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
function ref_fir_interpolate_f32 (line 3) | void ref_fir_interpolate_f32(
function ref_fir_interpolate_q31 (line 95) | void ref_fir_interpolate_q31(
function ref_fir_interpolate_q15 (line 194) | void ref_fir_interpolate_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
function ref_fir_lattice_f32 (line 3) | void ref_fir_lattice_f32(
function ref_fir_lattice_q31 (line 79) | void ref_fir_lattice_q31(
function ref_fir_lattice_q15 (line 156) | void ref_fir_lattice_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
function ref_fir_sparse_f32 (line 3) | void ref_fir_sparse_f32(
function ref_fir_sparse_q31 (line 112) | void ref_fir_sparse_q31(
function ref_fir_sparse_q15 (line 239) | void ref_fir_sparse_q15(
function ref_fir_sparse_q7 (line 360) | void ref_fir_sparse_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/iir_lattice.c
function ref_iir_lattice_f32 (line 3) | void ref_iir_lattice_f32(
function ref_iir_lattice_q31 (line 89) | void ref_iir_lattice_q31(
function ref_iir_lattice_q15 (line 181) | void ref_iir_lattice_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/lms.c
function ref_lms_f32 (line 3) | void ref_lms_f32(
function ref_lms_norm_f32 (line 74) | void ref_lms_norm_f32(
function ref_lms_q31 (line 160) | void ref_lms_q31(
function ref_lms_norm_q31 (line 276) | void ref_lms_norm_q31(
function ref_lms_q15 (line 420) | void ref_lms_q15(
function ref_lms_norm_q15 (line 538) | void ref_lms_norm_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/mat_helper.c
function float32_t (line 3) | float32_t ref_detrm(float32_t *pSrc, float32_t *temp, uint32_t size)
function ref_cofact (line 53) | void ref_cofact(float32_t *pSrc, float32_t *pDst, float32_t *temp, uint3...
function float64_t (line 100) | float64_t ref_detrm64(float64_t *pSrc, float64_t *temp, uint32_t size)
function ref_cofact64 (line 150) | void ref_cofact64(float64_t *pSrc, float64_t *pDst, float64_t *temp, uin...
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/ref_helper.c
function q31_t (line 7) | q31_t ref_sat_n(q31_t num, uint32_t bits)
function q31_t (line 39) | q31_t ref_sat_q31(q63_t num)
function q15_t (line 55) | q15_t ref_sat_q15(q31_t num)
function q7_t (line 71) | q7_t ref_sat_q7(q15_t num)
function float32_t (line 87) | float32_t ref_pow(float32_t a, uint32_t b)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/intrinsics.c
function q31_t (line 3) | q31_t ref__QADD8(q31_t x, q31_t y)
function q31_t (line 24) | q31_t ref__QSUB8(q31_t x, q31_t y)
function q31_t (line 42) | q31_t ref__QADD16(q31_t x, q31_t y)
function q31_t (line 59) | q31_t ref__SHADD16(q31_t x, q31_t y)
function q31_t (line 76) | q31_t ref__QSUB16(q31_t x, q31_t y)
function q31_t (line 92) | q31_t ref__SHSUB16(q31_t x, q31_t y)
function q31_t (line 108) | q31_t ref__QASX(q31_t x, q31_t y)
function q31_t (line 128) | q31_t ref__SHASX(q31_t x, q31_t y)
function q31_t (line 144) | q31_t ref__QSAX(q31_t x, q31_t y)
function q31_t (line 164) | q31_t ref__SHSAX(q31_t x, q31_t y)
function q31_t (line 180) | q31_t ref__SMUSDX(q31_t x, q31_t y)
function q31_t (line 185) | q31_t ref__SMUADX(q31_t x, q31_t y)
function q31_t (line 190) | q31_t ref__QADD(q31_t x, q31_t y)
function q31_t (line 195) | q31_t ref__QSUB(q31_t x, q31_t y)
function q31_t (line 200) | q31_t ref__SMLAD(q31_t x, q31_t y, q31_t sum)
function q31_t (line 205) | q31_t ref__SMLADX(q31_t x, q31_t y, q31_t sum)
function q31_t (line 210) | q31_t ref__SMLSDX(q31_t x, q31_t y, q31_t sum)
function q63_t (line 215) | q63_t ref__SMLALD(q31_t x, q31_t y, q63_t sum)
function q63_t (line 220) | q63_t ref__SMLALDX(q31_t x, q31_t y, q63_t sum)
function q31_t (line 225) | q31_t ref__SMUAD(q31_t x, q31_t y)
function q31_t (line 230) | q31_t ref__SMUSD(q31_t x, q31_t y)
function q31_t (line 235) | q31_t ref__SXTB16(q31_t x)
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_add.c
function arm_status (line 3) | arm_status ref_mat_add_f32(
function arm_status (line 22) | arm_status ref_mat_add_q31(
function arm_status (line 41) | arm_status ref_mat_add_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_cmplx_mult.c
function arm_status (line 3) | arm_status ref_mat_cmplx_mult_f32(
function arm_status (line 42) | arm_status ref_mat_cmplx_mult_q31(
function arm_status (line 81) | arm_status ref_mat_cmplx_mult_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_inverse.c
function arm_status (line 3) | arm_status ref_mat_inverse_f32(
function arm_status (line 31) | arm_status ref_mat_inverse_f64(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_mult.c
function arm_status (line 3) | arm_status ref_mat_mult_f32(
function arm_status (line 33) | arm_status ref_mat_mult_q31(
function arm_status (line 63) | arm_status ref_mat_mult_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_scale.c
function arm_status (line 3) | arm_status ref_mat_scale_f32(
function arm_status (line 22) | arm_status ref_mat_scale_q31(
function arm_status (line 45) | arm_status ref_mat_scale_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_sub.c
function arm_status (line 3) | arm_status ref_mat_sub_f32(
function arm_status (line 22) | arm_status ref_mat_sub_q31(
function arm_status (line 41) | arm_status ref_mat_sub_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/mat_trans.c
function arm_status (line 3) | arm_status ref_mat_trans_f64(
function arm_status (line 22) | arm_status ref_mat_trans_f32(
function arm_status (line 41) | arm_status ref_mat_trans_q31(
function arm_status (line 60) | arm_status ref_mat_trans_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/max.c
function ref_max_f32 (line 3) | void ref_max_f32(
function ref_max_q31 (line 24) | void ref_max_q31(
function ref_max_q15 (line 45) | void ref_max_q15(
function ref_max_q7 (line 66) | void ref_max_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/mean.c
function ref_mean_f32 (line 3) | void ref_mean_f32(
function ref_mean_q31 (line 18) | void ref_mean_q31(
function ref_mean_q15 (line 33) | void ref_mean_q15(
function ref_mean_q7 (line 48) | void ref_mean_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/min.c
function ref_min_f32 (line 3) | void ref_min_f32(
function ref_min_q31 (line 24) | void ref_min_q31(
function ref_min_q15 (line 45) | void ref_min_q15(
function ref_min_q7 (line 66) | void ref_min_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/power.c
function ref_power_f32 (line 3) | void ref_power_f32(
function ref_power_q31 (line 18) | void ref_power_q31(
function ref_power_q15 (line 33) | void ref_power_q15(
function ref_power_q7 (line 48) | void ref_power_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c
function ref_rms_f32 (line 3) | void ref_rms_f32(
function ref_rms_q31 (line 18) | void ref_rms_q31(
function ref_rms_q15 (line 48) | void ref_rms_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/std.c
function ref_std_f32 (line 3) | void ref_std_f32(
function ref_std_q31 (line 25) | void ref_std_q31(
function ref_std_q15 (line 51) | void ref_std_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/var.c
function ref_var_f32 (line 3) | void ref_var_f32(
function ref_var_q31 (line 25) | void ref_var_q31(
function ref_var_q15 (line 49) | void ref_var_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/copy.c
function ref_copy_f32 (line 3) | void ref_copy_f32(
function ref_copy_q31 (line 16) | void ref_copy_q31(
function ref_copy_q15 (line 29) | void ref_copy_q15(
function ref_copy_q7 (line 42) | void ref_copy_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/fill.c
function ref_fill_f32 (line 3) | void ref_fill_f32(
function ref_fill_q31 (line 16) | void ref_fill_q31(
function ref_fill_q15 (line 29) | void ref_fill_q15(
function ref_fill_q7 (line 42) | void ref_fill_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/fixed_to_fixed.c
function ref_q31_to_q15 (line 3) | void ref_q31_to_q15(
function ref_q31_to_q7 (line 16) | void ref_q31_to_q7(
function ref_q15_to_q31 (line 29) | void ref_q15_to_q31(
function ref_q15_to_q7 (line 42) | void ref_q15_to_q7(
function ref_q7_to_q31 (line 55) | void ref_q7_to_q31(
function ref_q7_to_q15 (line 68) | void ref_q7_to_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/fixed_to_float.c
function ref_q63_to_float (line 3) | void ref_q63_to_float(
function ref_q31_to_float (line 16) | void ref_q31_to_float(
function ref_q15_to_float (line 29) | void ref_q15_to_float(
function ref_q7_to_float (line 42) | void ref_q7_to_float(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/float_to_fixed.c
function ref_float_to_q31 (line 3) | void ref_float_to_q31(
function ref_float_to_q15 (line 20) | void ref_float_to_q15(
function ref_float_to_q7 (line 37) | void ref_float_to_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c
function ref_arm_bitreversal_32 (line 11) | void ref_arm_bitreversal_32(uint32_t *pSrc, uint32_t bitRevLen, uint32_t...
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/cfft.c
function ref_cfft_f32 (line 4) | void ref_cfft_f32(
function ref_cfft_q31 (line 70) | void ref_cfft_q31(
function ref_cfft_q15 (line 142) | void ref_cfft_q15(
function ref_cfft_radix2_f32 (line 220) | void ref_cfft_radix2_f32(
function ref_cfft_radix2_q31 (line 264) | void ref_cfft_radix2_q31(
function ref_cfft_radix2_q15 (line 334) | void ref_cfft_radix2_q15(
function ref_cfft_radix4_f32 (line 410) | void ref_cfft_radix4_f32(
function ref_cfft_radix4_q31 (line 454) | void ref_cfft_radix4_q31(
function ref_cfft_radix4_q15 (line 524) | void ref_cfft_radix4_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/dct4.c
function ref_dct4_f32 (line 3) | void ref_dct4_f32(
function ref_dct4_q31 (line 31) | void ref_dct4_q31(
function ref_dct4_q15 (line 58) | void ref_dct4_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/rfft.c
function ref_rfft_f32 (line 4) | void ref_rfft_f32(
function ref_rfft_fast_f32 (line 56) | void ref_rfft_fast_f32(
function ref_rfft_q31 (line 140) | void ref_rfft_q31(
function ref_rfft_q15 (line 222) | void ref_rfft_q15(
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/arm_class_marks_example_f32.c
function main (line 156) | int32_t main()
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/arm_convolution_example_f32.c
function main (line 191) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example_f32.c
function main (line 146) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example_f32.c
function main (line 122) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_example_f32.c
function main (line 182) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c
function main (line 301) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example_f32.c
function main (line 146) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/arm_matrix_example_f32.c
function main (line 146) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example_f32.c
function main (line 179) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.c
function arm_snr_f32 (line 62) | float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
function arm_provide_guard_bits_q15 (line 120) | void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
function arm_float_to_q12_20 (line 140) | void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_compare_fixed_q15 (line 166) | uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamp...
function arm_compare_fixed_q31 (line 194) | uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSam...
function arm_provide_guard_bits_q31 (line 224) | void arm_provide_guard_bits_q31 (q31_t * input_buf,
function arm_provide_guard_bits_q7 (line 246) | void arm_provide_guard_bits_q7 (q7_t * input_buf,
function arm_calc_guard_bits (line 268) | uint32_t arm_calc_guard_bits (uint32_t num_adds)
function arm_apply_guard_bits (line 294) | void arm_apply_guard_bits (float32_t *pIn,
function arm_calc_2pow (line 311) | uint32_t arm_calc_2pow(uint32_t numShifts)
function arm_float_to_q14 (line 335) | void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
function arm_float_to_q30 (line 365) | void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
function arm_float_to_q29 (line 392) | void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_float_to_q28 (line 420) | void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
function arm_clip_f32 (line 446) | void arm_clip_f32 (float *pIn, uint32_t numSamples)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example_f32.c
function main (line 127) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c
function SystemCoreClockUpdate (line 45) | void SystemCoreClockUpdate (void)
function SystemInit (line 53) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c
function SystemCoreClockUpdate (line 52) | void SystemCoreClockUpdate (void)
function SystemInit (line 60) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
function SystemCoreClockUpdate (line 58) | void SystemCoreClockUpdate (void)
function SystemInit (line 66) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
function SystemCoreClockUpdate (line 60) | void SystemCoreClockUpdate (void)
function SystemInit (line 68) | void SystemInit (void)
FILE: SourceCode/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c
function main (line 139) | int32_t main(void)
FILE: SourceCode/Drivers/CMSIS/DSP/Include/arm_math.h
type arm_status (line 375) | typedef enum
type q7_t (line 389) | typedef int8_t q7_t;
type q15_t (line 394) | typedef int16_t q15_t;
type q31_t (line 399) | typedef int32_t q31_t;
type q63_t (line 404) | typedef int64_t q63_t;
type float32_t (line 409) | typedef float float32_t;
type float64_t (line 414) | typedef double float64_t;
function __STATIC_FORCEINLINE (line 454) | __STATIC_FORCEINLINE q31_t read_q15x2 (
function __STATIC_FORCEINLINE (line 469) | __STATIC_FORCEINLINE q31_t read_q15x2_ia (
function __STATIC_FORCEINLINE (line 485) | __STATIC_FORCEINLINE q31_t read_q15x2_da (
function __STATIC_FORCEINLINE (line 502) | __STATIC_FORCEINLINE void write_q15x2_ia (
function __STATIC_FORCEINLINE (line 518) | __STATIC_FORCEINLINE void write_q15x2 (
function __STATIC_FORCEINLINE (line 533) | __STATIC_FORCEINLINE q31_t read_q7x4_ia (
function __STATIC_FORCEINLINE (line 549) | __STATIC_FORCEINLINE q31_t read_q7x4_da (
function __STATIC_FORCEINLINE (line 566) | __STATIC_FORCEINLINE void write_q7x4_ia (
function __STATIC_FORCEINLINE (line 590) | __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
function __STATIC_FORCEINLINE (line 605) | __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 623) | __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
function __STATIC_FORCEINLINE (line 670) | __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
function __STATIC_FORCEINLINE (line 680) | __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
function __STATIC_FORCEINLINE (line 690) | __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
function __STATIC_FORCEINLINE (line 700) | __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
function __STATIC_FORCEINLINE (line 710) | __STATIC_FORCEINLINE q63_t mult32x64(
function __STATIC_FORCEINLINE (line 721) | __STATIC_FORCEINLINE uint32_t arm_recip_q31(
function __STATIC_FORCEINLINE (line 772) | __STATIC_FORCEINLINE uint32_t arm_recip_q15(
function float32x4_t (line 821) | static inline float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t x)
function int16x8_t (line 830) | static inline int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
function int32x4_t (line 848) | static inline int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
function __STATIC_FORCEINLINE (line 867) | __STATIC_FORCEINLINE uint32_t __QADD8(
function __STATIC_FORCEINLINE (line 885) | __STATIC_FORCEINLINE uint32_t __QSUB8(
function __STATIC_FORCEINLINE (line 903) | __STATIC_FORCEINLINE uint32_t __QADD16(
function __STATIC_FORCEINLINE (line 920) | __STATIC_FORCEINLINE uint32_t __SHADD16(
function __STATIC_FORCEINLINE (line 936) | __STATIC_FORCEINLINE uint32_t __QSUB16(
function __STATIC_FORCEINLINE (line 952) | __STATIC_FORCEINLINE uint32_t __SHSUB16(
function __STATIC_FORCEINLINE (line 968) | __STATIC_FORCEINLINE uint32_t __QASX(
function __STATIC_FORCEINLINE (line 984) | __STATIC_FORCEINLINE uint32_t __SHASX(
function __STATIC_FORCEINLINE (line 1000) | __STATIC_FORCEINLINE uint32_t __QSAX(
function __STATIC_FORCEINLINE (line 1016) | __STATIC_FORCEINLINE uint32_t __SHSAX(
function __STATIC_FORCEINLINE (line 1032) | __STATIC_FORCEINLINE uint32_t __SMUSDX(
function __STATIC_FORCEINLINE (line 1043) | __STATIC_FORCEINLINE uint32_t __SMUADX(
function __STATIC_FORCEINLINE (line 1055) | __STATIC_FORCEINLINE int32_t __QADD(
function __STATIC_FORCEINLINE (line 1066) | __STATIC_FORCEINLINE int32_t __QSUB(
function __STATIC_FORCEINLINE (line 1077) | __STATIC_FORCEINLINE uint32_t __SMLAD(
function __STATIC_FORCEINLINE (line 1091) | __STATIC_FORCEINLINE uint32_t __SMLADX(
function __STATIC_FORCEINLINE (line 1105) | __STATIC_FORCEINLINE uint32_t __SMLSDX(
function __STATIC_FORCEINLINE (line 1119) | __STATIC_FORCEINLINE uint64_t __SMLALD(
function __STATIC_FORCEINLINE (line 1134) | __STATIC_FORCEINLINE uint64_t __SMLALDX(
function __STATIC_FORCEINLINE (line 1149) | __STATIC_FORCEINLINE uint32_t __SMUAD(
function __STATIC_FORCEINLINE (line 1161) | __STATIC_FORCEINLINE uint32_t __SMUSD(
function __STATIC_FORCEINLINE (line 1173) | __STATIC_FORCEINLINE uint32_t __SXTB16(
function __STATIC_FORCEINLINE (line 1183) | __STATIC_FORCEINLINE int32_t __SMMLA(
type arm_fir_instance_q7 (line 1197) | typedef struct
type arm_fir_instance_q15 (line 1207) | typedef struct
type arm_fir_instance_q31 (line 1217) | typedef struct
type arm_fir_instance_f32 (line 1227) | typedef struct
type arm_biquad_casd_df1_inst_q15 (line 1378) | typedef struct
type arm_biquad_casd_df1_inst_q31 (line 1389) | typedef struct
type arm_biquad_casd_df1_inst_f32 (line 1400) | typedef struct
type arm_matrix_instance_f32 (line 1518) | typedef struct
type arm_matrix_instance_f64 (line 1529) | typedef struct
type arm_matrix_instance_q15 (line 1539) | typedef struct
type arm_matrix_instance_q31 (line 1549) | typedef struct
type arm_pid_instance_q15 (line 1862) | typedef struct
type arm_pid_instance_q31 (line 1880) | typedef struct
type arm_pid_instance_f32 (line 1894) | typedef struct
type arm_linear_interp_instance_f32 (line 1965) | typedef struct
type arm_bilinear_interp_instance_f32 (line 1976) | typedef struct
type arm_bilinear_interp_instance_q31 (line 1986) | typedef struct
type arm_bilinear_interp_instance_q15 (line 1996) | typedef struct
type arm_bilinear_interp_instance_q7 (line 2006) | typedef struct
type arm_cfft_radix2_instance_q15 (line 2073) | typedef struct
type arm_cfft_radix4_instance_q15 (line 2100) | typedef struct
type arm_cfft_radix2_instance_q31 (line 2126) | typedef struct
type arm_cfft_radix4_instance_q31 (line 2152) | typedef struct
type arm_cfft_radix2_instance_f32 (line 2178) | typedef struct
type arm_cfft_radix4_instance_f32 (line 2205) | typedef struct
type arm_cfft_instance_q15 (line 2232) | typedef struct
type arm_cfft_instance_q31 (line 2249) | typedef struct
type arm_cfft_instance_f32 (line 2266) | typedef struct
type arm_rfft_instance_q15 (line 2283) | typedef struct
type arm_rfft_instance_q31 (line 2308) | typedef struct
type arm_rfft_instance_f32 (line 2333) | typedef struct
type arm_rfft_fast_instance_f32 (line 2360) | typedef struct
type arm_dct4_instance_f32 (line 2396) | typedef struct
type arm_dct4_instance_q31 (line 2442) | typedef struct
type arm_dct4_instance_q15 (line 2488) | typedef struct
type arm_fir_decimate_instance_q15 (line 3411) | typedef struct
type arm_fir_decimate_instance_q31 (line 3422) | typedef struct
type arm_fir_decimate_instance_f32 (line 3433) | typedef struct
type arm_fir_interpolate_instance_q15 (line 3575) | typedef struct
type arm_fir_interpolate_instance_q31 (line 3586) | typedef struct
type arm_fir_interpolate_instance_f32 (line 3597) | typedef struct
type arm_biquad_cas_df1_32x64_ins_q31 (line 3711) | typedef struct
type arm_biquad_cascade_df2T_instance_f32 (line 3751) | typedef struct
type arm_biquad_cascade_stereo_df2T_instance_f32 (line 3761) | typedef struct
type arm_biquad_cascade_df2T_instance_f64 (line 3771) | typedef struct
type arm_fir_lattice_instance_q15 (line 3872) | typedef struct
type arm_fir_lattice_instance_q31 (line 3882) | typedef struct
type arm_fir_lattice_instance_f32 (line 3892) | typedef struct
type arm_iir_lattice_instance_q15 (line 3987) | typedef struct
type arm_iir_lattice_instance_q31 (line 3998) | typedef struct
type arm_iir_lattice_instance_f32 (line 4009) | typedef struct
type arm_lms_instance_f32 (line 4117) | typedef struct
type arm_lms_instance_q15 (line 4165) | typedef struct
type arm_lms_instance_q31 (line 4216) | typedef struct
type arm_lms_norm_instance_f32 (line 4267) | typedef struct
type arm_lms_norm_instance_q31 (line 4317) | typedef struct
type arm_lms_norm_instance_q15 (line 4371) | typedef struct
type arm_fir_sparse_instance_f32 (line 4578) | typedef struct
type arm_fir_sparse_instance_q31 (line 4591) | typedef struct
type arm_fir_sparse_instance_q15 (line 4604) | typedef struct
type arm_fir_sparse_instance_q7 (line 4617) | typedef struct
function __STATIC_FORCEINLINE (line 4944) | __STATIC_FORCEINLINE float32_t arm_pid_f32(
function __STATIC_FORCEINLINE (line 4977) | __STATIC_FORCEINLINE q31_t arm_pid_q31(
function __STATIC_FORCEINLINE (line 5023) | __STATIC_FORCEINLINE q15_t arm_pid_q15(
function __STATIC_FORCEINLINE (line 5132) | __STATIC_FORCEINLINE void arm_clarke_f32(
function __STATIC_FORCEINLINE (line 5159) | __STATIC_FORCEINLINE void arm_clarke_q31(
function __STATIC_FORCEINLINE (line 5218) | __STATIC_FORCEINLINE void arm_inv_clarke_f32(
function __STATIC_FORCEINLINE (line 5245) | __STATIC_FORCEINLINE void arm_inv_clarke_q31(
function __STATIC_FORCEINLINE (line 5318) | __STATIC_FORCEINLINE void arm_park_f32(
function __STATIC_FORCEINLINE (line 5349) | __STATIC_FORCEINLINE void arm_park_q31(
function __STATIC_FORCEINLINE (line 5421) | __STATIC_FORCEINLINE void arm_inv_park_f32(
function __STATIC_FORCEINLINE (line 5452) | __STATIC_FORCEINLINE void arm_inv_park_q31(
function __STATIC_FORCEINLINE (line 5536) | __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(
function __STATIC_FORCEINLINE (line 5593) | __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(
function __STATIC_FORCEINLINE (line 5651) | __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(
function __STATIC_FORCEINLINE (line 5708) | __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(
function __STATIC_FORCEINLINE (line 5849) | __STATIC_FORCEINLINE arm_status arm_sqrt_f32(
function __STATIC_FORCEINLINE (line 5939) | __STATIC_FORCEINLINE void arm_circularWrite_f32(
function __STATIC_FORCEINLINE (line 5984) | __STATIC_FORCEINLINE void arm_circularRead_f32(
function __STATIC_FORCEINLINE (line 6040) | __STATIC_FORCEINLINE void arm_circularWrite_q15(
function __STATIC_FORCEINLINE (line 6084) | __STATIC_FORCEINLINE void arm_circularRead_q15(
function __STATIC_FORCEINLINE (line 6141) | __STATIC_FORCEINLINE void arm_circularWrite_q7(
function __STATIC_FORCEINLINE (line 6185) | __STATIC_FORCEINLINE void arm_circularRead_q7(
function __STATIC_FORCEINLINE (line 6936) | __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(
function __STATIC_FORCEINLINE (line 7001) | __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(
function __STATIC_FORCEINLINE (line 7075) | __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(
function __STATIC_FORCEINLINE (line 7153) | __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(
FILE: SourceCode/Drivers/CMSIS/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.c
type module_state (line 55) | struct module_state {
type module_state (line 63) | struct module_state
function PyObject (line 66) | static PyObject *
function PyObject (line 298) | static PyObject *cmsisml_test(PyObject *obj, PyObject *args)
function cmsisml_traverse (line 349) | static int cmsisml_traverse(PyObject *m, visitproc visit, void *arg) {
function cmsisml_clear (line 354) | static int cmsisml_clear(PyObject *m) {
type PyModuleDef (line 360) | struct PyModuleDef
type module_state (line 364) | struct module_state
type module_state (line 394) | struct module_state
FILE: SourceCode/Drivers/CMSIS/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.h
type ml_arm_fir_instance_q7Object (line 28) | typedef struct {
function arm_fir_instance_q7_dealloc (line 34) | static void
function PyObject (line 61) | static PyObject *
function arm_fir_instance_q7_init (line 83) | static int
type ml_arm_fir_instance_q15Object (line 116) | typedef struct {
function arm_fir_instance_q15_dealloc (line 122) | static void
function PyObject (line 149) | static PyObject *
function arm_fir_instance_q15_init (line 171) | static int
type ml_arm_fir_instance_q31Object (line 204) | typedef struct {
function arm_fir_instance_q31_dealloc (line 210) | static void
function PyObject (line 237) | static PyObject *
function arm_fir_instance_q31_init (line 259) | static int
type ml_arm_fir_instance_f32Object (line 292) | typedef struct {
function arm_fir_instance_f32_dealloc (line 298) | static void
function PyObject (line 325) | static PyObject *
function arm_fir_instance_f32_init (line 347) | static int
type ml_arm_biquad_casd_df1_inst_q15Object (line 380) | typedef struct {
function arm_biquad_casd_df1_inst_q15_dealloc (line 386) | static void
function PyObject (line 413) | static PyObject *
function arm_biquad_casd_df1_inst_q15_init (line 435) | static int
type ml_arm_biquad_casd_df1_inst_q31Object (line 471) | typedef struct {
function arm_biquad_casd_df1_inst_q31_dealloc (line 477) | static void
function PyObject (line 504) | static PyObject *
function arm_biquad_casd_df1_inst_q31_init (line 526) | static int
type ml_arm_biquad_casd_df1_inst_f32Object (line 562) | typedef struct {
function arm_biquad_casd_df1_inst_f32_dealloc (line 568) | static void
function PyObject (line 595) | static PyObject *
function arm_biquad_casd_df1_inst_f32_init (line 617) | static int
type ml_arm_matrix_instance_f32Object (line 650) | typedef struct {
function arm_matrix_instance_f32_dealloc (line 656) | static void
function PyObject (line 677) | static PyObject *
function arm_matrix_instance_f32_init (line 698) | static int
type ml_arm_matrix_instance_f64Object (line 735) | typedef struct {
function arm_matrix_instance_f64_dealloc (line 741) | static void
function PyObject (line 762) | static PyObject *
function arm_matrix_instance_f64_init (line 783) | static int
type ml_arm_matrix_instance_q15Object (line 820) | typedef struct {
function arm_matrix_instance_q15_dealloc (line 826) | static void
function PyObject (line 847) | static PyObject *
function arm_matrix_instance_q15_init (line 868) | static int
type ml_arm_matrix_instance_q31Object (line 905) | typedef struct {
function arm_matrix_instance_q31_dealloc (line 911) | static void
function PyObject (line 932) | static PyObject *
function arm_matrix_instance_q31_init (line 953) | static int
type ml_arm_pid_instance_q15Object (line 990) | typedef struct {
function arm_pid_instance_q15_dealloc (line 996) | static void
function PyObject (line 1011) | static PyObject *
function arm_pid_instance_q15_init (line 1031) | static int
type ml_arm_pid_instance_q31Object (line 1080) | typedef struct {
function arm_pid_instance_q31_dealloc (line 1086) | static void
function PyObject (line 1101) | static PyObject *
function arm_pid_instance_q31_init (line 1121) | static int
type ml_arm_pid_instance_f32Object (line 1170) | typedef struct {
function arm_pid_instance_f32_dealloc (line 1176) | static void
function PyObject (line 1191) | static PyObject *
function arm_pid_instance_f32_init (line 1211) | static int
type ml_arm_linear_interp_instance_f32Object (line 1260) | typedef struct {
function arm_linear_interp_instance_f32_dealloc (line 1266) | static void
function PyObject (line 1287) | static PyObject *
function arm_linear_interp_instance_f32_init (line 1308) | static int
type ml_arm_bilinear_interp_instance_f32Object (line 1348) | typedef struct {
function arm_bilinear_interp_instance_f32_dealloc (line 1354) | static void
function PyObject (line 1375) | static PyObject *
function arm_bilinear_interp_instance_f32_init (line 1396) | static int
type ml_arm_bilinear_interp_instance_q31Object (line 1433) | typedef struct {
function arm_bilinear_interp_instance_q31_dealloc (line 1439) | static void
function PyObject (line 1460) | static PyObject *
function arm_bilinear_interp_instance_q31_init (line 1481) | static int
type ml_arm_bilinear_interp_instance_q15Object (line 1518) | typedef struct {
function arm_bilinear_interp_instance_q15_dealloc (line 1524) | static void
function PyObject (line 1545) | static PyObject *
function arm_bilinear_interp_instance_q15_init (line 1566) | static int
type ml_arm_bilinear_interp_instance_q7Object (line 1603) | typedef struct {
function arm_bilinear_interp_instance_q7_dealloc (line 1609) | static void
function PyObject (line 1630) | static PyObject *
function arm_bilinear_interp_instance_q7_init (line 1651) | static int
type ml_arm_cfft_radix2_instance_q15Object (line 1688) | typedef struct {
function arm_cfft_radix2_instance_q15_dealloc (line 1694) | static void
function PyObject (line 1709) | static PyObject *
function arm_cfft_radix2_instance_q15_init (line 1731) | static int
type ml_arm_cfft_radix4_instance_q15Object (line 1776) | typedef struct {
function arm_cfft_radix4_instance_q15_dealloc (line 1782) | static void
function PyObject (line 1797) | static PyObject *
function arm_cfft_radix4_instance_q15_init (line 1819) | static int
type ml_arm_cfft_radix2_instance_q31Object (line 1864) | typedef struct {
function arm_cfft_radix2_instance_q31_dealloc (line 1870) | static void
function PyObject (line 1885) | static PyObject *
function arm_cfft_radix2_instance_q31_init (line 1907) | static int
type ml_arm_cfft_radix4_instance_q31Object (line 1952) | typedef struct {
function arm_cfft_radix4_instance_q31_dealloc (line 1958) | static void
function PyObject (line 1973) | static PyObject *
function arm_cfft_radix4_instance_q31_init (line 1995) | static int
type ml_arm_cfft_radix2_instance_f32Object (line 2040) | typedef struct {
function arm_cfft_radix2_instance_f32_dealloc (line 2046) | static void
function PyObject (line 2061) | static PyObject *
function arm_cfft_radix2_instance_f32_init (line 2083) | static int
type ml_arm_cfft_radix4_instance_f32Object (line 2131) | typedef struct {
function arm_cfft_radix4_instance_f32_dealloc (line 2137) | static void
function PyObject (line 2152) | static PyObject *
function arm_cfft_radix4_instance_f32_init (line 2174) | static int
type ml_arm_cfft_instance_q15Object (line 2222) | typedef struct {
function arm_cfft_instance_q15_dealloc (line 2228) | static void
function PyObject (line 2243) | static PyObject *
function arm_cfft_instance_q15_init (line 2265) | static int
type ml_arm_cfft_instance_q31Object (line 2301) | typedef struct {
function arm_cfft_instance_q31_dealloc (line 2307) | static void
function PyObject (line 2322) | static PyObject *
function arm_cfft_instance_q31_init (line 2344) | static int
type ml_arm_cfft_instance_f32Object (line 2380) | typedef struct {
function arm_cfft_instance_f32_dealloc (line 2386) | static void
function PyObject (line 2401) | static PyObject *
function arm_cfft_instance_f32_init (line 2423) | static int
type ml_arm_rfft_instance_q15Object (line 2459) | typedef struct {
function arm_rfft_instance_q15_dealloc (line 2465) | static void
function PyObject (line 2480) | static PyObject *
function arm_rfft_instance_q15_init (line 2503) | static int
type ml_arm_rfft_instance_q31Object (line 2546) | typedef struct {
function arm_rfft_instance_q31_dealloc (line 2552) | static void
function PyObject (line 2567) | static PyObject *
function arm_rfft_instance_q31_init (line 2590) | static int
type ml_arm_rfft_instance_f32Object (line 2633) | typedef struct {
function arm_rfft_instance_f32_dealloc (line 2639) | static void
function PyObject (line 2654) | static PyObject *
function arm_rfft_instance_f32_init (line 2677) | static int
type ml_arm_rfft_fast_instance_f32Object (line 2723) | typedef struct {
function arm_rfft_fast_instance_f32_dealloc (line 2729) | static void
function PyObject (line 2744) | static PyObject *
function arm_rfft_fast_instance_f32_init (line 2765) | static int
type ml_arm_dct4_instance_f32Object (line 2800) | typedef struct {
function arm_dct4_instance_f32_dealloc (line 2806) | static void
function PyObject (line 2821) | static PyObject *
function arm_dct4_instance_f32_init (line 2845) | static int
type ml_arm_dct4_instance_q31Object (line 2886) | typedef struct {
function arm_dct4_instance_q31_dealloc (line 2892) | static void
function PyObject (line 2907) | static PyObject *
function arm_dct4_instance_q31_init (line 2931) | static int
type ml_arm_dct4_instance_q15Object (line 2972) | typedef struct {
function arm_dct4_instance_q15_dealloc (line 2978) | static void
function PyObject (line 2993) | static PyObject *
function arm_dct4_instance_q15_init (line 3017) | static int
type ml_arm_fir_decimate_instance_q15Object (line 3058) | typedef struct {
function arm_fir_decimate_instance_q15_dealloc (line 3064) | static void
function PyObject (line 3091) | static PyObject *
function arm_fir_decimate_instance_q15_init (line 3113) | static int
type ml_arm_fir_decimate_instance_q31Object (line 3149) | typedef struct {
function arm_fir_decimate_instance_q31_dealloc (line 3155) | static void
function PyObject (line 3182) | static PyObject *
function arm_fir_decimate_instance_q31_init (line 3204) | static int
type ml_arm_fir_decimate_instance_f32Object (line 3240) | typedef struct {
function arm_fir_decimate_instance_f32_dealloc (line 3246) | static void
function PyObject (line 3273) | static PyObject *
function arm_fir_decimate_instance_f32_init (line 3295) | static int
type ml_arm_fir_interpolate_instance_q15Object (line 3331) | typedef struct {
function arm_fir_interpolate_instance_q15_dealloc (line 3337) | static void
function PyObject (line 3364) | static PyObject *
function arm_fir_interpolate_instance_q15_init (line 3386) | static int
type ml_arm_fir_interpolate_instance_q31Object (line 3422) | typedef struct {
function arm_fir_interpolate_instance_q31_dealloc (line 3428) | static void
function PyObject (line 3455) | static PyObject *
function arm_fir_interpolate_instance_q31_init (line 3477) | static int
type ml_arm_fir_interpolate_instance_f32Object (line 3513) | typedef struct {
function arm_fir_interpolate_instance_f32_dealloc (line 3519) | static void
function PyObject (line 3546) | static PyObject *
function arm_fir_interpolate_instance_f32_init (line 3568) | static int
type ml_arm_biquad_cas_df1_32x64_ins_q31Object (line 3604) | typedef struct {
function arm_biquad_cas_df1_32x64_ins_q31_dealloc (line 3610) | static void
function PyObject (line 3637) | static PyObject *
function arm_biquad_cas_df1_32x64_ins_q31_init (line 3659) | static int
type ml_arm_biquad_cascade_df2T_instance_f32Object (line 3695) | typedef struct {
function arm_biquad_cascade_df2T_instance_f32_dealloc (line 3701) | static void
function PyObject (line 3728) | static PyObject *
function arm_biquad_cascade_df2T_instance_f32_init (line 3750) | static int
type ml_arm_biquad_cascade_stereo_df2T_instance_f32Object (line 3783) | typedef struct {
function arm_biquad_cascade_stereo_df2T_instance_f32_dealloc (line 3789) | static void
function PyObject (line 3816) | static PyObject *
function arm_biquad_cascade_stereo_df2T_instance_f32_init (line 3838) | static int
type ml_arm_biquad_cascade_df2T_instance_f64Object (line 3871) | typedef struct {
function arm_biquad_cascade_df2T_instance_f64_dealloc (line 3877) | static void
function PyObject (line 3904) | static PyObject *
function arm_biquad_cascade_df2T_instance_f64_init (line 3926) | static int
type ml_arm_fir_lattice_instance_q15Object (line 3959) | typedef struct {
function arm_fir_lattice_instance_q15_dealloc (line 3965) | static void
function PyObject (line 3992) | static PyObject *
function arm_fir_lattice_instance_q15_init (line 4014) | static int
type ml_arm_fir_lattice_instance_q31Object (line 4047) | typedef struct {
function arm_fir_lattice_instance_q31_dealloc (line 4053) | static void
function PyObject (line 4080) | static PyObject *
function arm_fir_lattice_instance_q31_init (line 4102) | static int
type ml_arm_fir_lattice_instance_f32Object (line 4135) | typedef struct {
function arm_fir_lattice_instance_f32_dealloc (line 4141) | static void
function PyObject (line 4168) | static PyObject *
function arm_fir_lattice_instance_f32_init (line 4190) | static int
type ml_arm_iir_lattice_instance_q15Object (line 4223) | typedef struct {
function arm_iir_lattice_instance_q15_dealloc (line 4229) | static void
function PyObject (line 4262) | static PyObject *
function arm_iir_lattice_instance_q15_init (line 4285) | static int
type ml_arm_iir_lattice_instance_q31Object (line 4323) | typedef struct {
function arm_iir_lattice_instance_q31_dealloc (line 4329) | static void
function PyObject (line 4362) | static PyObject *
function arm_iir_lattice_instance_q31_init (line 4385) | static int
type ml_arm_iir_lattice_instance_f32Object (line 4423) | typedef struct {
function arm_iir_lattice_instance_f32_dealloc (line 4429) | static void
function PyObject (line 4462) | static PyObject *
function arm_iir_lattice_instance_f32_init (line 4485) | static int
type ml_arm_lms_instance_f32Object (line 4523) | typedef struct {
function arm_lms_instance_f32_dealloc (line 4529) | static void
function PyObject (line 4556) | static PyObject *
function arm_lms_instance_f32_init (line 4578) | static int
type ml_arm_lms_instance_q15Object (line 4614) | typedef struct {
function arm_lms_instance_q15_dealloc (line 4620) | static void
function PyObject (line 4647) | static PyObject *
function arm_lms_instance_q15_init (line 4669) | static int
type ml_arm_lms_instance_q31Object (line 4708) | typedef struct {
function arm_lms_instance_q31_dealloc (line 4714) | static void
function PyObject (line 4741) | static PyObject *
function arm_lms_instance_q31_init (line 4763) | static int
type ml_arm_lms_norm_instance_f32Object (line 4802) | typedef struct {
function arm_lms_norm_instance_f32_dealloc (line 4808) | static void
function PyObject (line 4835) | static PyObject *
function arm_lms_norm_instance_f32_init (line 4857) | static int
type ml_arm_lms_norm_instance_q31Object (line 4899) | typedef struct {
function arm_lms_norm_instance_q31_dealloc (line 4905) | static void
function PyObject (line 4933) | static PyObject *
function arm_lms_norm_instance_q31_init (line 4956) | static int
type ml_arm_lms_norm_instance_q15Object (line 5002) | typedef struct {
function arm_lms_norm_instance_q15_dealloc (line 5008) | static void
function PyObject (line 5035) | static PyObject *
function arm_lms_norm_instance_q15_init (line 5058) | static int
type ml_arm_fir_sparse_instance_f32Object (line 5104) | typedef struct {
function arm_fir_sparse_instance_f32_dealloc (line 5110) | static void
function PyObject (line 5143) | static PyObject *
function arm_fir_sparse_instance_f32_init (line 5166) | static int
type ml_arm_fir_sparse_instance_q31Object (line 5208) | typedef struct {
function arm_fir_sparse_instance_q31_dealloc (line 5214) | static void
function PyObject (line 5247) | static PyObject *
function arm_fir_sparse_instance_q31_init (line 5270) | static int
type ml_arm_fir_sparse_instance_q15Object (line 5312) | typedef struct {
function arm_fir_sparse_instance_q15_dealloc (line 5318) | static void
function PyObject (line 5351) | static PyObject *
function arm_fir_sparse_instance_q15_init (line 5374) | static int
type ml_arm_fir_sparse_instance_q7Object (line 5416) | typedef struct {
function arm_fir_sparse_instance_q7_dealloc (line 5422) | static void
function PyObject (line 5455) | static PyObject *
function arm_fir_sparse_instance_q7_init (line 5478) | static int
function typeRegistration (line 5520) | void typeRegistration(PyObject *module) {
function PyObject (line 5587) | static PyO
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"preview": "/**************************************************************************//**\n * @file system_ARMSC300.c\n * @brief"
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"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_ARMv8MBL.c",
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"preview": "/**************************************************************************//**\n * @file system_ARMv8MBL.c\n * @brief"
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"chars": 3251,
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"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/system_generic.c",
"chars": 685,
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c",
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{
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/add_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/basic_math_test_common_data.c",
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/basic_math_test_group.c",
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"preview": "#include \"jtest.h\"\n#include \"basic_math_tests.h\"\n\nJTEST_DEFINE_GROUP(basic_math_tests)\n{\n JTEST_GROUP_CALL(abs_tests)"
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/dot_prod_tests.c",
"chars": 1153,
"preview": "#include \"jtest.h\"\n#include \"basic_math_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/mult_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/negate_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/offset_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/scale_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/shift_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/basic_math_tests/sub_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_conj_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_dot_prod_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mag_squared_tests.c",
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mag_tests.c",
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},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mult_cmplx_tests.c",
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"preview": "#include \"jtest.h\"\n#include \"complex_math_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/cmplx_mult_real_test.c",
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"preview": "#include \"jtest.h\"\n#include \"complex_math_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/complex_math_test_common_data.c",
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"preview": "#include \"complex_math_test_data.h\"\n\n/*--------------------------------------------------------------------------------*"
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/complex_math_tests/complex_math_test_group.c",
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"preview": "#include \"jtest.h\"\n#include \"complex_math_tests.h\"\n\nJTEST_DEFINE_GROUP(complex_math_tests)\n{\n JTEST_GROUP_CALL(cmplx_"
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/pid_tests.c",
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"preview": "#include \"jtest.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\"\n#include \"ref.h\"\n#include \"type_abbrev.h\"\n#include \"test_"
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/controller_tests/sin_cos_tests.c",
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{
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{
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{
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{
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{
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/iir_tests.c",
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{
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{
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"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c",
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_add_tests.c",
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"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_cmplx_mult_tests.c",
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{
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{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_inverse_tests.c",
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"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/mat_trans_tests.c",
"chars": 1080,
"preview": "#include \"jtest.h\"\n#include \"matrix_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#inclu"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c",
"chars": 12285,
"preview": "#include \"arm_math.h\"\n#include \"matrix_test_data.h\"\n#include \"type_abbrev.h\"\n\n/*----------------------------------------"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_group.c",
"chars": 503,
"preview": "#include \"jtest.h\"\n#include \"matrix_tests.h\"\n\nJTEST_DEFINE_GROUP(matrix_tests)\n{\n /*\n To skip a test, comment it"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/max_tests.c",
"chars": 1151,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/mean_tests.c",
"chars": 1160,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/min_tests.c",
"chars": 1151,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/power_tests.c",
"chars": 1230,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/rms_tests.c",
"chars": 1093,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/statistics_test_common_data.c",
"chars": 3338,
"preview": "#include \"statistics_test_data.h\"\n\n/*--------------------------------------------------------------------------------*/\n"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/statistics_test_group.c",
"chars": 337,
"preview": "#include \"jtest.h\"\n#include \"statistics_tests.h\"\n\nJTEST_DEFINE_GROUP(statistics_tests)\n{\n JTEST_GROUP_CALL(max_tests)"
},
{
"path": "SourceCode/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/src/statistics_tests/std_tests.c",
"chars": 1093,
"preview": "#include \"jtest.h\"\n#include \"statistics_test_data.h\"\n#include \"arr_desc.h\"\n#include \"arm_math.h\" /* FUTs */\n#i"
}
]
// ... and 894 more files (download for full content)
About this extraction
This page contains the full source code of the BestRyze/Hexapod GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 1094 files (24.7 MB), approximately 6.6M tokens, and a symbol index with 5469 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.