Repository: MabezDev/xtensa-rust-quickstart
Branch: master
Commit: de46307dde75
Files: 12
Total size: 22.4 KB
Directory structure:
gitextract_4y1gwry8/
├── .cargo/
│ └── config
├── .gitignore
├── .vscode/
│ └── launch.json
├── Cargo.toml
├── LICENSE-APACHE
├── LICENSE-MIT
├── README.md
├── examples/
│ ├── esp32.rs
│ └── esp8266.rs
├── openocd.cfg
├── rust-toolchain
└── src/
└── main.rs
================================================
FILE CONTENTS
================================================
================================================
FILE: .cargo/config
================================================
[target.xtensa-esp32-none-elf] # esp32
runner = "xtensa-esp32-elf-gdb -q -x openocd.gdb"
rustflags = [
"-C", "link-arg=-Wl,-Tlink.x",
"-C", "link-arg=-nostartfiles",
]
[target.xtensa-esp8266-none-elf] # esp8266
runner = "xtensa-lx106-elf-gdb -q -x openocd.gdb"
rustflags = [
"-C", "link-arg=-Wl,-Tlink.x",
"-C", "link-arg=-nostartfiles",
]
[build]
target = "xtensa-esp32-none-elf" # esp32
# target = "xtensa-esp8266-none-elf" # esp8266
[unstable]
build-std = ["core", "alloc"]
================================================
FILE: .gitignore
================================================
/target
**/*.rs.bk
Cargo.lock
.vscode/.cortex-debug.peripherals.state.json
.vscode/.cortex-debug.registers.state.json
core
svd/
================================================
FILE: .vscode/launch.json
================================================
{
// Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": [
{
"cwd": "${workspaceRoot}",
"executable": "target/xtensa-esp32-none-elf/debug/esp32",
"name": "debug-with-svd",
"request": "attach",
"type": "cortex-debug",
"servertype": "openocd",
"interface": "jtag",
/* Download this from the latest `esp32` crate: https://docs.rs/esp32/latest/esp32/ */
"svdFile": "svd/esp32.svd",
// complains about not allowed, but it does work.. https://github.com/Marus/cortex-debug/issues/111#issuecomment-504778053
"serverpath": "${env:HOME}/programs/openocd-esp32/bin/openocd",
// for this to work you will have to run `ln -s xtensa-esp32-elf-gdb arm-none-eabi-gdb`
"toolchainPath": "${env:HOME}/programs/xtensa-esp32-elf/bin",
"configFiles": [
"openocd.cfg"
],
},
{
"type": "gdb",
"request": "launch",
"name": "Debug",
"target": "target/xtensa-esp32-none-elf/debug/esp32",
"gdbpath": "xtensa-esp32-elf-gdb",
"cwd": "${workspaceRoot}",
"autorun": [
"source xtensa.gdb"
]
},
{
"type": "gdb",
"request": "launch",
"name": "Release",
"target": "target/xtensa-esp32-none-elf/release/esp32",
"gdbpath": "xtensa-esp32-elf-gdb",
"cwd": "${workspaceRoot}",
"autorun": [
"source xtensa.gdb"
]
},
]
}
================================================
FILE: Cargo.toml
================================================
[package]
name = "xtensa-quickstart"
version = "0.1.0"
authors = ["Scott Mabin <scott@mabez.dev>"]
edition = "2018"
[dependencies]
xtensa-lx-rt = "0.7.0"
xtensa-lx = "0.4.0"
panic-halt = "0.2.0"
# because we cant have optional dev-deps, these must go here
esp32-hal = { version = "0.3.0", optional = true }
esp8266-hal = { version = "0.5.0", optional = true }
[[example]]
name = "esp32"
required-features = ["xtensa-lx-rt/lx6", "xtensa-lx/lx6", "esp32-hal"]
# [[example]]
# name = "esp8266"
# required-features = ["xtensa-lx-rt/lx106", "xtensa-lx/lx106", "esp8266-hal"]
================================================
FILE: LICENSE-APACHE
================================================
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================================================
FILE: LICENSE-MIT
================================================
Copyright 2019-2020 Contributors to xtensa-lx6-rt
Permission is hereby granted, free of charge, to any
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================================================
FILE: README.md
================================================
# Rust on the xtensa architecture
⚠️ **NOTE**: This repo is now obsolete, there is now a quickstart repo for [bare-metal](https://github.com/esp-rs/esp-template) and a template for [using the standard library](https://github.com/esp-rs/esp-idf-template).
Need help? Join the esp-rs room on matrix, https://matrix.to/#/#esp-rs:matrix.org.
## Supported chips
|name|arch|rust-target| custom compiler required |
|-|-|-|-|
|esp32|Xtensa|`xtensa-esp32-none-elf`| yes |
|esp8266|Xtensa|`xtensa-esp8266-none-elf`| yes |
## Installing the compiler
For Xtensa targets a forked compiler must be installed, follow the instructions from [the book](https://esp-rs.github.io/book/getting-started/installing-rust.html).
## Installing tools
Currently the xtensa targets do not have LLD support. Therefore the GCC toolchain is required for linking.
### xtensa-esp32-elf toolchain for esp32 development
Instructions can be found [on Espressif's web site](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started-legacy/linux-setup.html#toolchain-setup) and the latest tool toolchain can be downloaded from [here](https://github.com/espressif/crosstool-NG/releases).
Extract it to the directory of your choice. Then add the toolchain's bin/ directory to your `$PATH`. For example:
$ mkdir ~/esp
$ tar -xzf ~/Downloads/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz -C ~/esp
$ PATH="$PATH:$HOME/esp/xtensa-esp32-elf/bin"
Old instructions can be found [on Espressif's web site](https://docs.espressif.com/projects/esp-idf/en/release-v3.0/get-started/linux-setup.html).
### xtensa-lx106-elf toolchain for esp8266 development
Install the xtensa-lx106-elf toolchain from the [espressif web site](https://docs.espressif.com/projects/esp8266-rtos-sdk/en/latest/get-started/linux-setup.html).
```
$ mkdir ~/esp
$ tar -xzf ~/Downloads/xtensa-lx106-elf-linux64-1.22.0-100-ge567ec7-5.2.0.tar.gz -C ~/esp
$ PATH="$PATH:$HOME/esp/xtensa-lx106-elf/bin"
```
## Cargo Build
Since the introduction of the `build-std` feature of cargo, it is possible to build `core` without any additional tools.
## Flashing
Install espflash:
```bash
$ cargo install cargo-espflash
```
Example for the ESP32, remember to use `target = xtensa-esp32-none-elf` inside `.cargo/config`:
```bash
$ cargo espflash --chip esp32 --example esp32 --speed 460800 --features="xtensa-lx-rt/lx6,xtensa-lx/lx6,esp32-hal" /dev/ttyUSB0
```
Example for the ESP8266, remember to use `target = xtensa-esp8266-none-elf` inside `.cargo/config`:
```bash
$ cargo espflash --chip esp8266 --example esp8266 --features="xtensa-lx-rt/lx106 xtensa-lx/lx106 esp8266-hal" /dev/ttyUSB0
```
### esptool
The preferred method of flashing is to use
[`cargo-espflash`](https://github.com/icewind1991/espflash), but you can use Espressif's `esptool.py` to flash the binaries manually. Esptool is python-based command line tool for flashing Espressif's chips. Full installation instructions are available on [the website](https://github.com/espressif/esptool).
## License
Licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
http://www.apache.org/licenses/LICENSE-2.0)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
at your option.
### Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
dual licensed as above, without any additional terms or conditions.
================================================
FILE: examples/esp32.rs
================================================
#![no_std]
#![no_main]
use esp32_hal::target;
use hal::prelude::*;
use xtensa_lx::timer::delay;
use panic_halt as _;
use esp32_hal as hal;
/// The default clock source is the onboard crystal
/// In most cases 40mhz (but can be as low as 2mhz depending on the board)
const CORE_HZ: u32 = 40_000_000;
const WDT_WKEY_VALUE: u32 = 0x50D83AA1;
#[entry]
fn main() -> ! {
let dp = target::Peripherals::take().expect("Failed to obtain Peripherals");
let mut rtccntl = dp.RTCCNTL;
let mut timg0 = dp.TIMG0;
let mut timg1 = dp.TIMG1;
// (https://github.com/espressif/openocd-esp32/blob/97ba3a6bb9eaa898d91df923bbedddfeaaaf28c9/src/target/esp32.c#L431)
// openocd disables the wdt's on halt
// we will do it manually on startup
disable_timg_wdts(&mut timg0, &mut timg1);
disable_rtc_wdt(&mut rtccntl);
let pins = dp.GPIO.split();
let mut led = pins.gpio2.into_push_pull_output();
loop {
led.set_high().unwrap();
delay(CORE_HZ);
led.set_low().unwrap();
delay(CORE_HZ);
}
}
fn disable_rtc_wdt(rtccntl: &mut target::RTCCNTL) {
/* Disables the RTCWDT */
rtccntl
.wdtwprotect
.write(|w| unsafe { w.bits(WDT_WKEY_VALUE) });
rtccntl.wdtconfig0.modify(|_, w| unsafe {
w.wdt_stg0()
.bits(0x0)
.wdt_stg1()
.bits(0x0)
.wdt_stg2()
.bits(0x0)
.wdt_stg3()
.bits(0x0)
.wdt_flashboot_mod_en()
.clear_bit()
.wdt_en()
.clear_bit()
});
rtccntl.wdtwprotect.write(|w| unsafe { w.bits(0x0) });
}
fn disable_timg_wdts(timg0: &mut target::TIMG0, timg1: &mut target::TIMG1) {
timg0
.wdtwprotect
.write(|w| unsafe { w.bits(WDT_WKEY_VALUE) });
timg1
.wdtwprotect
.write(|w| unsafe { w.bits(WDT_WKEY_VALUE) });
timg0.wdtconfig0.write(|w| unsafe { w.bits(0x0) });
timg1.wdtconfig0.write(|w| unsafe { w.bits(0x0) });
}
================================================
FILE: examples/esp8266.rs
================================================
#![no_std]
#![no_main]
use panic_halt as _;
use esp8266_hal::prelude::*;
use esp8266_hal::target::Peripherals;
#[entry]
fn main() -> ! {
let dp = Peripherals::take().unwrap();
let pins = dp.GPIO.split();
let mut led = pins.gpio2.into_push_pull_output();
let (mut timer1, _) = dp.TIMER.timers();
led.set_high().unwrap();
loop {
timer1.delay_ms(500);
led.toggle().unwrap();
}
}
================================================
FILE: openocd.cfg
================================================
source [find interface/jlink.cfg]
source [find board/esp-wroom-32.cfg]
gdb_memory_map disable
set ESP32_RTOS none
# set ESP32_ONLYCPU 0
================================================
FILE: rust-toolchain
================================================
esp
================================================
FILE: src/main.rs
================================================
//! NOTE: The following instructions are for building a custom Xtensa target, for the esp32 and esp8266
//! see the examples/ folder.
//!
//! Building for a custom target:
//! - fill out a `memory.x` file
//! - Create a build.rs
//! - Choose a `xtensa-lx` and `xtensa-lx-rt` cpu feature
//!
//! Example `memory.x` (also see the ESP hals)
//! ```
//! /*
//! Specify main memory areas
//! These are generic ones, which will need to be filled in for your
//! device.
//!
//! The espXX-hal crates will handle this for you. Only use this if you're targeting
//! another xtensa target.
//! */
//! MEMORY
//! {
//! vectors_seg ( RX ) : ORIGIN = 0x40080000, len = 1k /* SRAM0 */
//! iram_seg ( RX ) : ORIGIN = 0x40080400, len = 128k-0x400 /* SRAM0 */
//! dram_seg ( RW ) : ORIGIN = 0x3FFB0000, len = 176k
//! }
//!
//! REGION_ALIAS("ROTEXT", iram_seg); /* these alias' link up with `xtensa-lx-rt` */
//! REGION_ALIAS("RWTEXT", iram_seg);
//! REGION_ALIAS("RODATA", dram_seg);
//! REGION_ALIAS("RWDATA", dram_seg);
//! ```
//!
//! Example `build.rs`
//! ```
//! use std::env;
//! use std::fs::File;
//! use std::io::Write;
//! use std::path::PathBuf;
//!
//!
//!
//! fn main() {
//! // Put the linker script somewhere the linker can find it
//! let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
//!
//! File::create(out.join("memory.x"))
//! .unwrap()
//! .write_all(include_bytes!("memory.x.in"))
//! .unwrap();
//!
//! println!("cargo:rustc-link-search={}", out.display());
//! // Only re-run the build script when memory.x is changed,
//! // instead of when any part of the source code changes.
//! println!("cargo:rerun-if-changed=memory.x");
//! }
//! ```
#![no_std]
#![no_main]
use xtensa_lx_rt as _;
use xtensa_lx_rt::entry;
use panic_halt as _;
#[entry]
fn main() -> ! {
loop {}
}
gitextract_4y1gwry8/
├── .cargo/
│ └── config
├── .gitignore
├── .vscode/
│ └── launch.json
├── Cargo.toml
├── LICENSE-APACHE
├── LICENSE-MIT
├── README.md
├── examples/
│ ├── esp32.rs
│ └── esp8266.rs
├── openocd.cfg
├── rust-toolchain
└── src/
└── main.rs
SYMBOL INDEX (7 symbols across 3 files)
FILE: examples/esp32.rs
constant CORE_HZ (line 12) | const CORE_HZ: u32 = 40_000_000;
constant WDT_WKEY_VALUE (line 14) | const WDT_WKEY_VALUE: u32 = 0x50D83AA1;
function main (line 17) | fn main() -> ! {
function disable_rtc_wdt (line 41) | fn disable_rtc_wdt(rtccntl: &mut target::RTCCNTL) {
function disable_timg_wdts (line 63) | fn disable_timg_wdts(timg0: &mut target::TIMG0, timg1: &mut target::TIMG...
FILE: examples/esp8266.rs
function main (line 9) | fn main() -> ! {
FILE: src/main.rs
function main (line 66) | fn main() -> ! {
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"path": "examples/esp32.rs",
"chars": 1997,
"preview": "#![no_std]\n#![no_main]\n\nuse esp32_hal::target;\nuse hal::prelude::*;\nuse xtensa_lx::timer::delay;\nuse panic_halt as _;\nus"
},
{
"path": "examples/esp8266.rs",
"chars": 424,
"preview": "#![no_std]\n#![no_main]\n\nuse panic_halt as _;\nuse esp8266_hal::prelude::*;\nuse esp8266_hal::target::Peripherals;\n\n#[entry"
},
{
"path": "openocd.cfg",
"chars": 141,
"preview": "\n\nsource [find interface/jlink.cfg]\n\nsource [find board/esp-wroom-32.cfg]\n\ngdb_memory_map disable\n\nset ESP32_RTOS none\n\n"
},
{
"path": "rust-toolchain",
"chars": 3,
"preview": "esp"
},
{
"path": "src/main.rs",
"chars": 1907,
"preview": "//! NOTE: The following instructions are for building a custom Xtensa target, for the esp32 and esp8266\n//! see the exam"
}
]
About this extraction
This page contains the full source code of the MabezDev/xtensa-rust-quickstart GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 12 files (22.4 KB), approximately 6.1k tokens, and a symbol index with 7 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.