[ { "path": "README", "content": "Second version of the homemade 30 MHZ - 6 GHz single receiver VNA design files.\n\nFirst version: https://github.com/Ttl/vna\n\nFor more information see: http://hforsten.com/improved-homemade-vna.html\n\nFPGA can be programmed with Openocd (http://openocd.org/). Scripts for programming the FPGA and SPI flash are in the \"openocd\" folder. Copy the bit file to openocd folder and use the command \"openocd -f \" to program the board.\n\nBefore communication is possible with the board through USB, FT2232D EEPROM needs to be programmed. Port B needs to be changed in FIFO 245 mode. This can be done using FTDIs \"ft-prog\" tool.\n" }, { "path": "couplers/README", "content": "Resistive bridge coupler design files.\n\n\nPCB Stackup: OSH park 4 layer process.\n\n\nBOM: \n 3, http://www.mouser.fi/ProductDetail/Linx-Technologies/CONSMA003062/?qs=sGAEpiMZZMsgSGrx0WqTbDECK3OTA0n%2f\n 1, http://www.mouser.fi/ProductDetail/EPCOS-TDK/B64290P0687X046/?qs=sGAEpiMZZMs2JV%252bnT%2fvX8Df1W1GtRs01w38yswv%252b9W0%3d\n 3, http://www.mouser.fi/ProductDetail/Fair-Rite/5943000911/?qs=sGAEpiMZZMsuct6UGZJC7QQ6ZlEn2BkEKxrVH5WSvu8%3d\n 2, http://www.mouser.fi/ProductDetail/Fair-Rite/5977000101/?qs=sGAEpiMZZMs2JV%252bnT%2fvX8PSq2BULPkJLFoDtc8BHtvw%3d\n\n\nResistors (See coupler_layout.png for positions):\n R1: 270\n R2: 50\n R3, R5: 36\n R4, R6: 39\n\nMount the resistors upside down to minimize parasitics.\n\n\nCoaxial cable:\n RG405\n" }, { "path": "couplers/gerbers/rf_bridge_Bottom.gbl", "content": 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}, { "path": "fpga/vna/vna.hw/vna.lpr", "content": "\n\n\n\n\n\n" }, { "path": "fpga/vna/vna.srcs/constrs_1/new/vna_constraints.xdc", "content": "create_clock -period 25.000 -name clk -waveform {0.000 12.500} [get_ports clk]\n\n\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[12]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[11]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[10]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[9]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[8]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[7]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[6]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[5]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[4]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[3]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[2]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[1]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[0]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {adc_in[13]}]\nset_property IOSTANDARD LVCMOS33 [get_ports clk]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[7]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[6]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[5]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[4]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[3]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[2]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[1]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {ft2232_data[0]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {tx_filter[3]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {tx_filter[2]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {tx_filter[1]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {tx_filter[0]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {port_sw[1]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {port_sw[0]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[5]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[4]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[3]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[2]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[1]}]\nset_property IOSTANDARD LVCMOS33 [get_ports {rx_sw[0]}]\nset_property IOSTANDARD LVCMOS33 [get_ports dither]\nset_property IOSTANDARD LVCMOS33 [get_ports rxf]\nset_property IOSTANDARD LVCMOS33 [get_ports txe]\nset_property IOSTANDARD LVCMOS33 [get_ports wr]\nset_property IOSTANDARD LVCMOS33 [get_ports si_wu]\nset_property IOSTANDARD LVCMOS33 [get_ports spi_clk]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_spi_data]\nset_property IOSTANDARD LVCMOS33 [get_ports source_spi_data]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_le]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_ce]\nset_property IOSTANDARD LVCMOS33 [get_ports source_le]\nset_property IOSTANDARD LVCMOS33 [get_ports source_ce]\nset_property IOSTANDARD LVCMOS33 [get_ports rd]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_rf_enable]\nset_property IOSTANDARD LVCMOS33 [get_ports source_rf_enable]\nset_property IOSTANDARD LVCMOS33 [get_ports atten_spi_data]\nset_property IOSTANDARD LVCMOS33 [get_ports atten_le]\nset_property IOSTANDARD LVCMOS33 [get_ports mixer_enable]\nset_property IOSTANDARD LVCMOS33 [get_ports amp_pwdn]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_ld]\nset_property IOSTANDARD LVCMOS33 [get_ports source_ld]\nset_property IOSTANDARD LVCMOS33 [get_ports source_muxout]\nset_property IOSTANDARD LVCMOS33 [get_ports lo_muxout]\nset_property IOSTANDARD LVCMOS33 [get_ports led]\nset_property IOSTANDARD LVCMOS33 [get_ports adc_of]\nset_property IOSTANDARD LVCMOS33 [get_ports adc_oe]\nset_property IOSTANDARD LVCMOS33 [get_ports adc_shdn]\nset_property IOSTANDARD LVCMOS33 [get_ports xadc_vp]\nset_property IOSTANDARD LVCMOS33 [get_ports xadc_vn]\n\nset_property PACKAGE_PIN N11 [get_ports clk]\nset_property PACKAGE_PIN T10 [get_ports {adc_in[0]}]\nset_property PACKAGE_PIN T9 [get_ports {adc_in[1]}]\nset_property PACKAGE_PIN P9 [get_ports {adc_in[2]}]\nset_property PACKAGE_PIN P8 [get_ports {adc_in[3]}]\nset_property PACKAGE_PIN R8 [get_ports {adc_in[4]}]\nset_property PACKAGE_PIN T8 [get_ports {adc_in[5]}]\nset_property PACKAGE_PIN R7 [get_ports {adc_in[6]}]\nset_property PACKAGE_PIN T7 [get_ports {adc_in[7]}]\nset_property PACKAGE_PIN R6 [get_ports {adc_in[8]}]\nset_property PACKAGE_PIN T5 [get_ports {adc_in[9]}]\nset_property PACKAGE_PIN R5 [get_ports {adc_in[10]}]\nset_property PACKAGE_PIN T4 [get_ports {adc_in[11]}]\nset_property PACKAGE_PIN T3 [get_ports {adc_in[12]}]\nset_property PACKAGE_PIN R3 [get_ports {adc_in[13]}]\nset_property PACKAGE_PIN T2 [get_ports adc_of]\nset_property PACKAGE_PIN T12 [get_ports adc_oe]\nset_property PACKAGE_PIN T13 [get_ports adc_shdn]\n\nset_property PACKAGE_PIN A13 [get_ports {tx_filter[3]}]\nset_property PACKAGE_PIN A14 [get_ports {tx_filter[2]}]\nset_property PACKAGE_PIN B16 [get_ports {tx_filter[1]}]\nset_property PACKAGE_PIN A15 [get_ports {tx_filter[0]}]\n\nset_property PACKAGE_PIN D16 [get_ports {port_sw[1]}]\nset_property PACKAGE_PIN E16 [get_ports {port_sw[0]}]\n\n#set_property PACKAGE_PIN H8 [get_ports {xadc_vp}]\n#set_property PACKAGE_PIN J7 [get_ports {xadc_vn}]\n\nset_property PACKAGE_PIN G1 [get_ports {rx_sw[5]}]\nset_property PACKAGE_PIN H1 [get_ports {rx_sw[4]}]\nset_property PACKAGE_PIN G2 [get_ports {rx_sw[3]}]\nset_property PACKAGE_PIN H2 [get_ports {rx_sw[2]}]\nset_property PACKAGE_PIN J1 [get_ports {rx_sw[1]}]\nset_property PACKAGE_PIN K1 [get_ports {rx_sw[0]}]\n\nset_property PACKAGE_PIN A8 [get_ports {ft2232_data[7]}]\nset_property PACKAGE_PIN A9 [get_ports {ft2232_data[6]}]\nset_property PACKAGE_PIN A10 [get_ports {ft2232_data[5]}]\nset_property PACKAGE_PIN B9 [get_ports {ft2232_data[4]}]\nset_property PACKAGE_PIN B10 [get_ports {ft2232_data[3]}]\nset_property PACKAGE_PIN B11 [get_ports {ft2232_data[2]}]\nset_property PACKAGE_PIN B12 [get_ports {ft2232_data[1]}]\nset_property PACKAGE_PIN A12 [get_ports {ft2232_data[0]}]\n\nset_property PACKAGE_PIN A2 [get_ports rxf]\nset_property PACKAGE_PIN A3 [get_ports txe]\nset_property PACKAGE_PIN A4 [get_ports wr]\nset_property PACKAGE_PIN A5 [get_ports si_wu]\nset_property PACKAGE_PIN B4 [get_ports rd]\n\nset_property PACKAGE_PIN K16 [get_ports dither]\n\nset_property PACKAGE_PIN K2 [get_ports mixer_enable]\nset_property PACKAGE_PIN L3 [get_ports amp_pwdn]\n\nset_property PACKAGE_PIN N14 [get_ports spi_clk]\nset_property PACKAGE_PIN M14 [get_ports lo_spi_data]\nset_property PACKAGE_PIN K15 [get_ports source_spi_data]\nset_property PACKAGE_PIN G14 [get_ports lo_le]\nset_property PACKAGE_PIN F14 [get_ports lo_ce]\nset_property PACKAGE_PIN F12 [get_ports source_le]\nset_property PACKAGE_PIN F13 [get_ports source_ce]\nset_property PACKAGE_PIN C16 [get_ports atten_le]\nset_property PACKAGE_PIN B15 [get_ports atten_spi_data]\nset_property PACKAGE_PIN P16 [get_ports lo_ld]\nset_property PACKAGE_PIN R16 [get_ports source_ld]\nset_property PACKAGE_PIN H16 [get_ports source_muxout]\nset_property PACKAGE_PIN J16 [get_ports lo_muxout]\n\nset_property PACKAGE_PIN T14 [get_ports lo_rf_enable]\nset_property PACKAGE_PIN T15 [get_ports source_rf_enable]\n\nset_property PACKAGE_PIN D1 [get_ports led]\n\nset_property CFGBVS VCCO [current_design]\nset_property CONFIG_VOLTAGE 3.3 [current_design]\n\n\nset_input_delay -clock [get_clocks clk] -min -add_delay 0.000 [get_ports {adc_in[*]}]\nset_input_delay -clock [get_clocks clk] -max -add_delay 1.400 [get_ports {adc_in[*]}]\n\nset_input_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports {ft2232_data[*]}]\nset_input_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports rxf]\nset_input_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports txe]\n\nset_input_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports lo_ld]\nset_input_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports source_ld]\n\nset_output_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports {ft2232_data[*]}]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports spi_clk]\nset_output_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports wr]\nset_output_delay -clock [get_clocks clk] -add_delay 0.500 [get_ports rd]\n\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports {rx_sw[*]}]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports {port_sw[*]}]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports {tx_filter[*]}]\n\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports lo_ce]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports source_ce]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports source_rf_enable]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports lo_rf_enable]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports mixer_enable]\n\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports adc_oe]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports adc_shdn]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports amp_pwdn]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports dither]\n\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports atten_le]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports lo_le]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports source_le]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports lo_spi_data]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports source_spi_data]\nset_output_delay -clock [get_clocks clk] -add_delay 1.000 [get_ports atten_spi_data]" }, { "path": "fpga/vna/vna.srcs/sim_1/new/comm_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 01.12.2016 19:38:11\n-- Design Name: \n-- Module Name: comm_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity comm_tb is\n-- Port ( );\nend comm_tb;\n\narchitecture Behavioral of comm_tb is\n\nsignal clk, rst : std_logic := '0';\n-- Clock period definitions\nconstant clk_period : time := 25 ns;\n\nsignal ft2232_data, data_out, data_in : std_logic_vector(7 downto 0) := (others => '0');\nsignal data_in_valid : std_logic := '0';\nsignal data_out_valid : std_logic;\nsignal data_in_ack, data_out_ack : std_logic := '0';\nsignal rxf, txe, rd, wr, si_wu : std_logic := '0';\n\nsignal read_done : std_logic := '0';\n\nbegin\n\ncomm : entity work.comm\n Port map ( clk => clk,\n rst => rst,\n ft2232_data => ft2232_data,\n data_in_valid => data_in_valid,\n data_out => data_out,\n data_out_valid => data_out_valid,\n data_in => data_in,\n data_in_ack => data_in_ack,\n data_out_ack => data_out_ack,\n rxf => rxf,\n txe => txe,\n rd => rd,\n wr => wr,\n si_wu => si_wu);\n\n rst_process : process\n begin\n\t\trst <= '1';\n\t\twait for clk_period;\n\t\trst <= '0';\n\t\twait;\n end process;\n \n -- Clock process definitions\n clk_process : process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n \n -- Clock process definitions\n read_process : process\n begin\n rxf <= '1';\n wait for 10*clk_period;\n rxf <= '0';\n wait until rd = '0';\n wait for 50 ns;\n ft2232_data <= \"10101010\";\n wait until rd = '1';\n ft2232_data <= \"ZZZZZZZZ\";\n wait for 25 ns;\n rxf <= '1';\n wait for 10*clk_period;\n assert data_out = \"10101010\" severity failure;\n data_out_ack <= '1';\n wait for clk_period;\n data_out_ack <= '0';\n wait for clk_period;\n assert data_out_valid = '0' severity failure;\n read_done <= '1';\n report \"Read done\";\n wait;\n end process;\n \n -- Clock process definitions\nwrite_process : process\nbegin\n wait until read_done = '1';\n data_in <= \"11110000\";\n data_in_valid <= '1';\n wait until wr = '0';\n wait for 25 ns;\n txe <= '1';\n assert ft2232_data = \"11110000\" severity failure;\n wait until data_in_ack = '1';\n data_in_valid <= '0';\n assert ft2232_data = \"ZZZZZZZZ\" severity failure;\n report \"Write done\";\n wait for 5*clk_period;\n txe <= '0';\n wait;\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/ft2232_behavioral.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 21:22:37\n-- Design Name: \n-- Module Name: ft2232_rx - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity ft2232_rx is\n Port ( data : in STD_LOGIC_VECTOR (7 downto 0);\n data_out : out STD_LOGIC_VECTOR (7 downto 0);\n rxf : out STD_LOGIC;\n txe : out STD_LOGIC;\n rd : out STD_LOGIC;\n wr : in STD_LOGIC;\n si_wu : in STD_LOGIC);\nend ft2232_rx;\n\narchitecture Behavioral of ft2232_rx is\n\nbegin\n\nrxf <= '1';\nrd <= '1';\n\nwrite_process : process\nbegin\n txe <= '0';\n wait until wr = '0';\n wait for 25 ns;\n txe <= '1';\n data_out <= data;\n wait for 200 ns;\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/io_bank_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 01.12.2016 20:52:12\n-- Design Name: \n-- Module Name: io_bank_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity io_bank_tb is\n-- Port ( );\nend io_bank_tb;\n\narchitecture Behavioral of io_bank_tb is\n\nsignal clk, rst : std_logic := '0';\n-- Clock period definitions\nconstant clk_period : time := 25 ns;\n\nsignal ft2232_data, data_out, data_in : std_logic_vector(7 downto 0) := (others => '0');\nsignal data_in_valid : std_logic := '0';\nsignal data_out_valid : std_logic;\nsignal data_in_ack, data_out_ack : std_logic := '0';\nsignal rxf, txe, rd, wr, si_wu : std_logic := '0';\n\nsignal io_data_out : std_logic_vector(7 downto 0);\nsignal io_data_out_valid, io_data_out_ack : std_logic := '0';\nsignal tx_filter, port_sw, rx_sw : std_logic_vector(1 downto 0);\nsignal port_sw_term, rx_term : std_logic;\n\nsignal lo_spi_data : STD_LOGIC_VECTOR(31 downto 0);\nsignal lo_spi_write : std_logic;\nsignal source_spi_data : STD_LOGIC_VECTOR(31 downto 0);\nsignal source_spi_write : std_logic;\n\nconstant TEST_DATA_LENGTH : integer := 11;\ntype test_data_type is array(TEST_DATA_LENGTH-1 downto 0) of std_logic_vector(7 downto 0);\nsignal test_data : test_data_type := (\n0 => COMM_START,\n1 => \"00000001\", -- Set switches\n2 => \"00000001\",\n3 => \"11111111\",\n4 => COMM_START,\n5 => \"00000100\", -- Set LO\n6 => \"00000011\",\n7 => \"11111111\",\n8 => \"10101010\",\n9 => \"01010101\",\n10 => \"00000000\"\n);\n\nbegin\n\ncomm : entity work.comm\n Port map ( clk => clk,\n rst => rst,\n ft2232_data => ft2232_data,\n data_in_valid => data_in_valid,\n data_out => data_out,\n data_out_valid => data_out_valid,\n data_in => data_in,\n data_in_ack => data_in_ack,\n data_out_ack => data_out_ack,\n rxf => rxf,\n txe => txe,\n rd => rd,\n wr => wr,\n si_wu => si_wu);\n \nio_bank : entity work.io_bank\n Port map ( clk => clk,\n rst => rst,\n data_in => data_out,\n data_valid => data_out_valid,\n data_in_ack => data_out_ack,\n data_out => io_data_out,\n data_out_valid => io_data_out_valid,\n data_out_ack => io_data_out_ack,\n tx_filter => tx_filter,\n port_sw => port_sw,\n rx_sw => rx_sw,\n lo_spi_data => lo_spi_data,\n lo_spi_write => lo_spi_write,\n source_spi_data => source_spi_data,\n source_spi_write => source_spi_write,\n led => open);\n\n rst_process : process\n begin\n\t\trst <= '1';\n\t\twait for clk_period;\n\t\trst <= '0';\n\t\twait;\n end process;\n \n -- Clock process definitions\n clk_process : process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n \n\n read_process : process\n variable i : integer := 0;\n begin\n if i = TEST_DATA_LENGTH then\n report \"End of data\";\n wait;\n end if;\n rxf <= '1';\n wait for 10*clk_period;\n rxf <= '0';\n wait until rd = '0';\n wait for 50 ns;\n ft2232_data <= test_data(i);\n wait until rd = '1';\n ft2232_data <= \"ZZZZZZZZ\";\n wait for 25 ns;\n rxf <= '1';\n wait for 10*clk_period;\n assert data_out = test_data(i) severity failure;\n i := i + 1;\n end process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/iq_packer_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 20:11:24\n-- Design Name: \n-- Module Name: iq_packer_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity iq_packer_tb is\n-- Port ( );\nend iq_packer_tb;\n\narchitecture Behavioral of iq_packer_tb is\n\nsignal clk, rst : std_logic := '0';\n-- Clock period definitions\nconstant clk_period : time := 25 ns;\n\nsignal ft2232_data, data_out, iq_data : std_logic_vector(7 downto 0) := (others => '0');\nsignal data_out_valid : std_logic;\nsignal data_in_ack, data_out_ack : std_logic := '0';\nsignal rxf, txe, rd, wr, si_wu : std_logic := '1';\n\nsignal start : std_logic := '0';\nsignal done : std_logic;\nsignal iq_data_valid, iq_data_ack : std_logic;\nsignal i_acc, q_acc, cycles : STD_LOGIC_VECTOR (IQ_ACC_WIDTH-1 downto 0) := (1 => '1', 2 => '1', 4 => '1', others => '0');\n\nbegin\n\niq_packer : entity work.iq_packer\n Port map ( clk => clk,\n rst => rst,\n start => start,\n done => done,\n i_acc => i_acc,\n q_acc => q_acc,\n cycles => cycles,\n data_out => iq_data,\n data_valid => iq_data_valid,\n data_ack => iq_data_ack);\n\ncomm : entity work.comm\n Port map ( clk => clk,\n rst => rst,\n ft2232_data => ft2232_data,\n data_in_valid => iq_data_valid,\n data_out => data_out,\n data_out_valid => data_out_valid,\n data_in => iq_data,\n data_in_ack => iq_data_ack,\n data_out_ack => data_out_ack,\n rxf => rxf,\n txe => txe,\n rd => rd,\n wr => wr,\n si_wu => si_wu);\n \n \nrst_process : process\nbegin\n rst <= '1';\n wait for clk_period;\n rst <= '0';\n wait;\nend process;\n \nstart_process : process\nbegin\n start <= '0';\n wait for 10*clk_period;\n start <= '1';\n wait for clk_period;\n start <= '0';\n wait;\nend process;\n\n-- Clock process definitions\nclk_process : process\nbegin\n clk <= '0';\n wait for clk_period/2;\n clk <= '1';\n wait for clk_period/2;\nend process;\n\nwrite_process : process\nbegin\n txe <= '0';\n wait until wr = '0';\n wait for 25 ns;\n txe <= '1';\n wait for 5*clk_period;\nend process;\n \nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/lo_sim.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 12:35:22\n-- Design Name: \n-- Module Name: lo_sim - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity lo_sim is\n-- Port ( );\nend lo_sim;\n\narchitecture Behavioral of lo_sim is\n\nconstant BIT_WIDTH : integer := 14;\n\nsignal clk, rst : std_logic := '0';\n\nsignal lo_out : std_logic_vector(BIT_WIDTH-1 downto 0);\n\n-- Clock period definitions\nconstant clk_period : time := 10 ns;\n\nbegin\n\nlo : entity work.lo\n Generic map(\n BIT_WIDTH => BIT_WIDTH,\n TABLE_SIZE => 5,\n TABLE_WIDTH => 3,\n COS => false\n )\n Port map( \n rst => rst,\n clk => clk,\n lo_out => lo_out\n);\n\n rst_process :process\n begin\n\t\trst <= '1';\n\t\twait for clk_period;\n\t\trst <= '0';\n\t\twait;\n end process;\n \n -- Clock process definitions\n clk_process :process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/mixer_sim.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 10:10:56\n-- Design Name: \n-- Module Name: mixer_sim - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity mixer_sim is\n-- Port ( );\nend mixer_sim;\n\narchitecture Behavioral of mixer_sim is\n\nsignal clk : std_logic := '0';\n\nsignal rf : std_logic_vector(13 downto 0) := (others => '0');\nsignal lo : std_logic_vector(15 downto 0) := (0 => '1', others => '0');\nsignal if_out : std_logic_vector(15 downto 0) := (others => '0');\n\n-- Clock period definitions\nconstant clk_period : time := 10 ns;\n\nbegin\n\nmixer : entity work.mixer\n Generic map(\n RF_WIDTH => 14,\n LO_WIDTH => 16,\n IF_WIDTH => 16\n )\n Port map( clk => clk,\n rf => rf,\n lo => lo,\n if_out => if_out\n);\n\n -- Clock process definitions\n clk_process :process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n\n -- Clock process definitions\n rf_process :process(clk, rf)\n begin\n\t\tif rising_edge(clk) then\n\t\t rf <= std_logic_vector(unsigned(rf)+1);\n\t\tend if;\n end process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/receiver_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 20:14:33\n-- Design Name: \n-- Module Name: receiver_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\nuse std.textio.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity receiver_tb is\n-- Port ( );\nend receiver_tb;\n\narchitecture Behavioral of receiver_tb is\n\nsignal clk, rst, rst_adc, start : std_logic := '0';\nsignal adc : std_logic_vector(ADC_WIDTH-1 downto 0) := (others => '0');\nsignal i_acc, q_acc, cycles : std_logic_vector(IQ_ACC_WIDTH-1 downto 0) := (others => '0');\n\nsignal sample_time : std_logic_vector(31 downto 0) := (others => '0');\nsignal sample_time_valid : std_logic := '0';\n\n-- Clock period definitions\nconstant clk_period : time := 10 ns;\n\nsignal i, q : Real := 0.0;\nsignal i_int, q_int : integer;\n\nbegin\n\n--adc_source : entity work.lo\n-- Generic map(\n-- BIT_WIDTH => ADC_WIDTH,\n-- TABLE_SIZE => 5,\n-- TABLE_WIDTH => 3,\n-- COS => false\n-- )\n-- Port map( \n-- rst => rst,\n-- clk => clk,\n-- lo_out => adc\n--);\n\nfile_adc : entity work.file_adc\n Generic map (in_file => \"/home/henrik/koodi/vna2/software/samples_no_signal.txt\")\n Port map ( clk => clk,\n rst => rst,\n adc_out => adc);\n\nrx : entity work.receiver\n Port map ( clk => clk,\n rst => rst,\n adc => adc,\n i_acc => i_acc,\n q_acc => q_acc,\n cycles => cycles,\n start => start,\n if_output => open,\n cic_output => open,\n cic_valid => open);\n \n\nrx_control : entity work.receiver_control\n Port map( clk => clk,\n rst => rst,\n start_early => open,\n start => start,\n sample_time => sample_time,\n sample_time_valid => sample_time_valid);\n\nrst_process :process\nbegin\n-- rst <= '1';\n-- rst_adc <= '1';\n-- wait for 2*clk_period;\n-- rst_adc <= '0';\n-- rst <= '0';\n wait for 1000*clk_period;\n report \"I:\" & real'image(i);\n report \"Q:\" & real'image(q);\nend process;\n \n-- Clock process definitions\nclk_process :process\nbegin\n clk <= '1';\n wait for clk_period/2;\n clk <= '0';\n wait for clk_period/2;\nend process;\n\niq_divide : process(clk)\nbegin\n if rising_edge(clk) then\n i <= Real(to_integer(signed(i_acc)))/(to_integer(unsigned(cycles)))/Real(32768000);\n q <= Real(to_integer(signed(q_acc)))/(to_integer(unsigned(cycles)))/Real(32768000);\n end if;\nend process;\n\niq_int : process(clk)\nbegin\n if rising_edge(clk) then\n i_int <= integer(i*Real(327680));\n q_int <= integer(q*Real(327680));\n end if;\nend process;\n\n--write process\nwriting : process\n file outfile : text is out \"receiver_tb_out.txt\"; --declare output file\n variable outline : line; --line number declaration \nbegin\nwait until clk = '0' and clk'event;\n\n--write(linenumber,value(real type),justified(side),field(width),digits(natural));\nwrite(outline, integer'image(to_integer(signed(i_acc)))&\", \"&integer'image(to_integer(signed(q_acc)))&\", \"&integer'image(to_integer(unsigned(cycles))));\n-- write line to external file.\nwriteline(outfile, outline);\n\nend process writing;\n \nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/spi3_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 12.02.2017 12:24:22\n-- Design Name: \n-- Module Name: spi3_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity spi3_tb is\n-- Port ( );\nend spi3_tb;\n\narchitecture Behavioral of spi3_tb is\n\nsignal clk, rst : std_logic := '0';\n-- Clock period definitions\nconstant clk_period : time := 25 ns;\n\nsignal lo_data_in, source_data_in : std_logic_vector(31 downto 0);\nsignal att_data_in : std_logic_vector(7 downto 0);\nsignal lo_write, source_write, att_write : std_logic := '0';\nsignal busy : std_logic;\nsignal spi_clk, spi_data_lo, spi_data_source, spi_data_att : std_logic;\nsignal spi_le_lo, spi_le_source, spi_le_att : std_logic;\n\nbegin\n\nspi3 : entity work.spi3\n Generic map ( SPI_CLK_DIVIDER => 1)\n Port map ( clk => clk,\n rst => rst,\n lo_data_in => lo_data_in,\n source_data_in => source_data_in,\n att_data_in => att_data_in,\n lo_write => lo_write,\n source_write => source_write,\n att_write => att_write,\n busy => busy,\n spi_clk => spi_clk,\n spi_data_lo => spi_data_lo,\n spi_data_source => spi_data_source,\n spi_data_att => spi_data_att,\n spi_le_lo => spi_le_lo,\n spi_le_source => spi_le_source,\n spi_le_att => spi_le_att);\n\n-- Clock process definitions\nclk_process : process\nbegin\n clk <= '0';\n wait for clk_period/2;\n clk <= '1';\n wait for clk_period/2;\nend process;\n\ntest_process : process\nbegin\n wait for 100 ns;\n wait until rising_edge(clk);\n lo_data_in <= \"10101010101010101010101010101010\";\n lo_write <= '1';\n wait for 2*clk_period;\n lo_write <= '0';\n wait for 5*clk_period;\n att_data_in <= \"01010101\";\n att_write <= '1';\n wait for 2*clk_period;\n att_write <= '0';\n wait for 5*clk_period;\n source_data_in <= \"01010101010101010101010101010101\";\n source_write <= '1';\n wait for 2*clk_period;\n source_write <= '0';\n wait;\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/spi_write_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 01.12.2016 18:23:00\n-- Design Name: \n-- Module Name: spi_write_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity spi_write_tb is\n-- Port ( );\nend spi_write_tb;\n\narchitecture Behavioral of spi_write_tb is\n\nconstant DATA_LENGTH : integer := 16;\n\nsignal clk, rst : std_logic := '0';\n\nsignal data : std_logic_vector(DATA_LENGTH-1 downto 0) := \"1010110111011110\";\nsignal spi_clk, spi_data, spi_cs : std_logic;\nsignal data_ack : std_logic;\nsignal data_in_valid : std_logic := '0';\n\n-- Clock period definitions\nconstant clk_period : time := 10 ns;\n\nbegin\n\nspi_write : entity work.spi_write\n Generic map (SPI_CLK_DIVIDER => 2,\n DATA_LENGTH => DATA_LENGTH)\n Port map ( clk => clk,\n rst => rst,\n spi_clk => spi_clk,\n spi_data => spi_data,\n spi_cs => spi_cs,\n data_in => data,\n data_in_valid => data_in_valid,\n data_in_ack => data_ack);\n\n rst_process : process\n begin\n\t\trst <= '1';\n\t\twait for clk_period;\n\t\trst <= '0';\n\t\twait;\n end process;\n \n -- Clock process definitions\n clk_process : process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n\n write_process : process\n begin\n wait for 10*clk_period;\n data_in_valid <= '1';\n wait until data_ack = '1';\n data_in_valid <= '0';\n end process;\n \n assert_process : process(spi_clk)\n variable i : integer := DATA_LENGTH-1;\n begin\n if rising_edge(spi_clk) then\n assert spi_data = data(i) severity failure;\n i := i - 1;\n if i = 0 then\n i := DATA_LENGTH-1;\n end if;\n end if;\n end process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/vna_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 13:44:10\n-- Design Name: \n-- Module Name: vna_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity vna_tb is\n-- Port ( );\nend vna_tb;\n\narchitecture Behavioral of vna_tb is\n\ncomponent lo is\n Generic (\n BIT_WIDTH : integer;\n TABLE_SIZE : integer;\n TABLE_WIDTH : integer;\n COS : boolean\n );\n Port ( rst : in std_logic;\n clk : in STD_LOGIC;\n lo_out : out STD_LOGIC_VECTOR (BIT_WIDTH-1 downto 0));\nend component;\n\n\nconstant LO_BIT_WIDTH : integer := 14;\nconstant ADC_BIT_WIDTH : integer := 14;\n\nsignal clk, rst : std_logic := '0';\n\nsignal rf : std_logic_vector(ADC_BIT_WIDTH-1 downto 0);\nsignal if_i_out, if_q_out : std_logic_vector(15 downto 0) := (others => '0');\n\n-- Clock period definitions\nconstant clk_period : time := 10 ns;\n\nbegin\n\ndownconvert : entity work.downconvert\n-- Generic map (\n-- ADC_WIDTH => ADC_WIDTH,\n-- IF_WIDTH => IF_WIDTH)\n Port map ( clk => clk,\n rst => rst,\n adc => rf,\n if_i_out => if_i_out,\n if_q_out => if_q_out);\n\nadc_source : lo\n Generic map(\n BIT_WIDTH => ADC_BIT_WIDTH,\n TABLE_SIZE => 5,\n TABLE_WIDTH => 3,\n COS => true\n )\n Port map( \n rst => rst,\n clk => clk,\n lo_out => rf\n);\n\n rst_process :process\n begin\n\t\trst <= '1';\n\t\twait for clk_period;\n\t\trst <= '0';\n\t\twait;\n end process;\n \n -- Clock process definitions\n clk_process :process\n begin\n\t\tclk <= '0';\n\t\twait for clk_period/2;\n\t\tclk <= '1';\n\t\twait for clk_period/2;\n end process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sim_1/new/vna_top_tb.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 21:00:18\n-- Design Name: \n-- Module Name: vna_top_tb - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity vna_top_tb is\n-- Port ( );\nend vna_top_tb;\n\narchitecture Behavioral of vna_top_tb is\n\nsignal clk, rst : std_logic := '0';\nsignal adc : std_logic_vector(ADC_WIDTH-1 downto 0) := (others => '0');\nsignal i_acc, q_acc, cycles : std_logic_vector(IQ_ACC_WIDTH-1 downto 0) := (others => '0');\n\n-- Clock period definitions\nconstant clk_period : time := 25 ns;\n\nsignal ft2232_data: std_logic_vector(7 downto 0) := (others => 'Z');\nsignal rxf, txe, rd, wr, si_wu : std_logic := '1';\nsignal led : std_logic;\nsignal adc_oe, adc_shdn : std_logic;\nsignal adc_of : std_logic := '0';\n\nsignal tx_filter : std_logic_vector(3 downto 0);\nsignal port_sw : std_logic_vector(1 downto 0);\nsignal rx_sw : std_logic_vector(5 downto 0);\nsignal lo_muxout, source_muxout: std_logic;\n\nsignal spi_clk, lo_spi_data, lo_le, lo_ce, lo_rf_enable : std_logic;\nsignal source_spi_data, source_le, source_ce, source_rf_enable : std_logic;\nsignal atten_spi_data, atten_le : std_logic;\nsignal lo_ld, source_ld : std_logic := '0';\nsignal mixer_enable, amp_pwdn, dither : std_logic;\n\nsignal read_data : std_logic_vector(7 downto 0);\nsignal new_data : std_logic := '0';\nsignal i_data, q_data, cycles_data : signed(8*IQ_BYTES-1 downto 0);\nsignal sw_data : std_logic_vector(7 downto 0);\n\nsignal read_done : std_logic := '0';\n\nsignal source_q, lo_q : std_logic_vector(31 downto 0) := (others => 'U');\nsignal atten_q : std_logic_vector(7 downto 0) := (others => 'U');\n\nconstant TEST_DATA_LENGTH : integer := 39;\ntype test_data_type is array(TEST_DATA_LENGTH-1 downto 0) of std_logic_vector(7 downto 0);\nsignal test_data : test_data_type := (\n--0 => COMM_START,\n--1 => \"00000100\", -- Write Source\n--2 => \"00000100\",\n--3 => \"11111111\",\n--4 => \"00000000\",\n--5 => \"10101010\",\n--6 => \"00110011\",\n--7 => COMM_START,\n--8 => \"00000100\", -- Write Source\n--9 => \"00000100\",\n--10 => \"11111111\",\n--11 => \"00000000\",\n--12 => \"10101010\",\n--13 => \"00110011\",\n--14 => COMM_START,\n--15 => \"00000100\", -- Write Source\n--16 => \"00000100\",\n--17 => \"11111111\",\n--18 => \"00000000\",\n--19 => \"10101010\",\n--20 => \"00110011\",\n--21 => COMM_START,\n--22 => \"00000100\", -- Write LO\n--23 => \"00000011\",\n--24 => \"11111111\",\n--25 => \"00000000\",\n--26 => \"10101010\",\n--27 => \"00110011\",\n--28 => COMM_START,\n--29 => \"00000100\", -- Write LO\n--30 => \"00000011\",\n--31 => \"11111111\",\n--32 => \"00000000\",\n--33 => \"10101010\",\n--34 => \"00110011\",\n--35 => COMM_START, -- Echo\n--36 => \"00000001\",\n--37 => \"00001010\",\n--38 => \"11111111\",\n--39 => COMM_START,\n--40 => \"00000001\",\n--41 => \"00001000\",\n--42 => \"00000000\",\n\n--others => (others => 'U')\n\n0 => COMM_START,\n1 => \"00000010\", -- Set switches\n2 => \"00000001\",\n3 => \"11111111\",\n4 => \"00111111\",\n5 => COMM_START,\n6 => \"00000001\", -- Set IO\n7 => \"00000010\",\n8 => \"11111111\",\n9 => COMM_START,\n10 => \"00000100\", -- Write Source\n11 => \"00000100\",\n12 => \"11111111\",\n13 => \"00000000\",\n14 => \"10101010\",\n15 => \"00110011\",\n16 => COMM_START,\n17 => \"00000001\", -- Write Atten\n18 => \"00000110\",\n19 => \"10101010\",\n20 => COMM_START,\n21 => \"00000001\", -- Write Atten again\n22 => \"00000110\",\n23 => \"10101010\",\n24 => COMM_START,\n25 => \"00000001\", -- Write PLL IO\n26 => \"00000111\",\n27 => \"00001111\",\n28 => COMM_START,\n29 => \"00000100\", -- Write sample time\n30 => \"00000101\",\n31 => \"00000000\",\n32 => \"00000000\",\n33 => \"00010000\",\n34 => \"00000000\",\n35 => COMM_START,\n36 => \"00000001\", -- Write tag\n37 => \"00001011\",\n38 => \"00001010\",\nothers => (others => 'U')\n);\n\nbegin\n\nadc_source : entity work.lo\n Generic map(\n BIT_WIDTH => ADC_WIDTH,\n TABLE_SIZE => 5,\n TABLE_WIDTH => 3,\n COS => false\n )\n Port map( \n rst => rst,\n clk => clk,\n lo_out => adc\n);\n\nvna_top : entity work.vna_top\n Port map ( clk => clk,\n adc_in => adc,\n adc_of => adc_of,\n adc_oe => adc_oe,\n adc_shdn => adc_shdn,\n ft2232_data => ft2232_data,\n rxf => rxf,\n txe => txe,\n rd => rd,\n wr => wr,\n si_wu => si_wu,\n tx_filter => tx_filter,\n port_sw => port_sw,\n rx_sw => rx_sw,\n spi_clk => spi_clk,\n lo_spi_data => lo_spi_data,\n lo_le => lo_le,\n lo_ce => lo_ce,\n lo_rf_enable => lo_rf_enable,\n lo_muxout => lo_muxout,\n source_muxout => source_muxout,\n source_spi_data => source_spi_data,\n source_le => source_le,\n source_ce => source_ce,\n source_rf_enable => source_rf_enable,\n atten_spi_data => atten_spi_data,\n atten_le => atten_le,\n lo_ld => lo_ld,\n source_ld => source_ld,\n mixer_enable => mixer_enable,\n amp_pwdn => amp_pwdn,\n dither => dither,\n xadc_vp => '0',\n xadc_vn => '0',\n led => led);\n \n--ft2232_rx : entity work.ft2232_rx\n--Port map( data => ft2232_data,\n-- data_out => read_data,\n-- rxf => rxf,\n-- txe => txe,\n-- rd => rd,\n-- wr => wr,\n-- si_wu => si_wu);\n\nrst_process :process\nbegin\n rst <= '1';\n wait for 2*clk_period;\n rst <= '0';\n wait;\nend process;\n\nld_process : process\nbegin\n wait for 100*clk_period;\n lo_ld <= '1';\n wait for 10*clk_period;\n source_ld <= '1';\n wait;\nend process;\n\n-- Clock process definitions\nclk_process : process\nbegin\n clk <= '0';\n wait for clk_period/2;\n clk <= '1';\n wait for clk_period/2;\nend process;\n\nread_process : process\nvariable i : integer := 0;\nbegin\n wait for 10*clk_period;\n if i = TEST_DATA_LENGTH then\n i := 0;\n read_done <= '1';\n report \"End of data\";\n wait;\n end if;\n rxf <= '1';\n wait for 81 ns;\n rxf <= '0';\n wait until rd = '0';\n ft2232_data <= (others => 'X');\n wait for 49 ns;\n ft2232_data <= test_data(i);\n wait until rd = '1';\n ft2232_data <= \"ZZZZZZZZ\";\n wait for 26 ns;\n rxf <= '1';\n i := i + 1;\nend process;\n\nwrite_process : process\nvariable i : integer := 0;\nbegin\n --if read_done = '0' then\n -- wait until read_done = '1';\n --end if;\n assert wr = '1' severity error;\n txe <= '0';\n wait for 100 ns;\n wait until wr = '0';\n wait for 50 ns;\n txe <= '1';\n read_data <= ft2232_data;\n new_data <= '1';\n --if read_data = COMM_START then\n -- wait for 10 ms;\n --end if;\n wait for clk_period;\n new_data <= '0';\n wait for 100 ns;\n i := i + 1;\nend process;\n\nreport_process : process(clk, new_data, read_data)\nvariable state, count : integer := 0;\nvariable i, q, cycles : std_logic_vector(IQ_ACC_WIDTH-1 downto 0) := (others => '0');\nvariable sw : std_logic_vector(7 downto 0) := (others => '0');\nbegin\n\nif rising_edge(clk) then\n if new_data = '1' then\n case state is\n when 0 =>\n if read_data = COMM_START then\n state := 1;\n end if;\n when 1 =>\n if read_data = \"00011000\" then\n state := 2;\n end if;\n when 2 =>\n if read_data = \"00000001\" then\n state := 3;\n count := 0;\n end if;\n when 6 => -- SW\n sw := read_data;\n state := 0;\n i_data <= signed(i);\n q_data <= signed(q);\n cycles_data <= signed(cycles);\n sw_data <= sw;\n when others =>\n -- 3, i\n -- 4, q\n -- 5, cycles\n -- 6, sw\n if state = 3 then\n i(8*(count+1)-1 downto 8*count) := read_data;\n elsif state = 4 then\n q(8*(count+1)-1 downto 8*count) := read_data;\n elsif state = 5 then\n cycles(8*(count+1)-1 downto 8*count) := read_data;\n end if;\n \n if count = IQ_BYTES-1 then\n state := state + 1;\n count := 0;\n else\n count := count + 1;\n end if;\n end case;\n end if;\n\nend if;\nend process;\n\nspi_process : process(clk, spi_clk, source_spi_data, source_le)\nvariable atten_le_prev, source_le_prev, lo_le_prev : std_logic := '0';\nvariable source_q_int, lo_q_int : std_logic_vector(31 downto 0);\nvariable atten_q_int : std_logic_vector(7 downto 0);\nbegin\nif rising_edge(spi_clk) then\n if source_le = '0' then\n source_q_int := source_spi_data&source_q_int(31 downto 1);\n end if;\n \n if lo_le = '0' then\n lo_q_int := lo_spi_data&lo_q_int(31 downto 1);\n end if;\n\n if atten_le = '0' then\n atten_q_int := atten_spi_data&atten_q_int(7 downto 1);\n end if;\nend if;\nif rising_edge(clk) then\n if source_le_prev = '0' and source_le = '1' then\n source_q <= source_q_int;\n end if;\n \n if lo_le_prev = '0' and lo_le = '1' then\n lo_q <= lo_q_int;\n end if;\n \n if atten_le_prev = '0' and atten_le = '1' then\n atten_q <= atten_q_int;\n end if;\n \n atten_le_prev := atten_le;\n source_le_prev := source_le;\n lo_le_prev := lo_le;\nend if;\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/imports/new/downconvert.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 13:58:22\n-- Design Name: \n-- Module Name: downconvert - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity downconvert is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n adc : in STD_LOGIC_VECTOR (ADC_WIDTH-1 downto 0);\n if_i_out : out STD_LOGIC_VECTOR (IF_WIDTH-1 downto 0);\n if_q_out : out STD_LOGIC_VECTOR (IF_WIDTH-1 downto 0));\nend downconvert;\n\narchitecture Behavioral of downconvert is\n\nsignal lo_i_out, lo_q_out : std_logic_vector(LO_WIDTH-1 downto 0) := (others => '0');\n\nbegin\n\nlo_i : entity work.lo\n Generic map(\n BIT_WIDTH => LO_WIDTH,\n TABLE_SIZE => 5,\n TABLE_WIDTH => 3,\n COS => true\n )\n Port map( \n rst => rst,\n clk => clk,\n lo_out => lo_i_out\n);\n\nlo_q : entity work.lo\n Generic map(\n BIT_WIDTH => LO_WIDTH,\n TABLE_SIZE => 5,\n TABLE_WIDTH => 3,\n COS => false\n )\n Port map( \n rst => rst,\n clk => clk,\n lo_out => lo_q_out\n);\n\nmixer_i : entity work.mixer\n Generic map(\n RF_WIDTH => ADC_WIDTH,\n LO_WIDTH => LO_WIDTH,\n IF_WIDTH => IF_WIDTH\n )\n Port map( clk => clk,\n rf => adc,\n lo => lo_i_out,\n if_out => if_i_out\n);\n\nmixer_q : entity work.mixer\n Generic map(\n RF_WIDTH => ADC_WIDTH,\n LO_WIDTH => LO_WIDTH,\n IF_WIDTH => IF_WIDTH\n )\n Port map( clk => clk,\n rf => adc,\n lo => lo_q_out,\n if_out => if_q_out\n);\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/imports/new/port_switch.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 15:33:21\n-- Design Name: \n-- Module Name: port_switch - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity port_switch is\n Port ( direction : in STD_LOGIC;\n term : in STD_LOGIC;\n swa_ctrl : out STD_LOGIC_VECTOR (1 downto 0);\n swb_ctrl : out STD_LOGIC_VECTOR (1 downto 0);\n swc_ctrl : out STD_LOGIC_VECTOR (1 downto 0));\nend port_switch;\n\narchitecture Behavioral of port_switch is\n\nbegin\n\nprocess(direction, term)\nbegin\n\nif term = '1' then\n swa_ctrl <= \"00\";\n swb_ctrl <= \"00\";\n swc_ctrl <= \"00\";\nelse\n if direction = '1' then\n swa_ctrl <= \"10\";\n swb_ctrl <= \"10\";\n swc_ctrl <= \"01\";\n else\n swa_ctrl <= \"01\";\n swb_ctrl <= \"01\";\n swc_ctrl <= \"10\";\n end if;\nend if;\n\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/imports/new/sample_packer.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 12.02.2017 19:54:50\n-- Design Name: \n-- Module Name: sample_packer - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity sample_packer is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n start : in STD_LOGIC;\n adc_in : in STD_LOGIC_VECTOR(13 downto 0);\n if_output : in STD_LOGIC_VECTOR(IF_WIDTH-1 downto 0);\n i_acc : in STD_LOGIC_VECTOR(IQ_ACC_WIDTH-1 downto 0);\n data_out : out STD_LOGIC_VECTOR(7 downto 0);\n data_valid : out STD_LOGIC;\n data_ack : in STD_LOGIC;\n sample_mux_ctrl : in STD_LOGIC_VECTOR(1 downto 0));\nend sample_packer;\n\narchitecture Behavioral of sample_packer is\n\nconstant packet_size : integer := 10003;\ntype memory_type is array (0 to packet_size-1) of std_logic_vector(15 downto 0);\nsignal packet_memory : memory_type := (0 => COMM_START&std_logic_vector(to_unsigned(packet_size-1, 8)), 1 => \"0000001000000000\", others => (others => '0'));\nsignal queue_full : std_logic := '0';\nsignal start_delay : std_logic := '0';\n\nbegin\n\nprocess(clk, rst, adc_in, if_output, i_acc, data_ack, sample_mux_ctrl)\nvariable pointer : unsigned(15 downto 0) := to_unsigned(2, 16);\nvariable word : std_logic := '0';\nvariable sample_buffer : STD_LOGIC_VECTOR (15 downto 0) := (others => '0');\nvariable wait_start : std_logic := '0';\nbegin\n\nif rising_edge(clk) then\n if wait_start = '1' then\n if start = '1' then\n wait_start := '0';\n end if;\n elsif queue_full = '0' then\n data_valid <= '0';\n packet_memory(to_integer(pointer)) <= sample_buffer;\n if pointer = packet_size-1 then\n queue_full <= '1';\n pointer := to_unsigned(0, 16);\n else\n pointer := pointer + to_unsigned(1, 16);\n end if;\n else\n if word = '0' then\n data_out <= packet_memory(to_integer(pointer))(15 downto 8);\n else\n data_out <= packet_memory(to_integer(pointer))(7 downto 0);\n end if;\n \n data_valid <= '1';\n \n if data_ack = '1' then\n if pointer = packet_size-1 then\n queue_full <= '0';\n wait_start := '1';\n data_valid <= '0';\n pointer := to_unsigned(2, 16);\n else\n if word = '0' then\n word := '1';\n else\n pointer := pointer + to_unsigned(1, 16);\n word := '0';\n end if;\n end if;\n end if;\n end if;\n \n if sample_mux_ctrl = \"00\" then\n sample_buffer := adc_in(13)&adc_in(13)&adc_in;\n elsif sample_mux_ctrl = \"01\" then\n sample_buffer := if_output(23 downto 8);\n elsif sample_mux_ctrl = \"10\" then\n sample_buffer := i_acc(25 downto 10);\n else\n sample_buffer := (others => '0');\n end if;\nend if;\nend process;\n\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/imports/new/spi3.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 12.02.2017 11:46:15\n-- Design Name: \n-- Module Name: spi3 - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity spi3 is\n Generic (SPI_CLK_DIVIDER : integer := 1);\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n lo_data_in : in STD_LOGIC_VECTOR (31 downto 0);\n source_data_in : in STD_LOGIC_VECTOR (31 downto 0);\n att_data_in : in STD_LOGIC_VECTOR (7 downto 0);\n lo_write : in STD_LOGIC;\n source_write : in STD_LOGIC;\n att_write : in STD_LOGIC;\n busy : out STD_LOGIC;\n spi_clk : out STD_LOGIC;\n spi_data_lo : out STD_LOGIC;\n spi_data_source : out STD_LOGIC;\n spi_data_att : out STD_LOGIC;\n spi_le_lo : out STD_LOGIC;\n spi_le_source : out STD_LOGIC;\n spi_le_att : out STD_LOGIC;\n source_ack : out STD_LOGIC;\n lo_ack : out STD_LOGIC;\n att_ack : out STD_LOGIC);\nend spi3;\n\narchitecture Behavioral of spi3 is\n\nsignal lo_reg, source_reg : std_logic_vector(31 downto 0) := (others => '0');\nsignal att_reg : std_logic_vector(7 downto 0) := (others => '0');\nsignal spi_clk_int : std_logic := '0';\nsignal spi_clk_en : std_logic := '0';\nsignal spi_le_lo_int, spi_le_source_int, spi_le_att_int : std_logic := '1';\n\nsignal lo_write_buffer, source_write_buffer, att_write_buffer : std_logic := '0';\n\nconstant LE_LENGTHEN : integer := 10;\nconstant NEXT_DELAY : integer := 50;\n\n-- LE lengthen\nsignal pipe_source, pipe_lo, pipe_att : std_logic_vector(LE_LENGTHEN-1 downto 0) := (others => '0');\n\n\nbegin\n\n\n\nspi_clk_process : process(clk, rst, lo_data_in, source_data_in, att_data_in, lo_write, source_write, att_write)\nvariable count : unsigned(7 downto 0) := to_unsigned(0, 8);\nvariable lo_bits, source_bits, att_bits : unsigned(5 downto 0) := to_unsigned(0, 6);\nvariable lo_bits_prev, source_bits_prev, att_bits_prev : unsigned(5 downto 0) := to_unsigned(0, 6);\n\nvariable source_data_in_buffer, lo_data_in_buffer : std_logic_vector(31 downto 0);\nvariable att_data_in_buffer : std_logic_vector(7 downto 0);\n\nvariable lo_done, source_done, att_done : std_logic := '1';\n\nvariable source_delay, lo_delay, att_delay : unsigned(7 downto 0) := to_unsigned(0, 8);\n\nbegin\nif rst = '1' then\n count := to_unsigned(0, 8);\nelsif rising_edge(clk) then\n -- Default LE values\n spi_le_lo_int <= '0';\n spi_le_source_int <= '0';\n spi_le_att_int <= '0';\n lo_ack <= '0';\n source_ack <= '0';\n att_ack <= '0';\n \n if source_delay /= to_unsigned(0, 8) then\n source_delay := source_delay - 1;\n end if;\n \n if lo_delay /= to_unsigned(0, 8) then\n lo_delay := lo_delay - 1;\n end if;\n \n if att_delay /= to_unsigned(0, 8) then\n att_delay := att_delay - 1;\n end if;\n\n -- Buffer write requests\n -- Write must begin on correct SPI clock phase\n if lo_write = '1' and lo_done = '1' and lo_delay = to_unsigned(0, 8) then\n lo_data_in_buffer := lo_data_in;\n lo_write_buffer <= '1';\n lo_ack <= '1';\n end if;\n \n if source_write = '1' and source_done = '1' and source_delay = to_unsigned(0, 8) then\n source_data_in_buffer := source_data_in;\n source_write_buffer <= '1';\n source_ack <= '1';\n end if;\n \n if att_write = '1' and att_done = '1' and att_delay = to_unsigned(0, 8) then\n att_data_in_buffer := att_data_in;\n att_write_buffer <= '1';\n att_ack <= '1';\n end if;\n \n if lo_done = '1' and source_done = '1' and att_done = '1' then\n spi_clk_en <= '0';\n else\n spi_clk_en <= '1';\n end if;\n\n if count = SPI_CLK_DIVIDER then\n count := to_unsigned(0, 8);\n if spi_clk_en = '1' then\n spi_clk_int <= not spi_clk_int;\n else\n spi_clk_int <= '0';\n end if;\n \n if spi_clk_int = '1' then\n \n -- Shift new bit\n if lo_write_buffer = '0' then\n lo_reg <= lo_reg(30 downto 0)&'0';\n end if;\n \n if source_write_buffer = '0' then\n source_reg <= source_reg(30 downto 0)&'0';\n end if;\n \n if att_write_buffer = '0' then\n att_reg <= att_reg(6 downto 0)&'0';\n end if;\n \n lo_bits_prev := lo_bits;\n source_bits_prev := source_bits;\n att_bits_prev := att_bits;\n \n if lo_bits /= to_unsigned(0, 6) then\n lo_bits := lo_bits - to_unsigned(1, 6);\n end if;\n \n if source_bits /= to_unsigned(0, 6) then\n source_bits := source_bits - to_unsigned(1, 6);\n end if;\n \n if att_bits /= to_unsigned(0, 6) then\n att_bits := att_bits - to_unsigned(1, 6);\n end if;\n \n if lo_bits_prev = to_unsigned(1, 5) and lo_bits = to_unsigned(0, 5) then\n spi_le_lo_int <= '1';\n lo_done := '1';\n lo_delay := to_unsigned(NEXT_DELAY, 8);\n end if;\n \n if source_bits_prev = to_unsigned(1, 5) and source_bits = to_unsigned(0, 5) then\n spi_le_source_int <= '1';\n source_done := '1';\n source_delay := to_unsigned(NEXT_DELAY, 8);\n end if;\n \n if att_bits_prev = to_unsigned(1, 5) and att_bits = to_unsigned(0, 5) then\n spi_le_att_int <= '1';\n att_done := '1';\n att_delay := to_unsigned(NEXT_DELAY, 8);\n end if;\n \n end if;\n \n \n -- Start a new write on falling SPI clock edge\n if spi_clk_en = '0' or (spi_clk_en = '1' and spi_clk_int = '1') then\n \n if lo_write_buffer = '1' then\n lo_write_buffer <= '0';\n lo_bits := to_unsigned(32, 6);\n lo_reg <= lo_data_in_buffer;\n lo_done := '0';\n end if;\n \n if source_write_buffer = '1' then\n source_write_buffer <= '0';\n source_bits := to_unsigned(32, 6);\n source_reg <= source_data_in_buffer;\n source_done := '0';\n end if;\n \n if att_write_buffer = '1' then\n att_write_buffer <= '0';\n att_bits := to_unsigned(8, 6);\n att_reg <= att_data_in_buffer;\n att_done := '0';\n end if;\n \n end if;\n \n else\n count := count + to_unsigned(1, 8);\n end if;\n \nend if;\nend process;\n\nbusy <= spi_clk_en;\n\nspi_clk <= spi_clk_int;\n\nspi_data_lo <= lo_reg(31);\nspi_data_source <= source_reg(31);\nspi_data_att <= att_reg(7);\n\n-- Lengthen the LE pulse\nle_process : process(clk, spi_le_lo_int, spi_le_source_int, spi_le_att_int, pipe_lo, pipe_source, pipe_att)\n\nvariable le_lo_or, le_source_or, le_att_or : std_logic := '0';\nbegin\nif rising_edge(clk) then\n\n pipe_source(0) <= spi_le_source_int;\n pipe_lo(0) <= spi_le_lo_int;\n pipe_att(0) <= spi_le_att_int;\n le_lo_or := '0';\n le_source_or := '0';\n le_att_or := '0';\n \n for i in 1 to LE_LENGTHEN-1 loop\n pipe_source(i) <= pipe_source(i-1);\n pipe_lo(i) <= pipe_lo(i-1);\n pipe_att(i) <= pipe_att(i-1);\n \n le_lo_or := le_lo_or or pipe_lo(i);\n le_source_or := le_source_or or pipe_source(i);\n le_att_or := le_att_or or pipe_att(i);\n end loop;\n \n spi_le_lo <= le_lo_or;\n spi_le_source <= le_source_or;\n spi_le_att <= le_att_or;\n \nend if;\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/imports/new/vna_top.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 03.12.2016 10:06:15\n-- Design Name: \n-- Module Name: vna_top - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity vna_top is\n Port ( clk : in STD_LOGIC;\n adc_in : in STD_LOGIC_VECTOR (13 downto 0);\n adc_of : in STD_LOGIC;\n adc_oe : out STD_LOGIC;\n adc_shdn : out STD_LOGIC;\n ft2232_data : inout STD_LOGIC_VECTOR (7 downto 0);\n rxf : in STD_LOGIC;\n txe : in STD_LOGIC;\n rd : out STD_LOGIC;\n wr : out STD_LOGIC;\n si_wu : out STD_LOGIC;\n tx_filter : out STD_LOGIC_VECTOR(3 downto 0);\n port_sw : out STD_LOGIC_VECTOR (1 downto 0);\n rx_sw : out STD_LOGIC_VECTOR (5 downto 0);\n spi_clk : out STD_LOGIC;\n lo_spi_data : out STD_LOGIC;\n lo_le : out STD_LOGIC;\n lo_ce : out STD_LOGIC;\n lo_rf_enable : out STD_LOGIC;\n lo_muxout : in STD_LOGIC;\n source_muxout : in STD_LOGIC;\n source_spi_data : out STD_LOGIC;\n source_le : out STD_LOGIC;\n source_ce : out STD_LOGIC;\n source_rf_enable : out STD_LOGIC;\n atten_spi_data : out STD_LOGIC;\n atten_le : out STD_LOGIC;\n lo_ld : in STD_LOGIC;\n source_ld : in STD_LOGIC;\n mixer_enable : out STD_LOGIC;\n amp_pwdn : out STD_LOGIC;\n dither : out STD_LOGIC;\n xadc_vp : in STD_LOGIC;\n xadc_vn : in STD_LOGIC;\n led : out STD_LOGIC);\nend vna_top;\n\narchitecture Behavioral of vna_top is\n\nsignal rst : std_logic := '0';\n\n-- Receiver\nsignal i_acc, q_acc, cycles : STD_LOGIC_VECTOR(IQ_ACC_WIDTH-1 downto 0);\n-- Early signal comes one clock cycle before\nsignal rx_start, rx_start_early : std_logic := '0';\n\n-- Receiver control\nsignal rx_sample_time : std_logic_vector(31 downto 0);\nsignal rx_sample_time_valid : std_logic;\n\n--FT2232\nsignal comm_data_out, comm_data_in : std_logic_vector(7 downto 0);\nsignal comm_data_in_valid : std_logic := '0';\nsignal comm_data_out_valid : std_logic;\nsignal comm_data_in_ack, comm_data_out_ack : std_logic := '0';\n\n-- IO\nsignal lo_data, source_data : std_logic_vector(31 downto 0);\nsignal atten_data : std_logic_vector(7 downto 0);\nsignal lo_write, source_write, atten_write : std_logic := '0';\n\n-- IQ packer\nsignal iq_tx_done : std_logic;\n\nsignal tx_mux_ctrl : std_logic_vector(1 downto 0);\nsignal samples_data_out : std_logic_vector(7 downto 0);\nsignal samples_data_valid, samples_data_ack : std_logic; \nsignal iq_data_out : std_logic_vector(7 downto 0);\nsignal iq_data_valid, iq_data_ack : std_logic; \n\nsignal dither_rst : std_logic;\nsignal sample_mux_ctrl : std_logic_vector(1 downto 0);\nsignal if_output : std_logic_vector(IF_WIDTH-1 downto 0);\n\nsignal receiver_hold : std_logic;\nsignal rx_sw_select : rx_sw_type;\nsignal rx_sw_mux_ctrl : std_logic;\nsignal rx_sw_io : std_logic_vector(5 downto 0);\n\nsignal lo_spi_ack, source_spi_ack, att_spi_ack : std_logic;\n\nsignal io_data_out : std_logic_vector(7 downto 0);\nsignal io_data_valid, io_data_ack : std_logic; \n\nsignal iq_tag : std_logic_vector(7 downto 0);\nsignal iq_tag_valid : std_logic;\n\nsignal last_byte_iq, last_byte : std_logic;\n\nbegin\n\nreceiver : entity work.receiver\n Port map ( clk => clk,\n rst => rst,\n adc => adc_in,\n i_acc => i_acc,\n q_acc => q_acc,\n cycles => cycles,\n start => rx_start,\n if_output => if_output,\n receiver_hold => receiver_hold);\n \nreceiver_control : entity work.receiver_control\n Port map ( clk => clk,\n rst => rst,\n start_early => rx_start_early,\n start => rx_start,\n sample_time => rx_sample_time,\n sample_time_valid => rx_sample_time_valid,\n receiver_hold => receiver_hold,\n lo_ld => lo_ld,\n source_ld => source_ld,\n rx_sw => rx_sw_select,\n tx_ready => iq_tx_done);\n \ncomm : entity work.comm\n Port map ( clk => clk,\n rst => rst,\n ft2232_data => ft2232_data,\n data_in_valid => comm_data_in_valid,\n data_out => comm_data_out,\n data_out_valid => comm_data_out_valid,\n data_in => comm_data_in,\n data_in_ack => comm_data_in_ack,\n data_out_ack => comm_data_out_ack,\n rxf => rxf,\n txe => txe,\n rd => rd,\n wr => wr,\n si_wu => si_wu,\n last_byte => last_byte);\n \nled <= lo_ld;\n \niq_packer : entity work.iq_packer\n Port map ( clk => clk,\n rst => rst,\n start => rx_start_early,\n done => iq_tx_done,\n i_acc => i_acc,\n q_acc => q_acc,\n cycles => cycles,\n data_out => iq_data_out,\n data_valid => iq_data_valid,\n data_ack => iq_data_ack,\n rx_sw => rx_sw_select,\n iq_tag_in => iq_tag,\n iq_tag_valid => iq_tag_valid,\n last_byte => last_byte_iq);\n\nsample_packer : entity work.sample_packer\n Port map (clk => clk,\n rst => rst,\n start => rx_start_early,\n adc_in => adc_in,\n if_output => if_output,\n i_acc => i_acc,\n data_out => samples_data_out,\n data_valid => samples_data_valid,\n data_ack => samples_data_ack,\n sample_mux_ctrl => sample_mux_ctrl);\n \ntx_mux : entity work.tx_mux\n Port map (mux => tx_mux_ctrl,\n data_out => comm_data_in,\n data_valid => comm_data_in_valid,\n data_ack => comm_data_in_ack,\n samples_data => samples_data_out,\n samples_data_valid => samples_data_valid,\n samples_data_ack => samples_data_ack,\n iq_data => iq_data_out,\n iq_data_valid => iq_data_valid,\n iq_data_ack => iq_data_ack,\n io_data => io_data_out,\n io_data_valid => io_data_valid,\n io_data_ack => io_data_ack,\n last_byte_iq => last_byte_iq,\n last_byte => last_byte);\n \nio_bank : entity work.io_bank\n Port map ( clk => clk,\n rst => rst,\n data_in => comm_data_out,\n data_valid => comm_data_out_valid,\n data_in_ack => comm_data_out_ack,\n data_out => io_data_out,\n data_out_valid => io_data_valid,\n data_out_ack => io_data_ack,\n rx_sample_time => rx_sample_time,\n rx_sample_time_valid => rx_sample_time_valid,\n tx_filter => tx_filter,\n port_sw => port_sw,\n rx_sw => rx_sw_io,\n rx_sw_mux_ctrl => rx_sw_mux_ctrl,\n lo_spi_data => lo_data,\n lo_spi_write => lo_write,\n source_spi_data => source_data,\n source_spi_write => source_write,\n atten_spi_data => atten_data,\n atten_spi_write => atten_write,\n amp_pwdn => amp_pwdn,\n mixer_enable => mixer_enable,\n lo_ce => lo_ce,\n source_ce => source_ce,\n led => open,\n adc_shdn => adc_shdn,\n adc_oe => adc_oe,\n source_rf_enable => source_rf_enable,\n lo_rf_enable => lo_rf_enable,\n tx_mux_ctrl => tx_mux_ctrl,\n dither_rst => dither_rst,\n sample_mux_ctrl => sample_mux_ctrl,\n lo_spi_ack => lo_spi_ack,\n source_spi_ack => source_spi_ack,\n att_spi_ack => att_spi_ack,\n iq_tag_out => iq_tag,\n iq_tag_valid => iq_tag_valid); \n\nrx_sw_mux : entity work.rx_sw_mux\n Port map ( rx_sw_receiver => rx_sw_select,\n rx_sw_io => rx_sw_io,\n rx_sw => rx_sw,\n ctrl => rx_sw_mux_ctrl);\n\nspi3 : entity work.spi3\n Generic map ( SPI_CLK_DIVIDER => 5)\n Port map ( clk => clk,\n rst => rst,\n lo_data_in => lo_data,\n source_data_in => source_data,\n att_data_in => atten_data,\n lo_write => lo_write,\n source_write => source_write,\n att_write => atten_write,\n busy => open,\n spi_clk => spi_clk,\n spi_data_lo => lo_spi_data,\n spi_data_source => source_spi_data,\n spi_data_att => atten_spi_data,\n spi_le_lo => lo_le,\n spi_le_source => source_le,\n spi_le_att => atten_le,\n lo_ack => lo_spi_ack,\n source_ack => source_spi_ack,\n att_ack => att_spi_ack);\n\ndither_generator : entity work.dither\n Port map ( clk => clk,\n rst => dither_rst,\n q => dither);\n\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/acc_control.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 18:31:48\n-- Design Name: \n-- Module Name: acc_control - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity acc_control is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n acc_reset : out STD_LOGIC;\n receiver_hold : in STD_LOGIC);\nend acc_control;\n\narchitecture Behavioral of acc_control is\n\nbegin\n\n\nprocess(clk, rst)\nvariable i : unsigned(11 downto 0) := to_unsigned(0, 12);\nbegin\n\nif rst = '1' then\n i := to_unsigned(0, 12);\n acc_reset <= '1';\nelsif rising_edge(clk) then\n acc_reset <= '1';\n if i = SKIP_SAMPLES then\n acc_reset <= receiver_hold;\n else\n if receiver_hold = '0' then\n i := i + 1;\n end if;\n end if;\nend if;\n\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/accumulator.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 19:47:49\n-- Design Name: \n-- Module Name: average - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity accumulator is\n Generic (\n IN_WIDTH : integer := 14;\n OUT_WIDTH : integer := 32\n );\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n valid : in STD_LOGIC;\n data : in STD_LOGIC_VECTOR (IN_WIDTH-1 downto 0);\n average : out STD_LOGIC_VECTOR (OUT_WIDTH-1 downto 0));\nend accumulator;\n\narchitecture Behavioral of accumulator is\n\nsignal accum : signed(OUT_WIDTH-1 downto 0) := to_signed(0, OUT_WIDTH);\n\nbegin\n\nprocess(clk, rst, valid, data)\nbegin\n\nif rst = '1' then\n accum <= to_signed(0, OUT_WIDTH);\nelsif rising_edge(clk) then\n average <= std_logic_vector(accum);\n if valid = '1' then\n accum <= accum + signed(data);\n end if;\nend if;\n\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/comm.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 28.11.2016 20:21:11\n-- Design Name: \n-- Module Name: comm - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity comm is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n ft2232_data : inout STD_LOGIC_VECTOR (7 downto 0);\n data_in_valid : in STD_LOGIC;\n data_out : out STD_LOGIC_VECTOR (7 downto 0);\n data_out_valid : out STD_LOGIC;\n data_in : in STD_LOGIC_VECTOR(7 downto 0);\n data_in_ack : out STD_LOGIC;\n data_out_ack : in STD_LOGIC;\n rxf : in STD_LOGIC;\n txe : in STD_LOGIC;\n rd : out STD_LOGIC;\n wr : out STD_LOGIC;\n si_wu : out STD_LOGIC;\n last_byte : in STD_LOGIC);\nend comm;\n\narchitecture Behavioral of comm is\n\nconstant WRITE_WR_LENGTH : integer := 4; -- Clock cycles\nconstant READ_RD_LENGTH : integer := 4; -- Clock cycles\nconstant SI_WU_DELAY : integer := 2; -- Clock cycles\nconstant SI_WU_LENGTH : integer := 4; -- Clock cycles\n\nsignal reading : std_logic := '0';\n\nsignal ft2232_data_write : STD_LOGIC_VECTOR(7 downto 0) := (others => '1');\n\nsignal data_out_int : STD_LOGIC_VECTOR(7 downto 0) := (others => '0');\n\nsignal rxf_sync, txe_sync : std_logic := '1';\n\nsignal last_byte_int : std_logic := '0';\nsignal si_wu_out : std_logic := '1';\n\nsignal si_wu_pipe : std_logic_vector(SI_WU_DELAY - 1 downto 0) := (others => '1');\nsignal si_wu_lengthen : std_logic_vector(SI_WU_LENGTH - 1 downto 0) := (others => '1');\n\nbegin\n\nsync_process : process(clk, rxf, txe)\nvariable rxf_sync2, txe_sync2 : std_logic := '1';\nbegin\n\nif rising_edge(clk) then\n txe_sync <= txe_sync2;\n rxf_sync <= rxf_sync2;\n txe_sync2 := txe;\n rxf_sync2 := rxf;\nend if;\nend process;\n\nprocess(clk, rst, data_out_ack, txe_sync, rxf_sync)\ntype ft_state_type is (S_START, S_TX_WR, S_TX_HOLD, S_RX_RD, S_RX_READ, S_RX_SEND, S_RX_WAIT);\nvariable state : ft_state_type := S_START;\nvariable pulse_count : unsigned(4 downto 0) := to_unsigned(0, 5);\nbegin\n\nif rst = '1' then\n ft2232_data_write <= (others => '1');\n state := S_START;\n pulse_count := to_unsigned(0, 5);\n wr <= '1';\n data_in_ack <= '0';\nelsif rising_edge(clk) then\n -- Default values\n wr <= '1';\n rd <= '1';\n si_wu_out <= '1';\n \n data_in_ack <= '0';\n \n ft2232_data_write <= (others => '1');\n\n if (state = S_TX_WR or state = S_TX_HOLD) then\n reading <= '0';\n else\n reading <= '1';\n end if;\n \n case state is\n \n when S_START =>\n -- Priorize reading\n if rxf_sync = '0' then\n state := S_RX_RD;\n rd <= '0';\n pulse_count := to_unsigned(READ_RD_LENGTH, 5);\n elsif data_in_valid = '1' and txe_sync = '0' then\n state := S_TX_WR;\n wr <= '1';\n ft2232_data_write <= data_in;\n last_byte_int <= last_byte;\n pulse_count := to_unsigned(WRITE_WR_LENGTH, 5);\n end if;\n \n when S_TX_WR =>\n -- Holds WR signal high\n ft2232_data_write <= data_in;\n if pulse_count = to_unsigned(0, 5) then\n state := S_TX_HOLD;\n wr <= '0'; -- Strobe WR to signal a write\n pulse_count := to_unsigned(WRITE_WR_LENGTH, 5);\n else\n pulse_count := pulse_count - 1;\n end if;\n \n when S_TX_HOLD =>\n -- Wait for TXE to rise\n wr <= '0';\n ft2232_data_write <= data_in;\n if txe_sync = '1' then\n data_in_ack <= '1';\n state := S_START;\n si_wu_out <= not last_byte_int;\n end if;\n \n when S_RX_RD =>\n -- Holds RD signal low\n rd <= '0';\n if pulse_count = to_unsigned(0, 5) then\n state := S_RX_READ;\n else\n pulse_count := pulse_count - 1;\n end if;\n \n when S_RX_READ =>\n -- Read the data\n rd <= '1';\n data_out_int <= ft2232_data;\n data_out_valid <= '1';\n state := S_RX_SEND;\n \n when S_RX_SEND =>\n rd <= '1';\n data_out_valid <= '1';\n if data_out_ack = '1' then\n data_out_valid <= '0';\n state := S_RX_WAIT;\n pulse_count := to_unsigned(READ_RD_LENGTH, 5);\n end if;\n \n when S_RX_WAIT =>\n if rxf_sync = '1' or pulse_count = to_unsigned(0, 5) then\n state := S_START;\n else\n pulse_count := pulse_count - 1;\n end if;\n \n when others =>\n state := S_START;\n \n end case;\nend if;\n\nend process;\n\nsi_wu_process : process(clk, si_wu_out)\n\nvariable si_wu_and : std_logic := '1';\nbegin\n\nif rising_edge(clk) then\n\nsi_wu_pipe(0) <= si_wu_out;\nsi_wu_lengthen(0) <= si_wu_pipe(SI_WU_DELAY - 1);\nfor i in 1 to SI_WU_DELAY-1 loop\n si_wu_pipe(i) <= si_wu_pipe(i-1);\nend loop;\n\nsi_wu_and := si_wu_lengthen(0);\nfor i in 1 to SI_WU_LENGTH-1 loop\n si_wu_lengthen(i) <= si_wu_lengthen(i-1);\n si_wu_and := si_wu_and and si_wu_lengthen(i);\nend loop;\n\nend if;\n\nsi_wu <= si_wu_and;\n\nend process;\n\ndata_out <= data_out_int;\n\nft2232_data <= (others => 'Z') when reading = '1' else ft2232_data_write;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/dither.vhd", "content": "library IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity dither is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n q : out STD_LOGIC);\nend dither;\n\narchitecture Behavioral of dither is\n\nconstant OUT_WIDTH : integer := 8;\n\ncomponent lfsr is \ngeneric ( SEED : STD_LOGIC_VECTOR(30 downto 0);\n OUT_WIDTH : integer);\nport(\n clk : in STD_LOGIC;\n q : out STD_LOGIC_VECTOR (OUT_WIDTH-1 downto 0);\n rst : in STD_LOGIC);\nend component;\n\nsignal uniform1 : std_logic_vector(OUT_WIDTH-1 downto 0);\n\nbegin\n\nunif1: lfsr \ngeneric map (SEED => std_logic_vector(to_unsigned(697757461,31)),\n OUT_WIDTH => OUT_WIDTH)\nport map(\n clk => clk,\n q => uniform1,\n rst => rst\n);\n\nq <= uniform1(0);\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/file_adc.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 14.02.2017 21:18:56\n-- Design Name: \n-- Module Name: file_adc - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse std.textio.all; --include package textio.vhd\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity file_adc is\n Generic (in_file : string := \"samples.txt\");\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n adc_out : out STD_LOGIC_VECTOR (13 downto 0));\nend file_adc;\n\narchitecture Behavioral of file_adc is\n\nconstant DEPTH : integer := 5000;\n\nsubtype word_t is std_logic_vector(13 downto 0);\ntype ram_t is array(0 to DEPTH-1) of word_t;\n\n-- Read a *.hex file\nimpure function ocram_ReadMemFile(FileName : STRING) return ram_t is\n file infile : text is in FileName;\n variable inline : line; --line number declaration\n variable dataread1 : integer;\n variable Result : ram_t := (others => (others => '0'));\n\nbegin\n for i in 0 to DEPTH - 1 loop\n exit when endfile(infile);\n\n readline(infile, inline);\n read(inline, dataread1);\n Result(i) := std_logic_vector(to_signed(dataread1, 14));\n end loop;\n\n return Result;\nend function;\n\nsignal ram : ram_t := ocram_ReadMemFile(in_file);\nsignal pointer : integer := 0;\n\nbegin\n\nprocess(clk, rst)\n\nbegin\nif rst = '1' then\n pointer <= 0;\nelsif rising_edge(clk) then\n if pointer < DEPTH - 1 then\n pointer <= pointer + 1;\n else\n pointer <= 0;\n end if;\nend if;\nend process;\n\nadc_out <= ram(pointer);\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/io_bank.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 28.11.2016 20:46:04\n-- Design Name: \n-- Module Name: io_bank - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity io_bank is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n data_in : in STD_LOGIC_VECTOR (7 downto 0);\n data_valid : in STD_LOGIC;\n data_in_ack : out STD_LOGIC;\n data_out : out STD_LOGIC_VECTOR (7 downto 0);\n data_out_valid : out STD_LOGIC;\n data_out_ack : in STD_LOGIC;\n rx_sample_time : out STD_LOGIC_VECTOR(31 downto 0);\n rx_sample_time_valid : out STD_LOGIC;\n tx_filter : out STD_LOGIC_VECTOR(3 downto 0);\n port_sw : out STD_LOGIC_VECTOR (1 downto 0);\n rx_sw : out STD_LOGIC_VECTOR (5 downto 0);\n rx_sw_mux_ctrl : out STD_LOGIC;\n lo_spi_data : out STD_LOGIC_VECTOR(31 downto 0);\n lo_spi_write : out std_logic;\n source_spi_data : out STD_LOGIC_VECTOR(31 downto 0);\n source_spi_write : out STD_LOGIC;\n atten_spi_data : out STD_LOGIC_VECTOR(7 downto 0);\n atten_spi_write : out STD_LOGIC;\n amp_pwdn : out STD_LOGIC;\n mixer_enable : out STD_LOGIC;\n lo_ce : out STD_LOGIC;\n source_ce : out STD_LOGIC;\n led : out STD_LOGIC;\n adc_shdn : out STD_LOGIC;\n adc_oe : out STD_LOGIC;\n source_rf_enable : out STD_LOGIC;\n lo_rf_enable : out STD_LOGIC;\n tx_mux_ctrl : out STD_LOGIC_VECTOR(1 downto 0);\n dither_rst : out STD_LOGIC;\n sample_mux_ctrl : out STD_LOGIC_VECTOR(1 downto 0);\n lo_spi_ack : in STD_LOGIC;\n source_spi_ack : in STD_LOGIC;\n att_spi_ack : in STD_LOGIC;\n iq_tag_out : out STD_LOGIC_VECTOR(7 downto 0);\n iq_tag_valid : out STD_LOGIC);\nend io_bank;\n\narchitecture Behavioral of io_bank is\n\nconstant MAX_PACKET_LENGTH : integer := 8;\n\ntype memory_type is array (0 to MAX_PACKET_LENGTH-1) of std_logic_vector(7 downto 0);\nsignal memory : memory_type := (others => (others => '0'));\nsignal port_sw_int: std_logic_vector(1 downto 0) := \"00\";\nsignal tx_filter_int : std_logic_vector(3 downto 0) := \"0000\";\nsignal rx_sw_int : std_logic_vector(5 downto 0) := \"000000\";\nsignal amp_pwdn_int, mixer_enable_int, led_int : std_logic := '0';\nsignal adc_oe_int, adc_shdn_int : std_logic := '1';\nsignal source_rf_enable_int, lo_rf_enable_int : std_logic := '0';\nsignal lo_ce_int, source_ce_int : std_logic := '0';\nsignal rx_sample_time_int : std_logic_vector(31 downto 0) := (others => '0');\nsignal rx_sample_time_valid_int : std_logic := '0';\nsignal tx_mux_ctrl_int : std_logic_vector(1 downto 0) := \"00\";\nsignal dither_rst_int : std_logic := '0';\nsignal sample_mux_ctrl_int : std_logic_vector(1 downto 0) := \"00\";\nsignal rx_sw_mux_ctrl_int : std_logic := '0';\nsignal iq_tag_out_int : std_logic_vector(7 downto 0) := (others => '0');\n\nsignal valid_prev : std_logic := '0';\n\nsignal write_word : std_logic_vector(7 downto 0);\nsignal new_write, writing : std_logic := '0';\n\n\n\nbegin\n\nprocess(clk, rst, data_in, data_valid, data_out_ack)\n\ntype comm_state_type is (S_START, S_LENGTH, S_ID, S_DATA, S_PROCESS_DATA);\nvariable state : comm_state_type := S_START;\nvariable data_length : unsigned(7 downto 0) := to_unsigned(0, 8);\nvariable data_counter : unsigned(7 downto 0) := to_unsigned(0, 8);\nvariable ready : std_logic := '1';\nvariable data_id : unsigned(7 downto 0) := to_unsigned(0, 8);\n\nbegin\n\nif rst = '1' then\n state := S_START;\n data_length := to_unsigned(0, 8);\n ready := '1';\n data_id := to_unsigned(0, 8);\n valid_prev <= '0';\n amp_pwdn_int <= '0';\n mixer_enable_int <= '0';\n led_int <= '0';\n tx_filter_int <= (others => '0');\n adc_oe_int <= '1';\n adc_shdn_int <= '1';\n source_rf_enable_int <= '0';\n lo_rf_enable_int <= '0';\nelsif rising_edge(clk) then\n lo_spi_write <= '0';\n source_spi_write <= '0';\n atten_spi_write <= '0';\n data_in_ack <= '0';\n rx_sample_time_valid_int <= '0';\n valid_prev <= '0';\n new_write <= '0';\n iq_tag_valid <= '0';\n \n if new_write = '1' then\n data_out <= write_word;\n data_out_valid <= '1';\n writing <= '1';\n elsif writing = '1' then\n data_out_valid <= '1';\n if data_out_ack = '1' then\n writing <= '0';\n data_out_valid <= '0';\n end if;\n else\n data_out_valid <= '0';\n end if;\n\n -- data_valid is high for 2 clock cycles, so we need to make\n -- sure that data is loaded only at first cycle with valid_prev signal\n if ready = '1' and data_valid = '1' and valid_prev = '0' then\n data_in_ack <= '1';\n valid_prev <= '1';\n \n case state is \n when S_START =>\n if data_in = COMM_START then\n state := S_LENGTH;\n end if;\n \n when S_LENGTH =>\n data_length := unsigned(data_in);\n data_counter := to_unsigned(0, 8);\n state := S_ID;\n \n when S_ID =>\n data_id := unsigned(data_in);\n state := S_DATA;\n \n when S_DATA =>\n memory(to_integer(data_counter)) <= data_in;\n \n if data_counter /= MAX_PACKET_LENGTH-1 then\n data_counter := data_counter + 1;\n end if;\n \n if data_counter = data_length then\n state := S_PROCESS_DATA;\n ready := '0';\n end if;\n \n when others =>\n state := S_START;\n \n end case;\n elsif ready = '0' then\n \n case state is \n \n when S_PROCESS_DATA =>\n -- Do the stuff\n \n case data_id is\n \n when to_unsigned(0, 8) =>\n -- Invalid\n ready := '1';\n state := S_START;\n \n when to_unsigned(1, 8) =>\n if data_length = to_unsigned(2, 8) then\n tx_filter_int <= memory(0)(3 downto 0);\n port_sw_int <= memory(0)(5 downto 4);\n \n rx_sw_int <= memory(1)(5 downto 0);\n rx_sw_mux_ctrl_int <= memory(1)(6);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(2, 8) =>\n if data_length = to_unsigned(1, 8) then\n amp_pwdn_int <= memory(0)(0);\n mixer_enable_int <= memory(0)(1);\n led_int <= memory(0)(2);\n adc_oe_int <= memory(0)(3);\n adc_shdn_int <= memory(0)(4);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(3, 8) =>\n if data_length = to_unsigned(4, 8) then\n lo_spi_data <= memory(0)&memory(1)&memory(2)&memory(3);\n lo_spi_write <= '1';\n else\n ready := '1';\n state := S_START;\n end if;\n if lo_spi_ack = '1' then\n ready := '1';\n state := S_START;\n end if;\n \n when to_unsigned(4, 8) =>\n if data_length = to_unsigned(4, 8) then\n source_spi_data <= memory(0)&memory(1)&memory(2)&memory(3);\n source_spi_write <= '1';\n else\n ready := '1';\n state := S_START;\n end if;\n if source_spi_ack = '1' then\n ready := '1';\n state := S_START;\n end if;\n \n when to_unsigned(5, 8) =>\n if data_length = to_unsigned(4, 8) then\n rx_sample_time_int <= memory(0)&memory(1)&memory(2)&memory(3);\n rx_sample_time_valid_int <= '1';\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(6, 8) =>\n if data_length = to_unsigned(1, 8) then\n atten_spi_data <= memory(0);\n atten_spi_write <= '1';\n else\n ready := '1';\n state := S_START;\n end if;\n if att_spi_ack = '1' then\n ready := '1';\n state := S_START;\n end if;\n \n when to_unsigned(7, 8) =>\n if data_length = to_unsigned(1, 8) then\n lo_ce_int <= memory(0)(0);\n source_ce_int <= memory(0)(1);\n source_rf_enable_int <= memory(0)(2);\n lo_rf_enable_int <= memory(0)(3);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(8, 8) =>\n if data_length = to_unsigned(1, 8) then\n tx_mux_ctrl_int <= memory(0)(1 downto 0);\n sample_mux_ctrl_int <= memory(0)(3 downto 2);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(9, 8) =>\n if data_length = to_unsigned(1, 8) then\n dither_rst_int <= memory(0)(0);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(10, 8) =>\n if writing = '0' then\n new_write <= '1';\n write_word <= memory(0);\n end if;\n ready := '1';\n state := S_START;\n \n when to_unsigned(11, 8) =>\n iq_tag_out_int <= memory(0);\n iq_tag_valid <= '1';\n ready := '1';\n state := S_START;\n \n when others =>\n ready := '1';\n state := S_START;\n \n end case;\n \n when others =>\n -- Shouldn't be here\n state := S_START;\n ready := '1';\n \n end case;\n\n end if;\n\nend if;\nend process;\n\ntx_filter <= tx_filter_int;\nport_sw <= port_sw_int;\nrx_sw <= rx_sw_int;\namp_pwdn <= amp_pwdn_int;\nmixer_enable <= mixer_enable_int;\nled <= led_int;\nadc_oe <= adc_oe_int;\nadc_shdn <= adc_shdn_int;\nsource_rf_enable <= source_rf_enable_int;\nlo_rf_enable <= lo_rf_enable_int;\nlo_ce <= lo_ce_int;\nsource_ce <= source_ce_int;\nrx_sample_time <= rx_sample_time_int;\nrx_sample_time_valid <= rx_sample_time_valid_int;\ntx_mux_ctrl <= tx_mux_ctrl_int;\ndither_rst <= dither_rst_int;\nsample_mux_ctrl <= sample_mux_ctrl_int;\nrx_sw_mux_ctrl <= rx_sw_mux_ctrl_int;\niq_tag_out <= iq_tag_out_int;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/iq_packer.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 19:46:05\n-- Design Name: \n-- Module Name: iq_packer - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity iq_packer is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n start : in STD_LOGIC;\n done : out STD_LOGIC;\n i_acc : in STD_LOGIC_VECTOR (IQ_ACC_WIDTH-1 downto 0);\n q_acc : in STD_LOGIC_VECTOR (IQ_ACC_WIDTH-1 downto 0);\n cycles : in STD_LOGIC_VECTOR (IQ_ACC_WIDTH-1 downto 0);\n data_out : out STD_LOGIC_VECTOR (7 downto 0);\n data_valid : out STD_LOGIC;\n data_ack : in STD_LOGIC;\n rx_sw : in rx_sw_type;\n iq_tag_in : in STD_LOGIC_VECTOR(7 downto 0);\n iq_tag_valid : in STD_LOGIC;\n last_byte : out STD_LOGIC);\nend iq_packer;\n\narchitecture Behavioral of iq_packer is\n\n-- Start, Length, id = 3\n-- I, Q, cycles 7 bytes = 21\n-- RX_SW, tag 2\n\nconstant packet_size : integer := 3+3*IQ_BYTES+2;\ntype memory_type is array (0 to packet_size-1) of std_logic_vector(7 downto 0);\nsignal packet_memory : memory_type := (0 => COMM_START, 1 => std_logic_vector(to_unsigned(packet_size-1, 8)), 2 => \"00000001\", others => (others => '0'));\nsignal queue_full : std_logic := '0';\nsignal start_delay : std_logic := '0';\n\nsignal iq_tag : std_logic_vector(7 downto 0) := (others => '0');\n\nbegin\n\nqueue_fill_process : process(clk, start, i_acc, q_acc, cycles, queue_full, start_delay)\nvariable rx_sw_delay : rx_sw_type;\nvariable rx_sw_write : std_logic_vector(2 downto 0);\nvariable sent : unsigned(7 downto 0) := to_unsigned(0, 8);\nbegin\nif rising_edge(clk) then\n\n last_byte <= '0';\n if iq_tag_valid = '1' then\n packet_memory(3+3*IQ_BYTES+1) <= iq_tag_in;\n end if;\n \n data_out <= packet_memory(to_integer(sent));\n data_valid <= '0';\n \n start_delay <= start;\n -- Don't write new values if still sending the old ones\n if start = '1' and queue_full = '0' then\n for i in 0 to IQ_BYTES-1 loop\n packet_memory(3+i) <= i_acc(8*(i+1)-1 downto 8*i);\n packet_memory(3+IQ_BYTES+i) <= q_acc(8*(i+1)-1 downto 8*i);\n packet_memory(3+2*IQ_BYTES+i) <= cycles(8*(i+1)-1 downto 8*i);\n end loop;\n case rx_sw_delay is\n when SW_RX1 =>\n rx_sw_write := \"001\";\n when SW_A =>\n rx_sw_write := \"010\";\n when SW_RX2 =>\n rx_sw_write := \"011\";\n when SW_B =>\n rx_sw_write := \"100\";\n when others =>\n rx_sw_write := (others => '0');\n end case;\n packet_memory(3+3*IQ_BYTES) <= \"00000\"&rx_sw_write;\n end if;\n rx_sw_delay := rx_sw;\n \n if start_delay = '1' or queue_full = '1' then\n queue_full <= '1';\n data_valid <= '1';\n \n if sent = to_unsigned(packet_size-1, 8) then\n last_byte <= '1';\n end if;\n if sent = to_unsigned(packet_size-1, 8) and data_ack = '1' then\n queue_full <= '0';\n sent := to_unsigned(0, 8);\n elsif data_ack = '1' then\n sent := sent + 1;\n end if;\n end if;\n \nend if;\nend process;\n\ndone <= not queue_full;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/lfsr.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 11.02.2017 15:57:28\n-- Design Name: \n-- Module Name: lfsr - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity lfsr is\n generic ( SEED : STD_LOGIC_VECTOR(30 downto 0):= (others => '0');\n OUT_WIDTH : integer := 11);\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n q : out STD_LOGIC_VECTOR (OUT_WIDTH-1 downto 0));\nend lfsr;\n\narchitecture Behavioral of lfsr is\n\nsignal rand : std_logic_vector(30 downto 0) := SEED;\nsignal feedback : std_logic;\n\nbegin\n\nfeedback <= not((rand(0) xor rand(3)));\n\nprocess(clk,rst)\nbegin\nif rst = '1' then\n rand <= SEED;\nelsif rising_edge(clk) then\n rand <= feedback&rand(30 downto 1);\nend if;\nend process;\n\nq <= rand(OUT_WIDTH-1 downto 0);\n\nend Behavioral;" }, { "path": "fpga/vna/vna.srcs/sources_1/new/lo.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 12:23:09\n-- Design Name: \n-- Module Name: lo - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity lo is\n Generic (\n BIT_WIDTH : integer := 14;\n TABLE_SIZE : integer := 5;\n TABLE_WIDTH : integer := 3;\n COS : boolean := false\n );\n Port ( rst : in std_logic;\n clk : in STD_LOGIC;\n lo_out : out STD_LOGIC_VECTOR (BIT_WIDTH-1 downto 0));\nend lo;\n\narchitecture Behavioral of lo is\n\ntype table_type is array (0 to TABLE_SIZE) of std_logic_vector(BIT_WIDTH-1 downto 0);\n\nsignal table : table_type := (\n0 => std_logic_vector(to_signed(0, BIT_WIDTH)),\n1 => std_logic_vector(to_signed(2531, BIT_WIDTH)),\n2 => std_logic_vector(to_signed(4814, BIT_WIDTH)),\n3 => std_logic_vector(to_signed(6626, BIT_WIDTH)),\n4 => std_logic_vector(to_signed(7790, BIT_WIDTH)),\n5 => std_logic_vector(to_signed(8191, BIT_WIDTH)),\nothers => (others => '0')\n);\n\nfunction init_i(cos : in boolean) return unsigned is\nbegin\n if cos then\n return to_unsigned(TABLE_SIZE, TABLE_WIDTH);\n end if;\n return to_unsigned(0, TABLE_WIDTH);\nend function;\n\nfunction init_dir(cos : in boolean) return std_logic is\nbegin\n if cos then\n return '1';\n end if;\n return '0';\nend function;\n\nsignal index : unsigned(TABLE_WIDTH-1 downto 0) := init_i(COS);\nsignal sign: std_logic := '0';\n\nbegin\n\nprocess(clk, rst)\n\n\nvariable direction : std_logic := init_dir(COS);\nbegin\n\nif rst = '1' then\n if COS then\n index <= to_unsigned(TABLE_SIZE, TABLE_WIDTH);\n sign <= '0';\n direction := '1';\n else\n index <= to_unsigned(0, TABLE_WIDTH);\n sign <= '0';\n direction := '0';\n end if;\nelsif rising_edge(clk) then\n if index = TABLE_SIZE then\n direction := '1';\n end if;\n if index = 0 then\n direction := '0';\n sign <= not sign;\n end if;\n\n if direction = '0' then\n index <= index+1;\n else\n index <= index-1;\n end if;\nend if;\n\nend process;\n\nlo_out <= table(to_integer(index)) when sign = '0' else std_logic_vector(-signed(table(to_integer(index))));\n \nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/mixer.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 10:07:32\n-- Design Name: \n-- Module Name: mixer - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity mixer is\n Generic (\n RF_WIDTH : integer := 14;\n LO_WIDTH : integer := 16;\n IF_WIDTH : integer := 16\n );\n Port ( clk : in std_logic;\n rf : in STD_LOGIC_VECTOR (RF_WIDTH-1 downto 0);\n lo : in STD_LOGIC_VECTOR (LO_WIDTH-1 downto 0);\n if_out : out STD_LOGIC_VECTOR (IF_WIDTH-1 downto 0));\nend mixer;\n\narchitecture Behavioral of mixer is\n\nconstant level : integer := 2;\n\ntype pipeline_type is array (level-1 downto 0) of std_logic_vector(RF_WIDTH+LO_WIDTH-1 downto 0);\nsignal pipe : pipeline_type := (others => (others => '0'));\n\nsignal a : std_logic_vector(RF_WIDTH-1 downto 0) := (others => '0');\nsignal b : std_logic_vector(LO_WIDTH-1 downto 0) := (others => '0');\nsignal non_rounded, rounded : std_logic_vector(IF_WIDTH-1 downto 0) := (others => '0');\n\nbegin\n\nprocess(clk, rf, lo)\nvariable m : std_logic_vector(RF_WIDTH+LO_WIDTH-1 downto 0);\nbegin\n if rising_edge(clk) then\n a <= rf;\n b <= lo;\n m := std_logic_vector(signed(a)*signed(b));\n pipe(0) <= m;\n for i in 1 to level-1 loop\n pipe(i) <= pipe(i-1);\n end loop;\n end if;\nend process;\n\nround_towards_zero : process(clk, pipe)\nvariable pipe_if : std_logic_vector(IF_WIDTH-1 downto 0);\nbegin\n if rising_edge(clk) then\n pipe_if := pipe(level-1)(RF_WIDTH+LO_WIDTH-1 downto RF_WIDTH+LO_WIDTH-IF_WIDTH);\n non_rounded <= pipe_if;\n rounded <= std_logic_vector(signed(pipe_if) + 1);\n end if;\nend process;\n\nif_out <= rounded when non_rounded(IF_WIDTH-1) = '1' else non_rounded;\n \nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/pwr_sync_gen.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 10.01.2017 21:00:45\n-- Design Name: \n-- Module Name: pwr_sync_gen - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity pwr_sync_gen is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n sync1 : out STD_LOGIC);\nend pwr_sync_gen;\n\narchitecture Behavioral of pwr_sync_gen is\n\nbegin\n\npwr_sync_process : process(clk)\nvariable count : unsigned(7 downto 0) := to_unsigned(0, 8);\nbegin\n\nend process;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/receiver.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 20:03:05\n-- Design Name: \n-- Module Name: receiver - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity receiver is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n adc : in STD_LOGIC_VECTOR (13 downto 0);\n i_acc : out STD_LOGIC_VECTOR(IQ_ACC_WIDTH-1 downto 0);\n q_acc : out STD_LOGIC_VECTOR(IQ_ACC_WIDTH-1 downto 0);\n cycles : out STD_LOGIC_VECTOR(IQ_ACC_WIDTH-1 downto 0);\n start : in STD_LOGIC;\n if_output : out STD_LOGIC_VECTOR(IF_WIDTH-1 downto 0);\n receiver_hold : in STD_LOGIC);\nend receiver;\n\narchitecture Behavioral of receiver is\n\nsignal acc_rst : std_logic;\nsignal if_i, if_q : std_logic_vector(IF_WIDTH-1 downto 0);\n\nsignal acc_control_rst : std_logic;\n\nbegin\n\ndownconverter_0 : entity work.downconvert\n Port map( clk => clk,\n rst => rst,\n adc => adc,\n if_i_out => if_i,\n if_q_out => if_q);\n\naccumulator_i : entity work.accumulator\n Generic map (\n IN_WIDTH => IF_WIDTH,\n OUT_WIDTH => IQ_ACC_WIDTH\n )\n Port map ( clk => clk,\n rst => acc_rst,\n valid => '1',\n data => if_i,\n average => i_acc\n );\n \naccumulator_q : entity work.accumulator\n Generic map (\n IN_WIDTH => IF_WIDTH,\n OUT_WIDTH => IQ_ACC_WIDTH\n )\n Port map ( clk => clk,\n rst => acc_rst,\n valid => '1',\n data => if_q,\n average => q_acc\n );\n \naccumulator_cycles : entity work.accumulator\n Generic map (\n IN_WIDTH => 2,\n OUT_WIDTH => IQ_ACC_WIDTH\n )\n Port map ( clk => clk,\n rst => acc_rst,\n valid => '1',\n data => \"01\",\n average => cycles\n );\n \nacc_control : entity work.acc_control\n Port map ( clk => clk,\n rst => acc_control_rst,\n receiver_hold => receiver_hold,\n acc_reset => acc_rst\n );\n \nacc_control_rst <= start or rst;\nif_output <= if_i;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/receiver_control.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 05.12.2016 20:44:41\n-- Design Name: \n-- Module Name: receiver_control - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity receiver_control is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n start_early : out STD_LOGIC;\n start : out STD_LOGIC;\n sample_time : in STD_LOGIC_VECTOR (31 downto 0);\n sample_time_valid : in STD_LOGIC;\n receiver_hold : out STD_LOGIC;\n lo_ld : in STD_LOGIC;\n source_ld : in STD_LOGIC;\n rx_sw : out rx_sw_type;\n tx_ready : in STD_LOGIC);\nend receiver_control;\n\narchitecture Behavioral of receiver_control is\n\nsignal sample_time_int, sample_time_int_next : STD_LOGIC_VECTOR (31 downto 0) := (15 => '1', others => '0');\n\nsignal start_int : std_logic := '0';\n\nsignal rx_sw_int : rx_sw_type := SW_RX1;\n\nsignal lo_ld_sync, source_ld_sync : std_logic := '0';\n\nbegin\n\nsample_time_update : process(clk, sample_time, sample_time_valid)\nbegin\nif rising_edge(clk) then\n if sample_time_valid = '1' then\n sample_time_int_next <= sample_time;\n end if;\nend if;\nend process;\n\nstart_generator : process(clk, rst, sample_time_int, rx_sw_int, lo_ld_sync, source_ld_sync, tx_ready)\nvariable counter : unsigned(31 downto 0) := to_unsigned(0, 32);\nvariable locked_cycles : unsigned(15 downto 0) := to_unsigned(0, 16);\nbegin\nif rst = '1' then\n counter := to_unsigned(0, 32);\nelsif rising_edge(clk) then\n start_int <= '0';\n receiver_hold <= '1';\n \n if lo_ld_sync = '0' or source_ld_sync = '0' then\n -- No lock: reset receiver\n locked_cycles := to_unsigned(0, 16);\n counter := to_unsigned(0, 32);\n end if;\n \n if locked_cycles = LOCK_CYCLES then\n receiver_hold <= '0';\n if std_logic_vector(counter) >= sample_time_int and tx_ready = '1' then\n start_int <= '1';\n counter := to_unsigned(0, 32);\n sample_time_int <= sample_time_int_next;\n \n \n -- Next receiver channel\n case rx_sw_int is\n when SW_RX1 =>\n rx_sw_int <= SW_A;\n when SW_A =>\n rx_sw_int <= SW_RX2;\n when SW_RX2 =>\n rx_sw_int <= SW_B;\n when SW_B =>\n rx_sw_int <= SW_RX1;\n when others =>\n rx_sw_int <= SW_RX1;\n end case;\n \n else\n counter := counter + 1;\n end if;\n else\n locked_cycles := locked_cycles + to_unsigned(1, 16);\n end if;\n \nend if;\nend process;\n\nlate_start : process(clk, start_int)\nbegin\nif rising_edge(clk) then\n start <= start_int;\nend if;\nend process;\n\nsync_process : process(clk, lo_ld, source_ld)\nvariable lo_sync2, source_sync2 : std_logic := '0';\nbegin\n\nif rising_edge(clk) then\n lo_ld_sync <= lo_sync2;\n source_ld_sync <= source_sync2;\n lo_sync2 := lo_ld;\n source_sync2 := source_ld;\nend if;\nend process;\n\nstart_early <= start_int;\nrx_sw <= rx_sw_int;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/rx_sw_mux.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 16.02.2017 19:01:41\n-- Design Name: \n-- Module Name: rx_sw_mux - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity rx_sw_mux is\n Port ( rx_sw_receiver : in rx_sw_type;\n rx_sw_io : in STD_LOGIC_VECTOR(5 downto 0);\n rx_sw : out STD_LOGIC_VECTOR(5 downto 0);\n ctrl : in STD_LOGIC);\nend rx_sw_mux;\n\narchitecture Behavioral of rx_sw_mux is\n\nsignal rx_sw_receiver_vector : std_logic_vector(5 downto 0);\nbegin\n\nrx_sw_receiver_vector <= \"100010\" when rx_sw_receiver = SW_RX1 else\n \"100001\" when rx_sw_receiver = SW_A else\n \"011000\" when rx_sw_receiver = SW_B else\n \"010100\" when rx_sw_receiver = SW_RX2 else\n \"000000\";\n\nrx_sw <= rx_sw_io when ctrl = '1' else rx_sw_receiver_vector;\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/rx_switch.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 18:43:45\n-- Design Name: \n-- Module Name: rx_switch - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity rx_switch is\n-- Port ( );\nend rx_switch;\n\n----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 27.11.2016 15:33:21\n-- Design Name: \n-- Module Name: port_switch - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity rx_switch is\n Port ( rx_port : in rx_port_type;\n term : in STD_LOGIC;\n swa_ctrl : out STD_LOGIC_VECTOR (1 downto 0);\n swb_ctrl : out STD_LOGIC_VECTOR (1 downto 0);\n swc_ctrl : out STD_LOGIC_VECTOR (1 downto 0));\nend rx_switch;\n\narchitecture Behavioral of rx_switch is\n\nbegin\n\nprocess(rx_port, term)\nbegin\n\nif term = '1' then\n swa_ctrl <= \"00\";\n swb_ctrl <= \"00\";\n swc_ctrl <= \"00\";\nelse\n if rx_port = P_A then\n swa_ctrl <= \"10\";\n swb_ctrl <= \"10\";\n swc_ctrl <= \"01\";\n else\n swa_ctrl <= \"01\";\n swb_ctrl <= \"01\";\n swc_ctrl <= \"10\";\n end if;\nend if;\n\nend process;\n\nend Behavioral;" }, { "path": "fpga/vna/vna.srcs/sources_1/new/source_agc.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 06.12.2016 18:29:18\n-- Design Name: \n-- Module Name: source_agc - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\nuse work.vna_pkg.all;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity source_agc is\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n locked : in STD_LOGIC;\n target : in STD_LOGIC_VECTOR (15 downto 0);\n xadc_vp : in STD_LOGIC;\n xadc_vn : in STD_LOGIC;\n adc_result : out STD_LOGIC_VECTOR (15 downto 0);\n att_data : out STD_LOGIC_VECTOR(9 downto 0);\n att_write : out STD_LOGIC;\n set_target : in STD_LOGIC);\nend source_agc;\n\narchitecture Behavioral of source_agc is\n\nCOMPONENT xadc_wiz_0\n PORT (\n di_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);\n daddr_in : IN STD_LOGIC_VECTOR(6 DOWNTO 0);\n den_in : IN STD_LOGIC;\n dwe_in : IN STD_LOGIC;\n drdy_out : OUT STD_LOGIC;\n do_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);\n dclk_in : IN STD_LOGIC;\n reset_in : IN STD_LOGIC;\n vp_in : IN STD_LOGIC;\n vn_in : IN STD_LOGIC;\n user_temp_alarm_out : OUT STD_LOGIC;\n vccint_alarm_out : OUT STD_LOGIC;\n vccaux_alarm_out : OUT STD_LOGIC;\n ot_out : OUT STD_LOGIC;\n channel_out : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);\n eoc_out : OUT STD_LOGIC;\n alarm_out : OUT STD_LOGIC;\n eos_out : OUT STD_LOGIC;\n busy_out : OUT STD_LOGIC\n );\nEND COMPONENT;\n\nsignal di_in, do_out : std_logic_vector(15 downto 0);\nsignal daddr_in : std_logic_vector(6 downto 0);\nsignal den_in, dwe_in : std_logic := '0';\nsignal drdy_out : std_logic;\nsignal user_temp_alarm_out, vccint_alarm_out, vccaux_alarm_out, ot_out : std_logic;\nsignal channel_out : std_logic_vector(4 downto 0);\nsignal eoc_out, alarm_out, eos_out, busy_out : std_logic;\n\n\nsignal target_int : std_logic_vector(15 downto 0) := std_logic_vector(to_unsigned(AGC_TARGET, 16));\n\nbegin\n\nxadc : xadc_wiz_0\n PORT MAP (\n di_in => di_in,\n daddr_in => daddr_in,\n den_in => den_in,\n dwe_in => dwe_in,\n drdy_out => drdy_out,\n do_out => do_out,\n dclk_in => clk,\n reset_in => rst,\n vp_in => xadc_vp,\n vn_in => xadc_vn,\n user_temp_alarm_out => user_temp_alarm_out,\n vccint_alarm_out => vccint_alarm_out,\n vccaux_alarm_out => vccaux_alarm_out,\n ot_out => ot_out,\n channel_out => channel_out,\n eoc_out => eoc_out,\n alarm_out => alarm_out,\n eos_out => eos_out,\n busy_out => busy_out\n );\n \nprocess(clk, rst, target, set_target)\nbegin\nif rst = '1' then\n target_int <= std_logic_vector(to_unsigned(AGC_TARGET, 16));\nelsif rising_edge(clk) then\n if set_target = '1' then\n target_int <= target;\n end if;\nend if;\nend process;\n\nprocess(clk, rst)\nbegin\nif rst = '1' then\n --\nelsif rising_edge(clk) then\n -- TODO: Intelligent calculation\n if drdy_out = '1' then\n \n end if;\nend if;\nend process;\n\nadc_result <= do_out;\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/spi_write.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 01.12.2016 18:06:25\n-- Design Name: \n-- Module Name: spi_write - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\nuse IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity spi_write is\n Generic (SPI_CLK_DIVIDER : integer := 1;\n DATA_LENGTH : integer := 8);\n Port ( clk : in STD_LOGIC;\n rst : in STD_LOGIC;\n spi_clk : out STD_LOGIC;\n spi_data : out STD_LOGIC;\n spi_cs : out STD_LOGIC;\n data_in : in STD_LOGIC_VECTOR (DATA_LENGTH-1 downto 0);\n data_in_valid : in STD_LOGIC;\n data_in_ack : out STD_LOGIC);\nend spi_write;\n\narchitecture Behavioral of spi_write is\n\nconstant SPI_CLOCK : unsigned(7 downto 0) := to_unsigned(SPI_CLK_DIVIDER, 8);\nsignal spi_clk_int : std_logic := '0';\n\nbegin\n\nwrite_process : process(clk, rst, data_in, data_in_valid)\nvariable bit_counter : unsigned(7 downto 0) := to_unsigned(DATA_LENGTH-1, 8);\nvariable clk_counter : unsigned(7 downto 0) := to_unsigned(0, 8);\nvariable done : std_logic := '0';\ntype spi_state is (S_START, S_CS, S_WRITE);\nvariable state : spi_state := S_START;\nvariable data_in_valid_prev : std_logic := '0';\nbegin\n\nif rst = '1' then\n bit_counter := to_unsigned(DATA_LENGTH-1, 8);\n spi_cs <= '1';\n spi_clk_int <= '0';\n data_in_ack <= '0';\n spi_data <= '0';\n done := '0';\n state := S_START;\n data_in_valid_prev := '0';\nelsif rising_edge(clk) then\n data_in_ack <= '0';\n done := '0';\n \n case state is\n \n when S_START =>\n bit_counter := to_unsigned(DATA_LENGTH-1, 8);\n if data_in_valid = '1' then\n spi_cs <= '0';\n state := S_CS;\n spi_data <= data_in(to_integer(unsigned(bit_counter)));\n end if;\n \n when S_WRITE =>\n if data_in_valid = '1' then\n spi_cs <= '0';\n spi_data <= data_in(to_integer(unsigned(bit_counter)));\n if clk_counter = to_unsigned(SPI_CLK_DIVIDER, 8) then\n if spi_clk_int = '0' then\n if bit_counter = to_unsigned(0, 8) then\n data_in_ack <= '1';\n spi_cs <= '1';\n done := '1';\n state := S_START;\n else\n bit_counter := bit_counter - 1;\n end if;\n end if;\n if done = '0' then\n spi_clk_int <= not spi_clk_int;\n end if;\n else\n clk_counter := clk_counter + 1;\n end if;\n else\n spi_cs <= '1';\n bit_counter := to_unsigned(DATA_LENGTH-1, 8);\n end if;\n \n when S_CS =>\n -- Hold CS for one clock\n spi_cs <= '0';\n spi_data <= data_in(to_integer(unsigned(bit_counter)));\n state := S_WRITE;\n \n when others =>\n state := S_START;\n \n end case;\nend if;\n\nend process;\n\nspi_clk <= spi_clk_int;\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/tx_mux.vhd", "content": "----------------------------------------------------------------------------------\n-- Company: \n-- Engineer: \n-- \n-- Create Date: 12.02.2017 21:13:49\n-- Design Name: \n-- Module Name: tx_mux - Behavioral\n-- Project Name: \n-- Target Devices: \n-- Tool Versions: \n-- Description: \n-- \n-- Dependencies: \n-- \n-- Revision:\n-- Revision 0.01 - File Created\n-- Additional Comments:\n-- \n----------------------------------------------------------------------------------\n\n\nlibrary IEEE;\nuse IEEE.STD_LOGIC_1164.ALL;\n\n-- Uncomment the following library declaration if using\n-- arithmetic functions with Signed or Unsigned values\n--use IEEE.NUMERIC_STD.ALL;\n\n-- Uncomment the following library declaration if instantiating\n-- any Xilinx leaf cells in this code.\n--library UNISIM;\n--use UNISIM.VComponents.all;\n\nentity tx_mux is\n Port ( mux : in STD_LOGIC_VECTOR(1 downto 0);\n data_out : out STD_LOGIC_VECTOR (7 downto 0);\n data_valid : out STD_LOGIC;\n data_ack : in STD_LOGIC;\n samples_data :in STD_LOGIC_VECTOR (7 downto 0);\n samples_data_valid : in STD_LOGIC;\n samples_data_ack : out STD_LOGIC;\n iq_data :in STD_LOGIC_VECTOR (7 downto 0);\n iq_data_valid : in STD_LOGIC;\n iq_data_ack : out STD_LOGIC;\n io_data : in STD_LOGIC_VECTOR(7 downto 0);\n io_data_valid : in STD_LOGIC;\n io_data_ack : out STD_LOGIC;\n last_byte_iq : in STD_LOGIC;\n last_byte : out STD_LOGIC);\nend tx_mux;\n\narchitecture Behavioral of tx_mux is\n\nbegin\n\ndata_out <= iq_data when mux = \"00\" else \n samples_data when mux = \"01\" else\n io_data;\n \ndata_valid <= iq_data_valid when mux = \"00\" else\n samples_data_valid when mux = \"01\" else\n io_data_valid;\n \nlast_byte <= last_byte_iq when mux = \"00\" else '0';\n \niq_data_ack <= data_ack when mux = \"00\" else '0';\nsamples_data_ack <= data_ack when mux = \"01\" else '0';\nio_data_ack <= data_ack when mux = \"10\" else '0';\n\nend Behavioral;\n" }, { "path": "fpga/vna/vna.srcs/sources_1/new/vna_pkg.vhd", "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\npackage vna_pkg is \n\ntype rx_sw_type is (SW_NONE, SW_RX1, SW_A, SW_RX2, SW_B);\n\nsubtype byte is std_logic_vector(7 downto 0);\n\nconstant ADC_WIDTH : natural := 14;\nconstant IF_WIDTH : natural := 24;\nconstant LO_WIDTH : integer := 14;\nconstant IQ_ACC_WIDTH : natural := 56;\nconstant CIC_OUT_WIDTH : natural := 32;\n\nconstant IQ_BYTES : natural := IQ_ACC_WIDTH/8;\n\nconstant COMM_START : std_logic_vector(7 downto 0) := \"10101010\";\n\n-- Number of clock cycles to skip after reset\n-- Determined by the switch settling time\nconstant SKIP_SAMPLES : integer := 30;\n\nconstant AGC_TARGET : integer := 200;\n\nconstant LOCK_CYCLES : integer := 12000;\n\nend vna_pkg;\n\npackage body vna_pkg is\nend vna_pkg;\n" }, { "path": "fpga/vna/vna.xpr", "content": "\n\n\n\n\n\n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n\n" }, { "path": "hw/adc.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 15 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL LTC224X U34\nU 1 1 583E2588\nP 4550 4150\nAR Path=\"/583E2588\" Ref=\"U34\" Part=\"1\" \nAR Path=\"/5837E082/583E250D/583E2588\" Ref=\"U34\" Part=\"1\" \nF 0 \"U34\" H 4550 4150 60 0000 C CNN\nF 1 \"LTC2247\" H 5000 5150 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm\" H 3700 4400 60 0001 C CNN\nF 3 \"\" H 3700 4400 60 0001 C CNN\n\t1 4550 4150\n\t1 0 0 -1 \n$EndComp\nText HLabel 2800 3450 0 60 Input ~ 0\nADC+\nText HLabel 2800 3550 0 60 Input ~ 0\nADC-\n$Comp\nL C C223\nU 1 1 583E3A81\nP 4950 2250\nF 0 \"C223\" H 4975 2350 50 0000 L CNN\nF 1 \"100n\" H 4975 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4988 2100 30 0001 C CNN\nF 3 \"\" H 4950 2250 60 0000 C CNN\n\t1 4950 2250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C222\nU 1 1 583E443A\nP 4400 1800\nF 0 \"C222\" H 4425 1900 50 0000 L CNN\nF 1 \"1u\" H 4425 1700 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 4438 1650 30 0001 C CNN\nF 3 \"\" H 4400 1800 60 0000 C CNN\n\t1 4400 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C224\nU 1 1 583E447A\nP 5250 2250\nF 0 \"C224\" H 5275 2350 50 0000 L CNN\nF 1 \"100n\" H 5275 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5288 2100 30 0001 C CNN\nF 3 \"\" H 5250 2250 60 0000 C CNN\n\t1 5250 2250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0319\nU 1 1 583E44F5\nP 4400 2000\nF 0 \"#PWR0319\" H 4400 1750 50 0001 C CNN\nF 1 \"GND\" H 4400 1850 50 0000 C CNN\nF 2 \"\" H 4400 2000 60 0000 C CNN\nF 3 \"\" H 4400 2000 60 0000 C CNN\n\t1 4400 2000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0320\nU 1 1 583E4562\nP 4950 2450\nF 0 \"#PWR0320\" H 4950 2200 50 0001 C CNN\nF 1 \"GND\" H 4950 2300 50 0000 C CNN\nF 2 \"\" H 4950 2450 60 0000 C CNN\nF 3 \"\" H 4950 2450 60 0000 C CNN\n\t1 4950 2450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0321\nU 1 1 583E4583\nP 5250 2450\nF 0 \"#PWR0321\" H 5250 2200 50 0001 C CNN\nF 1 \"GND\" H 5250 2300 50 0000 C CNN\nF 2 \"\" H 5250 2450 60 0000 C CNN\nF 3 \"\" H 5250 2450 60 0000 C CNN\n\t1 5250 2450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0322\nU 1 1 583E6070\nP 4400 5400\nF 0 \"#PWR0322\" H 4400 5150 50 0001 C CNN\nF 1 \"GND\" H 4400 5250 50 0000 C CNN\nF 2 \"\" H 4400 5400 60 0000 C CNN\nF 3 \"\" H 4400 5400 60 0000 C CNN\n\t1 4400 5400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C221\nU 1 1 583E64BB\nP 3300 3900\nF 0 \"C221\" H 3325 4000 50 0000 L CNN\nF 1 \"100n\" H 3325 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3338 3750 30 0001 C CNN\nF 3 \"\" H 3300 3900 60 0000 C CNN\n\t1 3300 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C220\nU 1 1 583E6598\nP 3050 3900\nF 0 \"C220\" H 3075 4000 50 0000 L CNN\nF 1 \"2.2u\" H 3075 3800 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 3088 3750 30 0001 C CNN\nF 3 \"\" H 3050 3900 60 0000 C CNN\n\t1 3050 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C217\nU 1 1 583E665A\nP 2650 3750\nF 0 \"C217\" H 2675 3850 50 0000 L CNN\nF 1 \"1u\" H 2675 3650 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 2688 3600 30 0001 C CNN\nF 3 \"\" H 2650 3750 60 0000 C CNN\n\t1 2650 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C218\nU 1 1 583E669C\nP 2650 4050\nF 0 \"C218\" H 2675 4150 50 0000 L CNN\nF 1 \"1u\" H 2675 3950 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 2688 3900 30 0001 C CNN\nF 3 \"\" H 2650 4050 60 0000 C CNN\n\t1 2650 4050\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0323\nU 1 1 583E67B6\nP 2450 3750\nF 0 \"#PWR0323\" H 2450 3500 50 0001 C CNN\nF 1 \"GND\" H 2450 3600 50 0000 C CNN\nF 2 \"\" H 2450 3750 60 0000 C CNN\nF 3 \"\" H 2450 3750 60 0000 C CNN\n\t1 2450 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0324\nU 1 1 583E6810\nP 2450 4050\nF 0 \"#PWR0324\" H 2450 3800 50 0001 C CNN\nF 1 \"GND\" H 2450 3900 50 0000 C CNN\nF 2 \"\" H 2450 4050 60 0000 C CNN\nF 3 \"\" H 2450 4050 60 0000 C CNN\n\t1 2450 4050\n\t0 1 1 0 \n$EndComp\nText HLabel 5600 3350 2 60 Output ~ 0\nD0\nText HLabel 5600 3450 2 60 Output ~ 0\nD1\nText HLabel 5600 3550 2 60 Output ~ 0\nD2\nText HLabel 5600 3650 2 60 Output ~ 0\nD3\nText HLabel 5600 3750 2 60 Output ~ 0\nD4\nText HLabel 5600 3850 2 60 Output ~ 0\nD5\nText HLabel 5600 3950 2 60 Output ~ 0\nD6\nText HLabel 5600 4050 2 60 Output ~ 0\nD7\nText HLabel 5600 4150 2 60 Output ~ 0\nD8\nText HLabel 5600 4250 2 60 Output ~ 0\nD9\nText HLabel 5600 4350 2 60 Output ~ 0\nD10\nText HLabel 5600 4450 2 60 Output ~ 0\nD11\nText HLabel 5600 4550 2 60 Output ~ 0\nD12\nText HLabel 5600 4650 2 60 Output ~ 0\nD13\n$Comp\nL C C225\nU 1 1 583E87F7\nP 5500 5100\nF 0 \"C225\" H 5525 5200 50 0000 L CNN\nF 1 \"100n\" H 5525 5000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5538 4950 30 0001 C CNN\nF 3 \"\" H 5500 5100 60 0000 C CNN\n\t1 5500 5100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0325\nU 1 1 583E886F\nP 5500 5300\nF 0 \"#PWR0325\" H 5500 5050 50 0001 C CNN\nF 1 \"GND\" H 5500 5150 50 0000 C CNN\nF 2 \"\" H 5500 5300 60 0000 C CNN\nF 3 \"\" H 5500 5300 60 0000 C CNN\n\t1 5500 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C219\nU 1 1 583E8CF8\nP 2650 4450\nF 0 \"C219\" H 2675 4550 50 0000 L CNN\nF 1 \"100n\" H 2675 4350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2688 4300 30 0001 C CNN\nF 3 \"\" H 2650 4450 60 0000 C CNN\n\t1 2650 4450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C216\nU 1 1 583E8D35\nP 2350 4450\nF 0 \"C216\" H 2375 4550 50 0000 L CNN\nF 1 \"2.2u\" H 2375 4350 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 2388 4300 30 0001 C CNN\nF 3 \"\" H 2350 4450 60 0000 C CNN\n\t1 2350 4450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0326\nU 1 1 583E8E6F\nP 2650 4650\nF 0 \"#PWR0326\" H 2650 4400 50 0001 C CNN\nF 1 \"GND\" H 2650 4500 50 0000 C CNN\nF 2 \"\" H 2650 4650 60 0000 C CNN\nF 3 \"\" H 2650 4650 60 0000 C CNN\n\t1 2650 4650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0327\nU 1 1 583E8EE8\nP 2350 4650\nF 0 \"#PWR0327\" H 2350 4400 50 0001 C CNN\nF 1 \"GND\" H 2350 4500 50 0000 C CNN\nF 2 \"\" H 2350 4650 60 0000 C CNN\nF 3 \"\" H 2350 4650 60 0000 C CNN\n\t1 2350 4650\n\t1 0 0 -1 \n$EndComp\nText HLabel 2150 4200 0 60 Output ~ 0\nVCM\nText HLabel 3100 3300 0 60 Input ~ 0\nCLK\nText HLabel 3400 4450 0 60 Input ~ 0\nSHDN\nText HLabel 3400 4550 0 60 Input ~ 0\nOE\n$Comp\nL R R93\nU 1 1 583EA10F\nP 3500 4850\nF 0 \"R93\" V 3580 4850 50 0000 C CNN\nF 1 \"0\" V 3500 4850 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3430 4850 30 0001 C CNN\nF 3 \"\" H 3500 4850 30 0000 C CNN\n\t1 3500 4850\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R91\nU 1 1 583EA63A\nP 2900 4600\nF 0 \"R91\" V 2980 4600 50 0000 C CNN\nF 1 \"0\" V 2900 4600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2830 4600 30 0001 C CNN\nF 3 \"\" H 2900 4600 30 0000 C CNN\n\t1 2900 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R92\nU 1 1 583EA67C\nP 2900 5000\nF 0 \"R92\" V 2980 5000 50 0000 C CNN\nF 1 \"DNP\" V 2900 5000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2830 5000 30 0001 C CNN\nF 3 \"\" H 2900 5000 30 0000 C CNN\n\t1 2900 5000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0328\nU 1 1 583EA6C8\nP 2900 5200\nF 0 \"#PWR0328\" H 2900 4950 50 0001 C CNN\nF 1 \"GND\" H 2900 5050 50 0000 C CNN\nF 2 \"\" H 2900 5200 60 0000 C CNN\nF 3 \"\" H 2900 5200 60 0000 C CNN\n\t1 2900 5200\n\t1 0 0 -1 \n$EndComp\nText Label 3250 4850 2 60 ~ 0\n3V0\nText Label 2900 4350 0 60 ~ 0\n3V0\nText Label 4950 1600 0 60 ~ 0\n3V0\nText HLabel 5600 4800 2 60 Output ~ 0\nOF\nWire Wire Line\n\t2800 3450 3700 3450\nWire Wire Line\n\t2800 3550 3700 3550\nWire Wire Line\n\t4500 3000 4500 2500\nWire Wire Line\n\t4650 2100 4650 3000\nWire Wire Line\n\t4500 2500 4650 2500\nWire Wire Line\n\t3350 1600 4950 1600\nWire Wire Line\n\t4950 1600 4950 2100\nWire Wire Line\n\t4650 2100 5250 2100\nWire Wire Line\n\t4400 1650 4400 1600\nConnection ~ 4400 1600\nWire Wire Line\n\t4400 1950 4400 2000\nConnection ~ 4650 2500\nConnection ~ 4950 2100\nWire Wire Line\n\t5250 2400 5250 2450\nWire Wire Line\n\t4950 2400 4950 2450\nWire Wire Line\n\t4400 5300 4400 5400\nWire Wire Line\n\t4400 5350 4700 5350\nWire Wire Line\n\t4550 5350 4550 5300\nConnection ~ 4400 5350\nWire Wire Line\n\t4700 5350 4700 5300\nConnection ~ 4550 5350\nWire Wire Line\n\t2800 3750 3700 3750\nWire Wire Line\n\t3700 3850 3650 3850\nWire Wire Line\n\t3650 3850 3650 3750\nConnection ~ 3650 3750\nWire Wire Line\n\t3700 3950 3600 3950\nWire Wire Line\n\t3600 3950 3600 4050\nWire Wire Line\n\t2800 4050 3700 4050\nConnection ~ 3600 4050\nConnection ~ 3300 3750\nConnection ~ 3300 4050\nConnection ~ 3050 3750\nConnection ~ 3050 4050\nWire Wire Line\n\t2450 4050 2500 4050\nWire Wire Line\n\t2500 3750 2450 3750\nWire Wire Line\n\t5400 3350 5600 3350\nWire Wire Line\n\t5400 3450 5600 3450\nWire Wire Line\n\t5600 3550 5400 3550\nWire Wire Line\n\t5400 3650 5600 3650\nWire Wire Line\n\t5600 3750 5400 3750\nWire Wire Line\n\t5400 3850 5600 3850\nWire Wire Line\n\t5600 3950 5400 3950\nWire Wire Line\n\t5400 4050 5600 4050\nWire Wire Line\n\t5600 4150 5400 4150\nWire Wire Line\n\t5400 4250 5600 4250\nWire Wire Line\n\t5600 4350 5400 4350\nWire Wire Line\n\t5400 4450 5600 4450\nWire Wire Line\n\t5400 4550 5600 4550\nWire Wire Line\n\t5600 4650 5400 4650\nWire Wire Line\n\t5400 4900 5800 4900\nWire Wire Line\n\t5500 4950 5500 4900\nConnection ~ 5500 4900\nWire Wire Line\n\t5500 5250 5500 5300\nWire Wire Line\n\t2150 4200 3700 4200\nWire Wire Line\n\t2650 4200 2650 4300\nWire Wire Line\n\t2350 4200 2350 4300\nConnection ~ 2650 4200\nWire Wire Line\n\t2650 4600 2650 4650\nWire Wire Line\n\t2350 4650 2350 4600\nConnection ~ 2350 4200\nWire Wire Line\n\t3100 3300 3700 3300\nWire Wire Line\n\t3400 4450 3700 4450\nWire Wire Line\n\t3400 4550 3700 4550\nWire Wire Line\n\t3700 4850 3650 4850\nWire Wire Line\n\t3350 4850 3250 4850\nWire Wire Line\n\t2900 5150 2900 5200\nWire Wire Line\n\t2900 4850 2900 4750\nWire Wire Line\n\t2900 4350 2900 4450\nWire Wire Line\n\t2900 4750 3700 4750\nWire Wire Line\n\t5600 4800 5400 4800\nText HLabel 5800 4900 2 60 Input ~ 0\n3V3\nText Notes 4000 2950 0 60 ~ 0\n50 mA\n$Comp\nL LP5907 U39\nU 1 1 58526584\nP 2850 1650\nF 0 \"U39\" H 3050 1450 60 0000 C CNN\nF 1 \"LP5907-3V0\" H 2950 1850 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 2850 1700 60 0001 C CNN\nF 3 \"\" H 2850 1700 60 0000 C CNN\n\t1 2850 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0329\nU 1 1 585266D4\nP 2850 2000\nF 0 \"#PWR0329\" H 2850 1750 50 0001 C CNN\nF 1 \"GND\" H 2850 1850 50 0000 C CNN\nF 2 \"\" H 2850 2000 60 0000 C CNN\nF 3 \"\" H 2850 2000 60 0000 C CNN\n\t1 2850 2000\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2350 1700 2250 1700\nWire Wire Line\n\t2250 1700 2250 1600\nWire Wire Line\n\t1800 1600 2350 1600\n$Comp\nL C C248\nU 1 1 5852675F\nP 1900 1800\nF 0 \"C248\" H 1925 1900 50 0000 L CNN\nF 1 \"10u\" H 1925 1700 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1938 1650 30 0001 C CNN\nF 3 \"\" H 1900 1800 60 0000 C CNN\n\t1 1900 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0330\nU 1 1 585267C4\nP 1900 1950\nF 0 \"#PWR0330\" H 1900 1700 50 0001 C CNN\nF 1 \"GND\" H 1900 1800 50 0000 C CNN\nF 2 \"\" H 1900 1950 60 0000 C CNN\nF 3 \"\" H 1900 1950 60 0000 C CNN\n\t1 1900 1950\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1900 1650 1900 1600\nConnection ~ 2250 1600\nConnection ~ 1900 1600\nText HLabel 1800 1600 0 60 Input ~ 0\n3V6\n$Comp\nL C C249\nU 1 1 585275B5\nP 3950 1800\nF 0 \"C249\" H 3975 1900 50 0000 L CNN\nF 1 \"1u\" H 3975 1700 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 3988 1650 30 0001 C CNN\nF 3 \"\" H 3950 1800 60 0000 C CNN\n\t1 3950 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0331\nU 1 1 58527606\nP 3950 2000\nF 0 \"#PWR0331\" H 3950 1750 50 0001 C CNN\nF 1 \"GND\" H 3950 1850 50 0000 C CNN\nF 2 \"\" H 3950 2000 60 0000 C CNN\nF 3 \"\" H 3950 2000 60 0000 C CNN\n\t1 3950 2000\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3950 2000 3950 1950\nWire Wire Line\n\t3950 1650 3950 1600\nConnection ~ 3950 1600\nText Label 2800 3750 0 60 ~ 0\nREFH\nText Label 2800 4050 0 60 ~ 0\nREFL\n$EndSCHEMATC\n" }, { "path": "hw/filter_bank.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 8 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL SKY13322-375LF U13\nU 1 1 5645E3CC\nP 2900 3250\nF 0 \"U13\" H 3100 2850 60 0000 C CNN\nF 1 \"SKY13322-375LF\" H 2900 3600 60 0000 C CNN\nF 2 \"VNA:MLPD-10\" H 2950 3600 60 0001 C CNN\nF 3 \"\" H 2950 3600 60 0000 C CNN\n\t1 2900 3250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL SKY13322-375LF U18\nU 1 1 5645E3EC\nP 8350 3250\nF 0 \"U18\" H 8550 2850 60 0000 C CNN\nF 1 \"SKY13322-375LF\" H 8350 3600 60 0000 C CNN\nF 2 \"VNA:MLPD-10\" H 8400 3600 60 0001 C CNN\nF 3 \"\" H 8400 3600 60 0000 C CNN\n\t1 8350 3250\n\t-1 0 0 -1 \n$EndComp\nText HLabel 1650 3050 0 60 Input ~ 0\nRF_IN\nText HLabel 9550 3050 2 60 Output ~ 0\nRF_OUT\nText HLabel 2350 3200 0 60 Input ~ 0\nV1\nText HLabel 2350 3300 0 60 Input ~ 0\nV2\nText HLabel 2350 3400 0 60 Input ~ 0\nV3\nText HLabel 2350 3500 0 60 Input ~ 0\nV4\nText HLabel 8900 3300 2 60 Input ~ 0\nV1\nText HLabel 8900 3200 2 60 Input ~ 0\nV2\nText HLabel 8900 3500 2 60 Input ~ 0\nV3\nText HLabel 8900 3400 2 60 Input ~ 0\nV4\n$Comp\nL GND #PWR0161\nU 1 1 5645E81B\nP 7900 3600\nF 0 \"#PWR0161\" H 7900 3350 50 0001 C CNN\nF 1 \"GND\" H 7900 3450 50 0000 C CNN\nF 2 \"\" H 7900 3600 60 0000 C CNN\nF 3 \"\" H 7900 3600 60 0000 C CNN\n\t1 7900 3600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0162\nU 1 1 5645E841\nP 3400 3600\nF 0 \"#PWR0162\" H 3400 3350 50 0001 C CNN\nF 1 \"GND\" H 3400 3450 50 0000 C CNN\nF 2 \"\" H 3400 3600 60 0000 C CNN\nF 3 \"\" H 3400 3600 60 0000 C CNN\n\t1 3400 3600\n\t1 0 0 -1 \n$EndComp\nText Notes 2300 2750 0 60 ~ 0\nInsertion loss:\\n0-4 GHz: 0.5 dB\\n4-6 GHz: 1.2 dB\\n\\nJ1, J2 0.3 dB less loss at > 5GHz\nText Notes 3800 1700 0 60 ~ 0\nInsertion loss:\\n0-4 GHz: 3 dB\\n4-6 GHz: 4 dB\n$Comp\nL LP0603 U15\nU 1 1 5645F6D8\nP 5700 6050\nF 0 \"U15\" H 5850 5850 60 0000 C CNN\nF 1 \"LP0603A0902ANTR\" H 5800 6250 60 0000 C CNN\nF 2 \"VNA:LP0603A0902\" H 5800 5800 60 0001 C CNN\nF 3 \"\" H 5800 5800 60 0000 C CNN\n\t1 5700 6050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL 3550LP14A300 U16\nU 1 1 5645FB19\nP 5750 3650\nF 0 \"U16\" H 5950 3350 60 0000 C CNN\nF 1 \"3550LP14A300\" H 5700 3800 60 0000 C CNN\nF 2 \"VNA:3550LP14A300\" H 5700 3650 60 0001 C CNN\nF 3 \"\" H 5700 3650 60 0000 C CNN\n\t1 5750 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL 5515LP15A730 U14\nU 1 1 5645FC17\nP 5750 4850\nF 0 \"U14\" H 6050 4550 60 0000 C CNN\nF 1 \"5515LP15A730\" H 5750 5050 60 0000 C CNN\nF 2 \"VNA:5515LP15A730\" H 5750 4900 60 0001 C CNN\nF 3 \"\" H 5750 4900 60 0000 C CNN\n\t1 5750 4850\n\t1 0 0 -1 \n$EndComp\nText Notes 5550 4550 0 60 ~ 0\n4.2 - 6.0\\nIL: 0.6 dB\nText Notes 5450 3400 0 60 ~ 0\n2.1 - 4.2\\nIL: 0.65 dB\nText Notes 5500 2200 0 60 ~ 0\n1.1 - 2.1\\nIL: 0.5 dB\nText Notes 5500 5750 0 60 ~ 0\n0.1 - 1.1\n$Comp\nL C C92\nU 1 1 564613A3\nP 4950 4800\nF 0 \"C92\" H 4975 4900 50 0000 L CNN\nF 1 \"10p\" H 4975 4700 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4988 4650 30 0001 C CNN\nF 3 \"\" H 4950 4800 60 0000 C CNN\n\t1 4950 4800\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C93\nU 1 1 56461484\nP 4950 3650\nF 0 \"C93\" H 4975 3750 50 0000 L CNN\nF 1 \"10p\" H 4975 3550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4988 3500 30 0001 C CNN\nF 3 \"\" H 4950 3650 60 0000 C CNN\n\t1 4950 3650\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C94\nU 1 1 564614D8\nP 5000 2450\nF 0 \"C94\" H 5025 2550 50 0000 L CNN\nF 1 \"100p\" H 5025 2350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5038 2300 30 0001 C CNN\nF 3 \"\" H 5000 2450 60 0000 C CNN\n\t1 5000 2450\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C95\nU 1 1 56461531\nP 5050 6000\nF 0 \"C95\" H 5075 6100 50 0000 L CNN\nF 1 \"1n\" H 5075 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5088 5850 30 0001 C CNN\nF 3 \"\" H 5050 6000 60 0000 C CNN\n\t1 5050 6000\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C96\nU 1 1 56461589\nP 6400 6000\nF 0 \"C96\" H 6425 6100 50 0000 L CNN\nF 1 \"1n\" H 6425 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6438 5850 30 0001 C CNN\nF 3 \"\" H 6400 6000 60 0000 C CNN\n\t1 6400 6000\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C98\nU 1 1 564615F0\nP 6450 2450\nF 0 \"C98\" H 6475 2550 50 0000 L CNN\nF 1 \"100p\" H 6475 2350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6488 2300 30 0001 C CNN\nF 3 \"\" H 6450 2450 60 0000 C CNN\n\t1 6450 2450\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C97\nU 1 1 56461644\nP 6450 3650\nF 0 \"C97\" H 6475 3750 50 0000 L CNN\nF 1 \"10p\" H 6475 3550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6488 3500 30 0001 C CNN\nF 3 \"\" H 6450 3650 60 0000 C CNN\n\t1 6450 3650\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C99\nU 1 1 564616DE\nP 6550 4800\nF 0 \"C99\" H 6575 4900 50 0000 L CNN\nF 1 \"10p\" H 6575 4700 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6588 4650 30 0001 C CNN\nF 3 \"\" H 6550 4800 60 0000 C CNN\n\t1 6550 4800\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0163\nU 1 1 564627B4\nP 5600 5300\nF 0 \"#PWR0163\" H 5600 5050 50 0001 C CNN\nF 1 \"GND\" H 5600 5150 50 0000 C CNN\nF 2 \"\" H 5600 5300 60 0000 C CNN\nF 3 \"\" H 5600 5300 60 0000 C CNN\n\t1 5600 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0164\nU 1 1 5646281A\nP 5700 5300\nF 0 \"#PWR0164\" H 5700 5050 50 0001 C CNN\nF 1 \"GND\" H 5700 5150 50 0000 C CNN\nF 2 \"\" H 5700 5300 60 0000 C CNN\nF 3 \"\" H 5700 5300 60 0000 C CNN\n\t1 5700 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0165\nU 1 1 5646284F\nP 5800 5300\nF 0 \"#PWR0165\" H 5800 5050 50 0001 C CNN\nF 1 \"GND\" H 5800 5150 50 0000 C CNN\nF 2 \"\" H 5800 5300 60 0000 C CNN\nF 3 \"\" H 5800 5300 60 0000 C CNN\n\t1 5800 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0166\nU 1 1 56462884\nP 5900 5300\nF 0 \"#PWR0166\" H 5900 5050 50 0001 C CNN\nF 1 \"GND\" H 5900 5150 50 0000 C CNN\nF 2 \"\" H 5900 5300 60 0000 C CNN\nF 3 \"\" H 5900 5300 60 0000 C CNN\n\t1 5900 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0167\nU 1 1 564628B9\nP 5550 4100\nF 0 \"#PWR0167\" H 5550 3850 50 0001 C CNN\nF 1 \"GND\" H 5550 3950 50 0000 C CNN\nF 2 \"\" H 5550 4100 60 0000 C CNN\nF 3 \"\" H 5550 4100 60 0000 C CNN\n\t1 5550 4100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0168\nU 1 1 56462934\nP 5650 4100\nF 0 \"#PWR0168\" H 5650 3850 50 0001 C CNN\nF 1 \"GND\" H 5650 3950 50 0000 C CNN\nF 2 \"\" H 5650 4100 60 0000 C CNN\nF 3 \"\" H 5650 4100 60 0000 C CNN\n\t1 5650 4100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0169\nU 1 1 56462969\nP 5750 4100\nF 0 \"#PWR0169\" H 5750 3850 50 0001 C CNN\nF 1 \"GND\" H 5750 3950 50 0000 C CNN\nF 2 \"\" H 5750 4100 60 0000 C CNN\nF 3 \"\" H 5750 4100 60 0000 C CNN\n\t1 5750 4100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0170\nU 1 1 5646299E\nP 5850 4100\nF 0 \"#PWR0170\" H 5850 3850 50 0001 C CNN\nF 1 \"GND\" H 5850 3950 50 0000 C CNN\nF 2 \"\" H 5850 4100 60 0000 C CNN\nF 3 \"\" H 5850 4100 60 0000 C CNN\n\t1 5850 4100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0171\nU 1 1 564629D3\nP 5300 2550\nF 0 \"#PWR0171\" H 5300 2300 50 0001 C CNN\nF 1 \"GND\" H 5300 2400 50 0000 C CNN\nF 2 \"\" H 5300 2550 60 0000 C CNN\nF 3 \"\" H 5300 2550 60 0000 C CNN\n\t1 5300 2550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0172\nU 1 1 56462A78\nP 6150 2550\nF 0 \"#PWR0172\" H 6150 2300 50 0001 C CNN\nF 1 \"GND\" H 6150 2400 50 0000 C CNN\nF 2 \"\" H 6150 2550 60 0000 C CNN\nF 3 \"\" H 6150 2550 60 0000 C CNN\n\t1 6150 2550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0173\nU 1 1 56462ABB\nP 6150 6100\nF 0 \"#PWR0173\" H 6150 5850 50 0001 C CNN\nF 1 \"GND\" H 6150 5950 50 0000 C CNN\nF 2 \"\" H 6150 6100 60 0000 C CNN\nF 3 \"\" H 6150 6100 60 0000 C CNN\n\t1 6150 6100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0174\nU 1 1 56462AFE\nP 5300 6100\nF 0 \"#PWR0174\" H 5300 5850 50 0001 C CNN\nF 1 \"GND\" H 5300 5950 50 0000 C CNN\nF 2 \"\" H 5300 6100 60 0000 C CNN\nF 3 \"\" H 5300 6100 60 0000 C CNN\n\t1 5300 6100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL LP0603 U17\nU 1 1 569D84E4\nP 5700 2500\nF 0 \"U17\" H 5850 2300 60 0000 C CNN\nF 1 \"LP0603A1880ANTR\" H 5800 2700 60 0000 C CNN\nF 2 \"VNA:LP0603A0902\" H 5800 2250 60 0001 C CNN\nF 3 \"\" H 5800 2250 60 0000 C CNN\n\t1 5700 2500\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t8800 3050 9550 3050\nWire Wire Line\n\t2450 3050 1650 3050\nWire Wire Line\n\t2350 3200 2450 3200\nWire Wire Line\n\t2350 3300 2450 3300\nWire Wire Line\n\t2350 3400 2450 3400\nWire Wire Line\n\t2350 3500 2450 3500\nWire Wire Line\n\t8800 3200 8900 3200\nWire Wire Line\n\t8800 3300 8900 3300\nWire Wire Line\n\t8800 3400 8900 3400\nWire Wire Line\n\t8800 3500 8900 3500\nWire Wire Line\n\t7900 3500 7900 3600\nWire Wire Line\n\t3350 3500 3400 3500\nWire Wire Line\n\t3400 3500 3400 3600\nWire Wire Line\n\t6300 4800 6400 4800\nWire Wire Line\n\t5200 4800 5100 4800\nWire Wire Line\n\t5200 3650 5100 3650\nWire Wire Line\n\t5300 2450 5150 2450\nWire Wire Line\n\t5300 6000 5200 6000\nWire Wire Line\n\t6250 6000 6150 6000\nWire Wire Line\n\t6150 2450 6300 2450\nWire Wire Line\n\t6200 3650 6300 3650\nWire Wire Line\n\t7200 3050 7200 3650\nWire Wire Line\n\t4300 3650 4800 3650\nWire Wire Line\n\t7200 3650 6600 3650\nWire Wire Line\n\t6600 2450 7600 2450\nWire Wire Line\n\t3550 2450 4850 2450\nWire Wire Line\n\t3550 6000 4900 6000\nWire Wire Line\n\t6550 6000 7500 6000\nWire Wire Line\n\t6150 2550 6150 2550\nWire Wire Line\n\t3550 2450 3550 3050\nWire Wire Line\n\t3550 3050 3350 3050\nWire Wire Line\n\t3350 3150 4300 3150\nWire Wire Line\n\t4300 3150 4300 3650\nWire Wire Line\n\t3350 3250 3950 3250\nWire Wire Line\n\t3950 3250 3950 4800\nWire Wire Line\n\t3350 3350 3550 3350\nWire Wire Line\n\t3550 3350 3550 6000\nWire Wire Line\n\t7900 3150 7600 3150\nWire Wire Line\n\t7600 3150 7600 2450\nWire Wire Line\n\t7200 3050 7900 3050\nWire Wire Line\n\t7900 3350 7350 3350\nWire Wire Line\n\t7350 3350 7350 4800\nWire Wire Line\n\t7500 6000 7500 3250\nWire Wire Line\n\t7500 3250 7900 3250\nWire Wire Line\n\t3950 4800 4800 4800\nWire Wire Line\n\t7350 4800 6700 4800\n$EndSCHEMATC\n" }, { "path": "hw/fpga.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A3 16535 11693\nencoding utf-8\nSheet 13 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Sheet\nS 1300 650 1100 1450\nU 583ABBE9\nF0 \"usb\" 60\nF1 \"usb.sch\" 60\nF2 \"TCK\" O L 1300 1000 60 \nF3 \"TDI\" O L 1300 1100 60 \nF4 \"TDO\" I L 1300 1200 60 \nF5 \"TMS\" O L 1300 1300 60 \nF6 \"D0\" B R 2400 750 60 \nF7 \"D1\" B R 2400 850 60 \nF8 \"D2\" B R 2400 950 60 \nF9 \"D3\" B R 2400 1050 60 \nF10 \"D4\" B R 2400 1150 60 \nF11 \"D5\" B R 2400 1250 60 \nF12 \"D6\" B R 2400 1350 60 \nF13 \"D7\" B R 2400 1450 60 \nF14 \"RXF#\" O R 2400 1600 60 \nF15 \"TXE#\" O R 2400 1700 60 \nF16 \"RD#\" I R 2400 1800 60 \nF17 \"WR\" I R 2400 1900 60 \nF18 \"SI/WUB\" I R 2400 2000 60 \nF19 \"3V3D\" I L 1300 750 60 \nF20 \"5V_IN\" I L 1300 850 60 \n$EndSheet\nText Label 1700 6250 2 60 ~ 0\nTCK\nText Label 1700 6350 2 60 ~ 0\nTDI\nText Label 1700 6450 2 60 ~ 0\nTDO\nText Label 1700 6550 2 60 ~ 0\nTMS\n$Comp\nL C C183\nU 1 1 583AFBD9\nP 7500 7700\nF 0 \"C183\" H 7525 7800 50 0000 L CNN\nF 1 \"4.7u\" H 7525 7600 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7538 7550 30 0001 C CNN\nF 3 \"\" H 7500 7700 60 0000 C CNN\n\t1 7500 7700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C186\nU 1 1 583AFF98\nP 7850 7700\nF 0 \"C186\" H 7875 7800 50 0000 L CNN\nF 1 \"4.7u\" H 7875 7600 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7888 7550 30 0001 C CNN\nF 3 \"\" H 7850 7700 60 0000 C CNN\n\t1 7850 7700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C189\nU 1 1 583AFFDD\nP 8350 7700\nF 0 \"C189\" H 8375 7800 50 0000 L CNN\nF 1 \"470n\" H 8375 7600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8388 7550 30 0001 C CNN\nF 3 \"\" H 8350 7700 60 0000 C CNN\n\t1 8350 7700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C191\nU 1 1 583B001F\nP 8700 7700\nF 0 \"C191\" H 8725 7800 50 0000 L CNN\nF 1 \"470n\" H 8725 7600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 7550 30 0001 C CNN\nF 3 \"\" H 8700 7700 60 0000 C CNN\n\t1 8700 7700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0283\nU 1 1 583B0066\nP 8700 7950\nF 0 \"#PWR0283\" H 8700 7700 50 0001 C CNN\nF 1 \"GND\" H 8700 7800 50 0000 C CNN\nF 2 \"\" H 8700 7950 60 0000 C CNN\nF 3 \"\" H 8700 7950 60 0000 C CNN\n\t1 8700 7950\n\t1 0 0 -1 \n$EndComp\nText Label 7500 7500 0 60 ~ 0\n1V0\nText Label 10250 7550 0 60 ~ 0\n3V3D\n$Comp\nL GND #PWR0284\nU 1 1 583B115F\nP 11300 8000\nF 0 \"#PWR0284\" H 11300 7750 50 0001 C CNN\nF 1 \"GND\" H 11300 7850 50 0000 C CNN\nF 2 \"\" H 11300 8000 60 0000 C CNN\nF 3 \"\" H 11300 8000 60 0000 C CNN\n\t1 11300 8000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C204\nU 1 1 583B1CF1\nP 12650 7750\nF 0 \"C204\" H 12675 7850 50 0000 L CNN\nF 1 \"470n\" H 12675 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 12688 7600 30 0001 C CNN\nF 3 \"\" H 12650 7750 60 0000 C CNN\n\t1 12650 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C203\nU 1 1 583B1D06\nP 12300 7750\nF 0 \"C203\" H 12325 7850 50 0000 L CNN\nF 1 \"470n\" H 12325 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 12338 7600 30 0001 C CNN\nF 3 \"\" H 12300 7750 60 0000 C CNN\n\t1 12300 7750\n\t1 0 0 -1 \n$EndComp\nText Label 1200 1000 2 60 ~ 0\nTCK\nText Label 1200 1100 2 60 ~ 0\nTDI\nText Label 1200 1300 2 60 ~ 0\nTMS\nText Label 1200 1200 2 60 ~ 0\nTDO\nText Label 1200 750 2 60 ~ 0\n3V3D\nText Label 2550 750 0 60 ~ 0\nFT_D0\nText Label 2550 850 0 60 ~ 0\nFT_D1\nText Label 2550 950 0 60 ~ 0\nFT_D2\nText Label 2550 1050 0 60 ~ 0\nFT_D3\nText Label 2550 1150 0 60 ~ 0\nFT_D4\nText Label 2550 1250 0 60 ~ 0\nFT_D5\nText Label 2550 1350 0 60 ~ 0\nFT_D6\nText Label 2550 1450 0 60 ~ 0\nFT_D7\nText Label 2550 1600 0 60 ~ 0\nRXF#\nText Label 2550 1700 0 60 ~ 0\nTXE#\nText Label 2550 1800 0 60 ~ 0\nRD#\nText Label 2550 1900 0 60 ~ 0\nWR\nText Label 2550 2000 0 60 ~ 0\nSI/WUB\nText HLabel 8250 7200 0 60 Input ~ 0\n1V0\nText HLabel 10850 7350 0 60 Input ~ 0\n3V3D\n$Comp\nL XC7A15T-1FTG256C U30\nU 1 1 583D8085\nP 5750 3150\nF 0 \"U30\" H 6300 50 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 6050 5350 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 5800 -50 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 5800 -50 50 0001 C CNN\n\t1 5750 3150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL XC7A15T-1FTG256C U30\nU 3 1 583D93F0\nP 14100 3200\nF 0 \"U30\" H 14800 100 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 14500 5450 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 14150 0 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 14150 0 50 0001 C CNN\n\t3 14100 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL XC7A15T-1FTG256C U30\nU 4 1 583D94E5\nP 2250 9700\nF 0 \"U30\" H 2900 8600 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 2650 10900 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 2300 6500 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 2300 6500 50 0001 C CNN\n\t4 2250 9700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL XC7A15T-1FTG256C U30\nU 5 1 583D95C9\nP 15400 7900\nF 0 \"U30\" H 15700 7250 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 15450 8500 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 15450 4700 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 15450 4700 50 0001 C CNN\n\t5 15400 7900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL XC7A15T-1FTG256C U30\nU 6 1 583D9B59\nP 2400 5850\nF 0 \"U30\" H 2650 5000 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 2450 6500 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 2450 2650 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 2450 2650 50 0001 C CNN\n\t6 2400 5850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL XC7A15T-1FTG256C U30\nU 7 1 583D9CA5\nP 4650 8950\nF 0 \"U30\" H 4900 6850 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 4600 10850 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 4700 5750 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 4700 5750 50 0001 C CNN\n\t7 4650 8950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0285\nU 1 1 583DD37C\nP 5550 10700\nF 0 \"#PWR0285\" H 5550 10450 50 0001 C CNN\nF 1 \"GND\" H 5550 10550 50 0000 C CNN\nF 2 \"\" H 5550 10700 60 0000 C CNN\nF 3 \"\" H 5550 10700 60 0000 C CNN\n\t1 5550 10700\n\t1 0 0 -1 \n$EndComp\n$Sheet\nS 1400 2850 1300 1750\nU 583E250D\nF0 \"adc\" 60\nF1 \"adc.sch\" 60\nF2 \"ADC+\" I L 1400 3200 60 \nF3 \"ADC-\" I L 1400 3300 60 \nF4 \"D0\" O R 2700 2950 60 \nF5 \"D1\" O R 2700 3050 60 \nF6 \"D2\" O R 2700 3150 60 \nF7 \"D3\" O R 2700 3250 60 \nF8 \"D4\" O R 2700 3350 60 \nF9 \"D5\" O R 2700 3450 60 \nF10 \"D6\" O R 2700 3550 60 \nF11 \"D7\" O R 2700 3650 60 \nF12 \"D8\" O R 2700 3750 60 \nF13 \"D9\" O R 2700 3850 60 \nF14 \"D10\" O R 2700 3950 60 \nF15 \"D11\" O R 2700 4050 60 \nF16 \"D12\" O R 2700 4150 60 \nF17 \"D13\" O R 2700 4250 60 \nF18 \"VCM\" O L 1400 3650 60 \nF19 \"CLK\" I L 1400 3450 60 \nF20 \"SHDN\" I L 1400 3950 60 \nF21 \"OE\" I L 1400 4050 60 \nF22 \"OF\" O R 2700 4450 60 \nF23 \"3V3\" I L 1400 2950 60 \nF24 \"3V6\" I L 1400 3050 60 \n$EndSheet\nText Label 2800 2950 0 60 ~ 0\nD0\nText Label 2800 3050 0 60 ~ 0\nD1\nText Label 2800 3150 0 60 ~ 0\nD2\nText Label 2800 3250 0 60 ~ 0\nD3\nText Label 2800 3350 0 60 ~ 0\nD4\nText Label 2800 3450 0 60 ~ 0\nD5\nText Label 2800 3550 0 60 ~ 0\nD6\nText Label 2800 3650 0 60 ~ 0\nD7\nText Label 2800 3750 0 60 ~ 0\nD8\nText Label 2800 3850 0 60 ~ 0\nD9\nText Label 2800 3950 0 60 ~ 0\nD10\nText Label 2800 4050 0 60 ~ 0\nD11\nText Label 2800 4150 0 60 ~ 0\nD12\nText Label 2800 4250 0 60 ~ 0\nD13\nText Label 2800 4450 0 60 ~ 0\nOF\nText HLabel 1150 3200 0 60 Input ~ 0\nADC+\nText HLabel 1150 3300 0 60 Input ~ 0\nADC-\nText HLabel 1150 3450 0 60 Input ~ 0\nADC_CLK\nText HLabel 1150 3650 0 60 Output ~ 0\nADC_VCM\nText Label 13100 5850 2 60 ~ 0\nADC_SHDN\nText Label 1150 4050 2 60 ~ 0\nADC_OE\nText HLabel 13100 2850 0 60 Input ~ 0\nCLK_REF\nText Label 13100 5650 2 60 ~ 0\nD0\nText Label 13100 5550 2 60 ~ 0\nD1\nText Label 13100 3550 2 60 ~ 0\nD2\nText Label 13100 3450 2 60 ~ 0\nD3\nText Label 13100 4550 2 60 ~ 0\nD4\nText Label 13100 5450 2 60 ~ 0\nD5\nText Label 13100 4450 2 60 ~ 0\nD6\nText Label 13100 5350 2 60 ~ 0\nD7\nText Label 13100 4350 2 60 ~ 0\nD8\nText Label 13100 5250 2 60 ~ 0\nD9\nText Label 13100 4250 2 60 ~ 0\nD10\nText Label 1650 10600 2 60 ~ 0\nD11\nText Label 1650 10500 2 60 ~ 0\nD12\nText Label 1650 10300 2 60 ~ 0\nD13\nText HLabel 4750 2450 0 60 Output ~ 0\nTX_FILTER1\nText HLabel 4750 1550 0 60 Output ~ 0\nTX_FILTER3\nText HLabel 4750 1650 0 60 Output ~ 0\nTX_FILTER2\nText HLabel 4750 1750 0 60 Output ~ 0\nTX_FILTER0\nText HLabel 4750 3950 0 60 Output ~ 0\nPORT_SW1\nText HLabel 4750 4450 0 60 Output ~ 0\nPORT_SW0\nText HLabel 8950 4200 0 60 Output ~ 0\nRX_SW5\nText HLabel 8950 4600 0 60 Output ~ 0\nRX_SW4\nText HLabel 8950 4300 0 60 Output ~ 0\nRX_SW3\nText HLabel 8950 4700 0 60 Output ~ 0\nRX_SW2\nText HLabel 8950 5100 0 60 Output ~ 0\nRX_SW1\nText HLabel 8950 5500 0 60 Output ~ 0\nRX_SW0\nText Label 4750 1150 2 60 ~ 0\nFT_D7\nText Label 4750 1250 2 60 ~ 0\nFT_D6\nText Label 4750 1350 2 60 ~ 0\nFT_D5\nText Label 4750 1850 2 60 ~ 0\nFT_D4\nText Label 4750 1950 2 60 ~ 0\nFT_D3\nText Label 4750 2050 2 60 ~ 0\nFT_D2\nText Label 4750 2150 2 60 ~ 0\nFT_D1\nText Label 4750 1450 2 60 ~ 0\nFT_D0\nText Label 8950 1100 2 60 ~ 0\nRXF#\nText Label 8950 1200 2 60 ~ 0\nTXE#\nText Label 8950 1300 2 60 ~ 0\nWR\nText Label 8950 1400 2 60 ~ 0\nSI/WUB\nText Label 8950 1800 2 60 ~ 0\nRD#\nText HLabel 13100 1650 0 60 Output ~ 0\nDITHER\nText HLabel 8950 5600 0 60 Output ~ 0\nMIXER_ENABLE\nText HLabel 8950 6000 0 60 Output ~ 0\nAMP_PWDWN\nText HLabel 13100 2350 0 60 Output ~ 0\nLO_SPI_DATA\nText HLabel 13100 1550 0 60 Output ~ 0\nSOURCE_SPI_DATA\nText HLabel 4750 5150 0 60 Output ~ 0\nLO_LE\nText HLabel 4750 4750 0 60 Output ~ 0\nLO_CE\nText HLabel 4750 4550 0 60 Output ~ 0\nSOURCE_LE\nText HLabel 4750 4650 0 60 Output ~ 0\nSOURCE_CE\nText HLabel 4750 3150 0 60 Output ~ 0\nATTEN_LE\nText HLabel 4750 2350 0 60 Output ~ 0\nATTEN_SPI_DATA\nText HLabel 13100 4150 0 60 Input ~ 0\nLO_LD\nText HLabel 13100 5150 0 60 Input ~ 0\nSOURCE_LD\nText HLabel 13100 5950 0 60 Output ~ 0\nLO_RF_ENABLE\nText HLabel 13100 6050 0 60 Output ~ 0\nSOURCE_RF_ENABLE\nText HLabel 12700 3150 0 60 Output ~ 0\nSPI_CLK\n$Comp\nL C C181\nU 1 1 584F0EB9\nP 6950 7700\nF 0 \"C181\" H 6975 7800 50 0000 L CNN\nF 1 \"100u\" H 6975 7600 50 0000 L CNN\nF 2 \"Capacitors_SMD:C_1210\" H 6988 7550 30 0001 C CNN\nF 3 \"\" H 6950 7700 60 0000 C CNN\n\t1 6950 7700\n\t1 0 0 -1 \n$EndComp\nText Notes 7500 7300 0 60 ~ 0\nVCCINT\n$Comp\nL C C187\nU 1 1 584F34CE\nP 7850 8700\nF 0 \"C187\" H 7875 8800 50 0000 L CNN\nF 1 \"470n\" H 7875 8600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7888 8550 30 0001 C CNN\nF 3 \"\" H 7850 8700 60 0000 C CNN\n\t1 7850 8700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0286\nU 1 1 584F34D4\nP 7850 8950\nF 0 \"#PWR0286\" H 7850 8700 50 0001 C CNN\nF 1 \"GND\" H 7850 8800 50 0000 C CNN\nF 2 \"\" H 7850 8950 60 0000 C CNN\nF 3 \"\" H 7850 8950 60 0000 C CNN\n\t1 7850 8950\n\t1 0 0 -1 \n$EndComp\nText Label 7850 8500 0 60 ~ 0\n1V0\n$Comp\nL C C184\nU 1 1 584F34F4\nP 7500 8700\nF 0 \"C184\" H 7525 8800 50 0000 L CNN\nF 1 \"47u\" H 7525 8600 50 0000 L CNN\nF 2 \"Capacitors_SMD:C_1206\" H 7538 8550 30 0001 C CNN\nF 3 \"\" H 7500 8700 60 0000 C CNN\n\t1 7500 8700\n\t1 0 0 -1 \n$EndComp\nText Notes 7550 8350 0 60 ~ 0\nVCCBRAM\n$Comp\nL C C185\nU 1 1 584F6A0D\nP 7700 9850\nF 0 \"C185\" H 7725 9950 50 0000 L CNN\nF 1 \"4.7u\" H 7725 9750 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7738 9700 30 0001 C CNN\nF 3 \"\" H 7700 9850 60 0000 C CNN\n\t1 7700 9850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C188\nU 1 1 584F6A13\nP 8050 9850\nF 0 \"C188\" H 8075 9950 50 0000 L CNN\nF 1 \"4.7u\" H 8075 9750 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 8088 9700 30 0001 C CNN\nF 3 \"\" H 8050 9850 60 0000 C CNN\n\t1 8050 9850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C190\nU 1 1 584F6A19\nP 8550 9850\nF 0 \"C190\" H 8575 9950 50 0000 L CNN\nF 1 \"470n\" H 8575 9750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8588 9700 30 0001 C CNN\nF 3 \"\" H 8550 9850 60 0000 C CNN\n\t1 8550 9850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C192\nU 1 1 584F6A1F\nP 8900 9850\nF 0 \"C192\" H 8925 9950 50 0000 L CNN\nF 1 \"470n\" H 8925 9750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8938 9700 30 0001 C CNN\nF 3 \"\" H 8900 9850 60 0000 C CNN\n\t1 8900 9850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0287\nU 1 1 584F6A25\nP 8900 10100\nF 0 \"#PWR0287\" H 8900 9850 50 0001 C CNN\nF 1 \"GND\" H 8900 9950 50 0000 C CNN\nF 2 \"\" H 8900 10100 60 0000 C CNN\nF 3 \"\" H 8900 10100 60 0000 C CNN\n\t1 8900 10100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C182\nU 1 1 584F6A45\nP 7150 9850\nF 0 \"C182\" H 7175 9950 50 0000 L CNN\nF 1 \"47u\" H 7175 9750 50 0000 L CNN\nF 2 \"Capacitors_SMD:C_1206\" H 7188 9700 30 0001 C CNN\nF 3 \"\" H 7150 9850 60 0000 C CNN\n\t1 7150 9850\n\t1 0 0 -1 \n$EndComp\nText Notes 7700 9450 0 60 ~ 0\nVCCAUX\n$Comp\nL C C193\nU 1 1 584F7C97\nP 9250 9850\nF 0 \"C193\" H 9275 9950 50 0000 L CNN\nF 1 \"470n\" H 9275 9750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9288 9700 30 0001 C CNN\nF 3 \"\" H 9250 9850 60 0000 C CNN\n\t1 9250 9850\n\t1 0 0 -1 \n$EndComp\nText Label 8550 9650 0 60 ~ 0\n1V8\n$Comp\nL GND #PWR0288\nU 1 1 584F9B46\nP 10000 9000\nF 0 \"#PWR0288\" H 10000 8750 50 0001 C CNN\nF 1 \"GND\" H 10000 8850 50 0000 C CNN\nF 2 \"\" H 10000 9000 60 0000 C CNN\nF 3 \"\" H 10000 9000 60 0000 C CNN\n\t1 10000 9000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C196\nU 1 1 584F9B52\nP 10000 8750\nF 0 \"C196\" H 10025 8850 50 0000 L CNN\nF 1 \"47u\" H 10025 8650 50 0000 L CNN\nF 2 \"Capacitors_SMD:C_1206\" H 10038 8600 30 0001 C CNN\nF 3 \"\" H 10000 8750 60 0000 C CNN\n\t1 10000 8750\n\t1 0 0 -1 \n$EndComp\nText Notes 9700 8400 0 60 ~ 0\nVCCO_0\nText Label 10000 8550 0 60 ~ 0\n3V3D\n$Comp\nL C C202\nU 1 1 584FBB6A\nP 11950 7750\nF 0 \"C202\" H 11975 7850 50 0000 L CNN\nF 1 \"470n\" H 11975 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 11988 7600 30 0001 C CNN\nF 3 \"\" H 11950 7750 60 0000 C CNN\n\t1 11950 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C201\nU 1 1 584FBCC6\nP 11650 7750\nF 0 \"C201\" H 11675 7850 50 0000 L CNN\nF 1 \"470n\" H 11675 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 11688 7600 30 0001 C CNN\nF 3 \"\" H 11650 7750 60 0000 C CNN\n\t1 11650 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C200\nU 1 1 584FBE1F\nP 11300 7750\nF 0 \"C200\" H 11325 7850 50 0000 L CNN\nF 1 \"470n\" H 11325 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 11338 7600 30 0001 C CNN\nF 3 \"\" H 11300 7750 60 0000 C CNN\n\t1 11300 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C199\nU 1 1 584FBF7D\nP 10950 7750\nF 0 \"C199\" H 10975 7850 50 0000 L CNN\nF 1 \"470n\" H 10975 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 10988 7600 30 0001 C CNN\nF 3 \"\" H 10950 7750 60 0000 C CNN\n\t1 10950 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C198\nU 1 1 584FC3A3\nP 10600 7750\nF 0 \"C198\" H 10625 7850 50 0000 L CNN\nF 1 \"470n\" H 10625 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 10638 7600 30 0001 C CNN\nF 3 \"\" H 10600 7750 60 0000 C CNN\n\t1 10600 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C197\nU 1 1 584FC507\nP 10250 7750\nF 0 \"C197\" H 10275 7850 50 0000 L CNN\nF 1 \"470n\" H 10275 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 10288 7600 30 0001 C CNN\nF 3 \"\" H 10250 7750 60 0000 C CNN\n\t1 10250 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C195\nU 1 1 584FCAC1\nP 9900 7750\nF 0 \"C195\" H 9925 7850 50 0000 L CNN\nF 1 \"4.7u\" H 9925 7650 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 9938 7600 30 0001 C CNN\nF 3 \"\" H 9900 7750 60 0000 C CNN\n\t1 9900 7750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C194\nU 1 1 584FCC71\nP 9550 7750\nF 0 \"C194\" H 9575 7850 50 0000 L CNN\nF 1 \"4.7u\" H 9575 7650 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 9588 7600 30 0001 C CNN\nF 3 \"\" H 9550 7750 60 0000 C CNN\n\t1 9550 7750\n\t1 0 0 -1 \n$EndComp\nText Notes 11250 7350 0 60 ~ 0\nVCCO\nText Label 3500 7300 2 60 ~ 0\n1V8\nText Label 3600 8700 2 60 ~ 0\n3V3D\n$Comp\nL GND #PWR0289\nU 1 1 5850873B\nP 14900 9300\nF 0 \"#PWR0289\" H 14900 9050 50 0001 C CNN\nF 1 \"GND\" H 14900 9150 50 0000 C CNN\nF 2 \"\" H 14900 9300 60 0000 C CNN\nF 3 \"\" H 14900 9300 60 0000 C CNN\n\t1 14900 9300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0290\nU 1 1 58508FE8\nP 14500 8100\nF 0 \"#PWR0290\" H 14500 7850 50 0001 C CNN\nF 1 \"GND\" H 14500 7950 50 0000 C CNN\nF 2 \"\" H 14500 8100 60 0000 C CNN\nF 3 \"\" H 14500 8100 60 0000 C CNN\n\t1 14500 8100\n\t1 0 0 -1 \n$EndComp\nText HLabel 14550 8000 0 60 Input ~ 0\nXADC_VP\n$Comp\nL GND #PWR0291\nU 1 1 5850AC24\nP 14850 7850\nF 0 \"#PWR0291\" H 14850 7600 50 0001 C CNN\nF 1 \"GND\" H 14700 7800 50 0000 C CNN\nF 2 \"\" H 14850 7850 60 0000 C CNN\nF 3 \"\" H 14850 7850 60 0000 C CNN\n\t1 14850 7850\n\t1 0 0 -1 \n$EndComp\nText Label 1650 5350 2 60 ~ 0\n3V3D\n$Comp\nL R R69\nU 1 1 58513E23\nP 12300 1850\nF 0 \"R69\" V 12380 1850 50 0000 C CNN\nF 1 \"DNP\" V 12300 1850 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 12230 1850 30 0001 C CNN\nF 3 \"\" H 12300 1850 30 0000 C CNN\n\t1 12300 1850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R70\nU 1 1 58514053\nP 12300 2200\nF 0 \"R70\" V 12380 2200 50 0000 C CNN\nF 1 \"0\" V 12300 2200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 12230 2200 30 0001 C CNN\nF 3 \"\" H 12300 2200 30 0000 C CNN\n\t1 12300 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0292\nU 1 1 585141A7\nP 12300 2350\nF 0 \"#PWR0292\" H 12300 2100 50 0001 C CNN\nF 1 \"GND\" H 12300 2200 50 0000 C CNN\nF 2 \"\" H 12300 2350 60 0000 C CNN\nF 3 \"\" H 12300 2350 60 0000 C CNN\n\t1 12300 2350\n\t1 0 0 -1 \n$EndComp\nText Label 12300 1700 2 60 ~ 0\n3V3D\nText Label 3500 7800 2 60 ~ 0\n1V0\nText HLabel 8850 9400 0 60 Input ~ 0\n1V8\n$Comp\nL FILTER FB9\nU 1 1 585196CB\nP 13850 8250\nF 0 \"FB9\" H 13850 8400 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 13850 8150 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 13850 8250 60 0001 C CNN\nF 3 \"\" H 13850 8250 60 0000 C CNN\n\t1 13850 8250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C206\nU 1 1 5851B3D6\nP 14650 8400\nF 0 \"C206\" H 14675 8500 50 0000 L CNN\nF 1 \"100n\" H 14675 8300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 14688 8250 30 0001 C CNN\nF 3 \"\" H 14650 8400 60 0000 C CNN\n\t1 14650 8400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C205\nU 1 1 5851B759\nP 14350 8400\nF 0 \"C205\" H 14375 8500 50 0000 L CNN\nF 1 \"470n\" H 14375 8300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 14388 8250 30 0001 C CNN\nF 3 \"\" H 14350 8400 60 0000 C CNN\n\t1 14350 8400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB10\nU 1 1 5851C0CC\nP 14900 8950\nF 0 \"FB10\" H 14900 9100 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 14900 8850 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 14900 8950 60 0001 C CNN\nF 3 \"\" H 14900 8950 60 0000 C CNN\n\t1 14900 8950\n\t0 1 1 0 \n$EndComp\nText Label 13450 8250 2 60 ~ 0\n1V8\nText Notes 14700 7800 2 60 ~ 0\nInternal reference\nWire Wire Line\n\t1250 6550 1800 6550\nWire Wire Line\n\t1500 6450 1800 6450\nWire Wire Line\n\t1250 6350 1800 6350\nWire Wire Line\n\t1500 6250 1800 6250\nWire Wire Line\n\t8700 7850 8700 7950\nWire Wire Line\n\t6950 7900 9050 7900\nWire Wire Line\n\t8350 7900 8350 7850\nConnection ~ 8700 7900\nWire Wire Line\n\t7850 7900 7850 7850\nConnection ~ 8350 7900\nWire Wire Line\n\t7500 7900 7500 7850\nConnection ~ 7850 7900\nWire Wire Line\n\t7500 7550 7500 7500\nWire Wire Line\n\t6950 7500 9050 7500\nWire Wire Line\n\t7850 7500 7850 7550\nWire Wire Line\n\t8350 7200 8350 7550\nConnection ~ 7850 7500\nWire Wire Line\n\t8700 7500 8700 7550\nConnection ~ 8350 7500\nWire Wire Line\n\t10600 7950 10600 7900\nWire Wire Line\n\t10250 7950 10250 7900\nConnection ~ 10600 7950\nWire Wire Line\n\t10250 7550 10250 7600\nWire Wire Line\n\t10600 7550 10600 7600\nConnection ~ 10600 7550\nWire Wire Line\n\t11650 7950 11650 7900\nConnection ~ 11300 7550\nWire Wire Line\n\t11650 7550 11650 7600\nConnection ~ 10950 7550\nWire Wire Line\n\t11300 7550 11300 7600\nWire Wire Line\n\t10950 7350 10950 7600\nWire Wire Line\n\t9550 7550 13000 7550\nConnection ~ 10950 7950\nConnection ~ 11300 7950\nWire Wire Line\n\t10950 7950 10950 7900\nWire Wire Line\n\t9550 7950 13000 7950\nWire Wire Line\n\t11300 7900 11300 8000\nWire Wire Line\n\t12650 7950 12650 7900\nConnection ~ 12300 7550\nWire Wire Line\n\t12650 7550 12650 7600\nConnection ~ 11950 7550\nWire Wire Line\n\t12300 7550 12300 7600\nWire Wire Line\n\t11950 7550 11950 7600\nConnection ~ 11950 7950\nConnection ~ 12300 7950\nWire Wire Line\n\t11950 7950 11950 7900\nConnection ~ 11650 7550\nConnection ~ 11650 7950\nWire Wire Line\n\t12300 7900 12300 7950\nWire Wire Line\n\t10850 7350 10950 7350\nWire Wire Line\n\t8250 7200 8350 7200\nWire Wire Line\n\t1200 1000 1300 1000\nWire Wire Line\n\t1200 1100 1300 1100\nWire Wire Line\n\t1200 1200 1300 1200\nWire Wire Line\n\t1300 1300 1200 1300\nWire Wire Line\n\t1300 750 1200 750 \nWire Wire Line\n\t1300 850 1200 850 \nWire Wire Line\n\t2550 750 2400 750 \nWire Wire Line\n\t2550 850 2400 850 \nWire Wire Line\n\t2400 950 2550 950 \nWire Wire Line\n\t2550 1050 2400 1050\nWire Wire Line\n\t2400 1150 2550 1150\nWire Wire Line\n\t2550 1250 2400 1250\nWire Wire Line\n\t2400 1350 2550 1350\nWire Wire Line\n\t2400 1450 2550 1450\nWire Wire Line\n\t2400 1600 2550 1600\nWire Wire Line\n\t2400 1700 2550 1700\nWire Wire Line\n\t2400 1800 2550 1800\nWire Wire Line\n\t2400 1900 2550 1900\nWire Wire Line\n\t2550 2000 2400 2000\nWire Wire Line\n\t5550 7600 5550 10700\nWire Wire Line\n\t5550 7600 5300 7600\nWire Wire Line\n\t5300 7700 5550 7700\nConnection ~ 5550 7700\nWire Wire Line\n\t5550 7800 5300 7800\nConnection ~ 5550 7800\nWire Wire Line\n\t5300 7900 5550 7900\nConnection ~ 5550 7900\nWire Wire Line\n\t5300 8000 5550 8000\nConnection ~ 5550 8000\nWire Wire Line\n\t5300 8100 5550 8100\nConnection ~ 5550 8100\nWire Wire Line\n\t5300 8200 5550 8200\nConnection ~ 5550 8200\nWire Wire Line\n\t5300 8300 5550 8300\nConnection ~ 5550 8300\nWire Wire Line\n\t5300 8400 5550 8400\nConnection ~ 5550 8400\nWire Wire Line\n\t5300 8500 5550 8500\nConnection ~ 5550 8500\nWire Wire Line\n\t5300 8600 5550 8600\nConnection ~ 5550 8600\nWire Wire Line\n\t5300 8700 5550 8700\nConnection ~ 5550 8700\nWire Wire Line\n\t5300 8800 5550 8800\nConnection ~ 5550 8800\nWire Wire Line\n\t5300 8900 5550 8900\nConnection ~ 5550 8900\nWire Wire Line\n\t5300 9000 5550 9000\nConnection ~ 5550 9000\nWire Wire Line\n\t5300 9100 5550 9100\nConnection ~ 5550 9100\nWire Wire Line\n\t5300 9200 5550 9200\nConnection ~ 5550 9200\nWire Wire Line\n\t5300 9300 5550 9300\nConnection ~ 5550 9300\nWire Wire Line\n\t5300 9400 5550 9400\nConnection ~ 5550 9400\nWire Wire Line\n\t5300 9500 5550 9500\nConnection ~ 5550 9500\nWire Wire Line\n\t5300 9600 5550 9600\nConnection ~ 5550 9600\nWire Wire Line\n\t5300 9700 5550 9700\nConnection ~ 5550 9700\nWire Wire Line\n\t5300 9800 5550 9800\nConnection ~ 5550 9800\nWire Wire Line\n\t5300 9900 5550 9900\nConnection ~ 5550 9900\nWire Wire Line\n\t5300 10000 5550 10000\nConnection ~ 5550 10000\nWire Wire Line\n\t5300 10100 5550 10100\nConnection ~ 5550 10100\nWire Wire Line\n\t5300 10200 5550 10200\nConnection ~ 5550 10200\nWire Wire Line\n\t5300 10300 5550 10300\nConnection ~ 5550 10300\nWire Wire Line\n\t5300 10400 5550 10400\nConnection ~ 5550 10400\nWire Wire Line\n\t5300 10500 5550 10500\nConnection ~ 5550 10500\nWire Wire Line\n\t2700 2950 2800 2950\nWire Wire Line\n\t2800 4450 2700 4450\nWire Wire Line\n\t2800 4250 2700 4250\nWire Wire Line\n\t2800 4150 2700 4150\nWire Wire Line\n\t2700 4050 2800 4050\nWire Wire Line\n\t2800 3950 2700 3950\nWire Wire Line\n\t2700 3850 2800 3850\nWire Wire Line\n\t2800 3750 2700 3750\nWire Wire Line\n\t2700 3650 2800 3650\nWire Wire Line\n\t2800 3550 2700 3550\nWire Wire Line\n\t2700 3450 2800 3450\nWire Wire Line\n\t2700 3050 2800 3050\nWire Wire Line\n\t2800 3150 2700 3150\nWire Wire Line\n\t2700 3250 2800 3250\nWire Wire Line\n\t2800 3350 2700 3350\nWire Wire Line\n\t1150 2950 1400 2950\nWire Wire Line\n\t1150 3200 1400 3200\nWire Wire Line\n\t1400 3300 1150 3300\nWire Wire Line\n\t1150 3450 1400 3450\nWire Wire Line\n\t1150 3650 1400 3650\nWire Wire Line\n\t1150 4050 1400 4050\nWire Wire Line\n\t1400 3950 1150 3950\nWire Wire Line\n\t13200 2850 13100 2850\nWire Wire Line\n\t13200 4450 13100 4450\nWire Wire Line\n\t13200 4350 13100 4350\nWire Wire Line\n\t13200 5250 13100 5250\nWire Wire Line\n\t13200 4250 13100 4250\nWire Wire Line\n\t13200 5650 13100 5650\nWire Wire Line\n\t13200 5550 13100 5550\nWire Wire Line\n\t13200 5450 13100 5450\nWire Wire Line\n\t13200 5350 13100 5350\nWire Wire Line\n\t13200 4550 13100 4550\nWire Wire Line\n\t13200 3450 13100 3450\nWire Wire Line\n\t13200 3550 13100 3550\nWire Wire Line\n\t4850 1750 4750 1750\nWire Wire Line\n\t4850 1550 4750 1550\nWire Wire Line\n\t4750 1650 4850 1650\nWire Wire Line\n\t4750 2450 4850 2450\nWire Wire Line\n\t4850 3950 4750 3950\nWire Wire Line\n\t4750 4450 4850 4450\nWire Wire Line\n\t9050 4200 8950 4200\nWire Wire Line\n\t8950 4600 9050 4600\nWire Wire Line\n\t8950 4300 9050 4300\nWire Wire Line\n\t8950 4700 9050 4700\nWire Wire Line\n\t8950 5100 9050 5100\nWire Wire Line\n\t8950 5500 9050 5500\nWire Wire Line\n\t4750 1150 4850 1150\nWire Wire Line\n\t4750 1250 4850 1250\nWire Wire Line\n\t4750 1350 4850 1350\nWire Wire Line\n\t4750 1850 4850 1850\nWire Wire Line\n\t4750 1950 4850 1950\nWire Wire Line\n\t4750 2050 4850 2050\nWire Wire Line\n\t4850 2150 4750 2150\nWire Wire Line\n\t4750 1450 4850 1450\nWire Wire Line\n\t8950 1100 9050 1100\nWire Wire Line\n\t8950 1200 9050 1200\nWire Wire Line\n\t8950 1300 9050 1300\nWire Wire Line\n\t8950 1400 9050 1400\nWire Wire Line\n\t8950 1800 9050 1800\nWire Wire Line\n\t13100 1650 13200 1650\nWire Wire Line\n\t8950 5600 9050 5600\nWire Wire Line\n\t8950 6000 9050 6000\nWire Wire Line\n\t13100 3150 13200 3150\nWire Wire Line\n\t13100 2350 13200 2350\nWire Wire Line\n\t13100 1550 13200 1550\nWire Wire Line\n\t4750 5150 4850 5150\nWire Wire Line\n\t4750 4750 4850 4750\nWire Wire Line\n\t4750 4550 4850 4550\nWire Wire Line\n\t4750 4650 4850 4650\nWire Wire Line\n\t4750 2350 4850 2350\nWire Wire Line\n\t13100 4150 13200 4150\nWire Wire Line\n\t13100 5150 13200 5150\nWire Wire Line\n\t13100 5950 13200 5950\nWire Wire Line\n\t13100 6050 13200 6050\nWire Wire Line\n\t6950 7550 6950 7500\nConnection ~ 7500 7500\nWire Wire Line\n\t6950 7850 6950 7900\nConnection ~ 7500 7900\nWire Wire Line\n\t7850 8850 7850 8950\nWire Wire Line\n\t7500 8900 7850 8900\nConnection ~ 7850 8900\nWire Wire Line\n\t7500 8500 7850 8500\nWire Wire Line\n\t7850 8500 7850 8550\nWire Wire Line\n\t7500 8550 7500 8500\nWire Wire Line\n\t7500 8850 7500 8900\nWire Wire Line\n\t8900 10000 8900 10100\nWire Wire Line\n\t7150 10050 9250 10050\nWire Wire Line\n\t8550 10050 8550 10000\nConnection ~ 8900 10050\nWire Wire Line\n\t8050 10050 8050 10000\nConnection ~ 8550 10050\nWire Wire Line\n\t7700 10050 7700 10000\nConnection ~ 8050 10050\nWire Wire Line\n\t7700 9700 7700 9650\nWire Wire Line\n\t7150 9650 9250 9650\nWire Wire Line\n\t8050 9650 8050 9700\nWire Wire Line\n\t8550 9650 8550 9700\nConnection ~ 8050 9650\nWire Wire Line\n\t8900 9400 8900 9700\nConnection ~ 8550 9650\nWire Wire Line\n\t7150 9700 7150 9650\nConnection ~ 7700 9650\nWire Wire Line\n\t7150 10000 7150 10050\nConnection ~ 7700 10050\nWire Wire Line\n\t9250 9650 9250 9700\nConnection ~ 8900 9650\nWire Wire Line\n\t9250 10050 9250 10000\nWire Wire Line\n\t10000 8900 10000 9000\nWire Wire Line\n\t10000 8550 10000 8600\nWire Wire Line\n\t9900 7550 9900 7600\nConnection ~ 10250 7550\nWire Wire Line\n\t9550 7550 9550 7600\nConnection ~ 9900 7550\nWire Wire Line\n\t9900 7900 9900 7950\nConnection ~ 10250 7950\nWire Wire Line\n\t9550 7950 9550 7900\nConnection ~ 9900 7950\nWire Wire Line\n\t3500 7300 3700 7300\nWire Wire Line\n\t3700 7400 3600 7400\nConnection ~ 3600 7300\nWire Wire Line\n\t3600 7500 3700 7500\nConnection ~ 3600 7400\nWire Wire Line\n\t3600 7600 3700 7600\nConnection ~ 3600 7500\nWire Wire Line\n\t3500 7800 3700 7800\nConnection ~ 3600 7600\nWire Wire Line\n\t3600 7900 3700 7900\nConnection ~ 3600 7800\nWire Wire Line\n\t3600 8000 3700 8000\nConnection ~ 3600 7900\nWire Wire Line\n\t3600 8100 3700 8100\nConnection ~ 3600 8000\nWire Wire Line\n\t3600 8200 3700 8200\nConnection ~ 3600 8100\nWire Wire Line\n\t3600 8300 3700 8300\nConnection ~ 3600 8200\nWire Wire Line\n\t3600 8400 3700 8400\nConnection ~ 3600 8300\nWire Wire Line\n\t3600 8500 3700 8500\nConnection ~ 3600 8400\nWire Wire Line\n\t3600 8600 3700 8600\nConnection ~ 3600 8500\nWire Wire Line\n\t3600 8700 3700 8700\nWire Wire Line\n\t3700 8800 3600 8800\nWire Wire Line\n\t3600 8700 3600 10800\nWire Wire Line\n\t3600 8900 3700 8900\nConnection ~ 3600 8800\nWire Wire Line\n\t3600 9000 3700 9000\nConnection ~ 3600 8900\nWire Wire Line\n\t3600 9100 3700 9100\nConnection ~ 3600 9000\nWire Wire Line\n\t3600 9200 3700 9200\nConnection ~ 3600 9100\nWire Wire Line\n\t3600 9300 3700 9300\nConnection ~ 3600 9200\nWire Wire Line\n\t3600 9400 3700 9400\nConnection ~ 3600 9300\nWire Wire Line\n\t3600 9500 3700 9500\nConnection ~ 3600 9400\nWire Wire Line\n\t3600 9600 3700 9600\nConnection ~ 3600 9500\nWire Wire Line\n\t3600 9700 3700 9700\nConnection ~ 3600 9600\nWire Wire Line\n\t3600 9800 3700 9800\nConnection ~ 3600 9700\nWire Wire Line\n\t3600 9900 3700 9900\nConnection ~ 3600 9800\nWire Wire Line\n\t3600 10000 3700 10000\nConnection ~ 3600 9900\nWire Wire Line\n\t3600 10100 3700 10100\nConnection ~ 3600 10000\nWire Wire Line\n\t3600 10200 3700 10200\nConnection ~ 3600 10100\nWire Wire Line\n\t3600 10300 3700 10300\nConnection ~ 3600 10200\nWire Wire Line\n\t3600 10400 3700 10400\nConnection ~ 3600 10300\nWire Wire Line\n\t3600 10500 3700 10500\nConnection ~ 3600 10400\nWire Wire Line\n\t3600 10600 3700 10600\nConnection ~ 3600 10500\nWire Wire Line\n\t3600 10700 3700 10700\nConnection ~ 3600 10600\nWire Wire Line\n\t3600 10800 3700 10800\nConnection ~ 3600 10700\nWire Wire Line\n\t14200 8250 14900 8250\nWire Wire Line\n\t14900 8350 14900 8600\nWire Wire Line\n\t14500 8100 14900 8100\nWire Wire Line\n\t14550 8000 14900 8000\nWire Wire Line\n\t14850 7850 14900 7850\nWire Wire Line\n\t1650 5350 1800 5350\nWire Wire Line\n\t12300 2050 13200 2050\nWire Wire Line\n\t12300 2000 12300 2050\nWire Wire Line\n\t3600 7300 3600 7600\nWire Wire Line\n\t3600 7800 3600 8600\nWire Wire Line\n\t8900 9400 8850 9400\nConnection ~ 14650 8250\nConnection ~ 14350 8250\nWire Wire Line\n\t14350 8550 14900 8550\nConnection ~ 14900 8550\nConnection ~ 14650 8550\nWire Wire Line\n\t13500 8250 13450 8250\nWire Wire Line\n\t14850 7750 14900 7750\nWire Wire Line\n\t14850 7500 14850 7850\nWire Wire Line\n\t14900 7600 14850 7600\nConnection ~ 14850 7750\nWire Wire Line\n\t14850 7500 14900 7500\nConnection ~ 14850 7600\nWire Wire Line\n\t3150 7700 3700 7700\nText Notes 7250 6950 0 60 ~ 0\nQuiescent current\\n1V0: 97 mA\\n1V8: 22 mA\\n3V3: 2 mA\nText Notes 8200 6950 0 60 ~ 0\nPower-on current\\n1V0: Iq + 180 mA\\n1V8: Iq + 40 mA\\n3V3: Iq + 40 mA\nText Notes 7250 6500 0 60 ~ 0\nPower supply ramp time: 0.2 ms - 50 ms\nText HLabel 4750 5850 0 60 Input ~ 0\nSOURCE_MUXOUT\nWire Wire Line\n\t4850 5850 4750 5850\nText HLabel 4750 6050 0 60 Input ~ 0\nLO_MUXOUT\nWire Wire Line\n\t4750 6050 4850 6050\nText Notes 1700 3100 0 60 ~ 0\n50 mA\nWire Wire Line\n\t1400 3050 1150 3050\nText HLabel 1150 3050 0 60 Input ~ 0\n3V6\nText Label 1150 2950 2 60 ~ 0\n3V3D\nText Notes 950 5100 0 60 ~ 0\nTODO: Programming pins\n$Comp\nL C C250\nU 1 1 58530C63\nP 9050 7700\nF 0 \"C250\" H 9075 7800 50 0000 L CNN\nF 1 \"470n\" H 9075 7600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9088 7550 30 0001 C CNN\nF 3 \"\" H 9050 7700 60 0000 C CNN\n\t1 9050 7700\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t9050 7500 9050 7550\nConnection ~ 8700 7500\nWire Wire Line\n\t9050 7900 9050 7850\n$Comp\nL C C251\nU 1 1 58531E80\nP 13000 7750\nF 0 \"C251\" H 13025 7850 50 0000 L CNN\nF 1 \"470n\" H 13025 7650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 13038 7600 30 0001 C CNN\nF 3 \"\" H 13000 7750 60 0000 C CNN\n\t1 13000 7750\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t13000 7550 13000 7600\nConnection ~ 12650 7550\nWire Wire Line\n\t13000 7950 13000 7900\nConnection ~ 12650 7950\n$Comp\nL LED D6\nU 1 1 585323DE\nP 9900 10500\nF 0 \"D6\" H 9900 10600 50 0000 C CNN\nF 1 \"LED\" H 9900 10400 50 0000 C CNN\nF 2 \"VNA:LED_0603\" H 9900 10500 60 0001 C CNN\nF 3 \"\" H 9900 10500 60 0000 C CNN\n\t1 9900 10500\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0293\nU 1 1 585323E5\nP 9900 10700\nF 0 \"#PWR0293\" H 9900 10450 50 0001 C CNN\nF 1 \"GND\" H 9900 10550 50 0000 C CNN\nF 2 \"\" H 9900 10700 60 0000 C CNN\nF 3 \"\" H 9900 10700 60 0000 C CNN\n\t1 9900 10700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R109\nU 1 1 585323EB\nP 9900 10150\nF 0 \"R109\" V 9980 10150 50 0000 C CNN\nF 1 \"240\" V 9900 10150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9830 10150 30 0001 C CNN\nF 3 \"\" H 9900 10150 30 0000 C CNN\n\t1 9900 10150\n\t1 0 0 -1 \n$EndComp\nText Label 9900 10000 0 60 ~ 0\nLED\nText Label 8950 2800 2 60 ~ 0\nLED\nWire Wire Line\n\t8950 2800 9050 2800\n$Comp\nL CONN_01X01 P9\nU 1 1 58552888\nP 700 5950\nF 0 \"P9\" H 700 6050 50 0000 C CNN\nF 1 \"CONN_01X01\" V 800 5950 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 700 5950 60 0001 C CNN\nF 3 \"\" H 700 5950 60 0000 C CNN\n\t1 700 5950\n\t-1 0 0 1 \n$EndComp\nWire Wire Line\n\t900 5950 1800 5950\n$Comp\nL SW_PUSH SW1\nU 1 1 585531EB\nP 750 7150\nF 0 \"SW1\" H 900 7260 50 0000 C CNN\nF 1 \"DNP\" H 750 7070 50 0000 C CNN\nF 2 \"VNA:EVP-AWBA2A\" H 750 7150 60 0001 C CNN\nF 3 \"\" H 750 7150 60 0000 C CNN\n\t1 750 7150\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R113\nU 1 1 58553A4A\nP 1200 7100\nF 0 \"R113\" V 1280 7100 50 0000 C CNN\nF 1 \"DNP\" V 1200 7100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1130 7100 30 0001 C CNN\nF 3 \"\" H 1200 7100 30 0000 C CNN\n\t1 1200 7100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R114\nU 1 1 58553D4B\nP 1200 7500\nF 0 \"R114\" V 1280 7500 50 0000 C CNN\nF 1 \"0\" V 1200 7500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1130 7500 30 0001 C CNN\nF 3 \"\" H 1200 7500 30 0000 C CNN\n\t1 1200 7500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R115\nU 1 1 58553EF2\nP 1450 7100\nF 0 \"R115\" V 1530 7100 50 0000 C CNN\nF 1 \"DNP\" V 1450 7100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1380 7100 30 0001 C CNN\nF 3 \"\" H 1450 7100 30 0000 C CNN\n\t1 1450 7100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R116\nU 1 1 5855409A\nP 1450 7500\nF 0 \"R116\" V 1530 7500 50 0000 C CNN\nF 1 \"0\" V 1450 7500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1380 7500 30 0001 C CNN\nF 3 \"\" H 1450 7500 30 0000 C CNN\n\t1 1450 7500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0294\nU 1 1 58554212\nP 1200 7650\nF 0 \"#PWR0294\" H 1200 7400 50 0001 C CNN\nF 1 \"GND\" H 1200 7500 50 0000 C CNN\nF 2 \"\" H 1200 7650 60 0000 C CNN\nF 3 \"\" H 1200 7650 60 0000 C CNN\n\t1 1200 7650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0295\nU 1 1 585543AD\nP 1450 7650\nF 0 \"#PWR0295\" H 1450 7400 50 0001 C CNN\nF 1 \"GND\" H 1450 7500 50 0000 C CNN\nF 2 \"\" H 1450 7650 60 0000 C CNN\nF 3 \"\" H 1450 7650 60 0000 C CNN\n\t1 1450 7650\n\t1 0 0 -1 \n$EndComp\nText Label 1450 6950 0 60 ~ 0\n3V3D\nText Label 1200 6950 0 60 ~ 0\n3V3D\nWire Wire Line\n\t1200 7250 1200 7350\nWire Wire Line\n\t1450 7250 1450 7350\n$Comp\nL R R110\nU 1 1 5855502E\nP 750 7800\nF 0 \"R110\" V 830 7800 50 0000 C CNN\nF 1 \"DNP\" V 750 7800 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 680 7800 30 0001 C CNN\nF 3 \"\" H 750 7800 30 0000 C CNN\n\t1 750 7800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0296\nU 1 1 58555513\nP 750 7950\nF 0 \"#PWR0296\" H 750 7700 50 0001 C CNN\nF 1 \"GND\" H 750 7800 50 0000 C CNN\nF 2 \"\" H 750 7950 60 0000 C CNN\nF 3 \"\" H 750 7950 60 0000 C CNN\n\t1 750 7950\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t750 7450 750 7650\nText Label 750 6850 0 60 ~ 0\n3V3D\n$Comp\nL CONN_01X01 P10\nU 1 1 58555ED5\nP 1000 6050\nF 0 \"P10\" H 1000 6150 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1100 6050 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1000 6050 60 0001 C CNN\nF 3 \"\" H 1000 6050 60 0000 C CNN\n\t1 1000 6050\n\t-1 0 0 1 \n$EndComp\nWire Wire Line\n\t1200 6050 1800 6050\nText Label 1650 5450 2 60 ~ 0\nM0\nWire Wire Line\n\t1650 5450 1800 5450\nText Label 1650 5550 2 60 ~ 0\nM1\nText Label 1650 5650 2 60 ~ 0\nM2\nWire Wire Line\n\t1800 5550 1650 5550\nWire Wire Line\n\t1650 5650 1800 5650\nText Notes 1850 7700 0 60 ~ 0\nMode M[2:0]\\nMaster serial 000\\nMaster SPI 001\\nMaster BPI 010\\nMaster SelectMap 100\\nJTAG 101\\nSlave SelectMap 110\\nSlave serial 111\nText Label 750 7550 2 60 ~ 0\nM0\nText Label 1200 7300 2 60 ~ 0\nM1\nText Label 1450 7300 2 60 ~ 0\nM2\nText Label 1650 5750 2 60 ~ 0\nPROGRAM_B\nWire Wire Line\n\t1800 5750 1650 5750\n$Comp\nL SW_PUSH SW2\nU 1 1 5855D765\nP 1100 9050\nF 0 \"SW2\" H 1250 9160 50 0000 C CNN\nF 1 \"SW_PUSH\" H 1100 8970 50 0000 C CNN\nF 2 \"VNA:EVP-AWBA2A\" H 1100 9050 60 0001 C CNN\nF 3 \"\" H 1100 9050 60 0000 C CNN\n\t1 1100 9050\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R112\nU 1 1 5855D76B\nP 1100 8400\nF 0 \"R112\" V 1180 8400 50 0000 C CNN\nF 1 \"4.7k\" V 1100 8400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1030 8400 30 0001 C CNN\nF 3 \"\" H 1100 8400 30 0000 C CNN\n\t1 1100 8400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0297\nU 1 1 5855D771\nP 1100 9450\nF 0 \"#PWR0297\" H 1100 9200 50 0001 C CNN\nF 1 \"GND\" H 1100 9300 50 0000 C CNN\nF 2 \"\" H 1100 9450 60 0000 C CNN\nF 3 \"\" H 1100 9450 60 0000 C CNN\n\t1 1100 9450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1100 8550 1100 8750\nText Label 1100 8150 0 60 ~ 0\n3V3D\nText Label 1100 8650 2 60 ~ 0\nPROGRAM_B\nWire Wire Line\n\t1100 8150 1100 8250\nWire Wire Line\n\t1100 9350 1100 9450\nText Label 1650 5850 2 60 ~ 0\nINIT_B\nWire Wire Line\n\t1650 5850 1800 5850\n$Comp\nL R R117\nU 1 1 58563673\nP 1600 8100\nF 0 \"R117\" V 1680 8100 50 0000 C CNN\nF 1 \"4.7k\" V 1600 8100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1530 8100 30 0001 C CNN\nF 3 \"\" H 1600 8100 30 0000 C CNN\n\t1 1600 8100\n\t1 0 0 -1 \n$EndComp\nText Label 1600 7950 0 60 ~ 0\n3V3D\nText Label 1600 8350 0 60 ~ 0\nINIT_B\nWire Wire Line\n\t1600 8250 1600 8350\n$Comp\nL R R111\nU 1 1 58556863\nP 950 5550\nF 0 \"R111\" V 1030 5550 50 0000 C CNN\nF 1 \"1k\" V 950 5550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 880 5550 30 0001 C CNN\nF 3 \"\" H 950 5550 30 0000 C CNN\n\t1 950 5550\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t950 5700 950 5950\nConnection ~ 950 5950\nText Label 950 5400 0 60 ~ 0\n3V3D\n$Comp\nL GND #PWR0298\nU 1 1 58557FA1\nP 3150 7750\nF 0 \"#PWR0298\" H 3150 7500 50 0001 C CNN\nF 1 \"GND\" H 3150 7600 50 0000 C CNN\nF 2 \"\" H 3150 7750 60 0000 C CNN\nF 3 \"\" H 3150 7750 60 0000 C CNN\n\t1 3150 7750\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3150 7700 3150 7750\n$Comp\nL W25Q32JV U40\nU 1 1 5856F3E8\nP 12100 9400\nF 0 \"U40\" H 12100 9400 60 0000 C CNN\nF 1 \"W25Q32JV\" H 12400 9750 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:DFN-S-8-1EP_6x5mm_Pitch1.27mm\" H 12100 9400 60 0001 C CNN\nF 3 \"\" H 12100 9400 60 0001 C CNN\n\t1 12100 9400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C252\nU 1 1 5856F6DD\nP 13100 8900\nF 0 \"C252\" H 13125 9000 50 0000 L CNN\nF 1 \"100n\" H 13125 8800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 13138 8750 30 0001 C CNN\nF 3 \"\" H 13100 8900 60 0000 C CNN\n\t1 13100 8900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0299\nU 1 1 5856F868\nP 13100 9050\nF 0 \"#PWR0299\" H 13100 8800 50 0001 C CNN\nF 1 \"GND\" H 13100 8900 50 0000 C CNN\nF 2 \"\" H 13100 9050 60 0000 C CNN\nF 3 \"\" H 13100 9050 60 0000 C CNN\n\t1 13100 9050\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t13100 8750 12850 8750\nWire Wire Line\n\t12850 8750 12850 9250\nText Label 12850 8750 0 60 ~ 0\n3V3D\nText Label 13000 9450 0 60 ~ 0\nCCLK\nWire Wire Line\n\t13000 9450 12850 9450\n$Comp\nL GND #PWR0300\nU 1 1 58572942\nP 11350 9700\nF 0 \"#PWR0300\" H 11350 9450 50 0001 C CNN\nF 1 \"GND\" H 11350 9550 50 0000 C CNN\nF 2 \"\" H 11350 9700 60 0000 C CNN\nF 3 \"\" H 11350 9700 60 0000 C CNN\n\t1 11350 9700\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t11400 9550 11350 9550\nWire Wire Line\n\t11350 9550 11350 9700\nText Label 1650 6050 2 60 ~ 0\nCCLK\nWire Wire Line\n\t12500 1150 13200 1150\nWire Wire Line\n\t12700 1250 13200 1250\nText Label 13100 1150 2 60 ~ 0\nSPI_MOSI\nText Label 13100 1250 2 60 ~ 0\nSPI_DIN\nWire Wire Line\n\t13200 1750 13100 1750\nText Label 13100 1750 2 60 ~ 0\nSPI_CS\n$Comp\nL R R118\nU 1 1 5857A8B8\nP 11250 9050\nF 0 \"R118\" V 11330 9050 50 0000 C CNN\nF 1 \"4.7k\" V 11250 9050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 11180 9050 30 0001 C CNN\nF 3 \"\" H 11250 9050 30 0000 C CNN\n\t1 11250 9050\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t11150 9250 11400 9250\nWire Wire Line\n\t11250 9250 11250 9200\nText Label 11250 8900 0 60 ~ 0\n3V3D\nConnection ~ 11250 9250\nText Label 11150 9250 2 60 ~ 0\nSPI_CS\nWire Wire Line\n\t11400 9350 11300 9350\nText Label 11300 9350 2 60 ~ 0\nSPI_DIN\nText Label 13000 9550 0 60 ~ 0\nSPI_MOSI\nWire Wire Line\n\t13000 9550 12850 9550\nText Label 13000 9350 0 60 ~ 0\n3V3D\nWire Wire Line\n\t13000 9350 12850 9350\nText Label 11250 9450 2 60 ~ 0\n3V3D\nWire Wire Line\n\t11250 9450 11400 9450\n$Comp\nL CONN_01X01 P11\nU 1 1 58586E89\nP 12300 1150\nF 0 \"P11\" H 12300 1250 50 0000 C CNN\nF 1 \"CONN_01X01\" V 12400 1150 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 12300 1150 60 0001 C CNN\nF 3 \"\" H 12300 1150 60 0000 C CNN\n\t1 12300 1150\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P12\nU 1 1 58587941\nP 12500 1250\nF 0 \"P12\" H 12500 1350 50 0000 C CNN\nF 1 \"CONN_01X01\" V 12600 1250 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 12500 1250 60 0001 C CNN\nF 3 \"\" H 12500 1250 60 0000 C CNN\n\t1 12500 1250\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR0301\nU 1 1 5856EB43\nP 12100 9850\nF 0 \"#PWR0301\" H 12100 9600 50 0001 C CNN\nF 1 \"GND\" H 12100 9700 50 0000 C CNN\nF 2 \"\" H 12100 9850 60 0000 C CNN\nF 3 \"\" H 12100 9850 60 0000 C CNN\n\t1 12100 9850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P15\nU 1 1 585708F8\nP 1300 6250\nF 0 \"P15\" H 1300 6350 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1400 6250 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1300 6250 60 0001 C CNN\nF 3 \"\" H 1300 6250 60 0000 C CNN\n\t1 1300 6250\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P13\nU 1 1 58570DB4\nP 1050 6350\nF 0 \"P13\" H 1050 6450 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1150 6350 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1050 6350 60 0001 C CNN\nF 3 \"\" H 1050 6350 60 0000 C CNN\n\t1 1050 6350\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P16\nU 1 1 58571070\nP 1300 6450\nF 0 \"P16\" H 1300 6550 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1400 6450 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1300 6450 60 0001 C CNN\nF 3 \"\" H 1300 6450 60 0000 C CNN\n\t1 1300 6450\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P14\nU 1 1 58571241\nP 1050 6550\nF 0 \"P14\" H 1050 6650 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1150 6550 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1050 6550 60 0001 C CNN\nF 3 \"\" H 1050 6550 60 0000 C CNN\n\t1 1050 6550\n\t-1 0 0 1 \n$EndComp\nText HLabel 1200 850 0 60 Input ~ 0\n5V\nWire Wire Line\n\t1700 10600 1650 10600\nWire Wire Line\n\t1700 10500 1650 10500\nWire Wire Line\n\t1700 10300 1650 10300\nText Label 1650 10400 2 60 ~ 0\nOF\nWire Wire Line\n\t1700 10400 1650 10400\nWire Wire Line\n\t13100 5750 13200 5750\nText Label 1150 3950 2 60 ~ 0\nADC_SHDN\nText Label 13100 5750 2 60 ~ 0\nADC_OE\nWire Wire Line\n\t13100 5850 13200 5850\nNoConn ~ 4850 2550\nNoConn ~ 4850 2650\nNoConn ~ 4850 2750\nNoConn ~ 4850 2850\nNoConn ~ 4850 2950\nNoConn ~ 4850 3250\nNoConn ~ 4850 3350\nNoConn ~ 4850 3450\nNoConn ~ 4850 3550\nNoConn ~ 4850 3650\nNoConn ~ 4850 3750\nNoConn ~ 4850 3850\nNoConn ~ 4850 4050\nNoConn ~ 4850 4150\nNoConn ~ 4850 4250\nNoConn ~ 4850 4350\nNoConn ~ 4850 4850\nNoConn ~ 4850 4950\nNoConn ~ 4850 5050\nNoConn ~ 4850 5350\nNoConn ~ 4850 5450\nNoConn ~ 4850 5550\nNoConn ~ 4850 5650\nNoConn ~ 4850 5750\nNoConn ~ 4850 5950\nNoConn ~ 9050 1500\nNoConn ~ 9050 1600\nNoConn ~ 9050 1700\nNoConn ~ 9050 1900\nNoConn ~ 9050 2000\nNoConn ~ 9050 2100\nNoConn ~ 9050 2200\nNoConn ~ 9050 2300\nNoConn ~ 9050 2400\nNoConn ~ 9050 2500\nNoConn ~ 9050 2600\nNoConn ~ 9050 2700\nNoConn ~ 9050 2900\nNoConn ~ 9050 3000\nNoConn ~ 9050 3100\nNoConn ~ 9050 3200\nNoConn ~ 9050 3400\nNoConn ~ 9050 3500\nNoConn ~ 9050 3600\nNoConn ~ 9050 3700\nNoConn ~ 9050 3800\nNoConn ~ 9050 3900\nNoConn ~ 9050 4000\nNoConn ~ 9050 4100\nNoConn ~ 9050 4400\nNoConn ~ 9050 4500\nNoConn ~ 9050 4800\nNoConn ~ 9050 4900\nNoConn ~ 9050 5000\nNoConn ~ 9050 5200\nNoConn ~ 9050 5300\nNoConn ~ 9050 5400\nNoConn ~ 9050 5700\nNoConn ~ 9050 5800\nNoConn ~ 9050 5900\nNoConn ~ 13200 1350\nNoConn ~ 13200 1450\nNoConn ~ 13200 1850\nNoConn ~ 13200 1950\nNoConn ~ 13200 2150\nNoConn ~ 13200 2250\nNoConn ~ 13200 2450\nNoConn ~ 13200 2550\nNoConn ~ 13200 2650\nNoConn ~ 13200 2750\nNoConn ~ 13200 2950\nNoConn ~ 13200 3050\nNoConn ~ 13200 3250\nNoConn ~ 13200 3350\nNoConn ~ 13200 3650\nNoConn ~ 13200 3750\nNoConn ~ 13200 3850\nNoConn ~ 13200 3950\nNoConn ~ 13200 4050\nNoConn ~ 13200 4650\nNoConn ~ 13200 4750\nNoConn ~ 13200 4850\nNoConn ~ 13200 4950\nNoConn ~ 13200 5050\nNoConn ~ 1700 8700\nNoConn ~ 1700 8800\nNoConn ~ 1700 8900\nNoConn ~ 1700 9000\nNoConn ~ 1700 9100\nNoConn ~ 1700 9200\nNoConn ~ 1700 9300\nNoConn ~ 1700 9400\nNoConn ~ 1700 9500\nNoConn ~ 1700 9600\nNoConn ~ 1700 9800\nNoConn ~ 1700 9900\nNoConn ~ 1700 10000\nNoConn ~ 1700 10200\nWire Wire Line\n\t4850 3150 4750 3150\nNoConn ~ 4850 5250\nNoConn ~ 4850 2250\nNoConn ~ 4850 3050\n$Comp\nL R R130\nU 1 1 5871D6FA\nP 12950 3150\nF 0 \"R130\" V 13030 3150 50 0000 C CNN\nF 1 \"16\" V 12950 3150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 12880 3150 30 0001 C CNN\nF 3 \"\" H 12950 3150 30 0000 C CNN\n\t1 12950 3150\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t12800 3150 12700 3150\n$Comp\nL CONN_01X01 P26\nU 1 1 5873B952\nP 1450 9700\nF 0 \"P26\" H 1450 9800 50 0000 C CNN\nF 1 \"TP\" V 1550 9700 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1450 9700 60 0001 C CNN\nF 3 \"\" H 1450 9700 60 0000 C CNN\n\t1 1450 9700\n\t-1 0 0 1 \n$EndComp\nWire Wire Line\n\t1700 9700 1650 9700\n$Comp\nL CONN_01X01 P27\nU 1 1 5873CE94\nP 1500 10100\nF 0 \"P27\" H 1500 10200 50 0000 C CNN\nF 1 \"TP\" V 1600 10100 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1500 10100 60 0001 C CNN\nF 3 \"\" H 1500 10100 60 0000 C CNN\n\t1 1500 10100\n\t-1 0 0 1 \n$EndComp\nText Notes 1650 900 0 60 ~ 0\n30 mA\nText Notes 1650 800 0 60 ~ 0\n1 mA\nText Notes 1700 3000 0 60 ~ 0\n1 mA\n$Comp\nL XC7A15T-1FTG256C U30\nU 2 1 583D932B\nP 9850 3150\nF 0 \"U30\" H 10400 100 50 0000 C CNN\nF 1 \"XC7A15T-1FTG256C\" H 10150 5400 50 0000 C CNN\nF 2 \"VNA:FTG256\" H 9900 -50 50 0001 C CNN\nF 3 \"DOCUMENTATION\" H 9900 -50 50 0001 C CNN\n\t2 9850 3150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P28\nU 1 1 58857E4D\nP 8850 3300\nF 0 \"P28\" H 8850 3400 50 0000 C CNN\nF 1 \"CONN_01X01\" V 8950 3300 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 8850 3300 60 0001 C CNN\nF 3 \"\" H 8850 3300 60 0000 C CNN\n\t1 8850 3300\n\t-1 0 0 1 \n$EndComp\n$EndSCHEMATC\n" }, { "path": "hw/fpga_power.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 10 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\nText HLabel 7800 2900 2 60 Output ~ 0\n1V0\n$Comp\nL C C232\nU 1 1 5851B1C3\nP 2750 3050\nF 0 \"C232\" H 2775 3150 50 0000 L CNN\nF 1 \"10u\" H 2775 2950 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2788 2900 30 0001 C CNN\nF 3 \"\" H 2750 3050 60 0000 C CNN\n\t1 2750 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C240\nU 1 1 5851B1CA\nP 6400 3200\nF 0 \"C240\" H 6515 3250 50 0000 L CNN\nF 1 \"10u\" H 6515 3150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6438 3050 30 0001 C CNN\nF 3 \"\" H 6400 3200 60 0000 C CNN\n\t1 6400 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C243\nU 1 1 5851B1D1\nP 6900 3200\nF 0 \"C243\" H 7015 3250 50 0000 L CNN\nF 1 \"10u\" H 7015 3150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6938 3050 30 0001 C CNN\nF 3 \"\" H 6900 3200 60 0000 C CNN\n\t1 6900 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0219\nU 1 1 5851B1D8\nP 6400 3350\nF 0 \"#PWR0219\" H 6400 3100 50 0001 C CNN\nF 1 \"GND\" H 6400 3200 50 0000 C CNN\nF 2 \"\" H 6400 3350 60 0000 C CNN\nF 3 \"\" H 6400 3350 60 0000 C CNN\n\t1 6400 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0220\nU 1 1 5851B1DE\nP 6900 3350\nF 0 \"#PWR0220\" H 6900 3100 50 0001 C CNN\nF 1 \"GND\" H 6900 3200 50 0000 C CNN\nF 2 \"\" H 6900 3350 60 0000 C CNN\nF 3 \"\" H 6900 3350 60 0000 C CNN\n\t1 6900 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0221\nU 1 1 5851B1E4\nP 2750 3200\nF 0 \"#PWR0221\" H 2750 2950 50 0001 C CNN\nF 1 \"GND\" H 2750 3050 50 0000 C CNN\nF 2 \"\" H 2750 3200 60 0000 C CNN\nF 3 \"\" H 2750 3200 60 0000 C CNN\n\t1 2750 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C244\nU 1 1 5851B1EB\nP 7350 3250\nF 0 \"C244\" H 7375 3350 50 0000 L CNN\nF 1 \"10u\" H 7375 3150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7388 3100 30 0001 C CNN\nF 3 \"\" H 7350 3250 60 0000 C CNN\n\t1 7350 3250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C246\nU 1 1 5851B1F2\nP 7750 3250\nF 0 \"C246\" H 7775 3350 50 0000 L CNN\nF 1 \"10u\" H 7775 3150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7788 3100 30 0001 C CNN\nF 3 \"\" H 7750 3250 60 0000 C CNN\n\t1 7750 3250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0222\nU 1 1 5851B1F9\nP 7350 3400\nF 0 \"#PWR0222\" H 7350 3150 50 0001 C CNN\nF 1 \"GND\" H 7350 3250 50 0000 C CNN\nF 2 \"\" H 7350 3400 60 0000 C CNN\nF 3 \"\" H 7350 3400 60 0000 C CNN\n\t1 7350 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0223\nU 1 1 5851B1FF\nP 7750 3400\nF 0 \"#PWR0223\" H 7750 3150 50 0001 C CNN\nF 1 \"GND\" H 7750 3250 50 0000 C CNN\nF 2 \"\" H 7750 3400 60 0000 C CNN\nF 3 \"\" H 7750 3400 60 0000 C CNN\n\t1 7750 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C234\nU 1 1 5851B205\nP 3350 4000\nF 0 \"C234\" H 3375 4100 50 0000 L CNN\nF 1 \"10n\" H 3375 3900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3388 3850 30 0001 C CNN\nF 3 \"\" H 3350 4000 60 0000 C CNN\n\t1 3350 4000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C236\nU 1 1 5851B20C\nP 3650 3650\nF 0 \"C236\" H 3765 3700 50 0000 L CNN\nF 1 \"36p\" H 3765 3600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3688 3500 30 0001 C CNN\nF 3 \"\" H 3650 3650 60 0000 C CNN\n\t1 3650 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R99\nU 1 1 5851B213\nP 3350 3650\nF 0 \"R99\" V 3430 3650 50 0000 C CNN\nF 1 \"15k\" V 3350 3650 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3280 3650 30 0001 C CNN\nF 3 \"\" H 3350 3650 30 0000 C CNN\n\t1 3350 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C238\nU 1 1 5851B21A\nP 5850 3400\nF 0 \"C238\" H 5875 3500 50 0000 L CNN\nF 1 \"16n\" H 5875 3300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5888 3250 30 0001 C CNN\nF 3 \"\" H 5850 3400 60 0000 C CNN\n\t1 5850 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R105\nU 1 1 5851B221\nP 5850 3050\nF 0 \"R105\" H 5920 3100 50 0000 L CNN\nF 1 \"33\" H 5920 3000 50 0000 L CNN\nF 2 \"VNA:R_0402b\" V 5780 3050 30 0001 C CNN\nF 3 \"\" H 5850 3050 30 0000 C CNN\n\t1 5850 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0224\nU 1 1 5851B228\nP 3150 3700\nF 0 \"#PWR0224\" H 3150 3450 50 0001 C CNN\nF 1 \"GND\" H 3150 3550 50 0000 C CNN\nF 2 \"\" H 3150 3700 60 0000 C CNN\nF 3 \"\" H 3150 3700 60 0000 C CNN\n\t1 3150 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0225\nU 1 1 5851B22E\nP 4200 3650\nF 0 \"#PWR0225\" H 4200 3400 50 0001 C CNN\nF 1 \"GND\" H 4200 3500 50 0000 C CNN\nF 2 \"\" H 4200 3650 60 0000 C CNN\nF 3 \"\" H 4200 3650 60 0000 C CNN\n\t1 4200 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0226\nU 1 1 5851B234\nP 4100 3650\nF 0 \"#PWR0226\" H 4100 3400 50 0001 C CNN\nF 1 \"GND\" H 4100 3500 50 0000 C CNN\nF 2 \"\" H 4100 3650 60 0000 C CNN\nF 3 \"\" H 4100 3650 60 0000 C CNN\n\t1 4100 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0227\nU 1 1 5851B23A\nP 5650 3950\nF 0 \"#PWR0227\" H 5650 3700 50 0001 C CNN\nF 1 \"GND\" H 5650 3800 50 0000 C CNN\nF 2 \"\" H 5650 3950 60 0000 C CNN\nF 3 \"\" H 5650 3950 60 0000 C CNN\n\t1 5650 3950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R102\nU 1 1 5851B240\nP 5650 3750\nF 0 \"R102\" V 5730 3750 50 0000 C CNN\nF 1 \"7.5k\" V 5650 3750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5580 3750 30 0001 C CNN\nF 3 \"\" H 5650 3750 30 0000 C CNN\n\t1 5650 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R101\nU 1 1 5851B247\nP 5650 3200\nF 0 \"R101\" V 5730 3200 50 0000 C CNN\nF 1 \"4.99k\" V 5650 3200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5580 3200 30 0001 C CNN\nF 3 \"\" H 5650 3200 30 0000 C CNN\n\t1 5650 3200\n\t1 0 0 -1 \n$EndComp\nText Label 4700 3050 0 60 ~ 0\nSYNC_1V0\n$Comp\nL R R96\nU 1 1 5851B24F\nP 3150 3500\nF 0 \"R96\" V 3230 3500 50 0000 C CNN\nF 1 \"68k\" V 3150 3500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3080 3500 30 0001 C CNN\nF 3 \"\" H 3150 3500 30 0000 C CNN\n\t1 3150 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L9\nU 1 1 5851B256\nP 5200 2900\nF 0 \"L9\" H 5200 3103 50 0000 C CNN\nF 1 \"33u (SRR6040A-330M)\" H 5200 3003 50 0000 C CNN\nF 2 \"VNA:SRR6040A\" H 5200 2900 60 0001 C CNN\nF 3 \"\" H 5200 2900 60 0000 C CNN\n\t1 5200 2900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0228\nU 1 1 5851B25D\nP 4900 3750\nF 0 \"#PWR0228\" H 4900 3500 50 0001 C CNN\nF 1 \"GND\" H 4900 3600 50 0000 C CNN\nF 2 \"\" H 4900 3750 60 0000 C CNN\nF 3 \"\" H 4900 3750 60 0000 C CNN\n\t1 4900 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL D_Schottky D1\nU 1 1 5851B263\nP 4900 3550\nF 0 \"D1\" H 4900 3650 50 0000 C CNN\nF 1 \"SS13FL\" H 4900 3450 50 0000 C CNN\nF 2 \"VNA:SOD-123F\" H 4900 3550 60 0001 C CNN\nF 3 \"\" H 4900 3550 60 0000 C CNN\n\t1 4900 3550\n\t0 1 1 0 \n$EndComp\n$Comp\nL L7981 U37\nU 1 1 5851B26A\nP 4100 3100\nF 0 \"U37\" H 4400 2750 60 0000 C CNN\nF 1 \"L7980\" H 4300 3400 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm\" H 3900 2450 60 0001 C CNN\nF 3 \"\" H 3900 2450 60 0000 C CNN\n\t1 4100 3100\n\t1 0 0 -1 \n$EndComp\nText HLabel 7900 5650 2 60 Output ~ 0\n1V8\n$Comp\nL C C233\nU 1 1 5851BD16\nP 2850 5800\nF 0 \"C233\" H 2875 5900 50 0000 L CNN\nF 1 \"10u\" H 2875 5700 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2888 5650 30 0001 C CNN\nF 3 \"\" H 2850 5800 60 0000 C CNN\n\t1 2850 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C241\nU 1 1 5851BD1D\nP 6500 5950\nF 0 \"C241\" H 6615 6000 50 0000 L CNN\nF 1 \"10u\" H 6615 5900 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6538 5800 30 0001 C CNN\nF 3 \"\" H 6500 5950 60 0000 C CNN\n\t1 6500 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C242\nU 1 1 5851BD24\nP 6750 5950\nF 0 \"C242\" H 6865 6000 50 0000 L CNN\nF 1 \"10u\" H 6865 5900 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6788 5800 30 0001 C CNN\nF 3 \"\" H 6750 5950 60 0000 C CNN\n\t1 6750 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0229\nU 1 1 5851BD2B\nP 6500 6100\nF 0 \"#PWR0229\" H 6500 5850 50 0001 C CNN\nF 1 \"GND\" H 6500 5950 50 0000 C CNN\nF 2 \"\" H 6500 6100 60 0000 C CNN\nF 3 \"\" H 6500 6100 60 0000 C CNN\n\t1 6500 6100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0230\nU 1 1 5851BD31\nP 6750 6100\nF 0 \"#PWR0230\" H 6750 5850 50 0001 C CNN\nF 1 \"GND\" H 6750 5950 50 0000 C CNN\nF 2 \"\" H 6750 6100 60 0000 C CNN\nF 3 \"\" H 6750 6100 60 0000 C CNN\n\t1 6750 6100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0231\nU 1 1 5851BD37\nP 2850 5950\nF 0 \"#PWR0231\" H 2850 5700 50 0001 C CNN\nF 1 \"GND\" H 2850 5800 50 0000 C CNN\nF 2 \"\" H 2850 5950 60 0000 C CNN\nF 3 \"\" H 2850 5950 60 0000 C CNN\n\t1 2850 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C245\nU 1 1 5851BD3E\nP 7600 6000\nF 0 \"C245\" H 7625 6100 50 0000 L CNN\nF 1 \"10u\" H 7625 5900 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7638 5850 30 0001 C CNN\nF 3 \"\" H 7600 6000 60 0000 C CNN\n\t1 7600 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C247\nU 1 1 5851BD45\nP 7850 6000\nF 0 \"C247\" H 7875 6100 50 0000 L CNN\nF 1 \"10u\" H 7875 5900 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 7888 5850 30 0001 C CNN\nF 3 \"\" H 7850 6000 60 0000 C CNN\n\t1 7850 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0232\nU 1 1 5851BD4C\nP 7600 6150\nF 0 \"#PWR0232\" H 7600 5900 50 0001 C CNN\nF 1 \"GND\" H 7600 6000 50 0000 C CNN\nF 2 \"\" H 7600 6150 60 0000 C CNN\nF 3 \"\" H 7600 6150 60 0000 C CNN\n\t1 7600 6150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0233\nU 1 1 5851BD52\nP 7850 6150\nF 0 \"#PWR0233\" H 7850 5900 50 0001 C CNN\nF 1 \"GND\" H 7850 6000 50 0000 C CNN\nF 2 \"\" H 7850 6150 60 0000 C CNN\nF 3 \"\" H 7850 6150 60 0000 C CNN\n\t1 7850 6150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C235\nU 1 1 5851BD58\nP 3450 6750\nF 0 \"C235\" H 3475 6850 50 0000 L CNN\nF 1 \"10n\" H 3475 6650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3488 6600 30 0001 C CNN\nF 3 \"\" H 3450 6750 60 0000 C CNN\n\t1 3450 6750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C237\nU 1 1 5851BD5F\nP 3750 6400\nF 0 \"C237\" H 3865 6450 50 0000 L CNN\nF 1 \"33p\" H 3865 6350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3788 6250 30 0001 C CNN\nF 3 \"\" H 3750 6400 60 0000 C CNN\n\t1 3750 6400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R100\nU 1 1 5851BD66\nP 3450 6400\nF 0 \"R100\" V 3530 6400 50 0000 C CNN\nF 1 \"16k\" V 3450 6400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3380 6400 30 0001 C CNN\nF 3 \"\" H 3450 6400 30 0000 C CNN\n\t1 3450 6400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C239\nU 1 1 5851BD6D\nP 5950 6150\nF 0 \"C239\" H 5975 6250 50 0000 L CNN\nF 1 \"18n\" H 5975 6050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5988 6000 30 0001 C CNN\nF 3 \"\" H 5950 6150 60 0000 C CNN\n\t1 5950 6150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R106\nU 1 1 5851BD74\nP 5950 5800\nF 0 \"R106\" H 6020 5850 50 0000 L CNN\nF 1 \"33\" H 6020 5750 50 0000 L CNN\nF 2 \"VNA:R_0402b\" V 5880 5800 30 0001 C CNN\nF 3 \"\" H 5950 5800 30 0000 C CNN\n\t1 5950 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0234\nU 1 1 5851BD7B\nP 3250 6450\nF 0 \"#PWR0234\" H 3250 6200 50 0001 C CNN\nF 1 \"GND\" H 3250 6300 50 0000 C CNN\nF 2 \"\" H 3250 6450 60 0000 C CNN\nF 3 \"\" H 3250 6450 60 0000 C CNN\n\t1 3250 6450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0235\nU 1 1 5851BD81\nP 4300 6400\nF 0 \"#PWR0235\" H 4300 6150 50 0001 C CNN\nF 1 \"GND\" H 4300 6250 50 0000 C CNN\nF 2 \"\" H 4300 6400 60 0000 C CNN\nF 3 \"\" H 4300 6400 60 0000 C CNN\n\t1 4300 6400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0236\nU 1 1 5851BD87\nP 4200 6400\nF 0 \"#PWR0236\" H 4200 6150 50 0001 C CNN\nF 1 \"GND\" H 4200 6250 50 0000 C CNN\nF 2 \"\" H 4200 6400 60 0000 C CNN\nF 3 \"\" H 4200 6400 60 0000 C CNN\n\t1 4200 6400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0237\nU 1 1 5851BD8D\nP 5750 6700\nF 0 \"#PWR0237\" H 5750 6450 50 0001 C CNN\nF 1 \"GND\" H 5750 6550 50 0000 C CNN\nF 2 \"\" H 5750 6700 60 0000 C CNN\nF 3 \"\" H 5750 6700 60 0000 C CNN\n\t1 5750 6700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R104\nU 1 1 5851BD93\nP 5750 6500\nF 0 \"R104\" V 5830 6500 50 0000 C CNN\nF 1 \"2.5k\" V 5750 6500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5680 6500 30 0001 C CNN\nF 3 \"\" H 5750 6500 30 0000 C CNN\n\t1 5750 6500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R103\nU 1 1 5851BD9A\nP 5750 5950\nF 0 \"R103\" V 5830 5950 50 0000 C CNN\nF 1 \"4.99k\" V 5750 5950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5680 5950 30 0001 C CNN\nF 3 \"\" H 5750 5950 30 0000 C CNN\n\t1 5750 5950\n\t1 0 0 -1 \n$EndComp\nText Label 4800 5800 0 60 ~ 0\nSYNC_1V8\n$Comp\nL R R98\nU 1 1 5851BDA2\nP 3250 6250\nF 0 \"R98\" V 3330 6250 50 0000 C CNN\nF 1 \"68k\" V 3250 6250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3180 6250 30 0001 C CNN\nF 3 \"\" H 3250 6250 30 0000 C CNN\n\t1 3250 6250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L10\nU 1 1 5851BDA9\nP 5300 5650\nF 0 \"L10\" H 5300 5853 50 0000 C CNN\nF 1 \"33u (SRR6040A-330M)\" H 5300 5753 50 0000 C CNN\nF 2 \"VNA:SRR6040A\" H 5300 5650 60 0001 C CNN\nF 3 \"\" H 5300 5650 60 0000 C CNN\n\t1 5300 5650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0238\nU 1 1 5851BDB0\nP 5000 6500\nF 0 \"#PWR0238\" H 5000 6250 50 0001 C CNN\nF 1 \"GND\" H 5000 6350 50 0000 C CNN\nF 2 \"\" H 5000 6500 60 0000 C CNN\nF 3 \"\" H 5000 6500 60 0000 C CNN\n\t1 5000 6500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL D_Schottky D4\nU 1 1 5851BDB6\nP 5000 6300\nF 0 \"D4\" H 5000 6400 50 0000 C CNN\nF 1 \"SS13FL\" H 5000 6200 50 0000 C CNN\nF 2 \"VNA:SOD-123F\" H 5000 6300 60 0001 C CNN\nF 3 \"\" H 5000 6300 60 0000 C CNN\n\t1 5000 6300\n\t0 1 1 0 \n$EndComp\n$Comp\nL L7981 U38\nU 1 1 5851BDBD\nP 4200 5850\nF 0 \"U38\" H 4500 5500 60 0000 C CNN\nF 1 \"L7980\" H 4400 6150 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm\" H 4000 5200 60 0001 C CNN\nF 3 \"\" H 4000 5200 60 0000 C CNN\n\t1 4200 5850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C231\nU 1 1 5851CF8E\nP 2400 3050\nF 0 \"C231\" H 2425 3150 50 0000 L CNN\nF 1 \"10u\" H 2425 2950 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2438 2900 30 0001 C CNN\nF 3 \"\" H 2400 3050 60 0000 C CNN\n\t1 2400 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C230\nU 1 1 5851D070\nP 2100 3050\nF 0 \"C230\" H 2125 3150 50 0000 L CNN\nF 1 \"10u\" H 2125 2950 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2138 2900 30 0001 C CNN\nF 3 \"\" H 2100 3050 60 0000 C CNN\n\t1 2100 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0239\nU 1 1 5851D1F7\nP 2400 3200\nF 0 \"#PWR0239\" H 2400 2950 50 0001 C CNN\nF 1 \"GND\" H 2400 3050 50 0000 C CNN\nF 2 \"\" H 2400 3200 60 0000 C CNN\nF 3 \"\" H 2400 3200 60 0000 C CNN\n\t1 2400 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0240\nU 1 1 5851D268\nP 2100 3200\nF 0 \"#PWR0240\" H 2100 2950 50 0001 C CNN\nF 1 \"GND\" H 2100 3050 50 0000 C CNN\nF 2 \"\" H 2100 3200 60 0000 C CNN\nF 3 \"\" H 2100 3200 60 0000 C CNN\n\t1 2100 3200\n\t1 0 0 -1 \n$EndComp\nText HLabel 1900 2900 0 60 Input ~ 0\n12V\nText HLabel 2750 5650 0 60 Input ~ 0\n12V\n$Comp\nL R R86\nU 1 1 58564FC4\nP 4050 4750\nF 0 \"R86\" V 4130 4750 50 0000 C CNN\nF 1 \"DNP\" V 4050 4750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3980 4750 30 0001 C CNN\nF 3 \"\" H 4050 4750 30 0000 C CNN\n\t1 4050 4750\n\t0 1 1 0 \n$EndComp\nText HLabel 3600 4750 0 60 UnSpc ~ 0\nSYNC\nText Label 5400 4750 2 60 ~ 0\nSYNC_1V0\n$Comp\nL R R87\nU 1 1 58565323\nP 5650 4750\nF 0 \"R87\" V 5730 4750 50 0000 C CNN\nF 1 \"0\" V 5650 4750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5580 4750 30 0001 C CNN\nF 3 \"\" H 5650 4750 30 0000 C CNN\n\t1 5650 4750\n\t0 1 1 0 \n$EndComp\nText Label 5900 4750 0 60 ~ 0\nSYNC_1V8\nText Label 4300 4750 0 60 ~ 0\nSYNC_1V0\nWire Wire Line\n\t1900 2900 3600 2900\nWire Wire Line\n\t3450 3000 3600 3000\nWire Wire Line\n\t4700 3050 4650 3050\nWire Wire Line\n\t4650 2900 4950 2900\nWire Wire Line\n\t4900 3700 4900 3750\nWire Wire Line\n\t4900 2900 4900 3400\nConnection ~ 4900 2900\nWire Wire Line\n\t5450 2900 7800 2900\nWire Wire Line\n\t5650 2900 5650 3050\nWire Wire Line\n\t5650 3350 5650 3600\nWire Wire Line\n\t5650 3950 5650 3900\nWire Wire Line\n\t6400 2900 6400 3050\nConnection ~ 5650 2900\nWire Wire Line\n\t6900 2900 6900 3050\nConnection ~ 6400 2900\nWire Wire Line\n\t4200 3600 4200 3650\nWire Wire Line\n\t4100 3650 4100 3600\nConnection ~ 2750 2900\nWire Wire Line\n\t3600 3150 3150 3150\nWire Wire Line\n\t3150 3150 3150 3350\nWire Wire Line\n\t3150 3650 3150 3700\nWire Wire Line\n\t5850 3200 5850 3250\nWire Wire Line\n\t5650 3550 5850 3550\nConnection ~ 5650 3550\nWire Wire Line\n\t4650 3250 5400 3250\nWire Wire Line\n\t5400 3250 5400 4200\nWire Wire Line\n\t5400 3450 5650 3450\nConnection ~ 5650 3450\nConnection ~ 5850 2900\nWire Wire Line\n\t3600 3250 3350 3250\nWire Wire Line\n\t3350 3250 3350 3500\nWire Wire Line\n\t3350 3450 3650 3450\nWire Wire Line\n\t3650 3450 3650 3500\nConnection ~ 3350 3450\nWire Wire Line\n\t3350 3800 3350 3850\nWire Wire Line\n\t3350 4150 3350 4200\nWire Wire Line\n\t3350 4200 5400 4200\nWire Wire Line\n\t3650 4200 3650 3800\nConnection ~ 5400 3450\nConnection ~ 3650 4200\nWire Wire Line\n\t7350 2900 7350 3100\nWire Wire Line\n\t7750 2900 7750 3100\nConnection ~ 7350 2900\nConnection ~ 6900 2900\nConnection ~ 7750 2900\nWire Wire Line\n\t2750 5650 3700 5650\nWire Wire Line\n\t4800 5800 4750 5800\nWire Wire Line\n\t4750 5650 5050 5650\nWire Wire Line\n\t5000 6450 5000 6500\nWire Wire Line\n\t5000 5650 5000 6150\nConnection ~ 5000 5650\nWire Wire Line\n\t5550 5650 7900 5650\nWire Wire Line\n\t5750 5650 5750 5800\nWire Wire Line\n\t5750 6100 5750 6350\nWire Wire Line\n\t5750 6700 5750 6650\nWire Wire Line\n\t6500 5650 6500 5800\nConnection ~ 5750 5650\nWire Wire Line\n\t6750 5650 6750 5800\nConnection ~ 6500 5650\nWire Wire Line\n\t4300 6350 4300 6400\nWire Wire Line\n\t4200 6400 4200 6350\nConnection ~ 2850 5650\nWire Wire Line\n\t3700 5900 3250 5900\nWire Wire Line\n\t3250 5900 3250 6100\nWire Wire Line\n\t3250 6400 3250 6450\nWire Wire Line\n\t5950 5950 5950 6000\nWire Wire Line\n\t5750 6300 5950 6300\nConnection ~ 5750 6300\nWire Wire Line\n\t4750 6000 5500 6000\nWire Wire Line\n\t5500 6000 5500 6950\nWire Wire Line\n\t5500 6200 5750 6200\nConnection ~ 5750 6200\nConnection ~ 5950 5650\nWire Wire Line\n\t3700 6000 3450 6000\nWire Wire Line\n\t3450 6000 3450 6250\nWire Wire Line\n\t3450 6200 3750 6200\nWire Wire Line\n\t3750 6200 3750 6250\nConnection ~ 3450 6200\nWire Wire Line\n\t3450 6550 3450 6600\nWire Wire Line\n\t3450 6900 3450 6950\nWire Wire Line\n\t3450 6950 5500 6950\nWire Wire Line\n\t3750 6950 3750 6550\nConnection ~ 5500 6200\nConnection ~ 3750 6950\nWire Wire Line\n\t7600 5650 7600 5850\nWire Wire Line\n\t7850 5650 7850 5850\nConnection ~ 7600 5650\nConnection ~ 6750 5650\nConnection ~ 7850 5650\nConnection ~ 2400 2900\nConnection ~ 2100 2900\nWire Wire Line\n\t3650 5750 3700 5750\nWire Wire Line\n\t3900 4750 3600 4750\nWire Wire Line\n\t5500 4750 5400 4750\nWire Wire Line\n\t5800 4750 5900 4750\nWire Wire Line\n\t4300 4750 4200 4750\nText HLabel 3450 3000 0 60 Input ~ 0\nEN_1V0\nText HLabel 3650 5750 0 60 Input ~ 0\nEN_1V8\n$EndSCHEMATC\n" }, { "path": "hw/if_amp.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 7 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL R R40\nU 1 1 583E9E39\nP 4550 3750\nF 0 \"R40\" V 4630 3750 50 0000 C CNN\nF 1 \"1k\" V 4550 3750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4480 3750 30 0001 C CNN\nF 3 \"\" H 4550 3750 30 0000 C CNN\n\t1 4550 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R41\nU 1 1 583E9E40\nP 4550 4050\nF 0 \"R41\" V 4630 4050 50 0000 C CNN\nF 1 \"1k\" V 4550 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4480 4050 30 0001 C CNN\nF 3 \"\" H 4550 4050 30 0000 C CNN\n\t1 4550 4050\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R44\nU 1 1 583E9E49\nP 5300 4400\nF 0 \"R44\" V 5380 4400 50 0000 C CNN\nF 1 \"3.3k\" V 5300 4400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5230 4400 30 0001 C CNN\nF 3 \"\" H 5300 4400 30 0000 C CNN\n\t1 5300 4400\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C146\nU 1 1 583E9E50\nP 5300 4650\nF 0 \"C146\" H 5325 4750 50 0000 L CNN\nF 1 \"18p\" H 5325 4550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5338 4500 30 0001 C CNN\nF 3 \"\" H 5300 4650 60 0000 C CNN\n\t1 5300 4650\n\t0 1 1 0 \n$EndComp\nText HLabel 9050 4050 2 60 Output ~ 0\nADC+\n$Comp\nL R R39\nU 1 1 583E9E58\nP 4500 3150\nF 0 \"R39\" V 4580 3150 50 0000 C CNN\nF 1 \"DNP\" V 4500 3150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4430 3150 30 0001 C CNN\nF 3 \"\" H 4500 3150 30 0000 C CNN\n\t1 4500 3150\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C138\nU 1 1 583E9E5F\nP 4050 3150\nF 0 \"C138\" H 4075 3250 50 0000 L CNN\nF 1 \"DNP\" H 4075 3050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4088 3000 30 0001 C CNN\nF 3 \"\" H 4050 3150 60 0000 C CNN\n\t1 4050 3150\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R45\nU 1 1 583E9E66\nP 8450 3750\nF 0 \"R45\" V 8530 3750 50 0000 C CNN\nF 1 \"50\" V 8450 3750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8380 3750 30 0001 C CNN\nF 3 \"\" H 8450 3750 30 0000 C CNN\n\t1 8450 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R46\nU 1 1 583E9E6D\nP 8450 4050\nF 0 \"R46\" V 8530 4050 50 0000 C CNN\nF 1 \"50\" V 8450 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8380 4050 30 0001 C CNN\nF 3 \"\" H 8450 4050 30 0000 C CNN\n\t1 8450 4050\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C155\nU 1 1 583E9E74\nP 8700 3900\nF 0 \"C155\" H 8725 4000 50 0000 L CNN\nF 1 \"220p\" H 8725 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 3750 30 0001 C CNN\nF 3 \"\" H 8700 3900 60 0000 C CNN\n\t1 8700 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C154\nU 1 1 583E9E7B\nP 8700 3500\nF 0 \"C154\" H 8725 3600 50 0000 L CNN\nF 1 \"100p\" H 8725 3400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 3350 30 0001 C CNN\nF 3 \"\" H 8700 3500 60 0000 C CNN\n\t1 8700 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C156\nU 1 1 583E9E82\nP 8700 4300\nF 0 \"C156\" H 8725 4400 50 0000 L CNN\nF 1 \"100p\" H 8725 4200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 4150 30 0001 C CNN\nF 3 \"\" H 8700 4300 60 0000 C CNN\n\t1 8700 4300\n\t1 0 0 -1 \n$EndComp\nText HLabel 9050 3750 2 60 Output ~ 0\nADC-\n$Comp\nL GND #PWR0151\nU 1 1 583E9E8A\nP 8700 4450\nF 0 \"#PWR0151\" H 8700 4200 50 0001 C CNN\nF 1 \"GND\" H 8700 4300 50 0000 C CNN\nF 2 \"\" H 8700 4450 60 0000 C CNN\nF 3 \"\" H 8700 4450 60 0000 C CNN\n\t1 8700 4450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0152\nU 1 1 583E9E90\nP 8700 3350\nF 0 \"#PWR0152\" H 8700 3100 50 0001 C CNN\nF 1 \"GND\" H 8700 3200 50 0000 C CNN\nF 2 \"\" H 8700 3350 60 0000 C CNN\nF 3 \"\" H 8700 3350 60 0000 C CNN\n\t1 8700 3350\n\t-1 0 0 1 \n$EndComp\n$Comp\nL C C135\nU 1 1 583E9E96\nP 3450 3900\nF 0 \"C135\" H 3475 4000 50 0000 L CNN\nF 1 \"100p\" H 3475 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3488 3750 30 0001 C CNN\nF 3 \"\" H 3450 3900 60 0000 C CNN\n\t1 3450 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L3\nU 1 1 583E9E9D\nP 3150 3750\nF 0 \"L3\" H 3150 3850 50 0000 C CNN\nF 1 \"1u\" H 3150 3700 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 3150 3750 60 0001 C CNN\nF 3 \"\" H 3150 3750 60 0000 C CNN\n\t1 3150 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L8\nU 1 1 583E9EA4\nP 3150 4050\nF 0 \"L8\" H 3150 4150 50 0000 C CNN\nF 1 \"1u\" H 3150 4000 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 3150 4050 60 0001 C CNN\nF 3 \"\" H 3150 4050 60 0000 C CNN\n\t1 3150 4050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C128\nU 1 1 583E9EAB\nP 2700 3900\nF 0 \"C128\" H 2725 4000 50 0000 L CNN\nF 1 \"18p\" H 2725 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2738 3750 30 0001 C CNN\nF 3 \"\" H 2700 3900 60 0000 C CNN\n\t1 2700 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C140\nU 1 1 583E9EB2\nP 4250 3900\nF 0 \"C140\" H 4275 4000 50 0000 L CNN\nF 1 \"36p\" H 4275 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4288 3750 30 0001 C CNN\nF 3 \"\" H 4250 3900 60 0000 C CNN\n\t1 4250 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R42\nU 1 1 583E9EB9\nP 4550 4750\nF 0 \"R42\" V 4630 4750 50 0000 C CNN\nF 1 \"1k\" V 4550 4750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4480 4750 30 0001 C CNN\nF 3 \"\" H 4550 4750 30 0000 C CNN\n\t1 4550 4750\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C139\nU 1 1 583E9EC0\nP 4150 4750\nF 0 \"C139\" H 4175 4850 50 0000 L CNN\nF 1 \"100n\" H 4175 4650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 4600 30 0001 C CNN\nF 3 \"\" H 4150 4750 60 0000 C CNN\n\t1 4150 4750\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0153\nU 1 1 583E9EC7\nP 3650 3150\nF 0 \"#PWR0153\" H 3650 2900 50 0001 C CNN\nF 1 \"GND\" H 3650 3000 50 0000 C CNN\nF 2 \"\" H 3650 3150 60 0000 C CNN\nF 3 \"\" H 3650 3150 60 0000 C CNN\n\t1 3650 3150\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R22\nU 1 1 583E9EEA\nP 1900 3750\nF 0 \"R22\" V 1980 3750 50 0000 C CNN\nF 1 \"0\" V 1900 3750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1830 3750 30 0001 C CNN\nF 3 \"\" H 1900 3750 30 0000 C CNN\n\t1 1900 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R23\nU 1 1 583E9EF1\nP 1900 4050\nF 0 \"R23\" V 1980 4050 50 0000 C CNN\nF 1 \"0\" V 1900 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1830 4050 30 0001 C CNN\nF 3 \"\" H 1900 4050 30 0000 C CNN\n\t1 1900 4050\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C126\nU 1 1 583E9EF8\nP 2450 3900\nF 0 \"C126\" H 2475 4000 50 0000 L CNN\nF 1 \"DNP\" H 2475 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2488 3750 30 0001 C CNN\nF 3 \"\" H 2450 3900 60 0000 C CNN\n\t1 2450 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C123\nU 1 1 583E9EFF\nP 2100 3900\nF 0 \"C123\" H 2125 4000 50 0000 L CNN\nF 1 \"DNP\" H 2125 3800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2138 3750 30 0001 C CNN\nF 3 \"\" H 2100 3900 60 0000 C CNN\n\t1 2100 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C124\nU 1 1 583E9F06\nP 2100 4250\nF 0 \"C124\" H 2125 4350 50 0000 L CNN\nF 1 \"DNP\" H 2125 4150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2138 4100 30 0001 C CNN\nF 3 \"\" H 2100 4250 60 0000 C CNN\n\t1 2100 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C122\nU 1 1 583E9F0D\nP 2100 3550\nF 0 \"C122\" H 2125 3650 50 0000 L CNN\nF 1 \"DNP\" H 2125 3450 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2138 3400 30 0001 C CNN\nF 3 \"\" H 2100 3550 60 0000 C CNN\n\t1 2100 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0154\nU 1 1 583E9F14\nP 2100 3400\nF 0 \"#PWR0154\" H 2100 3150 50 0001 C CNN\nF 1 \"GND\" H 2100 3250 50 0000 C CNN\nF 2 \"\" H 2100 3400 60 0000 C CNN\nF 3 \"\" H 2100 3400 60 0000 C CNN\n\t1 2100 3400\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR0155\nU 1 1 583E9F1A\nP 2100 4400\nF 0 \"#PWR0155\" H 2100 4150 50 0001 C CNN\nF 1 \"GND\" H 2100 4250 50 0000 C CNN\nF 2 \"\" H 2100 4400 60 0000 C CNN\nF 3 \"\" H 2100 4400 60 0000 C CNN\n\t1 2100 4400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C125\nU 1 1 583E9F20\nP 2450 3600\nF 0 \"C125\" H 2475 3700 50 0000 L CNN\nF 1 \"DNP\" H 2475 3500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2488 3450 30 0001 C CNN\nF 3 \"\" H 2450 3600 60 0000 C CNN\n\t1 2450 3600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C127\nU 1 1 583E9F27\nP 2450 4200\nF 0 \"C127\" H 2475 4300 50 0000 L CNN\nF 1 \"DNP\" H 2475 4100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2488 4050 30 0001 C CNN\nF 3 \"\" H 2450 4200 60 0000 C CNN\n\t1 2450 4200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0156\nU 1 1 583E9F2E\nP 2450 4350\nF 0 \"#PWR0156\" H 2450 4100 50 0001 C CNN\nF 1 \"GND\" H 2450 4200 50 0000 C CNN\nF 2 \"\" H 2450 4350 60 0000 C CNN\nF 3 \"\" H 2450 4350 60 0000 C CNN\n\t1 2450 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0157\nU 1 1 583E9F34\nP 2450 3450\nF 0 \"#PWR0157\" H 2450 3200 50 0001 C CNN\nF 1 \"GND\" H 2450 3300 50 0000 C CNN\nF 2 \"\" H 2450 3450 60 0000 C CNN\nF 3 \"\" H 2450 3450 60 0000 C CNN\n\t1 2450 3450\n\t-1 0 0 1 \n$EndComp\n$Comp\nL R R28\nU 1 1 583E9F3A\nP 2300 4050\nF 0 \"R28\" V 2380 4050 50 0000 C CNN\nF 1 \"0\" V 2300 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2230 4050 30 0001 C CNN\nF 3 \"\" H 2300 4050 30 0000 C CNN\n\t1 2300 4050\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R24\nU 1 1 583E9F41\nP 2300 3750\nF 0 \"R24\" V 2380 3750 50 0000 C CNN\nF 1 \"0\" V 2300 3750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2230 3750 30 0001 C CNN\nF 3 \"\" H 2300 3750 30 0000 C CNN\n\t1 2300 3750\n\t0 1 1 0 \n$EndComp\n$Comp\nL ADA4940-1 U21\nU 1 1 583E9FB8\nP 6300 3900\nF 0 \"U21\" H 6300 3850 60 0000 C CNN\nF 1 \"ADA4940-1\" H 6850 4500 60 0000 C CNN\nF 2 \"VNA:VFQFN-16\" H 6100 3500 60 0001 C CNN\nF 3 \"\" H 6100 3500 60 0001 C CNN\n\t1 6300 3900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C148\nU 1 1 583EAD25\nP 5950 2250\nF 0 \"C148\" H 5975 2350 50 0000 L CNN\nF 1 \"100n\" H 5975 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5988 2100 30 0001 C CNN\nF 3 \"\" H 5950 2250 60 0000 C CNN\n\t1 5950 2250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0158\nU 1 1 583EADAD\nP 5950 2400\nF 0 \"#PWR0158\" H 5950 2150 50 0001 C CNN\nF 1 \"GND\" H 5950 2250 50 0000 C CNN\nF 2 \"\" H 5950 2400 60 0000 C CNN\nF 3 \"\" H 5950 2400 60 0000 C CNN\n\t1 5950 2400\n\t1 0 0 -1 \n$EndComp\nText HLabel 5850 1700 0 60 Input ~ 0\n3V3\n$Comp\nL GND #PWR0159\nU 1 1 583EC622\nP 6150 4850\nF 0 \"#PWR0159\" H 6150 4600 50 0001 C CNN\nF 1 \"GND\" H 6150 4700 50 0000 C CNN\nF 2 \"\" H 6150 4850 60 0000 C CNN\nF 3 \"\" H 6150 4850 60 0000 C CNN\n\t1 6150 4850\n\t1 0 0 -1 \n$EndComp\nText HLabel 7550 4550 2 60 Input ~ 0\nVOCM\n$Comp\nL C C149\nU 1 1 583ECEC7\nP 7150 4700\nF 0 \"C149\" H 7175 4800 50 0000 L CNN\nF 1 \"100n\" H 7175 4600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7188 4550 30 0001 C CNN\nF 3 \"\" H 7150 4700 60 0000 C CNN\n\t1 7150 4700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0160\nU 1 1 583ECF4C\nP 7150 4950\nF 0 \"#PWR0160\" H 7150 4700 50 0001 C CNN\nF 1 \"GND\" H 7150 4800 50 0000 C CNN\nF 2 \"\" H 7150 4950 60 0000 C CNN\nF 3 \"\" H 7150 4950 60 0000 C CNN\n\t1 7150 4950\n\t1 0 0 -1 \n$EndComp\nText HLabel 1500 4050 0 60 Input ~ 0\nIF+\nText HLabel 1500 3750 0 60 Input ~ 0\nIF-\nWire Wire Line\n\t4700 3750 5150 3750\nWire Wire Line\n\t4700 4050 5150 4050\nWire Wire Line\n\t2450 4050 2900 4050\nWire Wire Line\n\t8600 3750 9050 3750\nWire Wire Line\n\t4350 3150 4200 3150\nWire Wire Line\n\t3650 3150 3900 3150\nWire Wire Line\n\t2450 3750 2900 3750\nWire Wire Line\n\t7600 3750 8300 3750\nConnection ~ 4850 3750\nConnection ~ 4850 4050\nWire Wire Line\n\t4650 3150 4850 3150\nWire Wire Line\n\t8700 3750 8700 3650\nWire Wire Line\n\t8600 4050 9050 4050\nWire Wire Line\n\t8700 4050 8700 4150\nConnection ~ 8700 3750\nConnection ~ 8700 4050\nConnection ~ 3450 3750\nConnection ~ 3450 4050\nConnection ~ 2700 3750\nConnection ~ 2700 4050\nWire Wire Line\n\t3400 3750 4000 3750\nWire Wire Line\n\t3400 4050 3850 4050\nConnection ~ 4250 4050\nWire Wire Line\n\t4400 4750 4300 4750\nWire Wire Line\n\t3900 4750 4000 4750\nWire Wire Line\n\t7600 4050 8300 4050\nConnection ~ 2450 4050\nConnection ~ 2450 3750\nWire Wire Line\n\t2050 3750 2150 3750\nWire Wire Line\n\t2050 4050 2150 4050\nWire Wire Line\n\t2100 4100 2100 4050\nConnection ~ 2100 4050\nWire Wire Line\n\t2100 3750 2100 3700\nConnection ~ 2100 3750\nConnection ~ 4850 3150\nWire Wire Line\n\t6450 2000 6450 3150\nWire Wire Line\n\t5650 2000 6450 2000\nWire Wire Line\n\t5950 1700 5950 2100\nWire Wire Line\n\t6350 2950 6350 3150\nWire Wire Line\n\t6150 2950 6450 2950\nConnection ~ 6450 2950\nWire Wire Line\n\t6250 3150 6250 2950\nConnection ~ 6350 2950\nWire Wire Line\n\t6150 2950 6150 3150\nConnection ~ 6250 2950\nWire Wire Line\n\t5850 1700 5950 1700\nConnection ~ 5950 2000\nWire Wire Line\n\t7000 3850 7600 3850\nWire Wire Line\n\t7600 3850 7600 3750\nWire Wire Line\n\t7000 3950 7600 3950\nWire Wire Line\n\t7600 3950 7600 4050\nWire Wire Line\n\t6150 4650 6150 4850\nWire Wire Line\n\t6250 4650 6250 4700\nWire Wire Line\n\t6150 4700 6550 4700\nConnection ~ 6150 4700\nWire Wire Line\n\t6350 4700 6350 4650\nConnection ~ 6250 4700\nWire Wire Line\n\t6450 4700 6450 4650\nConnection ~ 6350 4700\nWire Wire Line\n\t7150 4850 7150 4950\nWire Wire Line\n\t7550 4550 7150 4550\nWire Wire Line\n\t7150 4550 7150 4150\nWire Wire Line\n\t7150 4150 7000 4150\nWire Wire Line\n\t1750 3750 1500 3750\nWire Wire Line\n\t1500 4050 1750 4050\nText HLabel 3900 4750 0 60 Input ~ 0\nDITHER\nWire Wire Line\n\t4850 4750 4700 4750\nWire Wire Line\n\t5650 4150 5550 4150\nWire Wire Line\n\t5550 4150 5550 4650\nWire Wire Line\n\t5550 4400 5450 4400\nWire Wire Line\n\t5550 4650 5450 4650\nConnection ~ 5550 4400\nWire Wire Line\n\t5150 3950 5150 4650\nWire Wire Line\n\t5650 3950 5150 3950\nWire Wire Line\n\t5150 3850 5650 3850\nWire Wire Line\n\t5150 3100 5150 3850\nConnection ~ 5150 4400\nConnection ~ 5150 4050\n$Comp\nL R R43\nU 1 1 583EF803\nP 5300 3350\nF 0 \"R43\" V 5380 3350 50 0000 C CNN\nF 1 \"3.3k\" V 5300 3350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5230 3350 30 0001 C CNN\nF 3 \"\" H 5300 3350 30 0000 C CNN\n\t1 5300 3350\n\t0 1 -1 0 \n$EndComp\n$Comp\nL C C144\nU 1 1 583EF809\nP 5300 3100\nF 0 \"C144\" H 5325 3200 50 0000 L CNN\nF 1 \"18p\" H 5325 3000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5338 2950 30 0001 C CNN\nF 3 \"\" H 5300 3100 60 0000 C CNN\n\t1 5300 3100\n\t0 1 -1 0 \n$EndComp\nWire Wire Line\n\t5450 3350 5450 3100\nWire Wire Line\n\t5450 3350 5650 3350\nWire Wire Line\n\t5650 3350 5650 3650\nConnection ~ 5150 3750\nConnection ~ 5150 3350\nWire Wire Line\n\t4850 3150 4850 3750\nWire Wire Line\n\t4850 4750 4850 4050\nText HLabel 7150 3650 2 60 Input ~ 0\n3V3\nWire Wire Line\n\t7150 3650 7000 3650\nWire Wire Line\n\t4000 4050 4400 4050\nWire Wire Line\n\t4000 3750 4000 4050\nWire Wire Line\n\t4100 3750 4400 3750\nWire Wire Line\n\t4100 3750 4100 3900\nWire Wire Line\n\t4100 3900 3850 3900\nWire Wire Line\n\t3850 3900 3850 4050\nConnection ~ 4250 3750\n$Comp\nL C C262\nU 1 1 58734718\nP 5650 2250\nF 0 \"C262\" H 5675 2350 50 0000 L CNN\nF 1 \"DNP\" H 5675 2150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 5688 2100 30 0001 C CNN\nF 3 \"\" H 5650 2250 60 0000 C CNN\n\t1 5650 2250\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t5650 2000 5650 2100\nWire Wire Line\n\t5950 2400 5650 2400\nWire Wire Line\n\t6550 4700 6550 4650\nConnection ~ 6450 4700\n$EndSCHEMATC\n" }, { "path": "hw/lib/vna.lib", "content": "EESchema-LIBRARY Version 2.3\n#encoding utf-8\n#\n# 1748LP18A075\n#\nDEF 1748LP18A075 U 0 40 Y Y 1 F N\nF0 \"U\" 150 -200 60 H V C CNN\nF1 \"1748LP18A075\" -50 200 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS -300 150 250 -150 0 1 0 N\nX I/O 1 -500 50 200 R 50 50 1 1 P\nX I/O 2 450 50 200 L 50 50 1 1 P\nX GND 3 -500 -50 200 R 50 50 1 1 P\nX GND 4 450 -50 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# 3550LP14A300\n#\nDEF 3550LP14A300 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -300 60 H V C CNN\nF1 \"3550LP14A300\" -50 150 60 H V C CNN\nF2 \"\" -50 0 60 H V C CNN\nF3 \"\" -50 0 60 H V C CNN\nDRAW\nS -350 100 250 -250 0 1 0 N\nX GND 1 -200 -450 200 U 50 50 1 1 P\nX IN 2 -550 0 200 R 50 50 1 1 P\nX GND 3 -100 -450 200 U 50 50 1 1 P\nX GND 4 0 -450 200 U 50 50 1 1 P\nX OUT 5 450 0 200 L 50 50 1 1 P\nX GND 6 100 -450 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# 5515LP15A730\n#\nDEF 5515LP15A730 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -300 60 H V C CNN\nF1 \"5515LP15A730\" 0 200 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS -350 150 350 -250 0 1 0 N\nX GND 1 -150 -450 200 U 50 50 1 1 P\nX GND 3 -50 -450 200 U 50 50 1 1 P\nX OUT 4 550 50 200 L 50 50 1 1 P\nX GND 5 50 -450 200 U 50 50 1 1 P\nX GND 7 150 -450 200 U 50 50 1 1 P\nX IN 8 -550 50 200 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# 93LC46B\n#\nDEF 93LC46B U 0 40 Y Y 1 F N\nF0 \"U\" 150 -250 60 H V C CNN\nF1 \"93LC46B\" 50 250 60 H V C CNN\nF2 \"\" 100 -400 60 H I C CNN\nF3 \"\" 100 -400 60 H I C CNN\nDRAW\nS -250 200 250 -200 0 1 0 N\nX DO 1 -450 100 200 R 50 50 1 1 O\nX VSS 2 -450 0 200 R 50 50 1 1 W\nX DI 3 -450 -100 200 R 50 50 1 1 I\nX CLK 4 450 -100 200 L 50 50 1 1 I\nX CS 5 450 0 200 L 50 50 1 1 I\nX VCC 6 450 100 200 L 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# AD8646\n#\nDEF AD8646 U 0 20 Y Y 2 L N\nF0 \"U\" 150 150 60 H V C CNN\nF1 \"AD8646\" 200 -200 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nALIAS LM393\nDRAW\nP 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N\nX ~ 1 500 0 300 L 40 40 1 1 C\nX _ 2 -500 -100 300 R 40 40 1 1 I\nX + 3 -500 100 300 R 40 40 1 1 I\nX V- 4 -100 -400 250 U 40 40 1 1 W\nX V+ 8 -100 400 250 D 40 40 1 1 W\nX + 5 -500 100 300 R 40 40 2 1 I\nX _ 6 -500 -100 300 R 40 40 2 1 I\nX ~ 7 500 0 300 L 40 40 2 1 C\nENDDRAW\nENDDEF\n#\n# AD9269\n#\nDEF AD9269 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"AD9269\" 650 1000 60 H V C CNN\nF2 \"\" -850 1150 60 H I C CNN\nF3 \"\" -850 1150 60 H I C CNN\nDRAW\nS 850 950 -850 -900 0 1 0 N\nX CLK+ 1 -1050 400 200 R 50 50 1 1 I\nX CLK- 2 -1050 300 200 R 50 50 1 1 I\nX AVDD 3 -200 1150 200 D 50 50 1 1 W\nX CSB 4 -1050 150 200 R 50 50 1 1 I\nX SCLK/DFS 5 -1050 50 200 R 50 50 1 1 I\nX SDIO/PWDN 6 -1050 -50 200 R 50 50 1 1 B\nX NC 7 1050 -600 200 L 50 50 1 1 N\nX NC 8 1050 -700 200 L 50 50 1 1 N\nX D0 9 1050 750 200 L 50 50 1 1 O\nX D1 10 1050 650 200 L 50 50 1 1 O\nX D10 20 1050 -250 200 L 50 50 1 1 O\nX VIN- 30 -1050 700 200 R 50 50 1 1 I\nX D2 11 1050 550 200 L 50 50 1 1 O\nX D11 21 1050 -350 200 L 50 50 1 1 O\nX VIN+ 31 -1050 600 200 R 50 50 1 1 I\nX D3 12 1050 450 200 L 50 50 1 1 O\nX DCO 22 1050 -450 200 L 50 50 1 1 O\nX DRVDD 13 250 1150 200 D 50 50 1 1 W\nX MODE/OR 23 -1050 -200 200 R 50 50 1 1 B\nX D4 14 1050 350 200 L 50 50 1 1 O\nX AVDD 24 -100 1150 200 D 50 50 1 1 W\nX D5 15 1050 250 200 L 50 50 1 1 O\nX VREF 25 -1050 -300 200 R 50 50 1 1 B\nX D6 16 1050 150 200 L 50 50 1 1 O\nX SENSE 26 -1050 -400 200 R 50 50 1 1 B\nX D7 17 1050 50 200 L 50 50 1 1 O\nX VCM 27 -1050 -500 200 R 50 50 1 1 O\nX D8 18 1050 -50 200 L 50 50 1 1 O\nX RBIAS 28 -1050 -600 200 R 50 50 1 1 P\nX D9 19 1050 -150 200 L 50 50 1 1 O\nX AVDD 29 0 1150 200 D 50 50 1 1 W\nX EP EP 0 -1100 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# ADA4940-1\n#\nDEF ADA4940-1 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"ADA4940-1\" 550 600 60 H V C CNN\nF2 \"\" -200 -400 60 H I C CNN\nF3 \"\" -200 -400 60 H I C CNN\nDRAW\nS -450 550 500 -550 0 1 0 N\nX -FB 1 -650 250 200 R 50 50 1 1 P\nX +IN 2 -650 50 200 R 50 50 1 1 I\nX -IN 3 -650 -50 200 R 50 50 1 1 I\nX +FB 4 -650 -250 200 R 50 50 1 1 P\nX +VS 5 150 750 200 D 50 50 1 1 W\nX +VS 6 50 750 200 D 50 50 1 1 W\nX +VS 7 -50 750 200 D 50 50 1 1 W\nX +VS 8 -150 750 200 D 50 50 1 1 W\nX VOCM 9 700 -250 200 L 50 50 1 1 P\nX +OUT 10 700 50 200 L 50 50 1 1 O\nX -OUT 11 700 -50 200 L 50 50 1 1 O\nX ~DISABLE 12 700 250 200 L 50 50 1 1 I\nX -VS 13 -150 -750 200 U 50 50 1 1 W\nX -VS 14 -50 -750 200 U 50 50 1 1 W\nX -VS 15 50 -750 200 U 50 50 1 1 W\nX -VS 16 150 -750 200 U 50 50 1 1 W\nX EP EP 250 -750 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# ADL5380\n#\nDEF ADL5380 U 0 40 Y Y 1 F N\nF0 \"U\" 0 100 60 H V C CNN\nF1 \"ADL5380\" 0 -150 60 H V C CNN\nF2 \"\" 50 -600 60 V V C CNN\nF3 \"\" 50 -600 60 V V C CNN\nDRAW\nS -750 -600 700 550 0 1 0 N\nX GND 1 -350 -800 200 U 50 50 1 1 W\nX GND 2 -250 -800 200 U 50 50 1 1 W\nX IHI 3 900 350 200 L 50 50 1 1 O\nX ILO 4 900 250 200 L 50 50 1 1 O\nX GND 5 -150 -800 200 U 50 50 1 1 W\nX VCC1 6 250 750 200 D 50 50 1 1 W\nX ENBL 7 -150 750 200 D 50 50 1 1 I\nX GND 8 -50 -800 200 U 50 50 1 1 W\nX LOIP 9 900 50 200 L 50 50 1 1 I\nX LOIN 10 900 -50 200 L 50 50 1 1 I\nX GND 20 450 -800 200 U 50 50 1 1 W\nX GND 11 50 -800 200 U 50 50 1 1 W\nX RFIN 21 -950 -50 200 R 50 50 1 1 I\nX NC 12 -350 750 200 D 50 50 1 1 N N\nX RFIP 22 -950 50 200 R 50 50 1 1 I\nX VCC2 13 150 750 200 D 50 50 1 1 W\nX GND 23 550 -800 200 U 50 50 1 1 W\nX GND 14 150 -800 200 U 50 50 1 1 W\nX VCC3 24 50 750 200 D 50 50 1 1 W\nX QLO 15 900 -350 200 L 50 50 1 1 O\nX EP 25 -450 -800 200 U 50 50 1 1 W\nX QHI 16 900 -250 200 L 50 50 1 1 O\nX GND 17 250 -800 200 U 50 50 1 1 W\nX GND 18 350 -800 200 U 50 50 1 1 W\nX ADJ 19 -250 750 200 D 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# ADL5801\n#\nDEF ADL5801 U 0 40 Y Y 1 F N\nF0 \"U\" 800 -200 60 H V C CNN\nF1 \"ADL5801\" 950 1000 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS -150 -150 900 950 0 1 0 N\nX GND 1 -350 650 200 R 50 50 1 1 W\nX GND 2 -350 550 200 R 50 50 1 1 W\nX LOIP 3 -350 450 200 R 50 50 1 1 I\nX LOIN 4 -350 350 200 R 50 50 1 1 I\nX GND 5 -350 250 200 R 50 50 1 1 W\nX GND 6 -350 150 200 R 50 50 1 1 W\nX VPLO 7 150 -350 200 U 50 50 1 1 W\nX GND 8 250 -350 200 U 50 50 1 1 W\nX ENBL 9 350 -350 200 U 50 50 1 1 I\nX VSET 10 450 -350 200 U 50 50 1 1 I\nX IFOP 20 550 1150 200 D 50 50 1 1 O\nX DETO 11 550 -350 200 U 50 50 1 1 O\nX IFON 21 450 1150 200 D 50 50 1 1 O\nX GND 12 650 -350 200 U 50 50 1 1 W\nX NC 22 350 1150 200 D 50 50 1 1 N\nX VPDT 13 1100 150 200 L 50 50 1 1 W\nX GND 23 250 1150 200 D 50 50 1 1 W\nX GND 14 1100 250 200 L 50 50 1 1 W\nX VPLO 24 150 1150 200 D 50 50 1 1 W\nX RFIN 15 1100 350 200 L 50 50 1 1 I\nX RFIP 16 1100 450 200 L 50 50 1 1 I\nX GND 17 1100 550 200 L 50 50 1 1 W\nX VPRF 18 1100 650 200 L 50 50 1 1 W\nX GND 19 650 1150 200 D 50 50 1 1 W\nX PAD PAD 50 -350 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# AOZ1280\n#\nDEF AOZ1280 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -200 60 H V C CNN\nF1 \"AOZ1280\" 150 250 60 H V C CNN\nF2 \"\" -100 -700 60 H V C CNN\nF3 \"\" -100 -700 60 H V C CNN\nDRAW\nS -300 -150 350 200 0 1 0 N\nX BST 1 550 150 200 L 50 50 1 1 P\nX GND 2 0 -350 200 U 50 50 1 1 W\nX FB 3 550 -100 200 L 50 50 1 1 I\nX EN 4 -500 50 200 R 50 50 1 1 I\nX VIN 5 -500 150 200 R 50 50 1 1 W\nX LX 6 550 50 200 L 50 50 1 1 O\nENDDRAW\nENDDEF\n#\n# AOZ1281\n#\nDEF AOZ1281 U 0 40 Y Y 1 F N\nF0 \"U\" 250 -250 60 H V C CNN\nF1 \"AOZ1281\" 100 250 60 H V C CNN\nF2 \"\" 0 -300 60 H V C CNN\nF3 \"\" 0 -300 60 H V C CNN\nDRAW\nS -300 200 300 -200 0 1 0 N\nX LX 1 500 50 200 L 50 50 1 1 w\nX VIN 2 -500 150 200 R 50 50 1 1 W\nX VIN 3 -500 50 200 R 50 50 1 1 W\nX EN 4 -500 -50 200 R 50 50 1 1 I\nX FB 5 500 -50 200 L 50 50 1 1 I\nX GND 6 0 -400 200 U 50 50 1 1 W\nX GND 7 -100 -400 200 U 50 50 1 1 W\nX BST 8 500 150 200 L 50 50 1 1 O\nX EP 9 100 -400 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# AP65201\n#\nDEF AP65201 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -250 60 H V C CNN\nF1 \"AP65201\" 50 200 60 H V C CNN\nF2 \"\" -50 -200 60 H V C CNN\nF3 \"\" -50 -200 60 H V C CNN\nDRAW\nS -250 150 250 -200 0 1 0 N\nX GND 1 0 -400 200 U 50 50 1 1 W\nX SW 2 450 0 200 L 50 50 1 1 w\nX IN 3 -450 0 200 R 50 50 1 1 W\nX FB 4 450 -100 200 L 50 50 1 1 I\nX EN 5 -450 100 200 R 50 50 1 1 I\nX BST 6 450 100 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# ASTXR-12\n#\nDEF ASTXR-12 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -150 60 H V C CNN\nF1 \"ASTXR-12\" 100 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nS 250 100 -200 -100 0 1 0 N\nX GND 3 -400 -50 200 R 50 50 1 1 W\nX OUT 4 450 0 200 L 50 50 1 1 O\nX VDD 6 -400 50 200 R 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# BEND\n#\nDEF BEND F 0 40 Y Y 1 F N\nF0 \"F\" 0 -100 60 H V C CNN\nF1 \"BEND\" 150 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 4 0 1 0 -25 100 -25 25 25 -25 100 -25 N\nP 5 0 1 0 100 -25 100 25 25 25 25 100 -25 100 N\nX ~ 1 0 200 100 D 50 50 1 1 P\nX ~ 2 200 0 100 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# BRANCHLINE\n#\nDEF BRANCHLINE Z 0 40 Y Y 1 F N\nF0 \"Z\" 100 -200 60 H V C CNN\nF1 \"BRANCHLINE\" 50 300 60 H V C CNN\nF2 \"\" 50 -150 60 H V C CNN\nF3 \"\" 50 -150 60 H V C CNN\nDRAW\nS -150 -100 -150 -100 0 1 0 N\nS -150 -100 -150 -100 0 1 0 N\nS 150 150 -150 -100 0 1 20 N\nX ~ 1 -350 150 200 R 50 50 1 1 P\nX ~ 2 350 150 200 L 50 50 1 1 P\nX ~ 3 -350 -100 200 R 50 50 1 1 P\nX ~ 4 350 -100 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# COUPLER\n#\nDEF COUPLER F 0 40 Y N 1 F N\nF0 \"F\" 450 -150 60 H V C CNN\nF1 \"COUPLER\" -100 250 60 H V C CNN\nF2 \"\" 0 100 60 H V C CNN\nF3 \"\" 0 100 60 H V C CNN\nDRAW\nS -350 150 300 -200 0 1 0 N\nP 2 0 1 0 -350 100 300 100 N\nP 4 0 1 0 -300 -200 -300 50 -100 50 -100 -200 N\nP 4 0 1 0 50 -200 50 50 250 50 250 -200 N\nX ~ 1 -550 100 200 R 50 50 1 1 P\nX ~ 2 500 100 200 L 50 50 1 1 P\nX ~ 3 -300 -400 200 U 50 50 1 1 P\nX ~ 4 -100 -400 200 U 50 50 1 1 P\nX ~ 5 50 -400 200 U 50 50 1 1 P\nX ~ 6 250 -400 200 U 50 50 1 1 P\nX GND GND -550 -150 200 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# CTX520\n#\nDEF CTX520 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -150 60 H V C CNN\nF1 \"CTX520\" 100 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nS 250 100 -200 -100 0 1 0 N\nX VC 1 450 -50 200 L 50 50 1 1 I\nX GND 2 -400 -50 200 R 50 50 1 1 W\nX OUT 3 450 50 200 L 50 50 1 1 O\nX VCC 4 -400 50 200 R 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# FT2232D\n#\nDEF FT2232D U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"FT2232D\" 800 1650 60 H V C CNN\nF2 \"\" -1800 1100 60 H I C CNN\nF3 \"\" -1800 1100 60 H I C CNN\nDRAW\nS 1050 1550 -950 -1600 0 1 0 N\nX EESK 1 -1150 -1000 200 R 50 50 1 1 O\nX EEDATA 2 -1150 -1100 200 R 50 50 1 1 B\nX VCC 3 100 1750 200 D 50 50 1 1 W\nX RESET# 4 -1150 350 200 R 50 50 1 1 I\nX RSTOUT# 5 -1150 450 200 R 50 50 1 1 O\nX 3V3OUT 6 -1150 1300 200 R 50 50 1 1 w\nX USBDP 7 -1150 900 200 R 50 50 1 1 B\nX USBDM 8 -1150 1050 200 R 50 50 1 1 B\nX GND 9 -200 -1800 200 U 50 50 1 1 W\nX SI/WUA 10 1250 150 200 L 50 50 1 1 B\nX ADBUS4 20 1250 1000 200 L 50 50 1 1 B\nX BCBUS0/RXF# 30 1250 -900 200 L 50 50 1 1 B\nX BDBUS0 40 1250 0 200 L 50 50 1 1 B\nX ACBUS3 11 1250 250 200 L 50 50 1 1 B\nX ADBUS3/TMS 21 1250 1100 200 L 50 50 1 1 B\nX VCCIOB 31 -200 1750 200 D 50 50 1 1 W\nX PWREN# 41 1250 -1450 200 L 50 50 1 1 O\nX ACBUS2 12 1250 350 200 L 50 50 1 1 B\nX ADBUS2/TDO 22 1250 1200 200 L 50 50 1 1 B\nX BDBUS7 32 1250 -700 200 L 50 50 1 1 B\nX VCC 42 0 1750 200 D 50 50 1 1 W\nX ACBUS1 13 1250 450 200 L 50 50 1 1 B\nX ADBUS1/TDI 23 1250 1300 200 L 50 50 1 1 B\nX BDBUS6 33 1250 -600 200 L 50 50 1 1 B\nX XTIN 43 -1150 -100 200 R 50 50 1 1 I\nX VCCIOA 14 -100 1750 200 D 50 50 1 1 W\nX ADBUS0/TCK 24 1250 1400 200 L 50 50 1 1 B\nX GND 34 100 -1800 200 U 50 50 1 1 W\nX XTOUT 44 -1150 -450 200 R 50 50 1 1 O\nX ACBUS0 15 1250 550 200 L 50 50 1 1 B\nX GND 25 0 -1800 200 U 50 50 1 1 W\nX BDBUS5 35 1250 -500 200 L 50 50 1 1 B\nX AGND 45 200 -1800 200 U 50 50 1 1 W\nX ADBUS7 16 1250 700 200 L 50 50 1 1 B\nX SI/WUB 26 1250 -1300 200 L 50 50 1 1 B\nX BDBUS4 36 1250 -400 200 L 50 50 1 1 B\nX AVCC 46 200 1750 200 D 50 50 1 1 W\nX ADBUS6 17 1250 800 200 L 50 50 1 1 B\nX BCBUS3/WR 27 1250 -1200 200 L 50 50 1 1 B\nX BDBUS3 37 1250 -300 200 L 50 50 1 1 B\nX TEST 47 -1150 -1200 200 R 50 50 1 1 I\nX GND 18 -100 -1800 200 U 50 50 1 1 W\nX BCBUS2/RD# 28 1250 -1100 200 L 50 50 1 1 B\nX BDBUS2 38 1250 -200 200 L 50 50 1 1 B\nX EECS 48 -1150 -900 200 R 50 50 1 1 B\nX ADBUS5 19 1250 900 200 L 50 50 1 1 B\nX BCBUS1/TXE# 29 1250 -1000 200 L 50 50 1 1 B\nX BDBUS1 39 1250 -100 200 L 50 50 1 1 B\nENDDRAW\nENDDEF\n#\n# HMC713LP3E\n#\nDEF HMC713LP3E U 0 40 Y Y 1 F N\nF0 \"U\" 300 300 60 H V C CNN\nF1 \"HMC713LP3E\" 700 750 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -200 -100 800 700 0 1 0 N\nX NC 1 -400 200 200 R 50 50 1 1 N\nX GND 2 50 -300 200 U 50 50 1 1 W\nX RFIN 3 -400 550 200 R 50 50 1 1 I\nX NC 4 -400 100 200 R 50 50 1 1 N\nX GND 5 150 -300 200 U 50 50 1 1 W\nX EN 6 -400 400 200 R 50 50 1 1 I\nX VSET 7 -400 300 200 R 50 50 1 1 I\nX CLPF 8 1000 150 200 L 50 50 1 1 P\nX GND 9 250 -300 200 U 50 50 1 1 W\nX GND 10 350 -300 200 U 50 50 1 1 W\nX GND 11 450 -300 200 U 50 50 1 1 W\nX GND 12 550 -300 200 U 50 50 1 1 W\nX OUTP 13 1000 550 200 L 50 50 1 1 O\nX OUTN 14 1000 450 200 L 50 50 1 1 O\nX VCC 15 350 900 200 D 50 50 1 1 W\nX VCC 16 250 900 200 D 50 50 1 1 W\nX GND EP 650 -300 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# KT2520K\n#\nDEF KT2520K U 0 40 Y Y 1 F N\nF0 \"U\" 200 -250 60 H V C CNN\nF1 \"KT2520K\" 50 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nS 250 100 -200 -200 0 1 0 N\nX GND 1 -400 -50 200 R 50 50 1 1 W\nX GND 3 -400 -150 200 R 50 50 1 1 W\nX OUT 4 450 -50 200 L 50 50 1 1 O\nX VDD 6 -400 50 200 R 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# L7981\n#\nDEF L7981 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -350 60 H V C CNN\nF1 \"L7981\" 200 300 60 H V C CNN\nF2 \"\" -200 -650 60 H V C CNN\nF3 \"\" -200 -650 60 H V C CNN\nDRAW\nS -300 250 350 -300 0 1 0 N\nX OUT 1 550 200 200 L 50 50 1 1 w\nX SYNCH 2 550 50 200 L 50 50 1 1 B\nX EN 3 -500 100 200 R 50 50 1 1 I\nX COMP 4 -500 -150 200 R 50 50 1 1 P\nX FB 5 550 -150 200 L 50 50 1 1 I\nX FSW 6 -500 -50 200 R 50 50 1 1 P\nX GND 7 0 -500 200 U 50 50 1 1 W\nX VCC 8 -500 200 200 R 50 50 1 1 W\nX EP 9 100 -500 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# LMH2110\n#\nDEF LMH2110 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -250 60 H V C CNN\nF1 \"LMH2110\" 250 250 60 H V C CNN\nF2 \"\" 0 -50 60 H V C CNN\nF3 \"\" 0 -50 60 H V C CNN\nDRAW\nS -350 200 350 -200 0 1 0 N\nX VDD A1 0 400 200 D 50 50 1 1 W\nX RFIN B1 -550 100 200 R 50 50 1 1 I\nX GND C1 -50 -400 200 U 50 50 1 1 W\nX OUT A2 550 0 200 L 50 50 1 1 O\nX GND B2 50 -400 200 U 50 50 1 1 W\nX EN C2 -550 -100 200 R 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# LMZ30602\n#\nDEF LMZ30602 U 0 40 Y Y 1 F N\nF0 \"U\" 0 50 60 H V C CNN\nF1 \"LMZ30602\" 600 1150 60 H V C CNN\nF2 \"\" -500 300 60 H I C CNN\nF3 \"\" -500 300 60 H I C CNN\nDRAW\nS -800 1100 800 -1050 0 1 0 N\nX AGND 1 -250 -1250 200 U 50 50 0 1 W\nX DNC 2 1000 -450 200 L 50 50 0 1 N\nX DNC 3 1000 -550 200 L 50 50 0 1 N\nX RT/CLK 4 -1000 600 200 R 50 50 0 1 I\nX AGND 5 -150 -1250 200 U 50 50 0 1 W\nX SS/TR 6 -1000 450 200 R 50 50 0 1 I\nX STSEL 7 -1000 350 200 R 50 50 0 1 I\nX VOUT 8 1000 800 200 L 50 50 0 1 w\nX VOUT 9 1000 700 200 L 50 50 0 1 w\nX VOUT 10 1000 600 200 L 50 50 0 1 w\nX PH 20 -1000 -300 200 R 50 50 0 1 P\nX VIN 30 -1000 950 200 R 50 50 0 1 W\nX VOUT 11 1000 500 200 L 50 50 0 1 w\nX PH 21 -1000 -400 200 R 50 50 0 1 P\nX VIN 31 -1000 850 200 R 50 50 0 1 W\nX VOUT 12 1000 400 200 L 50 50 0 1 w\nX PH 22 -1000 -500 200 R 50 50 0 1 P\nX VIN 32 -1000 750 200 R 50 50 0 1 W\nX VOUT 13 1000 300 200 L 50 50 0 1 w\nX PH 23 -1000 -600 200 R 50 50 0 1 P\nX AGND 33 50 -1250 200 U 50 50 0 1 W\nX VOUT 14 1000 200 200 L 50 50 0 1 w\nX PH 24 -1000 -700 200 R 50 50 0 1 P\nX AGND 34 150 -1250 200 U 50 50 0 1 W\nX DNC 15 1000 -650 200 L 50 50 0 1 N\nX PH 25 -1000 -800 200 R 50 50 0 1 P\nX VADJ 35 1000 -300 200 L 50 50 0 1 P\nX DNC 16 1000 -750 200 L 50 50 0 1 N\nX DNC 26 1000 -850 200 L 50 50 0 1 N\nX SENSE+ 36 1000 -50 200 L 50 50 0 1 I\nX PH 17 -1000 0 200 R 50 50 0 1 P\nX PWRGD 27 1000 950 200 L 50 50 0 1 C\nX PGND 37 250 -1250 200 U 50 50 0 1 W\nX PH 18 -1000 -100 200 R 50 50 0 1 P\nX INH/UVLO 28 -1000 200 200 R 50 50 0 1 I\nX VOUT 38 1000 100 200 L 50 50 0 1 w\nX PH 19 -1000 -200 200 R 50 50 0 1 P\nX AGND 29 -50 -1250 200 U 50 50 0 1 W\nX PH 39 -1000 -900 200 R 50 50 0 1 P\nENDDRAW\nENDDEF\n#\n# LP0603\n#\nDEF LP0603 U 0 40 Y Y 1 F N\nF0 \"U\" 150 -200 60 H V C CNN\nF1 \"LP0603\" 100 200 60 H V C CNN\nF2 \"\" 100 -250 60 H V C CNN\nF3 \"\" 100 -250 60 H V C CNN\nDRAW\nS -200 150 250 -150 0 1 0 N\nX IN 1 -400 50 200 R 50 50 1 1 P\nX OUT 2 450 50 200 L 50 50 1 1 P\nX GND 3 450 -50 200 L 50 50 1 1 P\nX GND 4 -400 -50 200 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# LP5907\n#\nDEF LP5907 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -200 60 H V C CNN\nF1 \"LP5907\" 100 200 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\n$FPLIST\n SOT-23-5\n$ENDFPLIST\nDRAW\nS -300 150 300 -150 0 1 0 N\nX IN 1 -500 50 200 R 50 50 1 1 W\nX GND 2 0 -350 200 U 50 50 1 1 W\nX EN 3 -500 -50 200 R 50 50 1 1 I\nX OUT 5 500 50 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# LPC4370FET100\n#\nDEF LPC4370FET100 U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"LPC4370FET100\" 50 850 60 H V C CNN\nF2 \"\" -300 950 60 H V C CNN\nF3 \"\" -300 950 60 H V C CNN\nDRAW\nS 1500 2700 -1350 -2950 0 1 0 N\nX ADCHS_1 A1 -1550 -1500 200 R 50 50 1 1 I\nX XTAL1 B1 -1550 -2500 200 R 50 50 1 1 I\nX XTAL2 C1 -1550 -2600 200 R 50 50 1 1 O\nX USB0_VDDA_3V3_DRIVER D1 -1550 2300 200 R 50 50 1 1 W\nX USB0_DP E1 -1550 1300 200 R 50 50 1 1 B\nX USB0_ID F1 -1550 1000 200 R 50 50 1 1 I\nX P0_1 G1 1700 2450 200 L 50 50 1 1 B\nX P1_0 H1 1700 2350 200 L 50 50 1 1 B\nX P1_3 J1 1700 2050 200 L 50 50 1 1 B\nX P1_2 K1 1700 2150 200 L 50 50 1 1 B\nX ADCHS_0 A2 -1550 -1400 200 R 50 50 1 1 I\nX VDDA B2 350 2900 200 D 50 50 1 1 W\nX VSSA C2 350 -3150 200 U 50 50 1 1 W\nX USB0_VDDA3V3 D2 -1550 2200 200 R 50 50 1 1 W\nX USB0_DM E2 -1550 1200 200 R 50 50 1 1 B\nX USB0_VSSA_REF F2 -1550 2000 200 R 50 50 1 1 W\nX P0_0 G2 1700 2550 200 L 50 50 1 1 B\nX TCK/SWDCLK H2 -1550 -50 200 R 50 50 1 1 I\nX P1_4 J2 1700 1950 200 L 50 50 1 1 B\nX P1_1 K2 1700 2250 200 L 50 50 1 1 B\nX ADCHS_NEG A3 -1550 -1700 200 R 50 50 1 1 B\nX ADCHS_2 B3 -1550 -1600 200 R 50 50 1 1 I\nX RTC_ALARM C3 -1550 -2150 200 R 50 50 1 1 O\nX USB0_VSSA_TERM D3 -1550 2100 200 R 50 50 1 1 W\nX USB0_VBUS E3 -1550 1100 200 R 50 50 1 1 B\nX USB0_RREF F3 -1550 900 200 R 50 50 1 1 P\nX TDI G3 -1550 -350 200 R 50 50 1 1 I\nX TDO/SWO H3 -1550 -250 200 R 50 50 1 1 O\nX VSSIO J3 150 -3150 200 U 50 50 1 1 W\nX CLK0 K3 -1550 450 200 R 50 50 1 1 B\nX WAKEUP0 A4 -1550 -1050 200 R 50 50 1 1 I\nX ~TRST B4 -1550 -150 200 R 50 50 1 1 I\nX TMS C4 -1550 -450 200 R 50 50 1 1 P\nX VSSIO D4 -150 -3150 200 U 50 50 1 1 W\nX VDDREG E4 150 2900 200 D 50 50 1 1 W\nX VDDREG F4 -50 2900 200 D 50 50 1 1 W\nX P1_7 G4 1700 1650 200 L 50 50 1 1 B\nX PF_4 H4 1700 -2750 200 L 50 50 1 1 B\nX P1_5 J4 1700 1850 200 L 50 50 1 1 B\nX P1_6 K4 1700 1750 200 L 50 50 1 1 B\nX RTCX1 A5 -1550 -2250 200 R 50 50 1 1 I\nX RTCX2 B5 -1550 -2350 200 R 50 50 1 1 O\nX VBAT C5 250 2900 200 D 50 50 1 1 W\nX VSSIO D5 -50 -3150 200 U 50 50 1 1 W\nX VDDREG E5 50 2900 200 D 50 50 1 1 W\nX P2_2 F5 1700 50 200 L 50 50 1 1 B\nX P6_1 G5 1700 -2150 200 L 50 50 1 1 B\nX P1_8 H5 1700 1550 200 L 50 50 1 1 B\nX P1_9 J5 1700 1450 200 L 50 50 1 1 B\nX VDDIO K5 -250 2900 200 D 50 50 1 1 W\nX DBGEN A6 -1550 50 200 R 50 50 1 1 I\nX ~RESET B6 -1550 -1150 200 R 50 50 1 1 I\nX P2_8 C6 1700 -550 200 L 50 50 1 1 B\nX I2C0_SCL D6 -1550 -700 200 R 50 50 1 1 B\nX I2C0_SDA E6 -1550 -800 200 R 50 50 1 1 B\nX P6_4 F6 1700 -2350 200 L 50 50 1 1 B\nX P3_2 G6 1700 -1350 200 L 50 50 1 1 B\nX P1_10 H6 1700 1350 200 L 50 50 1 1 B\nX VSSIO J6 250 -3150 200 U 50 50 1 1 W\nX CLK2 K6 -1550 350 200 R 50 50 1 1 B\nX P3_3 A7 1700 -1450 200 L 50 50 1 1 B\nX P3_5 B7 1700 -1650 200 L 50 50 1 1 B\nX P3_6 C7 1700 -1750 200 L 50 50 1 1 B\nX P3_7 D7 1700 -1850 200 L 50 50 1 1 B\nX P3_8 E7 1700 -1950 200 L 50 50 1 1 B\nX P3_1 F7 1700 -1250 200 L 50 50 1 1 B\nX P2_1 G7 1700 150 200 L 50 50 1 1 B\nX P6_0 H7 1700 -2050 200 L 50 50 1 1 B\nX P1_11 J7 1700 1250 200 L 50 50 1 1 B\nX P1_12 K7 1700 1150 200 L 50 50 1 1 B\nX P3_0 A8 1700 -1150 200 L 50 50 1 1 B\nX P3_4 B8 1700 -1550 200 L 50 50 1 1 B\nX VSSIO C8 -250 -3150 200 U 50 50 1 1 W\nX P2_3 D8 1700 -50 200 L 50 50 1 1 B\nX P2_10 E8 1700 -750 200 L 50 50 1 1 B\nX P6_9 F8 1700 -2550 200 L 50 50 1 1 B\nX VSSIO G8 50 -3150 200 U 50 50 1 1 W\nX P1_13 H8 1700 1050 200 L 50 50 1 1 B\nX P1_14 J8 1700 950 200 L 50 50 1 1 B\nX P1_15 K8 1700 850 200 L 50 50 1 1 B\nX P2_11 A9 1700 -850 200 L 50 50 1 1 B\nX P2_12 B9 1700 -950 200 L 50 50 1 1 B\nX P6_11 C9 1700 -2650 200 L 50 50 1 1 B\nX P2_4 D9 1700 -150 200 L 50 50 1 1 B\nX USB1_DP E9 -1550 1650 200 R 50 50 1 1 B\nX P6_5 F9 1700 -2450 200 L 50 50 1 1 B\nX P2_6 G9 1700 -350 200 L 50 50 1 1 B\nX P1_16 H9 1700 750 200 L 50 50 1 1 B\nX P6_2 J9 1700 -2250 200 L 50 50 1 1 B\nX P1_19 K9 1700 450 200 L 50 50 1 1 B\nX P2_13 A10 1700 -1050 200 L 50 50 1 1 B\nX P2_9 B10 1700 -650 200 L 50 50 1 1 B\nX P2_7 C10 1700 -450 200 L 50 50 1 1 B\nX P2_5 D10 1700 -250 200 L 50 50 1 1 B\nX USB1_DM E10 -1550 1550 200 R 50 50 1 1 B\nX VDDIO F10 -150 2900 200 D 50 50 1 1 W\nX P2_0 G10 1700 250 200 L 50 50 1 1 B\nX P1_17 H10 1700 650 200 L 50 50 1 1 B\nX P1_18 J10 1700 550 200 L 50 50 1 1 B\nX P1_20 K10 1700 350 200 L 50 50 1 1 B\nENDDRAW\nENDDEF\n#\n# LTC224X\n#\nDEF LTC224X U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"LTC224X\" 450 1000 60 H V C CNN\nF2 \"\" -850 250 60 H I C CNN\nF3 \"\" -850 250 60 H I C CNN\nDRAW\nS 650 950 -650 -950 0 1 0 N\nX VCM 31 -850 -50 200 R 50 50 0 1 P\nX GND 33 150 -1150 200 U 50 50 0 1 W\nX AIN+ 1 -850 700 200 R 50 50 1 1 I\nX AIN- 2 -850 600 200 R 50 50 1 1 I\nX REFH 3 -850 400 200 R 50 50 1 1 P\nX REFH 4 -850 300 200 R 50 50 1 1 P\nX REFL 5 -850 200 200 R 50 50 1 1 P\nX REFL 6 -850 100 200 R 50 50 1 1 P\nX VDD 7 100 1150 200 D 50 50 1 1 W\nX GND 8 -150 -1150 200 U 50 50 1 1 W\nX CLK 9 -850 850 200 R 50 50 1 1 I\nX SHDN 10 -850 -300 200 R 50 50 1 1 I\nX OGND 20 0 -1150 200 U 50 50 1 1 W\nX SENSE 30 -850 -700 200 R 50 50 1 1 I\nX ~OE 11 -850 -400 200 R 50 50 1 1 I\nX OVDD 21 850 -750 200 L 50 50 1 1 W\nX D0 12 850 800 200 L 50 50 1 1 O\nX D8 22 850 0 200 L 50 50 1 1 O\nX VDD 32 -50 1150 200 D 50 50 1 1 W\nX D1 13 850 700 200 L 50 50 1 1 O\nX D9 23 850 -100 200 L 50 50 1 1 O\nX D2 14 850 600 200 L 50 50 1 1 O\nX D10 24 850 -200 200 L 50 50 1 1 O\nX D3 15 850 500 200 L 50 50 1 1 O\nX D11 25 850 -300 200 L 50 50 1 1 O\nX D4 16 850 400 200 L 50 50 1 1 O\nX D12 26 850 -400 200 L 50 50 1 1 O\nX D5 17 850 300 200 L 50 50 1 1 O\nX D13 27 850 -500 200 L 50 50 1 1 O\nX D6 18 850 200 200 L 50 50 1 1 O\nX OF 28 850 -650 200 L 50 50 1 1 O\nX D7 19 850 100 200 L 50 50 1 1 O\nX MODE 29 -850 -600 200 R 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# LTC6362\n#\nDEF LTC6362 U 0 20 Y Y 1 F N\nF0 \"U\" 50 250 60 H V C CNN\nF1 \"LTC6362\" 250 -250 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 4 0 1 0 -200 300 300 0 -200 -300 -200 300 N\nX _ 1 -500 150 300 R 40 40 1 1 I\nX VCOM 2 -500 0 300 R 40 40 1 1 I\nX V+ 3 -100 500 250 D 40 40 1 1 W\nX ~ 4 350 150 300 L 40 40 1 1 C\nX ~ 5 350 -150 300 L 40 40 1 1 O I\nX V- 6 -100 -500 250 U 40 40 1 1 W\nX ~S 7 0 -500 315 U 40 40 1 1 I\nX + 8 -500 -150 300 R 40 40 1 1 I\nX EP 9 -150 -500 232 U 40 40 1 1 W\nENDDRAW\nENDDEF\n#\n# MAX2870\n#\nDEF MAX2870 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -150 60 H V C CNN\nF1 \"MAX2870\" 0 300 60 H V C CNN\nF2 \"\" -1350 850 60 H V C CNN\nF3 \"\" -1350 850 60 H V C CNN\nDRAW\nS -800 -900 850 900 0 1 0 N\nX CLK 1 -1000 450 200 R 50 50 1 1 I\nX DATA 2 -1000 350 200 R 50 50 1 1 I\nX LE 3 -1000 250 200 R 50 50 1 1 I\nX CE 4 -1000 150 200 R 50 50 1 1 I\nX SW 5 1050 350 200 L 50 50 1 1 O\nX VCC_CP 6 -200 1100 200 D 50 50 1 1 W\nX CP_OUT 7 1050 150 200 L 50 50 1 1 O\nX GND_CP 8 350 -1100 200 U 50 50 1 1 W\nX GND_PLL 9 250 -1100 200 U 50 50 1 1 W\nX VCC_PLL 10 -100 1100 200 D 50 50 1 1 W\nX TUNE 20 1050 50 200 L 50 50 1 1 I\nX MUX_OUT 30 1050 650 200 L 50 50 1 1 O\nX GND_RF 11 150 -1100 200 U 50 50 1 1 W\nX GND_TUNE 21 50 -1100 200 U 50 50 1 1 W\nX GND_SD 31 -250 -1100 200 U 50 50 1 1 W\nX RFOUTA_P 12 1050 -200 200 L 50 50 1 1 O\nX RSET 22 -1000 -250 200 R 50 50 1 1 P\nX VCC_SD 32 300 1100 200 D 50 50 1 1 W\nX RFOUTA_N 13 1050 -300 200 L 50 50 1 1 O\nX BIAS_FILT 23 -1000 -350 200 R 50 50 1 1 P\nX RFOUTB_P 14 1050 -450 200 L 50 50 1 1 O\nX REG 24 -1000 -550 200 R 50 50 1 1 P\nX RFOUTB_N 15 1050 -550 200 L 50 50 1 1 O\nX LD 25 1050 550 200 L 50 50 1 1 O\nX VCC_RF 16 0 1100 200 D 50 50 1 1 W\nX RFOUT_EN 26 -1000 0 200 R 50 50 1 1 I\nX VCC_VCO 17 100 1100 200 D 50 50 1 1 W\nX GND_DIG 27 -150 -1100 200 U 50 50 1 1 W\nX GND_VCO 18 -50 -1100 200 U 50 50 1 1 W\nX VCC_DIG 28 200 1100 200 D 50 50 1 1 W\nX NOISE_FILT 19 -1000 -450 200 R 50 50 1 1 P\nX REF_IN 29 -1000 600 200 R 50 50 1 1 I\nX EP EP -350 -1100 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# MCP1700\n#\nDEF MCP1700 U 0 40 Y Y 1 F N\nF0 \"U\" 250 -150 60 H V C CNN\nF1 \"MCP1700\" 50 400 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n SOT-23\n$ENDFPLIST\nDRAW\nS -300 350 300 -100 0 1 0 N\nX GND 1 0 -400 300 U 60 60 1 1 W\nX VOUT 2 600 250 300 L 60 60 1 1 w\nX VIN 3 -600 250 300 R 60 60 1 1 W\nENDDRAW\nENDDEF\n#\n# MCP1824T\n#\nDEF MCP1824T U 0 40 Y Y 1 F N\nF0 \"U\" 200 -200 60 H V C CNN\nF1 \"MCP1824T\" 0 200 60 H V C CNN\nF2 \"\" -200 -50 60 H V C CNN\nF3 \"\" -200 -50 60 H V C CNN\nDRAW\nS -300 150 250 -150 0 1 0 N\nX VIN 1 -500 100 200 R 50 50 1 1 W\nX GND 2 -500 -100 200 R 50 50 1 1 W\nX ~SHDN 3 -500 0 200 R 50 50 1 1 I\nX PWRGD 4 450 -100 200 L 50 50 1 1 C\nX VOUT 5 450 100 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# MCP3021\n#\nDEF MCP3021 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -250 60 H V C CNN\nF1 \"MCP3021\" 250 250 60 H V C CNN\nF2 \"\" 0 -150 60 H V C CNN\nF3 \"\" 0 -150 60 H V C CNN\nDRAW\nS -250 200 250 -200 0 1 0 N\nX VDD 1 0 400 200 D 50 50 1 1 W\nX VSS 2 0 -400 200 U 50 50 1 1 W\nX AIN 3 -450 0 200 R 50 50 1 1 I\nX SDA 4 450 -100 200 L 50 50 1 1 B\nX SCL 5 450 100 200 L 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# MIC5366\n#\nDEF MIC5366 U 0 40 Y Y 1 F N\nF0 \"U\" 150 -200 60 H V C CNN\nF1 \"MIC5366\" 0 200 60 H V C CNN\nF2 \"\" -50 -150 60 H V C CNN\nF3 \"\" -50 -150 60 H V C CNN\nDRAW\nS -250 150 200 -150 0 1 0 N\nX VIN 1 -450 100 200 R 50 50 1 1 W\nX GND 2 -450 -100 200 R 50 50 1 1 W\nX EN 3 -450 0 200 R 50 50 1 1 I\nX VOUT 5 400 100 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# N25Q032A\n#\nDEF N25Q032A U 0 40 Y Y 1 F N\nF0 \"U\" 300 -350 60 H V C CNN\nF1 \"N25Q032A\" 200 300 60 H V C CNN\nF2 \"\" -200 -250 60 H I C CNN\nF3 \"\" -200 -250 60 H I C CNN\nDRAW\nS -400 250 450 -250 0 1 0 N\nX S# 1 -600 150 200 R 50 50 1 1 I\nX DQ1 2 -600 50 200 R 50 50 1 1 B\nX W#/VPP/DQ2 3 -600 -50 200 R 50 50 1 1 B\nX VSS 4 -600 -150 200 R 50 50 1 1 W\nX DQ0 5 650 -150 200 L 50 50 1 1 B\nX C 6 650 -50 200 L 50 50 1 1 B\nX HOLD#/DQ3 7 650 50 200 L 50 50 1 1 B\nX VCC 8 650 150 200 L 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# NB3N551\n#\nDEF NB3N551 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -350 60 H V C CNN\nF1 \"NB3N551\" 300 400 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS 300 350 -300 -300 0 1 0 N\nX ICLK 1 -500 50 200 R 50 50 1 1 I\nX Q1 2 500 150 200 L 50 50 1 1 O\nX Q2 3 500 50 200 L 50 50 1 1 O\nX Q3 4 500 -50 200 L 50 50 1 1 O\nX Q4 5 500 -150 200 L 50 50 1 1 O\nX GND 6 50 -500 200 U 50 50 1 1 W\nX VDD 7 0 550 200 D 50 50 1 1 W\nX OE 8 -500 -50 200 R 50 50 1 1 I\nX EP EP -50 -500 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# PAT1220\n#\nDEF PAT1220 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -300 60 H V C CNN\nF1 \"PAT1220\" 50 100 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n PAT1220\n$ENDFPLIST\nDRAW\nS -250 50 250 -250 0 1 0 N\nS -175 -50 -125 -150 0 1 0 N\nS -150 -150 -150 -200 0 1 0 N\nS -150 0 -150 -50 0 1 0 N\nS -60 0 -200 0 0 1 0 N\nS -60 25 65 -25 0 1 0 N\nS 125 -50 175 -150 0 1 0 N\nS 150 -200 -150 -200 0 1 0 N\nS 150 -150 150 -200 0 1 0 N\nS 150 -50 150 0 0 1 0 N\nS 200 0 65 0 0 1 0 N\nX ~ 1 -500 0 300 R 60 60 1 1 P\nX ~ 2 500 0 300 L 60 60 1 1 P\nX ~ 3 0 -500 300 U 60 60 1 1 P\nENDDRAW\nENDDEF\n#\n# PE42420\n#\nDEF PE42420 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"PE42420\" 650 400 60 H V C CNN\nF2 \"\" -500 550 60 H I C CNN\nF3 \"\" -500 550 60 H I C CNN\nDRAW\nS -750 -400 850 350 0 1 0 N\nX GND 1 -650 -600 200 U 50 50 1 1 W\nX GND 2 -550 -600 200 U 50 50 1 1 W\nX RF1 3 1050 150 200 L 50 50 1 1 P\nX GND 4 -450 -600 200 U 50 50 1 1 W\nX GND 5 -350 -600 200 U 50 50 1 1 W\nX GND 6 -250 -600 200 U 50 50 1 1 W\nX GND 7 -150 -600 200 U 50 50 1 1 W\nX RFC 8 -950 0 200 R 50 50 1 1 P\nX GND 9 -50 -600 200 U 50 50 1 1 W\nX GND 10 50 -600 200 U 50 50 1 1 W\nX VDD 20 -350 550 200 D 50 50 1 1 W\nX GND 11 150 -600 200 U 50 50 1 1 W\nX GND 12 250 -600 200 U 50 50 1 1 W\nX RF2 13 1050 -100 200 L 50 50 1 1 P\nX GND 14 350 -600 200 U 50 50 1 1 W\nX GND 15 450 -600 200 U 50 50 1 1 W\nX CTRL2 16 250 550 200 D 50 50 1 1 I\nX CTRL1 17 150 550 200 D 50 50 1 1 I\nX GND 18 550 -600 200 U 50 50 1 1 W\nX GND 19 650 -600 200 U 50 50 1 1 W\nX EP EP 750 -600 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# PE42423\n#\nDEF PE42423 U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"PE42423\" 400 350 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS 600 300 -500 -400 0 1 0 N\nX GND 1 -450 -600 200 U 50 50 1 1 W\nX RF1 2 800 100 200 L 50 50 1 1 P\nX GND 3 -350 -600 200 U 50 50 1 1 W\nX GND 4 -250 -600 200 U 50 50 1 1 W\nX GND 5 -150 -600 200 U 50 50 1 1 W\nX GND 6 -50 -600 200 U 50 50 1 1 W\nX RFC 7 -700 0 200 R 50 50 1 1 P\nX GND 8 50 -600 200 U 50 50 1 1 W\nX GND 9 150 -600 200 U 50 50 1 1 W\nX GND 10 250 -600 200 U 50 50 1 1 W\nX RF2 11 800 -100 200 L 50 50 1 1 P\nX GND 12 350 -600 200 U 50 50 1 1 W\nX GND 13 450 -600 200 U 50 50 1 1 W\nX CTRL 14 -150 500 200 D 50 50 1 1 I\nX LS 15 -250 500 200 D 50 50 1 1 I\nX VDD 16 150 500 200 D 50 50 1 1 W\nX EP EP 550 -600 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# PE42441\n#\nDEF PE42441 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"PE42441\" 1050 400 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n VFQFN-32\n$ENDFPLIST\nDRAW\nS -1250 350 1250 -500 0 1 0 N\nX GND 1 -1200 -700 200 U 50 50 1 1 W\nX RF4 2 1450 -200 200 L 50 50 1 1 P\nX GND 3 -1100 -700 200 U 50 50 1 1 W\nX GND 4 -1000 -700 200 U 50 50 1 1 W\nX GND 5 -900 -700 200 U 50 50 1 1 W\nX GND 6 -800 -700 200 U 50 50 1 1 W\nX RF2 7 1450 100 200 L 50 50 1 1 P\nX GND 8 -700 -700 200 U 50 50 1 1 W\nX GND 9 -600 -700 200 U 50 50 1 1 W\nX GND 10 -500 -700 200 U 50 50 1 1 W\nX GND 20 300 -700 200 U 50 50 1 1 W\nX V2 30 -1450 150 200 R 50 50 1 1 I\nX GND 11 -400 -700 200 U 50 50 1 1 W\nX GND 21 400 -700 200 U 50 50 1 1 W\nX GND 31 1000 -700 200 U 50 50 1 1 W\nX GND 12 -300 -700 200 U 50 50 1 1 W\nX GND 22 500 -700 200 U 50 50 1 1 W\nX GND 32 1100 -700 200 U 50 50 1 1 W\nX RFC 13 -1450 0 200 R 50 50 1 1 P\nX RF3 23 1450 -50 200 L 50 50 1 1 P\nX GND 14 -200 -700 200 U 50 50 1 1 W\nX GND 24 600 -700 200 U 50 50 1 1 W\nX GND 15 -100 -700 200 U 50 50 1 1 W\nX GND 25 700 -700 200 U 50 50 1 1 P\nX GND 16 0 -700 200 U 50 50 1 1 W\nX GND 26 800 -700 200 U 50 50 1 1 W\nX GND 17 100 -700 200 U 50 50 1 1 W\nX VDD 27 0 550 200 D 50 50 1 1 W\nX RF1 18 1450 250 200 L 50 50 1 1 P\nX GND 28 900 -700 200 U 50 50 1 1 W\nX GND 19 200 -700 200 U 50 50 1 1 W\nX V1 29 -1450 250 200 R 50 50 1 1 I\nX EP EP 1200 -700 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# PE43711\n#\nDEF PE43711 U 0 40 Y Y 1 F N\nF0 \"U\" 650 -700 60 H V C CNN\nF1 \"PE43711\" 500 600 60 H V C CNN\nF2 \"\" -1300 500 60 H V C CNN\nF3 \"\" -1300 500 60 H V C CNN\nDRAW\nS -650 550 750 -650 0 1 0 N\nX C0.25 1 -850 250 200 R 50 50 1 1 I\nX VDD 2 0 750 200 D 50 50 1 1 W\nX ~P~/S 3 950 -100 200 L 50 50 1 1 I\nX GND 4 -450 -850 200 U 50 50 1 1 W\nX RF1 5 -850 450 200 R 50 50 1 1 P\nX GND 6 -350 -850 200 U 50 50 1 1 W\nX GND 7 -250 -850 200 U 50 50 1 1 W\nX GND 8 -150 -850 200 U 50 50 1 1 W\nX GND 9 -50 -850 200 U 50 50 1 1 W\nX GND 10 50 -850 200 U 50 50 1 1 W\nX C8 20 -850 -250 200 R 50 50 1 1 I\nX GND 11 150 -850 200 U 50 50 1 1 W\nX C4 21 -850 -150 200 R 50 50 1 1 I\nX GND 12 250 -850 200 U 50 50 1 1 W\nX C2 22 -850 -50 200 R 50 50 1 1 I\nX GND 13 350 -850 200 U 50 50 1 1 W\nX C1 23 -850 50 200 R 50 50 1 1 I\nX RF2 14 950 450 200 L 50 50 1 1 P\nX C0.5 24 -850 150 200 R 50 50 1 1 I\nX GND 15 450 -850 200 U 50 50 1 1 W\nX LE 16 950 200 200 L 50 50 1 1 I\nX CLK 17 950 100 200 L 50 50 1 1 I\nX SI 18 950 0 200 L 50 50 1 1 I\nX C16 19 -850 -350 200 R 50 50 1 1 I\nX GND EP 550 -850 200 U 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# RT7243\n#\nDEF RT7243 U 0 40 Y Y 1 F N\nF0 \"U\" 550 -600 60 H V C CNN\nF1 \"RT7243\" 500 550 60 H V C CNN\nF2 \"\" 550 -600 60 H V C CNN\nF3 \"\" 550 -600 60 H V C CNN\nDRAW\nS -650 500 650 -550 0 1 0 N\nX RT/SYNC 1 -850 -300 200 R 50 50 1 1 P\nX GND 2 850 -300 200 L 50 50 1 1 W\nX GND 3 850 -400 200 L 50 50 1 1 W\nX PVIN 4 -850 250 200 R 50 50 1 1 W\nX PVIN 5 -850 150 200 R 50 50 1 1 W\nX VIN 6 -850 400 200 R 50 50 1 1 W\nX FB 7 850 0 200 L 50 50 1 1 I\nX COMP 8 850 -150 200 L 50 50 1 1 P\nX SS/TR 9 -850 -450 200 R 50 50 1 1 P\nX EN 10 -850 0 200 R 50 50 1 1 I\nX LX 11 850 250 200 L 50 50 1 1 w\nX LX 12 850 150 200 L 50 50 1 1 P\nX BOOT 13 850 400 200 L 50 50 1 1 P\nX PGOOD 14 -850 -150 200 R 50 50 1 1 C\nX GND EP 850 -500 200 L 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# SKY13322-375LF\n#\nDEF SKY13322-375LF U 0 40 Y Y 1 F N\nF0 \"U\" 200 -400 60 H V C CNN\nF1 \"SKY13322-375LF\" 0 350 60 H V C CNN\nF2 \"\" 50 350 60 H V C CNN\nF3 \"\" 50 350 60 H V C CNN\nDRAW\nS -250 250 250 -300 0 1 0 N\nX J2 1 450 100 200 L 50 50 1 1 B\nX V2 2 -450 -50 200 R 50 50 1 1 I\nX V1 4 -450 50 200 R 50 50 1 1 I\nX J1 5 450 200 200 L 50 50 1 1 B\nX J3 6 450 0 200 L 50 50 1 1 B\nX V3 7 -450 -150 200 R 50 50 1 1 I\nX RFC 8 -450 200 200 R 50 50 1 1 B\nX V4 9 -450 -250 200 R 50 50 1 1 I\nX J4 10 450 -100 200 L 50 50 1 1 B\nX EP EP 450 -250 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# SMA\n#\nDEF SMA P 0 40 Y Y 1 F N\nF0 \"P\" 150 0 60 H V C CNN\nF1 \"SMA\" 0 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nC 0 0 22 0 1 0 N\nS -50 -50 50 50 0 1 0 N\nP 2 0 1 0 -100 0 -50 0 N\nX ~ 1 -200 0 100 R 50 50 1 1 P\nX ~ 2 0 -150 100 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# ST1S10\n#\nDEF ST1S10 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -400 60 H V C CNN\nF1 \"ST1S10\" 150 350 60 H V C CNN\nF2 \"\" 0 -250 60 H V C CNN\nF3 \"\" 0 -250 60 H V C CNN\nDRAW\nS -400 300 350 -350 0 1 0 N\nX VIN_A 1 -600 100 200 R 50 50 1 1 W\nX EN 2 -600 0 200 R 50 50 1 1 I\nX VFB 3 550 -50 200 L 50 50 1 1 I\nX AGND 4 100 -550 200 U 50 50 1 1 W\nX SYNC 5 -600 -150 200 R 50 50 1 1 I\nX VIN_SW 6 -600 200 200 R 50 50 1 1 W\nX SW 7 550 200 200 L 50 50 1 1 w\nX PGND 8 0 -550 200 U 50 50 1 1 W\nX EP 9 -100 -550 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# TCM1-63AX+\n#\nDEF TCM1-63AX+ T 0 40 Y Y 1 F N\nF0 \"T\" 0 250 60 H V C CNN\nF1 \"TCM1-63AX+\" 50 550 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -350 500 300 0 0 1 0 N\nX NC 1 -100 -200 200 U 50 50 1 1 P\nX P 2 -550 200 200 R 50 50 1 1 P\nX PDOT 3 -550 350 200 R 50 50 1 1 P\nX S 4 500 200 200 L 50 50 1 1 P\nX NC 5 50 -200 200 U 50 50 1 1 P\nX SDOT 6 500 350 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# TRF37A75\n#\nDEF TRF37A75 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -350 60 H V C CNN\nF1 \"TRF37A75\" 250 400 60 H V C CNN\nF2 \"\" -200 -50 60 H V C CNN\nF3 \"\" -200 -50 60 H V C CNN\nDRAW\nS -350 350 350 -300 0 1 0 N\nX VCC 1 0 550 200 D 50 50 1 1 W\nX RFIN 2 -550 150 200 R 50 50 1 1 I\nX NC 3 -100 -500 200 U 50 50 1 1 P\nX NC 4 0 -500 200 U 50 50 1 1 P\nX PWDN 5 -550 0 200 R 50 50 1 1 I\nX NC 6 100 -500 200 U 50 50 1 1 P\nX RFOUT 7 550 50 200 L 50 50 1 1 O\nX NC 8 200 -500 200 U 50 50 1 1 P\nX GND 9 -200 -500 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# TSV911\n#\nDEF TSV911 U 0 20 Y Y 1 F N\nF0 \"U\" 150 150 60 H V C CNN\nF1 \"TSV911\" 200 -200 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N\nX ~ 1 500 0 300 L 40 40 1 1 C\nX V- 2 -100 -400 250 U 40 40 1 1 W\nX + 3 -500 100 300 R 40 40 1 1 I\nX _ 4 -500 -100 300 R 40 40 1 1 I\nX V+ 5 -100 400 250 D 40 40 1 1 W\nENDDRAW\nENDDEF\n#\n# USB-MICRO\n#\nDEF USB-MICRO U 0 40 Y Y 1 F N\nF0 \"U\" -50 50 60 H V C CNN\nF1 \"USB-MICRO\" -150 300 60 H V C CNN\nF2 \"\" 50 -250 60 H V C CNN\nF3 \"\" 50 -250 60 H V C CNN\n$FPLIST\n MICRO-B_USB\n *MICRO*USB\n$ENDFPLIST\nDRAW\nS -450 350 350 -350 0 1 0 N\nX VCC 1 650 250 300 L 50 50 1 1 w\nX D- 2 650 150 300 L 50 50 1 1 B\nX D+ 3 650 50 300 L 50 50 1 1 B\nX ID 4 650 -50 300 L 50 50 1 1 B\nX GND 5 650 -150 300 L 50 50 1 1 w\nX SHIELD SH 650 -250 300 L 60 60 1 1 B\nENDDRAW\nENDDEF\n#\n# Via\n#\nDEF Via F 0 40 Y Y 1 F N\nF0 \"F\" 0 200 60 H V C CNN\nF1 \"Via\" 250 0 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -50 50 50 -100 0 1 0 N\nP 2 0 1 0 -50 -250 50 -250 N\nP 3 0 1 0 -50 -200 0 -200 0 -250 N\nX ~ 1 -200 0 200 R 50 50 1 1 I\nX ~ 2 -200 -200 200 R 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# W25Q32FV\n#\nDEF W25Q32FV U 0 40 Y Y 1 F N\nF0 \"U\" 300 -250 60 H V C CNN\nF1 \"W25Q32FV\" 150 250 60 H V C CNN\nF2 \"\" -200 -200 60 H V C CNN\nF3 \"\" -200 -200 60 H V C CNN\nDRAW\nS -300 -200 350 200 0 1 0 N\nX ~CS 1 -500 150 200 R 40 40 1 1 I\nX DO/IO1 2 -500 50 200 R 40 40 1 1 B\nX ~WP~/IO2 3 -500 -50 200 R 40 40 1 1 B\nX GND 4 -500 -150 200 R 40 40 1 1 W\nX DI/IO0 5 550 -150 200 L 40 40 1 1 B\nX CLK 6 550 -50 200 L 40 40 1 1 I\nX ~HOLD~/IO3 7 550 50 200 L 40 40 1 1 B\nX VCC 8 550 150 200 L 40 40 1 1 W\nENDDRAW\nENDDEF\n#\n# W25Q32JV\n#\nDEF W25Q32JV U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"W25Q32JV\" 300 350 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -500 250 550 -250 0 1 0 N\nX ~CS 1 -700 150 200 R 50 50 1 1 I\nX DO(IO1) 2 -700 50 200 R 50 50 1 1 O\nX ~WP~(IO2) 3 -700 -50 200 R 50 50 1 1 B\nX GND 4 -700 -150 200 R 50 50 1 1 W\nX DI(IO0) 5 750 -150 200 L 50 50 1 1 I\nX CLK 6 750 -50 200 L 50 50 1 1 I\nX ~HOLD~(IO3) 7 750 50 200 L 50 50 1 1 B\nX VCC 8 750 150 200 L 50 50 1 1 W\nX EP 9 0 -450 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# XC6SLX4-2TQG144C\n#\nDEF XC6SLX4-2TQG144C U 0 40 Y Y 6 L N\nF0 \"U\" 600 -1850 50 H V C CNN\nF1 \"XC6SLX4-2TQG144C\" 500 1500 50 H V C CNN\nF2 \"MODULE\" 0 -1850 50 H I C CNN\nF3 \"DOCUMENTATION\" 150 -2000 50 H I C CNN\nDRAW\nS -200 1250 950 -1750 1 1 0 N\nX IO_L62N_VREF_0 120 -500 350 300 R 50 50 1 1 B\nX IO_L3P_0 140 -500 -950 300 R 50 50 1 1 B\nX IO_L66N_SCP0_0 111 -500 1150 300 R 50 50 1 1 B\nX IO_L62P_0 121 -500 250 300 R 50 50 1 1 B\nX IO_L35N_GCLK16_0 131 -500 -250 300 R 50 50 1 1 B\nX IO_L2N_0 141 -500 -1050 300 R 50 50 1 1 B\nX IO_L66P_SCP1_0 112 -500 1050 300 R 50 50 1 1 B\nX VCCO_0 122 -500 -1450 300 R 50 50 1 1 W\nX IO_L35P_GCLK17_0 132 -500 -350 300 R 50 50 1 1 B\nX IO_L2P_0 142 -500 -1150 300 R 50 50 1 1 B\nX IO_L37N_GCLK12_0 123 -500 150 300 R 50 50 1 1 B\nX IO_L34N_GCLK18_0 133 -500 -450 300 R 50 50 1 1 B\nX IO_L1N_VREF_0 143 -500 -1250 300 R 50 50 1 1 B\nX IO_L65N_SCP2_0 114 -500 950 300 R 50 50 1 1 B\nX IO_L37P_GCLK13_0 124 -500 50 300 R 50 50 1 1 B\nX IO_L34P_GCLK19_0 134 -500 -550 300 R 50 50 1 1 B\nX IO_L1P_HSWAPEN_0 144 -500 -1350 300 R 50 50 1 1 I\nX IO_L65P_SCP3_0 115 -500 850 300 R 50 50 1 1 B\nX VCCO_0 125 -500 -1550 300 R 50 50 1 1 W\nX VCCO_0 135 -500 -1650 300 R 50 50 1 1 W\nX IO_L64N_SCP4_0 116 -500 750 300 R 50 50 1 1 B\nX IO_L36N_GCLK14_0 126 -500 -50 300 R 50 50 1 1 B\nX IO_L64P_SCP5_0 117 -500 650 300 R 50 50 1 1 B\nX IO_L36P_GCLK15_0 127 -500 -150 300 R 50 50 1 1 B\nX IO_L4N_0 137 -500 -650 300 R 50 50 1 1 B\nX IO_L63N_SCP6_0 118 -500 550 300 R 50 50 1 1 B\nX IO_L4P_0 138 -500 -750 300 R 50 50 1 1 B\nX IO_L63P_SCP7_0 119 -500 450 300 R 50 50 1 1 B\nX IO_L3N_0 139 -500 -850 300 R 50 50 1 1 B\nS -200 1250 900 -1700 2 1 0 N\nX IO_L46N_1 80 -500 700 300 R 50 50 2 1 B\nX IO_L46P_1 81 -500 600 300 R 50 50 2 1 B\nX IO_L45N_1 82 -500 500 300 R 50 50 2 1 B\nX IO_L41N_GCLK8_1 92 -500 -100 300 R 50 50 2 1 B\nX IO_L45P_1 83 -500 400 300 R 50 50 2 1 B\nX IO_L41P_GCLK9_IRDY1_1 93 -500 -200 300 R 50 50 2 1 B\nX IO_L74N_DOUT_BUSY_1 74 -500 1100 300 R 50 50 2 1 B\nX IO_L43N_GCLK4_1 84 -500 300 300 R 50 50 2 1 B\nX IO_L40N_GCLK10_1 94 -500 -300 300 R 50 50 2 1 B\nX IO_L74P_AWAKE_1 75 -500 1000 300 R 50 50 2 1 B\nX IO_L43P_GCLK5_1 85 -500 200 300 R 50 50 2 1 B\nX IO_L40P_GCLK11_1 95 -500 -400 300 R 50 50 2 1 B\nX VCCO_1 76 -500 -1300 300 R 50 50 2 1 W\nX VCCO_1 86 -500 -1400 300 R 50 50 2 1 W\nX IO_L42N_GCLK6_TRDY1_1 87 -500 100 300 R 50 50 2 1 B\nX IO_L34N_1 97 -500 -500 300 R 50 50 2 1 B\nX IO_L47N_1 78 -500 900 300 R 50 50 2 1 B\nX IO_L42P_GCLK7_1 88 -500 0 300 R 50 50 2 1 B\nX IO_L34P_1 98 -500 -600 300 R 50 50 2 1 B\nX IO_L47P_1 79 -500 800 300 R 50 50 2 1 B\nX IO_L33N_1 99 -500 -700 300 R 50 50 2 1 B\nX IO_L33P_1 100 -500 -800 300 R 50 50 2 1 B\nX IO_L32N_1 101 -500 -900 300 R 50 50 2 1 B\nX IO_L32P_1 102 -500 -1000 300 R 50 50 2 1 B\nX VCCO_1 103 -500 -1500 300 R 50 50 2 1 W\nX IO_L1N_VERF_1 104 -500 -1100 300 R 50 50 2 1 B\nX IO_L1P_1 105 -500 -1200 300 R 50 50 2 1 B\nS -350 1450 900 -1750 3 1 0 N\nX IO_L64N_D9_2 40 -650 1150 300 R 50 50 3 1 B\nX IO_L31N_GCLK310_D15_2 50 -650 350 300 R 50 50 3 1 B\nX IO_L13P_M1_2 60 -650 -350 300 R 50 50 3 1 B\nX IO_L1P_CCLK_2 70 -650 -1150 300 R 50 50 3 1 B\nX IO_L64P_D8_2 41 -650 1050 300 R 50 50 3 1 B\nX IO_L31P_GCLK31_D14_2 51 -650 250 300 R 50 50 3 1 B\nX IO_L12N_D2_MISO3_2 61 -650 -450 300 R 50 50 3 1 B\nX DONE_2 71 -650 -1350 300 R 50 50 3 1 B\nX VCCO_2 42 -650 -1550 300 R 50 50 3 1 W\nX IO_L12P_D1_MISO2_2 62 -650 -550 300 R 50 50 3 1 B\nX CMPCS_B_2 72 -650 -1250 300 R 50 50 3 1 I\nX IO_L62N_D6_2 43 -650 950 300 R 50 50 3 1 B\nX VCCO_2 63 -650 -1650 300 R 50 50 3 1 W\nX IO_L62P_D5_2 44 -650 850 300 R 50 50 3 1 B\nX IO_L3N_MOSI_CSI_B_MISO0_2 64 -650 -650 300 R 50 50 3 1 B\nX IO_L49N_D4_2 45 -650 750 300 R 50 50 3 1 B\nX IO_L30N_GCLK0_USERCCLK_2 55 -650 150 300 R 50 50 3 1 B\nX IO_L3P_D0_DIN_MISO_MISO1_2 65 -650 -750 300 R 50 50 3 1 B\nX IO_L49P_D3_2 46 -650 650 300 R 50 50 3 1 B\nX IO_L30P_GCLK1_D13_2 56 -650 50 300 R 50 50 3 1 B\nX IO_L2N_CMPMOST_2 66 -650 -850 300 R 50 50 3 1 B\nX PROGRAM_B_2 37 -650 -1450 300 R 50 50 3 1 I\nX IO_L48N_RDWR_B_VREF_2 47 -650 550 300 R 50 50 3 1 B\nX IO_L14N_D11_2 57 -650 -50 300 R 50 50 3 1 B\nX IO_L2P_CMPCLK_2 67 -650 -950 300 R 50 50 3 1 B\nX IO_L65N_CSO_B_2 38 -650 1350 300 R 50 50 3 1 B\nX IO_L48P_D7_2 48 -650 450 300 R 50 50 3 1 B\nX IO_L14P_D11_2 58 -650 -150 300 R 50 50 3 1 B\nX IO_L65P_INIT_B_2 39 -650 1250 300 R 50 50 3 1 B\nX IO_L13N_D10_2 59 -650 -250 300 R 50 50 3 1 B\nX IO_L1N_M0_CMPMISO_2 69 -650 -1050 300 R 50 50 3 1 B\nS -400 1350 800 -1700 4 1 0 N\nX IO_L83N_VREF_3 1 -700 1250 300 R 50 50 4 1 B\nX IO_83P_3 2 -700 1150 300 R 50 50 4 1 B\nX VCCO_3 4 -700 -1350 300 R 50 50 4 1 W\nX IO_L52N_3 5 -700 1050 300 R 50 50 4 1 B\nX IO_L52P_3 6 -700 950 300 R 50 50 4 1 B\nX IO_L51N_3 7 -700 850 300 R 50 50 4 1 B\nX IO_L51P_3 8 -700 750 300 R 50 50 4 1 B\nX IO_L50N_3 9 -700 650 300 R 50 50 4 1 B\nX IO_L50P_3 10 -700 550 300 R 50 50 4 1 B\nX IO_L36P_3 30 -700 -850 300 R 50 50 4 1 B\nX IO_L49N_3 11 -700 450 300 R 50 50 4 1 B\nX IO_L42N_GCLK24_3 21 -700 -150 300 R 50 50 4 1 B\nX VCCO_3 31 -700 -1550 300 R 50 50 4 1 W\nX IO_L49P_3 12 -700 350 300 R 50 50 4 1 B\nX IO_L42P_GCLK25_TRDY2_3 22 -700 -250 300 R 50 50 4 1 B\nX IO_L2N_3 32 -700 -950 300 R 50 50 4 1 B\nX IO_L41N_GCLK26_3 23 -700 -350 300 R 50 50 4 1 B\nX IO_L2P_3 33 -700 -1050 300 R 50 50 4 1 B\nX IO_L44N_GCLK20_3 14 -700 250 300 R 50 50 4 1 B\nX IO_L41P_GCLK27_3 24 -700 -450 300 R 50 50 4 1 B\nX IO_L1N_VREF_3 34 -700 -1150 300 R 50 50 4 1 B\nX IO_L44P_GCLK21_3 15 -700 150 300 R 50 50 4 1 B\nX IO_L1P_3 35 -700 -1250 300 R 50 50 4 1 B\nX IO_L43N_GCLK22_IRDY2_3 16 -700 50 300 R 50 50 4 1 B\nX IO_L37N_3 26 -700 -550 300 R 50 50 4 1 B\nX IO_L43P_GCLK23_3 17 -700 -50 300 R 50 50 4 1 B\nX IO_L37P_3 27 -700 -650 300 R 50 50 4 1 B\nX VCCO_3 18 -700 -1450 300 R 50 50 4 1 W\nX IO_L36N_3 29 -700 -750 300 R 50 50 4 1 B\nS -250 400 350 -350 5 1 0 N\nX SUSPEND 73 -550 -200 300 R 50 50 5 1 I\nX TDI 110 -550 150 300 R 50 50 5 1 I\nX TDO 106 -550 50 300 R 50 50 5 1 O\nX TMS 107 -550 -50 300 R 50 50 5 1 I\nX TCK 109 -550 250 300 R 50 50 5 1 I\nS -250 1050 500 -1300 6 1 0 N\nX GND0 3 -550 -50 300 R 50 50 6 1 W\nX VCCAUX0 20 -550 950 300 R 50 50 6 1 W\nX VCCAUX3 90 -550 650 300 R 50 50 6 1 W\nX GND7 91 -550 -750 300 R 50 50 6 1 W\nX VCCINT2 52 -550 250 300 R 50 50 6 1 W\nX GND1 13 -550 -150 300 R 50 50 6 1 W\nX VCCAUX2 53 -550 750 300 R 50 50 6 1 W\nX GND4 54 -550 -450 300 R 50 50 6 1 W\nX GND2 25 -550 -250 300 R 50 50 6 1 W\nX VCCAUX1 36 -550 850 300 R 50 50 6 1 W\nX GND8 96 -550 -850 300 R 50 50 6 1 W\nX GND6 77 -550 -650 300 R 50 50 6 1 W\nX VCCINT1 28 -550 350 300 R 50 50 6 1 W\nX GND5 68 -550 -550 300 R 50 50 6 1 W\nX VCCINT0 19 -550 450 300 R 50 50 6 1 W\nX GND3 49 -550 -350 300 R 50 50 6 1 W\nX VCCINT3 89 -550 150 300 R 50 50 6 1 W\nX GND11 130 -550 -1150 300 R 50 50 6 1 W\nX GND10 113 -550 -1050 300 R 50 50 6 1 W\nX GND12 136 -550 -1250 300 R 50 50 6 1 W\nX GND9 108 -550 -950 300 R 50 50 6 1 W\nX VCCINT4 128 -550 50 300 R 50 50 6 1 W\nX VCCAUX4 129 -550 550 300 R 50 50 6 1 W\nENDDRAW\nENDDEF\n#\n# XC7A15T-1FTG256C\n#\nDEF XC7A15T-1FTG256C U 0 40 Y Y 7 L N\nF0 \"U\" 50 -3300 50 H V C CNN\nF1 \"XC7A15T-1FTG256C\" 150 2300 50 H V C CNN\nF2 \"MODULE\" 50 -3200 50 H I C CNN\nF3 \"DOCUMENTATION\" 50 -3200 50 H I C CNN\nDRAW\nS -600 2150 650 -3050 1 1 0 N\nX IO_L2P_T0_AD8P_15 A8 -900 2000 300 R 50 50 1 1 B\nX IO_L1P_T0_AD0P_15 C8 -900 600 300 R 50 50 1 1 B\nX IO_L6P_T0_15 D8 -900 -100 300 R 50 50 1 1 B\nX IO_L2N_T0_AD8N_15 A9 -900 1900 300 R 50 50 1 1 B\nX IO_L3P_T0_DQS_AD1P_15 B9 -900 1300 300 R 50 50 1 1 B\nX IO_L1N_T0_AD0N_15 C9 -900 500 300 R 50 50 1 1 B\nX IO_L6N_T0_VREF_15 D9 -900 -200 300 R 50 50 1 1 B\nX IO_L3N_T0_DQS_AD1N_15 A10 -900 1800 300 R 50 50 1 1 B\nX IO_L4P_T0_15 B10 -900 1200 300 R 50 50 1 1 B\nX IO_0_15 D10 -900 -300 300 R 50 50 1 1 B\nX IO_L4N_T0_15 B11 -900 1100 300 R 50 50 1 1 B\nX IO_L11P_T1_SRCC_15 C11 -900 400 300 R 50 50 1 1 B\nX IO_L14N_T2_SRCC_15 D11 -900 -400 300 R 50 50 1 1 B\nX IO_L14P_T2_SRCC_15 E11 -900 -900 300 R 50 50 1 1 B\nX IO_25_15 G11 -900 -1800 300 R 50 50 1 1 B\nX IO_L19P_T3_A22_15 H11 -900 -2300 300 R 50 50 1 1 B\nX IO_L5N_T0_AD9N_15 A12 -900 1700 300 R 50 50 1 1 B\nX IO_L5P_T0_AD9P_15 B12 -900 1000 300 R 50 50 1 1 B\nX IO_L11N_T1_SRCC_15 C12 -900 300 300 R 50 50 1 1 B\nX IO_L13P_T2_MRCC_15 E12 -900 -1000 300 R 50 50 1 1 B\nX IO_L16P_T2_A28_15 F12 -900 -1400 300 R 50 50 1 1 B\nX IO_L19N_T3_A21_VREF_15 G12 -900 -1900 300 R 50 50 1 1 B\nX IO_L20P_T3_A20_15 H12 -900 -2400 300 R 50 50 1 1 B\nX IO_L7P_T1_AD2P_15 A13 -900 1600 300 R 50 50 1 1 B\nX IO_L12N_T1_MRCC_15 C13 -900 200 300 R 50 50 1 1 B\nX IO_L12P_T1_MRCC_15 D13 -900 -500 300 R 50 50 1 1 B\nX IO_L13N_T2_MRCC_15 E13 -900 -1100 300 R 50 50 1 1 B\nX IO_L16N_T2_A27_15 F13 -900 -1500 300 R 50 50 1 1 B\nX IO_L20N_T3_A19_15 H13 -900 -2500 300 R 50 50 1 1 B\nX IO_L7N_T1_AD2N_15 A14 -900 1500 300 R 50 50 1 1 B\nX IO_L8N_T1_AD10N_15 B14 -900 900 300 R 50 50 1 1 B\nX IO_L8P_T1_AD10P_15 C14 -900 100 300 R 50 50 1 1 B\nX IO_L15P_T2_DQS_15 D14 -900 -600 300 R 50 50 1 1 B\nX IO_L21N_T3_DQS_A18_15 F14 -900 -1600 300 R 50 50 1 1 B\nX IO_L21P_T3_DQS_15 G14 -900 -2000 300 R 50 50 1 1 B\nX IO_L24P_T3_RS1_15 H14 -900 -2600 300 R 50 50 1 1 B\nX IO_L9N_T1_DQS_AD3N_15 A15 -900 1400 300 R 50 50 1 1 B\nX IO_L9P_T1_DQS_AD3P_15 B15 -900 800 300 R 50 50 1 1 B\nX IO_L15N_T2_DQS_ADV_B_15 D15 -900 -700 300 R 50 50 1 1 B\nX IO_L18N_T2_A23_15 E15 -900 -1200 300 R 50 50 1 1 B\nX IO_L18P_T2_A24_15 F15 -900 -1700 300 R 50 50 1 1 B\nX IO_L24N_T3_RS0_15 G15 -900 -2100 300 R 50 50 1 1 B\nX IO_L23P_T3_FOE_B_15 J15 -900 -2800 300 R 50 50 1 1 B\nX IO_L10N_T1_AD11N_15 B16 -900 700 300 R 50 50 1 1 B\nX IO_L10P_T1_AD11P_15 C16 -900 0 300 R 50 50 1 1 B\nX IO_L17N_T2_A25_15 D16 -900 -800 300 R 50 50 1 1 B\nX IO_L17P_T2_A26_15 E16 -900 -1300 300 R 50 50 1 1 B\nX IO_L22N_T3_A16_15 G16 -900 -2200 300 R 50 50 1 1 B\nX IO_L22P_T3_A17_15 H16 -900 -2700 300 R 50 50 1 1 B\nX IO_L23N_T3_FWE_B_15 J16 -900 -2900 300 R 50 50 1 1 B\nS -500 2200 650 -3000 2 1 0 N\nX IO_L9N_T1_DQS_AD7N_35 B1 -800 1550 300 R 50 50 2 1 B\nX IO_L9P_T1_DQS_AD7P_35 C1 -800 950 300 R 50 50 2 1 B\nX IO_L10N_T1_AD15N_35 D1 -800 350 300 R 50 50 2 1 B\nX IO_L15N_T2_DQS_35 E1 -800 -150 300 R 50 50 2 1 B\nX IO_L17N_T2_35 G1 -800 -1050 300 R 50 50 2 1 B\nX IO_L20N_T3_35 H1 -800 -1450 300 R 50 50 2 1 B\nX IO_L22N_T3_35 J1 -800 -1950 300 R 50 50 2 1 B\nX IO_L22P_T3_35 K1 -800 -2350 300 R 50 50 2 1 B\nX IO_L8N_T1_AD14N_35 A2 -800 2050 300 R 50 50 2 1 B\nX IO_L8P_T1_AD14P_35 B2 -800 1450 300 R 50 50 2 1 B\nX IO_L7N_T1_AD6N_35 C2 -800 850 300 R 50 50 2 1 B\nX IO_L10P_T1_AD15P_35 E2 -800 -250 300 R 50 50 2 1 B\nX IO_L15P_T2_DQS_35 F2 -800 -650 300 R 50 50 2 1 B\nX IO_L17P_T2_35 G2 -800 -1150 300 R 50 50 2 1 B\nX IO_L20P_T3_35 H2 -800 -1550 300 R 50 50 2 1 B\nX IO_L24N_T3_35 K2 -800 -2450 300 R 50 50 2 1 B\nX IO_L23N_T3_35 L2 -800 -2750 300 R 50 50 2 1 B\nX IO_L4N_T0_35 A3 -800 1950 300 R 50 50 2 1 B\nX IO_L7P_T1_AD6P_35 C3 -800 750 300 R 50 50 2 1 B\nX IO_L11N_T1_SRCC_35 D3 -800 250 300 R 50 50 2 1 B\nX IO_L11P_T1_SRCC_35 E3 -800 -350 300 R 50 50 2 1 B\nX IO_L14N_T2_SRCC_35 F3 -800 -750 300 R 50 50 2 1 B\nX IO_L21N_T3_DQS_35 H3 -800 -1650 300 R 50 50 2 1 B\nX IO_L21P_T3_DQS_35 J3 -800 -2050 300 R 50 50 2 1 B\nX IO_L24P_T3_35 K3 -800 -2550 300 R 50 50 2 1 B\nX IO_L23P_T3_35 L3 -800 -2850 300 R 50 50 2 1 B\nX IO_L3N_T0_DQS_AD5N_35 A4 -800 1850 300 R 50 50 2 1 B\nX IO_L4P_T0_35 B4 -800 1350 300 R 50 50 2 1 B\nX IO_L12N_T1_MRCC_35 C4 -800 650 300 R 50 50 2 1 B\nX IO_L12P_T1_MRCC_35 D4 -800 150 300 R 50 50 2 1 B\nX IO_L14P_T2_SRCC_35 F4 -800 -850 300 R 50 50 2 1 B\nX IO_L16N_T2_35 G4 -800 -1250 300 R 50 50 2 1 B\nX IO_L18N_T2_35 H4 -800 -1750 300 R 50 50 2 1 B\nX IO_L19N_T3_VREF_35 J4 -800 -2150 300 R 50 50 2 1 B\nX IO_L3P_T0_DQS_AD5P_35 A5 -800 1750 300 R 50 50 2 1 B\nX IO_L2N_T0_AD12N_35 B5 -800 1250 300 R 50 50 2 1 B\nX IO_L6N_T0_VREF_35 D5 -800 50 300 R 50 50 2 1 B\nX IO_L13N_T2_MRCC_35 E5 -800 -450 300 R 50 50 2 1 B\nX IO_L13P_T2_MRCC_35 F5 -800 -950 300 R 50 50 2 1 B\nX IO_L16P_T2_35 G5 -800 -1350 300 R 50 50 2 1 B\nX IO_L18P_T2_35 H5 -800 -1850 300 R 50 50 2 1 B\nX IO_L19P_T3_35 J5 -800 -2250 300 R 50 50 2 1 B\nX IO_25_35 K5 -800 -2650 300 R 50 50 2 1 B\nX IO_L2P_T0_AD12P_35 B6 -800 1150 300 R 50 50 2 1 B\nX IO_L5N_T0_AD13N_35 C6 -800 550 300 R 50 50 2 1 B\nX IO_L6P_T0_35 D6 -800 -50 300 R 50 50 2 1 B\nX IO_0_35 E6 -800 -550 300 R 50 50 2 1 B\nX IO_L1N_T0_AD4N_35 A7 -800 1650 300 R 50 50 2 1 B\nX IO_L1P_T0_AD4P_35 B7 -800 1050 300 R 50 50 2 1 B\nX IO_L5P_T0_AD13P_35 C7 -800 450 300 R 50 50 2 1 B\nS -600 2200 800 -3050 3 1 0 N\nX IO_L23P_T3_A03_D19_14 R5 -900 -1050 300 R 50 50 3 1 B\nX IO_L23N_T3_A02_D18_14 T5 -900 -2050 300 R 50 50 3 1 B\nX IO_L19P_T3_A10_D26_14 M6 -900 1050 300 R 50 50 3 1 B\nX IO_L19N_T3_A09_D25_VREF_14 N6 -900 550 300 R 50 50 3 1 B\nX IO_25_14 P6 -900 -150 300 R 50 50 3 1 B\nX IO_L24P_T3_A01_D17_14 R6 -900 -1150 300 R 50 50 3 1 B\nX IO_L24N_T3_A00_D16_14 R7 -900 -1250 300 R 50 50 3 1 B\nX IO_L21P_T3_DQS_14 T7 -900 -2150 300 R 50 50 3 1 B\nX IO_L20P_T3_A08_D24_14 P8 -900 -250 300 R 50 50 3 1 B\nX IO_L20N_T3_A07_D23_14 R8 -900 -1350 300 R 50 50 3 1 B\nX IO_L21N_T3_DQS_A06_D22_14 T8 -900 -2250 300 R 50 50 3 1 B\nX IO_L18P_T2_A12_D28_14 N9 -900 450 300 R 50 50 3 1 B\nX IO_L18N_T2_A11_D27_14 P9 -900 -350 300 R 50 50 3 1 B\nX IO_L22P_T3_A05_D21_14 T9 -900 -2350 300 R 50 50 3 1 B\nX IO_L14P_T2_SRCC_14 P10 -900 -450 300 R 50 50 3 1 B\nX IO_L17P_T2_A14_D30_14 R10 -900 -1450 300 R 50 50 3 1 B\nX IO_L22N_T3_A04_D20_14 T10 -900 -2450 300 R 50 50 3 1 B\nX IO_L13P_T2_MRCC_14 N11 -900 350 300 R 50 50 3 1 B\nX IO_L14N_T2_SRCC_14 P11 -900 -550 300 R 50 50 3 1 B\nX IO_L17N_T2_A13_D29_14 R11 -900 -1550 300 R 50 50 3 1 B\nX IO_0_14 K12 -900 1850 300 R 50 50 3 1 B\nX IO_L6P_T0_FCS_B_14 L12 -900 1450 300 R 50 50 3 1 B\nX IO_L6N_T0_D08_VREF_14 M12 -900 950 300 R 50 50 3 1 B\nX IO_L13N_T2_MRCC_14 N12 -900 250 300 R 50 50 3 1 B\nX IO_L15P_T2_DQS_RDWR_B_14 R12 -900 -1650 300 R 50 50 3 1 B\nX IO_L15N_T2_DQS_DOUT_CSO_B_14 T12 -900 -2550 300 R 50 50 3 1 B\nX IO_L1P_T0_D00_MOSI_14 J13 -900 2050 300 R 50 50 3 1 B\nX IO_L5P_T0_D06_14 K13 -900 1750 300 R 50 50 3 1 B\nX IO_L5N_T0_D07_14 L13 -900 1350 300 R 50 50 3 1 B\nX IO_L11P_T1_SRCC_14 N13 -900 150 300 R 50 50 3 1 B\nX IO_L11N_T1_SRCC_14 P13 -900 -650 300 R 50 50 3 1 B\nX IO_L16P_T2_CSI_B_14 R13 -900 -1750 300 R 50 50 3 1 B\nX IO_L16N_T2_A15_D31_14 T13 -900 -2650 300 R 50 50 3 1 B\nX IO_L1N_T0_D01_DIN_14 J14 -900 1950 300 R 50 50 3 1 B\nX IO_L4P_T0_D04_14 L14 -900 1250 300 R 50 50 3 1 B\nX IO_L4N_T0_D05_14 M14 -900 850 300 R 50 50 3 1 B\nX IO_L12P_T1_MRCC_14 N14 -900 50 300 R 50 50 3 1 B\nX IO_L12N_T1_MRCC_14 P14 -900 -750 300 R 50 50 3 1 B\nX IO_L10P_T1_D14_14 T14 -900 -2750 300 R 50 50 3 1 B\nX IO_L2P_T0_D02_14 K15 -900 1650 300 R 50 50 3 1 B\nX IO_L3P_T0_DQS_PUDC_B_14 L15 -900 1150 300 R 50 50 3 1 B\nX IO_L3N_T0_DQS_EMCCLK_14 M15 -900 750 300 R 50 50 3 1 B\nX IO_L8P_T1_D11_14 P15 -900 -850 300 R 50 50 3 1 B\nX IO_L9P_T1_DQS_14 R15 -900 -1850 300 R 50 50 3 1 B\nX IO_L10N_T1_D15_14 T15 -900 -2850 300 R 50 50 3 1 B\nX IO_L2N_T0_D03_14 K16 -900 1550 300 R 50 50 3 1 B\nX IO_L7P_T1_D09_14 M16 -900 650 300 R 50 50 3 1 B\nX IO_L7N_T1_D10_14 N16 -900 -50 300 R 50 50 3 1 B\nX IO_L8N_T1_D12_14 P16 -900 -950 300 R 50 50 3 1 B\nX IO_L9N_T1_DQS_D13_14 R16 -900 -1950 300 R 50 50 3 1 B\nS -250 1150 750 -1050 4 1 0 N\nX IO_L2N_T0_34 M1 -550 800 300 R 50 50 4 1 B\nX IO_L4P_T0_34 N1 -550 400 300 R 50 50 4 1 B\nX IO_L4N_T0_34 P1 -550 0 300 R 50 50 4 1 B\nX IO_L7N_T1_34 R1 -550 -400 300 R 50 50 4 1 B\nX IO_L2P_T0_34 M2 -550 700 300 R 50 50 4 1 B\nX IO_L3N_T0_DQS_34 N2 -550 300 300 R 50 50 4 1 B\nX IO_L7P_T1_34 R2 -550 -500 300 R 50 50 4 1 B\nX IO_L8N_T1_34 T2 -550 -700 300 R 50 50 4 1 B\nX IO_L3P_T0_DQS_34 N3 -550 200 300 R 50 50 4 1 B\nX IO_L5N_T0_34 P3 -550 -100 300 R 50 50 4 1 B\nX IO_L8P_T1_34 R3 -550 -600 300 R 50 50 4 1 B\nX IO_L9N_T1_DQS_34 T3 -550 -800 300 R 50 50 4 1 B\nX IO_L1P_T0_34 L4 -550 1000 300 R 50 50 4 1 B\nX IO_L1N_T0_34 M4 -550 600 300 R 50 50 4 1 B\nX IO_L6N_T0_VREF_34 N4 -550 100 300 R 50 50 4 1 B\nX IO_L5P_T0_34 P4 -550 -200 300 R 50 50 4 1 B\nX IO_L9P_T1_DQS_34 T4 -550 -900 300 R 50 50 4 1 B\nX IO_0_34 L5 -550 900 300 R 50 50 4 1 B\nX IO_L6P_T0_34 M5 -550 500 300 R 50 50 4 1 B\nX IO_L10P_T1_34 P5 -550 -300 300 R 50 50 4 1 B\nS -200 550 400 -600 5 1 0 N\nX GNDADC_0 G7 -500 -450 300 R 50 50 5 1 W\nX VREFN_0 H7 -500 50 300 R 50 50 5 1 I\nX VN_0 J7 -500 -200 300 R 50 50 5 1 I\nX DXN_0 K7 -500 300 300 R 50 50 5 1 P\nX VCCADC_0 G8 -500 -350 300 R 50 50 5 1 W\nX VP_0 H8 -500 -100 300 R 50 50 5 1 I\nX VREFP_0 J8 -500 150 300 R 50 50 5 1 I\nX DXP_0 K8 -500 400 300 R 50 50 5 1 P\nS -300 600 350 -800 6 1 0 N\nX CFGBVS_0 E7 -600 500 300 R 50 50 6 1 I\nX TCK_0 L7 -600 -400 300 R 50 50 6 1 I\nX TMS_0 M7 -600 -700 300 R 50 50 6 1 I\nX TDI_0 N7 -600 -500 300 R 50 50 6 1 I\nX CCLK_0 E8 -600 -200 300 R 50 50 6 1 B\nX TDO_0 N8 -600 -600 300 R 50 50 6 1 O\nX PROGRAM_B_0 L9 -600 100 300 R 50 50 6 1 I\nX M0_0 M9 -600 400 300 R 50 50 6 1 I\nX DONE_0 H10 -600 -100 300 R 50 50 6 1 B\nX INIT_B_0 K10 -600 0 300 R 50 50 6 1 B\nX M1_0 M10 -600 300 300 R 50 50 6 1 I\nX M2_0 M11 -600 200 300 R 50 50 6 1 I\nS -650 1850 350 -2050 7 1 0 N\nX GND A1 650 1350 300 L 50 50 7 1 W\nX VCCO_35 F1 -950 -1750 300 R 50 50 7 1 W\nX GND L1 650 -650 300 L 50 50 7 1 W\nX VCCO_34 T1 -950 -1250 300 R 50 50 7 1 W\nX GND D2 650 850 300 L 50 50 7 1 W\nX VCCO_35 J2 -950 -1850 300 R 50 50 7 1 W\nX GND P2 650 -1150 300 L 50 50 7 1 W\nX VCCO_35 B3 -950 -1450 300 R 50 50 7 1 W\nX GND G3 650 250 300 L 50 50 7 1 W\nX VCCO_34 M3 -950 -1050 300 R 50 50 7 1 W\nX VCCO_35 E4 -950 -1650 300 R 50 50 7 1 W\nX GND K4 650 -350 300 L 50 50 7 1 W\nX VCCO_34 R4 -950 -1150 300 R 50 50 7 1 W\nX GND C5 650 1050 300 L 50 50 7 1 W\nX GND N5 650 -950 300 L 50 50 7 1 W\nX VCCO_35 A6 -950 -1350 300 R 50 50 7 1 W\nX GND F6 650 550 300 L 50 50 7 1 W\nX VCCINT G6 -950 750 300 R 50 50 7 1 W\nX GND H6 650 -50 300 L 50 50 7 1 W\nX VCCINT J6 -950 550 300 R 50 50 7 1 W\nX GND K6 650 -450 300 L 50 50 7 1 W\nX VCCO_0 L6 -950 250 300 R 50 50 7 1 W\nX GND T6 650 -1450 300 L 50 50 7 1 W\nX VCCO_35 D7 -950 -1550 300 R 50 50 7 1 W\nX VCCINT F7 -950 950 300 R 50 50 7 1 W\nX VCCO_14 P7 -950 -150 300 R 50 50 7 1 W\nX GND B8 650 1150 300 L 50 50 7 1 W\nX VCCBATT_0 F8 -950 1250 300 R 50 50 7 1 W\nX VCCINT L8 -950 350 300 R 50 50 7 1 W\nX GND M8 650 -850 300 L 50 50 7 1 W\nX GND E9 650 650 300 L 50 50 7 1 W\nX VCCINT F9 -950 850 300 R 50 50 7 1 W\nX GND G9 650 150 300 L 50 50 7 1 W\nX VCCINT H9 -950 650 300 R 50 50 7 1 W\nX GND J9 650 -150 300 L 50 50 7 1 W\nX VCCINT K9 -950 450 300 R 50 50 7 1 W\nX GND R9 650 -1350 300 L 50 50 7 1 W\nX VCCO_15 C10 -950 -650 300 R 50 50 7 1 W\nX VCCBRAM E10 -950 1150 300 R 50 50 7 1 W\nX GND F10 650 450 300 L 50 50 7 1 W\nX VCCAUX G10 -950 1650 300 R 50 50 7 1 W\nX VCCAUX J10 -950 1550 300 R 50 50 7 1 W\nX VCCAUX L10 -950 1350 300 R 50 50 7 1 W\nX VCCO_14 N10 -950 -50 300 R 50 50 7 1 W\nX GND A11 650 1250 300 L 50 50 7 1 W\nX VCCBRAM F11 -950 1050 300 R 50 50 7 1 W\nX GND J11 650 -250 300 L 50 50 7 1 W\nX VCCAUX K11 -950 1450 300 R 50 50 7 1 W\nX GND L11 650 -750 300 L 50 50 7 1 W\nX VCCO_14 T11 -950 -350 300 R 50 50 7 1 W\nX GND D12 650 750 300 L 50 50 7 1 W\nX VCCO_15 J12 -950 -950 300 R 50 50 7 1 W\nX GND P12 650 -1250 300 L 50 50 7 1 W\nX VCCO_15 B13 -950 -550 300 R 50 50 7 1 W\nX GND G13 650 50 300 L 50 50 7 1 W\nX VCCO_14 M13 -950 50 300 R 50 50 7 1 W\nX VCCO_15 E14 -950 -750 300 R 50 50 7 1 W\nX GND K14 650 -550 300 L 50 50 7 1 W\nX VCCO_14 R14 -950 -250 300 R 50 50 7 1 W\nX GND C15 650 950 300 L 50 50 7 1 W\nX VCCO_15 H15 -950 -850 300 R 50 50 7 1 W\nX GND N15 650 -1050 300 L 50 50 7 1 W\nX VCCO_15 A16 -950 -450 300 R 50 50 7 1 W\nX GND F16 650 350 300 L 50 50 7 1 W\nX VCCO_14 L16 -950 150 300 R 50 50 7 1 W\nX GND T16 650 -1550 300 L 50 50 7 1 W\nENDDRAW\nENDDEF\n#\n# XTAL_SMD4\n#\nDEF XTAL_SMD4 Y 0 40 N N 1 F N\nF0 \"Y\" 0 150 50 H V C CNN\nF1 \"XTAL_SMD4\" 0 -150 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n Crystal_*\n$ENDFPLIST\nDRAW\nS -50 100 50 -100 0 1 12 N\nP 2 0 1 12 -100 -50 -100 50 N\nP 2 0 1 12 100 -50 100 50 N\nX 1 1 -150 0 50 R 40 40 1 1 P\nX 2 2 -50 -150 50 U 40 40 1 1 P\nX 3 3 150 0 50 L 40 40 1 1 P\nX 4 4 50 -150 50 U 40 40 1 1 P\nENDDRAW\nENDDEF\n#\n#End Library\n" }, { "path": "hw/lmz30602.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 10 16\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL LMZ30602 U?\nU 1 1 5850AC61\nP 4850 3750\nF 0 \"U?\" H 4850 3800 60 0000 C CNN\nF 1 \"LMZ30602\" H 5450 4900 60 0000 C CNN\nF 2 \"\" H 4350 4050 60 0001 C CNN\nF 3 \"\" H 4350 4050 60 0001 C CNN\n\t1 4850 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850ACEE\nP 4600 5200\nF 0 \"#PWR?\" H 4600 4950 50 0001 C CNN\nF 1 \"GND\" H 4600 5050 50 0000 C CNN\nF 2 \"\" H 4600 5200 60 0000 C CNN\nF 3 \"\" H 4600 5200 60 0000 C CNN\n\t1 4600 5200\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 5850 4200\nNoConn ~ 5850 4300\nNoConn ~ 5850 4400\nNoConn ~ 5850 4500\nNoConn ~ 5850 4600\n$Comp\nL R R?\nU 1 1 5850B51A\nP 6200 4250\nF 0 \"R?\" V 6280 4250 50 0000 C CNN\nF 1 \"R\" V 6200 4250 50 0000 C CNN\nF 2 \"\" V 6130 4250 30 0000 C CNN\nF 3 \"\" H 6200 4250 30 0000 C CNN\n\t1 6200 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850B535\nP 6200 4450\nF 0 \"#PWR?\" H 6200 4200 50 0001 C CNN\nF 1 \"GND\" H 6200 4300 50 0000 C CNN\nF 2 \"\" H 6200 4450 60 0000 C CNN\nF 3 \"\" H 6200 4450 60 0000 C CNN\n\t1 6200 4450\n\t1 0 0 -1 \n$EndComp\nText HLabel 1600 2800 0 60 Input ~ 0\nVIN\n$Comp\nL C C?\nU 1 1 5850B5E9\nP 1650 3000\nF 0 \"C?\" H 1675 3100 50 0000 L CNN\nF 1 \"C\" H 1675 2900 50 0000 L CNN\nF 2 \"\" H 1688 2850 30 0000 C CNN\nF 3 \"\" H 1650 3000 60 0000 C CNN\n\t1 1650 3000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C?\nU 1 1 5850B637\nP 1900 3000\nF 0 \"C?\" H 1925 3100 50 0000 L CNN\nF 1 \"C\" H 1925 2900 50 0000 L CNN\nF 2 \"\" H 1938 2850 30 0000 C CNN\nF 3 \"\" H 1900 3000 60 0000 C CNN\n\t1 1900 3000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850B6DD\nP 1900 3200\nF 0 \"#PWR?\" H 1900 2950 50 0001 C CNN\nF 1 \"GND\" H 1900 3050 50 0000 C CNN\nF 2 \"\" H 1900 3200 60 0000 C CNN\nF 3 \"\" H 1900 3200 60 0000 C CNN\n\t1 1900 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850B6FB\nP 1650 3200\nF 0 \"#PWR?\" H 1650 2950 50 0001 C CNN\nF 1 \"GND\" H 1650 3050 50 0000 C CNN\nF 2 \"\" H 1650 3200 60 0000 C CNN\nF 3 \"\" H 1650 3200 60 0000 C CNN\n\t1 1650 3200\n\t1 0 0 -1 \n$EndComp\nText HLabel 2350 3150 0 60 Input ~ 0\nCLK\n$Comp\nL R R?\nU 1 1 5850BBCF\nP 2900 3150\nF 0 \"R?\" V 2980 3150 50 0000 C CNN\nF 1 \"DNP\" V 2900 3150 50 0000 C CNN\nF 2 \"\" V 2830 3150 30 0000 C CNN\nF 3 \"\" H 2900 3150 30 0000 C CNN\n\t1 2900 3150\n\t0 1 1 0 \n$EndComp\nText HLabel 6200 2800 2 60 Output ~ 0\nPWRGD\n$Comp\nL R R?\nU 1 1 5850C74F\nP 3100 3350\nF 0 \"R?\" V 3180 3350 50 0000 C CNN\nF 1 \"R\" V 3100 3350 50 0000 C CNN\nF 2 \"\" V 3030 3350 30 0000 C CNN\nF 3 \"\" H 3100 3350 30 0000 C CNN\n\t1 3100 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850C853\nP 3100 3500\nF 0 \"#PWR?\" H 3100 3250 50 0001 C CNN\nF 1 \"GND\" H 3100 3350 50 0000 C CNN\nF 2 \"\" H 3100 3500 60 0000 C CNN\nF 3 \"\" H 3100 3500 60 0000 C CNN\n\t1 3100 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C?\nU 1 1 5850CC7A\nP 2550 3150\nF 0 \"C?\" H 2575 3250 50 0000 L CNN\nF 1 \"DNP\" H 2575 3050 50 0000 L CNN\nF 2 \"\" H 2588 3000 30 0000 C CNN\nF 3 \"\" H 2550 3150 60 0000 C CNN\n\t1 2550 3150\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t4600 5000 4600 5200\nWire Wire Line\n\t4600 5050 5100 5050\nWire Wire Line\n\t4700 5050 4700 5000\nConnection ~ 4600 5050\nWire Wire Line\n\t4800 5050 4800 5000\nConnection ~ 4700 5050\nWire Wire Line\n\t4900 5050 4900 5000\nConnection ~ 4800 5050\nWire Wire Line\n\t5000 5050 5000 5000\nConnection ~ 4900 5050\nWire Wire Line\n\t5100 5050 5100 5000\nConnection ~ 5000 5050\nWire Wire Line\n\t6200 4400 6200 4450\nWire Wire Line\n\t6200 4100 6200 4050\nWire Wire Line\n\t6200 4050 5850 4050\nWire Wire Line\n\t5900 3800 5850 3800\nWire Wire Line\n\t5900 2950 5900 3800\nWire Wire Line\n\t5900 3650 5850 3650\nWire Wire Line\n\t1600 2800 3850 2800\nWire Wire Line\n\t1900 2850 1900 2800\nConnection ~ 1900 2800\nWire Wire Line\n\t1650 2850 1650 2800\nConnection ~ 1650 2800\nWire Wire Line\n\t3750 3000 3850 3000\nWire Wire Line\n\t3750 2800 3750 3000\nConnection ~ 3750 2800\nWire Wire Line\n\t3850 2900 3750 2900\nConnection ~ 3750 2900\nWire Wire Line\n\t1650 3200 1650 3150\nWire Wire Line\n\t1900 3200 1900 3150\nWire Wire Line\n\t3050 3150 3850 3150\nWire Wire Line\n\t5850 2800 6200 2800\nWire Wire Line\n\t3100 3200 3100 3150\nConnection ~ 3100 3150\nWire Wire Line\n\t2400 3150 2350 3150\nWire Wire Line\n\t2750 3150 2700 3150\nWire Wire Line\n\t3850 3750 3800 3750\nWire Wire Line\n\t3800 3750 3800 4650\nWire Wire Line\n\t3800 3850 3850 3850\nWire Wire Line\n\t3800 3950 3850 3950\nConnection ~ 3800 3850\nWire Wire Line\n\t3800 4050 3850 4050\nConnection ~ 3800 3950\nWire Wire Line\n\t3800 4150 3850 4150\nConnection ~ 3800 4050\nWire Wire Line\n\t3800 4250 3850 4250\nConnection ~ 3800 4150\nWire Wire Line\n\t3800 4350 3850 4350\nConnection ~ 3800 4250\nWire Wire Line\n\t3800 4450 3850 4450\nConnection ~ 3800 4350\nWire Wire Line\n\t3800 4550 3850 4550\nConnection ~ 3800 4450\nWire Wire Line\n\t3800 4650 3850 4650\nConnection ~ 3800 4550\nWire Wire Line\n\t5900 3550 5850 3550\nConnection ~ 5900 3650\nWire Wire Line\n\t5900 3450 5850 3450\nConnection ~ 5900 3550\nWire Wire Line\n\t5900 3350 5850 3350\nConnection ~ 5900 3450\nWire Wire Line\n\t5900 3250 5850 3250\nConnection ~ 5900 3350\nWire Wire Line\n\t5900 3150 5850 3150\nConnection ~ 5900 3250\nWire Wire Line\n\t5900 3050 5850 3050\nConnection ~ 5900 3150\nWire Wire Line\n\t5850 2950 6900 2950\nConnection ~ 5900 3050\n$Comp\nL C C?\nU 1 1 5850E217\nP 6400 3200\nF 0 \"C?\" H 6425 3300 50 0000 L CNN\nF 1 \"C\" H 6425 3100 50 0000 L CNN\nF 2 \"\" H 6438 3050 30 0000 C CNN\nF 3 \"\" H 6400 3200 60 0000 C CNN\n\t1 6400 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C?\nU 1 1 5850E258\nP 6700 3200\nF 0 \"C?\" H 6725 3300 50 0000 L CNN\nF 1 \"C\" H 6725 3100 50 0000 L CNN\nF 2 \"\" H 6738 3050 30 0000 C CNN\nF 3 \"\" H 6700 3200 60 0000 C CNN\n\t1 6700 3200\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6400 2950 6400 3050\nConnection ~ 5900 2950\nWire Wire Line\n\t6700 2950 6700 3050\nConnection ~ 6400 2950\nConnection ~ 6700 2950\nText HLabel 6900 2950 2 60 Output ~ 0\nVOUT\n$Comp\nL GND #PWR?\nU 1 1 5850E3BD\nP 6700 3350\nF 0 \"#PWR?\" H 6700 3100 50 0001 C CNN\nF 1 \"GND\" H 6700 3200 50 0000 C CNN\nF 2 \"\" H 6700 3350 60 0000 C CNN\nF 3 \"\" H 6700 3350 60 0000 C CNN\n\t1 6700 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR?\nU 1 1 5850E3EA\nP 6400 3350\nF 0 \"#PWR?\" H 6400 3100 50 0001 C CNN\nF 1 \"GND\" H 6400 3200 50 0000 C CNN\nF 2 \"\" H 6400 3350 60 0000 C CNN\nF 3 \"\" H 6400 3350 60 0000 C CNN\n\t1 6400 3350\n\t1 0 0 -1 \n$EndComp\nText HLabel 3700 3300 0 60 Input ~ 0\nSS/TR\nText HLabel 3700 3400 0 60 Input ~ 0\nSSTSEL\nWire Wire Line\n\t3700 3400 3850 3400\nWire Wire Line\n\t3850 3300 3700 3300\nNoConn ~ 3850 3550\n$EndSCHEMATC\n" }, { "path": "hw/microcontroller.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 5 14\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL LPC4370FET100 U10\nU 1 1 56412402\nP 3450 4250\nF 0 \"U10\" H 3450 4250 60 0000 C CNN\nF 1 \"LPC4370FET100\" H 3500 5100 60 0000 C CNN\nF 2 \"VNA:TFBGA-100\" H 3150 5200 60 0001 C CNN\nF 3 \"\" H 3150 5200 60 0000 C CNN\n\t1 3450 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR22\nU 1 1 56412569\nP 1950 1200\nF 0 \"#PWR22\" H 1950 950 50 0001 C CNN\nF 1 \"GND\" H 1950 1050 50 0000 C CNN\nF 2 \"\" H 1950 1200 60 0000 C CNN\nF 3 \"\" H 1950 1200 60 0000 C CNN\n\t1 1950 1200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR26\nU 1 1 56412590\nP 2150 1200\nF 0 \"#PWR26\" H 2150 950 50 0001 C CNN\nF 1 \"GND\" H 2150 1050 50 0000 C CNN\nF 2 \"\" H 2150 1200 60 0000 C CNN\nF 3 \"\" H 2150 1200 60 0000 C CNN\n\t1 2150 1200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR30\nU 1 1 564125B0\nP 2350 1200\nF 0 \"#PWR30\" H 2350 950 50 0001 C CNN\nF 1 \"GND\" H 2350 1050 50 0000 C CNN\nF 2 \"\" H 2350 1200 60 0000 C CNN\nF 3 \"\" H 2350 1200 60 0000 C CNN\n\t1 2350 1200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR33\nU 1 1 564125D0\nP 2550 1200\nF 0 \"#PWR33\" H 2550 950 50 0001 C CNN\nF 1 \"GND\" H 2550 1050 50 0000 C CNN\nF 2 \"\" H 2550 1200 60 0000 C CNN\nF 3 \"\" H 2550 1200 60 0000 C CNN\n\t1 2550 1200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR39\nU 1 1 564125F0\nP 2750 1200\nF 0 \"#PWR39\" H 2750 950 50 0001 C CNN\nF 1 \"GND\" H 2750 1050 50 0000 C CNN\nF 2 \"\" H 2750 1200 60 0000 C CNN\nF 3 \"\" H 2750 1200 60 0000 C CNN\n\t1 2750 1200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C85\nU 1 1 56412656\nP 2750 1050\nF 0 \"C85\" H 2775 1150 50 0000 L CNN\nF 1 \"100n\" H 2775 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2788 900 30 0001 C CNN\nF 3 \"\" H 2750 1050 60 0000 C CNN\n\t1 2750 1050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C84\nU 1 1 56412673\nP 2550 1050\nF 0 \"C84\" H 2575 1150 50 0000 L CNN\nF 1 \"100n\" H 2575 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2588 900 30 0001 C CNN\nF 3 \"\" H 2550 1050 60 0000 C CNN\n\t1 2550 1050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C83\nU 1 1 56412693\nP 2350 1050\nF 0 \"C83\" H 2375 1150 50 0000 L CNN\nF 1 \"100n\" H 2375 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2388 900 30 0001 C CNN\nF 3 \"\" H 2350 1050 60 0000 C CNN\n\t1 2350 1050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C82\nU 1 1 564126B6\nP 2150 1050\nF 0 \"C82\" H 2175 1150 50 0000 L CNN\nF 1 \"100n\" H 2175 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2188 900 30 0001 C CNN\nF 3 \"\" H 2150 1050 60 0000 C CNN\n\t1 2150 1050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C81\nU 1 1 564126DC\nP 1950 1050\nF 0 \"C81\" H 1975 1150 50 0000 L CNN\nF 1 \"100n\" H 1975 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1988 900 30 0001 C CNN\nF 3 \"\" H 1950 1050 60 0000 C CNN\n\t1 1950 1050\n\t1 0 0 -1 \n$EndComp\nText Label 3200 900 0 60 ~ 0\n3V3\n$Comp\nL C C87\nU 1 1 564128B0\nP 3950 1100\nF 0 \"C87\" H 3975 1200 50 0000 L CNN\nF 1 \"100p\" H 3975 1000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3988 950 30 0001 C CNN\nF 3 \"\" H 3950 1100 60 0000 C CNN\n\t1 3950 1100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR57\nU 1 1 56412906\nP 3950 1250\nF 0 \"#PWR57\" H 3950 1000 50 0001 C CNN\nF 1 \"GND\" H 3950 1100 50 0000 C CNN\nF 2 \"\" H 3950 1250 60 0000 C CNN\nF 3 \"\" H 3950 1250 60 0000 C CNN\n\t1 3950 1250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C88\nU 1 1 56412930\nP 4250 1100\nF 0 \"C88\" H 4275 1200 50 0000 L CNN\nF 1 \"10u\" H 4275 1000 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4288 950 30 0001 C CNN\nF 3 \"\" H 4250 1100 60 0000 C CNN\n\t1 4250 1100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C89\nU 1 1 56412A63\nP 5250 1100\nF 0 \"C89\" H 5275 1200 50 0000 L CNN\nF 1 \"100n\" H 5275 1000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5288 950 30 0001 C CNN\nF 3 \"\" H 5250 1100 60 0000 C CNN\n\t1 5250 1100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR92\nU 1 1 56412ADE\nP 5250 1250\nF 0 \"#PWR92\" H 5250 1000 50 0001 C CNN\nF 1 \"GND\" H 5250 1100 50 0000 C CNN\nF 2 \"\" H 5250 1250 60 0000 C CNN\nF 3 \"\" H 5250 1250 60 0000 C CNN\n\t1 5250 1250\n\t1 0 0 -1 \n$EndComp\nText Label 5500 950 0 60 ~ 0\n3V3\n$Comp\nL GND #PWR54\nU 1 1 56412F5A\nP 3800 7500\nF 0 \"#PWR54\" H 3800 7250 50 0001 C CNN\nF 1 \"GND\" H 3800 7350 50 0000 C CNN\nF 2 \"\" H 3800 7500 60 0000 C CNN\nF 3 \"\" H 3800 7500 60 0000 C CNN\n\t1 3800 7500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C77\nU 1 1 56413335\nP 1000 7300\nF 0 \"C77\" H 1025 7400 50 0000 L CNN\nF 1 \"33p\" H 1025 7200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1038 7150 30 0001 C CNN\nF 3 \"\" H 1000 7300 60 0000 C CNN\n\t1 1000 7300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C80\nU 1 1 56413383\nP 1550 7300\nF 0 \"C80\" H 1575 7400 50 0000 L CNN\nF 1 \"33p\" H 1575 7200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1588 7150 30 0001 C CNN\nF 3 \"\" H 1550 7300 60 0000 C CNN\n\t1 1550 7300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR16\nU 1 1 56413488\nP 1550 7450\nF 0 \"#PWR16\" H 1550 7200 50 0001 C CNN\nF 1 \"GND\" H 1550 7300 50 0000 C CNN\nF 2 \"\" H 1550 7450 60 0000 C CNN\nF 3 \"\" H 1550 7450 60 0000 C CNN\n\t1 1550 7450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR4\nU 1 1 564134C4\nP 1000 7450\nF 0 \"#PWR4\" H 1000 7200 50 0001 C CNN\nF 1 \"GND\" H 1000 7300 50 0000 C CNN\nF 2 \"\" H 1000 7450 60 0000 C CNN\nF 3 \"\" H 1000 7450 60 0000 C CNN\n\t1 1000 7450\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 1900 6600\nNoConn ~ 1900 6500\nNoConn ~ 1900 6400\nText HLabel 1850 5650 0 60 Input ~ 0\nADCHS_P\nText HLabel 1850 5950 0 60 Input ~ 0\nADCHS_M\nNoConn ~ 1900 2600\nNoConn ~ 1900 2700\n$Comp\nL C C78\nU 1 1 56414BD5\nP 1350 2150\nF 0 \"C78\" H 1375 2250 50 0000 L CNN\nF 1 \"100n\" H 1375 2050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1388 2000 30 0001 C CNN\nF 3 \"\" H 1350 2150 60 0000 C CNN\n\t1 1350 2150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R42\nU 1 1 56414CA7\nP 1550 3500\nF 0 \"R42\" V 1630 3500 50 0000 C CNN\nF 1 \"12k\" V 1550 3500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1480 3500 30 0001 C CNN\nF 3 \"\" H 1550 3500 30 0000 C CNN\n\t1 1550 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR15\nU 1 1 56414CE6\nP 1550 3650\nF 0 \"#PWR15\" H 1550 3400 50 0001 C CNN\nF 1 \"GND\" H 1550 3500 50 0000 C CNN\nF 2 \"\" H 1550 3650 60 0000 C CNN\nF 3 \"\" H 1550 3650 60 0000 C CNN\n\t1 1550 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR21\nU 1 1 564150EB\nP 1850 2300\nF 0 \"#PWR21\" H 1850 2050 50 0001 C CNN\nF 1 \"GND\" H 1850 2150 50 0000 C CNN\nF 2 \"\" H 1850 2300 60 0000 C CNN\nF 3 \"\" H 1850 2300 60 0000 C CNN\n\t1 1850 2300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR12\nU 1 1 564155F9\nP 1350 2300\nF 0 \"#PWR12\" H 1350 2050 50 0001 C CNN\nF 1 \"GND\" H 1350 2150 50 0000 C CNN\nF 2 \"\" H 1350 2300 60 0000 C CNN\nF 3 \"\" H 1350 2300 60 0000 C CNN\n\t1 1350 2300\n\t1 0 0 -1 \n$EndComp\nText Label 1350 1950 0 60 ~ 0\n3V3\nText Label 1850 2950 2 60 ~ 0\nUSB+\nText Label 1850 3050 2 60 ~ 0\nUSB-\n$Comp\nL R R41\nU 1 1 56415F4D\nP 1500 5150\nF 0 \"R41\" V 1580 5150 50 0000 C CNN\nF 1 \"10k\" V 1500 5150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1430 5150 30 0001 C CNN\nF 3 \"\" H 1500 5150 30 0000 C CNN\n\t1 1500 5150\n\t1 0 0 -1 \n$EndComp\nText Label 1500 4950 0 60 ~ 0\n3V3\nText Label 1000 5400 0 60 ~ 0\n~RESET\n$Comp\nL R R40\nU 1 1 56416454\nP 950 5150\nF 0 \"R40\" V 1030 5150 50 0000 C CNN\nF 1 \"10k\" V 950 5150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 880 5150 30 0001 C CNN\nF 3 \"\" H 950 5150 30 0000 C CNN\n\t1 950 5150\n\t1 0 0 -1 \n$EndComp\nText Label 950 4950 0 60 ~ 0\n3V3\n$Comp\nL SW_PUSH SW1\nU 1 1 564167A6\nP 950 5800\nF 0 \"SW1\" H 1100 5910 50 0000 C CNN\nF 1 \"SW_PUSH\" H 950 5720 50 0000 C CNN\nF 2 \"VNA:EVP-AWBA2A\" H 950 5800 60 0001 C CNN\nF 3 \"\" H 950 5800 60 0000 C CNN\n\t1 950 5800\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR2\nU 1 1 56416AB3\nP 950 6100\nF 0 \"#PWR2\" H 950 5850 50 0001 C CNN\nF 1 \"GND\" H 950 5950 50 0000 C CNN\nF 2 \"\" H 950 6100 60 0000 C CNN\nF 3 \"\" H 950 6100 60 0000 C CNN\n\t1 950 6100\n\t1 0 0 -1 \n$EndComp\nText Label 5150 6200 0 60 ~ 0\nSPIFI_CS\nText Label 5150 6100 0 60 ~ 0\nSPFI_MOSI\nText Label 5150 6000 0 60 ~ 0\nSPIFI_MISO\nText Label 5150 5900 0 60 ~ 0\nSPIFI_IO2\nText Label 5150 5800 0 60 ~ 0\nSPIFI_IO3\nText Label 5150 5700 0 60 ~ 0\nSPIFI_CLK\n$Comp\nL LED D1\nU 1 1 56418744\nP 700 1300\nF 0 \"D1\" H 700 1400 50 0000 C CNN\nF 1 \"LED\" H 700 1200 50 0000 C CNN\nF 2 \"VNA:LED_0603\" H 700 1300 60 0001 C CNN\nF 3 \"\" H 700 1300 60 0000 C CNN\n\t1 700 1300\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR1\nU 1 1 56418815\nP 700 1500\nF 0 \"#PWR1\" H 700 1250 50 0001 C CNN\nF 1 \"GND\" H 700 1350 50 0000 C CNN\nF 2 \"\" H 700 1500 60 0000 C CNN\nF 3 \"\" H 700 1500 60 0000 C CNN\n\t1 700 1500\n\t1 0 0 -1 \n$EndComp\nText Label 700 750 0 60 ~ 0\nLED1\nText Label 5200 1800 0 60 ~ 0\nLED1\n$Comp\nL R R52\nU 1 1 56418EE5\nP 10800 4250\nF 0 \"R52\" V 10880 4250 50 0000 C CNN\nF 1 \"10k\" V 10800 4250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 10730 4250 30 0001 C CNN\nF 3 \"\" H 10800 4250 30 0000 C CNN\n\t1 10800 4250\n\t1 0 0 -1 \n$EndComp\nText Label 10800 4050 0 60 ~ 0\nP2_9\n$Comp\nL GND #PWR184\nU 1 1 564190C2\nP 10800 4450\nF 0 \"#PWR184\" H 10800 4200 50 0001 C CNN\nF 1 \"GND\" H 10800 4300 50 0000 C CNN\nF 2 \"\" H 10800 4450 60 0000 C CNN\nF 3 \"\" H 10800 4450 60 0000 C CNN\n\t1 10800 4450\n\t1 0 0 -1 \n$EndComp\nText Label 8850 4050 0 60 ~ 0\nP2_8\n$Comp\nL R R53\nU 1 1 56419448\nP 8850 4250\nF 0 \"R53\" V 8930 4250 50 0000 C CNN\nF 1 \"10k\" V 8850 4250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8780 4250 30 0001 C CNN\nF 3 \"\" H 8850 4250 30 0000 C CNN\n\t1 8850 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL SW_PUSH SW2\nU 1 1 564194B6\nP 9250 4100\nF 0 \"SW2\" H 9400 4210 50 0000 C CNN\nF 1 \"SW_PUSH\" H 9250 4020 50 0000 C CNN\nF 2 \"VNA:EVP-AWBA2A\" H 9250 4100 60 0001 C CNN\nF 3 \"\" H 9250 4100 60 0000 C CNN\n\t1 9250 4100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR171\nU 1 1 56419607\nP 8850 4450\nF 0 \"#PWR171\" H 8850 4200 50 0001 C CNN\nF 1 \"GND\" H 8850 4300 50 0000 C CNN\nF 2 \"\" H 8850 4450 60 0000 C CNN\nF 3 \"\" H 8850 4450 60 0000 C CNN\n\t1 8850 4450\n\t1 0 0 -1 \n$EndComp\nText Label 9600 4100 0 60 ~ 0\n3V3\nText Label 9950 4050 0 60 ~ 0\nP1_2\n$Comp\nL R R55\nU 1 1 564199A4\nP 9950 4250\nF 0 \"R55\" V 10030 4250 50 0000 C CNN\nF 1 \"10k\" V 9950 4250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9880 4250 30 0001 C CNN\nF 3 \"\" H 9950 4250 30 0000 C CNN\n\t1 9950 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR181\nU 1 1 56419A46\nP 9950 4450\nF 0 \"#PWR181\" H 9950 4200 50 0001 C CNN\nF 1 \"GND\" H 9950 4300 50 0000 C CNN\nF 2 \"\" H 9950 4450 60 0000 C CNN\nF 3 \"\" H 9950 4450 60 0000 C CNN\n\t1 9950 4450\n\t1 0 0 -1 \n$EndComp\nText Label 10350 4050 0 60 ~ 0\n3V3\n$Comp\nL R R56\nU 1 1 56419C6F\nP 10350 4200\nF 0 \"R56\" V 10430 4200 50 0000 C CNN\nF 1 \"10k\" V 10350 4200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 10280 4200 30 0001 C CNN\nF 3 \"\" H 10350 4200 30 0000 C CNN\n\t1 10350 4200\n\t1 0 0 -1 \n$EndComp\nText Label 10350 4550 0 60 ~ 0\nP1_1\nText Label 5200 2000 0 60 ~ 0\nP1_1\nText Label 5200 2100 0 60 ~ 0\nP1_2\nText Label 5200 4800 0 60 ~ 0\nP2_8\nText Label 5200 4900 0 60 ~ 0\nP2_9\n$Comp\nL R R39\nU 1 1 5641AF31\nP 700 950\nF 0 \"R39\" V 780 950 50 0000 C CNN\nF 1 \"240\" V 700 950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 630 950 30 0001 C CNN\nF 3 \"\" H 700 950 30 0000 C CNN\n\t1 700 950 \n\t1 0 0 -1 \n$EndComp\n$Comp\nL W25Q32FV U11\nU 1 1 5641C914\nP 7500 5900\nF 0 \"U11\" H 7800 5650 60 0000 C CNN\nF 1 \"W25Q32FV\" H 7650 6150 60 0000 C CNN\nF 2 \"Housings_SOIC:SOIJ-8_5.3x5.3mm_Pitch1.27mm\" H 7300 5700 60 0001 C CNN\nF 3 \"\" H 7300 5700 60 0000 C CNN\n\t1 7500 5900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL USB-MICRO U12\nU 1 1 5641CA2F\nP 9650 1000\nF 0 \"U12\" H 9600 1050 60 0000 C CNN\nF 1 \"USB-MICRO\" H 9500 1300 60 0000 C CNN\nF 2 \"VNA:USB_MICRO\" H 9700 750 60 0001 C CNN\nF 3 \"\" H 9700 750 60 0000 C CNN\n\t1 9650 1000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C90\nU 1 1 5641CEFC\nP 8350 5300\nF 0 \"C90\" H 8375 5400 50 0000 L CNN\nF 1 \"100n\" H 8375 5200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8388 5150 30 0001 C CNN\nF 3 \"\" H 8350 5300 60 0000 C CNN\n\t1 8350 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR158\nU 1 1 5641CFF3\nP 8350 5450\nF 0 \"#PWR158\" H 8350 5200 50 0001 C CNN\nF 1 \"GND\" H 8350 5300 50 0000 C CNN\nF 2 \"\" H 8350 5450 60 0000 C CNN\nF 3 \"\" H 8350 5450 60 0000 C CNN\n\t1 8350 5450\n\t1 0 0 -1 \n$EndComp\nText Label 8050 5150 0 60 ~ 0\n3V3\nText Label 7000 5750 2 60 ~ 0\nSPIFI_CS\nText Label 8050 5950 0 60 ~ 0\nSPIFI_CLK\n$Comp\nL GND #PWR132\nU 1 1 5641D89C\nP 7000 6100\nF 0 \"#PWR132\" H 7000 5850 50 0001 C CNN\nF 1 \"GND\" H 7000 5950 50 0000 C CNN\nF 2 \"\" H 7000 6100 60 0000 C CNN\nF 3 \"\" H 7000 6100 60 0000 C CNN\n\t1 7000 6100\n\t1 0 0 -1 \n$EndComp\nText Label 7000 5850 2 60 ~ 0\nSPIFI_MISO\nText Label 7000 5950 2 60 ~ 0\nSPIFI_IO2\nText Label 8050 5850 0 60 ~ 0\nSPIFI_IO3\nText Label 8050 6050 0 60 ~ 0\nSPFI_MOSI\nEntry Wire Line\n\t5650 5700 5750 5600\nEntry Wire Line\n\t5650 5800 5750 5700\nEntry Wire Line\n\t5650 5900 5750 5800\nEntry Wire Line\n\t5650 6000 5750 5900\nEntry Wire Line\n\t5650 6100 5750 6000\nEntry Wire Line\n\t5650 6200 5750 6100\nEntry Wire Line\n\t6400 5650 6500 5750\nEntry Wire Line\n\t6400 5750 6500 5850\nEntry Wire Line\n\t6400 5850 6500 5950\nEntry Wire Line\n\t8600 5850 8700 5950\nEntry Wire Line\n\t8600 5950 8700 6050\nEntry Wire Line\n\t8600 6050 8700 6150\n$Comp\nL GND #PWR183\nU 1 1 56422586\nP 10550 1350\nF 0 \"#PWR183\" H 10550 1100 50 0001 C CNN\nF 1 \"GND\" H 10550 1200 50 0000 C CNN\nF 2 \"\" H 10550 1350 60 0000 C CNN\nF 3 \"\" H 10550 1350 60 0000 C CNN\n\t1 10550 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R54\nU 1 1 564226A6\nP 10300 1550\nF 0 \"R54\" V 10380 1550 50 0000 C CNN\nF 1 \"DNP\" V 10300 1550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 10230 1550 30 0001 C CNN\nF 3 \"\" H 10300 1550 30 0000 C CNN\n\t1 10300 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C91\nU 1 1 56422709\nP 10100 1550\nF 0 \"C91\" H 10125 1650 50 0000 L CNN\nF 1 \"DNP\" H 10125 1450 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 10138 1400 30 0001 C CNN\nF 3 \"\" H 10100 1550 60 0000 C CNN\n\t1 10100 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR182\nU 1 1 56422918\nP 10300 1750\nF 0 \"#PWR182\" H 10300 1500 50 0001 C CNN\nF 1 \"GND\" H 10300 1600 50 0000 C CNN\nF 2 \"\" H 10300 1750 60 0000 C CNN\nF 3 \"\" H 10300 1750 60 0000 C CNN\n\t1 10300 1750\n\t1 0 0 -1 \n$EndComp\nText Label 10350 1050 0 60 ~ 0\nUSBID\nText Label 10350 750 0 60 ~ 0\nUSBV\nText Label 10350 950 0 60 ~ 0\nUSB+\nText Label 10350 850 0 60 ~ 0\nUSB-\nText HLabel 10100 2750 2 60 Input ~ 0\nCLK_IN\nText Label 1850 3250 2 60 ~ 0\nUSBID\nText HLabel 5300 2800 2 60 Input ~ 0\nLO_LD\nText HLabel 5300 2900 2 60 Input ~ 0\nSOURCE_LD\nText HLabel 5600 3800 2 60 Output ~ 0\nSPI_CLK\nText HLabel 5550 2300 2 60 Output ~ 0\nSPI_MOSI\nText HLabel 5300 3000 2 60 Output ~ 0\nSOURCE_LE\nText HLabel 5300 3100 2 60 Output ~ 0\nSOURCE_CE\nText HLabel 5300 3200 2 60 Output ~ 0\nLO_CE\nText HLabel 5300 3300 2 60 Output ~ 0\nLO_LE\nText HLabel 1800 900 0 60 Input ~ 0\n3V3\nText HLabel 5300 3400 2 60 Output ~ 0\nRX_MIX_ENBL\nText HLabel 5300 3500 2 60 Input ~ 0\nLO_MUXOUT\nText HLabel 5300 3600 2 60 Input ~ 0\nSOURCE_MUXOUT\nText HLabel 5600 4000 2 60 Output ~ 0\nRX_V1\nText HLabel 6600 4100 2 60 Output ~ 0\nRX_V2\nText HLabel 5600 4200 2 60 Output ~ 0\nLO_RF_ENABLE\nText HLabel 5650 4500 2 60 Output ~ 0\nSOURCE_RF_ENABLE\n$Comp\nL R R46\nU 1 1 564523B8\nP 5400 4000\nF 0 \"R46\" V 5480 4000 50 0000 C CNN\nF 1 \"33\" V 5400 4000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5330 4000 30 0001 C CNN\nF 3 \"\" H 5400 4000 30 0000 C CNN\n\t1 5400 4000\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R47\nU 1 1 564524DB\nP 6400 4100\nF 0 \"R47\" V 6480 4100 50 0000 C CNN\nF 1 \"33\" V 6400 4100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6330 4100 30 0001 C CNN\nF 3 \"\" H 6400 4100 30 0000 C CNN\n\t1 6400 4100\n\t0 1 1 0 \n$EndComp\nText HLabel 6450 5100 2 60 Output ~ 0\nTX_SW_CTRL\n$Comp\nL R R48\nU 1 1 56454F44\nP 5400 4200\nF 0 \"R48\" V 5480 4200 50 0000 C CNN\nF 1 \"33\" V 5400 4200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5330 4200 30 0001 C CNN\nF 3 \"\" H 5400 4200 30 0000 C CNN\n\t1 5400 4200\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R49\nU 1 1 56454FC7\nP 5450 4500\nF 0 \"R49\" V 5530 4500 50 0000 C CNN\nF 1 \"33\" V 5450 4500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5380 4500 30 0001 C CNN\nF 3 \"\" H 5450 4500 30 0000 C CNN\n\t1 5450 4500\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R44\nU 1 1 56455526\nP 5400 3800\nF 0 \"R44\" V 5480 3800 50 0000 C CNN\nF 1 \"33\" V 5400 3800 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5330 3800 30 0001 C CNN\nF 3 \"\" H 5400 3800 30 0000 C CNN\n\t1 5400 3800\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R45\nU 1 1 564555E9\nP 5350 2300\nF 0 \"R45\" V 5430 2300 50 0000 C CNN\nF 1 \"33\" V 5350 2300 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5280 2300 30 0001 C CNN\nF 3 \"\" H 5350 2300 30 0000 C CNN\n\t1 5350 2300\n\t0 1 1 0 \n$EndComp\nText Notes 2650 800 0 60 ~ 0\n160mA\nText Notes 8050 5050 0 60 ~ 0\n20mA\nText HLabel 6450 5250 2 60 Output ~ 0\nATT_LE\n$Comp\nL R R51\nU 1 1 5648E4F5\nP 6250 5250\nF 0 \"R51\" V 6330 5250 50 0000 C CNN\nF 1 \"33\" V 6250 5250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6180 5250 30 0001 C CNN\nF 3 \"\" H 6250 5250 30 0000 C CNN\n\t1 6250 5250\n\t0 1 1 0 \n$EndComp\nText HLabel 5650 2400 2 60 Output ~ 0\nFILTER_V1\nText HLabel 5650 2500 2 60 Output ~ 0\nFILTER_V2\nText HLabel 5650 2600 2 60 Output ~ 0\nFILTER_V3\nText HLabel 5650 2700 2 60 Output ~ 0\nFILTER_V4\nText HLabel 5200 1700 2 60 Output ~ 0\nDITHER\n$Comp\nL 74AHC1G04 U24\nU 1 1 569471FD\nP 9000 2750\nF 0 \"U24\" H 9195 2865 60 0000 C CNN\nF 1 \"74AHC1G04\" H 9300 2600 60 0000 C CNN\nF 2 \"TO_SOT_Packages_SMD:SOT-353\" H 9000 2750 60 0001 C CNN\nF 3 \"\" H 9000 2750 60 0000 C CNN\n\t1 9000 2750\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR174\nU 1 1 56947642\nP 9050 2950\nF 0 \"#PWR174\" H 9050 2700 50 0001 C CNN\nF 1 \"GND\" H 9050 2800 50 0000 C CNN\nF 2 \"\" H 9050 2950 60 0000 C CNN\nF 3 \"\" H 9050 2950 60 0000 C CNN\n\t1 9050 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R1\nU 1 1 569476AA\nP 9000 3350\nF 0 \"R1\" V 9080 3350 50 0000 C CNN\nF 1 \"1M\" V 9000 3350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8930 3350 30 0001 C CNN\nF 3 \"\" H 9000 3350 30 0000 C CNN\n\t1 9000 3350\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C3\nU 1 1 56947C67\nP 9150 2300\nF 0 \"C3\" H 9175 2400 50 0000 L CNN\nF 1 \"100n\" H 9175 2200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9188 2150 30 0001 C CNN\nF 3 \"\" H 9150 2300 60 0000 C CNN\n\t1 9150 2300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR176\nU 1 1 56947DD2\nP 9150 2450\nF 0 \"#PWR176\" H 9150 2200 50 0001 C CNN\nF 1 \"GND\" H 9150 2300 50 0000 C CNN\nF 2 \"\" H 9150 2450 60 0000 C CNN\nF 3 \"\" H 9150 2450 60 0000 C CNN\n\t1 9150 2450\n\t1 0 0 -1 \n$EndComp\nText Label 9050 2150 0 60 ~ 0\n3V3\n$Comp\nL C C135\nU 1 1 5694E426\nP 9650 2750\nF 0 \"C135\" H 9675 2850 50 0000 L CNN\nF 1 \"10n\" H 9675 2650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9688 2600 30 0001 C CNN\nF 3 \"\" H 9650 2750 60 0000 C CNN\n\t1 9650 2750\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR3\nU 1 1 5696E8A8\nP 1000 3500\nF 0 \"#PWR3\" H 1000 3250 50 0001 C CNN\nF 1 \"GND\" H 1008 3326 50 0000 C CNN\nF 2 \"\" H 1000 3500 60 0000 C CNN\nF 3 \"\" H 1000 3500 60 0000 C CNN\n\t1 1000 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R3\nU 1 1 5696EA33\nP 1000 3350\nF 0 \"R3\" V 1080 3350 50 0000 C CNN\nF 1 \"39k\" V 1000 3350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 930 3350 30 0001 C CNN\nF 3 \"\" H 1000 3350 30 0000 C CNN\n\t1 1000 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R2\nU 1 1 5696EAE0\nP 1000 3000\nF 0 \"R2\" V 1080 3000 50 0000 C CNN\nF 1 \"24k\" V 1000 3000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 930 3000 30 0001 C CNN\nF 3 \"\" H 1000 3000 30 0000 C CNN\n\t1 1000 3000\n\t1 0 0 -1 \n$EndComp\nText Label 950 2800 2 60 ~ 0\nUSBV\nNoConn ~ 1900 3800\nNoConn ~ 1900 4950\nNoConn ~ 1900 5050\nNoConn ~ 1900 5750\nNoConn ~ 1900 5850\n$Comp\nL R R79\nU 1 1 569A9524\nP 5450 2400\nF 0 \"R79\" V 5530 2400 50 0000 C CNN\nF 1 \"33\" V 5450 2400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5380 2400 30 0001 C CNN\nF 3 \"\" H 5450 2400 30 0000 C CNN\n\t1 5450 2400\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R80\nU 1 1 569A95D0\nP 5450 2500\nF 0 \"R80\" V 5530 2500 50 0000 C CNN\nF 1 \"33\" V 5450 2500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5380 2500 30 0001 C CNN\nF 3 \"\" H 5450 2500 30 0000 C CNN\n\t1 5450 2500\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R81\nU 1 1 569A9673\nP 5450 2600\nF 0 \"R81\" V 5530 2600 50 0000 C CNN\nF 1 \"33\" V 5450 2600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5380 2600 30 0001 C CNN\nF 3 \"\" H 5450 2600 30 0000 C CNN\n\t1 5450 2600\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R82\nU 1 1 569A97C1\nP 5450 2700\nF 0 \"R82\" V 5530 2700 50 0000 C CNN\nF 1 \"33\" V 5450 2700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5380 2700 30 0001 C CNN\nF 3 \"\" H 5450 2700 30 0000 C CNN\n\t1 5450 2700\n\t0 1 1 0 \n$EndComp\n$Comp\nL XTAL_SMD4 Y1\nU 1 1 569BA4DE\nP 1300 7100\nF 0 \"Y1\" H 1300 7250 50 0000 C CNN\nF 1 \"12MHz\" H 1300 6850 50 0000 C CNN\nF 2 \"VNA:XTAL_3.2x2.5\" H 1300 7100 60 0001 C CNN\nF 3 \"\" H 1300 7100 60 0000 C CNN\n\t1 1300 7100\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 1350 7250\nNoConn ~ 1250 7250\n$Comp\nL CONN_02X05 P4\nU 1 1 569E0379\nP 7200 1550\nF 0 \"P4\" H 7200 1850 50 0000 C CNN\nF 1 \"CONN_02X05\" H 7200 1250 50 0000 C CNN\nF 2 \"VNA:CNC-3220-10-0300-00\" H 7200 350 60 0001 C CNN\nF 3 \"\" H 7200 350 60 0000 C CNN\n\t1 7200 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R84\nU 1 1 569E0BB8\nP 6750 1350\nF 0 \"R84\" V 6830 1350 50 0000 C CNN\nF 1 \"47k\" V 6750 1350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6680 1350 30 0001 C CNN\nF 3 \"\" H 6750 1350 30 0000 C CNN\n\t1 6750 1350\n\t0 1 1 0 \n$EndComp\nText Label 6550 1350 2 60 ~ 0\n3V3\n$Comp\nL GND #PWR129\nU 1 1 569E1373\nP 6900 1750\nF 0 \"#PWR129\" H 6900 1500 50 0001 C CNN\nF 1 \"GND\" H 6900 1600 50 0000 C CNN\nF 2 \"\" H 6900 1750 60 0000 C CNN\nF 3 \"\" H 6900 1750 60 0000 C CNN\n\t1 6900 1750\n\t1 0 0 -1 \n$EndComp\nText Label 7500 1350 0 60 ~ 0\nJTAG_TMS\nText Label 1850 4300 2 60 ~ 0\nJTAG_TCK\nText Label 7500 1550 0 60 ~ 0\nJTAG_TDO\nText Label 7500 1650 0 60 ~ 0\nJTAG_TDI\nText Label 7500 1750 0 60 ~ 0\n~RESET\nText Label 7500 1450 0 60 ~ 0\nJTAG_TCK\nText Label 1850 4600 2 60 ~ 0\nJTAG_TDI\nText Label 1850 4700 2 60 ~ 0\nJTAG_TMS\nText Label 1850 4500 2 60 ~ 0\nJTAG_TDO\n$Comp\nL R R83\nU 1 1 569E4EF9\nP 1150 4050\nF 0 \"R83\" V 1230 4050 50 0000 C CNN\nF 1 \"10k\" V 1150 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1080 4050 30 0001 C CNN\nF 3 \"\" H 1150 4050 30 0000 C CNN\n\t1 1150 4050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R50\nU 1 1 569E4FBD\nP 900 4050\nF 0 \"R50\" V 980 4050 50 0000 C CNN\nF 1 \"10k\" V 900 4050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 830 4050 30 0001 C CNN\nF 3 \"\" H 900 4050 30 0000 C CNN\n\t1 900 4050\n\t1 0 0 -1 \n$EndComp\nText Label 900 3850 0 60 ~ 0\n3V3\nNoConn ~ 5150 6300\nText Label 8350 2750 2 60 ~ 0\nGP_CLKIN\nText Label 5200 7000 0 60 ~ 0\nGP_CLKIN\n$Comp\nL LED D4\nU 1 1 56A119D6\nP 1200 1300\nF 0 \"D4\" H 1200 1400 50 0000 C CNN\nF 1 \"LED\" H 1200 1200 50 0000 C CNN\nF 2 \"VNA:LED_0603\" H 1200 1300 60 0001 C CNN\nF 3 \"\" H 1200 1300 60 0000 C CNN\n\t1 1200 1300\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR7\nU 1 1 56A119DC\nP 1200 1500\nF 0 \"#PWR7\" H 1200 1250 50 0001 C CNN\nF 1 \"GND\" H 1200 1350 50 0000 C CNN\nF 2 \"\" H 1200 1500 60 0000 C CNN\nF 3 \"\" H 1200 1500 60 0000 C CNN\n\t1 1200 1500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R85\nU 1 1 56A119E3\nP 1200 950\nF 0 \"R85\" V 1280 950 50 0000 C CNN\nF 1 \"240\" V 1200 950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1130 950 30 0001 C CNN\nF 3 \"\" H 1200 950 30 0000 C CNN\n\t1 1200 950 \n\t1 0 0 -1 \n$EndComp\nText Label 1200 750 0 60 ~ 0\n3V3\n$Comp\nL R R88\nU 1 1 569FF015\nP 9950 2750\nF 0 \"R88\" V 10030 2750 50 0000 C CNN\nF 1 \"0\" V 9950 2750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9880 2750 30 0001 C CNN\nF 3 \"\" H 9950 2750 30 0000 C CNN\n\t1 9950 2750\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R94\nU 1 1 56A46D40\nP 7500 4100\nF 0 \"R94\" V 7580 4100 50 0000 C CNN\nF 1 \"4k7\" V 7500 4100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7430 4100 30 0001 C CNN\nF 3 \"\" H 7500 4100 30 0000 C CNN\n\t1 7500 4100\n\t1 0 0 -1 \n$EndComp\nText Label 7500 3900 0 60 ~ 0\n3V3\n$Comp\nL R R93\nU 1 1 56A474AE\nP 7300 4100\nF 0 \"R93\" V 7380 4100 50 0000 C CNN\nF 1 \"4k7\" V 7300 4100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7230 4100 30 0001 C CNN\nF 3 \"\" H 7300 4100 30 0000 C CNN\n\t1 7300 4100\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3300 1350 3300 1300\nWire Wire Line\n\t3700 1300 3700 1350\nWire Wire Line\n\t3200 1300 3700 1300\nWire Wire Line\n\t3400 1300 3400 1350\nConnection ~ 3400 1300\nWire Wire Line\n\t3500 1350 3500 1300\nConnection ~ 3500 1300\nWire Wire Line\n\t3600 1350 3600 1300\nConnection ~ 3600 1300\nWire Wire Line\n\t3200 900 3200 1350\nConnection ~ 3300 1300\nWire Wire Line\n\t1800 900 3200 900 \nConnection ~ 2150 900 \nConnection ~ 2350 900 \nConnection ~ 2550 900 \nConnection ~ 2750 900 \nConnection ~ 3200 1300\nWire Wire Line\n\t3800 1350 3800 950 \nWire Wire Line\n\t3800 950 4450 950 \nConnection ~ 3950 950 \nConnection ~ 4250 950 \nWire Wire Line\n\t5150 950 5500 950 \nConnection ~ 5250 950 \nWire Wire Line\n\t3800 7400 3800 7500\nWire Wire Line\n\t3200 7450 3800 7450\nWire Wire Line\n\t3700 7450 3700 7400\nConnection ~ 3800 7450\nWire Wire Line\n\t3600 7450 3600 7400\nConnection ~ 3700 7450\nWire Wire Line\n\t3500 7450 3500 7400\nConnection ~ 3600 7450\nWire Wire Line\n\t3400 7450 3400 7400\nConnection ~ 3500 7450\nWire Wire Line\n\t3300 7450 3300 7400\nConnection ~ 3400 7450\nWire Wire Line\n\t3200 7450 3200 7400\nConnection ~ 3300 7450\nWire Wire Line\n\t1900 6750 1000 6750\nWire Wire Line\n\t1000 6750 1000 7150\nWire Wire Line\n\t1000 7100 1150 7100\nConnection ~ 1000 7100\nWire Wire Line\n\t1450 7100 1550 7100\nWire Wire Line\n\t1550 6850 1550 7150\nConnection ~ 1550 7100\nWire Wire Line\n\t1900 5650 1850 5650\nWire Wire Line\n\t1850 5950 1900 5950\nWire Wire Line\n\t1900 3350 1550 3350\nWire Wire Line\n\t1900 2150 1850 2150\nWire Wire Line\n\t1850 2150 1850 2300\nWire Wire Line\n\t1850 2250 1900 2250\nConnection ~ 1850 2250\nWire Wire Line\n\t1350 1950 1900 1950\nWire Wire Line\n\t1900 2050 1850 2050\nWire Wire Line\n\t1850 2050 1850 1950\nConnection ~ 1850 1950\nWire Wire Line\n\t1350 1950 1350 2000\nWire Wire Line\n\t1900 2950 1850 2950\nWire Wire Line\n\t1900 3050 1850 3050\nWire Wire Line\n\t1000 3150 1900 3150\nWire Wire Line\n\t1900 3250 1850 3250\nWire Wire Line\n\t1500 5000 1500 4950\nWire Wire Line\n\t950 5300 950 5500\nWire Wire Line\n\t950 4950 950 5000\nWire Wire Line\n\t950 5400 1900 5400\nConnection ~ 950 5400\nWire Wire Line\n\t1500 5300 1900 5300\nWire Wire Line\n\t5150 5800 5650 5800\nWire Wire Line\n\t5150 5700 5650 5700\nWire Wire Line\n\t5150 5900 5650 5900\nWire Wire Line\n\t5150 6000 5650 6000\nWire Wire Line\n\t5150 6100 5650 6100\nWire Wire Line\n\t5150 6200 5650 6200\nWire Wire Line\n\t5150 4500 5300 4500\nWire Wire Line\n\t10800 4050 10800 4100\nWire Wire Line\n\t10800 4400 10800 4450\nWire Wire Line\n\t8850 4050 8850 4100\nWire Wire Line\n\t8850 4100 8950 4100\nWire Wire Line\n\t8850 4400 8850 4450\nWire Wire Line\n\t9600 4100 9550 4100\nWire Wire Line\n\t9950 4050 9950 4100\nWire Wire Line\n\t9950 4400 9950 4450\nWire Wire Line\n\t10350 4350 10350 4550\nWire Wire Line\n\t5200 2000 5150 2000\nWire Wire Line\n\t5150 2100 5200 2100\nWire Wire Line\n\t5200 4800 5150 4800\nWire Wire Line\n\t5150 4900 5200 4900\nWire Wire Line\n\t700 750 700 800 \nWire Wire Line\n\t8350 5150 8050 5150\nWire Wire Line\n\t8050 5150 8050 5750\nWire Wire Line\n\t6500 5750 7000 5750\nWire Wire Line\n\t8600 5950 8050 5950\nWire Wire Line\n\t7000 6050 7000 6100\nWire Wire Line\n\t6500 5850 7000 5850\nWire Wire Line\n\t6500 5950 7000 5950\nWire Wire Line\n\t8600 5850 8050 5850\nWire Wire Line\n\t8600 6050 8050 6050\nWire Bus Line\n\t8700 5950 8700 6400\nWire Bus Line\n\t8700 6400 6400 6400\nWire Bus Line\n\t6400 6400 6400 5450\nWire Bus Line\n\t6400 5450 5750 5450\nWire Bus Line\n\t5750 5450 5750 6100\nWire Wire Line\n\t10300 1150 10550 1150\nWire Wire Line\n\t10550 1150 10550 1350\nWire Wire Line\n\t10300 1250 10300 1400\nWire Wire Line\n\t10300 1400 10100 1400\nWire Wire Line\n\t10100 1700 10100 1750\nWire Wire Line\n\t10100 1750 10300 1750\nWire Wire Line\n\t10300 1750 10300 1700\nWire Wire Line\n\t10300 1050 10350 1050\nWire Wire Line\n\t10300 750 10350 750 \nWire Wire Line\n\t10300 850 10350 850 \nWire Wire Line\n\t10300 950 10350 950 \nConnection ~ 1950 900 \nWire Wire Line\n\t5600 4000 5550 4000\nWire Wire Line\n\t6600 4100 6550 4100\nWire Wire Line\n\t5150 5100 6450 5100\nWire Wire Line\n\t5550 4200 5600 4200\nWire Wire Line\n\t5650 4500 5600 4500\nWire Wire Line\n\t5500 2300 5550 2300\nWire Wire Line\n\t5600 3800 5550 3800\nWire Wire Line\n\t6400 5250 6450 5250\nWire Wire Line\n\t5150 1700 5200 1700\nWire Wire Line\n\t5150 2400 5300 2400\nWire Wire Line\n\t5300 2500 5150 2500\nWire Wire Line\n\t5150 2600 5300 2600\nWire Wire Line\n\t5300 2700 5150 2700\nWire Wire Line\n\t5300 2800 5150 2800\nWire Wire Line\n\t5150 2900 5300 2900\nWire Wire Line\n\t5250 3800 5150 3800\nWire Wire Line\n\t5200 2300 5150 2300\nWire Wire Line\n\t5300 3000 5150 3000\nWire Wire Line\n\t5150 3100 5300 3100\nWire Wire Line\n\t5150 3200 5300 3200\nWire Wire Line\n\t5300 3300 5150 3300\nWire Wire Line\n\t5150 3400 5300 3400\nWire Wire Line\n\t5300 3500 5150 3500\nWire Wire Line\n\t5150 3600 5300 3600\nWire Wire Line\n\t5250 4000 5150 4000\nWire Wire Line\n\t6250 4100 5150 4100\nWire Wire Line\n\t5250 4200 5150 4200\nWire Wire Line\n\t6100 5250 6050 5250\nWire Wire Line\n\t6050 5250 6050 5200\nWire Wire Line\n\t6050 5200 5150 5200\nWire Wire Line\n\t9500 2750 9450 2750\nWire Wire Line\n\t9450 2750 9450 3350\nWire Wire Line\n\t9450 3350 9150 3350\nWire Wire Line\n\t8850 3350 8400 3350\nWire Wire Line\n\t9150 2150 9050 2150\nWire Wire Line\n\t9050 2150 9050 2550\nWire Wire Line\n\t1000 3200 1000 3150\nWire Wire Line\n\t1000 2850 1000 2800\nWire Wire Line\n\t1000 2800 950 2800\nWire Wire Line\n\t5650 2400 5600 2400\nWire Wire Line\n\t5650 2500 5600 2500\nWire Wire Line\n\t5650 2600 5600 2600\nWire Wire Line\n\t5650 2700 5600 2700\nWire Wire Line\n\t6950 1350 6900 1350\nWire Wire Line\n\t6550 1350 6600 1350\nWire Wire Line\n\t6950 1450 6900 1450\nWire Wire Line\n\t6900 1450 6900 1750\nWire Wire Line\n\t6900 1550 6950 1550\nWire Wire Line\n\t6900 1750 6950 1750\nConnection ~ 6900 1550\nWire Wire Line\n\t7450 1350 7500 1350\nWire Wire Line\n\t7450 1450 7500 1450\nWire Wire Line\n\t7450 1550 7500 1550\nWire Wire Line\n\t7450 1650 7500 1650\nWire Wire Line\n\t7450 1750 7500 1750\nWire Wire Line\n\t1850 4300 1900 4300\nWire Wire Line\n\t1850 4600 1900 4600\nWire Wire Line\n\t1850 4700 1900 4700\nWire Wire Line\n\t1850 4500 1900 4500\nWire Wire Line\n\t1150 4200 1900 4200\nWire Wire Line\n\t1900 4400 900 4400\nWire Wire Line\n\t900 4400 900 4200\nWire Wire Line\n\t900 3900 900 3850\nWire Wire Line\n\t900 3850 1150 3850\nWire Wire Line\n\t1150 3850 1150 3900\nWire Wire Line\n\t1900 6850 1550 6850\nWire Wire Line\n\t8350 2750 8550 2750\nWire Wire Line\n\t8400 3350 8400 2750\nWire Wire Line\n\t5150 7000 5200 7000\nConnection ~ 8400 2750\nWire Wire Line\n\t1200 750 1200 800 \nWire Wire Line\n\t5200 1800 5150 1800\nWire Wire Line\n\t7500 3950 7500 3900\nWire Wire Line\n\t5150 4300 7650 4300\nWire Wire Line\n\t7500 4300 7500 4250\nConnection ~ 7500 4300\nWire Wire Line\n\t7300 4250 7300 4400\nConnection ~ 7300 4400\nText HLabel 7650 4400 2 60 Output ~ 0\nI2C_SCL\nText Label 7300 3900 0 60 ~ 0\n3V3\nWire Wire Line\n\t7300 3900 7300 3950\nWire Wire Line\n\t5150 5300 5200 5300\nText HLabel 5200 5300 2 60 Output ~ 0\nPWDN\n$Comp\nL R R95\nU 1 1 56A49FDC\nP 7500 4400\nF 0 \"R95\" V 7580 4400 50 0000 C CNN\nF 1 \"33\" V 7500 4400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7430 4400 30 0001 C CNN\nF 3 \"\" H 7500 4400 30 0000 C CNN\n\t1 7500 4400\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t5150 4400 7350 4400\n$Comp\nL R R96\nU 1 1 56A4A38A\nP 7800 4300\nF 0 \"R96\" V 7880 4300 50 0000 C CNN\nF 1 \"33\" V 7800 4300 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7730 4300 30 0001 C CNN\nF 3 \"\" H 7800 4300 30 0000 C CNN\n\t1 7800 4300\n\t0 1 1 0 \n$EndComp\nText HLabel 8000 4300 2 60 BiDi ~ 0\nI2C_SDA\nWire Wire Line\n\t8000 4300 7950 4300\nNoConn ~ 6950 1650\n$Comp\nL CONN_01X01 P6\nU 1 1 56A76336\nP 1700 3900\nF 0 \"P6\" H 1700 4000 50 0000 C CNN\nF 1 \"CONN_01X01\" V 1800 3900 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 1700 3900 60 0001 C CNN\nF 3 \"\" H 1700 3900 60 0000 C CNN\n\t1 1700 3900\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P7\nU 1 1 56A76ADD\nP 6250 3900\nF 0 \"P7\" H 6250 4000 50 0000 C CNN\nF 1 \"CONN_01X01\" V 6350 3900 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 6250 3900 60 0001 C CNN\nF 3 \"\" H 6250 3900 60 0000 C CNN\n\t1 6250 3900\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6050 3900 5150 3900\nWire Wire Line\n\t5150 3700 5250 3700\n$Comp\nL CONN_01X01 P8\nU 1 1 56A90F25\nP 5450 3700\nF 0 \"P8\" H 5450 3800 50 0000 C CNN\nF 1 \"CONN_01X01\" V 5550 3700 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 5450 3700 60 0001 C CNN\nF 3 \"\" H 5450 3700 60 0000 C CNN\n\t1 5450 3700\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 5150 5400\n$Comp\nL C C160\nU 1 1 56A942AD\nP 5500 1100\nF 0 \"C160\" H 5525 1200 50 0000 L CNN\nF 1 \"100n\" H 5525 1000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5538 950 30 0001 C CNN\nF 3 \"\" H 5500 1100 60 0000 C CNN\n\t1 5500 1100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR95\nU 1 1 56A943C1\nP 5500 1250\nF 0 \"#PWR95\" H 5500 1000 50 0001 C CNN\nF 1 \"GND\" H 5500 1100 50 0000 C CNN\nF 2 \"\" H 5500 1250 60 0000 C CNN\nF 3 \"\" H 5500 1250 60 0000 C CNN\n\t1 5500 1250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB5\nU 1 1 56A9C4AF\nP 4800 950\nF 0 \"FB5\" H 4800 1100 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 4800 850 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 4800 950 60 0001 C CNN\nF 3 \"\" H 4800 950 60 0000 C CNN\n\t1 4800 950 \n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR71\nU 1 1 56A9CE87\nP 4250 1250\nF 0 \"#PWR71\" H 4250 1000 50 0001 C CNN\nF 1 \"GND\" H 4250 1100 50 0000 C CNN\nF 2 \"\" H 4250 1250 60 0000 C CNN\nF 3 \"\" H 4250 1250 60 0000 C CNN\n\t1 4250 1250\n\t1 0 0 -1 \n$EndComp\n$EndSCHEMATC\n" }, { "path": "hw/port_switch.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 12 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL PE42420 U27\nU 1 1 58362736\nP 3400 3750\nF 0 \"U27\" H 3400 3700 60 0000 C CNN\nF 1 \"PE42420\" H 3950 4150 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 2900 4300 60 0001 C CNN\nF 3 \"\" H 2900 4300 60 0001 C CNN\n\t1 3400 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL PE42420 U28\nU 1 1 583627CE\nP 6750 2550\nF 0 \"U28\" H 6750 2500 60 0000 C CNN\nF 1 \"PE42420\" H 7300 2950 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 6250 3100 60 0001 C CNN\nF 3 \"\" H 6250 3100 60 0001 C CNN\n\t1 6750 2550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL PE42420 U29\nU 1 1 58362868\nP 6750 5550\nF 0 \"U29\" H 6750 5500 60 0000 C CNN\nF 1 \"PE42420\" H 7300 5950 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 6250 6100 60 0001 C CNN\nF 3 \"\" H 6250 6100 60 0001 C CNN\n\t1 6750 5550\n\t1 0 0 -1 \n$EndComp\nText HLabel 2250 3750 0 60 Input ~ 0\nRFC\nText HLabel 9650 2400 2 60 Output ~ 0\nRF1\nText HLabel 9650 5650 2 60 Output ~ 0\nRF2\n$Comp\nL R R67\nU 1 1 5836295B\nP 7900 2950\nF 0 \"R67\" V 7980 2950 50 0000 C CNN\nF 1 \"49.9\" V 7900 2950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7830 2950 30 0001 C CNN\nF 3 \"\" H 7900 2950 30 0000 C CNN\n\t1 7900 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0262\nU 1 1 5836297E\nP 7900 3100\nF 0 \"#PWR0262\" H 7900 2850 50 0001 C CNN\nF 1 \"GND\" H 7900 2950 50 0000 C CNN\nF 2 \"\" H 7900 3100 60 0000 C CNN\nF 3 \"\" H 7900 3100 60 0000 C CNN\n\t1 7900 3100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R68\nU 1 1 58362A1E\nP 8150 4950\nF 0 \"R68\" V 8230 4950 50 0000 C CNN\nF 1 \"49.9\" V 8150 4950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8080 4950 30 0001 C CNN\nF 3 \"\" H 8150 4950 30 0000 C CNN\n\t1 8150 4950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0263\nU 1 1 58362A24\nP 8150 5100\nF 0 \"#PWR0263\" H 8150 4850 50 0001 C CNN\nF 1 \"GND\" H 8150 4950 50 0000 C CNN\nF 2 \"\" H 8150 5100 60 0000 C CNN\nF 3 \"\" H 8150 5100 60 0000 C CNN\n\t1 8150 5100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0264\nU 1 1 58362A9F\nP 6100 3300\nF 0 \"#PWR0264\" H 6100 3050 50 0001 C CNN\nF 1 \"GND\" H 6100 3150 50 0000 C CNN\nF 2 \"\" H 6100 3300 60 0000 C CNN\nF 3 \"\" H 6100 3300 60 0000 C CNN\n\t1 6100 3300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0265\nU 1 1 58362C68\nP 6100 6300\nF 0 \"#PWR0265\" H 6100 6050 50 0001 C CNN\nF 1 \"GND\" H 6100 6150 50 0000 C CNN\nF 2 \"\" H 6100 6300 60 0000 C CNN\nF 3 \"\" H 6100 6300 60 0000 C CNN\n\t1 6100 6300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0266\nU 1 1 58362CF3\nP 2750 4500\nF 0 \"#PWR0266\" H 2750 4250 50 0001 C CNN\nF 1 \"GND\" H 2750 4350 50 0000 C CNN\nF 2 \"\" H 2750 4500 60 0000 C CNN\nF 3 \"\" H 2750 4500 60 0000 C CNN\n\t1 2750 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R49\nU 1 1 58364DAE\nP 2900 2400\nF 0 \"R49\" V 2980 2400 50 0000 C CNN\nF 1 \"100\" V 2900 2400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2830 2400 30 0001 C CNN\nF 3 \"\" H 2900 2400 30 0000 C CNN\n\t1 2900 2400\n\t1 0 0 -1 \n$EndComp\nText Label 2850 2100 2 60 ~ 0\n3V3\n$Comp\nL C C168\nU 1 1 58364DB7\nP 2600 2900\nF 0 \"C168\" H 2625 3000 50 0000 L CNN\nF 1 \"18p\" H 2625 2800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2638 2750 30 0001 C CNN\nF 3 \"\" H 2600 2900 60 0000 C CNN\n\t1 2600 2900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0267\nU 1 1 58364DBE\nP 2600 3050\nF 0 \"#PWR0267\" H 2600 2800 50 0001 C CNN\nF 1 \"GND\" H 2600 2900 50 0000 C CNN\nF 2 \"\" H 2600 3050 60 0000 C CNN\nF 3 \"\" H 2600 3050 60 0000 C CNN\n\t1 2600 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R52\nU 1 1 58366385\nP 6400 1200\nF 0 \"R52\" V 6480 1200 50 0000 C CNN\nF 1 \"100\" V 6400 1200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6330 1200 30 0001 C CNN\nF 3 \"\" H 6400 1200 30 0000 C CNN\n\t1 6400 1200\n\t1 0 0 -1 \n$EndComp\nText Label 6350 900 2 60 ~ 0\n3V3\n$Comp\nL C C171\nU 1 1 5836638C\nP 6100 1700\nF 0 \"C171\" H 6125 1800 50 0000 L CNN\nF 1 \"18p\" H 6125 1600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6138 1550 30 0001 C CNN\nF 3 \"\" H 6100 1700 60 0000 C CNN\n\t1 6100 1700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0268\nU 1 1 58366392\nP 6100 1850\nF 0 \"#PWR0268\" H 6100 1600 50 0001 C CNN\nF 1 \"GND\" H 6100 1700 50 0000 C CNN\nF 2 \"\" H 6100 1850 60 0000 C CNN\nF 3 \"\" H 6100 1850 60 0000 C CNN\n\t1 6100 1850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R53\nU 1 1 583667CB\nP 6400 4200\nF 0 \"R53\" V 6480 4200 50 0000 C CNN\nF 1 \"100\" V 6400 4200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6330 4200 30 0001 C CNN\nF 3 \"\" H 6400 4200 30 0000 C CNN\n\t1 6400 4200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C172\nU 1 1 583667D2\nP 6100 4700\nF 0 \"C172\" H 6125 4800 50 0000 L CNN\nF 1 \"18p\" H 6125 4600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6138 4550 30 0001 C CNN\nF 3 \"\" H 6100 4700 60 0000 C CNN\n\t1 6100 4700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0269\nU 1 1 583667D8\nP 6100 4850\nF 0 \"#PWR0269\" H 6100 4600 50 0001 C CNN\nF 1 \"GND\" H 6100 4700 50 0000 C CNN\nF 2 \"\" H 6100 4850 60 0000 C CNN\nF 3 \"\" H 6100 4850 60 0000 C CNN\n\t1 6100 4850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R50\nU 1 1 58366E15\nP 3550 2750\nF 0 \"R50\" V 3630 2750 50 0000 C CNN\nF 1 \"1k\" V 3550 2750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3480 2750 30 0001 C CNN\nF 3 \"\" H 3550 2750 30 0000 C CNN\n\t1 3550 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R51\nU 1 1 58366E8E\nP 3800 2750\nF 0 \"R51\" V 3880 2750 50 0000 C CNN\nF 1 \"1k\" V 3800 2750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3730 2750 30 0001 C CNN\nF 3 \"\" H 3800 2750 30 0000 C CNN\n\t1 3800 2750\n\t1 0 0 -1 \n$EndComp\nText HLabel 2550 1000 0 60 Input ~ 0\n3V3\nText Label 2700 1000 0 60 ~ 0\n3V3\nText Notes 8300 1450 0 60 ~ 0\nPE4240 switch control truth table:\\n\\nCTRL1 CTRL2 RFC-RF1 RFC-RF2\\nLow Low Off Off\\nLow High Off On\\nHigh Low On Off\\nHigh High N/A N/A\nText HLabel 3550 2200 1 60 Input ~ 0\nCTRL1\nText HLabel 3800 2200 1 60 Input ~ 0\nCTRL2\nText Label 6800 1000 1 60 ~ 0\nCTRL1\n$Comp\nL R R54\nU 1 1 58368BB2\nP 6800 1550\nF 0 \"R54\" V 6880 1550 50 0000 C CNN\nF 1 \"100\" V 6800 1550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6730 1550 30 0001 C CNN\nF 3 \"\" H 6800 1550 30 0000 C CNN\n\t1 6800 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R56\nU 1 1 58368BB8\nP 7050 1550\nF 0 \"R56\" V 7130 1550 50 0000 C CNN\nF 1 \"100\" V 7050 1550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6980 1550 30 0001 C CNN\nF 3 \"\" H 7050 1550 30 0000 C CNN\n\t1 7050 1550\n\t1 0 0 -1 \n$EndComp\nText Label 7050 1000 1 60 ~ 0\nCTRL2\nText Label 6800 3950 1 60 ~ 0\nCTRL1\n$Comp\nL R R55\nU 1 1 58369E07\nP 6800 4500\nF 0 \"R55\" V 6880 4500 50 0000 C CNN\nF 1 \"100\" V 6800 4500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6730 4500 30 0001 C CNN\nF 3 \"\" H 6800 4500 30 0000 C CNN\n\t1 6800 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R66\nU 1 1 58369E0D\nP 7050 4500\nF 0 \"R66\" V 7130 4500 50 0000 C CNN\nF 1 \"100\" V 7050 4500 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6980 4500 30 0001 C CNN\nF 3 \"\" H 7050 4500 30 0000 C CNN\n\t1 7050 4500\n\t1 0 0 -1 \n$EndComp\nText Label 7050 3950 1 60 ~ 0\nCTRL2\n$Comp\nL C C178\nU 1 1 5836A2BF\nP 7400 4250\nF 0 \"C178\" H 7425 4350 50 0000 L CNN\nF 1 \"18p\" H 7425 4150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7438 4100 30 0001 C CNN\nF 3 \"\" H 7400 4250 60 0000 C CNN\n\t1 7400 4250\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C177\nU 1 1 5836A3C9\nP 7400 4000\nF 0 \"C177\" H 7425 4100 50 0000 L CNN\nF 1 \"18p\" H 7425 3900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7438 3850 30 0001 C CNN\nF 3 \"\" H 7400 4000 60 0000 C CNN\n\t1 7400 4000\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0270\nU 1 1 5836A58C\nP 7550 4000\nF 0 \"#PWR0270\" H 7550 3750 50 0001 C CNN\nF 1 \"GND\" H 7550 3850 50 0000 C CNN\nF 2 \"\" H 7550 4000 60 0000 C CNN\nF 3 \"\" H 7550 4000 60 0000 C CNN\n\t1 7550 4000\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0271\nU 1 1 5836A62E\nP 7550 4250\nF 0 \"#PWR0271\" H 7550 4000 50 0001 C CNN\nF 1 \"GND\" H 7550 4100 50 0000 C CNN\nF 2 \"\" H 7550 4250 60 0000 C CNN\nF 3 \"\" H 7550 4250 60 0000 C CNN\n\t1 7550 4250\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL C C176\nU 1 1 5836AD84\nP 7400 1300\nF 0 \"C176\" H 7425 1400 50 0000 L CNN\nF 1 \"18p\" H 7425 1200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7438 1150 30 0001 C CNN\nF 3 \"\" H 7400 1300 60 0000 C CNN\n\t1 7400 1300\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C175\nU 1 1 5836AD8A\nP 7400 1050\nF 0 \"C175\" H 7425 1150 50 0000 L CNN\nF 1 \"18p\" H 7425 950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7438 900 30 0001 C CNN\nF 3 \"\" H 7400 1050 60 0000 C CNN\n\t1 7400 1050\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0272\nU 1 1 5836AD90\nP 7550 1050\nF 0 \"#PWR0272\" H 7550 800 50 0001 C CNN\nF 1 \"GND\" H 7550 900 50 0000 C CNN\nF 2 \"\" H 7550 1050 60 0000 C CNN\nF 3 \"\" H 7550 1050 60 0000 C CNN\n\t1 7550 1050\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0273\nU 1 1 5836AD96\nP 7550 1300\nF 0 \"#PWR0273\" H 7550 1050 50 0001 C CNN\nF 1 \"GND\" H 7550 1150 50 0000 C CNN\nF 2 \"\" H 7550 1300 60 0000 C CNN\nF 3 \"\" H 7550 1300 60 0000 C CNN\n\t1 7550 1300\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL C C170\nU 1 1 5836B70D\nP 4150 2500\nF 0 \"C170\" H 4175 2600 50 0000 L CNN\nF 1 \"18p\" H 4175 2400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 2350 30 0001 C CNN\nF 3 \"\" H 4150 2500 60 0000 C CNN\n\t1 4150 2500\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C169\nU 1 1 5836B713\nP 4150 2250\nF 0 \"C169\" H 4175 2350 50 0000 L CNN\nF 1 \"18p\" H 4175 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 2100 30 0001 C CNN\nF 3 \"\" H 4150 2250 60 0000 C CNN\n\t1 4150 2250\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0274\nU 1 1 5836B719\nP 4300 2250\nF 0 \"#PWR0274\" H 4300 2000 50 0001 C CNN\nF 1 \"GND\" H 4300 2100 50 0000 C CNN\nF 2 \"\" H 4300 2250 60 0000 C CNN\nF 3 \"\" H 4300 2250 60 0000 C CNN\n\t1 4300 2250\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0275\nU 1 1 5836B71F\nP 4300 2500\nF 0 \"#PWR0275\" H 4300 2250 50 0001 C CNN\nF 1 \"GND\" H 4300 2350 50 0000 C CNN\nF 2 \"\" H 4300 2500 60 0000 C CNN\nF 3 \"\" H 4300 2500 60 0000 C CNN\n\t1 4300 2500\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL C C167\nU 1 1 5836C3E4\nP 2550 2200\nF 0 \"C167\" H 2575 2300 50 0000 L CNN\nF 1 \"100n\" H 2575 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2588 2050 30 0001 C CNN\nF 3 \"\" H 2550 2200 60 0000 C CNN\n\t1 2550 2200\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0276\nU 1 1 5836C5E1\nP 2400 2200\nF 0 \"#PWR0276\" H 2400 1950 50 0001 C CNN\nF 1 \"GND\" H 2400 2050 50 0000 C CNN\nF 2 \"\" H 2400 2200 60 0000 C CNN\nF 3 \"\" H 2400 2200 60 0000 C CNN\n\t1 2400 2200\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C173\nU 1 1 5836C8F1\nP 6150 1000\nF 0 \"C173\" H 6175 1100 50 0000 L CNN\nF 1 \"100n\" H 6175 900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6188 850 30 0001 C CNN\nF 3 \"\" H 6150 1000 60 0000 C CNN\n\t1 6150 1000\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0277\nU 1 1 5836C8F7\nP 6000 1000\nF 0 \"#PWR0277\" H 6000 750 50 0001 C CNN\nF 1 \"GND\" H 6000 850 50 0000 C CNN\nF 2 \"\" H 6000 1000 60 0000 C CNN\nF 3 \"\" H 6000 1000 60 0000 C CNN\n\t1 6000 1000\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C174\nU 1 1 5836CBF9\nP 6200 4000\nF 0 \"C174\" H 6225 4100 50 0000 L CNN\nF 1 \"100n\" H 6225 3900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6238 3850 30 0001 C CNN\nF 3 \"\" H 6200 4000 60 0000 C CNN\n\t1 6200 4000\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0278\nU 1 1 5836CBFF\nP 6050 4000\nF 0 \"#PWR0278\" H 6050 3750 50 0001 C CNN\nF 1 \"GND\" H 6050 3850 50 0000 C CNN\nF 2 \"\" H 6050 4000 60 0000 C CNN\nF 3 \"\" H 6050 4000 60 0000 C CNN\n\t1 6050 4000\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C180\nU 1 1 5836E0DB\nP 9350 2400\nF 0 \"C180\" H 9375 2500 50 0000 L CNN\nF 1 \"1n\" H 9375 2300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9388 2250 30 0001 C CNN\nF 3 \"\" H 9350 2400 60 0000 C CNN\n\t1 9350 2400\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C179\nU 1 1 5836EA2F\nP 9300 5650\nF 0 \"C179\" H 9325 5750 50 0000 L CNN\nF 1 \"1n\" H 9325 5550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9338 5500 30 0001 C CNN\nF 3 \"\" H 9300 5650 60 0000 C CNN\n\t1 9300 5650\n\t0 1 1 0 \n$EndComp\n$Comp\nL Via F1\nU 1 1 585AE2FF\nP 5000 2900\nF 0 \"F1\" H 5000 3100 60 0000 C CNN\nF 1 \"Via\" H 5150 2750 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 5000 2900 60 0001 C CNN\nF 3 \"\" H 5000 2900 60 0001 C CNN\n\t1 5000 2900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F3\nU 1 1 585AE3D8\nP 5500 2900\nF 0 \"F3\" H 5500 3100 60 0000 C CNN\nF 1 \"Via\" H 5700 2750 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 5500 2900 60 0001 C CNN\nF 3 \"\" H 5500 2900 60 0001 C CNN\n\t1 5500 2900\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0279\nU 1 1 585AE6C4\nP 4800 3150\nF 0 \"#PWR0279\" H 4800 2900 50 0001 C CNN\nF 1 \"GND\" H 4800 3000 50 0000 C CNN\nF 2 \"\" H 4800 3150 60 0000 C CNN\nF 3 \"\" H 4800 3150 60 0000 C CNN\n\t1 4800 3150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0280\nU 1 1 585AE7EA\nP 5700 3150\nF 0 \"#PWR0280\" H 5700 2900 50 0001 C CNN\nF 1 \"GND\" H 5700 3000 50 0000 C CNN\nF 2 \"\" H 5700 3150 60 0000 C CNN\nF 3 \"\" H 5700 3150 60 0000 C CNN\n\t1 5700 3150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F2\nU 1 1 585AEF9E\nP 4900 5550\nF 0 \"F2\" H 4900 5750 60 0000 C CNN\nF 1 \"Via\" H 5050 5400 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 4900 5550 60 0001 C CNN\nF 3 \"\" H 4900 5550 60 0001 C CNN\n\t1 4900 5550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F4\nU 1 1 585AEFA4\nP 5500 5550\nF 0 \"F4\" H 5500 5750 60 0000 C CNN\nF 1 \"Via\" H 5700 5400 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 5500 5550 60 0001 C CNN\nF 3 \"\" H 5500 5550 60 0001 C CNN\n\t1 5500 5550\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0281\nU 1 1 585AF327\nP 4600 5800\nF 0 \"#PWR0281\" H 4600 5550 50 0001 C CNN\nF 1 \"GND\" H 4600 5650 50 0000 C CNN\nF 2 \"\" H 4600 5800 60 0000 C CNN\nF 3 \"\" H 4600 5800 60 0000 C CNN\n\t1 4600 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0282\nU 1 1 585AF399\nP 5750 5800\nF 0 \"#PWR0282\" H 5750 5550 50 0001 C CNN\nF 1 \"GND\" H 5750 5650 50 0000 C CNN\nF 2 \"\" H 5750 5800 60 0000 C CNN\nF 3 \"\" H 5750 5800 60 0000 C CNN\n\t1 5750 5800\n\t1 0 0 -1 \n$EndComp\nText GLabel 6100 3750 0 60 Input ~ 0\n3V3A_RX\nWire Wire Line\n\t2250 3750 2450 3750\nWire Wire Line\n\t7900 4650 8150 4650\nWire Wire Line\n\t8150 4650 8150 4800\nWire Wire Line\n\t6100 3150 6100 3300\nWire Wire Line\n\t6200 3150 6200 3250\nWire Wire Line\n\t6100 3250 7500 3250\nConnection ~ 6100 3250\nWire Wire Line\n\t6300 3250 6300 3150\nConnection ~ 6200 3250\nWire Wire Line\n\t6400 3250 6400 3150\nConnection ~ 6300 3250\nWire Wire Line\n\t6500 3250 6500 3150\nConnection ~ 6400 3250\nWire Wire Line\n\t6600 3250 6600 3150\nConnection ~ 6500 3250\nWire Wire Line\n\t6700 3250 6700 3150\nConnection ~ 6600 3250\nWire Wire Line\n\t6800 3250 6800 3150\nConnection ~ 6700 3250\nWire Wire Line\n\t6900 3250 6900 3150\nConnection ~ 6800 3250\nWire Wire Line\n\t7000 3250 7000 3150\nConnection ~ 6900 3250\nWire Wire Line\n\t7100 3250 7100 3150\nConnection ~ 7000 3250\nWire Wire Line\n\t7200 3250 7200 3150\nConnection ~ 7100 3250\nWire Wire Line\n\t7300 3250 7300 3150\nConnection ~ 7200 3250\nWire Wire Line\n\t7400 3250 7400 3150\nConnection ~ 7300 3250\nWire Wire Line\n\t6100 6150 6100 6300\nWire Wire Line\n\t6200 6150 6200 6250\nWire Wire Line\n\t6100 6250 7500 6250\nConnection ~ 6100 6250\nWire Wire Line\n\t6300 6250 6300 6150\nConnection ~ 6200 6250\nWire Wire Line\n\t6400 6250 6400 6150\nConnection ~ 6300 6250\nWire Wire Line\n\t6500 6250 6500 6150\nConnection ~ 6400 6250\nWire Wire Line\n\t6600 6250 6600 6150\nConnection ~ 6500 6250\nWire Wire Line\n\t6700 6250 6700 6150\nConnection ~ 6600 6250\nWire Wire Line\n\t6800 6250 6800 6150\nConnection ~ 6700 6250\nWire Wire Line\n\t6900 6250 6900 6150\nConnection ~ 6800 6250\nWire Wire Line\n\t7000 6250 7000 6150\nConnection ~ 6900 6250\nWire Wire Line\n\t7100 6250 7100 6150\nConnection ~ 7000 6250\nWire Wire Line\n\t7200 6250 7200 6150\nConnection ~ 7100 6250\nWire Wire Line\n\t7300 6250 7300 6150\nConnection ~ 7200 6250\nWire Wire Line\n\t7400 6250 7400 6150\nConnection ~ 7300 6250\nWire Wire Line\n\t2750 4350 2750 4500\nWire Wire Line\n\t2850 4350 2850 4450\nWire Wire Line\n\t2750 4450 4150 4450\nConnection ~ 2750 4450\nWire Wire Line\n\t2950 4450 2950 4350\nConnection ~ 2850 4450\nWire Wire Line\n\t3050 4450 3050 4350\nConnection ~ 2950 4450\nWire Wire Line\n\t3150 4450 3150 4350\nConnection ~ 3050 4450\nWire Wire Line\n\t3250 4450 3250 4350\nConnection ~ 3150 4450\nWire Wire Line\n\t3350 4450 3350 4350\nConnection ~ 3250 4450\nWire Wire Line\n\t3450 4450 3450 4350\nConnection ~ 3350 4450\nWire Wire Line\n\t3550 4450 3550 4350\nConnection ~ 3450 4450\nWire Wire Line\n\t3650 4450 3650 4350\nConnection ~ 3550 4450\nWire Wire Line\n\t3750 4450 3750 4350\nConnection ~ 3650 4450\nWire Wire Line\n\t3850 4450 3850 4350\nConnection ~ 3750 4450\nWire Wire Line\n\t3950 4450 3950 4350\nConnection ~ 3850 4450\nWire Wire Line\n\t4050 4450 4050 4350\nConnection ~ 3950 4450\nWire Wire Line\n\t4450 2900 4450 3600\nConnection ~ 2900 2750\nWire Wire Line\n\t2900 2750 2600 2750\nWire Wire Line\n\t2900 3200 3050 3200\nWire Wire Line\n\t2850 2100 2900 2100\nWire Wire Line\n\t2900 2100 2900 2250\nWire Wire Line\n\t2900 2550 2900 3200\nConnection ~ 6400 1550\nWire Wire Line\n\t6400 1550 6100 1550\nWire Wire Line\n\t6350 900 6400 900 \nWire Wire Line\n\t6400 900 6400 1050\nWire Wire Line\n\t6400 1350 6400 2000\nConnection ~ 6400 4550\nWire Wire Line\n\t6400 4550 6100 4550\nWire Wire Line\n\t6400 3750 6400 4050\nWire Wire Line\n\t6400 4350 6400 5000\nWire Wire Line\n\t3550 2900 3550 3200\nWire Wire Line\n\t3800 2900 3800 3200\nWire Wire Line\n\t3800 3200 3650 3200\nWire Wire Line\n\t2700 1000 2550 1000\nWire Wire Line\n\t3550 2200 3550 2600\nWire Wire Line\n\t3800 2200 3800 2600\nWire Wire Line\n\t6800 1000 6800 1400\nWire Wire Line\n\t7050 1000 7050 1400\nWire Wire Line\n\t6800 1700 6800 2000\nWire Wire Line\n\t6800 2000 6900 2000\nWire Wire Line\n\t7050 1700 7050 2000\nWire Wire Line\n\t7050 2000 7000 2000\nWire Wire Line\n\t6800 3950 6800 4350\nWire Wire Line\n\t7050 3950 7050 4350\nWire Wire Line\n\t6800 4650 6800 5000\nWire Wire Line\n\t7050 4650 7050 5000\nWire Wire Line\n\t7050 5000 7000 5000\nWire Wire Line\n\t6800 5000 6900 5000\nWire Wire Line\n\t6800 4000 7250 4000\nConnection ~ 6800 4000\nWire Wire Line\n\t7250 4250 7050 4250\nConnection ~ 7050 4250\nWire Wire Line\n\t7250 1050 6800 1050\nConnection ~ 6800 1050\nWire Wire Line\n\t7250 1300 7050 1300\nConnection ~ 7050 1300\nWire Wire Line\n\t4000 2250 3550 2250\nConnection ~ 3550 2250\nWire Wire Line\n\t4000 2500 3800 2500\nConnection ~ 3800 2500\nWire Wire Line\n\t5800 2900 5800 2550\nWire Wire Line\n\t2700 2200 2900 2200\nConnection ~ 2900 2200\nWire Wire Line\n\t6300 1000 6400 1000\nConnection ~ 6400 1000\nWire Wire Line\n\t6350 4000 6400 4000\nConnection ~ 6400 4000\nWire Wire Line\n\t9500 2400 9650 2400\nWire Wire Line\n\t9650 5650 9450 5650\nConnection ~ 5700 2900\nConnection ~ 4800 2900\nWire Wire Line\n\t4800 3100 4800 3150\nWire Wire Line\n\t5700 3100 5700 3150\nConnection ~ 5700 5550\nConnection ~ 4700 5550\nWire Wire Line\n\t5750 5800 5750 5750\nWire Wire Line\n\t5750 5750 5700 5750\nWire Wire Line\n\t4150 4450 4150 4350\nConnection ~ 4050 4450\nWire Wire Line\n\t7800 5400 7900 5400\nWire Wire Line\n\t7900 5400 7900 4650\nWire Wire Line\n\t7500 6250 7500 6150\nConnection ~ 7400 6250\nWire Wire Line\n\t7800 2650 7900 2650\nWire Wire Line\n\t7900 2650 7900 2800\nWire Wire Line\n\t7500 3250 7500 3150\nConnection ~ 7400 3250\nWire Wire Line\n\t6100 3750 6400 3750\nWire Wire Line\n\t7800 2400 9200 2400\nWire Wire Line\n\t4700 5750 4600 5750\nWire Wire Line\n\t4600 5750 4600 5800\nWire Wire Line\n\t4450 2900 5800 2900\nWire Wire Line\n\t4450 5550 5800 5550\nWire Wire Line\n\t4450 5550 4450 3850\nWire Wire Line\n\t9150 5650 7800 5650\n$EndSCHEMATC\n" }, { "path": "hw/power.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 9 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL BARREL_JACK CON1\nU 1 1 564D0BBF\nP 1200 1100\nF 0 \"CON1\" H 1200 1350 60 0000 C CNN\nF 1 \"BARREL_JACK\" H 1200 900 60 0000 C CNN\nF 2 \"VNA:EJ508A\" H 1200 1100 60 0001 C CNN\nF 3 \"\" H 1200 1100 60 0000 C CNN\n\t1 1200 1100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0175\nU 1 1 564D0C24\nP 1600 1350\nF 0 \"#PWR0175\" H 1600 1100 50 0001 C CNN\nF 1 \"GND\" H 1600 1200 50 0000 C CNN\nF 2 \"\" H 1600 1350 60 0000 C CNN\nF 3 \"\" H 1600 1350 60 0000 C CNN\n\t1 1600 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C102\nU 1 1 564D0C4C\nP 2150 1250\nF 0 \"C102\" H 2175 1350 50 0000 L CNN\nF 1 \"10u\" H 2175 1150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2188 1100 30 0001 C CNN\nF 3 \"\" H 2150 1250 60 0000 C CNN\n\t1 2150 1250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C103\nU 1 1 564D0C75\nP 3300 1300\nF 0 \"C103\" H 3325 1400 50 0000 L CNN\nF 1 \"10u\" H 3325 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 3338 1150 30 0001 C CNN\nF 3 \"\" H 3300 1300 60 0000 C CNN\n\t1 3300 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0176\nU 1 1 564D0CAF\nP 2150 1400\nF 0 \"#PWR0176\" H 2150 1150 50 0001 C CNN\nF 1 \"GND\" H 2150 1250 50 0000 C CNN\nF 2 \"\" H 2150 1400 60 0000 C CNN\nF 3 \"\" H 2150 1400 60 0000 C CNN\n\t1 2150 1400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0177\nU 1 1 564D0CCA\nP 3300 1450\nF 0 \"#PWR0177\" H 3300 1200 50 0001 C CNN\nF 1 \"GND\" H 3300 1300 50 0000 C CNN\nF 2 \"\" H 3300 1450 60 0000 C CNN\nF 3 \"\" H 3300 1450 60 0000 C CNN\n\t1 3300 1450\n\t1 0 0 -1 \n$EndComp\nText Label 3850 1000 0 60 ~ 0\n12V\nText HLabel 6300 2600 2 60 Output ~ 0\n3V6\n$Comp\nL C C71\nU 1 1 566CB1B3\nP 1250 2750\nF 0 \"C71\" H 1275 2850 50 0000 L CNN\nF 1 \"10u\" H 1275 2650 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1288 2600 30 0001 C CNN\nF 3 \"\" H 1250 2750 60 0000 C CNN\n\t1 1250 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C110\nU 1 1 566CB1B9\nP 4900 2900\nF 0 \"C110\" H 5015 2950 50 0000 L CNN\nF 1 \"10u\" H 5015 2850 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4938 2750 30 0001 C CNN\nF 3 \"\" H 4900 2900 60 0000 C CNN\n\t1 4900 2900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C112\nU 1 1 566CB1BF\nP 5150 2900\nF 0 \"C112\" H 5265 2950 50 0000 L CNN\nF 1 \"10u\" H 5265 2850 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 5188 2750 30 0001 C CNN\nF 3 \"\" H 5150 2900 60 0000 C CNN\n\t1 5150 2900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0178\nU 1 1 566CB1F1\nP 4900 3050\nF 0 \"#PWR0178\" H 4900 2800 50 0001 C CNN\nF 1 \"GND\" H 4900 2900 50 0000 C CNN\nF 2 \"\" H 4900 3050 60 0000 C CNN\nF 3 \"\" H 4900 3050 60 0000 C CNN\n\t1 4900 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0179\nU 1 1 566CB1F7\nP 5150 3050\nF 0 \"#PWR0179\" H 5150 2800 50 0001 C CNN\nF 1 \"GND\" H 5150 2900 50 0000 C CNN\nF 2 \"\" H 5150 3050 60 0000 C CNN\nF 3 \"\" H 5150 3050 60 0000 C CNN\n\t1 5150 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0180\nU 1 1 566CB20C\nP 1250 2900\nF 0 \"#PWR0180\" H 1250 2650 50 0001 C CNN\nF 1 \"GND\" H 1250 2750 50 0000 C CNN\nF 2 \"\" H 1250 2900 60 0000 C CNN\nF 3 \"\" H 1250 2900 60 0000 C CNN\n\t1 1250 2900\n\t1 0 0 -1 \n$EndComp\nText Label 1150 2600 2 60 ~ 0\n12V\n$Comp\nL C C116\nU 1 1 566CB254\nP 6000 2950\nF 0 \"C116\" H 6025 3050 50 0000 L CNN\nF 1 \"10u\" H 6025 2850 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6038 2800 30 0001 C CNN\nF 3 \"\" H 6000 2950 60 0000 C CNN\n\t1 6000 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C118\nU 1 1 566CB25A\nP 6250 2950\nF 0 \"C118\" H 6275 3050 50 0000 L CNN\nF 1 \"10u\" H 6275 2850 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6288 2800 30 0001 C CNN\nF 3 \"\" H 6250 2950 60 0000 C CNN\n\t1 6250 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0181\nU 1 1 566CB262\nP 6000 3100\nF 0 \"#PWR0181\" H 6000 2850 50 0001 C CNN\nF 1 \"GND\" H 6000 2950 50 0000 C CNN\nF 2 \"\" H 6000 3100 60 0000 C CNN\nF 3 \"\" H 6000 3100 60 0000 C CNN\n\t1 6000 3100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0182\nU 1 1 566CB268\nP 6250 3100\nF 0 \"#PWR0182\" H 6250 2850 50 0001 C CNN\nF 1 \"GND\" H 6250 2950 50 0000 C CNN\nF 2 \"\" H 6250 3100 60 0000 C CNN\nF 3 \"\" H 6250 3100 60 0000 C CNN\n\t1 6250 3100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL MCP1824T U25\nU 1 1 5695A2C6\nP 7900 1250\nF 0 \"U25\" H 8100 1050 60 0000 C CNN\nF 1 \"MCP1824T-3302E\" H 7900 1450 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 7700 1200 60 0001 C CNN\nF 3 \"\" H 7700 1200 60 0000 C CNN\n\t1 7900 1250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0183\nU 1 1 5695A3AB\nP 7350 1400\nF 0 \"#PWR0183\" H 7350 1150 50 0001 C CNN\nF 1 \"GND\" H 7350 1250 50 0000 C CNN\nF 2 \"\" H 7350 1400 60 0000 C CNN\nF 3 \"\" H 7350 1400 60 0000 C CNN\n\t1 7350 1400\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 8350 1350\n$Comp\nL C C137\nU 1 1 5695A684\nP 8600 1300\nF 0 \"C137\" H 8625 1400 50 0000 L CNN\nF 1 \"10u\" H 8625 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 8638 1150 30 0001 C CNN\nF 3 \"\" H 8600 1300 60 0000 C CNN\n\t1 8600 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0184\nU 1 1 5695A728\nP 8600 1450\nF 0 \"#PWR0184\" H 8600 1200 50 0001 C CNN\nF 1 \"GND\" H 8600 1300 50 0000 C CNN\nF 2 \"\" H 8600 1450 60 0000 C CNN\nF 3 \"\" H 8600 1450 60 0000 C CNN\n\t1 8600 1450\n\t1 0 0 -1 \n$EndComp\nText HLabel 9100 1150 2 60 Output ~ 0\n3V3D\nText Label 7200 1150 2 60 ~ 0\n3V6\n$Comp\nL C C136\nU 1 1 5695ABA9\nP 7150 1300\nF 0 \"C136\" H 7175 1400 50 0000 L CNN\nF 1 \"100n\" H 7175 1200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7188 1150 30 0001 C CNN\nF 3 \"\" H 7150 1300 60 0000 C CNN\n\t1 7150 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0185\nU 1 1 5695AD18\nP 7150 1450\nF 0 \"#PWR0185\" H 7150 1200 50 0001 C CNN\nF 1 \"GND\" H 7150 1300 50 0000 C CNN\nF 2 \"\" H 7150 1450 60 0000 C CNN\nF 3 \"\" H 7150 1450 60 0000 C CNN\n\t1 7150 1450\n\t1 0 0 -1 \n$EndComp\nText Notes 7600 950 0 60 ~ 0\nMax 300 mA\\nTrise: 25 C\n$Comp\nL C C79\nU 1 1 569FAE1D\nP 3600 1300\nF 0 \"C79\" H 3625 1400 50 0000 L CNN\nF 1 \"DNP\" H 3625 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 3638 1150 30 0001 C CNN\nF 3 \"\" H 3600 1300 60 0000 C CNN\n\t1 3600 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0186\nU 1 1 569FB24D\nP 3600 1450\nF 0 \"#PWR0186\" H 3600 1200 50 0001 C CNN\nF 1 \"GND\" H 3600 1300 50 0000 C CNN\nF 2 \"\" H 3600 1450 60 0000 C CNN\nF 3 \"\" H 3600 1450 60 0000 C CNN\n\t1 3600 1450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C86\nU 1 1 569FB32C\nP 3850 1300\nF 0 \"C86\" H 3875 1400 50 0000 L CNN\nF 1 \"DNP\" H 3875 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 3888 1150 30 0001 C CNN\nF 3 \"\" H 3850 1300 60 0000 C CNN\n\t1 3850 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0187\nU 1 1 569FB48C\nP 3850 1450\nF 0 \"#PWR0187\" H 3850 1200 50 0001 C CNN\nF 1 \"GND\" H 3850 1300 50 0000 C CNN\nF 2 \"\" H 3850 1450 60 0000 C CNN\nF 3 \"\" H 3850 1450 60 0000 C CNN\n\t1 3850 1450\n\t1 0 0 -1 \n$EndComp\nText Label 1500 1000 0 60 ~ 0\n12V_IN\n$Comp\nL R R65\nU 1 1 566DF3B9\nP 4400 5000\nF 0 \"R65\" H 4470 5050 50 0000 L CNN\nF 1 \"100\" H 4470 4950 50 0000 L CNN\nF 2 \"VNA:R_0402b\" V 4330 5000 30 0001 C CNN\nF 3 \"\" H 4400 5000 30 0000 C CNN\n\t1 4400 5000\n\t1 0 0 -1 \n$EndComp\nText Label 3000 4350 0 60 ~ 0\nSYNC_5V\nText Label 2500 4350 2 60 ~ 0\nSYNC_3V3\n$Comp\nL GND #PWR0188\nU 1 1 566C9349\nP 6350 5350\nF 0 \"#PWR0188\" H 6350 5100 50 0001 C CNN\nF 1 \"GND\" H 6350 5200 50 0000 C CNN\nF 2 \"\" H 6350 5350 60 0000 C CNN\nF 3 \"\" H 6350 5350 60 0000 C CNN\n\t1 6350 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0189\nU 1 1 566C9343\nP 6100 5350\nF 0 \"#PWR0189\" H 6100 5100 50 0001 C CNN\nF 1 \"GND\" H 6100 5200 50 0000 C CNN\nF 2 \"\" H 6100 5350 60 0000 C CNN\nF 3 \"\" H 6100 5350 60 0000 C CNN\n\t1 6100 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C119\nU 1 1 566C933B\nP 6350 5200\nF 0 \"C119\" H 6375 5300 50 0000 L CNN\nF 1 \"10u\" H 6375 5100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6388 5050 30 0001 C CNN\nF 3 \"\" H 6350 5200 60 0000 C CNN\n\t1 6350 5200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C117\nU 1 1 566C9335\nP 6100 5200\nF 0 \"C117\" H 6125 5300 50 0000 L CNN\nF 1 \"10u\" H 6125 5100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6138 5050 30 0001 C CNN\nF 3 \"\" H 6100 5200 60 0000 C CNN\n\t1 6100 5200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C104\nU 1 1 566C864C\nP 1900 5950\nF 0 \"C104\" H 2015 6000 50 0000 L CNN\nF 1 \"10n\" H 2015 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1938 5800 30 0001 C CNN\nF 3 \"\" H 1900 5950 60 0000 C CNN\n\t1 1900 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C106\nU 1 1 566C85EB\nP 2200 5600\nF 0 \"C106\" H 2315 5650 50 0000 L CNN\nF 1 \"68p\" H 2315 5550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2238 5450 30 0001 C CNN\nF 3 \"\" H 2200 5600 60 0000 C CNN\n\t1 2200 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R58\nU 1 1 566C851F\nP 1900 5600\nF 0 \"R58\" H 1970 5650 50 0000 L CNN\nF 1 \"8.2k\" H 1970 5550 50 0000 L CNN\nF 2 \"VNA:R_0402b\" V 1830 5600 30 0001 C CNN\nF 3 \"\" H 1900 5600 30 0000 C CNN\n\t1 1900 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C109\nU 1 1 566C7BB6\nP 4400 5350\nF 0 \"C109\" H 4515 5400 50 0000 L CNN\nF 1 \"4.7n\" H 4515 5300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4438 5200 30 0001 C CNN\nF 3 \"\" H 4400 5350 60 0000 C CNN\n\t1 4400 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0190\nU 1 1 566C7910\nP 1700 5650\nF 0 \"#PWR0190\" H 1700 5400 50 0001 C CNN\nF 1 \"GND\" H 1700 5500 50 0000 C CNN\nF 2 \"\" H 1700 5650 60 0000 C CNN\nF 3 \"\" H 1700 5650 60 0000 C CNN\n\t1 1700 5650\n\t1 0 0 -1 \n$EndComp\nText Label 1200 4850 2 60 ~ 0\n12V\n$Comp\nL GND #PWR0191\nU 1 1 566C7220\nP 1300 5150\nF 0 \"#PWR0191\" H 1300 4900 50 0001 C CNN\nF 1 \"GND\" H 1300 5000 50 0000 C CNN\nF 2 \"\" H 1300 5150 60 0000 C CNN\nF 3 \"\" H 1300 5150 60 0000 C CNN\n\t1 1300 5150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0192\nU 1 1 566C6D5D\nP 2750 5600\nF 0 \"#PWR0192\" H 2750 5350 50 0001 C CNN\nF 1 \"GND\" H 2750 5450 50 0000 C CNN\nF 2 \"\" H 2750 5600 60 0000 C CNN\nF 3 \"\" H 2750 5600 60 0000 C CNN\n\t1 2750 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0193\nU 1 1 566C6CD2\nP 2650 5600\nF 0 \"#PWR0193\" H 2650 5350 50 0001 C CNN\nF 1 \"GND\" H 2650 5450 50 0000 C CNN\nF 2 \"\" H 2650 5600 60 0000 C CNN\nF 3 \"\" H 2650 5600 60 0000 C CNN\n\t1 2650 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0194\nU 1 1 566C659D\nP 5200 5300\nF 0 \"#PWR0194\" H 5200 5050 50 0001 C CNN\nF 1 \"GND\" H 5200 5150 50 0000 C CNN\nF 2 \"\" H 5200 5300 60 0000 C CNN\nF 3 \"\" H 5200 5300 60 0000 C CNN\n\t1 5200 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0195\nU 1 1 566C6512\nP 4950 5300\nF 0 \"#PWR0195\" H 4950 5050 50 0001 C CNN\nF 1 \"GND\" H 4950 5150 50 0000 C CNN\nF 2 \"\" H 4950 5300 60 0000 C CNN\nF 3 \"\" H 4950 5300 60 0000 C CNN\n\t1 4950 5300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0196\nU 1 1 566C5D36\nP 4200 5900\nF 0 \"#PWR0196\" H 4200 5650 50 0001 C CNN\nF 1 \"GND\" H 4200 5750 50 0000 C CNN\nF 2 \"\" H 4200 5900 60 0000 C CNN\nF 3 \"\" H 4200 5900 60 0000 C CNN\n\t1 4200 5900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R63\nU 1 1 566C5CBD\nP 4200 5700\nF 0 \"R63\" V 4280 5700 50 0000 C CNN\nF 1 \"680\" V 4200 5700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4130 5700 30 0001 C CNN\nF 3 \"\" H 4200 5700 30 0000 C CNN\n\t1 4200 5700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R62\nU 1 1 566C5C68\nP 4200 5150\nF 0 \"R62\" V 4280 5150 50 0000 C CNN\nF 1 \"4.99k\" V 4200 5150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4130 5150 30 0001 C CNN\nF 3 \"\" H 4200 5150 30 0000 C CNN\n\t1 4200 5150\n\t1 0 0 -1 \n$EndComp\nText Label 3250 5000 0 60 ~ 0\nSYNC_5V\n$Comp\nL C C114\nU 1 1 566C4BCA\nP 5200 5150\nF 0 \"C114\" H 5315 5200 50 0000 L CNN\nF 1 \"10u\" H 5315 5100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 5238 5000 30 0001 C CNN\nF 3 \"\" H 5200 5150 60 0000 C CNN\n\t1 5200 5150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C111\nU 1 1 566C4AD6\nP 4950 5150\nF 0 \"C111\" H 5065 5200 50 0000 L CNN\nF 1 \"10u\" H 5065 5100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4988 5000 30 0001 C CNN\nF 3 \"\" H 4950 5150 60 0000 C CNN\n\t1 4950 5150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C100\nU 1 1 566C49F9\nP 1300 5000\nF 0 \"C100\" H 1325 5100 50 0000 L CNN\nF 1 \"10u\" H 1325 4900 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1338 4850 30 0001 C CNN\nF 3 \"\" H 1300 5000 60 0000 C CNN\n\t1 1300 5000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R34\nU 1 1 566C48D4\nP 1700 5450\nF 0 \"R34\" V 1780 5450 50 0000 C CNN\nF 1 \"59k\" V 1700 5450 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1630 5450 30 0001 C CNN\nF 3 \"\" H 1700 5450 30 0000 C CNN\n\t1 1700 5450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L5\nU 1 1 566C477B\nP 3750 4850\nF 0 \"L5\" H 3750 5053 50 0000 C CNN\nF 1 \"33u (SRR6040A-330M)\" H 3750 4953 50 0000 C CNN\nF 2 \"VNA:SRR6040A\" H 3750 4850 60 0001 C CNN\nF 3 \"\" H 3750 4850 60 0000 C CNN\n\t1 3750 4850\n\t1 0 0 -1 \n$EndComp\nText HLabel 6750 4850 2 60 Output ~ 0\n5V\n$Comp\nL C C101\nU 1 1 566CB23D\nP 1850 3700\nF 0 \"C101\" H 1875 3800 50 0000 L CNN\nF 1 \"10n\" H 1875 3600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1888 3550 30 0001 C CNN\nF 3 \"\" H 1850 3700 60 0000 C CNN\n\t1 1850 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C105\nU 1 1 566CB237\nP 2150 3350\nF 0 \"C105\" H 2265 3400 50 0000 L CNN\nF 1 \"100p\" H 2265 3300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2188 3200 30 0001 C CNN\nF 3 \"\" H 2150 3350 60 0000 C CNN\n\t1 2150 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R57\nU 1 1 566CB231\nP 1850 3350\nF 0 \"R57\" V 1930 3350 50 0000 C CNN\nF 1 \"6.8k\" V 1850 3350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1780 3350 30 0001 C CNN\nF 3 \"\" H 1850 3350 30 0000 C CNN\n\t1 1850 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C108\nU 1 1 566CB223\nP 4350 3100\nF 0 \"C108\" H 4375 3200 50 0000 L CNN\nF 1 \"4.7n\" H 4375 3000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4388 2950 30 0001 C CNN\nF 3 \"\" H 4350 3100 60 0000 C CNN\n\t1 4350 3100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R64\nU 1 1 566CB21D\nP 4350 2750\nF 0 \"R64\" H 4420 2800 50 0000 L CNN\nF 1 \"100\" H 4420 2700 50 0000 L CNN\nF 2 \"VNA:R_0402b\" V 4280 2750 30 0001 C CNN\nF 3 \"\" H 4350 2750 30 0000 C CNN\n\t1 4350 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0197\nU 1 1 566CB217\nP 1650 3400\nF 0 \"#PWR0197\" H 1650 3150 50 0001 C CNN\nF 1 \"GND\" H 1650 3250 50 0000 C CNN\nF 2 \"\" H 1650 3400 60 0000 C CNN\nF 3 \"\" H 1650 3400 60 0000 C CNN\n\t1 1650 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0198\nU 1 1 566CB203\nP 2700 3350\nF 0 \"#PWR0198\" H 2700 3100 50 0001 C CNN\nF 1 \"GND\" H 2700 3200 50 0000 C CNN\nF 2 \"\" H 2700 3350 60 0000 C CNN\nF 3 \"\" H 2700 3350 60 0000 C CNN\n\t1 2700 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0199\nU 1 1 566CB1FD\nP 2600 3350\nF 0 \"#PWR0199\" H 2600 3100 50 0001 C CNN\nF 1 \"GND\" H 2600 3200 50 0000 C CNN\nF 2 \"\" H 2600 3350 60 0000 C CNN\nF 3 \"\" H 2600 3350 60 0000 C CNN\n\t1 2600 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0200\nU 1 1 566CB1DA\nP 4150 3650\nF 0 \"#PWR0200\" H 4150 3400 50 0001 C CNN\nF 1 \"GND\" H 4150 3500 50 0000 C CNN\nF 2 \"\" H 4150 3650 60 0000 C CNN\nF 3 \"\" H 4150 3650 60 0000 C CNN\n\t1 4150 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R61\nU 1 1 566CB1D4\nP 4150 3450\nF 0 \"R61\" V 4230 3450 50 0000 C CNN\nF 1 \"1k\" V 4150 3450 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4080 3450 30 0001 C CNN\nF 3 \"\" H 4150 3450 30 0000 C CNN\n\t1 4150 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R60\nU 1 1 566CB1CE\nP 4150 2900\nF 0 \"R60\" V 4230 2900 50 0000 C CNN\nF 1 \"4.99k\" V 4150 2900 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4080 2900 30 0001 C CNN\nF 3 \"\" H 4150 2900 30 0000 C CNN\n\t1 4150 2900\n\t1 0 0 -1 \n$EndComp\nText Label 3200 2750 0 60 ~ 0\nSYNC_3V3\n$Comp\nL R R32\nU 1 1 566CB1AD\nP 1650 3200\nF 0 \"R32\" V 1730 3200 50 0000 C CNN\nF 1 \"68k\" V 1650 3200 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1580 3200 30 0001 C CNN\nF 3 \"\" H 1650 3200 30 0000 C CNN\n\t1 1650 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L4\nU 1 1 566CB1A4\nP 3700 2600\nF 0 \"L4\" H 3700 2803 50 0000 C CNN\nF 1 \"33u (SRR6040A-330M)\" H 3700 2703 50 0000 C CNN\nF 2 \"VNA:SRR6040A\" H 3700 2600 60 0001 C CNN\nF 3 \"\" H 3700 2600 60 0000 C CNN\n\t1 3700 2600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0201\nU 1 1 566C5DC1\nP 3450 5700\nF 0 \"#PWR0201\" H 3450 5450 50 0001 C CNN\nF 1 \"GND\" H 3450 5550 50 0000 C CNN\nF 2 \"\" H 3450 5700 60 0000 C CNN\nF 3 \"\" H 3450 5700 60 0000 C CNN\n\t1 3450 5700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL D_Schottky D3\nU 1 1 566C4CB4\nP 3450 5500\nF 0 \"D3\" H 3450 5600 50 0000 C CNN\nF 1 \"SS13FL\" H 3450 5400 50 0000 C CNN\nF 2 \"VNA:SOD-123F\" H 3450 5500 60 0001 C CNN\nF 3 \"\" H 3450 5500 60 0000 C CNN\n\t1 3450 5500\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0202\nU 1 1 566CB1E0\nP 3400 3450\nF 0 \"#PWR0202\" H 3400 3200 50 0001 C CNN\nF 1 \"GND\" H 3400 3300 50 0000 C CNN\nF 2 \"\" H 3400 3450 60 0000 C CNN\nF 3 \"\" H 3400 3450 60 0000 C CNN\n\t1 3400 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL D_Schottky D2\nU 1 1 566CB1C5\nP 3400 3250\nF 0 \"D2\" H 3400 3350 50 0000 C CNN\nF 1 \"SS13FL\" H 3400 3150 50 0000 C CNN\nF 2 \"VNA:SOD-123F\" H 3400 3250 60 0001 C CNN\nF 3 \"\" H 3400 3250 60 0000 C CNN\n\t1 3400 3250\n\t0 1 1 0 \n$EndComp\n$Comp\nL L7981 U20\nU 1 1 566C40B0\nP 2650 5050\nAR Path=\"/566C40B0\" Ref=\"U20\" Part=\"1\" \nAR Path=\"/564D0768/566C40B0\" Ref=\"U20\" Part=\"1\" \nF 0 \"U20\" H 2950 4700 60 0000 C CNN\nF 1 \"L7980\" H 2850 5350 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm\" H 2450 4400 60 0001 C CNN\nF 3 \"\" H 2450 4400 60 0000 C CNN\n\t1 2650 5050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL L7981 U19\nU 1 1 566CB19E\nP 2600 2800\nAR Path=\"/566CB19E\" Ref=\"U19\" Part=\"1\" \nAR Path=\"/564D0768/566CB19E\" Ref=\"U19\" Part=\"1\" \nF 0 \"U19\" H 2900 2450 60 0000 C CNN\nF 1 \"L7980\" H 2800 3100 60 0000 C CNN\nF 2 \"Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm\" H 2400 2150 60 0001 C CNN\nF 3 \"\" H 2400 2150 60 0000 C CNN\n\t1 2600 2800\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1500 1100 1600 1100\nWire Wire Line\n\t1600 1100 1600 1350\nWire Wire Line\n\t1500 1200 1600 1200\nConnection ~ 1600 1200\nWire Wire Line\n\t2150 1000 2150 1100\nWire Wire Line\n\t3300 1000 3300 1150\nConnection ~ 2150 1000\nWire Wire Line\n\t1500 1000 2250 1000\nWire Wire Line\n\t2950 1000 4100 1000\nWire Wire Line\n\t1200 4850 2150 4850\nWire Wire Line\n\t2000 4850 2000 4950\nWire Wire Line\n\t2000 4950 2150 4950\nWire Wire Line\n\t3250 5000 3200 5000\nWire Wire Line\n\t3200 4850 3500 4850\nWire Wire Line\n\t3450 5650 3450 5700\nWire Wire Line\n\t3450 4850 3450 5350\nConnection ~ 3450 4850\nWire Wire Line\n\t4000 4850 5250 4850\nWire Wire Line\n\t4200 4850 4200 5000\nWire Wire Line\n\t4200 5300 4200 5550\nWire Wire Line\n\t4200 5900 4200 5850\nWire Wire Line\n\t4950 4850 4950 5000\nConnection ~ 4200 4850\nWire Wire Line\n\t5200 4850 5200 5000\nConnection ~ 4950 4850\nWire Wire Line\n\t2750 5550 2750 5600\nWire Wire Line\n\t2650 5600 2650 5550\nConnection ~ 2000 4850\nConnection ~ 1300 4850\nWire Wire Line\n\t2150 5100 1700 5100\nWire Wire Line\n\t1700 5100 1700 5300\nWire Wire Line\n\t1700 5600 1700 5650\nWire Wire Line\n\t4400 5150 4400 5200\nWire Wire Line\n\t4200 5500 4400 5500\nConnection ~ 4200 5500\nWire Wire Line\n\t3200 5200 3950 5200\nWire Wire Line\n\t3950 5200 3950 6150\nWire Wire Line\n\t3950 5400 4200 5400\nConnection ~ 4200 5400\nConnection ~ 4400 4850\nWire Wire Line\n\t2150 5200 1900 5200\nWire Wire Line\n\t1900 5200 1900 5450\nWire Wire Line\n\t1900 5400 2200 5400\nWire Wire Line\n\t2200 5400 2200 5450\nConnection ~ 1900 5400\nWire Wire Line\n\t1900 5750 1900 5800\nWire Wire Line\n\t1900 6100 1900 6150\nWire Wire Line\n\t1900 6150 3950 6150\nWire Wire Line\n\t2200 6150 2200 5750\nConnection ~ 3950 5400\nConnection ~ 2200 6150\nWire Wire Line\n\t6100 4850 6100 5050\nWire Wire Line\n\t6350 4850 6350 5050\nWire Wire Line\n\t5950 4850 6750 4850\nConnection ~ 6100 4850\nConnection ~ 5200 4850\nConnection ~ 6350 4850\nWire Wire Line\n\t1150 2600 2100 2600\nWire Wire Line\n\t3200 2750 3150 2750\nWire Wire Line\n\t3150 2600 3450 2600\nWire Wire Line\n\t3400 3400 3400 3450\nWire Wire Line\n\t3400 2600 3400 3100\nConnection ~ 3400 2600\nWire Wire Line\n\t3950 2600 5200 2600\nWire Wire Line\n\t4150 2600 4150 2750\nWire Wire Line\n\t4150 3050 4150 3300\nWire Wire Line\n\t4150 3650 4150 3600\nWire Wire Line\n\t4900 2600 4900 2750\nConnection ~ 4150 2600\nWire Wire Line\n\t5150 2600 5150 2750\nConnection ~ 4900 2600\nWire Wire Line\n\t2700 3300 2700 3350\nWire Wire Line\n\t2600 3350 2600 3300\nConnection ~ 1250 2600\nWire Wire Line\n\t2100 2850 1650 2850\nWire Wire Line\n\t1650 2850 1650 3050\nWire Wire Line\n\t1650 3350 1650 3400\nWire Wire Line\n\t4350 2900 4350 2950\nWire Wire Line\n\t4150 3250 4350 3250\nConnection ~ 4150 3250\nWire Wire Line\n\t3150 2950 3900 2950\nWire Wire Line\n\t3900 2950 3900 3900\nWire Wire Line\n\t3900 3150 4150 3150\nConnection ~ 4150 3150\nConnection ~ 4350 2600\nWire Wire Line\n\t2100 2950 1850 2950\nWire Wire Line\n\t1850 2950 1850 3200\nWire Wire Line\n\t1850 3150 2150 3150\nWire Wire Line\n\t2150 3150 2150 3200\nConnection ~ 1850 3150\nWire Wire Line\n\t1850 3500 1850 3550\nWire Wire Line\n\t1850 3850 1850 3900\nWire Wire Line\n\t1850 3900 3900 3900\nWire Wire Line\n\t2150 3900 2150 3500\nConnection ~ 3900 3150\nConnection ~ 2150 3900\nWire Wire Line\n\t6000 2600 6000 2800\nWire Wire Line\n\t6250 2600 6250 2800\nWire Wire Line\n\t5900 2600 6300 2600\nConnection ~ 6000 2600\nConnection ~ 5150 2600\nConnection ~ 6250 2600\nWire Wire Line\n\t2500 4350 3000 4350\nConnection ~ 3300 1000\nWire Wire Line\n\t7400 1350 7350 1350\nWire Wire Line\n\t7350 1350 7350 1400\nWire Wire Line\n\t8350 1150 9100 1150\nConnection ~ 8600 1150\nWire Wire Line\n\t7150 1150 7400 1150\nWire Wire Line\n\t7400 1250 7350 1250\nWire Wire Line\n\t7350 1250 7350 1150\nConnection ~ 7350 1150\nWire Wire Line\n\t3600 1150 3600 1000\nConnection ~ 3600 1000\nWire Wire Line\n\t3850 1000 3850 1150\n$Comp\nL C C163\nU 1 1 56AE0E9C\nP 1950 1250\nF 0 \"C163\" H 1975 1350 50 0000 L CNN\nF 1 \"DNP\" H 1975 1150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1988 1100 30 0001 C CNN\nF 3 \"\" H 1950 1250 60 0000 C CNN\n\t1 1950 1250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0203\nU 1 1 56AE0F3D\nP 1950 1400\nF 0 \"#PWR0203\" H 1950 1150 50 0001 C CNN\nF 1 \"GND\" H 1950 1250 50 0000 C CNN\nF 2 \"\" H 1950 1400 60 0000 C CNN\nF 3 \"\" H 1950 1400 60 0000 C CNN\n\t1 1950 1400\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1950 1100 1950 1000\nConnection ~ 1950 1000\n$Comp\nL C C164\nU 1 1 56AE175C\nP 1750 1250\nF 0 \"C164\" H 1775 1350 50 0000 L CNN\nF 1 \"DNP\" H 1775 1150 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1788 1100 30 0001 C CNN\nF 3 \"\" H 1750 1250 60 0000 C CNN\n\t1 1750 1250\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1750 1100 1750 1000\nConnection ~ 1750 1000\n$Comp\nL GND #PWR0204\nU 1 1 56AE18C7\nP 1750 1400\nF 0 \"#PWR0204\" H 1750 1150 50 0001 C CNN\nF 1 \"GND\" H 1750 1250 50 0000 C CNN\nF 2 \"\" H 1750 1400 60 0000 C CNN\nF 3 \"\" H 1750 1400 60 0000 C CNN\n\t1 1750 1400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER L6\nU 1 1 57993E08\nP 5550 2600\nF 0 \"L6\" H 5550 2750 50 0000 C CNN\nF 1 \"0\" H 5550 2500 50 0000 C CNN\nF 2 \"VNA:C_0805b\" H 5550 2600 60 0001 C CNN\nF 3 \"\" H 5550 2600 60 0000 C CNN\n\t1 5550 2600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER L2\nU 1 1 5799430D\nP 2600 1000\nF 0 \"L2\" H 2600 1150 50 0000 C CNN\nF 1 \"CIC21P101NE\" H 2600 900 50 0000 C CNN\nF 2 \"VNA:C_0805b\" H 2600 1000 60 0001 C CNN\nF 3 \"\" H 2600 1000 60 0000 C CNN\n\t1 2600 1000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER L7\nU 1 1 57994C77\nP 5600 4850\nF 0 \"L7\" H 5600 5000 50 0000 C CNN\nF 1 \"0\" H 5600 4750 50 0000 C CNN\nF 2 \"VNA:C_0805b\" H 5600 4850 60 0001 C CNN\nF 3 \"\" H 5600 4850 60 0000 C CNN\n\t1 5600 4850\n\t1 0 0 -1 \n$EndComp\n$Sheet\nS 8100 4650 1350 1500\nU 5851A753\nF0 \"fpga_power\" 60\nF1 \"fpga_power.sch\" 60\nF2 \"1V0\" O R 9450 4800 60 \nF3 \"1V8\" O R 9450 4950 60 \nF4 \"12V\" I L 8100 4800 60 \nF5 \"SYNC\" U L 8100 5050 60 \nF6 \"EN_1V0\" I L 8100 5400 60 \nF7 \"EN_1V8\" I L 8100 5500 60 \n$EndSheet\nText Label 2100 2700 2 60 ~ 0\n1V8\nText HLabel 9650 4950 2 60 Output ~ 0\n1V8\nWire Wire Line\n\t9450 4950 9650 4950\nText HLabel 9650 4800 2 60 Output ~ 0\n1V0\nWire Wire Line\n\t9650 4800 9450 4800\nText Label 7950 4800 2 60 ~ 0\n12V\nWire Wire Line\n\t7950 4800 8100 4800\n$Comp\nL LP5907 U36\nU 1 1 5853A077\nP 7950 2200\nF 0 \"U36\" H 8150 2000 60 0000 C CNN\nF 1 \"LP5907-3V3\" H 8050 2400 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 7950 2250 60 0001 C CNN\nF 3 \"\" H 7950 2250 60 0000 C CNN\n\t1 7950 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0205\nU 1 1 5853A10A\nP 7950 2600\nF 0 \"#PWR0205\" H 7950 2350 50 0001 C CNN\nF 1 \"GND\" H 7950 2450 50 0000 C CNN\nF 2 \"\" H 7950 2600 60 0000 C CNN\nF 3 \"\" H 7950 2600 60 0000 C CNN\n\t1 7950 2600\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t7950 2550 7950 2600\n$Comp\nL C C229\nU 1 1 5853A27B\nP 8700 2450\nF 0 \"C229\" H 8725 2550 50 0000 L CNN\nF 1 \"1u\" H 8725 2350 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 8738 2300 30 0001 C CNN\nF 3 \"\" H 8700 2450 60 0000 C CNN\n\t1 8700 2450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C228\nU 1 1 5853A342\nP 7250 2450\nF 0 \"C228\" H 7275 2550 50 0000 L CNN\nF 1 \"1u\" H 7275 2350 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 7288 2300 30 0001 C CNN\nF 3 \"\" H 7250 2450 60 0000 C CNN\n\t1 7250 2450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t7450 2250 7250 2250\nWire Wire Line\n\t7250 2150 7250 2300\nWire Wire Line\n\t6950 2150 7450 2150\nConnection ~ 7250 2250\nConnection ~ 7250 2150\nWire Wire Line\n\t8450 2150 9250 2150\nWire Wire Line\n\t8700 2150 8700 2300\n$Comp\nL GND #PWR0206\nU 1 1 5853A72D\nP 8700 2600\nF 0 \"#PWR0206\" H 8700 2350 50 0001 C CNN\nF 1 \"GND\" H 8700 2450 50 0000 C CNN\nF 2 \"\" H 8700 2600 60 0000 C CNN\nF 3 \"\" H 8700 2600 60 0000 C CNN\n\t1 8700 2600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0207\nU 1 1 5853A7E4\nP 7250 2600\nF 0 \"#PWR0207\" H 7250 2350 50 0001 C CNN\nF 1 \"GND\" H 7250 2450 50 0000 C CNN\nF 2 \"\" H 7250 2600 60 0000 C CNN\nF 3 \"\" H 7250 2600 60 0000 C CNN\n\t1 7250 2600\n\t1 0 0 -1 \n$EndComp\nConnection ~ 8700 2150\nText HLabel 9250 2150 2 60 Output ~ 0\n3V3A\nText Label 6950 2150 2 60 ~ 0\n3V6\nWire Wire Line\n\t8100 5050 7950 5050\nText Label 7950 5050 2 60 ~ 0\nSYNC_3V3\n$Comp\nL LED D5\nU 1 1 58530D5E\nP 5000 1450\nF 0 \"D5\" H 5000 1550 50 0000 C CNN\nF 1 \"LED\" H 5000 1350 50 0000 C CNN\nF 2 \"VNA:LED_0603\" H 5000 1450 60 0001 C CNN\nF 3 \"\" H 5000 1450 60 0000 C CNN\n\t1 5000 1450\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0208\nU 1 1 58531080\nP 5000 1650\nF 0 \"#PWR0208\" H 5000 1400 50 0001 C CNN\nF 1 \"GND\" H 5000 1500 50 0000 C CNN\nF 2 \"\" H 5000 1650 60 0000 C CNN\nF 3 \"\" H 5000 1650 60 0000 C CNN\n\t1 5000 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R108\nU 1 1 5853110E\nP 5000 1100\nF 0 \"R108\" V 5080 1100 50 0000 C CNN\nF 1 \"240\" V 5000 1100 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4930 1100 30 0001 C CNN\nF 3 \"\" H 5000 1100 30 0000 C CNN\n\t1 5000 1100\n\t1 0 0 -1 \n$EndComp\nText Label 5000 950 0 60 ~ 0\n3V6\n$Comp\nL C C256\nU 1 1 586AF484\nP 8850 1300\nF 0 \"C256\" H 8875 1400 50 0000 L CNN\nF 1 \"10u\" H 8875 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 8888 1150 30 0001 C CNN\nF 3 \"\" H 8850 1300 60 0000 C CNN\n\t1 8850 1300\n\t1 0 0 -1 \n$EndComp\nConnection ~ 8850 1150\n$Comp\nL GND #PWR0209\nU 1 1 586AF7CF\nP 8850 1450\nF 0 \"#PWR0209\" H 8850 1200 50 0001 C CNN\nF 1 \"GND\" H 8850 1300 50 0000 C CNN\nF 2 \"\" H 8850 1450 60 0000 C CNN\nF 3 \"\" H 8850 1450 60 0000 C CNN\n\t1 8850 1450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL LP5907 U41\nU 1 1 586AD195\nP 7900 3300\nF 0 \"U41\" H 8100 3100 60 0000 C CNN\nF 1 \"LP5907\" H 8000 3500 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 7900 3350 60 0001 C CNN\nF 3 \"\" H 7900 3350 60 0000 C CNN\n\t1 7900 3300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0210\nU 1 1 586AD19B\nP 7900 3700\nF 0 \"#PWR0210\" H 7900 3450 50 0001 C CNN\nF 1 \"GND\" H 7900 3550 50 0000 C CNN\nF 2 \"\" H 7900 3700 60 0000 C CNN\nF 3 \"\" H 7900 3700 60 0000 C CNN\n\t1 7900 3700\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t7900 3650 7900 3700\n$Comp\nL C C258\nU 1 1 586AD1A2\nP 8650 3550\nF 0 \"C258\" H 8675 3650 50 0000 L CNN\nF 1 \"1u\" H 8675 3450 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 8688 3400 30 0001 C CNN\nF 3 \"\" H 8650 3550 60 0000 C CNN\n\t1 8650 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C257\nU 1 1 586AD1A8\nP 7200 3550\nF 0 \"C257\" H 7225 3650 50 0000 L CNN\nF 1 \"1u\" H 7225 3450 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 7238 3400 30 0001 C CNN\nF 3 \"\" H 7200 3550 60 0000 C CNN\n\t1 7200 3550\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t7400 3350 7200 3350\nWire Wire Line\n\t7200 3250 7200 3400\nWire Wire Line\n\t6900 3250 7400 3250\nConnection ~ 7200 3350\nConnection ~ 7200 3250\nWire Wire Line\n\t8400 3250 9250 3250\nWire Wire Line\n\t8650 3250 8650 3400\n$Comp\nL GND #PWR0211\nU 1 1 586AD1B5\nP 8650 3700\nF 0 \"#PWR0211\" H 8650 3450 50 0001 C CNN\nF 1 \"GND\" H 8650 3550 50 0000 C CNN\nF 2 \"\" H 8650 3700 60 0000 C CNN\nF 3 \"\" H 8650 3700 60 0000 C CNN\n\t1 8650 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0212\nU 1 1 586AD1BB\nP 7200 3700\nF 0 \"#PWR0212\" H 7200 3450 50 0001 C CNN\nF 1 \"GND\" H 7200 3550 50 0000 C CNN\nF 2 \"\" H 7200 3700 60 0000 C CNN\nF 3 \"\" H 7200 3700 60 0000 C CNN\n\t1 7200 3700\n\t1 0 0 -1 \n$EndComp\nConnection ~ 8650 3250\nText HLabel 9250 3250 2 60 Output ~ 0\n3V3A_RX\nText Label 6900 3250 2 60 ~ 0\n3V6\n$Comp\nL R R121\nU 1 1 586AD281\nP 9150 2750\nF 0 \"R121\" V 9230 2750 50 0000 C CNN\nF 1 \"DNP\" V 9150 2750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9080 2750 30 0001 C CNN\nF 3 \"\" H 9150 2750 30 0000 C CNN\n\t1 9150 2750\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t9150 2150 9150 2600\nWire Wire Line\n\t9150 2900 9150 3550\nConnection ~ 9150 2150\nConnection ~ 9150 3250\nText GLabel 9300 3550 2 60 Output ~ 0\n3V3A_RX\nWire Wire Line\n\t9150 3550 9300 3550\n$Comp\nL PWR_FLAG #FLG0213\nU 1 1 58715604\nP 6000 2600\nF 0 \"#FLG0213\" H 6000 2695 50 0001 C CNN\nF 1 \"PWR_FLAG\" H 6000 2780 50 0000 C CNN\nF 2 \"\" H 6000 2600 60 0000 C CNN\nF 3 \"\" H 6000 2600 60 0000 C CNN\n\t1 6000 2600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL PWR_FLAG #FLG0214\nU 1 1 587156D3\nP 6100 4850\nF 0 \"#FLG0214\" H 6100 4945 50 0001 C CNN\nF 1 \"PWR_FLAG\" H 6100 5030 50 0000 C CNN\nF 2 \"\" H 6100 4850 60 0000 C CNN\nF 3 \"\" H 6100 4850 60 0000 C CNN\n\t1 6100 4850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL PWR_FLAG #FLG0215\nU 1 1 58715C8F\nP 3300 1000\nF 0 \"#FLG0215\" H 3300 1095 50 0001 C CNN\nF 1 \"PWR_FLAG\" H 3300 1180 50 0000 C CNN\nF 2 \"\" H 3300 1000 60 0000 C CNN\nF 3 \"\" H 3300 1000 60 0000 C CNN\n\t1 3300 1000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C264\nU 1 1 5876ADF3\nP 4100 1300\nF 0 \"C264\" H 4125 1400 50 0000 L CNN\nF 1 \"DNP\" H 4125 1200 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4138 1150 30 0001 C CNN\nF 3 \"\" H 4100 1300 60 0000 C CNN\n\t1 4100 1300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0216\nU 1 1 5876AEC9\nP 4100 1450\nF 0 \"#PWR0216\" H 4100 1200 50 0001 C CNN\nF 1 \"GND\" H 4100 1300 50 0000 C CNN\nF 2 \"\" H 4100 1450 60 0000 C CNN\nF 3 \"\" H 4100 1450 60 0000 C CNN\n\t1 4100 1450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t4100 1000 4100 1150\nConnection ~ 3850 1000\n$Comp\nL C C266\nU 1 1 587D3026\nP 6650 5200\nF 0 \"C266\" H 6675 5300 50 0000 L CNN\nF 1 \"DNP\" H 6675 5100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6688 5050 30 0001 C CNN\nF 3 \"\" H 6650 5200 60 0000 C CNN\n\t1 6650 5200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0217\nU 1 1 587D3101\nP 6650 5350\nF 0 \"#PWR0217\" H 6650 5100 50 0001 C CNN\nF 1 \"GND\" H 6650 5200 50 0000 C CNN\nF 2 \"\" H 6650 5350 60 0000 C CNN\nF 3 \"\" H 6650 5350 60 0000 C CNN\n\t1 6650 5350\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6650 4850 6650 5050\nConnection ~ 6650 4850\nWire Wire Line\n\t8100 5400 8000 5400\nWire Wire Line\n\t8100 5500 8000 5500\nText Label 8000 5400 2 60 ~ 0\n5V\nText Label 8000 5500 2 60 ~ 0\n5V\n$Comp\nL C C267\nU 1 1 5885A329\nP 1000 4350\nF 0 \"C267\" H 1025 4450 50 0000 L CNN\nF 1 \"DNP\" H 1025 4250 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1038 4200 30 0001 C CNN\nF 3 \"\" H 1000 4350 60 0000 C CNN\n\t1 1000 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C268\nU 1 1 5885A5E4\nP 1200 4350\nF 0 \"C268\" H 1225 4450 50 0000 L CNN\nF 1 \"DNP\" H 1225 4250 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1238 4200 30 0001 C CNN\nF 3 \"\" H 1200 4350 60 0000 C CNN\n\t1 1200 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C269\nU 1 1 5885A6CF\nP 1400 4350\nF 0 \"C269\" H 1425 4450 50 0000 L CNN\nF 1 \"DNP\" H 1425 4250 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 1438 4200 30 0001 C CNN\nF 3 \"\" H 1400 4350 60 0000 C CNN\n\t1 1400 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0218\nU 1 1 5885A993\nP 1400 4500\nF 0 \"#PWR0218\" H 1400 4250 50 0001 C CNN\nF 1 \"GND\" H 1400 4350 50 0000 C CNN\nF 2 \"\" H 1400 4500 60 0000 C CNN\nF 3 \"\" H 1400 4500 60 0000 C CNN\n\t1 1400 4500\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1000 4500 1400 4500\nConnection ~ 1200 4500\nWire Wire Line\n\t1000 4200 1400 4200\nConnection ~ 1200 4200\nText Label 1000 4200 2 60 ~ 0\n12V\n$EndSCHEMATC\n" }, { "path": "hw/receiver.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 3 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\nText HLabel 1300 1450 0 60 Input ~ 0\n3V3A\nText HLabel 1300 850 0 60 Input ~ 0\nRF1\nText HLabel 1300 1050 0 60 Input ~ 0\nRF3\nText HLabel 1300 950 0 60 Input ~ 0\nRF2\nText HLabel 1300 1150 0 60 Input ~ 0\nRF4\n$Comp\nL C C52\nU 1 1 562EF56F\nP 9100 2650\nF 0 \"C52\" H 9125 2750 50 0000 L CNN\nF 1 \"1n\" H 9125 2550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9138 2500 30 0001 C CNN\nF 3 \"\" H 9100 2650 60 0000 C CNN\n\t1 9100 2650\n\t0 -1 -1 0 \n$EndComp\n$Sheet\nS 2400 3100 1800 1100\nU 563156F1\nF0 \"lo_synth\" 60\nF1 \"transmitter.sch\" 60\nF2 \"3V3\" I L 2400 3250 60 \nF3 \"CLK\" I L 2400 3650 60 \nF4 \"DATA\" I L 2400 3750 60 \nF5 \"CE\" I L 2400 3850 60 \nF6 \"LE\" I L 2400 3950 60 \nF7 \"RFOUT_EN\" I L 2400 4100 60 \nF8 \"MUXOUT\" O R 4200 3900 60 \nF9 \"LD\" O R 4200 3800 60 \nF10 \"REF_IN\" I L 2400 3500 60 \nF11 \"3V6\" I L 2400 3350 60 \nF12 \"RF_OUT_P\" O R 4200 3400 60 \nF13 \"RF_OUT_N\" O R 4200 3500 60 \n$EndSheet\nText Label 4300 3400 0 60 ~ 0\nLOP\nText HLabel 4300 3800 2 60 Output ~ 0\nLD\nText HLabel 4300 3900 2 60 Output ~ 0\nMUXOUT\nText HLabel 2300 3250 0 60 Input ~ 0\n3V3D\nText HLabel 2300 3350 0 60 Input ~ 0\n3V6\nText HLabel 1000 3500 0 60 Input ~ 0\nREF_IN\nText HLabel 2300 3650 0 60 Input ~ 0\nCLK\nText HLabel 2300 3750 0 60 Input ~ 0\nDATA\nText HLabel 2300 3850 0 60 Input ~ 0\nCE\nText HLabel 2300 3950 0 60 Input ~ 0\nLE\nText HLabel 2400 4100 0 60 Input ~ 0\nRFOUT_EN\n$Comp\nL ADL5801 U7\nU 1 1 5632744B\nP 7300 3100\nF 0 \"U7\" H 8100 2900 60 0000 C CNN\nF 1 \"ADL5801\" H 8250 4100 60 0000 C CNN\nF 2 \"VNA:VFQFN-24\" H 7300 3150 60 0001 C CNN\nF 3 \"\" H 7300 3150 60 0000 C CNN\n\t1 7300 3100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR041\nU 1 1 56329BF6\nP 6850 2450\nF 0 \"#PWR041\" H 6850 2200 50 0001 C CNN\nF 1 \"GND\" H 6850 2300 50 0000 C CNN\nF 2 \"\" H 6850 2450 60 0000 C CNN\nF 3 \"\" H 6850 2450 60 0000 C CNN\n\t1 6850 2450\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR042\nU 1 1 56329D17\nP 6850 2550\nF 0 \"#PWR042\" H 6850 2300 50 0001 C CNN\nF 1 \"GND\" H 6850 2400 50 0000 C CNN\nF 2 \"\" H 6850 2550 60 0000 C CNN\nF 3 \"\" H 6850 2550 60 0000 C CNN\n\t1 6850 2550\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR043\nU 1 1 56329E65\nP 6850 2850\nF 0 \"#PWR043\" H 6850 2600 50 0001 C CNN\nF 1 \"GND\" H 6850 2700 50 0000 C CNN\nF 2 \"\" H 6850 2850 60 0000 C CNN\nF 3 \"\" H 6850 2850 60 0000 C CNN\n\t1 6850 2850\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR044\nU 1 1 56329F81\nP 6850 2950\nF 0 \"#PWR044\" H 6850 2700 50 0001 C CNN\nF 1 \"GND\" H 6850 2800 50 0000 C CNN\nF 2 \"\" H 6850 2950 60 0000 C CNN\nF 3 \"\" H 6850 2950 60 0000 C CNN\n\t1 6850 2950\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C37\nU 1 1 5632A6FA\nP 6250 2650\nF 0 \"C37\" H 6275 2750 50 0000 L CNN\nF 1 \"1n\" H 6275 2550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6288 2500 30 0001 C CNN\nF 3 \"\" H 6250 2650 60 0000 C CNN\n\t1 6250 2650\n\t0 -1 -1 0 \n$EndComp\nText Label 5550 2750 2 60 ~ 0\nLOP\n$Comp\nL GND #PWR045\nU 1 1 5632B667\nP 7950 3550\nF 0 \"#PWR045\" H 7950 3300 50 0001 C CNN\nF 1 \"GND\" H 7950 3400 50 0000 C CNN\nF 2 \"\" H 7950 3550 60 0000 C CNN\nF 3 \"\" H 7950 3550 60 0000 C CNN\n\t1 7950 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR046\nU 1 1 5632B79E\nP 7550 3550\nF 0 \"#PWR046\" H 7550 3300 50 0001 C CNN\nF 1 \"GND\" H 7550 3400 50 0000 C CNN\nF 2 \"\" H 7550 3550 60 0000 C CNN\nF 3 \"\" H 7550 3550 60 0000 C CNN\n\t1 7550 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR047\nU 1 1 5632BA4F\nP 7950 1850\nF 0 \"#PWR047\" H 7950 1600 50 0001 C CNN\nF 1 \"GND\" H 7950 1700 50 0000 C CNN\nF 2 \"\" H 7950 1850 60 0000 C CNN\nF 3 \"\" H 7950 1850 60 0000 C CNN\n\t1 7950 1850\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR048\nU 1 1 5632BD5A\nP 7550 1850\nF 0 \"#PWR048\" H 7550 1600 50 0001 C CNN\nF 1 \"GND\" H 7550 1700 50 0000 C CNN\nF 2 \"\" H 7550 1850 60 0000 C CNN\nF 3 \"\" H 7550 1850 60 0000 C CNN\n\t1 7550 1850\n\t-1 0 0 1 \n$EndComp\nText Label 2850 850 0 60 ~ 0\nRF_IN\n$Comp\nL GND #PWR049\nU 1 1 5632D904\nP 8500 2550\nF 0 \"#PWR049\" H 8500 2300 50 0001 C CNN\nF 1 \"GND\" H 8500 2400 50 0000 C CNN\nF 2 \"\" H 8500 2550 60 0000 C CNN\nF 3 \"\" H 8500 2550 60 0000 C CNN\n\t1 8500 2550\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR050\nU 1 1 5632DA35\nP 8500 2850\nF 0 \"#PWR050\" H 8500 2600 50 0001 C CNN\nF 1 \"GND\" H 8500 2700 50 0000 C CNN\nF 2 \"\" H 8500 2850 60 0000 C CNN\nF 3 \"\" H 8500 2850 60 0000 C CNN\n\t1 8500 2850\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL C C51\nU 1 1 5632DD14\nP 8800 2150\nF 0 \"C51\" H 8825 2250 50 0000 L CNN\nF 1 \"100n\" H 8825 2050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8838 2000 30 0001 C CNN\nF 3 \"\" H 8800 2150 60 0000 C CNN\n\t1 8800 2150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR051\nU 1 1 5632DD9F\nP 8800 2350\nF 0 \"#PWR051\" H 8800 2100 50 0001 C CNN\nF 1 \"GND\" H 8800 2200 50 0000 C CNN\nF 2 \"\" H 8800 2350 60 0000 C CNN\nF 3 \"\" H 8800 2350 60 0000 C CNN\n\t1 8800 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R26\nU 1 1 5632E388\nP 8100 1150\nF 0 \"R26\" V 8180 1150 50 0000 C CNN\nF 1 \"49.9\" V 8100 1150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8030 1150 30 0001 C CNN\nF 3 \"\" H 8100 1150 30 0000 C CNN\n\t1 8100 1150\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R25\nU 1 1 5632E427\nP 7450 1150\nF 0 \"R25\" V 7530 1150 50 0000 C CNN\nF 1 \"49.9\" V 7450 1150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7380 1150 30 0001 C CNN\nF 3 \"\" H 7450 1150 30 0000 C CNN\n\t1 7450 1150\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C44\nU 1 1 5632E626\nP 7650 900\nF 0 \"C44\" H 7675 1000 50 0000 L CNN\nF 1 \"100n\" H 7675 800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7688 750 30 0001 C CNN\nF 3 \"\" H 7650 900 60 0000 C CNN\n\t1 7650 900 \n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C46\nU 1 1 5632E6C3\nP 7900 900\nF 0 \"C46\" H 7925 1000 50 0000 L CNN\nF 1 \"100n\" H 7925 800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7938 750 30 0001 C CNN\nF 3 \"\" H 7900 900 60 0000 C CNN\n\t1 7900 900 \n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C48\nU 1 1 5632F330\nP 8300 1350\nF 0 \"C48\" H 8325 1450 50 0000 L CNN\nF 1 \"100n\" H 8325 1250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8338 1200 30 0001 C CNN\nF 3 \"\" H 8300 1350 60 0000 C CNN\n\t1 8300 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR052\nU 1 1 5632F3BB\nP 8300 1550\nF 0 \"#PWR052\" H 8300 1300 50 0001 C CNN\nF 1 \"GND\" H 8300 1400 50 0000 C CNN\nF 2 \"\" H 8300 1550 60 0000 C CNN\nF 3 \"\" H 8300 1550 60 0000 C CNN\n\t1 8300 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C42\nU 1 1 5632F516\nP 7200 1350\nF 0 \"C42\" H 7225 1450 50 0000 L CNN\nF 1 \"100n\" H 7225 1250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7238 1200 30 0001 C CNN\nF 3 \"\" H 7200 1350 60 0000 C CNN\n\t1 7200 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR053\nU 1 1 5632F691\nP 7200 1550\nF 0 \"#PWR053\" H 7200 1300 50 0001 C CNN\nF 1 \"GND\" H 7200 1400 50 0000 C CNN\nF 2 \"\" H 7200 1550 60 0000 C CNN\nF 3 \"\" H 7200 1550 60 0000 C CNN\n\t1 7200 1550\n\t1 0 0 -1 \n$EndComp\nText Label 7900 700 0 60 ~ 0\nIF+\nText Label 7650 700 0 60 ~ 0\nIF-\n$Comp\nL C C40\nU 1 1 563309B9\nP 6700 1850\nF 0 \"C40\" H 6725 1950 50 0000 L CNN\nF 1 \"100p\" H 6725 1750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6738 1700 30 0001 C CNN\nF 3 \"\" H 6700 1850 60 0000 C CNN\n\t1 6700 1850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C39\nU 1 1 56330A68\nP 6500 1850\nF 0 \"C39\" H 6525 1950 50 0000 L CNN\nF 1 \"100n\" H 6525 1750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6538 1700 30 0001 C CNN\nF 3 \"\" H 6500 1850 60 0000 C CNN\n\t1 6500 1850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR054\nU 1 1 56330CC5\nP 6700 2050\nF 0 \"#PWR054\" H 6700 1800 50 0001 C CNN\nF 1 \"GND\" H 6700 1900 50 0000 C CNN\nF 2 \"\" H 6700 2050 60 0000 C CNN\nF 3 \"\" H 6700 2050 60 0000 C CNN\n\t1 6700 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR055\nU 1 1 56330D6A\nP 6500 2050\nF 0 \"#PWR055\" H 6500 1800 50 0001 C CNN\nF 1 \"GND\" H 6500 1900 50 0000 C CNN\nF 2 \"\" H 6500 2050 60 0000 C CNN\nF 3 \"\" H 6500 2050 60 0000 C CNN\n\t1 6500 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C49\nU 1 1 5633221E\nP 8500 3300\nF 0 \"C49\" H 8525 3400 50 0000 L CNN\nF 1 \"100n\" H 8525 3200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8538 3150 30 0001 C CNN\nF 3 \"\" H 8500 3300 60 0000 C CNN\n\t1 8500 3300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR056\nU 1 1 56332386\nP 8500 3500\nF 0 \"#PWR056\" H 8500 3250 50 0001 C CNN\nF 1 \"GND\" H 8500 3350 50 0000 C CNN\nF 2 \"\" H 8500 3500 60 0000 C CNN\nF 3 \"\" H 8500 3500 60 0000 C CNN\n\t1 8500 3500\n\t1 0 0 -1 \n$EndComp\nText Label 8500 3050 0 60 ~ 0\n5VF\n$Comp\nL GND #PWR057\nU 1 1 563334E5\nP 7350 3550\nF 0 \"#PWR057\" H 7350 3300 50 0001 C CNN\nF 1 \"GND\" H 7350 3400 50 0000 C CNN\nF 2 \"\" H 7350 3550 60 0000 C CNN\nF 3 \"\" H 7350 3550 60 0000 C CNN\n\t1 7350 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C43\nU 1 1 563337FD\nP 7200 4050\nF 0 \"C43\" H 7225 4150 50 0000 L CNN\nF 1 \"100p\" H 7225 3950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7238 3900 30 0001 C CNN\nF 3 \"\" H 7200 4050 60 0000 C CNN\n\t1 7200 4050\n\t-1 0 0 1 \n$EndComp\n$Comp\nL C C41\nU 1 1 56333934\nP 6950 4050\nF 0 \"C41\" H 6975 4150 50 0000 L CNN\nF 1 \"100n\" H 6975 3950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6988 3900 30 0001 C CNN\nF 3 \"\" H 6950 4050 60 0000 C CNN\n\t1 6950 4050\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR058\nU 1 1 563339D2\nP 6950 4250\nF 0 \"#PWR058\" H 6950 4000 50 0001 C CNN\nF 1 \"GND\" H 6950 4100 50 0000 C CNN\nF 2 \"\" H 6950 4250 60 0000 C CNN\nF 3 \"\" H 6950 4250 60 0000 C CNN\n\t1 6950 4250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR059\nU 1 1 56333BDE\nP 7200 4250\nF 0 \"#PWR059\" H 7200 4000 50 0001 C CNN\nF 1 \"GND\" H 7200 4100 50 0000 C CNN\nF 2 \"\" H 7200 4250 60 0000 C CNN\nF 3 \"\" H 7200 4250 60 0000 C CNN\n\t1 7200 4250\n\t1 0 0 -1 \n$EndComp\nText HLabel 7600 4050 0 60 Input ~ 0\nENBL\n$Comp\nL C C45\nU 1 1 56334A99\nP 7750 4300\nF 0 \"C45\" H 7775 4400 50 0000 L CNN\nF 1 \"100n\" H 7775 4200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7788 4150 30 0001 C CNN\nF 3 \"\" H 7750 4300 60 0000 C CNN\n\t1 7750 4300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C47\nU 1 1 56334B55\nP 7950 4300\nF 0 \"C47\" H 7975 4400 50 0000 L CNN\nF 1 \"100p\" H 7975 4200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7988 4150 30 0001 C CNN\nF 3 \"\" H 7950 4300 60 0000 C CNN\n\t1 7950 4300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR060\nU 1 1 56334CF6\nP 7750 4500\nF 0 \"#PWR060\" H 7750 4250 50 0001 C CNN\nF 1 \"GND\" H 7750 4350 50 0000 C CNN\nF 2 \"\" H 7750 4500 60 0000 C CNN\nF 3 \"\" H 7750 4500 60 0000 C CNN\n\t1 7750 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR061\nU 1 1 56334DA9\nP 7950 4500\nF 0 \"#PWR061\" H 7950 4250 50 0001 C CNN\nF 1 \"GND\" H 7950 4350 50 0000 C CNN\nF 2 \"\" H 7950 4500 60 0000 C CNN\nF 3 \"\" H 7950 4500 60 0000 C CNN\n\t1 7950 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R27\nU 1 1 5633608D\nP 8200 4000\nF 0 \"R27\" V 8280 4000 50 0000 C CNN\nF 1 \"1k\" V 8200 4000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8130 4000 30 0001 C CNN\nF 3 \"\" H 8200 4000 30 0000 C CNN\n\t1 8200 4000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C50\nU 1 1 56336961\nP 8600 4150\nF 0 \"C50\" H 8625 4250 50 0000 L CNN\nF 1 \"1n\" H 8625 4050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8638 4000 30 0001 C CNN\nF 3 \"\" H 8600 4150 60 0000 C CNN\n\t1 8600 4150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR062\nU 1 1 56336A04\nP 8600 4300\nF 0 \"#PWR062\" H 8600 4050 50 0001 C CNN\nF 1 \"GND\" H 8600 4150 50 0000 C CNN\nF 2 \"\" H 8600 4300 60 0000 C CNN\nF 3 \"\" H 8600 4300 60 0000 C CNN\n\t1 8600 4300\n\t1 0 0 -1 \n$EndComp\nText Label 7850 3550 3 60 ~ 0\nDETO\nText Label 8600 3900 0 60 ~ 0\nDETO\nText HLabel 4700 1300 0 60 Input ~ 0\n5V\n$Comp\nL C C38\nU 1 1 56339596\nP 6400 2750\nF 0 \"C38\" H 6425 2850 50 0000 L CNN\nF 1 \"1n\" H 6425 2650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6438 2600 30 0001 C CNN\nF 3 \"\" H 6400 2750 60 0000 C CNN\n\t1 6400 2750\n\t0 1 1 0 \n$EndComp\nText Label 5550 2650 2 60 ~ 0\nLON\nText Label 4300 3500 0 60 ~ 0\nLON\n$Comp\nL CONN_01X01 P3\nU 1 1 5649122E\nP 9400 4000\nF 0 \"P3\" H 9400 4100 50 0000 C CNN\nF 1 \"CONN_01X01\" V 9500 4000 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 9400 4000 60 0001 C CNN\nF 3 \"\" H 9400 4000 60 0000 C CNN\n\t1 9400 4000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C70\nU 1 1 564E2DB1\nP 4950 1450\nF 0 \"C70\" H 4975 1550 50 0000 L CNN\nF 1 \"10u\" H 4975 1350 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4988 1300 30 0001 C CNN\nF 3 \"\" H 4950 1450 60 0000 C CNN\n\t1 4950 1450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR063\nU 1 1 564E300E\nP 4950 1600\nF 0 \"#PWR063\" H 4950 1350 50 0001 C CNN\nF 1 \"GND\" H 4950 1450 50 0000 C CNN\nF 2 \"\" H 4950 1600 60 0000 C CNN\nF 3 \"\" H 4950 1600 60 0000 C CNN\n\t1 4950 1600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C29\nU 1 1 564E3695\nP 4750 1450\nF 0 \"C29\" H 4775 1550 50 0000 L CNN\nF 1 \"DNP\" H 4775 1350 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 4788 1300 30 0001 C CNN\nF 3 \"\" H 4750 1450 60 0000 C CNN\n\t1 4750 1450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR064\nU 1 1 564E3759\nP 4750 1600\nF 0 \"#PWR064\" H 4750 1350 50 0001 C CNN\nF 1 \"GND\" H 4750 1450 50 0000 C CNN\nF 2 \"\" H 4750 1600 60 0000 C CNN\nF 3 \"\" H 4750 1600 60 0000 C CNN\n\t1 4750 1600\n\t1 0 0 -1 \n$EndComp\nText Notes 8750 1100 0 60 ~ 0\nVoltage conversion gain: 0 dB - 6 dB\\nP1dB: 15 dBm\\nNF: 15 dB\nNoConn ~ 7650 1950\nText Notes 4550 1150 0 60 ~ 0\n120 mA\nText Notes 1900 3100 0 60 ~ 0\n180 mA\nText HLabel 4950 5250 0 60 Input ~ 0\nDITHER_3V3\n$Comp\nL R R74\nU 1 1 5691CEE7\nP 5000 5450\nF 0 \"R74\" V 5080 5450 50 0000 C CNN\nF 1 \"220k\" V 5000 5450 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4930 5450 30 0001 C CNN\nF 3 \"\" H 5000 5450 30 0000 C CNN\n\t1 5000 5450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R75\nU 1 1 5691D4AF\nP 5000 5800\nF 0 \"R75\" V 5080 5800 50 0000 C CNN\nF 1 \"4.7k\" V 5000 5800 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4930 5800 30 0001 C CNN\nF 3 \"\" H 5000 5800 30 0000 C CNN\n\t1 5000 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR065\nU 1 1 5691D83F\nP 5000 5950\nF 0 \"#PWR065\" H 5000 5700 50 0001 C CNN\nF 1 \"GND\" H 5000 5800 50 0000 C CNN\nF 2 \"\" H 5000 5950 60 0000 C CNN\nF 3 \"\" H 5000 5950 60 0000 C CNN\n\t1 5000 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C129\nU 1 1 5691E3FC\nP 5800 5800\nF 0 \"C129\" H 5825 5900 50 0000 L CNN\nF 1 \"100p\" H 5825 5700 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5838 5650 30 0001 C CNN\nF 3 \"\" H 5800 5800 60 0000 C CNN\n\t1 5800 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR066\nU 1 1 5691E519\nP 5800 5950\nF 0 \"#PWR066\" H 5800 5700 50 0001 C CNN\nF 1 \"GND\" H 5800 5800 50 0000 C CNN\nF 2 \"\" H 5800 5950 60 0000 C CNN\nF 3 \"\" H 5800 5950 60 0000 C CNN\n\t1 5800 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C130\nU 1 1 5691ECEF\nP 6100 5600\nF 0 \"C130\" H 6125 5700 50 0000 L CNN\nF 1 \"100n\" H 6125 5500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6138 5450 30 0001 C CNN\nF 3 \"\" H 6100 5600 60 0000 C CNN\n\t1 6100 5600\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R76\nU 1 1 5691F35C\nP 6300 5400\nF 0 \"R76\" V 6380 5400 50 0000 C CNN\nF 1 \"10k\" V 6300 5400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6230 5400 30 0001 C CNN\nF 3 \"\" H 6300 5400 30 0000 C CNN\n\t1 6300 5400\n\t1 0 0 -1 \n$EndComp\nText Label 6300 5200 2 60 ~ 0\nVCOM\n$Comp\nL C C131\nU 1 1 56920011\nP 6450 5100\nF 0 \"C131\" H 6475 5200 50 0000 L CNN\nF 1 \"100n\" H 6475 5000 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6488 4950 30 0001 C CNN\nF 3 \"\" H 6450 5100 60 0000 C CNN\n\t1 6450 5100\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR067\nU 1 1 56920405\nP 6600 5100\nF 0 \"#PWR067\" H 6600 4850 50 0001 C CNN\nF 1 \"GND\" H 6600 4950 50 0000 C CNN\nF 2 \"\" H 6600 5100 60 0000 C CNN\nF 3 \"\" H 6600 5100 60 0000 C CNN\n\t1 6600 5100\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL R R77\nU 1 1 56920C0F\nP 6500 5600\nF 0 \"R77\" V 6580 5600 50 0000 C CNN\nF 1 \"16k\" V 6500 5600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6430 5600 30 0001 C CNN\nF 3 \"\" H 6500 5600 30 0000 C CNN\n\t1 6500 5600\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C133\nU 1 1 5692100F\nP 7250 5800\nF 0 \"C133\" H 7275 5900 50 0000 L CNN\nF 1 \"100p\" H 7275 5700 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7288 5650 30 0001 C CNN\nF 3 \"\" H 7250 5800 60 0000 C CNN\n\t1 7250 5800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR068\nU 1 1 56921279\nP 7250 5950\nF 0 \"#PWR068\" H 7250 5700 50 0001 C CNN\nF 1 \"GND\" H 7250 5800 50 0000 C CNN\nF 2 \"\" H 7250 5950 60 0000 C CNN\nF 3 \"\" H 7250 5950 60 0000 C CNN\n\t1 7250 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL TSV911 U22\nU 1 1 56921FAD\nP 8350 5700\nF 0 \"U22\" H 8500 5850 60 0000 C CNN\nF 1 \"TSV911\" H 8550 5500 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 8350 5700 60 0001 C CNN\nF 3 \"\" H 8350 5700 60 0000 C CNN\n\t1 8350 5700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR069\nU 1 1 5692237F\nP 8250 6100\nF 0 \"#PWR069\" H 8250 5850 50 0001 C CNN\nF 1 \"GND\" H 8250 5950 50 0000 C CNN\nF 2 \"\" H 8250 6100 60 0000 C CNN\nF 3 \"\" H 8250 6100 60 0000 C CNN\n\t1 8250 6100\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C134\nU 1 1 56922719\nP 8100 5050\nF 0 \"C134\" H 8125 5150 50 0000 L CNN\nF 1 \"100n\" H 8125 4950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8138 4900 30 0001 C CNN\nF 3 \"\" H 8100 5050 60 0000 C CNN\n\t1 8100 5050\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR070\nU 1 1 56922958\nP 8100 5200\nF 0 \"#PWR070\" H 8100 4950 50 0001 C CNN\nF 1 \"GND\" H 8100 5050 50 0000 C CNN\nF 2 \"\" H 8100 5200 60 0000 C CNN\nF 3 \"\" H 8100 5200 60 0000 C CNN\n\t1 8100 5200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R78\nU 1 1 5692435C\nP 6900 5600\nF 0 \"R78\" V 6980 5600 50 0000 C CNN\nF 1 \"16k\" V 6900 5600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6830 5600 30 0001 C CNN\nF 3 \"\" H 6900 5600 30 0000 C CNN\n\t1 6900 5600\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C132\nU 1 1 56924C33\nP 7000 6400\nF 0 \"C132\" H 7025 6500 50 0000 L CNN\nF 1 \"100p\" H 7025 6300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7038 6250 30 0001 C CNN\nF 3 \"\" H 7000 6400 60 0000 C CNN\n\t1 7000 6400\n\t0 1 1 0 \n$EndComp\nText Label 10100 5700 0 60 ~ 0\nDITHER\nText Label 6500 1300 0 60 ~ 0\n5VF\nText Label 7200 1150 2 60 ~ 0\n5VF\nText Label 8300 1150 0 60 ~ 0\n5VF\nText Label 8800 2000 0 60 ~ 0\n5VF\nText Label 8200 3850 0 60 ~ 0\n5VF\nText Label 6950 3900 2 60 ~ 0\n5VF\n$Comp\nL C C53\nU 1 1 56A07D69\nP 6200 1500\nF 0 \"C53\" H 6225 1600 50 0000 L CNN\nF 1 \"DNP\" H 6225 1400 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6238 1350 30 0001 C CNN\nF 3 \"\" H 6200 1500 60 0000 C CNN\n\t1 6200 1500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR071\nU 1 1 56A08175\nP 6200 1650\nF 0 \"#PWR071\" H 6200 1400 50 0001 C CNN\nF 1 \"GND\" H 6200 1500 50 0000 C CNN\nF 2 \"\" H 6200 1650 60 0000 C CNN\nF 3 \"\" H 6200 1650 60 0000 C CNN\n\t1 6200 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P5\nU 1 1 56A58165\nP 9400 4450\nF 0 \"P5\" H 9400 4550 50 0000 C CNN\nF 1 \"CONN_01X01\" V 9500 4450 50 0000 C CNN\nF 2 \"VNA:TP_1.00\" H 9400 4450 60 0001 C CNN\nF 3 \"\" H 9400 4450 60 0000 C CNN\n\t1 9400 4450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR072\nU 1 1 56A582A6\nP 9150 4500\nF 0 \"#PWR072\" H 9150 4250 50 0001 C CNN\nF 1 \"GND\" H 9150 4350 50 0000 C CNN\nF 2 \"\" H 9150 4500 60 0000 C CNN\nF 3 \"\" H 9150 4500 60 0000 C CNN\n\t1 9150 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C159\nU 1 1 56A807F4\nP 8500 5050\nF 0 \"C159\" H 8525 5150 50 0000 L CNN\nF 1 \"DNP\" H 8525 4950 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 8538 4900 30 0001 C CNN\nF 3 \"\" H 8500 5050 60 0000 C CNN\n\t1 8500 5050\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR073\nU 1 1 56A80968\nP 8500 5200\nF 0 \"#PWR073\" H 8500 4950 50 0001 C CNN\nF 1 \"GND\" H 8500 5050 50 0000 C CNN\nF 2 \"\" H 8500 5200 60 0000 C CNN\nF 3 \"\" H 8500 5200 60 0000 C CNN\n\t1 8500 5200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB7\nU 1 1 56AC87CD\nP 5500 1300\nF 0 \"FB7\" H 5500 1450 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 5500 1200 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 5500 1300 60 0001 C CNN\nF 3 \"\" H 5500 1300 60 0000 C CNN\n\t1 5500 1300\n\t1 0 0 -1 \n$EndComp\n$Sheet\nS 1500 750 1150 950 \nU 5837DA7A\nF0 \"RX switch\" 60\nF1 \"rx_switch.sch\" 60\nF2 \"RFC\" O R 2650 850 60 \nF3 \"RF1\" I L 1500 850 60 \nF4 \"RF2\" I L 1500 950 60 \nF5 \"SWC_CTRL2\" I R 2650 1550 60 \nF6 \"SWC_CTRL1\" I R 2650 1450 60 \nF7 \"RF3\" I L 1500 1050 60 \nF8 \"RF4\" I L 1500 1150 60 \nF9 \"SWA_CTRL2\" I R 2650 1150 60 \nF10 \"SWA_CTRL1\" I R 2650 1050 60 \nF11 \"SWB_CTRL2\" I R 2650 1350 60 \nF12 \"SWB_CTRL1\" I R 2650 1250 60 \nF13 \"3V3A\" I L 1500 1450 60 \n$EndSheet\nText HLabel 2850 1050 2 60 Input ~ 0\nSWA_CTRL1\nText HLabel 2850 1150 2 60 Input ~ 0\nSWA_CTRL2\nText HLabel 2850 1250 2 60 Input ~ 0\nSWB_CTRL1\nText HLabel 2850 1350 2 60 Input ~ 0\nSWB_CTRL2\nText HLabel 2850 1450 2 60 Input ~ 0\nSWC_CTRL1\nText HLabel 2850 1550 2 60 Input ~ 0\nSWC_CTRL2\n$Sheet\nS 1550 2000 900 650 \nU 583CF52C\nF0 \"RX LNA\" 60\nF1 \"rx_lna.sch\" 60\nF2 \"5V\" I L 1550 2100 60 \nF3 \"RF_OUT\" O R 2450 2300 60 \nF4 \"RF_IN\" I L 1550 2300 60 \n$EndSheet\n$Comp\nL TCM1-63AX+ T1\nU 1 1 583D46C8\nP 9850 3000\nF 0 \"T1\" H 9850 3250 60 0000 C CNN\nF 1 \"TCM1-63AX+\" H 9850 3550 60 0000 C CNN\nF 2 \"VNA:TCM1-63AX+\" H 9850 3000 60 0001 C CNN\nF 3 \"\" H 9850 3000 60 0001 C CNN\n\t1 9850 3000\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR074\nU 1 1 583D504E\nP 9800 3350\nF 0 \"#PWR074\" H 9800 3100 50 0001 C CNN\nF 1 \"GND\" H 9800 3200 50 0000 C CNN\nF 2 \"\" H 9800 3350 60 0000 C CNN\nF 3 \"\" H 9800 3350 60 0000 C CNN\n\t1 9800 3350\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR075\nU 1 1 583D656B\nP 10400 2950\nF 0 \"#PWR075\" H 10400 2700 50 0001 C CNN\nF 1 \"GND\" H 10400 2800 50 0000 C CNN\nF 2 \"\" H 10400 2950 60 0000 C CNN\nF 3 \"\" H 10400 2950 60 0000 C CNN\n\t1 10400 2950\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL C C7\nU 1 1 583D771B\nP 9100 2800\nF 0 \"C7\" H 9125 2900 50 0000 L CNN\nF 1 \"1n\" H 9125 2700 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9138 2650 30 0001 C CNN\nF 3 \"\" H 9100 2800 60 0000 C CNN\n\t1 9100 2800\n\t0 1 1 0 \n$EndComp\nText Label 1500 2100 2 60 ~ 0\n5V\nText Label 1500 2300 2 60 ~ 0\nRF_IN\nText Label 2500 2300 0 60 ~ 0\nRF_BALUN\nText Label 10550 2650 0 60 ~ 0\nRF_BALUN\n$Sheet\nS 2150 4800 1100 850 \nU 583E8E25\nF0 \"IF amp\" 60\nF1 \"if_amp.sch\" 60\nF2 \"ADC+\" O R 3250 5150 60 \nF3 \"ADC-\" O R 3250 5250 60 \nF4 \"3V3\" I L 2150 4900 60 \nF5 \"VOCM\" I L 2150 5000 60 \nF6 \"IF+\" I L 2150 5150 60 \nF7 \"IF-\" I L 2150 5250 60 \nF8 \"DITHER\" I L 2150 5450 60 \n$EndSheet\nText HLabel 1850 4900 0 60 Input ~ 0\n3V3A\nText HLabel 1850 5000 0 60 Input ~ 0\nVCOM\nText Label 1950 5150 2 60 ~ 0\nIF+\nText Label 1950 5250 2 60 ~ 0\nIF-\nText Label 1950 5450 2 60 ~ 0\nDITHER\nText HLabel 3400 5150 2 60 Output ~ 0\nADC+\nText HLabel 3400 5250 2 60 Output ~ 0\nADC-\nText HLabel 7600 4900 0 60 Input ~ 0\n3V3A\nText Notes 1600 4800 0 60 ~ 0\n2 mA\n$Comp\nL R R59\nU 1 1 5852F8A2\nP 9400 5700\nF 0 \"R59\" V 9480 5700 50 0000 C CNN\nF 1 \"100\" V 9400 5700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9330 5700 30 0001 C CNN\nF 3 \"\" H 9400 5700 30 0000 C CNN\n\t1 9400 5700\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C150\nU 1 1 5852FADF\nP 9600 5950\nF 0 \"C150\" H 9625 6050 50 0000 L CNN\nF 1 \"10n\" H 9625 5850 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9638 5800 30 0001 C CNN\nF 3 \"\" H 9600 5950 60 0000 C CNN\n\t1 9600 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR076\nU 1 1 5852FD41\nP 9600 6200\nF 0 \"#PWR076\" H 9600 5950 50 0001 C CNN\nF 1 \"GND\" H 9600 6050 50 0000 C CNN\nF 2 \"\" H 9600 6200 60 0000 C CNN\nF 3 \"\" H 9600 6200 60 0000 C CNN\n\t1 9600 6200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R107\nU 1 1 585300BC\nP 9850 5700\nF 0 \"R107\" V 9930 5700 50 0000 C CNN\nF 1 \"100\" V 9850 5700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9780 5700 30 0001 C CNN\nF 3 \"\" H 9850 5700 30 0000 C CNN\n\t1 9850 5700\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C153\nU 1 1 585304B6\nP 10050 5950\nF 0 \"C153\" H 10075 6050 50 0000 L CNN\nF 1 \"10n\" H 10075 5850 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 10088 5800 30 0001 C CNN\nF 3 \"\" H 10050 5950 60 0000 C CNN\n\t1 10050 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR077\nU 1 1 58530856\nP 10050 6200\nF 0 \"#PWR077\" H 10050 5950 50 0001 C CNN\nF 1 \"GND\" H 10050 6050 50 0000 C CNN\nF 2 \"\" H 10050 6200 60 0000 C CNN\nF 3 \"\" H 10050 6200 60 0000 C CNN\n\t1 10050 6200\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t1300 850 1500 850 \nWire Wire Line\n\t2650 850 2850 850 \nWire Wire Line\n\t4200 3400 4300 3400\nWire Wire Line\n\t4200 3800 4300 3800\nWire Wire Line\n\t4200 3900 4300 3900\nWire Wire Line\n\t2300 3250 2400 3250\nWire Wire Line\n\t2400 3350 2300 3350\nWire Wire Line\n\t1000 3500 2400 3500\nWire Wire Line\n\t2300 3650 2400 3650\nWire Wire Line\n\t2300 3750 2400 3750\nWire Wire Line\n\t2300 3850 2400 3850\nWire Wire Line\n\t2300 3950 2400 3950\nWire Wire Line\n\t2400 4100 2400 4100\nWire Wire Line\n\t6850 2450 6950 2450\nWire Wire Line\n\t6950 2550 6850 2550\nWire Wire Line\n\t6850 2850 6950 2850\nWire Wire Line\n\t6850 2950 6950 2950\nWire Wire Line\n\t6400 2650 6950 2650\nWire Wire Line\n\t6950 2750 6550 2750\nWire Wire Line\n\t5550 2650 6100 2650\nWire Wire Line\n\t7950 3450 7950 3550\nWire Wire Line\n\t7550 3450 7550 3550\nWire Wire Line\n\t7950 1850 7950 1950\nWire Wire Line\n\t7550 1850 7550 1950\nWire Wire Line\n\t8500 2550 8400 2550\nWire Wire Line\n\t8500 2850 8400 2850\nWire Wire Line\n\t8800 2300 8800 2350\nWire Wire Line\n\t8800 2000 8550 2000\nWire Wire Line\n\t8550 2000 8550 2450\nWire Wire Line\n\t8550 2450 8400 2450\nWire Wire Line\n\t7850 1950 7850 1150\nWire Wire Line\n\t7850 1150 7950 1150\nWire Wire Line\n\t7600 1150 7750 1150\nWire Wire Line\n\t7750 1150 7750 1950\nWire Wire Line\n\t7900 1050 7900 1150\nConnection ~ 7900 1150\nWire Wire Line\n\t7650 1050 7650 1150\nConnection ~ 7650 1150\nWire Wire Line\n\t7650 750 7650 700 \nWire Wire Line\n\t7900 750 7900 700 \nWire Wire Line\n\t7200 1150 7300 1150\nWire Wire Line\n\t8300 1150 8250 1150\nWire Wire Line\n\t8300 1500 8300 1550\nWire Wire Line\n\t7200 1150 7200 1200\nWire Wire Line\n\t7200 1500 7200 1550\nWire Wire Line\n\t8300 1150 8300 1200\nWire Wire Line\n\t7450 1950 7050 1950\nWire Wire Line\n\t7050 1950 7050 1700\nWire Wire Line\n\t7050 1700 6500 1700\nConnection ~ 6700 1700\nWire Wire Line\n\t6500 2000 6500 2050\nWire Wire Line\n\t6700 2050 6700 2000\nWire Wire Line\n\t8400 2950 8500 2950\nWire Wire Line\n\t8500 2950 8500 3150\nWire Wire Line\n\t8500 3450 8500 3500\nWire Wire Line\n\t7350 3450 7350 3550\nWire Wire Line\n\t7450 3900 7450 3450\nWire Wire Line\n\t6950 3900 7450 3900\nWire Wire Line\n\t7200 4200 7200 4250\nWire Wire Line\n\t6950 4200 6950 4250\nWire Wire Line\n\t7650 3450 7650 4050\nConnection ~ 7200 3900\nWire Wire Line\n\t7650 4050 7600 4050\nWire Wire Line\n\t7750 3450 7750 4150\nWire Wire Line\n\t7750 4150 8200 4150\nWire Wire Line\n\t7950 4500 7950 4450\nWire Wire Line\n\t7750 4450 7750 4500\nConnection ~ 7950 4150\nWire Wire Line\n\t7850 3450 7850 3550\nWire Wire Line\n\t8600 3900 8600 4000\nWire Wire Line\n\t8600 4000 9200 4000\nWire Wire Line\n\t6500 1700 6500 1300\nWire Wire Line\n\t5550 2750 6250 2750\nWire Wire Line\n\t4200 3500 4300 3500\nWire Wire Line\n\t4700 1300 5150 1300\nConnection ~ 4950 1300\nConnection ~ 4750 1300\nWire Wire Line\n\t4950 5250 5000 5250\nWire Wire Line\n\t5000 5250 5000 5300\nWire Wire Line\n\t5000 5600 5000 5650\nWire Wire Line\n\t5000 5600 5950 5600\nWire Wire Line\n\t5800 5600 5800 5650\nConnection ~ 5800 5600\nWire Wire Line\n\t6300 5550 6300 5600\nWire Wire Line\n\t6250 5600 6350 5600\nWire Wire Line\n\t6300 5100 6300 5250\nConnection ~ 6300 5600\nWire Wire Line\n\t7250 5650 7250 5600\nWire Wire Line\n\t7050 5600 7850 5600\nConnection ~ 7250 5600\nWire Wire Line\n\t7850 6300 8850 6300\nWire Wire Line\n\t8850 5700 8850 6400\nWire Wire Line\n\t7600 4900 8500 4900\nWire Wire Line\n\t8250 4900 8250 5300\nWire Wire Line\n\t6650 5600 6750 5600\nWire Wire Line\n\t6700 6400 6850 6400\nWire Wire Line\n\t8850 6400 7150 6400\nWire Wire Line\n\t7850 5800 7850 6300\nConnection ~ 8850 6300\nWire Wire Line\n\t6700 5600 6700 6400\nConnection ~ 6700 5600\nWire Wire Line\n\t8850 5700 9250 5700\nWire Wire Line\n\t6500 1300 5850 1300\nWire Wire Line\n\t6200 1350 6200 1300\nConnection ~ 6200 1300\nWire Wire Line\n\t9200 4450 9150 4450\nWire Wire Line\n\t9150 4450 9150 4500\nConnection ~ 8250 4900\nWire Wire Line\n\t1300 1450 1500 1450\nWire Wire Line\n\t1500 950 1300 950 \nWire Wire Line\n\t1300 1050 1500 1050\nWire Wire Line\n\t1500 1150 1300 1150\nWire Wire Line\n\t2850 1050 2650 1050\nWire Wire Line\n\t2650 1150 2850 1150\nWire Wire Line\n\t2850 1250 2650 1250\nWire Wire Line\n\t2650 1350 2850 1350\nWire Wire Line\n\t2850 1450 2650 1450\nWire Wire Line\n\t2650 1550 2850 1550\nWire Wire Line\n\t9800 3200 9800 3350\nConnection ~ 9800 3300\nWire Wire Line\n\t9950 3300 9950 3200\nWire Wire Line\n\t10550 2650 10400 2650\nWire Wire Line\n\t10400 2800 10400 2950\nWire Wire Line\n\t8400 2650 8950 2650\nWire Wire Line\n\t8400 2750 8850 2750\nWire Wire Line\n\t9250 2650 9350 2650\nWire Wire Line\n\t9350 2800 9250 2800\nWire Wire Line\n\t8850 2750 8850 2800\nWire Wire Line\n\t8850 2800 8950 2800\nWire Wire Line\n\t1550 2100 1500 2100\nWire Wire Line\n\t1550 2300 1500 2300\nWire Wire Line\n\t2450 2300 2500 2300\nWire Wire Line\n\t1850 4900 2150 4900\nWire Wire Line\n\t1850 5000 2150 5000\nWire Wire Line\n\t1950 5150 2150 5150\nWire Wire Line\n\t1950 5250 2150 5250\nWire Wire Line\n\t1950 5450 2150 5450\nWire Wire Line\n\t3400 5150 3250 5150\nWire Wire Line\n\t3400 5250 3250 5250\nConnection ~ 8100 4900\nWire Wire Line\n\t9550 5700 9700 5700\nWire Wire Line\n\t9600 5700 9600 5800\nWire Wire Line\n\t9600 6100 9600 6200\nWire Wire Line\n\t10000 5700 10100 5700\nWire Wire Line\n\t10050 5700 10050 5800\nConnection ~ 10050 5700\nWire Wire Line\n\t10050 6100 10050 6200\nConnection ~ 9600 5700\n$Comp\nL Via F19\nU 1 1 58681CEC\nP 1300 3500\nF 0 \"F19\" H 1300 3700 60 0000 C CNN\nF 1 \"Via\" H 1250 3050 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1300 3500 60 0001 C CNN\nF 3 \"\" H 1300 3500 60 0001 C CNN\n\t1 1300 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F20\nU 1 1 58681CF3\nP 1550 3500\nF 0 \"F20\" H 1550 3700 60 0000 C CNN\nF 1 \"Via\" H 1550 3050 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1550 3500 60 0001 C CNN\nF 3 \"\" H 1550 3500 60 0001 C CNN\n\t1 1550 3500\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR078\nU 1 1 58681CFA\nP 1100 3700\nF 0 \"#PWR078\" H 1100 3450 50 0001 C CNN\nF 1 \"GND\" H 1100 3550 50 0000 C CNN\nF 2 \"\" H 1100 3700 60 0000 C CNN\nF 3 \"\" H 1100 3700 60 0000 C CNN\n\t1 1100 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR079\nU 1 1 58681D00\nP 1750 3700\nF 0 \"#PWR079\" H 1750 3450 50 0001 C CNN\nF 1 \"GND\" H 1750 3550 50 0000 C CNN\nF 2 \"\" H 1750 3700 60 0000 C CNN\nF 3 \"\" H 1750 3700 60 0000 C CNN\n\t1 1750 3700\n\t1 0 0 -1 \n$EndComp\nConnection ~ 1750 3500\nConnection ~ 1100 3500\n$Comp\nL CONN_01X01 P20\nU 1 1 58724925\nP 1150 6000\nF 0 \"P20\" H 1150 6100 50 0000 C CNN\nF 1 \"CLIP\" V 1250 6000 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 6000 60 0001 C CNN\nF 3 \"\" H 1150 6000 60 0000 C CNN\n\t1 1150 6000\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR080\nU 1 1 58724ED3\nP 1350 6000\nF 0 \"#PWR080\" H 1350 5750 50 0001 C CNN\nF 1 \"GND\" H 1350 5850 50 0000 C CNN\nF 2 \"\" H 1350 6000 60 0000 C CNN\nF 3 \"\" H 1350 6000 60 0000 C CNN\n\t1 1350 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P21\nU 1 1 587251EF\nP 1150 6300\nF 0 \"P21\" H 1150 6400 50 0000 C CNN\nF 1 \"CLIP\" V 1250 6300 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 6300 60 0001 C CNN\nF 3 \"\" H 1150 6300 60 0000 C CNN\n\t1 1150 6300\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR081\nU 1 1 587251F6\nP 1350 6300\nF 0 \"#PWR081\" H 1350 6050 50 0001 C CNN\nF 1 \"GND\" H 1350 6150 50 0000 C CNN\nF 2 \"\" H 1350 6300 60 0000 C CNN\nF 3 \"\" H 1350 6300 60 0000 C CNN\n\t1 1350 6300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P22\nU 1 1 58725301\nP 1150 6600\nF 0 \"P22\" H 1150 6700 50 0000 C CNN\nF 1 \"CLIP\" V 1250 6600 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 6600 60 0001 C CNN\nF 3 \"\" H 1150 6600 60 0000 C CNN\n\t1 1150 6600\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR082\nU 1 1 58725308\nP 1350 6600\nF 0 \"#PWR082\" H 1350 6350 50 0001 C CNN\nF 1 \"GND\" H 1350 6450 50 0000 C CNN\nF 2 \"\" H 1350 6600 60 0000 C CNN\nF 3 \"\" H 1350 6600 60 0000 C CNN\n\t1 1350 6600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P23\nU 1 1 58725420\nP 1150 6900\nF 0 \"P23\" H 1150 7000 50 0000 C CNN\nF 1 \"CLIP\" V 1250 6900 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 6900 60 0001 C CNN\nF 3 \"\" H 1150 6900 60 0000 C CNN\n\t1 1150 6900\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR083\nU 1 1 58725427\nP 1350 6900\nF 0 \"#PWR083\" H 1350 6650 50 0001 C CNN\nF 1 \"GND\" H 1350 6750 50 0000 C CNN\nF 2 \"\" H 1350 6900 60 0000 C CNN\nF 3 \"\" H 1350 6900 60 0000 C CNN\n\t1 1350 6900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P24\nU 1 1 587277CC\nP 1150 7200\nF 0 \"P24\" H 1150 7300 50 0000 C CNN\nF 1 \"CLIP\" V 1250 7200 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 7200 60 0001 C CNN\nF 3 \"\" H 1150 7200 60 0000 C CNN\n\t1 1150 7200\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR084\nU 1 1 587277D2\nP 1350 7200\nF 0 \"#PWR084\" H 1350 6950 50 0001 C CNN\nF 1 \"GND\" H 1350 7050 50 0000 C CNN\nF 2 \"\" H 1350 7200 60 0000 C CNN\nF 3 \"\" H 1350 7200 60 0000 C CNN\n\t1 1350 7200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL CONN_01X01 P25\nU 1 1 587277D8\nP 1150 7500\nF 0 \"P25\" H 1150 7600 50 0000 C CNN\nF 1 \"CLIP\" V 1250 7500 50 0000 C CNN\nF 2 \"VNA:S2711-46R\" H 1150 7500 60 0001 C CNN\nF 3 \"\" H 1150 7500 60 0000 C CNN\n\t1 1150 7500\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR085\nU 1 1 587277DE\nP 1350 7500\nF 0 \"#PWR085\" H 1350 7250 50 0001 C CNN\nF 1 \"GND\" H 1350 7350 50 0000 C CNN\nF 2 \"\" H 1350 7500 60 0000 C CNN\nF 3 \"\" H 1350 7500 60 0000 C CNN\n\t1 1350 7500\n\t1 0 0 -1 \n$EndComp\nText Notes 950 5850 0 60 ~ 0\nShield clips\nText Notes 1550 1600 0 60 ~ 0\n1 mA\nText Notes 1800 2150 0 60 ~ 0\n95 mA\n$Comp\nL C C265\nU 1 1 5876CF15\nP 5950 1500\nF 0 \"C265\" H 5975 1600 50 0000 L CNN\nF 1 \"DNP\" H 5975 1400 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 5988 1350 30 0001 C CNN\nF 3 \"\" H 5950 1500 60 0000 C CNN\n\t1 5950 1500\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t5950 1350 5950 1300\nConnection ~ 5950 1300\n$Comp\nL GND #PWR086\nU 1 1 5876D1E9\nP 5950 1650\nF 0 \"#PWR086\" H 5950 1400 50 0001 C CNN\nF 1 \"GND\" H 5950 1500 50 0000 C CNN\nF 2 \"\" H 5950 1650 60 0000 C CNN\nF 3 \"\" H 5950 1650 60 0000 C CNN\n\t1 5950 1650\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t9950 3300 9800 3300\n$EndSCHEMATC\n" }, { "path": "hw/rx_lna.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 6 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL TRF37A75 U12\nU 1 1 583D1AAB\nP 5550 4200\nF 0 \"U12\" H 5850 3950 60 0000 C CNN\nF 1 \"TRF37A75\" H 5800 4500 60 0000 C CNN\nF 2 \"VNA:DFN-8-1EP_2x2mm_Pitch0.5mm\" H 5350 4150 60 0001 C CNN\nF 3 \"\" H 5350 4150 60 0000 C CNN\n\t1 5550 4200\n\t1 0 0 -1 \n$EndComp\nText Notes 6950 3700 0 60 ~ 0\nGain: 11 - 13 dB\n$Comp\nL C C91\nU 1 1 583D1AB3\nP 5650 3200\nF 0 \"C91\" H 5675 3300 50 0000 L CNN\nF 1 \"100n\" H 5675 3100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5688 3050 30 0001 C CNN\nF 3 \"\" H 5650 3200 60 0000 C CNN\n\t1 5650 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0140\nU 1 1 583D1ABA\nP 5650 3400\nF 0 \"#PWR0140\" H 5650 3150 50 0001 C CNN\nF 1 \"GND\" H 5650 3250 50 0000 C CNN\nF 2 \"\" H 5650 3400 60 0000 C CNN\nF 3 \"\" H 5650 3400 60 0000 C CNN\n\t1 5650 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C113\nU 1 1 583D1AC0\nP 5750 2700\nF 0 \"C113\" H 5775 2800 50 0000 L CNN\nF 1 \"10u\" H 5775 2600 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 5788 2550 30 0001 C CNN\nF 3 \"\" H 5750 2700 60 0000 C CNN\n\t1 5750 2700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0141\nU 1 1 583D1AC7\nP 5750 2850\nF 0 \"#PWR0141\" H 5750 2600 50 0001 C CNN\nF 1 \"GND\" H 5750 2700 50 0000 C CNN\nF 2 \"\" H 5750 2850 60 0000 C CNN\nF 3 \"\" H 5750 2850 60 0000 C CNN\n\t1 5750 2850\n\t1 0 0 -1 \n$EndComp\nText HLabel 3400 2500 0 60 Input ~ 0\n5V\n$Comp\nL C C89\nU 1 1 583D1ACE\nP 4450 2700\nF 0 \"C89\" H 4475 2800 50 0000 L CNN\nF 1 \"100n\" H 4475 2600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4488 2550 30 0001 C CNN\nF 3 \"\" H 4450 2700 60 0000 C CNN\n\t1 4450 2700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0142\nU 1 1 583D1AD5\nP 4450 2850\nF 0 \"#PWR0142\" H 4450 2600 50 0001 C CNN\nF 1 \"GND\" H 4450 2700 50 0000 C CNN\nF 2 \"\" H 4450 2850 60 0000 C CNN\nF 3 \"\" H 4450 2850 60 0000 C CNN\n\t1 4450 2850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C120\nU 1 1 583D1ADB\nP 6750 3450\nF 0 \"C120\" H 6775 3550 50 0000 L CNN\nF 1 \"10n\" H 6775 3350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6788 3300 30 0001 C CNN\nF 3 \"\" H 6750 3450 60 0000 C CNN\n\t1 6750 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0143\nU 1 1 583D1AE2\nP 6750 3650\nF 0 \"#PWR0143\" H 6750 3400 50 0001 C CNN\nF 1 \"GND\" H 6750 3500 50 0000 C CNN\nF 2 \"\" H 6750 3650 60 0000 C CNN\nF 3 \"\" H 6750 3650 60 0000 C CNN\n\t1 6750 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0144\nU 1 1 583D1AE8\nP 5550 4800\nF 0 \"#PWR0144\" H 5550 4550 50 0001 C CNN\nF 1 \"GND\" H 5550 4650 50 0000 C CNN\nF 2 \"\" H 5550 4800 60 0000 C CNN\nF 3 \"\" H 5550 4800 60 0000 C CNN\n\t1 5550 4800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL INDUCTOR_SMALL L1\nU 1 1 583D1AF4\nP 6300 3850\nF 0 \"L1\" H 6300 3950 50 0000 C CNN\nF 1 \"AISC-0603HP-R10J\" H 6250 3750 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 6300 3850 60 0001 C CNN\nF 3 \"\" H 6300 3850 60 0000 C CNN\n\t1 6300 3850\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C115\nU 1 1 583D1AFB\nP 6550 3450\nF 0 \"C115\" H 6575 3550 50 0000 L CNN\nF 1 \"10p\" H 6575 3350 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6588 3300 30 0001 C CNN\nF 3 \"\" H 6550 3450 60 0000 C CNN\n\t1 6550 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0145\nU 1 1 583D1B02\nP 6550 3650\nF 0 \"#PWR0145\" H 6550 3400 50 0001 C CNN\nF 1 \"GND\" H 6550 3500 50 0000 C CNN\nF 2 \"\" H 6550 3650 60 0000 C CNN\nF 3 \"\" H 6550 3650 60 0000 C CNN\n\t1 6550 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R21\nU 1 1 583D1B08\nP 6300 3100\nF 0 \"R21\" V 6380 3100 50 0000 C CNN\nF 1 \"1.8\" V 6300 3100 50 0000 C CNN\nF 2 \"VNA:R_0603b\" V 6230 3100 30 0001 C CNN\nF 3 \"\" H 6300 3100 30 0000 C CNN\n\t1 6300 3100\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t5650 3350 5650 3400\nWire Wire Line\n\t6300 3300 6750 3300\nWire Wire Line\n\t5550 2500 5550 3650\nConnection ~ 5550 3050\nWire Wire Line\n\t5400 2500 6300 2500\nConnection ~ 5550 2550\nWire Wire Line\n\t3400 2500 4700 2500\nWire Wire Line\n\t4450 2550 4450 2500\nConnection ~ 4450 2500\nConnection ~ 5650 3050\nWire Wire Line\n\t6750 3600 6750 3650\nWire Wire Line\n\t5000 4200 4950 4200\nWire Wire Line\n\t5550 3050 5650 3050\nWire Wire Line\n\t6100 4150 6850 4150\nConnection ~ 6300 4150\nWire Wire Line\n\t6300 3250 6300 3600\nConnection ~ 6550 3300\nWire Wire Line\n\t6550 3600 6550 3650\nConnection ~ 6300 3300\nWire Wire Line\n\t6300 2500 6300 2950\nConnection ~ 5550 2500\nText HLabel 7350 4150 2 60 Output ~ 0\nRF_OUT\nText Notes 4250 2400 0 60 ~ 0\n95 mA\nWire Wire Line\n\t4950 4200 4950 4300\n$Comp\nL C C121\nU 1 1 583D1BCF\nP 7000 4150\nF 0 \"C121\" H 7025 4250 50 0000 L CNN\nF 1 \"1n\" H 7025 4050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7038 4000 30 0001 C CNN\nF 3 \"\" H 7000 4150 60 0000 C CNN\n\t1 7000 4150\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t7350 4150 7150 4150\n$Comp\nL C C90\nU 1 1 583D1BD7\nP 4550 4050\nF 0 \"C90\" H 4575 4150 50 0000 L CNN\nF 1 \"1n\" H 4575 3950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4588 3900 30 0001 C CNN\nF 3 \"\" H 4550 4050 60 0000 C CNN\n\t1 4550 4050\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t4700 4050 5000 4050\nWire Wire Line\n\t2700 4050 4400 4050\nWire Wire Line\n\t6300 4100 6300 4250\n$Comp\nL R R14\nU 1 1 583D1BE1\nP 4950 4450\nF 0 \"R14\" V 5030 4450 50 0000 C CNN\nF 1 \"0\" V 4950 4450 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4880 4450 30 0001 C CNN\nF 3 \"\" H 4950 4450 30 0000 C CNN\n\t1 4950 4450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t4950 4600 4950 4700\nConnection ~ 5750 2550\n$Comp\nL GND #PWR0146\nU 1 1 583D1BF1\nP 4100 2850\nF 0 \"#PWR0146\" H 4100 2600 50 0001 C CNN\nF 1 \"GND\" H 4100 2700 50 0000 C CNN\nF 2 \"\" H 4100 2850 60 0000 C CNN\nF 3 \"\" H 4100 2850 60 0000 C CNN\n\t1 4100 2850\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t5750 2550 5550 2550\nWire Wire Line\n\t4100 2500 4100 2550\nConnection ~ 4100 2500\n$Comp\nL FILTER FB8\nU 1 1 583D1C18\nP 5050 2500\nF 0 \"FB8\" H 5050 2650 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 5050 2400 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 5050 2500 60 0001 C CNN\nF 3 \"\" H 5050 2500 60 0000 C CNN\n\t1 5050 2500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0147\nU 1 1 583D2259\nP 4950 4700\nF 0 \"#PWR0147\" H 4950 4450 50 0001 C CNN\nF 1 \"GND\" H 4950 4550 50 0000 C CNN\nF 2 \"\" H 4950 4700 60 0000 C CNN\nF 3 \"\" H 4950 4700 60 0000 C CNN\n\t1 4950 4700\n\t1 0 0 -1 \n$EndComp\nText HLabel 2700 4050 0 60 Input ~ 0\nRF_IN\n$Comp\nL C C88\nU 1 1 583D1BE9\nP 4100 2700\nF 0 \"C88\" H 4125 2800 50 0000 L CNN\nF 1 \"DNP\" H 4125 2600 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4138 2550 30 0001 C CNN\nF 3 \"\" H 4100 2700 60 0000 C CNN\n\t1 4100 2700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F5\nU 1 1 585B0CEE\nP 3000 4050\nF 0 \"F5\" H 3000 4250 60 0000 C CNN\nF 1 \"Via\" H 3250 4050 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 3000 4050 60 0001 C CNN\nF 3 \"\" H 3000 4050 60 0001 C CNN\n\t1 3000 4050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F6\nU 1 1 585B0D7F\nP 3750 4050\nF 0 \"F6\" H 3750 4250 60 0000 C CNN\nF 1 \"Via\" H 4000 4050 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 3750 4050 60 0001 C CNN\nF 3 \"\" H 3750 4050 60 0001 C CNN\n\t1 3750 4050\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0148\nU 1 1 585B0E7D\nP 4050 4300\nF 0 \"#PWR0148\" H 4050 4050 50 0001 C CNN\nF 1 \"GND\" H 4050 4150 50 0000 C CNN\nF 2 \"\" H 4050 4300 60 0000 C CNN\nF 3 \"\" H 4050 4300 60 0000 C CNN\n\t1 4050 4300\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t4050 4300 4050 4250\nWire Wire Line\n\t4050 4250 3950 4250\n$Comp\nL GND #PWR0149\nU 1 1 585B0EEC\nP 2700 4300\nF 0 \"#PWR0149\" H 2700 4050 50 0001 C CNN\nF 1 \"GND\" H 2700 4150 50 0000 C CNN\nF 2 \"\" H 2700 4300 60 0000 C CNN\nF 3 \"\" H 2700 4300 60 0000 C CNN\n\t1 2700 4300\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2800 4250 2700 4250\nWire Wire Line\n\t2700 4250 2700 4300\nConnection ~ 3950 4050\nConnection ~ 2800 4050\nWire Wire Line\n\t5350 4700 5350 4800\nWire Wire Line\n\t5350 4800 5750 4800\nWire Wire Line\n\t5450 4700 5450 4800\nConnection ~ 5450 4800\nWire Wire Line\n\t5550 4800 5550 4700\nWire Wire Line\n\t5650 4800 5650 4700\nConnection ~ 5550 4800\nWire Wire Line\n\t5750 4800 5750 4700\nConnection ~ 5650 4800\n$Comp\nL C C259\nU 1 1 586D767B\nP 6300 4400\nF 0 \"C259\" H 6325 4500 50 0000 L CNN\nF 1 \"DNP\" H 6325 4300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6338 4250 30 0001 C CNN\nF 3 \"\" H 6300 4400 60 0000 C CNN\n\t1 6300 4400\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR0150\nU 1 1 586D770F\nP 6300 4550\nF 0 \"#PWR0150\" H 6300 4300 50 0001 C CNN\nF 1 \"GND\" H 6300 4400 50 0000 C CNN\nF 2 \"\" H 6300 4550 60 0000 C CNN\nF 3 \"\" H 6300 4550 60 0000 C CNN\n\t1 6300 4550\n\t1 0 0 -1 \n$EndComp\n$EndSCHEMATC\n" }, { "path": "hw/rx_switch.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 5 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL PE42420 U11\nU 1 1 5837FA9D\nP 8900 4250\nF 0 \"U11\" H 8900 4200 60 0000 C CNN\nF 1 \"PE42420\" H 9450 4650 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 8400 4800 60 0001 C CNN\nF 3 \"\" H 8400 4800 60 0001 C CNN\n\t1 8900 4250\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL PE42420 U6\nU 1 1 5837FAA4\nP 4800 2900\nF 0 \"U6\" H 4800 2850 60 0000 C CNN\nF 1 \"PE42420\" H 5350 3300 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 4300 3450 60 0001 C CNN\nF 3 \"\" H 4300 3450 60 0001 C CNN\n\t1 4800 2900\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL PE42420 U10\nU 1 1 5837FAAB\nP 4800 5900\nF 0 \"U10\" H 4800 5850 60 0000 C CNN\nF 1 \"PE42420\" H 5350 6300 60 0000 C CNN\nF 2 \"VNA:TFLGA-20\" H 4300 6450 60 0001 C CNN\nF 3 \"\" H 4300 6450 60 0001 C CNN\n\t1 4800 5900\n\t-1 0 0 -1 \n$EndComp\nText HLabel 10050 4250 2 60 Output ~ 0\nRFC\nText HLabel 1450 2750 0 60 Input ~ 0\nRF1\n$Comp\nL GND #PWR0109\nU 1 1 5837FACF\nP 5450 3650\nF 0 \"#PWR0109\" H 5450 3400 50 0001 C CNN\nF 1 \"GND\" H 5450 3500 50 0000 C CNN\nF 2 \"\" H 5450 3650 60 0000 C CNN\nF 3 \"\" H 5450 3650 60 0000 C CNN\n\t1 5450 3650\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0110\nU 1 1 5837FAD5\nP 5450 6650\nF 0 \"#PWR0110\" H 5450 6400 50 0001 C CNN\nF 1 \"GND\" H 5450 6500 50 0000 C CNN\nF 2 \"\" H 5450 6650 60 0000 C CNN\nF 3 \"\" H 5450 6650 60 0000 C CNN\n\t1 5450 6650\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0111\nU 1 1 5837FADB\nP 9450 5000\nF 0 \"#PWR0111\" H 9450 4750 50 0001 C CNN\nF 1 \"GND\" H 9450 4850 50 0000 C CNN\nF 2 \"\" H 9450 5000 60 0000 C CNN\nF 3 \"\" H 9450 5000 60 0000 C CNN\n\t1 9450 5000\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R10\nU 1 1 5837FB3C\nP 9300 2900\nF 0 \"R10\" V 9380 2900 50 0000 C CNN\nF 1 \"100\" V 9300 2900 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 9230 2900 30 0001 C CNN\nF 3 \"\" H 9300 2900 30 0000 C CNN\n\t1 9300 2900\n\t-1 0 0 -1 \n$EndComp\nText Label 9350 2600 0 60 ~ 0\n3V3\n$Comp\nL C C85\nU 1 1 5837FB44\nP 9600 3400\nF 0 \"C85\" H 9625 3500 50 0000 L CNN\nF 1 \"18p\" H 9625 3300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9638 3250 30 0001 C CNN\nF 3 \"\" H 9600 3400 60 0000 C CNN\n\t1 9600 3400\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0112\nU 1 1 5837FB4B\nP 9600 3550\nF 0 \"#PWR0112\" H 9600 3300 50 0001 C CNN\nF 1 \"GND\" H 9600 3400 50 0000 C CNN\nF 2 \"\" H 9600 3550 60 0000 C CNN\nF 3 \"\" H 9600 3550 60 0000 C CNN\n\t1 9600 3550\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R5\nU 1 1 5837FB57\nP 5150 1550\nF 0 \"R5\" V 5230 1550 50 0000 C CNN\nF 1 \"100\" V 5150 1550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5080 1550 30 0001 C CNN\nF 3 \"\" H 5150 1550 30 0000 C CNN\n\t1 5150 1550\n\t-1 0 0 -1 \n$EndComp\nText Label 5200 1250 0 60 ~ 0\n3V3\n$Comp\nL C C81\nU 1 1 5837FB5F\nP 5450 2050\nF 0 \"C81\" H 5475 2150 50 0000 L CNN\nF 1 \"18p\" H 5475 1950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5488 1900 30 0001 C CNN\nF 3 \"\" H 5450 2050 60 0000 C CNN\n\t1 5450 2050\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0113\nU 1 1 5837FB66\nP 5450 2200\nF 0 \"#PWR0113\" H 5450 1950 50 0001 C CNN\nF 1 \"GND\" H 5450 2050 50 0000 C CNN\nF 2 \"\" H 5450 2200 60 0000 C CNN\nF 3 \"\" H 5450 2200 60 0000 C CNN\n\t1 5450 2200\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R7\nU 1 1 5837FB71\nP 5150 4550\nF 0 \"R7\" V 5230 4550 50 0000 C CNN\nF 1 \"100\" V 5150 4550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5080 4550 30 0001 C CNN\nF 3 \"\" H 5150 4550 30 0000 C CNN\n\t1 5150 4550\n\t-1 0 0 -1 \n$EndComp\nText Label 5200 4250 0 60 ~ 0\n3V3\n$Comp\nL C C82\nU 1 1 5837FB79\nP 5450 5050\nF 0 \"C82\" H 5475 5150 50 0000 L CNN\nF 1 \"18p\" H 5475 4950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5488 4900 30 0001 C CNN\nF 3 \"\" H 5450 5050 60 0000 C CNN\n\t1 5450 5050\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0114\nU 1 1 5837FB80\nP 5450 5200\nF 0 \"#PWR0114\" H 5450 4950 50 0001 C CNN\nF 1 \"GND\" H 5450 5050 50 0000 C CNN\nF 2 \"\" H 5450 5200 60 0000 C CNN\nF 3 \"\" H 5450 5200 60 0000 C CNN\n\t1 5450 5200\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R9\nU 1 1 5837FB8B\nP 8650 3250\nF 0 \"R9\" V 8730 3250 50 0000 C CNN\nF 1 \"10\" V 8650 3250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8580 3250 30 0001 C CNN\nF 3 \"\" H 8650 3250 30 0000 C CNN\n\t1 8650 3250\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R8\nU 1 1 5837FB92\nP 8400 3250\nF 0 \"R8\" V 8480 3250 50 0000 C CNN\nF 1 \"10\" V 8400 3250 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8330 3250 30 0001 C CNN\nF 3 \"\" H 8400 3250 30 0000 C CNN\n\t1 8400 3250\n\t-1 0 0 -1 \n$EndComp\nText HLabel 1350 1000 0 60 Input ~ 0\n3V3A\nText Label 2500 1000 0 60 ~ 0\n3V3\nText Notes 8250 1650 0 60 ~ 0\nPE4240 switch control truth table:\\n\\nCTRL1 CTRL2 RFC-RF1 RFC-RF2\\nLow Low Off Off\\nLow High Off On\\nHigh Low On Off\\nHigh High N/A N/A\nText HLabel 8650 2700 1 60 Input ~ 0\nSWC_CTRL2\nText HLabel 8400 2700 1 60 Input ~ 0\nSWC_CTRL1\n$Comp\nL R R3\nU 1 1 5837FBA6\nP 4750 1900\nF 0 \"R3\" V 4830 1900 50 0000 C CNN\nF 1 \"10\" V 4750 1900 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4680 1900 30 0001 C CNN\nF 3 \"\" H 4750 1900 30 0000 C CNN\n\t1 4750 1900\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R1\nU 1 1 5837FBAD\nP 4500 1900\nF 0 \"R1\" V 4580 1900 50 0000 C CNN\nF 1 \"10\" V 4500 1900 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4430 1900 30 0001 C CNN\nF 3 \"\" H 4500 1900 30 0000 C CNN\n\t1 4500 1900\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R4\nU 1 1 5837FBBF\nP 4750 4850\nF 0 \"R4\" V 4830 4850 50 0000 C CNN\nF 1 \"10\" V 4750 4850 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4680 4850 30 0001 C CNN\nF 3 \"\" H 4750 4850 30 0000 C CNN\n\t1 4750 4850\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL R R2\nU 1 1 5837FBC6\nP 4500 4850\nF 0 \"R2\" V 4580 4850 50 0000 C CNN\nF 1 \"10\" V 4500 4850 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4430 4850 30 0001 C CNN\nF 3 \"\" H 4500 4850 30 0000 C CNN\n\t1 4500 4850\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL C C77\nU 1 1 5837FBD4\nP 4150 4600\nF 0 \"C77\" H 4175 4700 50 0000 L CNN\nF 1 \"18p\" H 4175 4500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 4450 30 0001 C CNN\nF 3 \"\" H 4150 4600 60 0000 C CNN\n\t1 4150 4600\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C54\nU 1 1 5837FBDB\nP 4150 4350\nF 0 \"C54\" H 4175 4450 50 0000 L CNN\nF 1 \"18p\" H 4175 4250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 4200 30 0001 C CNN\nF 3 \"\" H 4150 4350 60 0000 C CNN\n\t1 4150 4350\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0115\nU 1 1 5837FBE6\nP 4000 4350\nF 0 \"#PWR0115\" H 4000 4100 50 0001 C CNN\nF 1 \"GND\" H 4000 4200 50 0000 C CNN\nF 2 \"\" H 4000 4350 60 0000 C CNN\nF 3 \"\" H 4000 4350 60 0000 C CNN\n\t1 4000 4350\n\t0 1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0116\nU 1 1 5837FBEC\nP 4000 4600\nF 0 \"#PWR0116\" H 4000 4350 50 0001 C CNN\nF 1 \"GND\" H 4000 4450 50 0000 C CNN\nF 2 \"\" H 4000 4600 60 0000 C CNN\nF 3 \"\" H 4000 4600 60 0000 C CNN\n\t1 4000 4600\n\t0 1 -1 0 \n$EndComp\n$Comp\nL C C36\nU 1 1 5837FBF2\nP 4150 1650\nF 0 \"C36\" H 4175 1750 50 0000 L CNN\nF 1 \"18p\" H 4175 1550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 1500 30 0001 C CNN\nF 3 \"\" H 4150 1650 60 0000 C CNN\n\t1 4150 1650\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C35\nU 1 1 5837FBF9\nP 4150 1400\nF 0 \"C35\" H 4175 1500 50 0000 L CNN\nF 1 \"18p\" H 4175 1300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 1250 30 0001 C CNN\nF 3 \"\" H 4150 1400 60 0000 C CNN\n\t1 4150 1400\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0117\nU 1 1 5837FC00\nP 4000 1400\nF 0 \"#PWR0117\" H 4000 1150 50 0001 C CNN\nF 1 \"GND\" H 4000 1250 50 0000 C CNN\nF 2 \"\" H 4000 1400 60 0000 C CNN\nF 3 \"\" H 4000 1400 60 0000 C CNN\n\t1 4000 1400\n\t0 1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0118\nU 1 1 5837FC06\nP 4000 1650\nF 0 \"#PWR0118\" H 4000 1400 50 0001 C CNN\nF 1 \"GND\" H 4000 1500 50 0000 C CNN\nF 2 \"\" H 4000 1650 60 0000 C CNN\nF 3 \"\" H 4000 1650 60 0000 C CNN\n\t1 4000 1650\n\t0 1 -1 0 \n$EndComp\n$Comp\nL C C84\nU 1 1 5837FC10\nP 8050 3000\nF 0 \"C84\" H 8075 3100 50 0000 L CNN\nF 1 \"18p\" H 8075 2900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8088 2850 30 0001 C CNN\nF 3 \"\" H 8050 3000 60 0000 C CNN\n\t1 8050 3000\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C83\nU 1 1 5837FC17\nP 8050 2750\nF 0 \"C83\" H 8075 2850 50 0000 L CNN\nF 1 \"18p\" H 8075 2650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8088 2600 30 0001 C CNN\nF 3 \"\" H 8050 2750 60 0000 C CNN\n\t1 8050 2750\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0119\nU 1 1 5837FC1E\nP 7900 2750\nF 0 \"#PWR0119\" H 7900 2500 50 0001 C CNN\nF 1 \"GND\" H 7900 2600 50 0000 C CNN\nF 2 \"\" H 7900 2750 60 0000 C CNN\nF 3 \"\" H 7900 2750 60 0000 C CNN\n\t1 7900 2750\n\t0 1 -1 0 \n$EndComp\n$Comp\nL GND #PWR0120\nU 1 1 5837FC24\nP 7900 3000\nF 0 \"#PWR0120\" H 7900 2750 50 0001 C CNN\nF 1 \"GND\" H 7900 2850 50 0000 C CNN\nF 2 \"\" H 7900 3000 60 0000 C CNN\nF 3 \"\" H 7900 3000 60 0000 C CNN\n\t1 7900 3000\n\t0 1 -1 0 \n$EndComp\n$Comp\nL C C87\nU 1 1 5837FC30\nP 9650 2700\nF 0 \"C87\" H 9675 2800 50 0000 L CNN\nF 1 \"100n\" H 9675 2600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 9688 2550 30 0001 C CNN\nF 3 \"\" H 9650 2700 60 0000 C CNN\n\t1 9650 2700\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0121\nU 1 1 5837FC39\nP 9800 2700\nF 0 \"#PWR0121\" H 9800 2450 50 0001 C CNN\nF 1 \"GND\" H 9800 2550 50 0000 C CNN\nF 2 \"\" H 9800 2700 60 0000 C CNN\nF 3 \"\" H 9800 2700 60 0000 C CNN\n\t1 9800 2700\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C80\nU 1 1 5837FC3F\nP 5400 1350\nF 0 \"C80\" H 5425 1450 50 0000 L CNN\nF 1 \"100n\" H 5425 1250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5438 1200 30 0001 C CNN\nF 3 \"\" H 5400 1350 60 0000 C CNN\n\t1 5400 1350\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0122\nU 1 1 5837FC46\nP 5550 1350\nF 0 \"#PWR0122\" H 5550 1100 50 0001 C CNN\nF 1 \"GND\" H 5550 1200 50 0000 C CNN\nF 2 \"\" H 5550 1350 60 0000 C CNN\nF 3 \"\" H 5550 1350 60 0000 C CNN\n\t1 5550 1350\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C78\nU 1 1 5837FC4E\nP 5350 4350\nF 0 \"C78\" H 5375 4450 50 0000 L CNN\nF 1 \"100n\" H 5375 4250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5388 4200 30 0001 C CNN\nF 3 \"\" H 5350 4350 60 0000 C CNN\n\t1 5350 4350\n\t0 -1 1 0 \n$EndComp\n$Comp\nL GND #PWR0123\nU 1 1 5837FC55\nP 5500 4350\nF 0 \"#PWR0123\" H 5500 4100 50 0001 C CNN\nF 1 \"GND\" H 5500 4200 50 0000 C CNN\nF 2 \"\" H 5500 4350 60 0000 C CNN\nF 3 \"\" H 5500 4350 60 0000 C CNN\n\t1 5500 4350\n\t0 -1 1 0 \n$EndComp\n$Comp\nL C C8\nU 1 1 5837FC5D\nP 3400 2750\nF 0 \"C8\" H 3425 2850 50 0000 L CNN\nF 1 \"1n\" H 3425 2650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3438 2600 30 0001 C CNN\nF 3 \"\" H 3400 2750 60 0000 C CNN\n\t1 3400 2750\n\t0 -1 1 0 \n$EndComp\nText HLabel 1450 3300 0 60 Input ~ 0\nRF2\n$Comp\nL C C9\nU 1 1 58381F46\nP 3400 3000\nF 0 \"C9\" H 3425 3100 50 0000 L CNN\nF 1 \"1n\" H 3425 2900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3438 2850 30 0001 C CNN\nF 3 \"\" H 3400 3000 60 0000 C CNN\n\t1 3400 3000\n\t0 -1 1 0 \n$EndComp\nText HLabel 1300 5750 0 60 Input ~ 0\nRF3\n$Comp\nL C C12\nU 1 1 58382292\nP 3400 5750\nF 0 \"C12\" H 3425 5850 50 0000 L CNN\nF 1 \"1n\" H 3425 5650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3438 5600 30 0001 C CNN\nF 3 \"\" H 3400 5750 60 0000 C CNN\n\t1 3400 5750\n\t0 -1 1 0 \n$EndComp\nText HLabel 1300 6300 0 60 Input ~ 0\nRF4\n$Comp\nL C C28\nU 1 1 5838229B\nP 3400 6000\nF 0 \"C28\" H 3425 6100 50 0000 L CNN\nF 1 \"1n\" H 3425 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3438 5850 30 0001 C CNN\nF 3 \"\" H 3400 6000 60 0000 C CNN\n\t1 3400 6000\n\t0 -1 1 0 \n$EndComp\nText HLabel 4750 1350 1 60 Input ~ 0\nSWA_CTRL2\nText HLabel 4500 1350 1 60 Input ~ 0\nSWA_CTRL1\nText HLabel 4750 4300 1 60 Input ~ 0\nSWB_CTRL2\nText HLabel 4500 4300 1 60 Input ~ 0\nSWB_CTRL1\n$Comp\nL FILTER FB11\nU 1 1 5857B054\nP 2000 1000\nF 0 \"FB11\" H 2000 1150 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 2000 900 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 2000 1000 60 0001 C CNN\nF 3 \"\" H 2000 1000 60 0000 C CNN\n\t1 2000 1000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C253\nU 1 1 5857B83F\nP 1500 1200\nF 0 \"C253\" H 1525 1300 50 0000 L CNN\nF 1 \"100n\" H 1525 1100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1538 1050 30 0001 C CNN\nF 3 \"\" H 1500 1200 60 0000 C CNN\n\t1 1500 1200\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL C C254\nU 1 1 5857B977\nP 2450 1200\nF 0 \"C254\" H 2475 1300 50 0000 L CNN\nF 1 \"100n\" H 2475 1100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2488 1050 30 0001 C CNN\nF 3 \"\" H 2450 1200 60 0000 C CNN\n\t1 2450 1200\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0124\nU 1 1 5857BBA0\nP 1500 1350\nF 0 \"#PWR0124\" H 1500 1100 50 0001 C CNN\nF 1 \"GND\" H 1500 1200 50 0000 C CNN\nF 2 \"\" H 1500 1350 60 0000 C CNN\nF 3 \"\" H 1500 1350 60 0000 C CNN\n\t1 1500 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0125\nU 1 1 5857BC0F\nP 2450 1350\nF 0 \"#PWR0125\" H 2450 1100 50 0001 C CNN\nF 1 \"GND\" H 2450 1200 50 0000 C CNN\nF 2 \"\" H 2450 1350 60 0000 C CNN\nF 3 \"\" H 2450 1350 60 0000 C CNN\n\t1 2450 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F9\nU 1 1 586776E6\nP 1850 2750\nF 0 \"F9\" H 1850 2950 60 0000 C CNN\nF 1 \"Via\" H 2000 2600 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1850 2750 60 0001 C CNN\nF 3 \"\" H 1850 2750 60 0001 C CNN\n\t1 1850 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F13\nU 1 1 5867776F\nP 2550 2750\nF 0 \"F13\" H 2550 2950 60 0000 C CNN\nF 1 \"Via\" H 2700 2600 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 2550 2750 60 0001 C CNN\nF 3 \"\" H 2550 2750 60 0001 C CNN\n\t1 2550 2750\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0126\nU 1 1 586779CB\nP 1650 2950\nF 0 \"#PWR0126\" H 1650 2700 50 0001 C CNN\nF 1 \"GND\" H 1650 2800 50 0000 C CNN\nF 2 \"\" H 1650 2950 60 0000 C CNN\nF 3 \"\" H 1650 2950 60 0000 C CNN\n\t1 1650 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0127\nU 1 1 58677A61\nP 2750 2950\nF 0 \"#PWR0127\" H 2750 2700 50 0001 C CNN\nF 1 \"GND\" H 2750 2800 50 0000 C CNN\nF 2 \"\" H 2750 2950 60 0000 C CNN\nF 3 \"\" H 2750 2950 60 0000 C CNN\n\t1 2750 2950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F10\nU 1 1 58677B31\nP 1850 3300\nF 0 \"F10\" H 1850 3500 60 0000 C CNN\nF 1 \"Via\" H 2000 3150 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1850 3300 60 0001 C CNN\nF 3 \"\" H 1850 3300 60 0001 C CNN\n\t1 1850 3300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F14\nU 1 1 58677B37\nP 2550 3300\nF 0 \"F14\" H 2550 3500 60 0000 C CNN\nF 1 \"Via\" H 2700 3150 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 2550 3300 60 0001 C CNN\nF 3 \"\" H 2550 3300 60 0001 C CNN\n\t1 2550 3300\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0128\nU 1 1 58677B3E\nP 1650 3500\nF 0 \"#PWR0128\" H 1650 3250 50 0001 C CNN\nF 1 \"GND\" H 1650 3350 50 0000 C CNN\nF 2 \"\" H 1650 3500 60 0000 C CNN\nF 3 \"\" H 1650 3500 60 0000 C CNN\n\t1 1650 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0129\nU 1 1 58677B44\nP 2750 3500\nF 0 \"#PWR0129\" H 2750 3250 50 0001 C CNN\nF 1 \"GND\" H 2750 3350 50 0000 C CNN\nF 2 \"\" H 2750 3500 60 0000 C CNN\nF 3 \"\" H 2750 3500 60 0000 C CNN\n\t1 2750 3500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F7\nU 1 1 58678A7F\nP 1700 5750\nF 0 \"F7\" H 1700 5950 60 0000 C CNN\nF 1 \"Via\" H 1850 5600 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1700 5750 60 0001 C CNN\nF 3 \"\" H 1700 5750 60 0001 C CNN\n\t1 1700 5750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F11\nU 1 1 58678A85\nP 2400 5750\nF 0 \"F11\" H 2400 5950 60 0000 C CNN\nF 1 \"Via\" H 2550 5600 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 2400 5750 60 0001 C CNN\nF 3 \"\" H 2400 5750 60 0001 C CNN\n\t1 2400 5750\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0130\nU 1 1 58678A8B\nP 1500 5950\nF 0 \"#PWR0130\" H 1500 5700 50 0001 C CNN\nF 1 \"GND\" H 1500 5800 50 0000 C CNN\nF 2 \"\" H 1500 5950 60 0000 C CNN\nF 3 \"\" H 1500 5950 60 0000 C CNN\n\t1 1500 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0131\nU 1 1 58678A91\nP 2600 5950\nF 0 \"#PWR0131\" H 2600 5700 50 0001 C CNN\nF 1 \"GND\" H 2600 5800 50 0000 C CNN\nF 2 \"\" H 2600 5950 60 0000 C CNN\nF 3 \"\" H 2600 5950 60 0000 C CNN\n\t1 2600 5950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F8\nU 1 1 58678A97\nP 1700 6300\nF 0 \"F8\" H 1700 6500 60 0000 C CNN\nF 1 \"Via\" H 1850 6150 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 1700 6300 60 0001 C CNN\nF 3 \"\" H 1700 6300 60 0001 C CNN\n\t1 1700 6300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F12\nU 1 1 58678A9D\nP 2400 6300\nF 0 \"F12\" H 2400 6500 60 0000 C CNN\nF 1 \"Via\" H 2550 6150 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 2400 6300 60 0001 C CNN\nF 3 \"\" H 2400 6300 60 0001 C CNN\n\t1 2400 6300\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0132\nU 1 1 58678AA4\nP 1500 6500\nF 0 \"#PWR0132\" H 1500 6250 50 0001 C CNN\nF 1 \"GND\" H 1500 6350 50 0000 C CNN\nF 2 \"\" H 1500 6500 60 0000 C CNN\nF 3 \"\" H 1500 6500 60 0000 C CNN\n\t1 1500 6500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0133\nU 1 1 58678AAA\nP 2600 6500\nF 0 \"#PWR0133\" H 2600 6250 50 0001 C CNN\nF 1 \"GND\" H 2600 6350 50 0000 C CNN\nF 2 \"\" H 2600 6500 60 0000 C CNN\nF 3 \"\" H 2600 6500 60 0000 C CNN\n\t1 2600 6500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F15\nU 1 1 586796C8\nP 6150 3250\nF 0 \"F15\" H 6150 3450 60 0000 C CNN\nF 1 \"Via\" H 6300 3100 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 6150 3250 60 0001 C CNN\nF 3 \"\" H 6150 3250 60 0001 C CNN\n\t1 6150 3250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F17\nU 1 1 586796CE\nP 6850 3250\nF 0 \"F17\" H 6850 3450 60 0000 C CNN\nF 1 \"Via\" H 7000 3100 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 6850 3250 60 0001 C CNN\nF 3 \"\" H 6850 3250 60 0001 C CNN\n\t1 6850 3250\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0134\nU 1 1 586796D4\nP 5950 3450\nF 0 \"#PWR0134\" H 5950 3200 50 0001 C CNN\nF 1 \"GND\" H 5950 3300 50 0000 C CNN\nF 2 \"\" H 5950 3450 60 0000 C CNN\nF 3 \"\" H 5950 3450 60 0000 C CNN\n\t1 5950 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0135\nU 1 1 586796DA\nP 7050 3450\nF 0 \"#PWR0135\" H 7050 3200 50 0001 C CNN\nF 1 \"GND\" H 7050 3300 50 0000 C CNN\nF 2 \"\" H 7050 3450 60 0000 C CNN\nF 3 \"\" H 7050 3450 60 0000 C CNN\n\t1 7050 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F16\nU 1 1 586796E0\nP 6650 6000\nF 0 \"F16\" H 6650 6200 60 0000 C CNN\nF 1 \"Via\" H 6800 5850 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 6650 6000 60 0001 C CNN\nF 3 \"\" H 6650 6000 60 0001 C CNN\n\t1 6650 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL Via F18\nU 1 1 586796E6\nP 7350 6000\nF 0 \"F18\" H 7350 6200 60 0000 C CNN\nF 1 \"Via\" H 7500 5850 60 0000 C CNN\nF 2 \"VNA:RF_via\" H 7350 6000 60 0001 C CNN\nF 3 \"\" H 7350 6000 60 0001 C CNN\n\t1 7350 6000\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0136\nU 1 1 586796ED\nP 6450 6200\nF 0 \"#PWR0136\" H 6450 5950 50 0001 C CNN\nF 1 \"GND\" H 6450 6050 50 0000 C CNN\nF 2 \"\" H 6450 6200 60 0000 C CNN\nF 3 \"\" H 6450 6200 60 0000 C CNN\n\t1 6450 6200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0137\nU 1 1 586796F3\nP 7550 6200\nF 0 \"#PWR0137\" H 7550 5950 50 0001 C CNN\nF 1 \"GND\" H 7550 6050 50 0000 C CNN\nF 2 \"\" H 7550 6200 60 0000 C CNN\nF 3 \"\" H 7550 6200 60 0000 C CNN\n\t1 7550 6200\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t10050 4250 9850 4250\nWire Wire Line\n\t5450 3500 5450 3650\nWire Wire Line\n\t5350 3600 5350 3500\nWire Wire Line\n\t4050 3600 5450 3600\nConnection ~ 5450 3600\nWire Wire Line\n\t5250 3600 5250 3500\nConnection ~ 5350 3600\nWire Wire Line\n\t5150 3600 5150 3500\nConnection ~ 5250 3600\nWire Wire Line\n\t5050 3600 5050 3500\nConnection ~ 5150 3600\nWire Wire Line\n\t4950 3600 4950 3500\nConnection ~ 5050 3600\nWire Wire Line\n\t4850 3600 4850 3500\nConnection ~ 4950 3600\nWire Wire Line\n\t4750 3600 4750 3500\nConnection ~ 4850 3600\nWire Wire Line\n\t4650 3600 4650 3500\nConnection ~ 4750 3600\nWire Wire Line\n\t4550 3600 4550 3500\nConnection ~ 4650 3600\nWire Wire Line\n\t4450 3600 4450 3500\nConnection ~ 4550 3600\nWire Wire Line\n\t4350 3600 4350 3500\nConnection ~ 4450 3600\nWire Wire Line\n\t4250 3600 4250 3500\nConnection ~ 4350 3600\nWire Wire Line\n\t4150 3600 4150 3500\nConnection ~ 4250 3600\nWire Wire Line\n\t5450 6500 5450 6650\nWire Wire Line\n\t5350 6600 5350 6500\nWire Wire Line\n\t4050 6600 5450 6600\nConnection ~ 5450 6600\nWire Wire Line\n\t5250 6600 5250 6500\nConnection ~ 5350 6600\nWire Wire Line\n\t5150 6600 5150 6500\nConnection ~ 5250 6600\nWire Wire Line\n\t5050 6600 5050 6500\nConnection ~ 5150 6600\nWire Wire Line\n\t4950 6600 4950 6500\nConnection ~ 5050 6600\nWire Wire Line\n\t4850 6600 4850 6500\nConnection ~ 4950 6600\nWire Wire Line\n\t4750 6600 4750 6500\nConnection ~ 4850 6600\nWire Wire Line\n\t4650 6600 4650 6500\nConnection ~ 4750 6600\nWire Wire Line\n\t4550 6600 4550 6500\nConnection ~ 4650 6600\nWire Wire Line\n\t4450 6600 4450 6500\nConnection ~ 4550 6600\nWire Wire Line\n\t4350 6600 4350 6500\nConnection ~ 4450 6600\nWire Wire Line\n\t4250 6600 4250 6500\nConnection ~ 4350 6600\nWire Wire Line\n\t4150 6600 4150 6500\nConnection ~ 4250 6600\nWire Wire Line\n\t9450 4850 9450 5000\nWire Wire Line\n\t9350 4950 9350 4850\nWire Wire Line\n\t8150 4950 9550 4950\nConnection ~ 9450 4950\nWire Wire Line\n\t9250 4950 9250 4850\nConnection ~ 9350 4950\nWire Wire Line\n\t9150 4950 9150 4850\nConnection ~ 9250 4950\nWire Wire Line\n\t9050 4950 9050 4850\nConnection ~ 9150 4950\nWire Wire Line\n\t8950 4950 8950 4850\nConnection ~ 9050 4950\nWire Wire Line\n\t8850 4950 8850 4850\nConnection ~ 8950 4950\nWire Wire Line\n\t8750 4950 8750 4850\nConnection ~ 8850 4950\nWire Wire Line\n\t8650 4950 8650 4850\nConnection ~ 8750 4950\nWire Wire Line\n\t8550 4950 8550 4850\nConnection ~ 8650 4950\nWire Wire Line\n\t8450 4950 8450 4850\nConnection ~ 8550 4950\nWire Wire Line\n\t8350 4950 8350 4850\nConnection ~ 8450 4950\nWire Wire Line\n\t8250 4950 8250 4850\nConnection ~ 8350 4950\nWire Wire Line\n\t8150 4950 8150 4850\nConnection ~ 8250 4950\nConnection ~ 9300 3250\nWire Wire Line\n\t9300 3250 9600 3250\nWire Wire Line\n\t9350 2600 9300 2600\nWire Wire Line\n\t9300 2600 9300 2750\nConnection ~ 5150 1900\nWire Wire Line\n\t5150 1900 5450 1900\nWire Wire Line\n\t5200 1250 5150 1250\nWire Wire Line\n\t5150 1250 5150 1400\nWire Wire Line\n\t5150 1700 5150 2350\nConnection ~ 5150 4900\nWire Wire Line\n\t5150 4900 5450 4900\nWire Wire Line\n\t5200 4250 5150 4250\nWire Wire Line\n\t5150 4250 5150 4400\nWire Wire Line\n\t5150 4700 5150 5350\nWire Wire Line\n\t8400 3400 8400 3700\nWire Wire Line\n\t8400 3700 8650 3700\nWire Wire Line\n\t2350 1000 2950 1000\nWire Wire Line\n\t8650 2700 8650 3100\nWire Wire Line\n\t8400 2700 8400 3100\nWire Wire Line\n\t4750 1350 4750 1750\nWire Wire Line\n\t4500 1350 4500 1750\nWire Wire Line\n\t4750 2050 4750 2350\nWire Wire Line\n\t4750 2350 4650 2350\nWire Wire Line\n\t4500 2050 4500 2350\nWire Wire Line\n\t4500 2350 4550 2350\nWire Wire Line\n\t4750 4300 4750 4700\nWire Wire Line\n\t4500 4300 4500 4700\nWire Wire Line\n\t4750 5000 4750 5350\nWire Wire Line\n\t4500 5000 4500 5350\nWire Wire Line\n\t4500 5350 4550 5350\nWire Wire Line\n\t4750 5350 4650 5350\nWire Wire Line\n\t4750 4350 4300 4350\nConnection ~ 4750 4350\nWire Wire Line\n\t4300 4600 4500 4600\nConnection ~ 4500 4600\nWire Wire Line\n\t4300 1400 4750 1400\nConnection ~ 4750 1400\nWire Wire Line\n\t4300 1650 4500 1650\nConnection ~ 4500 1650\nWire Wire Line\n\t8200 2750 8650 2750\nConnection ~ 8650 2750\nWire Wire Line\n\t8200 3000 8400 3000\nConnection ~ 8400 3000\nWire Wire Line\n\t5750 3250 5750 2900\nWire Wire Line\n\t9500 2700 9300 2700\nConnection ~ 9300 2700\nWire Wire Line\n\t5250 1350 5150 1350\nConnection ~ 5150 1350\nWire Wire Line\n\t5200 4350 5150 4350\nConnection ~ 5150 4350\nWire Wire Line\n\t3550 2750 3750 2750\nWire Wire Line\n\t1450 2750 3250 2750\nWire Wire Line\n\t3250 3000 3100 3000\nWire Wire Line\n\t3750 3000 3550 3000\nWire Wire Line\n\t3550 5750 3750 5750\nWire Wire Line\n\t1300 5750 3250 5750\nWire Wire Line\n\t3250 6000 3100 6000\nWire Wire Line\n\t3750 6000 3550 6000\nWire Wire Line\n\t1350 1000 1650 1000\nWire Wire Line\n\t2450 1050 2450 1000\nConnection ~ 2450 1000\nWire Wire Line\n\t1500 1050 1500 1000\nConnection ~ 1500 1000\nWire Wire Line\n\t8650 3400 8650 3550\nWire Wire Line\n\t8650 3550 8750 3550\nWire Wire Line\n\t8750 3550 8750 3700\nWire Wire Line\n\t9300 3050 9300 3500\nWire Wire Line\n\t9300 3500 9250 3500\nWire Wire Line\n\t9250 3500 9250 3700\nWire Wire Line\n\t9550 4950 9550 4850\nWire Wire Line\n\t4050 6500 4050 6600\nConnection ~ 4150 6600\nWire Wire Line\n\t4050 3500 4050 3600\nConnection ~ 4150 3600\nWire Wire Line\n\t1450 3300 3100 3300\nWire Wire Line\n\t3100 3300 3100 3000\nConnection ~ 2750 3300\nConnection ~ 1650 3300\nConnection ~ 1650 2750\nConnection ~ 2750 2750\nWire Wire Line\n\t1300 6300 3100 6300\nConnection ~ 2600 6300\nConnection ~ 1500 6300\nConnection ~ 1500 5750\nConnection ~ 2600 5750\nWire Wire Line\n\t3100 6300 3100 6000\nWire Wire Line\n\t5750 3250 7850 3250\nConnection ~ 7550 6000\nConnection ~ 6450 6000\nConnection ~ 5950 3250\nConnection ~ 7050 3250\nWire Wire Line\n\t7850 3250 7850 4100\nWire Wire Line\n\t7850 6000 7850 4350\nWire Wire Line\n\t5850 6000 7850 6000\nWire Wire Line\n\t5850 6000 5850 5900\nWire Wire Line\n\t5850 5900 5750 5900\n$Comp\nL C C271\nU 1 1 588692CD\nP 2700 1200\nF 0 \"C271\" H 2725 1300 50 0000 L CNN\nF 1 \"DNP\" H 2725 1100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2738 1050 30 0001 C CNN\nF 3 \"\" H 2700 1200 60 0000 C CNN\n\t1 2700 1200\n\t-1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2700 1000 2700 1050\n$Comp\nL GND #PWR0138\nU 1 1 5886944E\nP 2700 1350\nF 0 \"#PWR0138\" H 2700 1100 50 0001 C CNN\nF 1 \"GND\" H 2700 1200 50 0000 C CNN\nF 2 \"\" H 2700 1350 60 0000 C CNN\nF 3 \"\" H 2700 1350 60 0000 C CNN\n\t1 2700 1350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C272\nU 1 1 58869DE9\nP 2950 1200\nF 0 \"C272\" H 2975 1300 50 0000 L CNN\nF 1 \"DNP\" H 2975 1100 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 2988 1050 30 0001 C CNN\nF 3 \"\" H 2950 1200 60 0000 C CNN\n\t1 2950 1200\n\t-1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0139\nU 1 1 58869E86\nP 2950 1350\nF 0 \"#PWR0139\" H 2950 1100 50 0001 C CNN\nF 1 \"GND\" H 2950 1200 50 0000 C CNN\nF 2 \"\" H 2950 1350 60 0000 C CNN\nF 3 \"\" H 2950 1350 60 0000 C CNN\n\t1 2950 1350\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2950 1000 2950 1050\nConnection ~ 2700 1000\nText Notes 8650 6000 0 60 ~ 0\nPort A1 A2 B1 B2 C1 C2\\nRF1 1 0 0 0 1 0\\nRF2 0 1 0 0 1 0\\nRF3 0 0 1 0 0 1\\nRF4 0 0 0 1 0 1\n$EndSCHEMATC\n" }, { "path": "hw/transmitter.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 2 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL MAX2870 U5\nU 1 1 562E8D63\nP 5300 3650\nAR Path=\"/562E7B12/562E8D63\" Ref=\"U5\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D63\" Ref=\"U9\" Part=\"1\" \nF 0 \"U5\" H 5300 3500 60 0000 C CNN\nF 1 \"MAX2871\" H 5300 3950 60 0000 C CNN\nF 2 \"VNA:TQFN-32\" H 3950 4500 60 0001 C CNN\nF 3 \"\" H 3950 4500 60 0000 C CNN\n\t1 5300 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C19\nU 1 1 562E8D6A\nP 4150 4600\nAR Path=\"/562E7B12/562E8D6A\" Ref=\"C19\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D6A\" Ref=\"C61\" Part=\"1\" \nF 0 \"C19\" H 4175 4700 50 0000 L CNN\nF 1 \"1u\" H 4175 4500 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 4188 4450 30 0001 C CNN\nF 3 \"\" H 4150 4600 60 0000 C CNN\n\t1 4150 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C17\nU 1 1 562E8D71\nP 3950 4600\nAR Path=\"/562E7B12/562E8D71\" Ref=\"C17\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D71\" Ref=\"C59\" Part=\"1\" \nF 0 \"C17\" H 3975 4700 50 0000 L CNN\nF 1 \"1u\" H 3975 4500 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 3988 4450 30 0001 C CNN\nF 3 \"\" H 3950 4600 60 0000 C CNN\n\t1 3950 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C15\nU 1 1 562E8D78\nP 3750 4600\nAR Path=\"/562E7B12/562E8D78\" Ref=\"C15\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D78\" Ref=\"C57\" Part=\"1\" \nF 0 \"C15\" H 3775 4700 50 0000 L CNN\nF 1 \"1u\" H 3775 4500 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 3788 4450 30 0001 C CNN\nF 3 \"\" H 3750 4600 60 0000 C CNN\n\t1 3750 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR019\nU 1 1 562E8D87\nP 4950 4900\nAR Path=\"/562E7B12/562E8D87\" Ref=\"#PWR019\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D87\" Ref=\"#PWR087\" Part=\"1\" \nF 0 \"#PWR087\" H 4950 4650 50 0001 C CNN\nF 1 \"GND\" H 4950 4750 50 0000 C CNN\nF 2 \"\" H 4950 4900 60 0000 C CNN\nF 3 \"\" H 4950 4900 60 0000 C CNN\n\t1 4950 4900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C26\nU 1 1 562E8DA7\nP 5800 2250\nAR Path=\"/562E7B12/562E8DA7\" Ref=\"C26\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DA7\" Ref=\"C68\" Part=\"1\" \nF 0 \"C26\" H 5825 2350 50 0000 L CNN\nF 1 \"100n\" H 5825 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5838 2100 30 0001 C CNN\nF 3 \"\" H 5800 2250 60 0000 C CNN\n\t1 5800 2250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R11\nU 1 1 562E8DAE\nP 3550 4600\nAR Path=\"/562E7B12/562E8DAE\" Ref=\"R11\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DAE\" Ref=\"R29\" Part=\"1\" \nF 0 \"R11\" V 3630 4600 50 0000 C CNN\nF 1 \"5.1k\" V 3550 4600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3480 4600 30 0001 C CNN\nF 3 \"\" H 3550 4600 30 0000 C CNN\n\t1 3550 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR020\nU 1 1 562E8DB5\nP 3550 4800\nAR Path=\"/562E7B12/562E8DB5\" Ref=\"#PWR020\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DB5\" Ref=\"#PWR088\" Part=\"1\" \nF 0 \"#PWR088\" H 3550 4550 50 0001 C CNN\nF 1 \"GND\" H 3550 4650 50 0000 C CNN\nF 2 \"\" H 3550 4800 60 0000 C CNN\nF 3 \"\" H 3550 4800 60 0000 C CNN\n\t1 3550 4800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR021\nU 1 1 562E8DBB\nP 3750 4800\nAR Path=\"/562E7B12/562E8DBB\" Ref=\"#PWR021\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DBB\" Ref=\"#PWR089\" Part=\"1\" \nF 0 \"#PWR089\" H 3750 4550 50 0001 C CNN\nF 1 \"GND\" H 3750 4650 50 0000 C CNN\nF 2 \"\" H 3750 4800 60 0000 C CNN\nF 3 \"\" H 3750 4800 60 0000 C CNN\n\t1 3750 4800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR022\nU 1 1 562E8DC1\nP 3950 4800\nAR Path=\"/562E7B12/562E8DC1\" Ref=\"#PWR022\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DC1\" Ref=\"#PWR090\" Part=\"1\" \nF 0 \"#PWR090\" H 3950 4550 50 0001 C CNN\nF 1 \"GND\" H 3950 4650 50 0000 C CNN\nF 2 \"\" H 3950 4800 60 0000 C CNN\nF 3 \"\" H 3950 4800 60 0000 C CNN\n\t1 3950 4800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR023\nU 1 1 562E8DC7\nP 4150 4800\nAR Path=\"/562E7B12/562E8DC7\" Ref=\"#PWR023\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DC7\" Ref=\"#PWR091\" Part=\"1\" \nF 0 \"#PWR091\" H 4150 4550 50 0001 C CNN\nF 1 \"GND\" H 4150 4650 50 0000 C CNN\nF 2 \"\" H 4150 4800 60 0000 C CNN\nF 3 \"\" H 4150 4800 60 0000 C CNN\n\t1 4150 4800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C32\nU 1 1 562E8DD1\nP 7650 3950\nAR Path=\"/562E7B12/562E8DD1\" Ref=\"C32\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DD1\" Ref=\"C74\" Part=\"1\" \nF 0 \"C32\" H 7675 4050 50 0000 L CNN\nF 1 \"820p\" H 7675 3850 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7688 3800 30 0001 C CNN\nF 3 \"\" H 7650 3950 60 0000 C CNN\n\t1 7650 3950\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R18\nU 1 1 562E8DD8\nP 8000 3800\nAR Path=\"/562E7B12/562E8DD8\" Ref=\"R18\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DD8\" Ref=\"R36\" Part=\"1\" \nF 0 \"R18\" V 8080 3800 50 0000 C CNN\nF 1 \"240\" V 8000 3800 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7930 3800 30 0001 C CNN\nF 3 \"\" H 8000 3800 30 0000 C CNN\n\t1 8000 3800\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR024\nU 1 1 562E8DE0\nP 7650 4150\nAR Path=\"/562E7B12/562E8DE0\" Ref=\"#PWR024\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DE0\" Ref=\"#PWR092\" Part=\"1\" \nF 0 \"#PWR092\" H 7650 3900 50 0001 C CNN\nF 1 \"GND\" H 7650 4000 50 0000 C CNN\nF 2 \"\" H 7650 4150 60 0000 C CNN\nF 3 \"\" H 7650 4150 60 0000 C CNN\n\t1 7650 4150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C31\nU 1 1 562E8DE8\nP 7650 3400\nAR Path=\"/562E7B12/562E8DE8\" Ref=\"C31\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DE8\" Ref=\"C73\" Part=\"1\" \nF 0 \"C31\" H 7675 3500 50 0000 L CNN\nF 1 \"12n\" H 7675 3300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7688 3250 30 0001 C CNN\nF 3 \"\" H 7650 3400 60 0000 C CNN\n\t1 7650 3400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR025\nU 1 1 562E8DF0\nP 7650 3550\nAR Path=\"/562E7B12/562E8DF0\" Ref=\"#PWR025\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DF0\" Ref=\"#PWR093\" Part=\"1\" \nF 0 \"#PWR093\" H 7650 3300 50 0001 C CNN\nF 1 \"GND\" H 7650 3400 50 0000 C CNN\nF 2 \"\" H 7650 3550 60 0000 C CNN\nF 3 \"\" H 7650 3550 60 0000 C CNN\n\t1 7650 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C30\nU 1 1 562E8DF6\nP 7650 3050\nAR Path=\"/562E7B12/562E8DF6\" Ref=\"C30\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DF6\" Ref=\"C72\" Part=\"1\" \nF 0 \"C30\" H 7675 3150 50 0000 L CNN\nF 1 \"100n\" H 7675 2950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7688 2900 30 0001 C CNN\nF 3 \"\" H 7650 3050 60 0000 C CNN\n\t1 7650 3050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R17\nU 1 1 562E8DFE\nP 7450 2900\nAR Path=\"/562E7B12/562E8DFE\" Ref=\"R17\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8DFE\" Ref=\"R35\" Part=\"1\" \nF 0 \"R17\" V 7530 2900 50 0000 C CNN\nF 1 \"30.1\" V 7450 2900 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7380 2900 30 0001 C CNN\nF 3 \"\" H 7450 2900 30 0000 C CNN\n\t1 7450 2900\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R15\nU 1 1 562E8E05\nP 7250 3050\nAR Path=\"/562E7B12/562E8E05\" Ref=\"R15\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E05\" Ref=\"R33\" Part=\"1\" \nF 0 \"R15\" V 7330 3050 50 0000 C CNN\nF 1 \"90.9\" V 7250 3050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7180 3050 30 0001 C CNN\nF 3 \"\" H 7250 3050 30 0000 C CNN\n\t1 7250 3050\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR026\nU 1 1 562E8E0D\nP 7250 3200\nAR Path=\"/562E7B12/562E8E0D\" Ref=\"#PWR026\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E0D\" Ref=\"#PWR094\" Part=\"1\" \nF 0 \"#PWR094\" H 7250 2950 50 0001 C CNN\nF 1 \"GND\" H 7250 3050 50 0000 C CNN\nF 2 \"\" H 7250 3200 60 0000 C CNN\nF 3 \"\" H 7250 3200 60 0000 C CNN\n\t1 7250 3200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R19\nU 1 1 562E8E27\nP 8850 1550\nAR Path=\"/562E7B12/562E8E27\" Ref=\"R19\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E27\" Ref=\"R37\" Part=\"1\" \nF 0 \"R19\" V 8930 1550 50 0000 C CNN\nF 1 \"49.9\" V 8850 1550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8780 1550 30 0001 C CNN\nF 3 \"\" H 8850 1550 30 0000 C CNN\n\t1 8850 1550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C33\nU 1 1 562E8E2E\nP 8700 1300\nAR Path=\"/562E7B12/562E8E2E\" Ref=\"C33\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E2E\" Ref=\"C75\" Part=\"1\" \nF 0 \"C33\" H 8725 1400 50 0000 L CNN\nF 1 \"100p\" H 8725 1200 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 1150 30 0001 C CNN\nF 3 \"\" H 8700 1300 60 0000 C CNN\n\t1 8700 1300\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR027\nU 1 1 562E8E36\nP 8450 1300\nAR Path=\"/562E7B12/562E8E36\" Ref=\"#PWR027\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E36\" Ref=\"#PWR095\" Part=\"1\" \nF 0 \"#PWR095\" H 8450 1050 50 0001 C CNN\nF 1 \"GND\" H 8450 1150 50 0000 C CNN\nF 2 \"\" H 8450 1300 60 0000 C CNN\nF 3 \"\" H 8450 1300 60 0000 C CNN\n\t1 8450 1300\n\t1 0 0 -1 \n$EndComp\nText Label 6450 3850 0 60 ~ 0\nRF_OUT_P\nText Label 8850 1850 2 60 ~ 0\nRF_OUT_P\nText HLabel 9200 1850 2 60 Output ~ 0\nRF_OUT_P\n$Comp\nL GND #PWR028\nU 1 1 562E8E72\nP 5800 2400\nAR Path=\"/562E7B12/562E8E72\" Ref=\"#PWR028\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8E72\" Ref=\"#PWR096\" Part=\"1\" \nF 0 \"#PWR096\" H 5800 2150 50 0001 C CNN\nF 1 \"GND\" H 5800 2250 50 0000 C CNN\nF 2 \"\" H 5800 2400 60 0000 C CNN\nF 3 \"\" H 5800 2400 60 0000 C CNN\n\t1 5800 2400\n\t1 0 0 -1 \n$EndComp\nText HLabel 5500 1450 1 60 Input ~ 0\n3V3\nText HLabel 3850 3200 0 60 Input ~ 0\nCLK\nText HLabel 3850 3300 0 60 Input ~ 0\nDATA\nText HLabel 3850 3500 0 60 Input ~ 0\nCE\nText HLabel 3850 3400 0 60 Input ~ 0\nLE\nText HLabel 3850 3650 0 60 Input ~ 0\nRFOUT_EN\nText HLabel 6500 3000 2 60 Output ~ 0\nMUXOUT\nText HLabel 6500 3100 2 60 Output ~ 0\nLD\n$Comp\nL C C23\nU 1 1 562EA29E\nP 4650 1650\nAR Path=\"/562E7B12/562EA29E\" Ref=\"C23\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562EA29E\" Ref=\"C65\" Part=\"1\" \nF 0 \"C23\" H 4675 1750 50 0000 L CNN\nF 1 \"100n\" H 4675 1550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4688 1500 30 0001 C CNN\nF 3 \"\" H 4650 1650 60 0000 C CNN\n\t1 4650 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C25\nU 1 1 562EA2EE\nP 4850 1650\nAR Path=\"/562E7B12/562EA2EE\" Ref=\"C25\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562EA2EE\" Ref=\"C67\" Part=\"1\" \nF 0 \"C25\" H 4875 1750 50 0000 L CNN\nF 1 \"100p\" H 4875 1550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4888 1500 30 0001 C CNN\nF 3 \"\" H 4850 1650 60 0000 C CNN\n\t1 4850 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C22\nU 1 1 562EA341\nP 4450 2200\nAR Path=\"/562E7B12/562EA341\" Ref=\"C22\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562EA341\" Ref=\"C64\" Part=\"1\" \nF 0 \"C22\" H 4475 2300 50 0000 L CNN\nF 1 \"100p\" H 4475 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4488 2050 30 0001 C CNN\nF 3 \"\" H 4450 2200 60 0000 C CNN\n\t1 4450 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C24\nU 1 1 562EA397\nP 4700 2200\nAR Path=\"/562E7B12/562EA397\" Ref=\"C24\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562EA397\" Ref=\"C66\" Part=\"1\" \nF 0 \"C24\" H 4725 2300 50 0000 L CNN\nF 1 \"100p\" H 4725 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4738 2050 30 0001 C CNN\nF 3 \"\" H 4700 2200 60 0000 C CNN\n\t1 4700 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C27\nU 1 1 562FFBC7\nP 6100 2250\nAR Path=\"/562E7B12/562FFBC7\" Ref=\"C27\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562FFBC7\" Ref=\"C69\" Part=\"1\" \nF 0 \"C27\" H 6125 2350 50 0000 L CNN\nF 1 \"100n\" H 6125 2150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6138 2100 30 0001 C CNN\nF 3 \"\" H 6100 2250 60 0000 C CNN\n\t1 6100 2250\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR029\nU 1 1 562FFDAC\nP 6100 2400\nAR Path=\"/562E7B12/562FFDAC\" Ref=\"#PWR029\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562FFDAC\" Ref=\"#PWR097\" Part=\"1\" \nF 0 \"#PWR097\" H 6100 2150 50 0001 C CNN\nF 1 \"GND\" H 6100 2250 50 0000 C CNN\nF 2 \"\" H 6100 2400 60 0000 C CNN\nF 3 \"\" H 6100 2400 60 0000 C CNN\n\t1 6100 2400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR030\nU 1 1 563001F5\nP 4700 2350\nAR Path=\"/562E7B12/563001F5\" Ref=\"#PWR030\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563001F5\" Ref=\"#PWR098\" Part=\"1\" \nF 0 \"#PWR098\" H 4700 2100 50 0001 C CNN\nF 1 \"GND\" H 4700 2200 50 0000 C CNN\nF 2 \"\" H 4700 2350 60 0000 C CNN\nF 3 \"\" H 4700 2350 60 0000 C CNN\n\t1 4700 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR031\nU 1 1 5630024B\nP 4450 2350\nAR Path=\"/562E7B12/5630024B\" Ref=\"#PWR031\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/5630024B\" Ref=\"#PWR099\" Part=\"1\" \nF 0 \"#PWR099\" H 4450 2100 50 0001 C CNN\nF 1 \"GND\" H 4450 2200 50 0000 C CNN\nF 2 \"\" H 4450 2350 60 0000 C CNN\nF 3 \"\" H 4450 2350 60 0000 C CNN\n\t1 4450 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR032\nU 1 1 5630076D\nP 4850 1800\nAR Path=\"/562E7B12/5630076D\" Ref=\"#PWR032\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/5630076D\" Ref=\"#PWR0100\" Part=\"1\" \nF 0 \"#PWR0100\" H 4850 1550 50 0001 C CNN\nF 1 \"GND\" H 4850 1650 50 0000 C CNN\nF 2 \"\" H 4850 1800 60 0000 C CNN\nF 3 \"\" H 4850 1800 60 0000 C CNN\n\t1 4850 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR033\nU 1 1 563007C0\nP 4650 1800\nAR Path=\"/562E7B12/563007C0\" Ref=\"#PWR033\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563007C0\" Ref=\"#PWR0101\" Part=\"1\" \nF 0 \"#PWR0101\" H 4650 1550 50 0001 C CNN\nF 1 \"GND\" H 4650 1650 50 0000 C CNN\nF 2 \"\" H 4650 1800 60 0000 C CNN\nF 3 \"\" H 4650 1800 60 0000 C CNN\n\t1 4650 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C21\nU 1 1 56300BCA\nP 4400 1650\nAR Path=\"/562E7B12/56300BCA\" Ref=\"C21\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56300BCA\" Ref=\"C63\" Part=\"1\" \nF 0 \"C21\" H 4425 1750 50 0000 L CNN\nF 1 \"100n\" H 4425 1550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4438 1500 30 0001 C CNN\nF 3 \"\" H 4400 1650 60 0000 C CNN\n\t1 4400 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR034\nU 1 1 56300C2C\nP 4400 1800\nAR Path=\"/562E7B12/56300C2C\" Ref=\"#PWR034\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56300C2C\" Ref=\"#PWR0102\" Part=\"1\" \nF 0 \"#PWR0102\" H 4400 1550 50 0001 C CNN\nF 1 \"GND\" H 4400 1650 50 0000 C CNN\nF 2 \"\" H 4400 1800 60 0000 C CNN\nF 3 \"\" H 4400 1800 60 0000 C CNN\n\t1 4400 1800\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C20\nU 1 1 56300C7F\nP 4200 2200\nAR Path=\"/562E7B12/56300C7F\" Ref=\"C20\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56300C7F\" Ref=\"C62\" Part=\"1\" \nF 0 \"C20\" H 4225 2300 50 0000 L CNN\nF 1 \"100n\" H 4225 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4238 2050 30 0001 C CNN\nF 3 \"\" H 4200 2200 60 0000 C CNN\n\t1 4200 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR035\nU 1 1 56300D73\nP 4200 2350\nAR Path=\"/562E7B12/56300D73\" Ref=\"#PWR035\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56300D73\" Ref=\"#PWR0103\" Part=\"1\" \nF 0 \"#PWR0103\" H 4200 2100 50 0001 C CNN\nF 1 \"GND\" H 4200 2200 50 0000 C CNN\nF 2 \"\" H 4200 2350 60 0000 C CNN\nF 3 \"\" H 4200 2350 60 0000 C CNN\n\t1 4200 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C16\nU 1 1 563015C1\nP 3950 2200\nAR Path=\"/562E7B12/563015C1\" Ref=\"C16\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563015C1\" Ref=\"C58\" Part=\"1\" \nF 0 \"C16\" H 3975 2300 50 0000 L CNN\nF 1 \"100n\" H 3975 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3988 2050 30 0001 C CNN\nF 3 \"\" H 3950 2200 60 0000 C CNN\n\t1 3950 2200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR036\nU 1 1 5630169B\nP 3950 2350\nAR Path=\"/562E7B12/5630169B\" Ref=\"#PWR036\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/5630169B\" Ref=\"#PWR0104\" Part=\"1\" \nF 0 \"#PWR0104\" H 3950 2100 50 0001 C CNN\nF 1 \"GND\" H 3950 2200 50 0000 C CNN\nF 2 \"\" H 3950 2350 60 0000 C CNN\nF 3 \"\" H 3950 2350 60 0000 C CNN\n\t1 3950 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB1\nU 1 1 563022EE\nP 3450 2050\nAR Path=\"/562E7B12/563022EE\" Ref=\"FB1\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563022EE\" Ref=\"FB3\" Part=\"1\" \nF 0 \"FB1\" H 3450 2200 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 3450 1950 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 3450 2050 60 0001 C CNN\nF 3 \"\" H 3450 2050 60 0000 C CNN\n\t1 3450 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB2\nU 1 1 56302497\nP 3950 1500\nAR Path=\"/562E7B12/56302497\" Ref=\"FB2\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56302497\" Ref=\"FB4\" Part=\"1\" \nF 0 \"FB2\" H 3950 1650 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 3950 1400 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 3950 1500 60 0001 C CNN\nF 3 \"\" H 3950 1500 60 0000 C CNN\n\t1 3950 1500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR037\nU 1 1 5630339E\nP 2000 1900\nAR Path=\"/562E7B12/5630339E\" Ref=\"#PWR037\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/5630339E\" Ref=\"#PWR0105\" Part=\"1\" \nF 0 \"#PWR0105\" H 2000 1650 50 0001 C CNN\nF 1 \"GND\" H 2000 1750 50 0000 C CNN\nF 2 \"\" H 2000 1900 60 0000 C CNN\nF 3 \"\" H 2000 1900 60 0000 C CNN\n\t1 2000 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C14\nU 1 1 563036EA\nP 2700 1700\nAR Path=\"/562E7B12/563036EA\" Ref=\"C14\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563036EA\" Ref=\"C56\" Part=\"1\" \nF 0 \"C14\" H 2725 1800 50 0000 L CNN\nF 1 \"1u\" H 2725 1600 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 2738 1550 30 0001 C CNN\nF 3 \"\" H 2700 1700 60 0000 C CNN\n\t1 2700 1700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C13\nU 1 1 56303797\nP 1350 1700\nAR Path=\"/562E7B12/56303797\" Ref=\"C13\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56303797\" Ref=\"C55\" Part=\"1\" \nF 0 \"C13\" H 1375 1800 50 0000 L CNN\nF 1 \"1u\" H 1375 1600 50 0000 L CNN\nF 2 \"VNA:C_0603b\" H 1388 1550 30 0001 C CNN\nF 3 \"\" H 1350 1700 60 0000 C CNN\n\t1 1350 1700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR038\nU 1 1 563039E8\nP 2700 1850\nAR Path=\"/562E7B12/563039E8\" Ref=\"#PWR038\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/563039E8\" Ref=\"#PWR0106\" Part=\"1\" \nF 0 \"#PWR0106\" H 2700 1600 50 0001 C CNN\nF 1 \"GND\" H 2700 1700 50 0000 C CNN\nF 2 \"\" H 2700 1850 60 0000 C CNN\nF 3 \"\" H 2700 1850 60 0000 C CNN\n\t1 2700 1850\n\t1 0 0 -1 \n$EndComp\nText Notes 2700 1450 0 60 ~ 0\n180mA\nText HLabel 1250 1500 0 60 Input ~ 0\n3V6\n$Comp\nL GND #PWR039\nU 1 1 5630432A\nP 1350 1850\nAR Path=\"/562E7B12/5630432A\" Ref=\"#PWR039\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/5630432A\" Ref=\"#PWR0107\" Part=\"1\" \nF 0 \"#PWR0107\" H 1350 1600 50 0001 C CNN\nF 1 \"GND\" H 1350 1700 50 0000 C CNN\nF 2 \"\" H 1350 1850 60 0000 C CNN\nF 3 \"\" H 1350 1850 60 0000 C CNN\n\t1 1350 1850\n\t1 0 0 -1 \n$EndComp\nText HLabel 3400 3050 0 60 Input ~ 0\nREF_IN\n$Comp\nL LP5907 U4\nU 1 1 56306D73\nP 2000 1550\nAR Path=\"/562E7B12/56306D73\" Ref=\"U4\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56306D73\" Ref=\"U8\" Part=\"1\" \nF 0 \"U4\" H 2200 1350 60 0000 C CNN\nF 1 \"LP5907-3V3\" H 2100 1750 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 2000 1600 60 0001 C CNN\nF 3 \"\" H 2000 1600 60 0000 C CNN\n\t1 2000 1550\n\t1 0 0 -1 \n$EndComp\nText Label 6450 3950 0 60 ~ 0\nRF_OUT_N\nText Label 8850 2600 2 60 ~ 0\nRF_OUT_N\n$Comp\nL R R20\nU 1 1 56312C62\nP 8850 2350\nAR Path=\"/562E7B12/56312C62\" Ref=\"R20\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56312C62\" Ref=\"R38\" Part=\"1\" \nF 0 \"R20\" V 8930 2350 50 0000 C CNN\nF 1 \"49.9\" V 8850 2350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 8780 2350 30 0001 C CNN\nF 3 \"\" H 8850 2350 30 0000 C CNN\n\t1 8850 2350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C34\nU 1 1 56312DF7\nP 8700 2200\nAR Path=\"/562E7B12/56312DF7\" Ref=\"C34\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56312DF7\" Ref=\"C76\" Part=\"1\" \nF 0 \"C34\" H 8725 2300 50 0000 L CNN\nF 1 \"100p\" H 8725 2100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 8738 2050 30 0001 C CNN\nF 3 \"\" H 8700 2200 60 0000 C CNN\n\t1 8700 2200\n\t0 -1 -1 0 \n$EndComp\n$Comp\nL GND #PWR040\nU 1 1 56312EAA\nP 8450 2200\nAR Path=\"/562E7B12/56312EAA\" Ref=\"#PWR040\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56312EAA\" Ref=\"#PWR0108\" Part=\"1\" \nF 0 \"#PWR0108\" H 8450 1950 50 0001 C CNN\nF 1 \"GND\" H 8450 2050 50 0000 C CNN\nF 2 \"\" H 8450 2200 60 0000 C CNN\nF 3 \"\" H 8450 2200 60 0000 C CNN\n\t1 8450 2200\n\t1 0 0 -1 \n$EndComp\nText HLabel 8950 2600 2 60 Output ~ 0\nRF_OUT_N\n$Comp\nL R R12\nU 1 1 56352F1E\nP 6700 4700\nAR Path=\"/562E7B12/56352F1E\" Ref=\"R12\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56352F1E\" Ref=\"R30\" Part=\"1\" \nF 0 \"R12\" V 6780 4700 50 0000 C CNN\nF 1 \"0\" V 6700 4700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6630 4700 30 0001 C CNN\nF 3 \"\" H 6700 4700 30 0000 C CNN\n\t1 6700 4700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R13\nU 1 1 56352FA2\nP 6900 4700\nAR Path=\"/562E7B12/56352FA2\" Ref=\"R13\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/56352FA2\" Ref=\"R31\" Part=\"1\" \nF 0 \"R13\" V 6980 4700 50 0000 C CNN\nF 1 \"0\" V 6900 4700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6830 4700 30 0001 C CNN\nF 3 \"\" H 6900 4700 30 0000 C CNN\n\t1 6900 4700\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t4300 4200 4150 4200\nWire Wire Line\n\t4150 4200 4150 4450\nWire Wire Line\n\t4300 4100 3950 4100\nWire Wire Line\n\t3950 4100 3950 4450\nWire Wire Line\n\t4300 4000 3750 4000\nWire Wire Line\n\t3750 4000 3750 4450\nWire Wire Line\n\t4300 3900 3550 3900\nWire Wire Line\n\t3550 3900 3550 4450\nWire Wire Line\n\t4950 4750 4950 4900\nWire Wire Line\n\t4950 4850 5650 4850\nWire Wire Line\n\t5050 4850 5050 4750\nConnection ~ 4950 4850\nWire Wire Line\n\t5150 4850 5150 4750\nConnection ~ 5050 4850\nWire Wire Line\n\t5250 4850 5250 4750\nConnection ~ 5150 4850\nWire Wire Line\n\t5350 4850 5350 4750\nConnection ~ 5250 4850\nWire Wire Line\n\t5450 4850 5450 4750\nConnection ~ 5350 4850\nWire Wire Line\n\t5550 4850 5550 4750\nConnection ~ 5450 4850\nWire Wire Line\n\t5650 4850 5650 4750\nConnection ~ 5550 4850\nWire Wire Line\n\t4300 3050 4150 3050\nWire Wire Line\n\t3400 3050 3850 3050\nWire Wire Line\n\t4150 4750 4150 4800\nWire Wire Line\n\t3950 4750 3950 4800\nWire Wire Line\n\t3750 4750 3750 4800\nWire Wire Line\n\t3550 4750 3550 4800\nWire Wire Line\n\t7500 3800 7850 3800\nWire Wire Line\n\t7650 4100 7650 4150\nConnection ~ 7650 3800\nWire Wire Line\n\t7500 3250 8150 3250\nWire Wire Line\n\t7650 3250 7650 3200\nConnection ~ 7250 2900\nWire Wire Line\n\t7600 2900 7650 2900\nWire Wire Line\n\t7050 2900 7300 2900\nWire Wire Line\n\t7050 2900 7050 3300\nWire Wire Line\n\t7050 3300 6350 3300\nWire Wire Line\n\t6350 3500 7500 3500\nWire Wire Line\n\t7500 3500 7500 3250\nWire Wire Line\n\t7500 3800 7500 3600\nWire Wire Line\n\t7500 3600 6350 3600\nWire Wire Line\n\t8150 3250 8150 3800\nConnection ~ 7650 3250\nWire Wire Line\n\t3850 3200 4300 3200\nWire Wire Line\n\t3850 3300 4300 3300\nWire Wire Line\n\t3850 3400 4300 3400\nWire Wire Line\n\t3850 3500 4300 3500\nWire Wire Line\n\t8850 1150 8850 1400\nWire Wire Line\n\t8550 1300 8450 1300\nWire Wire Line\n\t8850 1700 8850 1850\nWire Wire Line\n\t6350 3850 6450 3850\nWire Wire Line\n\t6350 3950 6450 3950\nWire Wire Line\n\t8850 1850 9200 1850\nConnection ~ 8850 1300\nWire Wire Line\n\t3850 3650 4300 3650\nWire Wire Line\n\t6350 3000 6500 3000\nWire Wire Line\n\t6500 3100 6350 3100\nWire Wire Line\n\t5500 1450 5500 2550\nConnection ~ 5500 1550\nWire Wire Line\n\t5400 2550 5400 2150\nWire Wire Line\n\t5600 2550 5600 2250\nWire Wire Line\n\t5600 2250 5500 2250\nConnection ~ 5500 2250\nWire Wire Line\n\t6100 2000 6100 2100\nWire Wire Line\n\t5500 2000 6100 2000\nWire Wire Line\n\t5800 2000 5800 2100\nConnection ~ 5500 2000\nConnection ~ 5800 2000\nWire Wire Line\n\t5200 2350 5200 2550\nWire Wire Line\n\t4950 2350 5200 2350\nWire Wire Line\n\t5100 2350 5100 2550\nWire Wire Line\n\t4950 2050 4950 2350\nWire Wire Line\n\t3800 2050 4950 2050\nConnection ~ 5100 2350\nConnection ~ 4700 2050\nWire Wire Line\n\t5300 1500 5300 2550\nConnection ~ 5300 2150\nWire Wire Line\n\t5400 2150 5300 2150\nWire Wire Line\n\t4300 1500 5300 1500\nConnection ~ 4850 1500\nConnection ~ 4650 1500\nConnection ~ 4450 2050\nConnection ~ 4200 2050\nConnection ~ 4400 1500\nConnection ~ 3950 2050\nWire Wire Line\n\t3100 2050 2950 2050\nWire Wire Line\n\t2500 1500 3600 1500\nWire Wire Line\n\t2950 2050 2950 1500\nConnection ~ 2950 1500\nWire Wire Line\n\t1250 1500 1500 1500\nWire Wire Line\n\t2700 1500 2700 1550\nConnection ~ 2700 1500\nWire Wire Line\n\t1350 1500 1350 1550\nConnection ~ 1350 1500\nWire Wire Line\n\t1500 1500 1500 1600\nWire Wire Line\n\t8550 2200 8450 2200\nWire Wire Line\n\t8850 2500 8850 2600\nWire Wire Line\n\t8850 2600 8950 2600\nWire Wire Line\n\t6350 4100 6550 4100\nWire Wire Line\n\t6550 4100 6550 4950\nWire Wire Line\n\t6350 4200 6450 4200\nWire Wire Line\n\t6450 4200 6450 5050\nWire Wire Line\n\t6700 4950 6700 4850\nWire Wire Line\n\t6900 5050 6900 4850\nWire Wire Line\n\t6700 4550 6700 4450\nWire Wire Line\n\t6900 4550 6900 4450\nWire Wire Line\n\t6900 4450 6700 4450\nWire Wire Line\n\t6550 4950 6700 4950\nWire Wire Line\n\t6450 5050 6900 5050\n$Comp\nL C C18\nU 1 1 562E8D9D\nP 4000 3050\nAR Path=\"/562E7B12/562E8D9D\" Ref=\"C18\" Part=\"1\" \nAR Path=\"/562EEB8A/563156F1/562E8D9D\" Ref=\"C60\" Part=\"1\" \nF 0 \"C18\" H 4025 3150 50 0000 L CNN\nF 1 \"10n\" H 4025 2950 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4038 2900 30 0001 C CNN\nF 3 \"\" H 4000 3050 60 0000 C CNN\n\t1 4000 3050\n\t0 1 1 0 \n$EndComp\nText Label 3200 1500 0 60 ~ 0\n3V3_RF\nText Label 8850 1150 0 60 ~ 0\n3V3_RF\nText Label 8850 2150 0 60 ~ 0\n3V3_RF\nWire Wire Line\n\t8850 2150 8850 2200\nText Label 6900 4450 0 60 ~ 0\n3V3_RF\n$EndSCHEMATC\n" }, { "path": "hw/tx_amp.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 11 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL PE43711 U3\nU 1 1 56A2BADD\nP 3500 3700\nF 0 \"U3\" H 4150 3000 60 0000 C CNN\nF 1 \"PE43711\" H 4000 4300 60 0000 C CNN\nF 2 \"VNA:VQFN-24\" H 2200 4200 60 0001 C CNN\nF 3 \"\" H 2200 4200 60 0000 C CNN\n\t1 3500 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C11\nU 1 1 56A2BAE4\nP 3700 2700\nF 0 \"C11\" H 3725 2800 50 0000 L CNN\nF 1 \"100n\" H 3725 2600 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3738 2550 30 0001 C CNN\nF 3 \"\" H 3700 2700 60 0000 C CNN\n\t1 3700 2700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0241\nU 1 1 56A2BAEB\nP 3700 2850\nF 0 \"#PWR0241\" H 3700 2600 50 0001 C CNN\nF 1 \"GND\" H 3700 2700 50 0000 C CNN\nF 2 \"\" H 3700 2850 60 0000 C CNN\nF 3 \"\" H 3700 2850 60 0000 C CNN\n\t1 3700 2850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0242\nU 1 1 56A2BAF6\nP 4050 4600\nF 0 \"#PWR0242\" H 4050 4350 50 0001 C CNN\nF 1 \"GND\" H 4050 4450 50 0000 C CNN\nF 2 \"\" H 4050 4600 60 0000 C CNN\nF 3 \"\" H 4050 4600 60 0000 C CNN\n\t1 4050 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0243\nU 1 1 56A2BAFC\nP 2500 4200\nF 0 \"#PWR0243\" H 2500 3950 50 0001 C CNN\nF 1 \"GND\" H 2500 4050 50 0000 C CNN\nF 2 \"\" H 2500 4200 60 0000 C CNN\nF 3 \"\" H 2500 4200 60 0000 C CNN\n\t1 2500 4200\n\t1 0 0 -1 \n$EndComp\nText Notes 4550 3100 0 60 ~ 0\n-48 - -2 dBm\n$Comp\nL R R16\nU 1 1 56A2BB04\nP 3300 2550\nF 0 \"R16\" V 3380 2550 50 0000 C CNN\nF 1 \"33\" V 3300 2550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3230 2550 30 0001 C CNN\nF 3 \"\" H 3300 2550 30 0000 C CNN\n\t1 3300 2550\n\t0 1 1 0 \n$EndComp\n$Comp\nL TRF37A75 U26\nU 1 1 56A2BEBC\nP 5900 3400\nF 0 \"U26\" H 6200 3150 60 0000 C CNN\nF 1 \"TRF37A75\" H 6150 3700 60 0000 C CNN\nF 2 \"VNA:DFN-8-1EP_2x2mm_Pitch0.5mm\" H 5700 3350 60 0001 C CNN\nF 3 \"\" H 5700 3350 60 0000 C CNN\n\t1 5900 3400\n\t1 0 0 -1 \n$EndComp\nText Notes 7300 2900 0 60 ~ 0\nGain: 11 - 13 dB\n$Comp\nL C C142\nU 1 1 56A2DEF2\nP 6000 2400\nF 0 \"C142\" H 6025 2500 50 0000 L CNN\nF 1 \"100n\" H 6025 2300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6038 2250 30 0001 C CNN\nF 3 \"\" H 6000 2400 60 0000 C CNN\n\t1 6000 2400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0244\nU 1 1 56A2DF5B\nP 6000 2600\nF 0 \"#PWR0244\" H 6000 2350 50 0001 C CNN\nF 1 \"GND\" H 6000 2450 50 0000 C CNN\nF 2 \"\" H 6000 2600 60 0000 C CNN\nF 3 \"\" H 6000 2600 60 0000 C CNN\n\t1 6000 2600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C143\nU 1 1 56A2E066\nP 6100 1900\nF 0 \"C143\" H 6125 2000 50 0000 L CNN\nF 1 \"10u\" H 6125 1800 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6138 1750 30 0001 C CNN\nF 3 \"\" H 6100 1900 60 0000 C CNN\n\t1 6100 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0245\nU 1 1 56A2E0C9\nP 6100 2050\nF 0 \"#PWR0245\" H 6100 1800 50 0001 C CNN\nF 1 \"GND\" H 6100 1900 50 0000 C CNN\nF 2 \"\" H 6100 2050 60 0000 C CNN\nF 3 \"\" H 6100 2050 60 0000 C CNN\n\t1 6100 2050\n\t1 0 0 -1 \n$EndComp\nText HLabel 3750 1700 0 60 Input ~ 0\n5V\n$Comp\nL C C141\nU 1 1 56A2E837\nP 4800 1900\nF 0 \"C141\" H 4825 2000 50 0000 L CNN\nF 1 \"100n\" H 4825 1800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4838 1750 30 0001 C CNN\nF 3 \"\" H 4800 1900 60 0000 C CNN\n\t1 4800 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0246\nU 1 1 56A2E915\nP 4800 2050\nF 0 \"#PWR0246\" H 4800 1800 50 0001 C CNN\nF 1 \"GND\" H 4800 1900 50 0000 C CNN\nF 2 \"\" H 4800 2050 60 0000 C CNN\nF 3 \"\" H 4800 2050 60 0000 C CNN\n\t1 4800 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C147\nU 1 1 56A2EFDF\nP 7100 2650\nF 0 \"C147\" H 7125 2750 50 0000 L CNN\nF 1 \"10n\" H 7125 2550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7138 2500 30 0001 C CNN\nF 3 \"\" H 7100 2650 60 0000 C CNN\n\t1 7100 2650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0247\nU 1 1 56A2F083\nP 7100 2850\nF 0 \"#PWR0247\" H 7100 2600 50 0001 C CNN\nF 1 \"GND\" H 7100 2700 50 0000 C CNN\nF 2 \"\" H 7100 2850 60 0000 C CNN\nF 3 \"\" H 7100 2850 60 0000 C CNN\n\t1 7100 2850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0248\nU 1 1 56A2F7E7\nP 5900 4050\nF 0 \"#PWR0248\" H 5900 3800 50 0001 C CNN\nF 1 \"GND\" H 5900 3900 50 0000 C CNN\nF 2 \"\" H 5900 4050 60 0000 C CNN\nF 3 \"\" H 5900 4050 60 0000 C CNN\n\t1 5900 4050\n\t1 0 0 -1 \n$EndComp\nText HLabel 4500 3500 2 60 Input ~ 0\nATTEN_LE\nText HLabel 4500 3600 2 60 Input ~ 0\nSPI_CLK\nText HLabel 4500 3700 2 60 Input ~ 0\nSPI_DATA\nText HLabel 4500 3800 2 60 Input ~ 0\n3V3\nText Label 3100 2550 2 60 ~ 0\n3V3\nText HLabel 2300 3250 0 60 Input ~ 0\nRF_IN\n$Comp\nL INDUCTOR_SMALL L12\nU 1 1 56A30AC0\nP 6650 3050\nF 0 \"L12\" H 6650 3150 50 0000 C CNN\nF 1 \"AISC-0603HP-R10J\" H 6600 2950 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 6650 3050 60 0001 C CNN\nF 3 \"\" H 6650 3050 60 0000 C CNN\n\t1 6650 3050\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C145\nU 1 1 56A31337\nP 6900 2650\nF 0 \"C145\" H 6925 2750 50 0000 L CNN\nF 1 \"10p\" H 6925 2550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6938 2500 30 0001 C CNN\nF 3 \"\" H 6900 2650 60 0000 C CNN\n\t1 6900 2650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0249\nU 1 1 56A313C9\nP 6900 2850\nF 0 \"#PWR0249\" H 6900 2600 50 0001 C CNN\nF 1 \"GND\" H 6900 2700 50 0000 C CNN\nF 2 \"\" H 6900 2850 60 0000 C CNN\nF 3 \"\" H 6900 2850 60 0000 C CNN\n\t1 6900 2850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R89\nU 1 1 56A3177E\nP 6650 2300\nF 0 \"R89\" V 6730 2300 50 0000 C CNN\nF 1 \"1.8\" V 6650 2300 50 0000 C CNN\nF 2 \"VNA:R_0603b\" V 6580 2300 30 0001 C CNN\nF 3 \"\" H 6650 2300 30 0000 C CNN\n\t1 6650 2300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R90\nU 1 1 56A3207C\nP 6950 3600\nF 0 \"R90\" V 7030 3600 50 0000 C CNN\nF 1 \"100\" V 6950 3600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6880 3600 30 0001 C CNN\nF 3 \"\" H 6950 3600 30 0000 C CNN\n\t1 6950 3600\n\t1 0 0 -1 \n$EndComp\nText HLabel 7700 3350 2 60 Output ~ 0\nRF_OUT\nText Notes 4600 1600 0 60 ~ 0\n95 mA\nText Notes 2950 2400 0 60 ~ 0\n0.2 mA\nText HLabel 5300 3900 3 60 Input ~ 0\nPWDN\n$Comp\nL C C151\nU 1 1 56A454A8\nP 7350 3350\nF 0 \"C151\" H 7375 3450 50 0000 L CNN\nF 1 \"1n\" H 7375 3250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7388 3200 30 0001 C CNN\nF 3 \"\" H 7350 3350 60 0000 C CNN\n\t1 7350 3350\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C152\nU 1 1 56A4C0F0\nP 4900 3250\nF 0 \"C152\" H 4925 3350 50 0000 L CNN\nF 1 \"1n\" H 4925 3150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4938 3100 30 0001 C CNN\nF 3 \"\" H 4900 3250 60 0000 C CNN\n\t1 4900 3250\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R97\nU 1 1 56A6106A\nP 5300 3650\nF 0 \"R97\" V 5380 3650 50 0000 C CNN\nF 1 \"100\" V 5300 3650 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5230 3650 30 0001 C CNN\nF 3 \"\" H 5300 3650 30 0000 C CNN\n\t1 5300 3650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C158\nU 1 1 56A7C9D4\nP 4450 1900\nF 0 \"C158\" H 4475 2000 50 0000 L CNN\nF 1 \"DNP\" H 4475 1800 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 4488 1750 30 0001 C CNN\nF 3 \"\" H 4450 1900 60 0000 C CNN\n\t1 4450 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0250\nU 1 1 56A7CAAB\nP 4450 2050\nF 0 \"#PWR0250\" H 4450 1800 50 0001 C CNN\nF 1 \"GND\" H 4450 1900 50 0000 C CNN\nF 2 \"\" H 4450 2050 60 0000 C CNN\nF 3 \"\" H 4450 2050 60 0000 C CNN\n\t1 4450 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C162\nU 1 1 56A9796A\nP 4200 1900\nF 0 \"C162\" H 4225 2000 50 0000 L CNN\nF 1 \"DNP\" H 4225 1800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4238 1750 30 0001 C CNN\nF 3 \"\" H 4200 1900 60 0000 C CNN\n\t1 4200 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0251\nU 1 1 56A979DE\nP 4200 2050\nF 0 \"#PWR0251\" H 4200 1800 50 0001 C CNN\nF 1 \"GND\" H 4200 1900 50 0000 C CNN\nF 2 \"\" H 4200 2050 60 0000 C CNN\nF 3 \"\" H 4200 2050 60 0000 C CNN\n\t1 4200 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C161\nU 1 1 56A97C26\nP 3950 1900\nF 0 \"C161\" H 3975 2000 50 0000 L CNN\nF 1 \"DNP\" H 3975 1800 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3988 1750 30 0001 C CNN\nF 3 \"\" H 3950 1900 60 0000 C CNN\n\t1 3950 1900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0252\nU 1 1 56A97DA1\nP 3950 2050\nF 0 \"#PWR0252\" H 3950 1800 50 0001 C CNN\nF 1 \"GND\" H 3950 1900 50 0000 C CNN\nF 2 \"\" H 3950 2050 60 0000 C CNN\nF 3 \"\" H 3950 2050 60 0000 C CNN\n\t1 3950 2050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL FILTER FB6\nU 1 1 56A99BBC\nP 5400 1700\nF 0 \"FB6\" H 5400 1850 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 5400 1600 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 5400 1700 60 0001 C CNN\nF 3 \"\" H 5400 1700 60 0000 C CNN\n\t1 5400 1700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL HMC713LP3E U24\nU 1 1 584696B7\nP 2950 6850\nF 0 \"U24\" H 3250 7150 60 0000 C CNN\nF 1 \"HMC713LP3E\" H 3650 7600 60 0000 C CNN\nF 2 \"VNA:VFQFN-16\" H 2950 6850 60 0001 C CNN\nF 3 \"\" H 2950 6850 60 0001 C CNN\n\t1 2950 6850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0253\nU 1 1 58469718\nP 3000 7250\nF 0 \"#PWR0253\" H 3000 7000 50 0001 C CNN\nF 1 \"GND\" H 3000 7100 50 0000 C CNN\nF 2 \"\" H 3000 7250 60 0000 C CNN\nF 3 \"\" H 3000 7250 60 0000 C CNN\n\t1 3000 7250\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 2550 6650\nNoConn ~ 2550 6750\n$Comp\nL C C165\nU 1 1 58469B87\nP 3400 5500\nF 0 \"C165\" H 3425 5600 50 0000 L CNN\nF 1 \"100n\" H 3425 5400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3438 5350 30 0001 C CNN\nF 3 \"\" H 3400 5500 60 0000 C CNN\n\t1 3400 5500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0254\nU 1 1 58469C9C\nP 3400 5650\nF 0 \"#PWR0254\" H 3400 5400 50 0001 C CNN\nF 1 \"GND\" H 3400 5500 50 0000 C CNN\nF 2 \"\" H 3400 5650 60 0000 C CNN\nF 3 \"\" H 3400 5650 60 0000 C CNN\n\t1 3400 5650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C166\nU 1 1 5846A2F3\nP 4150 6850\nF 0 \"C166\" H 4175 6950 50 0000 L CNN\nF 1 \"C\" H 4175 6750 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4188 6700 30 0001 C CNN\nF 3 \"\" H 4150 6850 60 0000 C CNN\n\t1 4150 6850\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0255\nU 1 1 5846A344\nP 4150 7050\nF 0 \"#PWR0255\" H 4150 6800 50 0001 C CNN\nF 1 \"GND\" H 4150 6900 50 0000 C CNN\nF 2 \"\" H 4150 7050 60 0000 C CNN\nF 3 \"\" H 4150 7050 60 0000 C CNN\n\t1 4150 7050\n\t1 0 0 -1 \n$EndComp\nText Label 3200 5350 2 60 ~ 0\n3V3\nText Label 2400 6450 2 60 ~ 0\n3V3\n$Comp\nL R R47\nU 1 1 5846B670\nP 1450 6400\nF 0 \"R47\" V 1530 6400 50 0000 C CNN\nF 1 \"1k\" V 1450 6400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1380 6400 30 0001 C CNN\nF 3 \"\" H 1450 6400 30 0000 C CNN\n\t1 1450 6400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R48\nU 1 1 5846B6D0\nP 1450 6750\nF 0 \"R48\" V 1530 6750 50 0000 C CNN\nF 1 \"10k\" V 1450 6750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 1380 6750 30 0001 C CNN\nF 3 \"\" H 1450 6750 30 0000 C CNN\n\t1 1450 6750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0256\nU 1 1 5846B8D8\nP 1450 6900\nF 0 \"#PWR0256\" H 1450 6650 50 0001 C CNN\nF 1 \"GND\" H 1450 6750 50 0000 C CNN\nF 2 \"\" H 1450 6900 60 0000 C CNN\nF 3 \"\" H 1450 6900 60 0000 C CNN\n\t1 1450 6900\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C157\nU 1 1 5846B986\nP 1200 6400\nF 0 \"C157\" H 1225 6500 50 0000 L CNN\nF 1 \"1p\" H 1225 6300 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1238 6250 30 0001 C CNN\nF 3 \"\" H 1200 6400 60 0000 C CNN\n\t1 1200 6400\n\t1 0 0 -1 \n$EndComp\nText Label 1450 6200 0 60 ~ 0\nOUTP\nText HLabel 7600 5400 2 60 Output ~ 0\nDETN\n$Comp\nL C C160\nU 1 1 5846D065\nP 1200 6750\nF 0 \"C160\" H 1225 6850 50 0000 L CNN\nF 1 \"C\" H 1225 6650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1238 6600 30 0001 C CNN\nF 3 \"\" H 1200 6750 60 0000 C CNN\n\t1 1200 6750\n\t1 0 0 -1 \n$EndComp\nText Notes 2200 6050 0 60 ~ 0\nMax: -5 dBm\n$Comp\nL TSV911 U35\nU 1 1 584EB099\nP 6350 5400\nF 0 \"U35\" H 6500 5550 60 0000 C CNN\nF 1 \"TSV911\" H 6550 5200 60 0000 C CNN\nF 2 \"VNA:SOT-23-5\" H 6350 5400 60 0001 C CNN\nF 3 \"\" H 6350 5400 60 0000 C CNN\n\t1 6350 5400\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0257\nU 1 1 584EB2EA\nP 6250 5800\nF 0 \"#PWR0257\" H 6250 5550 50 0001 C CNN\nF 1 \"GND\" H 6250 5650 50 0000 C CNN\nF 2 \"\" H 6250 5800 60 0000 C CNN\nF 3 \"\" H 6250 5800 60 0000 C CNN\n\t1 6250 5800\n\t1 0 0 -1 \n$EndComp\nText Label 6250 4450 2 60 ~ 0\n3V3\n$Comp\nL C C227\nU 1 1 584EB3A2\nP 6550 4600\nF 0 \"C227\" H 6575 4700 50 0000 L CNN\nF 1 \"100n\" H 6575 4500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6588 4450 30 0001 C CNN\nF 3 \"\" H 6550 4600 60 0000 C CNN\n\t1 6550 4600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0258\nU 1 1 584EB415\nP 6550 4750\nF 0 \"#PWR0258\" H 6550 4500 50 0001 C CNN\nF 1 \"GND\" H 6550 4600 50 0000 C CNN\nF 2 \"\" H 6550 4750 60 0000 C CNN\nF 3 \"\" H 6550 4750 60 0000 C CNN\n\t1 6550 4750\n\t1 0 0 -1 \n$EndComp\nText Label 6950 3900 0 60 ~ 0\nDET_IN\nText Label 2000 5100 0 60 ~ 0\nDET_IN\n$Comp\nL R R94\nU 1 1 584EC0CC\nP 4950 5600\nF 0 \"R94\" V 5030 5600 50 0000 C CNN\nF 1 \"22k\" V 4950 5600 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4880 5600 30 0001 C CNN\nF 3 \"\" H 4950 5600 30 0000 C CNN\n\t1 4950 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R95\nU 1 1 584EC15C\nP 4950 6000\nF 0 \"R95\" V 5030 6000 50 0000 C CNN\nF 1 \"10k\" V 4950 6000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4880 6000 30 0001 C CNN\nF 3 \"\" H 4950 6000 30 0000 C CNN\n\t1 4950 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C226\nU 1 1 584EC1C2\nP 5250 6000\nF 0 \"C226\" H 5275 6100 50 0000 L CNN\nF 1 \"100p\" H 5275 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5288 5850 30 0001 C CNN\nF 3 \"\" H 5250 6000 60 0000 C CNN\n\t1 5250 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0259\nU 1 1 584EC358\nP 5250 6200\nF 0 \"#PWR0259\" H 5250 5950 50 0001 C CNN\nF 1 \"GND\" H 5250 6050 50 0000 C CNN\nF 2 \"\" H 5250 6200 60 0000 C CNN\nF 3 \"\" H 5250 6200 60 0000 C CNN\n\t1 5250 6200\n\t1 0 0 -1 \n$EndComp\nConnection ~ 3500 2550\nWire Wire Line\n\t3500 2550 3500 2950\nWire Wire Line\n\t3100 2550 3150 2550\nConnection ~ 2500 4050\nWire Wire Line\n\t2500 3450 2500 4200\nWire Wire Line\n\t2500 4050 2650 4050\nConnection ~ 2500 3550\nWire Wire Line\n\t2650 3450 2500 3450\nConnection ~ 2500 3650\nWire Wire Line\n\t2650 3550 2500 3550\nConnection ~ 2500 3750\nWire Wire Line\n\t2500 3650 2650 3650\nConnection ~ 2500 3850\nWire Wire Line\n\t2500 3750 2650 3750\nConnection ~ 2500 3950\nWire Wire Line\n\t2500 3850 2650 3850\nWire Wire Line\n\t2500 3950 2650 3950\nConnection ~ 3150 4600\nWire Wire Line\n\t3050 4600 3050 4550\nConnection ~ 3250 4600\nWire Wire Line\n\t3150 4600 3150 4550\nConnection ~ 3350 4600\nWire Wire Line\n\t3250 4600 3250 4550\nConnection ~ 3450 4600\nWire Wire Line\n\t3350 4600 3350 4550\nConnection ~ 3550 4600\nWire Wire Line\n\t3450 4600 3450 4550\nConnection ~ 3650 4600\nWire Wire Line\n\t3550 4600 3550 4550\nConnection ~ 3750 4600\nWire Wire Line\n\t3650 4600 3650 4550\nConnection ~ 3850 4600\nWire Wire Line\n\t3750 4600 3750 4550\nConnection ~ 3950 4600\nWire Wire Line\n\t3850 4600 3850 4550\nWire Wire Line\n\t3950 4600 3950 4550\nWire Wire Line\n\t3050 4600 4050 4600\nWire Wire Line\n\t4050 4600 4050 4550\nWire Wire Line\n\t4450 3500 4500 3500\nWire Wire Line\n\t4450 3600 4500 3600\nWire Wire Line\n\t4450 3700 4500 3700\nWire Wire Line\n\t4450 3800 4500 3800\nWire Wire Line\n\t3450 2550 3700 2550\nWire Wire Line\n\t2300 3250 2650 3250\nWire Wire Line\n\t6000 2550 6000 2600\nWire Wire Line\n\t6650 2500 7100 2500\nWire Wire Line\n\t5900 1700 5900 2850\nConnection ~ 5900 2250\nWire Wire Line\n\t5750 1700 6650 1700\nConnection ~ 5900 1750\nWire Wire Line\n\t3750 1700 5050 1700\nWire Wire Line\n\t4800 1750 4800 1700\nConnection ~ 4800 1700\nConnection ~ 6000 2250\nWire Wire Line\n\t7100 2800 7100 2850\nWire Wire Line\n\t5350 3400 5300 3400\nWire Wire Line\n\t5900 2250 6000 2250\nWire Wire Line\n\t6450 3350 7200 3350\nConnection ~ 6650 3350\nWire Wire Line\n\t6650 2450 6650 2800\nConnection ~ 6900 2500\nWire Wire Line\n\t6900 2800 6900 2850\nConnection ~ 6650 2500\nWire Wire Line\n\t6650 1700 6650 2150\nConnection ~ 5900 1700\nWire Wire Line\n\t6950 3350 6950 3450\nConnection ~ 6950 3350\nWire Wire Line\n\t2000 6300 2550 6300\nWire Wire Line\n\t5300 3400 5300 3500\nWire Wire Line\n\t7700 3350 7500 3350\nWire Wire Line\n\t5050 3250 5350 3250\nWire Wire Line\n\t4750 3250 4450 3250\nWire Wire Line\n\t6650 3300 6650 3450\nWire Wire Line\n\t5300 3800 5300 3900\nConnection ~ 6100 1750\nWire Wire Line\n\t6100 1750 5900 1750\nWire Wire Line\n\t4450 1700 4450 1750\nWire Wire Line\n\t4200 1700 4200 1750\nConnection ~ 4450 1700\nConnection ~ 4200 1700\nWire Wire Line\n\t3950 1700 3950 1750\nConnection ~ 3950 1700\nWire Wire Line\n\t3000 7150 3000 7250\nWire Wire Line\n\t3000 7200 3600 7200\nWire Wire Line\n\t3100 7200 3100 7150\nConnection ~ 3000 7200\nWire Wire Line\n\t3200 7200 3200 7150\nConnection ~ 3100 7200\nWire Wire Line\n\t3300 7200 3300 7150\nConnection ~ 3200 7200\nWire Wire Line\n\t3400 7200 3400 7150\nConnection ~ 3300 7200\nWire Wire Line\n\t3500 7200 3500 7150\nConnection ~ 3400 7200\nWire Wire Line\n\t3400 5350 3200 5350\nWire Wire Line\n\t3200 5350 3200 5950\nWire Wire Line\n\t3200 5850 3300 5850\nWire Wire Line\n\t3300 5850 3300 5950\nConnection ~ 3200 5850\nWire Wire Line\n\t4150 7000 4150 7050\nWire Wire Line\n\t4150 6700 3950 6700\nWire Wire Line\n\t2550 6450 2400 6450\nWire Wire Line\n\t1200 6550 2550 6550\nWire Wire Line\n\t1450 6550 1450 6600\nWire Wire Line\n\t1450 6250 1450 6200\nWire Wire Line\n\t1450 6200 1200 6200\nWire Wire Line\n\t1200 6200 1200 6250\nConnection ~ 1450 6550\nWire Wire Line\n\t3950 6400 4650 6400\nWire Wire Line\n\t1450 6900 1200 6900\nWire Wire Line\n\t1200 6600 1200 6550\nWire Wire Line\n\t6550 4450 6250 4450\nWire Wire Line\n\t6250 4450 6250 5000\nWire Wire Line\n\t6950 3750 6950 3900\nWire Wire Line\n\t4950 5850 5250 5850\nWire Wire Line\n\t4950 5750 4950 5850\nWire Wire Line\n\t5250 6150 4950 6150\nWire Wire Line\n\t5250 6200 5250 6150\nWire Wire Line\n\t5250 5850 5250 5300\nWire Wire Line\n\t5250 5300 5850 5300\nWire Wire Line\n\t4950 5450 4650 5450\nWire Wire Line\n\t4650 5450 4650 6400\nWire Wire Line\n\t5850 5500 5850 6300\nWire Wire Line\n\t5850 6300 6850 6300\nWire Wire Line\n\t6850 6300 6850 5400\nText Label 4050 6300 0 60 ~ 0\nOUTP\nWire Wire Line\n\t3950 6300 4050 6300\n$Comp\nL C C255\nU 1 1 5867AFE9\nP 2000 6000\nF 0 \"C255\" H 2025 6100 50 0000 L CNN\nF 1 \"1n\" H 2025 5900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2038 5850 30 0001 C CNN\nF 3 \"\" H 2000 6000 60 0000 C CNN\n\t1 2000 6000\n\t-1 0 0 1 \n$EndComp\nWire Wire Line\n\t2000 6300 2000 6150\nWire Wire Line\n\t2000 5850 2000 5100\nWire Wire Line\n\t3600 7200 3600 7150\nConnection ~ 3500 7200\nWire Wire Line\n\t5700 3900 5700 4050\nWire Wire Line\n\t5700 4050 6100 4050\nWire Wire Line\n\t5800 3900 5800 4050\nConnection ~ 5800 4050\nWire Wire Line\n\t5900 4050 5900 3900\nWire Wire Line\n\t6000 4050 6000 3900\nConnection ~ 5900 4050\nWire Wire Line\n\t6100 4050 6100 3900\nConnection ~ 6000 4050\n$Comp\nL C C260\nU 1 1 586D6AD1\nP 6650 3600\nF 0 \"C260\" H 6675 3700 50 0000 L CNN\nF 1 \"DNP\" H 6675 3500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6688 3450 30 0001 C CNN\nF 3 \"\" H 6650 3600 60 0000 C CNN\n\t1 6650 3600\n\t-1 0 0 1 \n$EndComp\n$Comp\nL GND #PWR0260\nU 1 1 586D6B87\nP 6650 3750\nF 0 \"#PWR0260\" H 6650 3500 50 0001 C CNN\nF 1 \"GND\" H 6650 3600 50 0000 C CNN\nF 2 \"\" H 6650 3750 60 0000 C CNN\nF 3 \"\" H 6650 3750 60 0000 C CNN\n\t1 6650 3750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C270\nU 1 1 58860714\nP 7350 5550\nF 0 \"C270\" H 7375 5650 50 0000 L CNN\nF 1 \"1n\" H 7375 5450 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 7388 5400 30 0001 C CNN\nF 3 \"\" H 7350 5550 60 0000 C CNN\n\t1 7350 5550\n\t1 0 0 -1 \n$EndComp\nConnection ~ 7350 5400\n$Comp\nL GND #PWR0261\nU 1 1 5886094D\nP 7350 5700\nF 0 \"#PWR0261\" H 7350 5450 50 0001 C CNN\nF 1 \"GND\" H 7350 5550 50 0000 C CNN\nF 2 \"\" H 7350 5700 60 0000 C CNN\nF 3 \"\" H 7350 5700 60 0000 C CNN\n\t1 7350 5700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R122\nU 1 1 588609C7\nP 7050 5400\nF 0 \"R122\" V 7130 5400 50 0000 C CNN\nF 1 \"100\" V 7050 5400 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 6980 5400 30 0001 C CNN\nF 3 \"\" H 7050 5400 30 0000 C CNN\n\t1 7050 5400\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t6850 5400 6900 5400\nWire Wire Line\n\t7200 5400 7600 5400\n$EndSCHEMATC\n" }, { "path": "hw/usb.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 14 15\nTitle \"\"\nDate \"\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Comp\nL FT2232D U33\nU 1 1 583ABC0C\nP 5500 4050\nF 0 \"U33\" H 5500 4050 60 0000 C CNN\nF 1 \"FT2232D\" H 6300 5700 60 0000 C CNN\nF 2 \"Housings_QFP:LQFP-48_7x7mm_Pitch0.5mm\" H 3700 5150 60 0001 C CNN\nF 3 \"\" H 3700 5150 60 0001 C CNN\n\t1 5500 4050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R80\nU 1 1 583B312F\nP 3600 3000\nF 0 \"R80\" V 3680 3000 50 0000 C CNN\nF 1 \"27\" V 3600 3000 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3530 3000 30 0001 C CNN\nF 3 \"\" H 3600 3000 30 0000 C CNN\n\t1 3600 3000\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R81\nU 1 1 583B315C\nP 3600 3150\nF 0 \"R81\" V 3680 3150 50 0000 C CNN\nF 1 \"27\" V 3600 3150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3530 3150 30 0001 C CNN\nF 3 \"\" H 3600 3150 30 0000 C CNN\n\t1 3600 3150\n\t0 1 1 0 \n$EndComp\nText Label 3300 3150 2 60 ~ 0\nUSBDP\nText Label 3300 3000 2 60 ~ 0\nUSBDM\n$Comp\nL C C210\nU 1 1 583B35D4\nP 4000 2550\nF 0 \"C210\" H 4025 2650 50 0000 L CNN\nF 1 \"100n\" H 4025 2450 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4038 2400 30 0001 C CNN\nF 3 \"\" H 4000 2550 60 0000 C CNN\n\t1 4000 2550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0302\nU 1 1 583B35F7\nP 4000 2750\nF 0 \"#PWR0302\" H 4000 2500 50 0001 C CNN\nF 1 \"GND\" H 4000 2600 50 0000 C CNN\nF 2 \"\" H 4000 2750 60 0000 C CNN\nF 3 \"\" H 4000 2750 60 0000 C CNN\n\t1 4000 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0303\nU 1 1 583B4921\nP 5300 6000\nF 0 \"#PWR0303\" H 5300 5750 50 0001 C CNN\nF 1 \"GND\" H 5300 5850 50 0000 C CNN\nF 2 \"\" H 5300 6000 60 0000 C CNN\nF 3 \"\" H 5300 6000 60 0000 C CNN\n\t1 5300 6000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R83\nU 1 1 583B4D7B\nP 5700 1750\nF 0 \"R83\" V 5780 1750 50 0000 C CNN\nF 1 \"470\" V 5700 1750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 5630 1750 30 0001 C CNN\nF 3 \"\" H 5700 1750 30 0000 C CNN\n\t1 5700 1750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C214\nU 1 1 583B4E78\nP 6100 1500\nF 0 \"C214\" H 6125 1600 50 0000 L CNN\nF 1 \"100n\" H 6125 1400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6138 1350 30 0001 C CNN\nF 3 \"\" H 6100 1500 60 0000 C CNN\n\t1 6100 1500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C213\nU 1 1 583B4EEE\nP 6850 2150\nF 0 \"C213\" H 6875 2250 50 0000 L CNN\nF 1 \"100n\" H 6875 2050 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6888 2000 30 0001 C CNN\nF 3 \"\" H 6850 2150 60 0000 C CNN\n\t1 6850 2150\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0304\nU 1 1 583B50AC\nP 6850 2300\nF 0 \"#PWR0304\" H 6850 2050 50 0001 C CNN\nF 1 \"GND\" H 6850 2150 50 0000 C CNN\nF 2 \"\" H 6850 2300 60 0000 C CNN\nF 3 \"\" H 6850 2300 60 0000 C CNN\n\t1 6850 2300\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0305\nU 1 1 583B50D6\nP 6100 1650\nF 0 \"#PWR0305\" H 6100 1400 50 0001 C CNN\nF 1 \"GND\" H 6100 1500 50 0000 C CNN\nF 2 \"\" H 6100 1650 60 0000 C CNN\nF 3 \"\" H 6100 1650 60 0000 C CNN\n\t1 6100 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0306\nU 1 1 583B50F9\nP 6350 1650\nF 0 \"#PWR0306\" H 6350 1400 50 0001 C CNN\nF 1 \"GND\" H 6350 1500 50 0000 C CNN\nF 2 \"\" H 6350 1650 60 0000 C CNN\nF 3 \"\" H 6350 1650 60 0000 C CNN\n\t1 6350 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C215\nU 1 1 583B519D\nP 6350 1500\nF 0 \"C215\" H 6375 1600 50 0000 L CNN\nF 1 \"100n\" H 6375 1400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6388 1350 30 0001 C CNN\nF 3 \"\" H 6350 1500 60 0000 C CNN\n\t1 6350 1500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C212\nU 1 1 583B55E3\nP 5000 1600\nF 0 \"C212\" H 5025 1700 50 0000 L CNN\nF 1 \"100n\" H 5025 1500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 5038 1450 30 0001 C CNN\nF 3 \"\" H 5000 1600 60 0000 C CNN\n\t1 5000 1600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C211\nU 1 1 583B5665\nP 4700 1600\nF 0 \"C211\" H 4725 1700 50 0000 L CNN\nF 1 \"100n\" H 4725 1500 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 4738 1450 30 0001 C CNN\nF 3 \"\" H 4700 1600 60 0000 C CNN\n\t1 4700 1600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0307\nU 1 1 583B5768\nP 5000 1750\nF 0 \"#PWR0307\" H 5000 1500 50 0001 C CNN\nF 1 \"GND\" H 5000 1600 50 0000 C CNN\nF 2 \"\" H 5000 1750 60 0000 C CNN\nF 3 \"\" H 5000 1750 60 0000 C CNN\n\t1 5000 1750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0308\nU 1 1 583B5791\nP 4700 1750\nF 0 \"#PWR0308\" H 4700 1500 50 0001 C CNN\nF 1 \"GND\" H 4700 1600 50 0000 C CNN\nF 2 \"\" H 4700 1750 60 0000 C CNN\nF 3 \"\" H 4700 1750 60 0000 C CNN\n\t1 4700 1750\n\t1 0 0 -1 \n$EndComp\nText Label 4700 1400 0 60 ~ 0\n3V3D\nText Label 5600 1350 0 60 ~ 0\n5V\n$Comp\nL R R84\nU 1 1 583B5C84\nP 7200 2650\nF 0 \"R84\" V 7280 2650 50 0000 C CNN\nF 1 \"33\" V 7200 2650 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7130 2650 30 0001 C CNN\nF 3 \"\" H 7200 2650 30 0000 C CNN\n\t1 7200 2650\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R88\nU 1 1 583B5CC5\nP 7600 2750\nF 0 \"R88\" V 7680 2750 50 0000 C CNN\nF 1 \"33\" V 7600 2750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7530 2750 30 0001 C CNN\nF 3 \"\" H 7600 2750 30 0000 C CNN\n\t1 7600 2750\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R85\nU 1 1 583B63A8\nP 7200 2950\nF 0 \"R85\" V 7280 2950 50 0000 C CNN\nF 1 \"33\" V 7200 2950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 7130 2950 30 0001 C CNN\nF 3 \"\" H 7200 2950 30 0000 C CNN\n\t1 7200 2950\n\t0 1 1 0 \n$EndComp\nText HLabel 8000 2650 2 60 Output ~ 0\nTCK\nText HLabel 8000 2750 2 60 Output ~ 0\nTDI\nText HLabel 8000 2850 2 60 Input ~ 0\nTDO\nText HLabel 8000 2950 2 60 Output ~ 0\nTMS\nText HLabel 7350 4050 2 60 BiDi ~ 0\nD0\nText HLabel 7350 4150 2 60 BiDi ~ 0\nD1\nText HLabel 7350 4250 2 60 BiDi ~ 0\nD2\nText HLabel 7350 4350 2 60 BiDi ~ 0\nD3\nText HLabel 7350 4450 2 60 BiDi ~ 0\nD4\nText HLabel 7350 4550 2 60 BiDi ~ 0\nD5\nText HLabel 7350 4650 2 60 BiDi ~ 0\nD6\nText HLabel 7350 4750 2 60 BiDi ~ 0\nD7\nText HLabel 7350 4950 2 60 Output ~ 0\nRXF#\nText HLabel 7350 5050 2 60 Output ~ 0\nTXE#\nText HLabel 7350 5150 2 60 Input ~ 0\nRD#\nText HLabel 7350 5250 2 60 Input ~ 0\nWR\nText HLabel 7350 5350 2 60 Input ~ 0\nSI/WUB\nText Label 7050 3900 0 60 ~ 0\n3V3D\nNoConn ~ 6750 5500\n$Comp\nL R R82\nU 1 1 583B9233\nP 4200 3450\nF 0 \"R82\" V 4280 3450 50 0000 C CNN\nF 1 \"1k5\" V 4200 3450 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4130 3450 30 0001 C CNN\nF 3 \"\" H 4200 3450 30 0000 C CNN\n\t1 4200 3450\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R71\nU 1 1 583B978A\nP 2250 3350\nF 0 \"R71\" V 2330 3350 50 0000 C CNN\nF 1 \"4.7k\" V 2250 3350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2180 3350 30 0001 C CNN\nF 3 \"\" H 2250 3350 30 0000 C CNN\n\t1 2250 3350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R72\nU 1 1 583B97E7\nP 2250 3700\nF 0 \"R72\" V 2330 3700 50 0000 C CNN\nF 1 \"10k\" V 2250 3700 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2180 3700 30 0001 C CNN\nF 3 \"\" H 2250 3700 30 0000 C CNN\n\t1 2250 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0309\nU 1 1 583B9837\nP 2250 3900\nF 0 \"#PWR0309\" H 2250 3650 50 0001 C CNN\nF 1 \"GND\" H 2250 3750 50 0000 C CNN\nF 2 \"\" H 2250 3900 60 0000 C CNN\nF 3 \"\" H 2250 3900 60 0000 C CNN\n\t1 2250 3900\n\t1 0 0 -1 \n$EndComp\nText Label 2250 3100 0 60 ~ 0\nUSB_5V\n$Comp\nL GND #PWR0310\nU 1 1 583B9F13\nP 4200 5600\nF 0 \"#PWR0310\" H 4200 5350 50 0001 C CNN\nF 1 \"GND\" H 4200 5450 50 0000 C CNN\nF 2 \"\" H 4200 5600 60 0000 C CNN\nF 3 \"\" H 4200 5600 60 0000 C CNN\n\t1 4200 5600\n\t1 0 0 -1 \n$EndComp\n$Comp\nL USB-MICRO U31\nU 1 1 583BA416\nP 1300 1600\nF 0 \"U31\" H 1250 1650 60 0000 C CNN\nF 1 \"USB-MICRO\" H 1150 1900 60 0000 C CNN\nF 2 \"VNA:USB_MICRO\" H 1350 1350 60 0001 C CNN\nF 3 \"\" H 1350 1350 60 0000 C CNN\n\t1 1300 1600\n\t1 0 0 -1 \n$EndComp\nText Label 2100 1350 0 60 ~ 0\nUSB_5V\nText Label 2100 1450 0 60 ~ 0\nUSBDM\nText Label 2100 1550 0 60 ~ 0\nUSBDP\n$Comp\nL GND #PWR0311\nU 1 1 583BA75D\nP 2200 1900\nF 0 \"#PWR0311\" H 2200 1650 50 0001 C CNN\nF 1 \"GND\" H 2200 1750 50 0000 C CNN\nF 2 \"\" H 2200 1900 60 0000 C CNN\nF 3 \"\" H 2200 1900 60 0000 C CNN\n\t1 2200 1900\n\t1 0 0 -1 \n$EndComp\nNoConn ~ 1950 1850\nText HLabel 4550 1200 0 60 Input ~ 0\n3V3D\nText HLabel 4750 750 0 60 Input ~ 0\n5V_IN\n$Comp\nL XTAL_SMD4 Y1\nU 1 1 583C5AF8\nP 3350 4350\nF 0 \"Y1\" H 3350 4500 50 0000 C CNN\nF 1 \"ABMM-6.000MHZ\" V 3350 4900 50 0000 C CNN\nF 2 \"VNA:ABMM\" H 3350 4350 60 0001 C CNN\nF 3 \"\" H 3350 4350 60 0000 C CNN\n\t1 3350 4350\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C209\nU 1 1 583C5B9D\nP 3200 4650\nF 0 \"C209\" H 3225 4750 50 0000 L CNN\nF 1 \"33p\" H 3225 4550 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3238 4500 30 0001 C CNN\nF 3 \"\" H 3200 4650 60 0000 C CNN\n\t1 3200 4650\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C208\nU 1 1 583C5BF7\nP 3200 4000\nF 0 \"C208\" H 3225 4100 50 0000 L CNN\nF 1 \"33p\" H 3225 3900 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3238 3850 30 0001 C CNN\nF 3 \"\" H 3200 4000 60 0000 C CNN\n\t1 3200 4000\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t3750 3000 4350 3000\nWire Wire Line\n\t3750 3150 4350 3150\nWire Wire Line\n\t3300 3000 3450 3000\nWire Wire Line\n\t3450 3150 3300 3150\nWire Wire Line\n\t4000 2750 4000 2700\nWire Wire Line\n\t4350 2750 4350 2400\nWire Wire Line\n\t4350 2400 4000 2400\nWire Wire Line\n\t5300 5850 5300 6000\nWire Wire Line\n\t5300 5950 5700 5950\nWire Wire Line\n\t5400 5950 5400 5850\nConnection ~ 5300 5950\nWire Wire Line\n\t5500 5950 5500 5850\nConnection ~ 5400 5950\nWire Wire Line\n\t5600 5950 5600 5850\nConnection ~ 5500 5950\nWire Wire Line\n\t5700 5950 5700 5850\nConnection ~ 5600 5950\nWire Wire Line\n\t5700 1900 5700 2300\nWire Wire Line\n\t5600 750 5600 2300\nWire Wire Line\n\t5500 1600 5500 2300\nConnection ~ 5600 1600\nWire Wire Line\n\t5600 1350 6350 1350\nConnection ~ 6100 1350\nConnection ~ 5700 1600\nWire Wire Line\n\t5400 1450 5400 2300\nWire Wire Line\n\t4700 1450 5400 1450\nConnection ~ 5000 1450\nWire Wire Line\n\t5300 2300 5300 2250\nWire Wire Line\n\t5300 2250 5400 2250\nConnection ~ 5400 2250\nWire Wire Line\n\t4700 1200 4700 1450\nWire Wire Line\n\t7050 2650 6750 2650\nWire Wire Line\n\t6750 2750 7450 2750\nWire Wire Line\n\t6750 2850 8000 2850\nWire Wire Line\n\t7350 2650 8000 2650\nWire Wire Line\n\t7750 2750 8000 2750\nWire Wire Line\n\t6750 2950 7050 2950\nWire Wire Line\n\t7350 2950 8000 2950\nWire Wire Line\n\t6750 4050 7350 4050\nWire Wire Line\n\t6750 4150 7350 4150\nWire Wire Line\n\t6750 4250 7350 4250\nWire Wire Line\n\t6750 4350 7350 4350\nWire Wire Line\n\t6750 4450 7350 4450\nWire Wire Line\n\t6750 4550 7350 4550\nWire Wire Line\n\t6750 4650 7350 4650\nWire Wire Line\n\t6750 4750 7350 4750\nWire Wire Line\n\t6750 4950 7350 4950\nWire Wire Line\n\t6750 5050 7350 5050\nWire Wire Line\n\t6750 5150 7350 5150\nWire Wire Line\n\t6750 5250 7350 5250\nWire Wire Line\n\t6750 5350 7350 5350\nWire Wire Line\n\t6750 3900 7050 3900\nWire Wire Line\n\t4350 3600 4200 3600\nWire Wire Line\n\t4200 3300 4200 3150\nConnection ~ 4200 3150\nWire Wire Line\n\t2250 3850 2250 3900\nWire Wire Line\n\t2250 3550 2250 3500\nWire Wire Line\n\t2250 3200 2250 3100\nWire Wire Line\n\t4350 3700 2800 3700\nWire Wire Line\n\t2800 3700 2800 3550\nWire Wire Line\n\t2800 3550 2250 3550\nWire Wire Line\n\t4350 5250 4200 5250\nWire Wire Line\n\t4200 5250 4200 5600\nWire Wire Line\n\t2100 1350 1950 1350\nWire Wire Line\n\t2100 1450 1950 1450\nWire Wire Line\n\t2100 1550 1950 1550\nWire Wire Line\n\t1950 1750 2200 1750\nWire Wire Line\n\t2200 1750 2200 1900\nWire Wire Line\n\t4550 1200 4700 1200\nConnection ~ 5600 1350\nWire Wire Line\n\t3350 4000 3350 4200\nWire Wire Line\n\t3350 4500 3350 4650\nWire Wire Line\n\t4350 4150 3350 4150\nConnection ~ 3350 4150\nWire Wire Line\n\t3350 4550 4350 4550\nWire Wire Line\n\t4350 4550 4350 4500\nConnection ~ 3350 4550\n$Comp\nL GND #PWR0312\nU 1 1 583C6491\nP 2850 4000\nF 0 \"#PWR0312\" H 2850 3750 50 0001 C CNN\nF 1 \"GND\" H 2850 3850 50 0000 C CNN\nF 2 \"\" H 2850 4000 60 0000 C CNN\nF 3 \"\" H 2850 4000 60 0000 C CNN\n\t1 2850 4000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0313\nU 1 1 583C64DF\nP 2850 4650\nF 0 \"#PWR0313\" H 2850 4400 50 0001 C CNN\nF 1 \"GND\" H 2850 4500 50 0000 C CNN\nF 2 \"\" H 2850 4650 60 0000 C CNN\nF 3 \"\" H 2850 4650 60 0000 C CNN\n\t1 2850 4650\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2850 4650 3050 4650\nWire Wire Line\n\t2850 4000 3050 4000\n$Comp\nL 93LC46B U32\nU 1 1 583C7AB4\nP 2050 5850\nF 0 \"U32\" H 2200 5600 60 0000 C CNN\nF 1 \"93LC46B\" H 2100 6100 60 0000 C CNN\nF 2 \"VNA:SOT-23-6\" H 2150 5450 60 0001 C CNN\nF 3 \"\" H 2150 5450 60 0001 C CNN\n\t1 2050 5850\n\t1 0 0 -1 \n$EndComp\nText Label 2650 5850 0 60 ~ 0\nEECS\nText Label 2650 5950 0 60 ~ 0\nEESK\n$Comp\nL R R73\nU 1 1 583C7CCB\nP 3250 5350\nF 0 \"R73\" V 3330 5350 50 0000 C CNN\nF 1 \"10k\" V 3250 5350 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3180 5350 30 0001 C CNN\nF 3 \"\" H 3250 5350 30 0000 C CNN\n\t1 3250 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL R R79\nU 1 1 583C7D2C\nP 3250 5750\nF 0 \"R79\" V 3330 5750 50 0000 C CNN\nF 1 \"2k2\" V 3250 5750 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3180 5750 30 0001 C CNN\nF 3 \"\" H 3250 5750 30 0000 C CNN\n\t1 3250 5750\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3250 5500 3250 5600\nWire Wire Line\n\t2650 5850 2500 5850\nWire Wire Line\n\t2650 5950 2500 5950\nText Label 4200 4950 2 60 ~ 0\nEECS\nText Label 4200 5050 2 60 ~ 0\nEESK\nWire Wire Line\n\t4200 4950 4350 4950\nWire Wire Line\n\t4350 5050 4200 5050\nText Label 3350 5550 0 60 ~ 0\nDO\nText Label 3300 6050 0 60 ~ 0\nEEDATA\nText Label 1500 5750 2 60 ~ 0\nDO\nWire Wire Line\n\t1500 5950 1600 5950\nWire Wire Line\n\t1600 5750 1500 5750\nWire Wire Line\n\t1600 5850 1000 5850\nWire Wire Line\n\t1000 5850 1000 5950\n$Comp\nL GND #PWR0314\nU 1 1 583C8ACF\nP 1000 5950\nF 0 \"#PWR0314\" H 1000 5700 50 0001 C CNN\nF 1 \"GND\" H 1000 5800 50 0000 C CNN\nF 2 \"\" H 1000 5950 60 0000 C CNN\nF 3 \"\" H 1000 5950 60 0000 C CNN\n\t1 1000 5950\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2500 5200 2500 5750\nText Label 2500 5200 0 60 ~ 0\n5V\n$Comp\nL C C207\nU 1 1 583C8C2A\nP 2750 5350\nF 0 \"C207\" H 2775 5450 50 0000 L CNN\nF 1 \"100n\" H 2775 5250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2788 5200 30 0001 C CNN\nF 3 \"\" H 2750 5350 60 0000 C CNN\n\t1 2750 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR0315\nU 1 1 583C8C93\nP 2750 5500\nF 0 \"#PWR0315\" H 2750 5250 50 0001 C CNN\nF 1 \"GND\" H 2750 5350 50 0000 C CNN\nF 2 \"\" H 2750 5500 60 0000 C CNN\nF 3 \"\" H 2750 5500 60 0000 C CNN\n\t1 2750 5500\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2750 5200 2500 5200\nText Label 3250 5150 0 60 ~ 0\n5V\nWire Wire Line\n\t3250 5200 3250 5150\nText Label 4200 5150 2 60 ~ 0\nEEDATA\nWire Wire Line\n\t4200 5150 4350 5150\nWire Wire Line\n\t3250 5900 3250 6050\nWire Wire Line\n\t3250 6050 3300 6050\nText Label 1500 5950 2 60 ~ 0\nEEDATA\nWire Wire Line\n\t3350 5550 3250 5550\nConnection ~ 3250 5550\n$Comp\nL GND #PWR0316\nU 1 1 584E2D98\nP 3100 4300\nF 0 \"#PWR0316\" H 3100 4050 50 0001 C CNN\nF 1 \"GND\" H 3100 4150 50 0000 C CNN\nF 2 \"\" H 3100 4300 60 0000 C CNN\nF 3 \"\" H 3100 4300 60 0000 C CNN\n\t1 3100 4300\n\t0 1 1 0 \n$EndComp\n$Comp\nL GND #PWR0317\nU 1 1 584E2E6A\nP 3100 4400\nF 0 \"#PWR0317\" H 3100 4150 50 0001 C CNN\nF 1 \"GND\" H 3100 4250 50 0000 C CNN\nF 2 \"\" H 3100 4400 60 0000 C CNN\nF 3 \"\" H 3100 4400 60 0000 C CNN\n\t1 3100 4400\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t3100 4400 3200 4400\nWire Wire Line\n\t3200 4300 3100 4300\nWire Wire Line\n\t5500 1600 5700 1600\nWire Wire Line\n\t5700 1900 6850 1900\nWire Wire Line\n\t6850 1900 6850 2000\n$Comp\nL FILTER FB12\nU 1 1 5865C0D7\nP 5100 750\nF 0 \"FB12\" H 5100 900 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 5100 650 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 5100 750 60 0001 C CNN\nF 3 \"\" H 5100 750 60 0000 C CNN\n\t1 5100 750 \n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t5450 750 6000 750 \nNoConn ~ 6750 3050\nNoConn ~ 6750 3150\nNoConn ~ 6750 3250\nNoConn ~ 6750 3350\nNoConn ~ 6750 3500\nNoConn ~ 6750 3600\nNoConn ~ 6750 3700\nNoConn ~ 6750 3800\nNoConn ~ 1950 1650\nText Notes 4450 650 0 60 ~ 0\n30 mA\n$Comp\nL C C263\nU 1 1 5878E72E\nP 6000 900\nF 0 \"C263\" H 6025 1000 50 0000 L CNN\nF 1 \"DNP\" H 6025 800 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 6038 750 30 0001 C CNN\nF 3 \"\" H 6000 900 60 0000 C CNN\n\t1 6000 900 \n\t1 0 0 -1 \n$EndComp\nConnection ~ 5600 750 \n$Comp\nL GND #PWR0318\nU 1 1 5878E80F\nP 6000 1100\nF 0 \"#PWR0318\" H 6000 850 50 0001 C CNN\nF 1 \"GND\" H 6000 950 50 0000 C CNN\nF 2 \"\" H 6000 1100 60 0000 C CNN\nF 3 \"\" H 6000 1100 60 0000 C CNN\n\t1 6000 1100\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6000 1050 6000 1100\n$EndSCHEMATC\n" }, { "path": "hw/vna.pretty/1748LP18A075.kicad_mod", "content": "(module 1748LP18A075 (layer F.Cu) (tedit 569A8F32)\n (fp_text reference REF** (at 1.9 1.9) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value 1748LP18A075 (at 1.8 -1.9) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start 0.2 0.8) (end 0.2 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.2 -0.8) (end 3.4 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 -0.8) (end 3.4 0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 0.8) (end 0.2 0.8) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.15) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 3.6 0) (size 0.6 1.15) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.85 -0.7) (size 0.6 0.8) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.85 0.7) (size 0.6 0.8) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/3550LP14A300.kicad_mod", "content": "(module 3550LP14A300 (layer F.Cu) (tedit 56AC6C89)\n (fp_text reference REF** (at 0.5 2.4) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value 3550LP14A300 (at 0.1 -1.1) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start 0.4 1.6) (end 0.4 1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 1.3) (end 0 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 -0.3) (end 0.8 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.8 -0.3) (end 0.8 1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.8 1.3) (end 0 1.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 2 smd rect (at 0 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 3 smd rect (at 0 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 4 smd rect (at 0.8 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 5 smd rect (at 0.8 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 6 smd rect (at 0.8 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/5400BL15B050E.kicad_mod", "content": "(module 5400BL15B050E (layer F.Cu) (tedit 551F940E)\n (fp_text reference REF** (at 0 3.25) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value 5400BL15B050E (at 0.05 -4) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.4 -0.3) (end -0.4 -1.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.4 -1.6) (end 1.6 -1.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.6 -1.6) (end 1.6 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.6 -0.3) (end -0.4 -0.3) (layer F.SilkS) (width 0.15))\n (fp_circle (center -0.5 -0.9) (end -0.4 -1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.65 0) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.3 0) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.3 -1.8) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.65 -1.8) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0 -1.8) (size 0.35 1) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/5515LP15A730.kicad_mod", "content": "(module 5515LP15A730 (layer F.Cu) (tedit 56AC6C5D)\n (fp_text reference REF** (at 0.225 1.625) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value 5515LP15A730 (at 0.325 -1.65) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_circle (center 0.5 0) (end 0.55 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 0.65) (end -1 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -0.6) (end 1 0.65) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 0.65) (end -1 0.65) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0.65 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 2 smd rect (at 0 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 3 smd rect (at -0.65 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 5 smd rect (at -0.65 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 6 smd rect (at 0 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 7 smd rect (at 0.65 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 4 smd rect (at -1.12 0 90) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 8 smd rect (at 1.12 0 90) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/ABMM.kicad_mod", "content": "(module ABMM (layer F.Cu) (tedit 584D6D1A)\n (fp_text reference REF** (at 3.3 -1.3 90) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value ABMM (at 3.075 -4.625) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.4 -3.9) (end 6.8 -3.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 6.8 -3.9) (end 6.8 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 6.8 1.5) (end -0.4 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.4 1.5) (end -0.4 -3.9) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 6.3 0) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 6.3 -2.54) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0 -2.54) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/ASTRX-12.kicad_mod", "content": "(module ASTRX-12 (layer F.Cu) (tedit 569A81B5)\n (fp_text reference REF** (at 0.1 2) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value ASTRX-12 (at -0.1 -1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.5 1.3) (end -1.5 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 1.3) (end -0.7 1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.2 1) (end -1.2 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.2 -1) (end 1.3 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 -1) (end 1.3 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 1) (end -1.2 1) (layer F.SilkS) (width 0.15))\n (pad 6 smd rect (at -1 -0.7) (size 0.63 0.84) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at -1 0.69) (size 0.63 0.84) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.08 0.69) (size 0.63 0.84) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.08 -0.7) (size 0.63 0.84) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/CNC-3220-10-0300-00.kicad_mod", "content": "(module CNC-3220-10-0300-00 (layer F.Cu) (tedit 569BC5CA)\n (fp_text reference REF** (at 0.3 4.8) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value CNC-3220-10-0300-00 (at -1.1 -4.3) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.3 -0.9) (end -0.6 -0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.6 -0.9) (end -0.6 1) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.6 1) (end -1.3 1) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.4 -6.35) (end 2.7 -6.35) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.7 -6.35) (end 2.7 6.35) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.7 6.35) (end -2.4 6.35) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.4 6.35) (end -2.4 -6.35) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -2.4 -2.5) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 2.4 -2.5) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -2.4 -1.23) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 2.4 -1.23) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -2.4 0.04) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 2.4 0.04) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at -2.4 1.31) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 2.4 1.31) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at -2.4 2.58) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 2.4 2.58) (size 1.5 0.76) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/CONSMA003.062.kicad_mod", "content": "(module CONSMA003.062 (layer F.Cu) (tedit 587D0CE3)\n (fp_text reference CONSMA003.062 (at 0 7.62) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0 -7.62) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (pad 2 thru_hole circle (at -1.75 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 -2.1) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 smd rect (at 0 2.54) (size 4.06 1.52) (layers B.Cu B.Mask)\n (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54) (size 4.06 1.52) (layers B.Cu B.Mask)\n (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54) (size 4.06 1.52) (layers F.Cu F.Mask)\n (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54) (size 4.06 1.52) (layers F.Cu F.Mask)\n (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 1 smd rect (at 0 0) (size 4.06 1.52) (layers F.Cu F.Mask)\n (solder_mask_margin 0.5))\n)\n" }, { "path": "hw/vna.pretty/CTX520.kicad_mod", "content": "(module CTX520 (layer F.Cu) (tedit 5648C943)\n (fp_text reference REF** (at 0 1.95) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CTX520 (at -0.1 -1.65) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.125)))\n )\n (fp_line (start -1.3 1) (end -1.3 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.3 -1) (end 1.2 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.2 -1) (end 1.2 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.2 1) (end -1.3 1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.05 0.75) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.96 0.75) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.95 -0.7) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -1.05 -0.7) (size 0.8 0.9) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/C_0402b.kicad_mod", "content": "(module C_0402b (layer F.Cu) (tedit 55A40188)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (attr smd)\n (fp_text reference REF** (at 0 -1.7) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value C_0402 (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/C_0603b.kicad_mod", "content": "(module C_0603b (layer F.Cu) (tedit 55A401E5)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (attr smd)\n (fp_text reference REF** (at 0 -1.425) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value C_0603 (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/C_0805b.kicad_mod", "content": "(module C_0805b (layer F.Cu) (tedit 55A401FA)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (attr smd)\n (fp_text reference REF** (at 0 -1.675) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value C_0805 (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/DFN-8-1EP_2x2mm_Pitch0.5mm.kicad_mod", "content": "(module DFN-8-1EP_2x2mm_Pitch0.5mm (layer F.Cu) (tedit 56A1373B)\n (descr \"DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF)\")\n (tags \"DFN 0.5\")\n (attr smd)\n (fp_text reference REF** (at -0.05 -2.075) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value DFN-8-1EP_2x2mm_Pitch0.5mm (at -0.05 2.075) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -1.35) (end -1.45 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -1.35) (end 1.35 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.65 1.15) (end 0.65 1.15) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.225 -1.15) (end 0.65 -1.15) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.95 -0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.95 -0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -0.95 0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.95 0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.95 0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0.95 0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 0.95 -0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0.95 -0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 0 0.44) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0 -0.44) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/DFN-8.kicad_mod", "content": "(module DFN-8 (layer F.Cu) (tedit 584D633D)\n (descr \"DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF)\")\n (tags \"DFN 0.5\")\n (attr smd)\n (fp_text reference REF** (at -0.05 -2.075) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value DFN-8-1EP_2x2mm_Pitch0.5mm (at -0.05 2.075) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -1.35) (end -1.45 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -1.35) (end 1.35 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.65 1.15) (end 0.65 1.15) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.225 -1.15) (end 0.65 -1.15) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.95 -0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.95 -0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -0.95 0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.95 0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.95 0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0.95 0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 0.95 -0.25) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0.95 -0.75) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0.325) (size 0.9 0.65) (layers F.Cu F.Paste F.Mask)\n (solder_paste_margin_ratio -0.2))\n (pad EP smd rect (at 0 -0.325) (size 0.9 0.65) (layers F.Cu F.Paste F.Mask)\n (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/EJ508A.kicad_mod", "content": "(module EJ508A (layer F.Cu) (tedit 55787BCC)\n (fp_text reference REF** (at -4.4 3.5) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value EJ508A (at -0.7 -7.6) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -6.5 7.7) (end -6.5 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -6.5 4.9) (end -2.9 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.9 4.9) (end -2.9 7.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -9 -6.7) (end 0 -6.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 7.7) (end -9 7.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -9 7.7) (end -9 -6.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 -6.7) (end 0 7.7) (layer F.SilkS) (width 0.15))\n (pad 3 thru_hole circle (at 0 -3) (size 4.2 4.2) (drill 3.05) (layers *.Cu *.Mask F.SilkS))\n (pad 1 thru_hole circle (at -5.9 -6) (size 4.6 4.6) (drill 3.56) (layers *.Cu *.Mask F.SilkS))\n (pad 2 thru_hole circle (at -5.9 0) (size 4.2 4.2) (drill 3.05) (layers *.Cu *.Mask F.SilkS))\n)\n" }, { "path": "hw/vna.pretty/EVP-AWBA2A.kicad_mod", "content": "(module EVP-AWBA2A (layer F.Cu) (tedit 5582E39A)\n (fp_text reference REF** (at 1.5 2.1) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value EVP-AWBA2A (at 1 -1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.1 1) (end 0.1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.1 -1) (end 3.1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -1) (end 3.1 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 1) (end 0.1 1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.55 1.5) (layers F.Cu F.Mask))\n (pad 2 smd rect (at 3.25 0) (size 0.55 1.5) (layers F.Cu F.Mask))\n (pad 2 smd rect (at 3.25 -0.4) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 3.25 0.5) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at 0 -0.5) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at 0 0.5) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/FTG256.kicad_mod", "content": "(module FTG256 (layer F.Cu) (tedit 5851A998)\n (fp_text reference REF** (at 0 9.5) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value FTG256 (at 0 -9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -8.5 -8.5) (end 8.5 -8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.5 -8.5) (end 8.5 8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.5 8.5) (end -8.5 8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -8.5 8.5) (end -8.5 -8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -8.5 -8.5) (end -10 -10) (layer F.SilkS) (width 0.15))\n (pad A1 smd circle (at -7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B1 smd circle (at -7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C1 smd circle (at -7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D1 smd circle (at -7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E1 smd circle (at -7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F1 smd circle (at -7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G1 smd circle (at -7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H1 smd circle (at -7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J1 smd circle (at -7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K1 smd circle (at -7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L1 smd circle (at -7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M1 smd circle (at -7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N1 smd circle (at -7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P1 smd circle (at -7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R1 smd circle (at -7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T1 smd circle (at -7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A2 smd circle (at -6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B2 smd circle (at -6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C2 smd circle (at -6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D2 smd circle (at -6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E2 smd circle (at -6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F2 smd circle (at -6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G2 smd circle (at -6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H2 smd circle (at -6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J2 smd circle (at -6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K2 smd circle (at -6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L2 smd circle (at -6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M2 smd circle (at -6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N2 smd circle (at -6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P2 smd circle (at -6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R2 smd circle (at -6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T2 smd circle (at -6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A3 smd circle (at -5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B3 smd circle (at -5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C3 smd circle (at -5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D3 smd circle (at -5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E3 smd circle (at -5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F3 smd circle (at -5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G3 smd circle (at -5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H3 smd circle (at -5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J3 smd circle (at -5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K3 smd circle (at -5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L3 smd circle (at -5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M3 smd circle (at -5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N3 smd circle (at -5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P3 smd circle (at -5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R3 smd circle (at -5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T3 smd circle (at -5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A4 smd circle (at -4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B4 smd circle (at -4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C4 smd circle (at -4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D4 smd circle (at -4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E4 smd circle (at -4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F4 smd circle (at -4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G4 smd circle (at -4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H4 smd circle (at -4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J4 smd circle (at -4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K4 smd circle (at -4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L4 smd circle (at -4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M4 smd circle (at -4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N4 smd circle (at -4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P4 smd circle (at -4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R4 smd circle (at -4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T4 smd circle (at -4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A5 smd circle (at -3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B5 smd circle (at -3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C5 smd circle (at -3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D5 smd circle (at -3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E5 smd circle (at -3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F5 smd circle (at -3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G5 smd circle (at -3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H5 smd circle (at -3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J5 smd circle (at -3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K5 smd circle (at -3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L5 smd circle (at -3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M5 smd circle (at -3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N5 smd circle (at -3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P5 smd circle (at -3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R5 smd circle (at -3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T5 smd circle (at -3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A6 smd circle (at -2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B6 smd circle (at -2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C6 smd circle (at -2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D6 smd circle (at -2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E6 smd circle (at -2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F6 smd circle (at -2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G6 smd circle (at -2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H6 smd circle (at -2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J6 smd circle (at -2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K6 smd circle (at -2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L6 smd circle (at -2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M6 smd circle (at -2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N6 smd circle (at -2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P6 smd circle (at -2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R6 smd circle (at -2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T6 smd circle (at -2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A7 smd circle (at -1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B7 smd circle (at -1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C7 smd circle (at -1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D7 smd circle (at -1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E7 smd circle (at -1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F7 smd circle (at -1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G7 smd circle (at -1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H7 smd circle (at -1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J7 smd circle (at -1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K7 smd circle (at -1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L7 smd circle (at -1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M7 smd circle (at -1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N7 smd circle (at -1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P7 smd circle (at -1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R7 smd circle (at -1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T7 smd circle (at -1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A8 smd circle (at -0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B8 smd circle (at -0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C8 smd circle (at -0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D8 smd circle (at -0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E8 smd circle (at -0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F8 smd circle (at -0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G8 smd circle (at -0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H8 smd circle (at -0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J8 smd circle (at -0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K8 smd circle (at -0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L8 smd circle (at -0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M8 smd circle (at -0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N8 smd circle (at -0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P8 smd circle (at -0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R8 smd circle (at -0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T8 smd circle (at -0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A9 smd circle (at 0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B9 smd circle (at 0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C9 smd circle (at 0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D9 smd circle (at 0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E9 smd circle (at 0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F9 smd circle (at 0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G9 smd circle (at 0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H9 smd circle (at 0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J9 smd circle (at 0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K9 smd circle (at 0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L9 smd circle (at 0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M9 smd circle (at 0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N9 smd circle (at 0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P9 smd circle (at 0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R9 smd circle (at 0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T9 smd circle (at 0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A10 smd circle (at 1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B10 smd circle (at 1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C10 smd circle (at 1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D10 smd circle (at 1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E10 smd circle (at 1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F10 smd circle (at 1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G10 smd circle (at 1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H10 smd circle (at 1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J10 smd circle (at 1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K10 smd circle (at 1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L10 smd circle (at 1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M10 smd circle (at 1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N10 smd circle (at 1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P10 smd circle (at 1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R10 smd circle (at 1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T10 smd circle (at 1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A11 smd circle (at 2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B11 smd circle (at 2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C11 smd circle (at 2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D11 smd circle (at 2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E11 smd circle (at 2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F11 smd circle (at 2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G11 smd circle (at 2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H11 smd circle (at 2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J11 smd circle (at 2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K11 smd circle (at 2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L11 smd circle (at 2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M11 smd circle (at 2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N11 smd circle (at 2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P11 smd circle (at 2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R11 smd circle (at 2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T11 smd circle (at 2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A12 smd circle (at 3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B12 smd circle (at 3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C12 smd circle (at 3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D12 smd circle (at 3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E12 smd circle (at 3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F12 smd circle (at 3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G12 smd circle (at 3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H12 smd circle (at 3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J12 smd circle (at 3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K12 smd circle (at 3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L12 smd circle (at 3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M12 smd circle (at 3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N12 smd circle (at 3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P12 smd circle (at 3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R12 smd circle (at 3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T12 smd circle (at 3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A13 smd circle (at 4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B13 smd circle (at 4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C13 smd circle (at 4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D13 smd circle (at 4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E13 smd circle (at 4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F13 smd circle (at 4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G13 smd circle (at 4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H13 smd circle (at 4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J13 smd circle (at 4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K13 smd circle (at 4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L13 smd circle (at 4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M13 smd circle (at 4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N13 smd circle (at 4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P13 smd circle (at 4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R13 smd circle (at 4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T13 smd circle (at 4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A14 smd circle (at 5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B14 smd circle (at 5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C14 smd circle (at 5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D14 smd circle (at 5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E14 smd circle (at 5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F14 smd circle (at 5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G14 smd circle (at 5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H14 smd circle (at 5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J14 smd circle (at 5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K14 smd circle (at 5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L14 smd circle (at 5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M14 smd circle (at 5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N14 smd circle (at 5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P14 smd circle (at 5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R14 smd circle (at 5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T14 smd circle (at 5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A15 smd circle (at 6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B15 smd circle (at 6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C15 smd circle (at 6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D15 smd circle (at 6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E15 smd circle (at 6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F15 smd circle (at 6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G15 smd circle (at 6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H15 smd circle (at 6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J15 smd circle (at 6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K15 smd circle (at 6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L15 smd circle (at 6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M15 smd circle (at 6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N15 smd circle (at 6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P15 smd circle (at 6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R15 smd circle (at 6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T15 smd circle (at 6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A16 smd circle (at 7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B16 smd circle (at 7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C16 smd circle (at 7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad D16 smd circle (at 7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad E16 smd circle (at 7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad F16 smd circle (at 7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad G16 smd circle (at 7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad H16 smd circle (at 7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad J16 smd circle (at 7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad K16 smd circle (at 7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad L16 smd circle (at 7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad M16 smd circle (at 7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad N16 smd circle (at 7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad P16 smd circle (at 7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad R16 smd circle (at 7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad T16 smd circle (at 7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n)\n" }, { "path": "hw/vna.pretty/KT2520K.kicad_mod", "content": "(module KT2520K (layer F.Cu) (tedit 584D64F8)\n (fp_text reference REF** (at 0 2.35) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value KT2520K (at 0 -2.475) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.275 -1.025) (end 1.225 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.225 -1.025) (end 1.225 0.975) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.225 0.975) (end -1.275 0.975) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.275 0.975) (end -1.275 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.775 0.85) (end -1.775 1.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.775 1.45) (end -1.125 1.45) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.175 0.7) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.025 0.9) (size 0.7 0.43) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.125 0.7) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.125 -0.775) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -0.025 -0.975) (size 0.7 0.43) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -1.175 -0.775) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/LED_0603.kicad_mod", "content": "(module LED_0603 (layer F.Cu) (tedit 57404998)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (attr smd)\n (fp_text reference D4 (at -2.21 0.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value LED (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 -0.6) (end -0.25 0) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0) (end 0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/LP0603A0902.kicad_mod", "content": "(module LP0603A0902 (layer F.Cu) (tedit 56AC6C42)\n (fp_text reference U17 (at -0.048 1.284) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value LP0603A1880ANTR (at -0.6 -1.375) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.775 0.425) (end -0.775 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.775 -0.425) (end 0.825 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 -0.425) (end 0.825 0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 0.425) (end -0.775 0.425) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.6 0.35) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 2 smd rect (at 0.65 0.35) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 3 smd rect (at 0.65 -0.35) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 4 smd rect (at -0.6 -0.35) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/MLPD-10.kicad_mod", "content": "(module MLPD-10 (layer F.Cu) (tedit 56A3D053)\n (fp_text reference REF** (at 0.3 2.1) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value MLPD-10 (at 0.2 -2.1) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start -0.6 -1.7) (end -1.5 -1.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 1.5) (end -1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -1.5) (end 1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.5) (end 1 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 1.5) (end -1 1.5) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.875 -1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.875 -0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -0.875 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.875 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -0.875 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0.875 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 0.875 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0.875 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 0.875 -0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 0.875 -1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 0.76 2.4) (layers F.Cu F.Paste F.Mask))\n (pad EP thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.9) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.9) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/MSOP-8.kicad_mod", "content": "(module MSOP-8 (layer F.Cu) (tedit 53CEA007)\n (fp_text reference MSOP-8 (at -1.95 -2.6 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 3.9 -2.6 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center -0.1 -1.3) (end 0.1 -1.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end -0.5 -3.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -3.85) (end 2.5 -3.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.5 -3.85) (end 2.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.65 0) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.3 0) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.95 0) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 1.95 -4.66) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 1.3 -4.66) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 0.65 -4.66) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0 -4.66) (size 0.45 1.1) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/MountingHole_3.2mm_M3_Pad_Via_mod.kicad_mod", "content": "(module MountingHole_3.2mm_M3_Pad_Via_mod (layer F.Cu) (tedit 586E9C4D)\n (descr \"Mounting Hole 3.2mm, M3\")\n (tags \"mounting hole 3.2mm m3\")\n (fp_text reference P17 (at 0 -4.2) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value CONN_01X01 (at 0 4.2) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))\n (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))\n (pad 1 thru_hole circle (at 1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at 0 -2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at -2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at 0 2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at 2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/PAT1220.kicad_mod", "content": "(module PAT1220 (layer F.Cu) (tedit 53D14AD8)\n (fp_text reference U7 (at 0.75 -1.75) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value PAT1220-6dB (at 0.5 3) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0) (end -0.25 1.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 1.25) (end 1.75 1.25) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.75 1.25) (end 1.75 0) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.75 0) (end -0.25 0) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.8 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 1.5 0) (size 0.8 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.75 1.2) (size 2.3 0.7) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/RF_via.kicad_mod", "content": "(module RF_via (layer F.Cu) (tedit 5883112F)\n (fp_text reference REF** (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value RF_via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/R_0402b.kicad_mod", "content": "(module R_0402b (layer F.Cu) (tedit 55A401B2)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (attr smd)\n (fp_text reference REF** (at 0 -1.4) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value R_0402 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/R_0603b.kicad_mod", "content": "(module R_0603b (layer F.Cu) (tedit 584D7538)\n (descr \"Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0603\")\n (attr smd)\n (fp_text reference REF** (at 0 -1.4) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value R_0603 (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 -0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 -0.8) (end -1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 -0.8) (end 1.3 -0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))\n (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask))\n (model Resistors_SMD.3dshapes/R_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/S2711-46R.kicad_mod", "content": "(module S2711-46R (layer F.Cu) (tedit 586FF10A)\n (fp_text reference REF** (at 0 2) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value S2711-46R (at 0.1 0) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0) (size 9.4 2.3) (layers F.Cu F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SC-70-6.kicad_mod", "content": "(module SC-70-6 (layer F.Cu) (tedit 53F4DBEF)\n (fp_text reference U12 (at -0.1 -3.65) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MCP4017 (at 0.4 3.9) (layer F.SilkS) hide\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.1 0.05) (end 0.1 1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.1 1.3) (end 2.1 1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.1 1.3) (end 2.1 0.05) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.1 0.05) (end 0.1 0.05) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.45 -0.55) (end -0.75 -0.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.75 -0.55) (end -0.75 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.1 1.45) (end 1.1 -0.1) (layer F.SilkS) (width 0.5))\n (pad 1 smd rect (at 0 0) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0 0.65) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0 1.3) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 2.2 1.3) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 2.2 0.65) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 2.2 0) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SG-210STF.kicad_mod", "content": "(module SG-210STF (layer F.Cu) (tedit 551F92FA)\n (fp_text reference REF** (at 0.1 -2) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SG-210STF (at 0.25 2.05) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.2 1.35) (end -1.65 1.35) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.65 1.35) (end -1.65 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.3 1) (end -1.3 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.3 -1) (end 1.2 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.2 -1) (end 1.2 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.2 1) (end -1.3 1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.9 0.65) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.8 0.65) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.8 -0.65) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.9 -0.65) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SOD-123F.kicad_mod", "content": "(module SOD-123F (layer F.Cu) (tedit 569A86EC)\n (fp_text reference REF** (at 0.1 1.8) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value SOD-123F (at -0.3 -2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -0.1) (end 0.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -1.1) (end -0.8 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.1) (end -1.6 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.9) (end 1.4 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.9) (end 1.4 -1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -1.1) (end -1.6 -1.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 -0.1) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 1.36 -0.1) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SOT-23-5.kicad_mod", "content": "(module SOT-23-5 (layer F.Cu) (tedit 55AA3491)\n (fp_text reference SOT-23-5 (at 0 1.325) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0 -4.05) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.9 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SOT-23-5L.kicad_mod", "content": "(module SOT-23-5L (layer F.Cu) (tedit 55840FD3)\n (fp_text reference REF** (at 1.1 1.4) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SOT-23-5L (at 0.7 -3.6) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 -0.4) (end -0.5 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -2) (end 2.5 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.5 -2) (end 2.5 -0.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.5 -0.4) (end -0.5 -0.4) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.9 -2.3) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.3) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SOT-23-6.kicad_mod", "content": "(module SOT-23-6 (layer F.Cu) (tedit 53F4C8CF)\n (fp_text reference SOT23_6 (at 1.99898 0 90) (layer F.SilkS)\n (effects (font (size 0.762 0.762) (thickness 0.0762)))\n )\n (fp_text value VAL (at 0.0635 0) (layer F.SilkS)\n (effects (font (size 0.50038 0.50038) (thickness 0.0762)))\n )\n (fp_circle (center -1.1 0.5) (end -1 0.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 0.9) (end -1.5 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -0.8) (end 1.5 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -0.8) (end 1.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 0.9) (end -1.5 0.9) (layer F.SilkS) (width 0.15))\n (pad 6 smd rect (at -0.9525 -1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0.9525 -1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.9525 1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0 1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at -0.9525 1.27) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask))\n (model smd/SOT23_6.wrl\n (at (xyz 0 0 0))\n (scale (xyz 0.11 0.11 0.11))\n (rotate (xyz 0 0 0))\n )\n)\n" }, { "path": "hw/vna.pretty/SOT-416.kicad_mod", "content": "(module SOT-416 (layer F.Cu) (tedit 559825CE)\n (fp_text reference REF** (at 0.05 1.15) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SOT-416 (at -0.05 -1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.4 0.05) (end -0.4 -0.95) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.4 -0.95) (end 1.3 -0.95) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 -0.95) (end 1.3 0.05) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 0.05) (end -0.4 0.05) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.46 0.65) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 1 0) (size 0.46 0.65) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.5 -1.05) (size 0.46 0.65) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SRN4018.kicad_mod", "content": "(module SRN4018 (layer F.Cu) (tedit 5585889F)\n (fp_text reference REF** (at 1.7 2.8) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SRN4018 (at 1.5 -2.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 2.1) (end -0.5 -1.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -1.9) (end 3.5 -1.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.5 -1.9) (end 3.5 2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.5 2.1) (end -0.5 2.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 1.5 3.6) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 3.05 0) (size 1.5 3.6) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SRR6040A.kicad_mod", "content": "(module SRR6040A (layer F.Cu) (tedit 566C267B)\n (fp_text reference REF** (at -0.25 4.6) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SRR6040A (at -0.25 -4.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 3.3) (end -3.6 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -3.4) (end 3.1 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -3.4) (end 3.1 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 3.3) (end -3.6 3.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.25 -2.9) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.25 2.9) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at -3.575 -1.7) (size 0.65 1) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at 3.075 -1.7) (size 0.65 1) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -3.575 1.7) (size 0.65 1) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 3.075 1.7) (size 0.65 1) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SSOP-16.kicad_mod", "content": "(module SSOP-16 (layer F.Cu) (tedit 53F4C63A)\n (fp_text reference SSOP-16 (at 1.905 -6.985) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 2.54 1.905) (layer F.SilkS) hide\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center 0.3 -1.2) (end 0.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.2 -0.7) (end -0.2 -4.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.2 -4.6) (end 4.7 -4.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 4.7 -4.6) (end 4.7 -0.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 4.7 -0.7) (end -0.2 -0.7) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.635 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.27 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.905 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 2.54 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 3.175 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 3.81 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 4.445 0) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 4.445 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 3.81 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd rect (at 3.175 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd rect (at 2.54 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd rect (at 1.905 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd rect (at 1.27 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd rect (at 0.635 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd rect (at 0 -5.334) (size 0.4191 1.143) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/SSOT-6.kicad_mod", "content": "(module SSOT-6 (layer F.Cu) (tedit 559D5666)\n (fp_text reference REF** (at -0.4 2.4) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SSOT-6 (at -0.7 -2.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center -1.3 0.4) (end -1.1 0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.7) (end -1.6 -0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -0.9) (end 1.4 -0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -0.9) (end 1.4 0.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.7) (end -1.6 0.7) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.1 1.2) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.15 1.2) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.8 1.2) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0.8 -1.39) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -0.15 -1.39) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -1.1 -1.39) (size 0.69 0.99) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/TCM1-63AX+.kicad_mod", "content": "(module TCM1-63AX+ (layer F.Cu) (tedit 584AEBBE)\n (fp_text reference REF** (at 0 3.6) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TCM1-63AX+ (at 0 -3.6) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.9 -2.1) (end 1.9 -2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.9 -2.1) (end 1.9 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.9 2) (end -1.9 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.9 2) (end -1.9 -2.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.2827 -1.5875) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.0127 -1.5875) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.2573 -1.5875) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.2573 1.5925) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -0.0127 1.5925) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -1.2827 1.5925) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/TFBGA-100.kicad_mod", "content": "(module TFBGA-100 (layer F.Cu) (tedit 5533863A)\n (fp_text reference REF** (at 4.2 9.4) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TFBGA-100 (at 3.6 -2.3) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.2 -1.2) (end -1.7 -1.8) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.2 8.4) (end -1.2 -1.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.2 -1.2) (end 8.4 -1.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.4 -1.2) (end 8.4 8.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.4 8.4) (end -1.2 8.4) (layer F.SilkS) (width 0.15))\n (pad A1 smd circle (at 0 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B1 smd circle (at 0 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C1 smd circle (at 0 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D1 smd circle (at 0 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E1 smd circle (at 0 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F1 smd circle (at 0 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G1 smd circle (at 0 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H1 smd circle (at 0 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J1 smd circle (at 0 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K1 smd circle (at 0 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A2 smd circle (at 0.8 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B2 smd circle (at 0.8 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C2 smd circle (at 0.8 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D2 smd circle (at 0.8 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E2 smd circle (at 0.8 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F2 smd circle (at 0.8 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G2 smd circle (at 0.8 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H2 smd circle (at 0.8 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J2 smd circle (at 0.8 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K2 smd circle (at 0.8 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A3 smd circle (at 1.6 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B3 smd circle (at 1.6 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C3 smd circle (at 1.6 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D3 smd circle (at 1.6 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E3 smd circle (at 1.6 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F3 smd circle (at 1.6 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G3 smd circle (at 1.6 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H3 smd circle (at 1.6 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J3 smd circle (at 1.6 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K3 smd circle (at 1.6 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A4 smd circle (at 2.4 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B4 smd circle (at 2.4 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C4 smd circle (at 2.4 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D4 smd circle (at 2.4 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E4 smd circle (at 2.4 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F4 smd circle (at 2.4 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G4 smd circle (at 2.4 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H4 smd circle (at 2.4 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J4 smd circle (at 2.4 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K4 smd circle (at 2.4 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A5 smd circle (at 3.2 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B5 smd circle (at 3.2 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C5 smd circle (at 3.2 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D5 smd circle (at 3.2 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E5 smd circle (at 3.2 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F5 smd circle (at 3.2 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G5 smd circle (at 3.2 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H5 smd circle (at 3.2 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J5 smd circle (at 3.2 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K5 smd circle (at 3.2 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A6 smd circle (at 4 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B6 smd circle (at 4 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C6 smd circle (at 4 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D6 smd circle (at 4 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E6 smd circle (at 4 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F6 smd circle (at 4 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G6 smd circle (at 4 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H6 smd circle (at 4 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J6 smd circle (at 4 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K6 smd circle (at 4 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A7 smd circle (at 4.8 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B7 smd circle (at 4.8 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C7 smd circle (at 4.8 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D7 smd circle (at 4.8 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E7 smd circle (at 4.8 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F7 smd circle (at 4.8 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G7 smd circle (at 4.8 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H7 smd circle (at 4.8 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J7 smd circle (at 4.8 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K7 smd circle (at 4.8 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A8 smd circle (at 5.6 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B8 smd circle (at 5.6 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C8 smd circle (at 5.6 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D8 smd circle (at 5.6 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E8 smd circle (at 5.6 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F8 smd circle (at 5.6 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G8 smd circle (at 5.6 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H8 smd circle (at 5.6 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J8 smd circle (at 5.6 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K8 smd circle (at 5.6 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A9 smd circle (at 6.4 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B9 smd circle (at 6.4 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C9 smd circle (at 6.4 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D9 smd circle (at 6.4 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E9 smd circle (at 6.4 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F9 smd circle (at 6.4 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G9 smd circle (at 6.4 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H9 smd circle (at 6.4 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J9 smd circle (at 6.4 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K9 smd circle (at 6.4 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad A10 smd circle (at 7.2 0) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad B10 smd circle (at 7.2 0.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad C10 smd circle (at 7.2 1.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad D10 smd circle (at 7.2 2.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad E10 smd circle (at 7.2 3.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad F10 smd circle (at 7.2 4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad G10 smd circle (at 7.2 4.8) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad H10 smd circle (at 7.2 5.6) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad J10 smd circle (at 7.2 6.4) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n (pad K10 smd circle (at 7.2 7.2) (size 0.33 0.33) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.075) (solder_paste_margin 0.035))\n)\n" }, { "path": "hw/vna.pretty/TFLGA-20.kicad_mod", "content": "(module TFLGA-20 (layer F.Cu) (tedit 587D08AF)\n (solder_mask_margin 0.1)\n (fp_text reference REF** (at 0 3.125) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value TFLGA-20 (at 0 -3.75) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.8 -1) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -1.8 -0.5) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -1.8 0) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -1.8 0.5) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -1.8 1) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -1 1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at -0.5 1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0 1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 0.5 1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 1 1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd rect (at 1.8 1) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd rect (at 1.8 0.5) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd rect (at 1.8 0) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd rect (at 1.8 -0.5) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd rect (at 1.8 -1) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd rect (at 1 -1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 17 smd rect (at 0.5 -1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 18 smd rect (at 0 -1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 19 smd rect (at -0.5 -1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad 20 smd rect (at -1 -1.8 90) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0 90) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2))\n (pad EP thru_hole circle (at -0.7 -0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0.7 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/TP_1.00.kicad_mod", "content": "(module TP_1.00 (layer F.Cu) (tedit 55A404EB)\n (fp_text reference REF** (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value TP_1.00 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/TQFN-32.kicad_mod", "content": "(module TQFN-32 (layer F.Cu) (tedit 587D0F5C)\n (fp_text reference REF** (at 0.115 3.55) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.125)))\n )\n (fp_text value TQFN-32 (at -0.085 -3.55) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start -2.185 -2.85) (end -2.785 -2.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.785 -2.85) (end -2.785 -2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 2.45) (end -2.485 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 -2.55) (end 2.515 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 -2.55) (end 2.515 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 2.45) (end -2.485 2.45) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -2.415 -1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -2.415 -1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -2.415 -0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -2.415 -0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -2.415 0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -2.415 0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at -2.415 1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at -2.415 1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 17 smd rect (at 2.415 1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 18 smd rect (at 2.415 1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 19 smd rect (at 2.415 0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 20 smd rect (at 2.415 0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 21 smd rect (at 2.415 -0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 22 smd rect (at 2.415 -0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 23 smd rect (at 2.415 -1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 24 smd rect (at 2.415 -1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at -1.75 2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 3.15 3.15) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at -1.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd rect (at -0.75 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd rect (at -0.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd rect (at 0.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd rect (at 0.75 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd rect (at 1.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd rect (at 1.75 2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 25 smd rect (at 1.75 -2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 26 smd rect (at 1.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 27 smd rect (at 0.75 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 28 smd rect (at 0.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 29 smd rect (at -0.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 30 smd rect (at -0.75 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 31 smd rect (at -1.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 32 smd rect (at -1.75 -2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask))\n (pad EP thru_hole circle (at 0 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/TSOT-23.kicad_mod", "content": "(module TSOT-23 (layer F.Cu) (tedit 53F4D02D)\n (fp_text reference TSOT-23 (at 0 -4.699) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0.0635 3.302) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -1) (end -0.8 -0.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.8 -0.2) (end -0.5 -0.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.6) (end -0.5 -2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -2.1) (end 2.4 -2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.4 -2.1) (end 2.4 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.4 -0.6) (end -0.5 -0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0.95 0) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.9 0) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.9 -2.62) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.95 -2.62) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0 -2.62) (size 0.62 1.22) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/USB_MICRO.kicad_mod", "content": "(module USB_MICRO (layer F.Cu) (tedit 53F64203)\n (fp_text reference U13 (at 0.1 -1.9) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value USB-MICRO (at 0.1 7.3) (layer F.SilkS) hide\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 4.9) (end -3.6 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -0.1) (end 3.4 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 -0.1) (end 3.4 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 4.9) (end -3.6 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -4.95 4.125) (end 4.75 4.125) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.3 0) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 1.3 0) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0 0) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.65 0) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0.65 0) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at -3.1 0.12) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at 3.1 0.12) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask))\n (pad SH smd rect (at 3.8 2.675) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at -3.8 2.675) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at 1.2 2.675) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at -1.2 2.675) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/VFQFN-16.kicad_mod", "content": "(module VFQFN-16 (layer F.Cu) (tedit 584D6891)\n (fp_text reference REF** (at 0 2.7) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value VFQFN-16 (at 0 -3.3) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.5 -1.5) (end 1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -1.5) (end -1.9 -1.9) (layer F.SilkS) (width 0.15))\n (pad 1 smd oval (at -1.35 -0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd oval (at -1.35 -0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd oval (at -1.35 0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd oval (at -1.35 0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd oval (at -0.75 1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd oval (at 1.35 -0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd oval (at 1.35 -0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd oval (at 1.35 0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd oval (at 1.35 0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd oval (at -0.25 1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd oval (at 0.25 1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd oval (at 0.75 1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd oval (at 0.75 -1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd oval (at 0.25 -1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd oval (at -0.25 -1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd oval (at -0.75 -1.35) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 1.6 1.6) (layers F.Cu F.Mask))\n (pad EP thru_hole circle (at -0.4 -0.4) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 -0.4) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.4 0.4) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 0.4) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (zone_connect 2))\n (pad EP smd rect (at 0 0) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0 90) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/VFQFN-24.kicad_mod", "content": "(module VFQFN-24 (layer F.Cu) (tedit 55A67B47)\n (fp_text reference U2 (at 0.095 5.025 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value HMC431LP4 (at 0 -5) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2.25 1.75) (end -2.25 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.25 2.25) (end -1.75 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (pad 1 smd oval (at -1.25 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd oval (at -0.75 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd oval (at -0.25 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd oval (at 0.25 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd oval (at 0.75 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd oval (at 1.25 1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd oval (at 1.25 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd oval (at 0.75 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd oval (at 0.25 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd oval (at -0.25 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 17 smd oval (at -0.75 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 18 smd oval (at -1.25 -1.8) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 19 smd oval (at -1.8 -1.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 20 smd oval (at -1.8 -0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 21 smd oval (at -1.8 -0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 22 smd oval (at -1.8 0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 23 smd oval (at -1.8 0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd oval (at 1.8 1.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd oval (at 1.8 0.76 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd oval (at 1.8 0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd oval (at 1.8 -0.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd oval (at 1.8 -0.75 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd oval (at 1.8 -1.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 24 smd oval (at -1.8 1.25 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask))\n (pad PAD smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Paste F.Mask))\n (pad PAD thru_hole circle (at 0 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at 0 -0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at 0 0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 -0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 -0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 0.65) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/VFQFN-32.kicad_mod", "content": "(module VFQFN-32 (layer F.Cu) (tedit 56489F4B)\n (fp_text reference REF** (at 0.115 3.55) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.125)))\n )\n (fp_text value VFQFN-32 (at -0.085 -3.55) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start -2.185 -2.85) (end -2.785 -2.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.785 -2.85) (end -2.785 -2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 2.45) (end -2.485 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 -2.55) (end 2.515 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 -2.55) (end 2.515 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 2.45) (end -2.485 2.45) (layer F.SilkS) (width 0.15))\n (pad 1 smd oval (at -2.315 -1.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd oval (at -2.315 -1.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd oval (at -2.315 -0.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd oval (at -2.315 -0.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd oval (at -2.315 0.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd oval (at -2.315 0.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd oval (at -2.315 1.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd oval (at -2.315 1.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 17 smd oval (at 2.315 1.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 18 smd oval (at 2.315 1.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 19 smd oval (at 2.315 0.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 20 smd oval (at 2.315 0.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 21 smd oval (at 2.315 -0.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 22 smd oval (at 2.315 -0.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 23 smd oval (at 2.315 -1.25) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 24 smd oval (at 2.315 -1.75) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd oval (at -1.75 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 3.08 3.08) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd oval (at -1.25 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd oval (at -0.75 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd oval (at -0.25 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd oval (at 0.25 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd oval (at 0.75 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd oval (at 1.25 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd oval (at 1.75 2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 25 smd oval (at 1.75 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 26 smd oval (at 1.25 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 27 smd oval (at 0.75 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 28 smd oval (at 0.25 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 29 smd oval (at -0.25 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 30 smd oval (at -0.75 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad 31 smd oval (at -1.25 -2.315 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask))\n (pad 32 smd oval (at -1.75 -2.315 90) (size 0.8 0.34) (layers F.Cu F.Paste F.Mask))\n (pad EP thru_hole circle (at 0 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/VQFN-16.kicad_mod", "content": "(module VQFN-16 (layer F.Cu) (tedit 564A388D)\n (fp_text reference VQFN-16 (at 0 -3.3) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0 3.25) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.25 -1.75) (end -1.75 -1.75) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.75 -1.75) (end -1.75 -1.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -1.5) (end 1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -1.5) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.35 -0.75 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -1.35 -0.25 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -1.35 0.25 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -1.35 0.75 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at -0.75 1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -0.25 1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 0.25 1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 0.75 1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 1.35 0.75 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 1.35 0.25 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd rect (at 1.35 -0.25 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd rect (at 1.35 -0.75 90) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd rect (at 0.75 -1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd rect (at 0.25 -1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd rect (at -0.25 -1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd rect (at -0.75 -1.35) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 1.8 1.8) (layers F.Cu F.Paste F.Mask))\n (pad EP thru_hole circle (at -0.45 -0.45) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.45 0.45) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.45 -0.45) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.45 0.45) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/VQFN-24.kicad_mod", "content": "(module VQFN-24 (layer F.Cu) (tedit 5648A4F4)\n (fp_text reference VQFN-24 (at 0 -3.3) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0 3.25) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2.25 1.75) (end -2.25 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.25 2.25) (end -1.75 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.25 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.75 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at -0.25 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0.25 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.75 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 1.25 1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 13 smd rect (at 1.25 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 14 smd rect (at 0.75 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 15 smd rect (at 0.25 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 16 smd rect (at -0.25 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 17 smd rect (at -0.75 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 18 smd rect (at -1.25 -1.9) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 19 smd rect (at -1.9 -1.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 20 smd rect (at -1.9 -0.75 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 21 smd rect (at -1.9 -0.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 22 smd rect (at -1.9 0.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 23 smd rect (at -1.9 0.75 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at 1.9 1.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at 1.9 0.76 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 9 smd rect (at 1.9 0.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 10 smd rect (at 1.9 -0.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 11 smd rect (at 1.9 -0.75 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 12 smd rect (at 1.9 -1.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad 24 smd rect (at -1.9 1.25 90) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask))\n (pad EP smd rect (at 0 0) (size 2.7 2.7) (layers F.Cu F.Paste F.Mask))\n (pad EP thru_hole circle (at 0 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.5 -0.5) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.5 -0.5) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 0) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -0.5 0.5) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0.5 0.5) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at -1 1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 0 1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n (pad EP thru_hole circle (at 1 1) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/WFBGA-6.kicad_mod", "content": "(module WFBGA-6 (layer F.Cu) (tedit 56AC6684)\n (fp_text reference REF** (at 0 1.35) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value WFBGA-6 (at 0 -1.65) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.85 -0.85) (end -0.25 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.45 -0.65) (end 0.45 -0.65) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.45 -0.65) (end 0.45 0.65) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.45 0.65) (end -0.45 0.65) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.45 0.65) (end -0.45 -0.65) (layer F.SilkS) (width 0.15))\n (pad A1 smd circle (at -0.2 -0.4) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad A2 smd circle (at 0.2 -0.4) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B1 smd circle (at -0.2 0) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad B2 smd circle (at 0.2 0) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C1 smd circle (at -0.2 0.4) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n (pad C2 smd circle (at 0.2 0.4) (size 0.22 0.22) (layers F.Cu F.Paste F.Mask)\n (solder_mask_margin 0.05))\n)\n" }, { "path": "hw/vna.pretty/WFDFN-8.kicad_mod", "content": "(module WFDFN-8 (layer F.Cu) (tedit 55A927D3)\n (fp_text reference REF** (at 0.025 1.775) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value WFDFN-8 (at 0.075 -1.875) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1 1) (end -1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -1) (end 1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1) (end 1 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 1) (end -1 1) (layer F.SilkS) (width 0.15))\n (pad 9 smd rect (at 0 0) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at -0.75 0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at -0.25 0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0.25 0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 0.75 0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0.75 -0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 0.25 -0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 7 smd rect (at -0.25 -0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (pad 8 smd rect (at -0.75 -0.95) (size 0.25 0.5) (layers F.Cu F.Paste F.Mask))\n (model Housings_DFN_QFN.3dshapes/DFN-6-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 90))\n )\n)\n" }, { "path": "hw/vna.pretty/XDFN-2.kicad_mod", "content": "(module XDFN-2 (layer F.Cu) (tedit 55A40369)\n (fp_text reference REF** (at 0.475 1) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value XDFN-2 (at 0 -1.2) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.2 0.4) (end -0.2 -0.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.2 -0.4) (end 1.4 -0.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -0.4) (end 1.4 0.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.4) (end -0.2 0.4) (layer F.SilkS) (width 0.15))\n (pad 2 smd rect (at 0 0) (size 0.385 0.69) (layers F.Cu F.Paste F.Mask))\n (pad 1 smd rect (at 0.912 0) (size 1.035 0.69) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/XFDFN-6.kicad_mod", "content": "(module XFDFN-6 (layer F.Cu) (tedit 551FA82D)\n (fp_text reference XFDFN-6 (at -0.1 -5.4) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value VAL** (at 0 5) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.075 -0.5) (end -0.3 -0.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.3 -0.5) (end -0.3 -0.275) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.025 1.25) (end -0.025 -0.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.025 -0.25) (end 1.475 -0.25) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.475 -0.25) (end 1.475 1.25) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.475 1.25) (end -0.025 1.25) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 0 0.5) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 0 1) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at 1.45 1) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 1.45 0.5) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at 1.45 0) (size 0.35 0.25) (layers F.Cu F.Paste F.Mask))\n (pad PAD smd rect (at 0.725 0.5) (size 0.7 1.2) (layers F.Cu F.Paste F.Mask))\n (pad PAD smd rect (at 0.725 -0.125) (size 0.2 0.05) (layers F.Cu F.Paste F.Mask))\n (pad PAD smd rect (at 0.725 1.125) (size 0.2 0.05) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/XTAL_3.2x2.5.kicad_mod", "content": "(module XTAL_3.2x2.5 (layer F.Cu) (tedit 5579B9EE)\n (fp_text reference REF** (at 0 2.4) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value XTAL_3.2x2.5 (at 0 -2.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.6 1.2) (end -1.6 -1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.3) (end 1.6 -1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.6 -1.3) (end 1.6 1.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.6 1.2) (end -1.6 1.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.4 0.8) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 2 smd rect (at 1.2 0.8) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.2 -0.9) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -1.4 -0.9) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask))\n)\n" }, { "path": "hw/vna.pretty/coupler4.kicad_mod", "content": "(module coupler4 (layer F.Cu) (tedit 564B55DF)\n (fp_text reference F1 (at 0.1 3) (layer F.SilkS) hide\n (effects (font (thickness 0.3)))\n )\n (fp_text value COUPLER (at 0.4 -2.5) (layer F.SilkS) hide\n (effects (font (thickness 0.3)))\n )\n (fp_poly (pts (xy 8.997557 1.365147) (xy -8.997557 1.365147) (xy -8.997557 1.07557) (xy 8.997557 1.07557)\n (xy 8.997557 1.365147)) (layer In2.Cu) (width 0))\n (fp_poly (pts (xy -8.025408 0.661889) (xy -0.97215 0.661889) (xy -0.97215 -1.365146) (xy -0.682574 -1.365146)\n (xy -0.682574 0.631834) (xy -1.004092 0.951466) (xy -8.016036 0.951466) (xy -8.335668 0.629948)\n (xy -8.335668 -1.365146) (xy -8.025408 -1.365146) (xy -8.025408 0.661889)) (layer In2.Cu) (width 0))\n (fp_poly (pts (xy 0.972149 0.661889) (xy 8.025407 0.661889) (xy 8.025407 -1.365146) (xy 8.335667 -1.365146)\n (xy 8.335667 0.631834) (xy 8.014149 0.951466) (xy 1.002205 0.951466) (xy 0.682573 0.629948)\n (xy 0.682573 -1.365146) (xy 0.972149 -1.365146) (xy 0.972149 0.661889)) (layer In2.Cu) (width 0))\n (pad 1 thru_hole circle (at -9 1.2) (size 0.55 0.55) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad GND thru_hole circle (at -9 0.3) (size 0.55 0.55) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at -9 2.1) (size 0.55 0.55) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 2 thru_hole circle (at 9 1.2) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad GND thru_hole circle (at 9 0.3) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at 9 2.1) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad 3 thru_hole circle (at -8.2 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad 4 thru_hole circle (at -0.8 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad 5 thru_hole circle (at 0.8 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad 6 thru_hole circle (at 8.2 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS))\n (pad GND thru_hole circle (at 0 -1.7) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at -1.7 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at 1.7 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at 9.1 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at 7.3 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at -7.3 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n (pad GND thru_hole circle (at -9.1 -1.4) (size 0.58 0.58) (drill 0.26) (layers *.Cu *.Mask F.SilkS)\n (zone_connect 2))\n)\n" }, { "path": "hw/vna.pretty/uwmiter_0.34_0.17_45.kicad_mod", "content": "(module uwmiter_0.34_0.17_45 (layer F.Cu) (tedit 569FDDF6)\n (fp_text reference uwmiter_0.34_0.17_45 (at 0 1.34) (layer F.SilkS) hide\n (effects (font (size 0.7 0.8) (thickness 0.15)))\n )\n (fp_text value Val*** (at 0 2.34) (layer F.SilkS) hide\n (effects (font (size 0.7 0.8) (thickness 0.15)))\n )\n (fp_poly (pts (xy 0 0) (xy 0.34 0) (xy 0.34 0.17) (xy 0.460208 0.290208)\n (xy 0.219791 0.530624) (xy 0.129199 0.440032) (xy 0 0.128116) (xy 0 0)) (layer F.Cu) (width 0))\n (pad 1 smd rect (at 0.17 -0.017) (size 0.34 0.15) (layers F.Cu)\n (clearance 0.000001))\n (pad 2 smd rect (at 0.35202 0.422437 315) (size 0.15 0.34) (layers F.Cu)\n (clearance 0.000001))\n)\n" }, { "path": "hw/vna.pretty/uwmiter_0.34_0.17_90.kicad_mod", "content": "(module uwmiter_0.34_0.17_90 (layer F.Cu) (tedit 0)\n (fp_text reference uwmiter_0.34_0.17_90 (at 0 1.34) (layer F.SilkS) hide\n (effects (font (size 0.7 0.8) (thickness 0.15)))\n )\n (fp_text value Val*** (at 0 2.34) (layer F.SilkS) hide\n (effects (font (size 0.7 0.8) (thickness 0.15)))\n )\n (fp_poly (pts (xy 0 0) (xy 0.34 0) (xy 0.34 0.17) (xy 0.51 0.17)\n (xy 0.509999 0.51) (xy 0.3808 0.51) (xy 0 0.129199) (xy 0 0)) (layer F.Cu) (width 0))\n (pad 1 smd rect (at 0.17 -0.017) (size 0.34 0.034) (layers F.Cu)\n (clearance 0.000001))\n (pad 2 smd rect (at 0.526999 0.34) (size 0.034 0.34) (layers F.Cu)\n (clearance 0.000001))\n)\n" }, { "path": "hw/vna2-cache.lib", "content": "EESchema-LIBRARY Version 2.3\n#encoding utf-8\n#\n# 3550LP14A300\n#\nDEF 3550LP14A300 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -300 60 H V C CNN\nF1 \"3550LP14A300\" -50 150 60 H V C CNN\nF2 \"\" -50 0 60 H V C CNN\nF3 \"\" -50 0 60 H V C CNN\nDRAW\nS -350 100 250 -250 0 1 0 N\nX GND 1 -200 -450 200 U 50 50 1 1 P\nX IN 2 -550 0 200 R 50 50 1 1 P\nX GND 3 -100 -450 200 U 50 50 1 1 P\nX GND 4 0 -450 200 U 50 50 1 1 P\nX OUT 5 450 0 200 L 50 50 1 1 P\nX GND 6 100 -450 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# 5515LP15A730\n#\nDEF 5515LP15A730 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -300 60 H V C CNN\nF1 \"5515LP15A730\" 0 200 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS -350 150 350 -250 0 1 0 N\nX GND 1 -150 -450 200 U 50 50 1 1 P\nX GND 3 -50 -450 200 U 50 50 1 1 P\nX OUT 4 550 50 200 L 50 50 1 1 P\nX GND 5 50 -450 200 U 50 50 1 1 P\nX GND 7 150 -450 200 U 50 50 1 1 P\nX IN 8 -550 50 200 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# 74AHC1G04\n#\nDEF 74AHC1G04 U 0 10 Y Y 1 F N\nF0 \"U\" 195 115 60 H V C CNN\nF1 \"74AHC1G04\" 300 -150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N\nX GND 3 -50 -200 100 U 40 20 0 0 W\nX VCC 5 -50 200 100 D 40 20 0 0 W\nX ~ 2 -450 0 300 R 60 60 1 1 I\nX ~ 4 450 0 300 L 60 60 1 1 O I\nX ~ 2 -450 0 300 R 60 60 1 2 I I\nX ~ 4 450 0 300 L 60 60 1 2 O\nENDDRAW\nENDDEF\n#\n# 93LC46B\n#\nDEF 93LC46B U 0 40 Y Y 1 F N\nF0 \"U\" 150 -250 60 H V C CNN\nF1 \"93LC46B\" 50 250 60 H V C CNN\nF2 \"\" 100 -400 60 H I C CNN\nF3 \"\" 100 -400 60 H I C CNN\nDRAW\nS -250 200 250 -200 0 1 0 N\nX DO 1 -450 100 200 R 50 50 1 1 O\nX VSS 2 -450 0 200 R 50 50 1 1 W\nX DI 3 -450 -100 200 R 50 50 1 1 I\nX CLK 4 450 -100 200 L 50 50 1 1 I\nX CS 5 450 0 200 L 50 50 1 1 I\nX VCC 6 450 100 200 L 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# ADA4940-1\n#\nDEF ADA4940-1 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"ADA4940-1\" 550 600 60 H V C CNN\nF2 \"\" -200 -400 60 H I C CNN\nF3 \"\" -200 -400 60 H I C CNN\nDRAW\nS -450 550 500 -550 0 1 0 N\nX -FB 1 -650 250 200 R 50 50 1 1 P\nX +IN 2 -650 50 200 R 50 50 1 1 I\nX -IN 3 -650 -50 200 R 50 50 1 1 I\nX +FB 4 -650 -250 200 R 50 50 1 1 P\nX +VS 5 150 750 200 D 50 50 1 1 W\nX +VS 6 50 750 200 D 50 50 1 1 W\nX +VS 7 -50 750 200 D 50 50 1 1 W\nX +VS 8 -150 750 200 D 50 50 1 1 W\nX VOCM 9 700 -250 200 L 50 50 1 1 P\nX +OUT 10 700 50 200 L 50 50 1 1 O\nX -OUT 11 700 -50 200 L 50 50 1 1 O\nX ~DISABLE 12 700 250 200 L 50 50 1 1 I\nX -VS 13 -150 -750 200 U 50 50 1 1 W\nX -VS 14 -50 -750 200 U 50 50 1 1 W\nX -VS 15 50 -750 200 U 50 50 1 1 W\nX -VS 16 150 -750 200 U 50 50 1 1 W\nX EP EP 250 -750 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# ADL5801\n#\nDEF ADL5801 U 0 40 Y Y 1 F N\nF0 \"U\" 800 -200 60 H V C CNN\nF1 \"ADL5801\" 950 1000 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\nDRAW\nS -150 -150 900 950 0 1 0 N\nX GND 1 -350 650 200 R 50 50 1 1 W\nX GND 2 -350 550 200 R 50 50 1 1 W\nX LOIP 3 -350 450 200 R 50 50 1 1 I\nX LOIN 4 -350 350 200 R 50 50 1 1 I\nX GND 5 -350 250 200 R 50 50 1 1 W\nX GND 6 -350 150 200 R 50 50 1 1 W\nX VPLO 7 150 -350 200 U 50 50 1 1 W\nX GND 8 250 -350 200 U 50 50 1 1 W\nX ENBL 9 350 -350 200 U 50 50 1 1 I\nX VSET 10 450 -350 200 U 50 50 1 1 I\nX IFOP 20 550 1150 200 D 50 50 1 1 O\nX DETO 11 550 -350 200 U 50 50 1 1 O\nX IFON 21 450 1150 200 D 50 50 1 1 O\nX GND 12 650 -350 200 U 50 50 1 1 W\nX NC 22 350 1150 200 D 50 50 1 1 N\nX VPDT 13 1100 150 200 L 50 50 1 1 W\nX GND 23 250 1150 200 D 50 50 1 1 W\nX GND 14 1100 250 200 L 50 50 1 1 W\nX VPLO 24 150 1150 200 D 50 50 1 1 W\nX RFIN 15 1100 350 200 L 50 50 1 1 I\nX RFIP 16 1100 450 200 L 50 50 1 1 I\nX GND 17 1100 550 200 L 50 50 1 1 W\nX VPRF 18 1100 650 200 L 50 50 1 1 W\nX GND 19 650 1150 200 D 50 50 1 1 W\nX PAD PAD 50 -350 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# BARREL_JACK\n#\nDEF BARREL_JACK CON 0 40 Y Y 1 F N\nF0 \"CON\" 0 250 60 H V C CNN\nF1 \"BARREL_JACK\" 0 -200 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nA -300 99 49 -900 1788 0 1 0 N -300 50 -350 100\nA -300 101 49 900 -1788 0 1 0 N -300 150 -350 100\nS 100 150 0 50 0 1 0 N\nP 2 0 1 0 -300 50 0 50 N\nP 2 0 1 0 0 150 -300 150 N\nP 3 0 1 0 100 0 -50 0 -50 -100 N\nP 5 0 1 0 100 -100 -150 -100 -200 -50 -250 -100 -350 -100 N\nX ~ 1 300 100 200 L 50 50 1 1 P\nX ~ 2 300 -100 200 L 50 50 1 1 P\nX ~ 3 300 0 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# C\n#\nDEF C C 0 10 N Y 1 F N\nF0 \"C\" 25 100 50 H V L CNN\nF1 \"C\" 25 -100 50 H V L CNN\nF2 \"\" 38 -150 30 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n C?\n C_????_*\n C_????\n SMD*_c\n Capacitor*\n$ENDFPLIST\nDRAW\nP 2 0 1 20 -80 -30 80 -30 N\nP 2 0 1 20 -80 30 80 30 N\nX ~ 1 0 150 110 D 40 40 1 1 P\nX ~ 2 0 -150 110 U 40 40 1 1 P\nENDDRAW\nENDDEF\n#\n# CONN_01X01\n#\nDEF CONN_01X01 P 0 40 Y N 1 F N\nF0 \"P\" 0 100 50 H V C CNN\nF1 \"CONN_01X01\" 100 0 50 V V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n Pin_Header_Straight_1X01\n Pin_Header_Angled_1X01\n Socket_Strip_Straight_1X01\n Socket_Strip_Angled_1X01\n$ENDFPLIST\nDRAW\nS -50 5 10 -5 0 1 0 N\nS -50 50 50 -50 0 1 0 N\nX P1 1 -200 0 150 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# D_Schottky\n#\nDEF D_Schottky D 0 40 N N 1 F N\nF0 \"D\" 0 100 50 H V C CNN\nF1 \"D_Schottky\" 0 -100 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n D-Pak_TO252AA\n Diode_*\n *SingleDiode\n *SingleDiode*\n *_Diode_*\n$ENDFPLIST\nDRAW\nP 3 0 1 0 50 50 -50 0 50 -50 F\nP 6 0 1 8 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N\nX K 1 -150 0 100 R 50 50 1 1 P\nX A 2 150 0 100 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# FILTER\n#\nDEF FILTER FB 0 40 Y N 1 F N\nF0 \"FB\" 0 150 50 H V C CNN\nF1 \"FILTER\" 0 -100 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nA -150 0 50 1 1799 0 1 0 N -100 0 -200 0\nA -50 0 50 1 1799 0 1 0 N 0 0 -100 0\nA 0 0 0 0 0 0 1 0 N 0 0 0 0\nA 50 0 50 1 1799 0 1 0 N 100 0 0 0\nA 150 0 50 1 1799 0 1 0 N 200 0 100 0\nS -225 75 225 -50 0 1 0 N\nX 1 1 -350 0 150 R 40 40 1 1 P\nX 2 2 350 0 150 L 40 40 1 1 P\nENDDRAW\nENDDEF\n#\n# FT2232D\n#\nDEF FT2232D U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"FT2232D\" 800 1650 60 H V C CNN\nF2 \"\" -1800 1100 60 H I C CNN\nF3 \"\" -1800 1100 60 H I C CNN\nDRAW\nS 1050 1550 -950 -1600 0 1 0 N\nX EESK 1 -1150 -1000 200 R 50 50 1 1 O\nX EEDATA 2 -1150 -1100 200 R 50 50 1 1 B\nX VCC 3 100 1750 200 D 50 50 1 1 W\nX RESET# 4 -1150 350 200 R 50 50 1 1 I\nX RSTOUT# 5 -1150 450 200 R 50 50 1 1 O\nX 3V3OUT 6 -1150 1300 200 R 50 50 1 1 w\nX USBDP 7 -1150 900 200 R 50 50 1 1 B\nX USBDM 8 -1150 1050 200 R 50 50 1 1 B\nX GND 9 -200 -1800 200 U 50 50 1 1 W\nX SI/WUA 10 1250 150 200 L 50 50 1 1 B\nX ADBUS4 20 1250 1000 200 L 50 50 1 1 B\nX BCBUS0/RXF# 30 1250 -900 200 L 50 50 1 1 B\nX BDBUS0 40 1250 0 200 L 50 50 1 1 B\nX ACBUS3 11 1250 250 200 L 50 50 1 1 B\nX ADBUS3/TMS 21 1250 1100 200 L 50 50 1 1 B\nX VCCIOB 31 -200 1750 200 D 50 50 1 1 W\nX PWREN# 41 1250 -1450 200 L 50 50 1 1 O\nX ACBUS2 12 1250 350 200 L 50 50 1 1 B\nX ADBUS2/TDO 22 1250 1200 200 L 50 50 1 1 B\nX BDBUS7 32 1250 -700 200 L 50 50 1 1 B\nX VCC 42 0 1750 200 D 50 50 1 1 W\nX ACBUS1 13 1250 450 200 L 50 50 1 1 B\nX ADBUS1/TDI 23 1250 1300 200 L 50 50 1 1 B\nX BDBUS6 33 1250 -600 200 L 50 50 1 1 B\nX XTIN 43 -1150 -100 200 R 50 50 1 1 I\nX VCCIOA 14 -100 1750 200 D 50 50 1 1 W\nX ADBUS0/TCK 24 1250 1400 200 L 50 50 1 1 B\nX GND 34 100 -1800 200 U 50 50 1 1 W\nX XTOUT 44 -1150 -450 200 R 50 50 1 1 O\nX ACBUS0 15 1250 550 200 L 50 50 1 1 B\nX GND 25 0 -1800 200 U 50 50 1 1 W\nX BDBUS5 35 1250 -500 200 L 50 50 1 1 B\nX AGND 45 200 -1800 200 U 50 50 1 1 W\nX ADBUS7 16 1250 700 200 L 50 50 1 1 B\nX SI/WUB 26 1250 -1300 200 L 50 50 1 1 B\nX BDBUS4 36 1250 -400 200 L 50 50 1 1 B\nX AVCC 46 200 1750 200 D 50 50 1 1 W\nX ADBUS6 17 1250 800 200 L 50 50 1 1 B\nX BCBUS3/WR 27 1250 -1200 200 L 50 50 1 1 B\nX BDBUS3 37 1250 -300 200 L 50 50 1 1 B\nX TEST 47 -1150 -1200 200 R 50 50 1 1 I\nX GND 18 -100 -1800 200 U 50 50 1 1 W\nX BCBUS2/RD# 28 1250 -1100 200 L 50 50 1 1 B\nX BDBUS2 38 1250 -200 200 L 50 50 1 1 B\nX EECS 48 -1150 -900 200 R 50 50 1 1 B\nX ADBUS5 19 1250 900 200 L 50 50 1 1 B\nX BCBUS1/TXE# 29 1250 -1000 200 L 50 50 1 1 B\nX BDBUS1 39 1250 -100 200 L 50 50 1 1 B\nENDDRAW\nENDDEF\n#\n# GND\n#\nDEF GND #PWR 0 0 Y Y 1 F P\nF0 \"#PWR\" 0 -250 50 H I C CNN\nF1 \"GND\" 0 -150 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N\nX GND 1 0 0 0 D 50 50 1 1 W N\nENDDRAW\nENDDEF\n#\n# HMC713LP3E\n#\nDEF HMC713LP3E U 0 40 Y Y 1 F N\nF0 \"U\" 300 300 60 H V C CNN\nF1 \"HMC713LP3E\" 700 750 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -200 -100 800 700 0 1 0 N\nX NC 1 -400 200 200 R 50 50 1 1 N\nX GND 2 50 -300 200 U 50 50 1 1 W\nX RFIN 3 -400 550 200 R 50 50 1 1 I\nX NC 4 -400 100 200 R 50 50 1 1 N\nX GND 5 150 -300 200 U 50 50 1 1 W\nX EN 6 -400 400 200 R 50 50 1 1 I\nX VSET 7 -400 300 200 R 50 50 1 1 I\nX CLPF 8 1000 150 200 L 50 50 1 1 P\nX GND 9 250 -300 200 U 50 50 1 1 W\nX GND 10 350 -300 200 U 50 50 1 1 W\nX GND 11 450 -300 200 U 50 50 1 1 W\nX GND 12 550 -300 200 U 50 50 1 1 W\nX OUTP 13 1000 550 200 L 50 50 1 1 O\nX OUTN 14 1000 450 200 L 50 50 1 1 O\nX VCC 15 350 900 200 D 50 50 1 1 W\nX VCC 16 250 900 200 D 50 50 1 1 W\nX GND EP 650 -300 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# INDUCTOR_SMALL\n#\nDEF INDUCTOR_SMALL L 0 0 N N 1 F N\nF0 \"L\" 0 100 50 H V C CNN\nF1 \"INDUCTOR_SMALL\" 0 -50 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nA -150 0 50 1 1799 0 1 0 N -100 0 -200 0\nA -50 0 50 1 1799 0 1 0 N 0 0 -100 0\nA 50 0 50 1 1799 0 1 0 N 100 0 0 0\nA 150 0 50 1 1799 0 1 0 N 200 0 100 0\nX 1 1 -250 0 50 R 30 30 1 1 I\nX 2 2 250 0 50 L 30 30 1 1 I\nENDDRAW\nENDDEF\n#\n# KT2520K\n#\nDEF KT2520K U 0 40 Y Y 1 F N\nF0 \"U\" 200 -250 60 H V C CNN\nF1 \"KT2520K\" 50 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nS 250 100 -200 -200 0 1 0 N\nX GND 1 -400 -50 200 R 50 50 1 1 W\nX GND 3 -400 -150 200 R 50 50 1 1 W\nX OUT 4 450 -50 200 L 50 50 1 1 O\nX VDD 6 -400 50 200 R 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# L7981\n#\nDEF L7981 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -350 60 H V C CNN\nF1 \"L7981\" 200 300 60 H V C CNN\nF2 \"\" -200 -650 60 H V C CNN\nF3 \"\" -200 -650 60 H V C CNN\nDRAW\nS -300 250 350 -300 0 1 0 N\nX OUT 1 550 200 200 L 50 50 1 1 w\nX SYNCH 2 550 50 200 L 50 50 1 1 B\nX EN 3 -500 100 200 R 50 50 1 1 I\nX COMP 4 -500 -150 200 R 50 50 1 1 P\nX FB 5 550 -150 200 L 50 50 1 1 I\nX FSW 6 -500 -50 200 R 50 50 1 1 P\nX GND 7 0 -500 200 U 50 50 1 1 W\nX VCC 8 -500 200 200 R 50 50 1 1 W\nX EP 9 100 -500 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# LED\n#\nDEF LED D 0 40 Y N 1 F N\nF0 \"D\" 0 100 50 H V C CNN\nF1 \"LED\" 0 -100 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n LED-3MM\n LED-5MM\n LED-10MM\n LED-0603\n LED-0805\n LED-1206\n LEDV\n$ENDFPLIST\nDRAW\nP 2 0 1 0 -50 50 -50 -50 N\nP 3 0 1 0 -80 -25 -125 -65 -120 -40 N\nP 3 0 1 0 -65 -40 -110 -80 -105 -55 N\nP 3 0 1 0 50 50 -50 0 50 -50 F\nX K 1 -200 0 150 R 40 40 1 1 P\nX A 2 200 0 150 L 40 40 1 1 P\nENDDRAW\nENDDEF\n#\n# LP0603\n#\nDEF LP0603 U 0 40 Y Y 1 F N\nF0 \"U\" 150 -200 60 H V C CNN\nF1 \"LP0603\" 100 200 60 H V C CNN\nF2 \"\" 100 -250 60 H V C CNN\nF3 \"\" 100 -250 60 H V C CNN\nDRAW\nS -200 150 250 -150 0 1 0 N\nX IN 1 -400 50 200 R 50 50 1 1 P\nX OUT 2 450 50 200 L 50 50 1 1 P\nX GND 3 450 -50 200 L 50 50 1 1 P\nX GND 4 -400 -50 200 R 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# LP5907\n#\nDEF LP5907 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -200 60 H V C CNN\nF1 \"LP5907\" 100 200 60 H V C CNN\nF2 \"\" 0 50 60 H V C CNN\nF3 \"\" 0 50 60 H V C CNN\n$FPLIST\n SOT-23-5\n$ENDFPLIST\nDRAW\nS -300 150 300 -150 0 1 0 N\nX IN 1 -500 50 200 R 50 50 1 1 W\nX GND 2 0 -350 200 U 50 50 1 1 W\nX EN 3 -500 -50 200 R 50 50 1 1 I\nX OUT 5 500 50 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# LTC224X\n#\nDEF LTC224X U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"LTC224X\" 450 1000 60 H V C CNN\nF2 \"\" -850 250 60 H I C CNN\nF3 \"\" -850 250 60 H I C CNN\nDRAW\nS 650 950 -650 -950 0 1 0 N\nX VCM 31 -850 -50 200 R 50 50 0 1 P\nX GND 33 150 -1150 200 U 50 50 0 1 W\nX AIN+ 1 -850 700 200 R 50 50 1 1 I\nX AIN- 2 -850 600 200 R 50 50 1 1 I\nX REFH 3 -850 400 200 R 50 50 1 1 P\nX REFH 4 -850 300 200 R 50 50 1 1 P\nX REFL 5 -850 200 200 R 50 50 1 1 P\nX REFL 6 -850 100 200 R 50 50 1 1 P\nX VDD 7 100 1150 200 D 50 50 1 1 W\nX GND 8 -150 -1150 200 U 50 50 1 1 W\nX CLK 9 -850 850 200 R 50 50 1 1 I\nX SHDN 10 -850 -300 200 R 50 50 1 1 I\nX OGND 20 0 -1150 200 U 50 50 1 1 W\nX SENSE 30 -850 -700 200 R 50 50 1 1 I\nX ~OE 11 -850 -400 200 R 50 50 1 1 I\nX OVDD 21 850 -750 200 L 50 50 1 1 W\nX D0 12 850 800 200 L 50 50 1 1 O\nX D8 22 850 0 200 L 50 50 1 1 O\nX VDD 32 -50 1150 200 D 50 50 1 1 W\nX D1 13 850 700 200 L 50 50 1 1 O\nX D9 23 850 -100 200 L 50 50 1 1 O\nX D2 14 850 600 200 L 50 50 1 1 O\nX D10 24 850 -200 200 L 50 50 1 1 O\nX D3 15 850 500 200 L 50 50 1 1 O\nX D11 25 850 -300 200 L 50 50 1 1 O\nX D4 16 850 400 200 L 50 50 1 1 O\nX D12 26 850 -400 200 L 50 50 1 1 O\nX D5 17 850 300 200 L 50 50 1 1 O\nX D13 27 850 -500 200 L 50 50 1 1 O\nX D6 18 850 200 200 L 50 50 1 1 O\nX OF 28 850 -650 200 L 50 50 1 1 O\nX D7 19 850 100 200 L 50 50 1 1 O\nX MODE 29 -850 -600 200 R 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# MAX2870\n#\nDEF MAX2870 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -150 60 H V C CNN\nF1 \"MAX2870\" 0 300 60 H V C CNN\nF2 \"\" -1350 850 60 H V C CNN\nF3 \"\" -1350 850 60 H V C CNN\nDRAW\nS -800 -900 850 900 0 1 0 N\nX CLK 1 -1000 450 200 R 50 50 1 1 I\nX DATA 2 -1000 350 200 R 50 50 1 1 I\nX LE 3 -1000 250 200 R 50 50 1 1 I\nX CE 4 -1000 150 200 R 50 50 1 1 I\nX SW 5 1050 350 200 L 50 50 1 1 O\nX VCC_CP 6 -200 1100 200 D 50 50 1 1 W\nX CP_OUT 7 1050 150 200 L 50 50 1 1 O\nX GND_CP 8 350 -1100 200 U 50 50 1 1 W\nX GND_PLL 9 250 -1100 200 U 50 50 1 1 W\nX VCC_PLL 10 -100 1100 200 D 50 50 1 1 W\nX TUNE 20 1050 50 200 L 50 50 1 1 I\nX MUX_OUT 30 1050 650 200 L 50 50 1 1 O\nX GND_RF 11 150 -1100 200 U 50 50 1 1 W\nX GND_TUNE 21 50 -1100 200 U 50 50 1 1 W\nX GND_SD 31 -250 -1100 200 U 50 50 1 1 W\nX RFOUTA_P 12 1050 -200 200 L 50 50 1 1 O\nX RSET 22 -1000 -250 200 R 50 50 1 1 P\nX VCC_SD 32 300 1100 200 D 50 50 1 1 W\nX RFOUTA_N 13 1050 -300 200 L 50 50 1 1 O\nX BIAS_FILT 23 -1000 -350 200 R 50 50 1 1 P\nX RFOUTB_P 14 1050 -450 200 L 50 50 1 1 O\nX REG 24 -1000 -550 200 R 50 50 1 1 P\nX RFOUTB_N 15 1050 -550 200 L 50 50 1 1 O\nX LD 25 1050 550 200 L 50 50 1 1 O\nX VCC_RF 16 0 1100 200 D 50 50 1 1 W\nX RFOUT_EN 26 -1000 0 200 R 50 50 1 1 I\nX VCC_VCO 17 100 1100 200 D 50 50 1 1 W\nX GND_DIG 27 -150 -1100 200 U 50 50 1 1 W\nX GND_VCO 18 -50 -1100 200 U 50 50 1 1 W\nX VCC_DIG 28 200 1100 200 D 50 50 1 1 W\nX NOISE_FILT 19 -1000 -450 200 R 50 50 1 1 P\nX REF_IN 29 -1000 600 200 R 50 50 1 1 I\nX EP EP -350 -1100 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# MCP1824T\n#\nDEF MCP1824T U 0 40 Y Y 1 F N\nF0 \"U\" 200 -200 60 H V C CNN\nF1 \"MCP1824T\" 0 200 60 H V C CNN\nF2 \"\" -200 -50 60 H V C CNN\nF3 \"\" -200 -50 60 H V C CNN\nDRAW\nS -300 150 250 -150 0 1 0 N\nX VIN 1 -500 100 200 R 50 50 1 1 W\nX GND 2 -500 -100 200 R 50 50 1 1 W\nX ~SHDN 3 -500 0 200 R 50 50 1 1 I\nX PWRGD 4 450 -100 200 L 50 50 1 1 C\nX VOUT 5 450 100 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# MIC5366\n#\nDEF MIC5366 U 0 40 Y Y 1 F N\nF0 \"U\" 150 -200 60 H V C CNN\nF1 \"MIC5366\" 0 200 60 H V C CNN\nF2 \"\" -50 -150 60 H V C CNN\nF3 \"\" -50 -150 60 H V C CNN\nDRAW\nS -250 150 200 -150 0 1 0 N\nX VIN 1 -450 100 200 R 50 50 1 1 W\nX GND 2 -450 -100 200 R 50 50 1 1 W\nX EN 3 -450 0 200 R 50 50 1 1 I\nX VOUT 5 400 100 200 L 50 50 1 1 w\nENDDRAW\nENDDEF\n#\n# NB3N551\n#\nDEF NB3N551 U 0 40 Y Y 1 F N\nF0 \"U\" 200 -350 60 H V C CNN\nF1 \"NB3N551\" 300 400 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS 300 350 -300 -300 0 1 0 N\nX ICLK 1 -500 50 200 R 50 50 1 1 I\nX Q1 2 500 150 200 L 50 50 1 1 O\nX Q2 3 500 50 200 L 50 50 1 1 O\nX Q3 4 500 -50 200 L 50 50 1 1 O\nX Q4 5 500 -150 200 L 50 50 1 1 O\nX GND 6 50 -500 200 U 50 50 1 1 W\nX VDD 7 0 550 200 D 50 50 1 1 W\nX OE 8 -500 -50 200 R 50 50 1 1 I\nX EP EP -50 -500 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# PE42420\n#\nDEF PE42420 U 0 40 Y Y 1 F N\nF0 \"U\" 0 -50 60 H V C CNN\nF1 \"PE42420\" 650 400 60 H V C CNN\nF2 \"\" -500 550 60 H I C CNN\nF3 \"\" -500 550 60 H I C CNN\nDRAW\nS -750 -400 850 350 0 1 0 N\nX GND 1 -650 -600 200 U 50 50 1 1 W\nX GND 2 -550 -600 200 U 50 50 1 1 W\nX RF1 3 1050 150 200 L 50 50 1 1 P\nX GND 4 -450 -600 200 U 50 50 1 1 W\nX GND 5 -350 -600 200 U 50 50 1 1 W\nX GND 6 -250 -600 200 U 50 50 1 1 W\nX GND 7 -150 -600 200 U 50 50 1 1 W\nX RFC 8 -950 0 200 R 50 50 1 1 P\nX GND 9 -50 -600 200 U 50 50 1 1 W\nX GND 10 50 -600 200 U 50 50 1 1 W\nX VDD 20 -350 550 200 D 50 50 1 1 W\nX GND 11 150 -600 200 U 50 50 1 1 W\nX GND 12 250 -600 200 U 50 50 1 1 W\nX RF2 13 1050 -100 200 L 50 50 1 1 P\nX GND 14 350 -600 200 U 50 50 1 1 W\nX GND 15 450 -600 200 U 50 50 1 1 W\nX CTRL2 16 250 550 200 D 50 50 1 1 I\nX CTRL1 17 150 550 200 D 50 50 1 1 I\nX GND 18 550 -600 200 U 50 50 1 1 W\nX GND 19 650 -600 200 U 50 50 1 1 W\nX EP EP 750 -600 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# PE43711\n#\nDEF PE43711 U 0 40 Y Y 1 F N\nF0 \"U\" 650 -700 60 H V C CNN\nF1 \"PE43711\" 500 600 60 H V C CNN\nF2 \"\" -1300 500 60 H V C CNN\nF3 \"\" -1300 500 60 H V C CNN\nDRAW\nS -650 550 750 -650 0 1 0 N\nX C0.25 1 -850 250 200 R 50 50 1 1 I\nX VDD 2 0 750 200 D 50 50 1 1 W\nX ~P~/S 3 950 -100 200 L 50 50 1 1 I\nX GND 4 -450 -850 200 U 50 50 1 1 W\nX RF1 5 -850 450 200 R 50 50 1 1 P\nX GND 6 -350 -850 200 U 50 50 1 1 W\nX GND 7 -250 -850 200 U 50 50 1 1 W\nX GND 8 -150 -850 200 U 50 50 1 1 W\nX GND 9 -50 -850 200 U 50 50 1 1 W\nX GND 10 50 -850 200 U 50 50 1 1 W\nX C8 20 -850 -250 200 R 50 50 1 1 I\nX GND 11 150 -850 200 U 50 50 1 1 W\nX C4 21 -850 -150 200 R 50 50 1 1 I\nX GND 12 250 -850 200 U 50 50 1 1 W\nX C2 22 -850 -50 200 R 50 50 1 1 I\nX GND 13 350 -850 200 U 50 50 1 1 W\nX C1 23 -850 50 200 R 50 50 1 1 I\nX RF2 14 950 450 200 L 50 50 1 1 P\nX C0.5 24 -850 150 200 R 50 50 1 1 I\nX GND 15 450 -850 200 U 50 50 1 1 W\nX LE 16 950 200 200 L 50 50 1 1 I\nX CLK 17 950 100 200 L 50 50 1 1 I\nX SI 18 950 0 200 L 50 50 1 1 I\nX C16 19 -850 -350 200 R 50 50 1 1 I\nX GND EP 550 -850 200 U 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# PWR_FLAG\n#\nDEF PWR_FLAG #FLG 0 0 N N 1 F P\nF0 \"#FLG\" 0 95 50 H I C CNN\nF1 \"PWR_FLAG\" 0 180 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nX pwr 1 0 0 0 U 20 20 0 0 w\nP 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N\nENDDRAW\nENDDEF\n#\n# R\n#\nDEF R R 0 0 N Y 1 F N\nF0 \"R\" 80 0 50 V V C CNN\nF1 \"R\" 0 0 50 V V C CNN\nF2 \"\" -70 0 30 V V C CNN\nF3 \"\" 0 0 30 H V C CNN\n$FPLIST\n R_*\n Resistor_*\n$ENDFPLIST\nDRAW\nS -40 -100 40 100 0 1 10 N\nX ~ 1 0 150 50 D 60 60 1 1 P\nX ~ 2 0 -150 50 U 60 60 1 1 P\nENDDRAW\nENDDEF\n#\n# SKY13322-375LF\n#\nDEF SKY13322-375LF U 0 40 Y Y 1 F N\nF0 \"U\" 200 -400 60 H V C CNN\nF1 \"SKY13322-375LF\" 0 350 60 H V C CNN\nF2 \"\" 50 350 60 H V C CNN\nF3 \"\" 50 350 60 H V C CNN\nDRAW\nS -250 250 250 -300 0 1 0 N\nX J2 1 450 100 200 L 50 50 1 1 B\nX V2 2 -450 -50 200 R 50 50 1 1 I\nX V1 4 -450 50 200 R 50 50 1 1 I\nX J1 5 450 200 200 L 50 50 1 1 B\nX J3 6 450 0 200 L 50 50 1 1 B\nX V3 7 -450 -150 200 R 50 50 1 1 I\nX RFC 8 -450 200 200 R 50 50 1 1 B\nX V4 9 -450 -250 200 R 50 50 1 1 I\nX J4 10 450 -100 200 L 50 50 1 1 B\nX EP EP 450 -250 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# SMA\n#\nDEF SMA P 0 40 Y Y 1 F N\nF0 \"P\" 150 0 60 H V C CNN\nF1 \"SMA\" 0 150 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nC 0 0 22 0 1 0 N\nS -50 -50 50 50 0 1 0 N\nP 2 0 1 0 -100 0 -50 0 N\nX ~ 1 -200 0 100 R 50 50 1 1 P\nX ~ 2 0 -150 100 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# SW_PUSH\n#\nDEF SW_PUSH SW 0 40 N N 1 F N\nF0 \"SW\" 150 110 50 H V C CNN\nF1 \"SW_PUSH\" 0 -80 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nS -170 50 170 60 0 1 0 N\nP 4 0 1 0 -40 60 -30 90 30 90 40 60 N\nX 1 1 -300 0 200 R 60 60 0 1 P I\nX 2 2 300 0 200 L 60 60 0 1 P I\nENDDRAW\nENDDEF\n#\n# TCM1-63AX+\n#\nDEF TCM1-63AX+ T 0 40 Y Y 1 F N\nF0 \"T\" 0 250 60 H V C CNN\nF1 \"TCM1-63AX+\" 50 550 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -350 500 300 0 0 1 0 N\nX NC 1 -100 -200 200 U 50 50 1 1 P\nX P 2 -550 200 200 R 50 50 1 1 P\nX PDOT 3 -550 350 200 R 50 50 1 1 P\nX S 4 500 200 200 L 50 50 1 1 P\nX NC 5 50 -200 200 U 50 50 1 1 P\nX SDOT 6 500 350 200 L 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# TRF37A75\n#\nDEF TRF37A75 U 0 40 Y Y 1 F N\nF0 \"U\" 300 -350 60 H V C CNN\nF1 \"TRF37A75\" 250 400 60 H V C CNN\nF2 \"\" -200 -50 60 H V C CNN\nF3 \"\" -200 -50 60 H V C CNN\nDRAW\nS -350 350 350 -300 0 1 0 N\nX VCC 1 0 550 200 D 50 50 1 1 W\nX RFIN 2 -550 150 200 R 50 50 1 1 I\nX NC 3 -100 -500 200 U 50 50 1 1 P\nX NC 4 0 -500 200 U 50 50 1 1 P\nX PWDN 5 -550 0 200 R 50 50 1 1 I\nX NC 6 100 -500 200 U 50 50 1 1 P\nX RFOUT 7 550 50 200 L 50 50 1 1 O\nX NC 8 200 -500 200 U 50 50 1 1 P\nX GND 9 -200 -500 200 U 50 50 1 1 W\nENDDRAW\nENDDEF\n#\n# TSV911\n#\nDEF TSV911 U 0 20 Y Y 1 F N\nF0 \"U\" 150 150 60 H V C CNN\nF1 \"TSV911\" 200 -200 60 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\nDRAW\nP 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N\nX ~ 1 500 0 300 L 40 40 1 1 C\nX V- 2 -100 -400 250 U 40 40 1 1 W\nX + 3 -500 100 300 R 40 40 1 1 I\nX _ 4 -500 -100 300 R 40 40 1 1 I\nX V+ 5 -100 400 250 D 40 40 1 1 W\nENDDRAW\nENDDEF\n#\n# USB-MICRO\n#\nDEF USB-MICRO U 0 40 Y Y 1 F N\nF0 \"U\" -50 50 60 H V C CNN\nF1 \"USB-MICRO\" -150 300 60 H V C CNN\nF2 \"\" 50 -250 60 H V C CNN\nF3 \"\" 50 -250 60 H V C CNN\n$FPLIST\n MICRO-B_USB\n *MICRO*USB\n$ENDFPLIST\nDRAW\nS -450 350 350 -350 0 1 0 N\nX VCC 1 650 250 300 L 50 50 1 1 w\nX D- 2 650 150 300 L 50 50 1 1 B\nX D+ 3 650 50 300 L 50 50 1 1 B\nX ID 4 650 -50 300 L 50 50 1 1 B\nX GND 5 650 -150 300 L 50 50 1 1 w\nX SHIELD SH 650 -250 300 L 60 60 1 1 B\nENDDRAW\nENDDEF\n#\n# Via\n#\nDEF Via F 0 40 Y Y 1 F N\nF0 \"F\" 0 200 60 H V C CNN\nF1 \"Via\" 250 0 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -50 50 50 -100 0 1 0 N\nP 2 0 1 0 -50 -250 50 -250 N\nP 3 0 1 0 -50 -200 0 -200 0 -250 N\nX ~ 1 -200 0 200 R 50 50 1 1 I\nX ~ 2 -200 -200 200 R 50 50 1 1 I\nENDDRAW\nENDDEF\n#\n# W25Q32JV\n#\nDEF W25Q32JV U 0 40 Y Y 1 F N\nF0 \"U\" 0 0 60 H V C CNN\nF1 \"W25Q32JV\" 300 350 60 H V C CNN\nF2 \"\" 0 0 60 H I C CNN\nF3 \"\" 0 0 60 H I C CNN\nDRAW\nS -500 250 550 -250 0 1 0 N\nX ~CS 1 -700 150 200 R 50 50 1 1 I\nX DO(IO1) 2 -700 50 200 R 50 50 1 1 O\nX ~WP~(IO2) 3 -700 -50 200 R 50 50 1 1 B\nX GND 4 -700 -150 200 R 50 50 1 1 W\nX DI(IO0) 5 750 -150 200 L 50 50 1 1 I\nX CLK 6 750 -50 200 L 50 50 1 1 I\nX ~HOLD~(IO3) 7 750 50 200 L 50 50 1 1 B\nX VCC 8 750 150 200 L 50 50 1 1 W\nX EP 9 0 -450 200 U 50 50 1 1 P\nENDDRAW\nENDDEF\n#\n# XC7A15T-1FTG256C\n#\nDEF XC7A15T-1FTG256C U 0 40 Y Y 7 L N\nF0 \"U\" 50 -3300 50 H V C CNN\nF1 \"XC7A15T-1FTG256C\" 150 2300 50 H V C CNN\nF2 \"MODULE\" 50 -3200 50 H I C CNN\nF3 \"DOCUMENTATION\" 50 -3200 50 H I C CNN\nDRAW\nS -600 2150 650 -3050 1 1 0 N\nX IO_L2P_T0_AD8P_15 A8 -900 2000 300 R 50 50 1 1 B\nX IO_L1P_T0_AD0P_15 C8 -900 600 300 R 50 50 1 1 B\nX IO_L6P_T0_15 D8 -900 -100 300 R 50 50 1 1 B\nX IO_L2N_T0_AD8N_15 A9 -900 1900 300 R 50 50 1 1 B\nX IO_L3P_T0_DQS_AD1P_15 B9 -900 1300 300 R 50 50 1 1 B\nX IO_L1N_T0_AD0N_15 C9 -900 500 300 R 50 50 1 1 B\nX IO_L6N_T0_VREF_15 D9 -900 -200 300 R 50 50 1 1 B\nX IO_L3N_T0_DQS_AD1N_15 A10 -900 1800 300 R 50 50 1 1 B\nX IO_L4P_T0_15 B10 -900 1200 300 R 50 50 1 1 B\nX IO_0_15 D10 -900 -300 300 R 50 50 1 1 B\nX IO_L4N_T0_15 B11 -900 1100 300 R 50 50 1 1 B\nX IO_L11P_T1_SRCC_15 C11 -900 400 300 R 50 50 1 1 B\nX IO_L14N_T2_SRCC_15 D11 -900 -400 300 R 50 50 1 1 B\nX IO_L14P_T2_SRCC_15 E11 -900 -900 300 R 50 50 1 1 B\nX IO_25_15 G11 -900 -1800 300 R 50 50 1 1 B\nX IO_L19P_T3_A22_15 H11 -900 -2300 300 R 50 50 1 1 B\nX IO_L5N_T0_AD9N_15 A12 -900 1700 300 R 50 50 1 1 B\nX IO_L5P_T0_AD9P_15 B12 -900 1000 300 R 50 50 1 1 B\nX IO_L11N_T1_SRCC_15 C12 -900 300 300 R 50 50 1 1 B\nX IO_L13P_T2_MRCC_15 E12 -900 -1000 300 R 50 50 1 1 B\nX IO_L16P_T2_A28_15 F12 -900 -1400 300 R 50 50 1 1 B\nX IO_L19N_T3_A21_VREF_15 G12 -900 -1900 300 R 50 50 1 1 B\nX IO_L20P_T3_A20_15 H12 -900 -2400 300 R 50 50 1 1 B\nX IO_L7P_T1_AD2P_15 A13 -900 1600 300 R 50 50 1 1 B\nX IO_L12N_T1_MRCC_15 C13 -900 200 300 R 50 50 1 1 B\nX IO_L12P_T1_MRCC_15 D13 -900 -500 300 R 50 50 1 1 B\nX IO_L13N_T2_MRCC_15 E13 -900 -1100 300 R 50 50 1 1 B\nX IO_L16N_T2_A27_15 F13 -900 -1500 300 R 50 50 1 1 B\nX IO_L20N_T3_A19_15 H13 -900 -2500 300 R 50 50 1 1 B\nX IO_L7N_T1_AD2N_15 A14 -900 1500 300 R 50 50 1 1 B\nX IO_L8N_T1_AD10N_15 B14 -900 900 300 R 50 50 1 1 B\nX IO_L8P_T1_AD10P_15 C14 -900 100 300 R 50 50 1 1 B\nX IO_L15P_T2_DQS_15 D14 -900 -600 300 R 50 50 1 1 B\nX IO_L21N_T3_DQS_A18_15 F14 -900 -1600 300 R 50 50 1 1 B\nX IO_L21P_T3_DQS_15 G14 -900 -2000 300 R 50 50 1 1 B\nX IO_L24P_T3_RS1_15 H14 -900 -2600 300 R 50 50 1 1 B\nX IO_L9N_T1_DQS_AD3N_15 A15 -900 1400 300 R 50 50 1 1 B\nX IO_L9P_T1_DQS_AD3P_15 B15 -900 800 300 R 50 50 1 1 B\nX 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IO_L6P_T0_35 D6 -800 -50 300 R 50 50 2 1 B\nX IO_0_35 E6 -800 -550 300 R 50 50 2 1 B\nX IO_L1N_T0_AD4N_35 A7 -800 1650 300 R 50 50 2 1 B\nX IO_L1P_T0_AD4P_35 B7 -800 1050 300 R 50 50 2 1 B\nX IO_L5P_T0_AD13P_35 C7 -800 450 300 R 50 50 2 1 B\nS -600 2200 800 -3050 3 1 0 N\nX IO_L23P_T3_A03_D19_14 R5 -900 -1050 300 R 50 50 3 1 B\nX IO_L23N_T3_A02_D18_14 T5 -900 -2050 300 R 50 50 3 1 B\nX IO_L19P_T3_A10_D26_14 M6 -900 1050 300 R 50 50 3 1 B\nX IO_L19N_T3_A09_D25_VREF_14 N6 -900 550 300 R 50 50 3 1 B\nX IO_25_14 P6 -900 -150 300 R 50 50 3 1 B\nX IO_L24P_T3_A01_D17_14 R6 -900 -1150 300 R 50 50 3 1 B\nX IO_L24N_T3_A00_D16_14 R7 -900 -1250 300 R 50 50 3 1 B\nX IO_L21P_T3_DQS_14 T7 -900 -2150 300 R 50 50 3 1 B\nX IO_L20P_T3_A08_D24_14 P8 -900 -250 300 R 50 50 3 1 B\nX IO_L20N_T3_A07_D23_14 R8 -900 -1350 300 R 50 50 3 1 B\nX IO_L21N_T3_DQS_A06_D22_14 T8 -900 -2250 300 R 50 50 3 1 B\nX IO_L18P_T2_A12_D28_14 N9 -900 450 300 R 50 50 3 1 B\nX IO_L18N_T2_A11_D27_14 P9 -900 -350 300 R 50 50 3 1 B\nX IO_L22P_T3_A05_D21_14 T9 -900 -2350 300 R 50 50 3 1 B\nX IO_L14P_T2_SRCC_14 P10 -900 -450 300 R 50 50 3 1 B\nX IO_L17P_T2_A14_D30_14 R10 -900 -1450 300 R 50 50 3 1 B\nX IO_L22N_T3_A04_D20_14 T10 -900 -2450 300 R 50 50 3 1 B\nX IO_L13P_T2_MRCC_14 N11 -900 350 300 R 50 50 3 1 B\nX IO_L14N_T2_SRCC_14 P11 -900 -550 300 R 50 50 3 1 B\nX IO_L17N_T2_A13_D29_14 R11 -900 -1550 300 R 50 50 3 1 B\nX IO_0_14 K12 -900 1850 300 R 50 50 3 1 B\nX IO_L6P_T0_FCS_B_14 L12 -900 1450 300 R 50 50 3 1 B\nX IO_L6N_T0_D08_VREF_14 M12 -900 950 300 R 50 50 3 1 B\nX IO_L13N_T2_MRCC_14 N12 -900 250 300 R 50 50 3 1 B\nX IO_L15P_T2_DQS_RDWR_B_14 R12 -900 -1650 300 R 50 50 3 1 B\nX IO_L15N_T2_DQS_DOUT_CSO_B_14 T12 -900 -2550 300 R 50 50 3 1 B\nX IO_L1P_T0_D00_MOSI_14 J13 -900 2050 300 R 50 50 3 1 B\nX IO_L5P_T0_D06_14 K13 -900 1750 300 R 50 50 3 1 B\nX IO_L5N_T0_D07_14 L13 -900 1350 300 R 50 50 3 1 B\nX IO_L11P_T1_SRCC_14 N13 -900 150 300 R 50 50 3 1 B\nX IO_L11N_T1_SRCC_14 P13 -900 -650 300 R 50 50 3 1 B\nX IO_L16P_T2_CSI_B_14 R13 -900 -1750 300 R 50 50 3 1 B\nX IO_L16N_T2_A15_D31_14 T13 -900 -2650 300 R 50 50 3 1 B\nX IO_L1N_T0_D01_DIN_14 J14 -900 1950 300 R 50 50 3 1 B\nX IO_L4P_T0_D04_14 L14 -900 1250 300 R 50 50 3 1 B\nX IO_L4N_T0_D05_14 M14 -900 850 300 R 50 50 3 1 B\nX IO_L12P_T1_MRCC_14 N14 -900 50 300 R 50 50 3 1 B\nX IO_L12N_T1_MRCC_14 P14 -900 -750 300 R 50 50 3 1 B\nX IO_L10P_T1_D14_14 T14 -900 -2750 300 R 50 50 3 1 B\nX IO_L2P_T0_D02_14 K15 -900 1650 300 R 50 50 3 1 B\nX IO_L3P_T0_DQS_PUDC_B_14 L15 -900 1150 300 R 50 50 3 1 B\nX IO_L3N_T0_DQS_EMCCLK_14 M15 -900 750 300 R 50 50 3 1 B\nX IO_L8P_T1_D11_14 P15 -900 -850 300 R 50 50 3 1 B\nX IO_L9P_T1_DQS_14 R15 -900 -1850 300 R 50 50 3 1 B\nX IO_L10N_T1_D15_14 T15 -900 -2850 300 R 50 50 3 1 B\nX IO_L2N_T0_D03_14 K16 -900 1550 300 R 50 50 3 1 B\nX IO_L7P_T1_D09_14 M16 -900 650 300 R 50 50 3 1 B\nX IO_L7N_T1_D10_14 N16 -900 -50 300 R 50 50 3 1 B\nX IO_L8N_T1_D12_14 P16 -900 -950 300 R 50 50 3 1 B\nX IO_L9N_T1_DQS_D13_14 R16 -900 -1950 300 R 50 50 3 1 B\nS -250 1150 750 -1050 4 1 0 N\nX IO_L2N_T0_34 M1 -550 800 300 R 50 50 4 1 B\nX IO_L4P_T0_34 N1 -550 400 300 R 50 50 4 1 B\nX IO_L4N_T0_34 P1 -550 0 300 R 50 50 4 1 B\nX IO_L7N_T1_34 R1 -550 -400 300 R 50 50 4 1 B\nX IO_L2P_T0_34 M2 -550 700 300 R 50 50 4 1 B\nX IO_L3N_T0_DQS_34 N2 -550 300 300 R 50 50 4 1 B\nX IO_L7P_T1_34 R2 -550 -500 300 R 50 50 4 1 B\nX IO_L8N_T1_34 T2 -550 -700 300 R 50 50 4 1 B\nX IO_L3P_T0_DQS_34 N3 -550 200 300 R 50 50 4 1 B\nX IO_L5N_T0_34 P3 -550 -100 300 R 50 50 4 1 B\nX IO_L8P_T1_34 R3 -550 -600 300 R 50 50 4 1 B\nX IO_L9N_T1_DQS_34 T3 -550 -800 300 R 50 50 4 1 B\nX IO_L1P_T0_34 L4 -550 1000 300 R 50 50 4 1 B\nX IO_L1N_T0_34 M4 -550 600 300 R 50 50 4 1 B\nX IO_L6N_T0_VREF_34 N4 -550 100 300 R 50 50 4 1 B\nX IO_L5P_T0_34 P4 -550 -200 300 R 50 50 4 1 B\nX IO_L9P_T1_DQS_34 T4 -550 -900 300 R 50 50 4 1 B\nX IO_0_34 L5 -550 900 300 R 50 50 4 1 B\nX IO_L6P_T0_34 M5 -550 500 300 R 50 50 4 1 B\nX IO_L10P_T1_34 P5 -550 -300 300 R 50 50 4 1 B\nS -200 550 400 -600 5 1 0 N\nX GNDADC_0 G7 -500 -450 300 R 50 50 5 1 W\nX VREFN_0 H7 -500 50 300 R 50 50 5 1 I\nX VN_0 J7 -500 -200 300 R 50 50 5 1 I\nX DXN_0 K7 -500 300 300 R 50 50 5 1 P\nX VCCADC_0 G8 -500 -350 300 R 50 50 5 1 W\nX VP_0 H8 -500 -100 300 R 50 50 5 1 I\nX VREFP_0 J8 -500 150 300 R 50 50 5 1 I\nX DXP_0 K8 -500 400 300 R 50 50 5 1 P\nS -300 600 350 -800 6 1 0 N\nX CFGBVS_0 E7 -600 500 300 R 50 50 6 1 I\nX TCK_0 L7 -600 -400 300 R 50 50 6 1 I\nX TMS_0 M7 -600 -700 300 R 50 50 6 1 I\nX TDI_0 N7 -600 -500 300 R 50 50 6 1 I\nX CCLK_0 E8 -600 -200 300 R 50 50 6 1 B\nX TDO_0 N8 -600 -600 300 R 50 50 6 1 O\nX PROGRAM_B_0 L9 -600 100 300 R 50 50 6 1 I\nX M0_0 M9 -600 400 300 R 50 50 6 1 I\nX DONE_0 H10 -600 -100 300 R 50 50 6 1 B\nX INIT_B_0 K10 -600 0 300 R 50 50 6 1 B\nX M1_0 M10 -600 300 300 R 50 50 6 1 I\nX M2_0 M11 -600 200 300 R 50 50 6 1 I\nS -650 1850 350 -2050 7 1 0 N\nX GND A1 650 1350 300 L 50 50 7 1 W\nX VCCO_35 F1 -950 -1750 300 R 50 50 7 1 W\nX GND L1 650 -650 300 L 50 50 7 1 W\nX VCCO_34 T1 -950 -1250 300 R 50 50 7 1 W\nX GND D2 650 850 300 L 50 50 7 1 W\nX VCCO_35 J2 -950 -1850 300 R 50 50 7 1 W\nX GND P2 650 -1150 300 L 50 50 7 1 W\nX VCCO_35 B3 -950 -1450 300 R 50 50 7 1 W\nX GND G3 650 250 300 L 50 50 7 1 W\nX VCCO_34 M3 -950 -1050 300 R 50 50 7 1 W\nX VCCO_35 E4 -950 -1650 300 R 50 50 7 1 W\nX GND K4 650 -350 300 L 50 50 7 1 W\nX VCCO_34 R4 -950 -1150 300 R 50 50 7 1 W\nX GND C5 650 1050 300 L 50 50 7 1 W\nX GND N5 650 -950 300 L 50 50 7 1 W\nX VCCO_35 A6 -950 -1350 300 R 50 50 7 1 W\nX GND F6 650 550 300 L 50 50 7 1 W\nX VCCINT G6 -950 750 300 R 50 50 7 1 W\nX GND H6 650 -50 300 L 50 50 7 1 W\nX VCCINT J6 -950 550 300 R 50 50 7 1 W\nX GND K6 650 -450 300 L 50 50 7 1 W\nX VCCO_0 L6 -950 250 300 R 50 50 7 1 W\nX GND T6 650 -1450 300 L 50 50 7 1 W\nX VCCO_35 D7 -950 -1550 300 R 50 50 7 1 W\nX VCCINT F7 -950 950 300 R 50 50 7 1 W\nX VCCO_14 P7 -950 -150 300 R 50 50 7 1 W\nX GND B8 650 1150 300 L 50 50 7 1 W\nX VCCBATT_0 F8 -950 1250 300 R 50 50 7 1 W\nX VCCINT L8 -950 350 300 R 50 50 7 1 W\nX GND M8 650 -850 300 L 50 50 7 1 W\nX GND E9 650 650 300 L 50 50 7 1 W\nX VCCINT F9 -950 850 300 R 50 50 7 1 W\nX GND G9 650 150 300 L 50 50 7 1 W\nX VCCINT H9 -950 650 300 R 50 50 7 1 W\nX GND J9 650 -150 300 L 50 50 7 1 W\nX VCCINT K9 -950 450 300 R 50 50 7 1 W\nX GND R9 650 -1350 300 L 50 50 7 1 W\nX VCCO_15 C10 -950 -650 300 R 50 50 7 1 W\nX VCCBRAM E10 -950 1150 300 R 50 50 7 1 W\nX GND F10 650 450 300 L 50 50 7 1 W\nX VCCAUX G10 -950 1650 300 R 50 50 7 1 W\nX VCCAUX J10 -950 1550 300 R 50 50 7 1 W\nX VCCAUX L10 -950 1350 300 R 50 50 7 1 W\nX VCCO_14 N10 -950 -50 300 R 50 50 7 1 W\nX GND A11 650 1250 300 L 50 50 7 1 W\nX VCCBRAM F11 -950 1050 300 R 50 50 7 1 W\nX GND J11 650 -250 300 L 50 50 7 1 W\nX VCCAUX K11 -950 1450 300 R 50 50 7 1 W\nX GND L11 650 -750 300 L 50 50 7 1 W\nX VCCO_14 T11 -950 -350 300 R 50 50 7 1 W\nX GND D12 650 750 300 L 50 50 7 1 W\nX VCCO_15 J12 -950 -950 300 R 50 50 7 1 W\nX GND P12 650 -1250 300 L 50 50 7 1 W\nX VCCO_15 B13 -950 -550 300 R 50 50 7 1 W\nX GND G13 650 50 300 L 50 50 7 1 W\nX VCCO_14 M13 -950 50 300 R 50 50 7 1 W\nX VCCO_15 E14 -950 -750 300 R 50 50 7 1 W\nX GND K14 650 -550 300 L 50 50 7 1 W\nX VCCO_14 R14 -950 -250 300 R 50 50 7 1 W\nX GND C15 650 950 300 L 50 50 7 1 W\nX VCCO_15 H15 -950 -850 300 R 50 50 7 1 W\nX GND N15 650 -1050 300 L 50 50 7 1 W\nX VCCO_15 A16 -950 -450 300 R 50 50 7 1 W\nX GND F16 650 350 300 L 50 50 7 1 W\nX VCCO_14 L16 -950 150 300 R 50 50 7 1 W\nX GND T16 650 -1550 300 L 50 50 7 1 W\nENDDRAW\nENDDEF\n#\n# XTAL_SMD4\n#\nDEF XTAL_SMD4 Y 0 40 N N 1 F N\nF0 \"Y\" 0 150 50 H V C CNN\nF1 \"XTAL_SMD4\" 0 -150 50 H V C CNN\nF2 \"\" 0 0 60 H V C CNN\nF3 \"\" 0 0 60 H V C CNN\n$FPLIST\n Crystal_*\n$ENDFPLIST\nDRAW\nS -50 100 50 -100 0 1 12 N\nP 2 0 1 12 -100 -50 -100 50 N\nP 2 0 1 12 100 -50 100 50 N\nX 1 1 -150 0 50 R 40 40 1 1 P\nX 2 2 -50 -150 50 U 40 40 1 1 P\nX 3 3 150 0 50 L 40 40 1 1 P\nX 4 4 50 -150 50 U 40 40 1 1 P\nENDDRAW\nENDDEF\n#\n#End Library\n" }, { "path": "hw/vna2.kicad_pcb", "content": "(kicad_pcb (version 20170123) (host pcbnew \"(2017-07-25 revision 161045f)-master\")\n\n (general\n (thickness 1.6)\n (drawings 99)\n (tracks 9690)\n (zones 0)\n (modules 522)\n (nets 427)\n )\n\n (page A4)\n (layers\n (0 F.Cu signal)\n (1 In1.Cu signal hide)\n (2 In2.Cu signal)\n (31 B.Cu signal)\n (32 B.Adhes user)\n (33 F.Adhes user)\n (34 B.Paste user)\n (35 F.Paste user)\n (36 B.SilkS user)\n (37 F.SilkS user)\n (38 B.Mask user hide)\n (39 F.Mask user hide)\n (40 Dwgs.User user)\n (41 Cmts.User user)\n (42 Eco1.User user)\n (43 Eco2.User user)\n (44 Edge.Cuts user)\n (45 Margin user)\n (46 B.CrtYd user)\n (47 F.CrtYd user)\n (48 B.Fab user)\n (49 F.Fab user)\n )\n\n (setup\n (last_trace_width 0.15)\n (user_trace_width 0.2)\n (user_trace_width 0.3)\n (user_trace_width 0.34)\n (user_trace_width 0.5)\n (user_trace_width 2.3)\n (trace_clearance 0.13)\n (zone_clearance 0.3)\n (zone_45_only yes)\n (trace_min 0.15)\n (segment_width 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\"Net-(C255-Pad1)\")\n (net 413 \"Net-(R119-Pad2)\")\n (net 414 \"Net-(R120-Pad2)\")\n (net 415 3V3A_RX)\n (net 416 \"Net-(U30-PadG15)\")\n (net 417 \"Net-(U30-PadC14)\")\n (net 418 \"Net-(R130-Pad1)\")\n (net 419 \"Net-(R132-Pad2)\")\n (net 420 \"Net-(R131-Pad2)\")\n (net 421 \"Net-(R133-Pad1)\")\n (net 422 \"Net-(C261-Pad1)\")\n (net 423 \"Net-(P27-Pad1)\")\n (net 424 \"Net-(P26-Pad1)\")\n (net 425 \"Net-(P28-Pad1)\")\n (net 426 \"Net-(R122-Pad2)\")\n\n (net_class Default \"This is the default net class.\"\n (clearance 0.13)\n (trace_width 0.15)\n (via_dia 0.46)\n (via_drill 0.254)\n (uvia_dia 0.69)\n (uvia_drill 0.34)\n (add_net /1V0)\n (add_net /1V8)\n (add_net /1V8_OSC)\n (add_net /3V3A)\n (add_net /3V3D)\n (add_net /3V6)\n (add_net /5V)\n (add_net /A)\n (add_net /ADC+)\n (add_net /ADC-)\n (add_net /ADC_VCM)\n (add_net /ATTEN_LE)\n (add_net /ATTEN_SPI_DATA)\n (add_net /B)\n (add_net /CLK_ADC)\n (add_net /CLK_FPGA)\n (add_net /CLK_LO)\n (add_net /CLK_SOURCE)\n (add_net /DITHER)\n (add_net /FILTER_V1)\n (add_net /FILTER_V2)\n (add_net /FILTER_V3)\n (add_net /FILTER_V4)\n (add_net /LO_CE)\n (add_net /LO_LD)\n (add_net /LO_LE)\n (add_net /LO_MUXOUT)\n (add_net /LO_RF_ENABLE)\n (add_net /LO_SPI_DATA)\n (add_net /MIXER_ENABLE)\n (add_net /PDET)\n (add_net /PORT1)\n (add_net /PORT2)\n (add_net /PORT_SW0)\n (add_net /PORT_SW1)\n (add_net /PWDN)\n (add_net /RX1)\n (add_net /RX2)\n (add_net /RX_SW0)\n (add_net /RX_SW1)\n (add_net /RX_SW2)\n (add_net /RX_SW3)\n (add_net /RX_SW4)\n (add_net /RX_SW5)\n (add_net /SOURCE_CE)\n (add_net /SOURCE_LD)\n (add_net /SOURCE_LE)\n (add_net /SOURCE_MUXOUT)\n (add_net /SOURCE_RF_ENABLE)\n (add_net /SOURCE_SPI_DATA)\n (add_net /SPI_CLK)\n (add_net /filter_bank/RF_IN)\n (add_net /filter_bank/RF_OUT)\n (add_net /fpga/ADC_OE)\n (add_net /fpga/ADC_SHDN)\n (add_net /fpga/CCLK)\n (add_net /fpga/D0)\n (add_net /fpga/D1)\n (add_net /fpga/D10)\n (add_net /fpga/D11)\n (add_net /fpga/D12)\n (add_net /fpga/D13)\n (add_net /fpga/D2)\n (add_net /fpga/D3)\n (add_net /fpga/D4)\n (add_net /fpga/D5)\n (add_net /fpga/D6)\n (add_net /fpga/D7)\n (add_net /fpga/D8)\n (add_net /fpga/D9)\n (add_net /fpga/FT_D0)\n (add_net /fpga/FT_D1)\n (add_net /fpga/FT_D2)\n (add_net /fpga/FT_D3)\n (add_net /fpga/FT_D4)\n (add_net /fpga/FT_D5)\n (add_net /fpga/FT_D6)\n (add_net /fpga/FT_D7)\n (add_net /fpga/INIT_B)\n (add_net /fpga/LED)\n (add_net /fpga/M0)\n (add_net /fpga/M1)\n (add_net /fpga/M2)\n (add_net /fpga/OF)\n (add_net /fpga/PROGRAM_B)\n (add_net /fpga/RD#)\n (add_net /fpga/RXF#)\n (add_net /fpga/SI/WUB)\n (add_net /fpga/SPI_CS)\n (add_net /fpga/SPI_DIN)\n (add_net /fpga/SPI_MOSI)\n (add_net /fpga/TCK)\n (add_net /fpga/TDI)\n (add_net /fpga/TDO)\n (add_net /fpga/TMS)\n (add_net /fpga/TXE#)\n (add_net /fpga/WR)\n (add_net /fpga/adc/3V0)\n (add_net /fpga/adc/REFH)\n (add_net /fpga/adc/REFL)\n (add_net /fpga/usb/5V)\n (add_net /fpga/usb/DO)\n (add_net /fpga/usb/EECS)\n (add_net /fpga/usb/EEDATA)\n (add_net /fpga/usb/EESK)\n (add_net /fpga/usb/USBDM)\n (add_net /fpga/usb/USBDP)\n (add_net /fpga/usb/USB_5V)\n (add_net \"/port switch/RFC\")\n (add_net /power/12V)\n (add_net /power/12V_IN)\n (add_net /power/SYNC_3V3)\n (add_net /power/fpga_power/SYNC_1V0)\n (add_net /power/fpga_power/SYNC_1V8)\n (add_net /receiver/5VF)\n (add_net /receiver/DETO)\n (add_net /receiver/DITHER)\n (add_net /receiver/IF+)\n (add_net /receiver/IF-)\n (add_net /receiver/LON)\n (add_net /receiver/LOP)\n (add_net /receiver/RF_BALUN)\n (add_net /receiver/RF_IN)\n (add_net \"/receiver/RX switch/3V3\")\n (add_net /receiver/lo_synth/3V3_RF)\n (add_net /transmitter/3V3_RF)\n (add_net /transmitter/RF_OUT_N)\n (add_net /transmitter/RF_OUT_P)\n (add_net /tx_amp/DET_IN)\n (add_net /tx_amp/OUTP)\n (add_net /tx_amp/RF_IN)\n (add_net 3V3A_RX)\n (add_net GND)\n (add_net \"Net-(C101-Pad1)\")\n (add_net \"Net-(C101-Pad2)\")\n (add_net \"Net-(C104-Pad1)\")\n (add_net \"Net-(C104-Pad2)\")\n (add_net \"Net-(C105-Pad1)\")\n (add_net \"Net-(C106-Pad1)\")\n (add_net \"Net-(C108-Pad1)\")\n (add_net \"Net-(C109-Pad1)\")\n (add_net \"Net-(C11-Pad1)\")\n (add_net \"Net-(C110-Pad1)\")\n (add_net \"Net-(C111-Pad1)\")\n (add_net \"Net-(C113-Pad1)\")\n (add_net \"Net-(C115-Pad1)\")\n (add_net \"Net-(C12-Pad2)\")\n (add_net \"Net-(C121-Pad2)\")\n (add_net \"Net-(C122-Pad2)\")\n (add_net \"Net-(C123-Pad2)\")\n (add_net \"Net-(C125-Pad2)\")\n (add_net \"Net-(C126-Pad2)\")\n (add_net \"Net-(C129-Pad1)\")\n (add_net \"Net-(C130-Pad1)\")\n (add_net \"Net-(C132-Pad1)\")\n (add_net \"Net-(C132-Pad2)\")\n (add_net \"Net-(C133-Pad1)\")\n (add_net \"Net-(C135-Pad1)\")\n (add_net \"Net-(C135-Pad2)\")\n (add_net \"Net-(C138-Pad1)\")\n (add_net \"Net-(C139-Pad1)\")\n (add_net \"Net-(C142-Pad1)\")\n (add_net \"Net-(C144-Pad1)\")\n (add_net \"Net-(C144-Pad2)\")\n (add_net \"Net-(C145-Pad1)\")\n (add_net \"Net-(C146-Pad1)\")\n (add_net \"Net-(C146-Pad2)\")\n (add_net \"Net-(C15-Pad1)\")\n (add_net \"Net-(C150-Pad1)\")\n (add_net \"Net-(C151-Pad2)\")\n (add_net \"Net-(C152-Pad1)\")\n (add_net \"Net-(C152-Pad2)\")\n (add_net \"Net-(C157-Pad2)\")\n (add_net \"Net-(C16-Pad1)\")\n (add_net \"Net-(C166-Pad1)\")\n (add_net \"Net-(C168-Pad1)\")\n (add_net \"Net-(C17-Pad1)\")\n (add_net \"Net-(C171-Pad1)\")\n (add_net \"Net-(C172-Pad1)\")\n (add_net \"Net-(C179-Pad2)\")\n (add_net \"Net-(C18-Pad1)\")\n (add_net \"Net-(C180-Pad2)\")\n (add_net \"Net-(C19-Pad1)\")\n (add_net \"Net-(C205-Pad1)\")\n (add_net \"Net-(C205-Pad2)\")\n (add_net \"Net-(C208-Pad1)\")\n (add_net \"Net-(C209-Pad1)\")\n (add_net \"Net-(C21-Pad1)\")\n (add_net \"Net-(C210-Pad1)\")\n (add_net \"Net-(C213-Pad1)\")\n (add_net \"Net-(C226-Pad1)\")\n (add_net \"Net-(C234-Pad1)\")\n (add_net \"Net-(C234-Pad2)\")\n (add_net \"Net-(C235-Pad1)\")\n (add_net \"Net-(C235-Pad2)\")\n (add_net \"Net-(C236-Pad1)\")\n (add_net \"Net-(C237-Pad1)\")\n (add_net \"Net-(C238-Pad1)\")\n (add_net \"Net-(C239-Pad1)\")\n (add_net \"Net-(C255-Pad1)\")\n (add_net \"Net-(C261-Pad1)\")\n (add_net \"Net-(C28-Pad2)\")\n (add_net \"Net-(C3-Pad1)\")\n (add_net \"Net-(C3-Pad2)\")\n (add_net \"Net-(C30-Pad1)\")\n (add_net \"Net-(C30-Pad2)\")\n (add_net \"Net-(C32-Pad1)\")\n (add_net \"Net-(C37-Pad2)\")\n (add_net \"Net-(C38-Pad1)\")\n (add_net \"Net-(C44-Pad2)\")\n (add_net \"Net-(C45-Pad1)\")\n (add_net \"Net-(C46-Pad2)\")\n (add_net \"Net-(C52-Pad1)\")\n (add_net \"Net-(C52-Pad2)\")\n (add_net \"Net-(C57-Pad1)\")\n (add_net \"Net-(C58-Pad1)\")\n (add_net \"Net-(C59-Pad1)\")\n (add_net \"Net-(C6-Pad1)\")\n (add_net \"Net-(C60-Pad1)\")\n (add_net \"Net-(C61-Pad1)\")\n (add_net \"Net-(C63-Pad1)\")\n (add_net \"Net-(C7-Pad1)\")\n (add_net \"Net-(C7-Pad2)\")\n (add_net \"Net-(C72-Pad1)\")\n (add_net \"Net-(C72-Pad2)\")\n (add_net \"Net-(C74-Pad1)\")\n (add_net \"Net-(C8-Pad2)\")\n (add_net \"Net-(C81-Pad1)\")\n (add_net \"Net-(C82-Pad1)\")\n (add_net \"Net-(C85-Pad1)\")\n (add_net \"Net-(C9-Pad2)\")\n (add_net \"Net-(C90-Pad1)\")\n (add_net \"Net-(C92-Pad1)\")\n (add_net \"Net-(C92-Pad2)\")\n (add_net \"Net-(C93-Pad1)\")\n (add_net \"Net-(C93-Pad2)\")\n (add_net \"Net-(C94-Pad1)\")\n (add_net \"Net-(C94-Pad2)\")\n (add_net \"Net-(C95-Pad1)\")\n (add_net \"Net-(C95-Pad2)\")\n (add_net \"Net-(C96-Pad1)\")\n (add_net \"Net-(C96-Pad2)\")\n (add_net \"Net-(C97-Pad1)\")\n (add_net \"Net-(C97-Pad2)\")\n (add_net \"Net-(C98-Pad1)\")\n (add_net \"Net-(C98-Pad2)\")\n (add_net \"Net-(C99-Pad1)\")\n (add_net \"Net-(C99-Pad2)\")\n (add_net \"Net-(D1-Pad1)\")\n (add_net \"Net-(D2-Pad1)\")\n (add_net \"Net-(D3-Pad1)\")\n (add_net \"Net-(D4-Pad1)\")\n (add_net \"Net-(D5-Pad2)\")\n (add_net \"Net-(D6-Pad2)\")\n (add_net \"Net-(F1-Pad1)\")\n (add_net \"Net-(F15-Pad1)\")\n (add_net \"Net-(F16-Pad1)\")\n (add_net \"Net-(F2-Pad1)\")\n (add_net \"Net-(P26-Pad1)\")\n (add_net \"Net-(P27-Pad1)\")\n (add_net \"Net-(P28-Pad1)\")\n (add_net \"Net-(P9-Pad1)\")\n (add_net \"Net-(R1-Pad2)\")\n (add_net \"Net-(R11-Pad1)\")\n (add_net \"Net-(R119-Pad2)\")\n (add_net \"Net-(R12-Pad2)\")\n (add_net \"Net-(R120-Pad2)\")\n (add_net \"Net-(R122-Pad2)\")\n (add_net \"Net-(R13-Pad2)\")\n (add_net \"Net-(R130-Pad1)\")\n (add_net \"Net-(R131-Pad2)\")\n (add_net \"Net-(R132-Pad2)\")\n (add_net \"Net-(R133-Pad1)\")\n (add_net \"Net-(R14-Pad1)\")\n (add_net \"Net-(R15-Pad2)\")\n (add_net \"Net-(R2-Pad2)\")\n (add_net \"Net-(R29-Pad1)\")\n (add_net \"Net-(R3-Pad2)\")\n (add_net \"Net-(R30-Pad2)\")\n (add_net \"Net-(R31-Pad2)\")\n (add_net \"Net-(R32-Pad1)\")\n (add_net \"Net-(R33-Pad2)\")\n (add_net \"Net-(R34-Pad1)\")\n (add_net \"Net-(R4-Pad2)\")\n (add_net \"Net-(R45-Pad2)\")\n (add_net \"Net-(R46-Pad2)\")\n (add_net \"Net-(R50-Pad2)\")\n (add_net \"Net-(R51-Pad2)\")\n (add_net \"Net-(R54-Pad2)\")\n (add_net \"Net-(R55-Pad2)\")\n (add_net \"Net-(R56-Pad2)\")\n (add_net \"Net-(R66-Pad2)\")\n (add_net \"Net-(R67-Pad1)\")\n (add_net \"Net-(R68-Pad1)\")\n (add_net \"Net-(R69-Pad2)\")\n (add_net \"Net-(R71-Pad2)\")\n (add_net \"Net-(R8-Pad2)\")\n (add_net \"Net-(R80-Pad1)\")\n (add_net \"Net-(R81-Pad1)\")\n (add_net \"Net-(R82-Pad2)\")\n (add_net \"Net-(R84-Pad2)\")\n (add_net \"Net-(R85-Pad2)\")\n (add_net \"Net-(R88-Pad2)\")\n (add_net \"Net-(R9-Pad2)\")\n (add_net \"Net-(R91-Pad2)\")\n (add_net \"Net-(R93-Pad1)\")\n (add_net \"Net-(R94-Pad1)\")\n (add_net \"Net-(R96-Pad1)\")\n (add_net \"Net-(R97-Pad1)\")\n (add_net \"Net-(R98-Pad1)\")\n (add_net \"Net-(U24-Pad1)\")\n (add_net \"Net-(U24-Pad4)\")\n (add_net \"Net-(U25-Pad4)\")\n (add_net \"Net-(U30-PadA7)\")\n (add_net \"Net-(U30-PadB1)\")\n (add_net \"Net-(U30-PadB14)\")\n (add_net \"Net-(U30-PadB2)\")\n (add_net \"Net-(U30-PadB5)\")\n (add_net \"Net-(U30-PadB6)\")\n (add_net \"Net-(U30-PadB7)\")\n (add_net \"Net-(U30-PadC1)\")\n (add_net \"Net-(U30-PadC11)\")\n (add_net \"Net-(U30-PadC12)\")\n (add_net \"Net-(U30-PadC13)\")\n (add_net \"Net-(U30-PadC14)\")\n (add_net \"Net-(U30-PadC2)\")\n (add_net \"Net-(U30-PadC3)\")\n (add_net \"Net-(U30-PadC4)\")\n (add_net \"Net-(U30-PadC6)\")\n (add_net \"Net-(U30-PadC7)\")\n (add_net \"Net-(U30-PadC8)\")\n (add_net \"Net-(U30-PadC9)\")\n (add_net \"Net-(U30-PadD10)\")\n (add_net \"Net-(U30-PadD11)\")\n (add_net \"Net-(U30-PadD13)\")\n (add_net \"Net-(U30-PadD14)\")\n (add_net \"Net-(U30-PadD15)\")\n (add_net \"Net-(U30-PadD3)\")\n (add_net \"Net-(U30-PadD4)\")\n (add_net \"Net-(U30-PadD5)\")\n (add_net \"Net-(U30-PadD6)\")\n (add_net \"Net-(U30-PadD8)\")\n (add_net \"Net-(U30-PadD9)\")\n (add_net \"Net-(U30-PadE11)\")\n (add_net \"Net-(U30-PadE12)\")\n (add_net \"Net-(U30-PadE13)\")\n (add_net \"Net-(U30-PadE15)\")\n (add_net \"Net-(U30-PadE2)\")\n (add_net \"Net-(U30-PadE3)\")\n (add_net \"Net-(U30-PadE5)\")\n (add_net \"Net-(U30-PadE6)\")\n (add_net \"Net-(U30-PadF15)\")\n (add_net \"Net-(U30-PadF2)\")\n (add_net \"Net-(U30-PadF3)\")\n (add_net \"Net-(U30-PadF4)\")\n (add_net \"Net-(U30-PadF5)\")\n (add_net \"Net-(U30-PadG11)\")\n (add_net \"Net-(U30-PadG12)\")\n (add_net \"Net-(U30-PadG15)\")\n (add_net \"Net-(U30-PadG16)\")\n (add_net \"Net-(U30-PadG4)\")\n (add_net \"Net-(U30-PadG5)\")\n (add_net \"Net-(U30-PadH11)\")\n (add_net \"Net-(U30-PadH12)\")\n (add_net \"Net-(U30-PadH13)\")\n (add_net \"Net-(U30-PadH14)\")\n (add_net \"Net-(U30-PadH3)\")\n (add_net \"Net-(U30-PadH4)\")\n (add_net \"Net-(U30-PadH5)\")\n (add_net \"Net-(U30-PadJ15)\")\n (add_net \"Net-(U30-PadJ3)\")\n (add_net \"Net-(U30-PadJ4)\")\n (add_net \"Net-(U30-PadJ5)\")\n (add_net \"Net-(U30-PadK12)\")\n (add_net \"Net-(U30-PadK13)\")\n (add_net \"Net-(U30-PadK3)\")\n (add_net \"Net-(U30-PadK5)\")\n (add_net \"Net-(U30-PadL13)\")\n (add_net \"Net-(U30-PadL14)\")\n (add_net \"Net-(U30-PadL2)\")\n (add_net \"Net-(U30-PadL4)\")\n (add_net \"Net-(U30-PadL5)\")\n (add_net \"Net-(U30-PadM1)\")\n (add_net \"Net-(U30-PadM12)\")\n (add_net \"Net-(U30-PadM15)\")\n (add_net \"Net-(U30-PadM16)\")\n (add_net \"Net-(U30-PadM2)\")\n (add_net \"Net-(U30-PadM4)\")\n (add_net \"Net-(U30-PadM5)\")\n (add_net \"Net-(U30-PadM6)\")\n (add_net \"Net-(U30-PadN1)\")\n (add_net \"Net-(U30-PadN12)\")\n (add_net \"Net-(U30-PadN13)\")\n (add_net \"Net-(U30-PadN16)\")\n (add_net \"Net-(U30-PadN2)\")\n (add_net \"Net-(U30-PadN3)\")\n (add_net \"Net-(U30-PadN4)\")\n (add_net \"Net-(U30-PadN6)\")\n (add_net \"Net-(U30-PadN9)\")\n (add_net \"Net-(U30-PadP10)\")\n (add_net \"Net-(U30-PadP11)\")\n (add_net \"Net-(U30-PadP13)\")\n (add_net \"Net-(U30-PadP14)\")\n (add_net \"Net-(U30-PadP15)\")\n (add_net \"Net-(U30-PadP3)\")\n (add_net \"Net-(U30-PadP4)\")\n (add_net \"Net-(U30-PadP5)\")\n (add_net \"Net-(U30-PadP6)\")\n (add_net \"Net-(U30-PadR10)\")\n (add_net \"Net-(U30-PadR11)\")\n (add_net \"Net-(U30-PadR12)\")\n (add_net \"Net-(U30-PadR13)\")\n (add_net \"Net-(U30-PadR15)\")\n (add_net \"Net-(U30-PadR2)\")\n (add_net \"Net-(U31-Pad4)\")\n (add_net \"Net-(U31-PadSH)\")\n (add_net \"Net-(U33-Pad11)\")\n (add_net \"Net-(U33-Pad12)\")\n (add_net \"Net-(U33-Pad13)\")\n (add_net \"Net-(U33-Pad15)\")\n (add_net \"Net-(U33-Pad16)\")\n (add_net \"Net-(U33-Pad17)\")\n (add_net \"Net-(U33-Pad19)\")\n (add_net \"Net-(U33-Pad20)\")\n (add_net \"Net-(U33-Pad41)\")\n (add_net \"Net-(U7-Pad22)\")\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 58880A71)\n (at 153.97 117.65 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/5837DA7A/58869DE9)\n (attr smd)\n (fp_text reference C272 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 58878ED4)\n (at 142.73 117.8 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/5837DA7A/588692CD)\n (attr smd)\n (fp_text reference C271 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 588712E1)\n (at 148.64 68.09 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/58860714)\n (attr smd)\n (fp_text reference C270 (at 0 -1.7 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 365 /PDET))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 5886FF69)\n (at 153.49 61.29 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/588609C7)\n (attr smd)\n (fp_text reference R122 (at 0 -1.4 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 365 /PDET))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 426 \"Net-(R122-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:FTG256 (layer F.Cu) (tedit 5870D8C7) (tstamp 584E6390)\n (at 136.675 68.25)\n (path /5837E082/583D8085)\n (zone_connect 0)\n (fp_text reference U30 (at -7.175 9.47) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value XC7A15T-1FTG256C (at 0 -9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -8.5 -8.5) (end -10 -10) (layer F.SilkS) (width 0.15))\n (fp_line (start -8.5 8.5) (end -8.5 -8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.5 8.5) (end -8.5 8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 8.5 -8.5) (end 8.5 8.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -8.5 -8.5) (end 8.5 -8.5) (layer F.SilkS) (width 0.15))\n (pad T16 smd circle (at 7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R16 smd circle (at 7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 138 /SOURCE_LD) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P16 smd circle (at 7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 132 /LO_LD) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N16 smd circle (at 7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 335 \"Net-(U30-PadN16)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M16 smd circle (at 7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 334 \"Net-(U30-PadM16)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L16 smd circle (at 7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K16 smd circle (at 7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 178 /DITHER) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J16 smd circle (at 7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 134 /LO_MUXOUT) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H16 smd circle (at 7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 140 /SOURCE_MUXOUT) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G16 smd circle (at 7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 333 \"Net-(U30-PadG16)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F16 smd circle (at 7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E16 smd circle (at 7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 174 /PORT_SW0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D16 smd circle (at 7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 173 /PORT_SW1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad C16 smd circle (at 7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 328 /ATTEN_LE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad B16 smd circle (at 7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 195 /FILTER_V2) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A16 smd circle (at 7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T15 smd circle (at 6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 139 /SOURCE_RF_ENABLE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R15 smd circle (at 6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 332 \"Net-(U30-PadR15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P15 smd circle (at 6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 331 \"Net-(U30-PadP15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N15 smd circle (at 6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M15 smd circle (at 6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 330 \"Net-(U30-PadM15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L15 smd circle (at 6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 190 \"Net-(R69-Pad2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K15 smd circle (at 6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 135 /SOURCE_SPI_DATA) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J15 smd circle (at 6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 329 \"Net-(U30-PadJ15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad H15 smd circle (at 6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G15 smd circle (at 6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 416 \"Net-(U30-PadG15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F15 smd circle (at 6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 327 \"Net-(U30-PadF15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad E15 smd circle (at 6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 326 \"Net-(U30-PadE15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D15 smd circle (at 6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 325 \"Net-(U30-PadD15)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C15 smd circle (at 6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad B15 smd circle (at 6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 320 /ATTEN_SPI_DATA) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A15 smd circle (at 6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 194 /FILTER_V1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T14 smd circle (at 5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 133 /LO_RF_ENABLE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R14 smd circle (at 5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P14 smd circle (at 5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 324 \"Net-(U30-PadP14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N14 smd circle (at 5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 418 \"Net-(R130-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M14 smd circle (at 5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 127 /LO_SPI_DATA) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L14 smd circle (at 5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 323 \"Net-(U30-PadL14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K14 smd circle (at 5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J14 smd circle (at 5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 395 /fpga/SPI_DIN) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H14 smd circle (at 5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 322 \"Net-(U30-PadH14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G14 smd circle (at 5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 128 /LO_LE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F14 smd circle (at 5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 129 /LO_CE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E14 smd circle (at 5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D14 smd circle (at 5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 321 \"Net-(U30-PadD14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C14 smd circle (at 5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 417 \"Net-(U30-PadC14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B14 smd circle (at 5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 319 \"Net-(U30-PadB14)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A14 smd circle (at 5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 197 /FILTER_V3) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T13 smd circle (at 4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 362 /fpga/ADC_SHDN) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R13 smd circle (at 4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 318 \"Net-(U30-PadR13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P13 smd circle (at 4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 317 \"Net-(U30-PadP13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N13 smd circle (at 4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 316 \"Net-(U30-PadN13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M13 smd circle (at 4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L13 smd circle (at 4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 315 \"Net-(U30-PadL13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K13 smd circle (at 4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 314 \"Net-(U30-PadK13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad J13 smd circle (at 4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 396 /fpga/SPI_MOSI) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H13 smd circle (at 4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 313 \"Net-(U30-PadH13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G13 smd circle (at 4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F13 smd circle (at 4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 137 /SOURCE_CE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E13 smd circle (at 4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 312 \"Net-(U30-PadE13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D13 smd circle (at 4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 311 \"Net-(U30-PadD13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C13 smd circle (at 4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 310 \"Net-(U30-PadC13)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B13 smd circle (at 4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A13 smd circle (at 4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 196 /FILTER_V4) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T12 smd circle (at 3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 361 /fpga/ADC_OE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R12 smd circle (at 3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 309 \"Net-(U30-PadR12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P12 smd circle (at 3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N12 smd circle (at 3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 308 \"Net-(U30-PadN12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M12 smd circle (at 3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 307 \"Net-(U30-PadM12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L12 smd circle (at 3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 400 /fpga/SPI_CS) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K12 smd circle (at 3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 306 \"Net-(U30-PadK12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad J12 smd circle (at 3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H12 smd circle (at 3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 305 \"Net-(U30-PadH12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G12 smd circle (at 3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 304 \"Net-(U30-PadG12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F12 smd circle (at 3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 136 /SOURCE_LE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E12 smd circle (at 3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 303 \"Net-(U30-PadE12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D12 smd circle (at 3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad C12 smd circle (at 3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 302 \"Net-(U30-PadC12)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B12 smd circle (at 3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 301 /fpga/FT_D1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A12 smd circle (at 3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 300 /fpga/FT_D0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T11 smd circle (at 2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R11 smd circle (at 2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 299 \"Net-(U30-PadR11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P11 smd circle (at 2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 298 \"Net-(U30-PadP11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N11 smd circle (at 2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 297 /CLK_FPGA) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M11 smd circle (at 2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 399 /fpga/M2) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L11 smd circle (at 2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K11 smd circle (at 2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J11 smd circle (at 2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H11 smd circle (at 2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 296 \"Net-(U30-PadH11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G11 smd circle (at 2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 295 \"Net-(U30-PadG11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F11 smd circle (at 2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E11 smd circle (at 2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 294 \"Net-(U30-PadE11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D11 smd circle (at 2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 293 \"Net-(U30-PadD11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C11 smd circle (at 2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 292 \"Net-(U30-PadC11)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B11 smd circle (at 2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 291 /fpga/FT_D2) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A11 smd circle (at 2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T10 smd circle (at 1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 262 /fpga/D0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R10 smd circle (at 1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 289 \"Net-(U30-PadR10)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P10 smd circle (at 1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 288 \"Net-(U30-PadP10)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N10 smd circle (at 1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M10 smd circle (at 1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 401 /fpga/M1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L10 smd circle (at 1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K10 smd circle (at 1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 398 /fpga/INIT_B) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J10 smd circle (at 1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H10 smd circle (at 1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 394 \"Net-(P9-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G10 smd circle (at 1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F10 smd circle (at 1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E10 smd circle (at 1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D10 smd circle (at 1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 287 \"Net-(U30-PadD10)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C10 smd circle (at 1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad B10 smd circle (at 1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 286 /fpga/FT_D3) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A10 smd circle (at 1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 285 /fpga/FT_D5) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T9 smd circle (at 0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 268 /fpga/D1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R9 smd circle (at 0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P9 smd circle (at 0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 263 /fpga/D2) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N9 smd circle (at 0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 282 \"Net-(U30-PadN9)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M9 smd circle (at 0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 397 /fpga/M0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L9 smd circle (at 0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 402 /fpga/PROGRAM_B) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K9 smd circle (at 0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J9 smd circle (at 0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H9 smd circle (at 0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G9 smd circle (at 0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F9 smd circle (at 0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E9 smd circle (at 0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D9 smd circle (at 0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 281 \"Net-(U30-PadD9)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C9 smd circle (at 0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 280 \"Net-(U30-PadC9)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B9 smd circle (at 0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 279 /fpga/FT_D4) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A9 smd circle (at 0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 278 /fpga/FT_D6) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T8 smd circle (at -0.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 290 /fpga/D5) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R8 smd circle (at -0.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 254 /fpga/D4) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P8 smd circle (at -0.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 255 /fpga/D3) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N8 smd circle (at -0.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 274 /fpga/TDO) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M8 smd circle (at -0.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L8 smd circle (at -0.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K8 smd circle (at -0.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J8 smd circle (at -0.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H8 smd circle (at -0.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 365 /PDET) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G8 smd circle (at -0.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 273 \"Net-(C205-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F8 smd circle (at -0.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E8 smd circle (at -0.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 393 /fpga/CCLK) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D8 smd circle (at -0.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 272 \"Net-(U30-PadD8)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C8 smd circle (at -0.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 271 \"Net-(U30-PadC8)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B8 smd circle (at -0.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A8 smd circle (at -0.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 270 /fpga/FT_D7) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T7 smd circle (at -1.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 277 /fpga/D7) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R7 smd circle (at -1.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 284 /fpga/D6) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P7 smd circle (at -1.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N7 smd circle (at -1.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 187 /fpga/TDI) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M7 smd circle (at -1.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 192 /fpga/TMS) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L7 smd circle (at -1.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 183 /fpga/TCK) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K7 smd circle (at -1.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J7 smd circle (at -1.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H7 smd circle (at -1.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G7 smd circle (at -1.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 267 \"Net-(C205-Pad2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F7 smd circle (at -1.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E7 smd circle (at -1.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D7 smd circle (at -1.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad C7 smd circle (at -1.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 266 \"Net-(U30-PadC7)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B7 smd circle (at -1.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 265 \"Net-(U30-PadB7)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A7 smd circle (at -1.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 264 \"Net-(U30-PadA7)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad T6 smd circle (at -2.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R6 smd circle (at -2.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 269 /fpga/D8) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P6 smd circle (at -2.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 407 \"Net-(U30-PadP6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N6 smd circle (at -2.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 408 \"Net-(U30-PadN6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M6 smd circle (at -2.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 409 \"Net-(U30-PadM6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L6 smd circle (at -2.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K6 smd circle (at -2.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J6 smd circle (at -2.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H6 smd circle (at -2.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G6 smd circle (at -2.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F6 smd circle (at -2.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E6 smd circle (at -2.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 259 \"Net-(U30-PadE6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D6 smd circle (at -2.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 258 \"Net-(U30-PadD6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C6 smd circle (at -2.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 257 \"Net-(U30-PadC6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B6 smd circle (at -2.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 256 \"Net-(U30-PadB6)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A6 smd circle (at -2.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T5 smd circle (at -3.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 276 /fpga/D9) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R5 smd circle (at -3.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 275 /fpga/D10) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P5 smd circle (at -3.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 253 \"Net-(U30-PadP5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N5 smd circle (at -3.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad M5 smd circle (at -3.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 252 \"Net-(U30-PadM5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L5 smd circle (at -3.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 251 \"Net-(U30-PadL5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K5 smd circle (at -3.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 250 \"Net-(U30-PadK5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad J5 smd circle (at -3.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 249 \"Net-(U30-PadJ5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad H5 smd circle (at -3.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 248 \"Net-(U30-PadH5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G5 smd circle (at -3.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 247 \"Net-(U30-PadG5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F5 smd circle (at -3.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 246 \"Net-(U30-PadF5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad E5 smd circle (at -3.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 245 \"Net-(U30-PadE5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D5 smd circle (at -3.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 244 \"Net-(U30-PadD5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C5 smd circle (at -3.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad B5 smd circle (at -3.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 243 \"Net-(U30-PadB5)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A5 smd circle (at -3.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 242 /fpga/SI/WUB) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T4 smd circle (at -4.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 261 /fpga/D11) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R4 smd circle (at -4.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P4 smd circle (at -4.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 241 \"Net-(U30-PadP4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N4 smd circle (at -4.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 240 \"Net-(U30-PadN4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M4 smd circle (at -4.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 239 \"Net-(U30-PadM4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L4 smd circle (at -4.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 238 \"Net-(U30-PadL4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K4 smd circle (at -4.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J4 smd circle (at -4.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 237 \"Net-(U30-PadJ4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad H4 smd circle (at -4.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 236 \"Net-(U30-PadH4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G4 smd circle (at -4.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 235 \"Net-(U30-PadG4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad F4 smd circle (at -4.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 234 \"Net-(U30-PadF4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad E4 smd circle (at -4.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad D4 smd circle (at -4.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 233 \"Net-(U30-PadD4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C4 smd circle (at -4.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 232 \"Net-(U30-PadC4)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B4 smd circle (at -4.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 231 /fpga/RD#) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A4 smd circle (at -4.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 230 /fpga/WR) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T3 smd circle (at -5.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 260 /fpga/D12) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R3 smd circle (at -5.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 283 /fpga/D13) (solder_mask_margin 0.05) (zone_connect 0))\n (pad P3 smd circle (at -5.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 229 \"Net-(U30-PadP3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N3 smd circle (at -5.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 228 \"Net-(U30-PadN3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M3 smd circle (at -5.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad L3 smd circle (at -5.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 189 /PWDN) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K3 smd circle (at -5.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 227 \"Net-(U30-PadK3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad J3 smd circle (at -5.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 226 \"Net-(U30-PadJ3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad H3 smd circle (at -5.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 225 \"Net-(U30-PadH3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad G3 smd circle (at -5.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F3 smd circle (at -5.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 224 \"Net-(U30-PadF3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad E3 smd circle (at -5.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 223 \"Net-(U30-PadE3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D3 smd circle (at -5.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 222 \"Net-(U30-PadD3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad C3 smd circle (at -5.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 221 \"Net-(U30-PadC3)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B3 smd circle (at -5.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad A3 smd circle (at -5.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 220 /fpga/TXE#) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T2 smd circle (at -6.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 360 /fpga/OF) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R2 smd circle (at -6.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 219 \"Net-(U30-PadR2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P2 smd circle (at -6.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad N2 smd circle (at -6.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 218 \"Net-(U30-PadN2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M2 smd circle (at -6.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 217 \"Net-(U30-PadM2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L2 smd circle (at -6.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 216 \"Net-(U30-PadL2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad K2 smd circle (at -6.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 215 /MIXER_ENABLE) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J2 smd circle (at -6.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H2 smd circle (at -6.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 214 /RX_SW2) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G2 smd circle (at -6.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 213 /RX_SW3) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F2 smd circle (at -6.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 212 \"Net-(U30-PadF2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad E2 smd circle (at -6.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 211 \"Net-(U30-PadE2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D2 smd circle (at -6.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad C2 smd circle (at -6.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 210 \"Net-(U30-PadC2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B2 smd circle (at -6.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 209 \"Net-(U30-PadB2)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A2 smd circle (at -6.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 208 /fpga/RXF#) (solder_mask_margin 0.05) (zone_connect 0))\n (pad T1 smd circle (at -7.5 7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad R1 smd circle (at -7.5 6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 423 \"Net-(P27-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad P1 smd circle (at -7.5 5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 424 \"Net-(P26-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad N1 smd circle (at -7.5 4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 207 \"Net-(U30-PadN1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad M1 smd circle (at -7.5 3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 206 \"Net-(U30-PadM1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad L1 smd circle (at -7.5 2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n (pad K1 smd circle (at -7.5 1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 205 /RX_SW0) (solder_mask_margin 0.05) (zone_connect 0))\n (pad J1 smd circle (at -7.5 0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 204 /RX_SW1) (solder_mask_margin 0.05) (zone_connect 0))\n (pad H1 smd circle (at -7.5 -0.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 203 /RX_SW4) (solder_mask_margin 0.05) (zone_connect 0))\n (pad G1 smd circle (at -7.5 -1.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 202 /RX_SW5) (solder_mask_margin 0.05) (zone_connect 0))\n (pad F1 smd circle (at -7.5 -2.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D) (solder_mask_margin 0.05) (zone_connect 0))\n (pad E1 smd circle (at -7.5 -3.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 425 \"Net-(P28-Pad1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad D1 smd circle (at -7.5 -4.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 390 /fpga/LED) (solder_mask_margin 0.05) (zone_connect 0))\n (pad C1 smd circle (at -7.5 -5.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 201 \"Net-(U30-PadC1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad B1 smd circle (at -7.5 -6.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 200 \"Net-(U30-PadB1)\") (solder_mask_margin 0.05) (zone_connect 0))\n (pad A1 smd circle (at -7.5 -7.5) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.05) (zone_connect 0))\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 5885EE24)\n (at 118.3 100.88 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5885A6CF)\n (attr smd)\n (fp_text reference C269 (at 0 -1.675 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 5885EE02)\n (at 119.53 100.87 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5885A5E4)\n (attr smd)\n (fp_text reference C268 (at 0 -1.675 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 5885EDE0)\n (at 119.54 104.07 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5885A329)\n (attr smd)\n (fp_text reference C267 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 58855921)\n (at 126.76 65.51)\n (path /5837E082/58857E4D)\n (fp_text reference P28 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 425 \"Net-(P28-Pad1)\"))\n )\n\n (module Housings_DFN_QFN:DFN-S-8-1EP_6x5mm_Pitch1.27mm (layer F.Cu) (tedit 5870D99E) (tstamp 585711C0)\n (at 152.8 43.915)\n (descr \"8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S] (see Microchip Packaging Specification 00000049BS.pdf)\")\n (tags \"DFN 1.27\")\n (path /5837E082/5856F3E8)\n (attr smd)\n (fp_text reference U40 (at 0.84 -4.085) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value W25Q32JV (at 0 3.575) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.425 -2.65) (end 2.25 -2.65) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.25 2.65) (end 2.25 2.65) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 2.85) (end 3.6 2.85) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3.6 -2.85) (end 3.6 -2.85) (layer F.CrtYd) (width 0.05))\n (fp_line (start 3.6 -2.85) (end 3.6 2.85) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3.6 -2.85) (end -3.6 2.85) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3 -1.5) (end -2 -2.5) (layer F.Fab) (width 0.15))\n (fp_line (start -3 2.5) (end -3 -1.5) (layer F.Fab) (width 0.15))\n (fp_line (start 3 2.5) (end -3 2.5) (layer F.Fab) (width 0.15))\n (fp_line (start 3 -2.5) (end 3 2.5) (layer F.Fab) (width 0.15))\n (fp_line (start -2 -2.5) (end 3 -2.5) (layer F.Fab) (width 0.15))\n (pad 9 smd rect (at -0.6 -1.5375) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.6 -0.5125) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.6 0.512499) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.6 1.5375) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.6 -1.5375) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.6 -0.5125) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.6 0.512499) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.6 1.5375) (size 1.2 1.025) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 8 smd oval (at 2.8 -1.905) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 7 smd oval (at 2.8 -0.635) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 6 smd oval (at 2.8 0.635) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 393 /fpga/CCLK))\n (pad 5 smd oval (at 2.8 1.905) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 396 /fpga/SPI_MOSI))\n (pad 4 smd oval (at -2.8 1.905) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd oval (at -2.8 0.635) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd oval (at -2.8 -0.635) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 395 /fpga/SPI_DIN))\n (pad 1 smd oval (at -2.8 -1.905) (size 1.1 0.45) (layers F.Cu F.Paste F.Mask)\n (net 400 /fpga/SPI_CS))\n (model Housings_DFN_QFN.3dshapes/DFN-S-8-1EP_6x5mm_Pitch1.27mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5869B0F7)\n (at 170.955 71.225)\n (path /562EEB8A/58681CEC)\n (fp_text reference F19 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 185 /CLK_LO))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5869B0D8)\n (at 172.56 67.75)\n (path /562EEB8A/58681CF3)\n (fp_text reference F20 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 185 /CLK_LO))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5867464F)\n (at 135.8 117.25)\n (path /562EEB8A/5837DA7A/58678A9D)\n (fp_text reference F12 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 348 /B))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 58674630)\n (at 145.375 114.4 45)\n (path /562EEB8A/5837DA7A/58678A7F)\n (fp_text reference F7 (at 0.1 1 45) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 345 /RX2))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5867461D)\n (at 137.325 114.425 135)\n (path /562EEB8A/5837DA7A/58678A97)\n (fp_text reference F8 (at 0.1 1 135) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 135) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 348 /B))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5867460A)\n (at 169.03 117.22)\n (path /562EEB8A/5837DA7A/586776E6)\n (fp_text reference F9 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 347 /RX1))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 586745F7)\n (at 147 117.275)\n (path /562EEB8A/5837DA7A/58678A85)\n (fp_text reference F11 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 345 /RX2))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 586745E4)\n (at 141.375 110.425)\n (path /562EEB8A/5837DA7A/586796E0)\n (fp_text reference F16 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 411 \"Net-(F16-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 586745A1)\n (at 167.975 114.225 45)\n (path /562EEB8A/5837DA7A/5867776F)\n (fp_text reference F13 (at 0.1 1 45) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 45) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 347 /RX1))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5867458E)\n (at 158.3 117.2)\n (path /562EEB8A/5837DA7A/58677B37)\n (fp_text reference F14 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 346 /A))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 5867457B)\n (at 150.025 112.575 270)\n (path /562EEB8A/5837DA7A/586796E6)\n (fp_text reference F18 (at 0.1 1 270) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 270) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 270) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 270) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 411 \"Net-(F16-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 58674568)\n (at 155.275 112.6 90)\n (path /562EEB8A/5837DA7A/586796C8)\n (fp_text reference F15 (at 0.1 1 90) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 410 \"Net-(F15-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 58674555)\n (at 164.15 110.275)\n (path /562EEB8A/5837DA7A/586796CE)\n (fp_text reference F17 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 410 \"Net-(F15-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 58674542)\n (at 160.25 114.225 135)\n (path /562EEB8A/5837DA7A/58677B31)\n (fp_text reference F10 (at 0.1 1 135) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 135) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 135) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 346 /A))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585BD661)\n (at 152.75 109.95)\n (path /562EEB8A/583CF52C/585B0CEE)\n (fp_text reference F5 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 46 /receiver/RF_IN))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585BD636)\n (at 158.9 104.85 90)\n (path /562EEB8A/583CF52C/585B0D7F)\n (fp_text reference F6 (at 0.1 1 90) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 46 /receiver/RF_IN))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585B166A)\n (at 178.06 107.82)\n (path /583625EC/585AE3D8)\n (fp_text reference F3 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 405 \"Net-(F1-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585B1657)\n (at 127.82 110.73)\n (path /583625EC/585AEFA4)\n (fp_text reference F4 (at 0.1 1) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 404 \"Net-(F2-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585B1644)\n (at 165.49 64.11 90)\n (path /583625EC/585AE2FF)\n (fp_text reference F1 (at 0.1 1 90) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 405 \"Net-(F1-Pad1)\"))\n )\n\n (module VNA:RF_via (layer F.Cu) (tedit 5883112F) (tstamp 585B1631)\n (at 158.73 64.1 90)\n (path /583625EC/585AEF9E)\n (fp_text reference F2 (at 0.1 1 90) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value Via (at 0 -1.5 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.7 0) (end 0.7 0) (layer F.Mask) (width 0.95))\n (pad 2 thru_hole circle (at -0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 0 90) (size 0.55 0.55) (drill 0.26) (layers *.Cu F.Mask)\n (net 404 \"Net-(F2-Pad1)\"))\n )\n\n (module VNA:TQFN-32 (layer F.Cu) (tedit 5884C4CE) (tstamp 5648EE05)\n (at 165.445 77.18)\n (path /562EEB8A/563156F1/562E8D63)\n (fp_text reference U9 (at 0.115 3.55) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.125)))\n )\n (fp_text value MAX2871 (at -0.085 -3.55) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start 2.515 2.45) (end -2.485 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 -2.55) (end 2.515 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 -2.55) (end 2.515 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 2.45) (end -2.485 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.785 -2.85) (end -2.785 -2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.185 -2.85) (end -2.785 -2.85) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad 32 smd rect (at -1.75 -2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 31 smd rect (at -1.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 30 smd rect (at -0.75 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 134 /LO_MUXOUT))\n (pad 29 smd rect (at -0.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 34 \"Net-(C60-Pad1)\"))\n (pad 28 smd rect (at 0.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 27 smd rect (at 0.75 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 26 smd rect (at 1.25 -2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 133 /LO_RF_ENABLE))\n (pad 25 smd rect (at 1.75 -2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 132 /LO_LD))\n (pad 16 smd rect (at 1.75 2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (pad 15 smd rect (at 1.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 73 \"Net-(R31-Pad2)\"))\n (pad 14 smd rect (at 0.75 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 72 \"Net-(R30-Pad2)\"))\n (pad 13 smd rect (at 0.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 131 /receiver/LON))\n (pad 12 smd rect (at -0.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 130 /receiver/LOP))\n (pad 11 smd rect (at -0.75 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 10 smd rect (at -1.25 2.415 90) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad EP smd rect (at 0 0) (size 3.15 3.15) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad 9 smd rect (at -1.75 2.415 90) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 24 smd rect (at 2.415 -1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 35 \"Net-(C61-Pad1)\"))\n (pad 23 smd rect (at 2.415 -1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 32 \"Net-(C57-Pad1)\"))\n (pad 22 smd rect (at 2.415 -0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 47 \"Net-(R29-Pad1)\"))\n (pad 21 smd rect (at 2.415 -0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 20 smd rect (at 2.415 0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 19 \"Net-(C74-Pad1)\"))\n (pad 19 smd rect (at 2.415 0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 33 \"Net-(C59-Pad1)\"))\n (pad 18 smd rect (at 2.415 1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 17 smd rect (at 2.415 1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (pad 8 smd rect (at -2.415 1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at -2.415 1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 18 \"Net-(C72-Pad2)\"))\n (pad 6 smd rect (at -2.415 0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad 5 smd rect (at -2.415 0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 21 \"Net-(R33-Pad2)\"))\n (pad 4 smd rect (at -2.415 -0.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 129 /LO_CE))\n (pad 3 smd rect (at -2.415 -0.75) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 128 /LO_LE))\n (pad 2 smd rect (at -2.415 -1.25) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 127 /LO_SPI_DATA))\n (pad 1 smd rect (at -2.415 -1.75) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 111 /SPI_CLK))\n )\n\n (module VNA:TQFN-32 (layer F.Cu) (tedit 5884C4D7) (tstamp 5648ED64)\n (at 177.712 52.106 180)\n (path /562E7B12/562E8D63)\n (fp_text reference U5 (at 0.115 3.55 180) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.125)))\n )\n (fp_text value MAX2871 (at -0.085 -3.55 180) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start 2.515 2.45) (end -2.485 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.515 -2.55) (end 2.515 2.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 -2.55) (end 2.515 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.485 2.45) (end -2.485 -2.55) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.785 -2.85) (end -2.785 -2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.185 -2.85) (end -2.785 -2.85) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0 1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 0 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 0 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad 32 smd rect (at -1.75 -2.415 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 31 smd rect (at -1.25 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 30 smd rect (at -0.75 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 140 /SOURCE_MUXOUT))\n (pad 29 smd rect (at -0.25 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 27 \"Net-(C18-Pad1)\"))\n (pad 28 smd rect (at 0.25 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 27 smd rect (at 0.75 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 26 smd rect (at 1.25 -2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 139 /SOURCE_RF_ENABLE))\n (pad 25 smd rect (at 1.75 -2.415 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 138 /SOURCE_LD))\n (pad 16 smd rect (at 1.75 2.415 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (pad 15 smd rect (at 1.25 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 71 \"Net-(R13-Pad2)\"))\n (pad 14 smd rect (at 0.75 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 70 \"Net-(R12-Pad2)\"))\n (pad 13 smd rect (at 0.25 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 4 /transmitter/RF_OUT_N))\n (pad 12 smd rect (at -0.25 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 2 /transmitter/RF_OUT_P))\n (pad 11 smd rect (at -0.75 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 10 smd rect (at -1.25 2.415 270) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad EP smd rect (at 0 0 180) (size 3.15 3.15) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad 9 smd rect (at -1.75 2.415 270) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 24 smd rect (at 2.415 -1.75 180) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 28 \"Net-(C19-Pad1)\"))\n (pad 23 smd rect (at 2.415 -1.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 25 \"Net-(C15-Pad1)\"))\n (pad 22 smd rect (at 2.415 -0.75 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 45 \"Net-(R11-Pad1)\"))\n (pad 21 smd rect (at 2.415 -0.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 20 smd rect (at 2.415 0.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 10 \"Net-(C32-Pad1)\"))\n (pad 19 smd rect (at 2.415 0.75 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 26 \"Net-(C17-Pad1)\"))\n (pad 18 smd rect (at 2.415 1.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 17 smd rect (at 2.415 1.75 180) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (pad 8 smd rect (at -2.415 1.75 180) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at -2.415 1.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 9 \"Net-(C30-Pad2)\"))\n (pad 6 smd rect (at -2.415 0.75 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad 5 smd rect (at -2.415 0.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 20 \"Net-(R15-Pad2)\"))\n (pad 4 smd rect (at -2.415 -0.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 137 /SOURCE_CE))\n (pad 3 smd rect (at -2.415 -0.75 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 136 /SOURCE_LE))\n (pad 2 smd rect (at -2.415 -1.25 180) (size 0.8 0.3) (layers F.Cu F.Paste F.Mask)\n (net 135 /SOURCE_SPI_DATA))\n (pad 1 smd rect (at -2.415 -1.75 180) (size 0.75 0.3) (layers F.Cu F.Paste F.Mask)\n (net 111 /SPI_CLK))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 584E81AE)\n (at 135.825 119.875 270)\n (path /5834D9AA)\n (fp_text reference P7 (at 4.765 -0.365) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 348 /B) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 584E8121)\n (at 147.025 119.875 270)\n (path /5834D99E)\n (fp_text reference P8 (at 4.415 0.155) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 345 /RX2) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 584E80CC)\n (at 169.03 119.86 270)\n (path /5834D9B6)\n (fp_text reference P6 (at 4.52 0) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 347 /RX1) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 584E8077)\n (at 158.325 119.875 270)\n (path /5834D35C)\n (fp_text reference P4 (at 4.705 -0.375) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 346 /A) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 5648ECB2)\n (at 123.625 119.875 270)\n (path /56498D37)\n (fp_text reference P2 (at 4.385 0.105) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 349 /PORT2) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:CONSMA003.062 (layer F.Cu) (tedit 587D0CE3) (tstamp 5648ECA5)\n (at 179.28 119.86 270)\n (path /56493CE9)\n (fp_text reference P1 (at 4.72 -0.28) (layer F.SilkS)\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_text value SMA (at 0 -7.62 270) (layer F.SilkS) hide\n (effects (font (size 1.5 1.5) (thickness 0.15)))\n )\n (fp_line (start 2.25 4.5) (end 2.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 2.25 -4.5) (end 12.25 -4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 -4.5) (end 12.25 4.5) (layer Dwgs.User) (width 0.15))\n (fp_line (start 12.25 4.5) (end 2.25 4.5) (layer Dwgs.User) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 350 /PORT1) (solder_mask_margin 0.5))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 -2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 smd rect (at 0 2.54 270) (size 4.06 1.52) (layers B.Cu B.Mask)\n (net 1 GND) (zone_connect 2) (thermal_width 4) (thermal_gap 0.3))\n (pad 2 thru_hole circle (at 1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 -2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at 0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -0.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.25 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n (pad 2 thru_hole circle (at -1.75 2.1 270) (size 0.5 0.5) (drill 0.25) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E5616)\n (at 127.825 113.35 180)\n (path /583625EC/58362868)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U29 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 157 \"Net-(C172-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 158 \"Net-(R55-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 159 \"Net-(R66-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 160 \"Net-(C179-Pad2)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 404 \"Net-(F2-Pad1)\") (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 161 \"Net-(R68-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E55A6)\n (at 178.06 110.98 180)\n (path /583625EC/583627CE)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U28 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 156 \"Net-(C171-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 155 \"Net-(R54-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 154 \"Net-(R56-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 153 \"Net-(R67-Pad1)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 405 \"Net-(F1-Pad1)\") (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 152 \"Net-(C180-Pad2)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E5536)\n (at 162.1 64.1 180)\n (path /583625EC/58362736)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U27 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 150 \"Net-(C168-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 86 \"Net-(R50-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 87 \"Net-(R51-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 404 \"Net-(F2-Pad1)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 151 \"/port switch/RFC\") (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 405 \"Net-(F1-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E54C6)\n (at 164.149959 112.726639 180)\n (path /562EEB8A/5837DA7A/5837FAA4)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U6 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 149 \"Net-(C81-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 148 \"Net-(R3-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 147 \"Net-(R1-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 146 \"Net-(C9-Pad2)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 410 \"Net-(F15-Pad1)\") (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 145 \"Net-(C8-Pad2)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E5456)\n (at 141.393058 112.872588 180)\n (path /562EEB8A/5837DA7A/5837FAAB)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U10 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 144 \"Net-(C82-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 44 \"Net-(R4-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 89 \"Net-(R2-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 7 \"Net-(C28-Pad2)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 411 \"Net-(F16-Pad1)\") (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 24 \"Net-(C12-Pad2)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:TFLGA-20 (layer F.Cu) (tedit 587D08AF) (tstamp 584E53E6)\n (at 152.775 112.6 180)\n (path /562EEB8A/5837DA7A/5837FA9D)\n (solder_mask_margin 0.1)\n (zone_connect 2)\n (fp_text reference U11 (at 0 3.125 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value PE42420 (at 0 -3.75 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (pad EP thru_hole circle (at 0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 0 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.7 -0.7 270) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 270) (size 2.05 2.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_mask_margin 0.1) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 20 smd rect (at -1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 143 \"Net-(C85-Pad1)\") (zone_connect 2))\n (pad 19 smd rect (at -0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 18 smd rect (at 0 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 17 smd rect (at 0.5 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 142 \"Net-(R9-Pad2)\") (zone_connect 2))\n (pad 16 smd rect (at 1 -1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 141 \"Net-(R8-Pad2)\") (zone_connect 2))\n (pad 15 smd rect (at 1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 14 smd rect (at 1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 13 smd rect (at 1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 411 \"Net-(F16-Pad1)\") (zone_connect 2))\n (pad 12 smd rect (at 1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd rect (at 1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd rect (at 1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 8 smd rect (at 0 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 46 /receiver/RF_IN) (zone_connect 2))\n (pad 7 smd rect (at -0.5 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1 1.8 270) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -1.8 1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.8 0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at -1.8 0 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 410 \"Net-(F15-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at -1.8 -0.5 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1.8 -1 180) (size 0.6 0.31) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 587D6795)\n (at 149.67 102.5 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/587D3026)\n (attr smd)\n (fp_text reference C266 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 58776DF0)\n (at 169.35 91.3 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/5876CF15)\n (attr smd)\n (fp_text reference C265 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 5876F022)\n (at 110.81 55.76 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5876ADF3)\n (attr smd)\n (fp_text reference C264 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 58749AC7)\n (at 135.03 42.26 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/583ABBE9/5878E72E)\n (attr smd)\n (fp_text reference C263 (at 0 -1.675 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 58740269)\n (at 126.62 73.6)\n (path /5837E082/5873B952)\n (fp_text reference P26 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value TP (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 424 \"Net-(P26-Pad1)\"))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5874025C)\n (at 126.63 75.15)\n (path /5837E082/5873CE94)\n (fp_text reference P27 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value TP (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 423 \"Net-(P27-Pad1)\"))\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 5873A385)\n (at 137.45 96.41 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/583E8E25/58734718)\n (attr smd)\n (fp_text reference C262 (at 0 -1.675 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module TO_SOT_Packages_SMD:SOT-353 (layer F.Cu) (tedit 583F3CBD) (tstamp 58733BB5)\n (at 178.23 59.5 90)\n (descr SOT353)\n (path /5872BB65)\n (attr smd)\n (fp_text reference U42 (at 1.5 2.81 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value NC7S04P5X (at 0 2.25 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.675 1.1) (end -0.675 1.1) (layer F.Fab) (width 0.15))\n (fp_line (start 0.675 -1.1) (end 0.675 1.1) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 1.35) (end 1.5 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.675 -1.1) (end -0.675 1.1) (layer F.Fab) (width 0.15))\n (fp_line (start 0.675 -1.1) (end -0.675 -1.1) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 -1.35) (end 1.5 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.5 -1.35) (end -1.5 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.5 1.35) (end 1.5 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.7 1.16) (end 0.7 1.16) (layer F.SilkS) (width 0.12))\n (fp_line (start 0.7 -1.16) (end -1.2 -1.16) (layer F.SilkS) (width 0.12))\n (pad 4 smd rect (at 0.95 0.65 90) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)\n (net 421 \"Net-(R133-Pad1)\"))\n (pad 2 smd rect (at -0.95 0 90) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)\n (net 338 \"Net-(C3-Pad1)\"))\n (pad 5 smd rect (at 0.95 -0.65 90) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (pad 3 smd rect (at -0.95 0.65 90) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.95 -0.65 90) (size 0.6 0.42) (layers F.Cu F.Paste F.Mask))\n (model TO_SOT_Packages_SMD.3dshapes/SOT-353.wrl\n (at (xyz 0 0 0))\n (scale (xyz 0.07000000000000001 0.09 0.08))\n (rotate (xyz 0 0 90))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 587329CA)\n (at 178.13 57.73)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5872E280)\n (attr smd)\n (fp_text reference C261 (at -1.91 0.34 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5873130A)\n (at 178.86 59.47 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5872A695)\n (attr smd)\n (fp_text reference R133 (at 0 1.4 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1M (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 421 \"Net-(R133-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 338 \"Net-(C3-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 5872502A)\n (at 173.62 56.75 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /58723677)\n (attr smd)\n (fp_text reference R131 (at 0 -1.4 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 420 \"Net-(R131-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 184 /CLK_SOURCE))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 58725008)\n (at 172.28 61.54 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5872395E)\n (attr smd)\n (fp_text reference R132 (at -0.59 -1.4 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 185 /CLK_LO))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 419 \"Net-(R132-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B331)\n (at 161 46.83 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56479534)\n (attr smd)\n (fp_text reference C10 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 98 /tx_amp/RF_IN))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 23 /filter_bank/RF_OUT))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 586FF10A) (tstamp 58726307)\n (at 173.87 99.16 90)\n (path /562EEB8A/58725301)\n (fp_text reference P22 (at 0 2 90) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0 90) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 586FF10A) (tstamp 587262FA)\n (at 173.87 77.7 90)\n (path /562EEB8A/587251EF)\n (fp_text reference P21 (at 0 2 90) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0 90) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 586FF10A) (tstamp 587262ED)\n (at 155.87 99.16 90)\n (path /562EEB8A/58725420)\n (fp_text reference P23 (at 0 2 90) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0 90) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 5870D7A6) (tstamp 587262E0)\n (at 155.87 77.26 90)\n (path /562EEB8A/587277CC)\n (fp_text reference P24 (at 0.27 -0.13 90) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0 90) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 586FF10A) (tstamp 587262D3)\n (at 164.59 107.59)\n (path /562EEB8A/587277D8)\n (fp_text reference P25 (at 0 2) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:S2711-46R (layer F.Cu) (tedit 5870D78B) (tstamp 587262C6)\n (at 164.59 69.4)\n (path /562EEB8A/58724925)\n (fp_text reference P20 (at 0.06 0.07) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value CLIP (at 0.1 0) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd rect (at 0 0) (size 9.4 2.3) (layers F.Cu F.Mask)\n (net 1 GND))\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAFD) (tstamp 584E776A)\n (at 130.74 118.77 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836A3C9)\n (attr smd)\n (fp_text reference C177 (at 0.07 1.21 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 5871D5F4)\n (at 147.7 72.775)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/5871D6FA)\n (attr smd)\n (fp_text reference R130 (at 0 -1.4) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 16 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 418 \"Net-(R130-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 111 /SPI_CLK))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:MountingHole_3.2mm_M3_Pad_Via_mod (layer F.Cu) (tedit 5870D80A) (tstamp 5869B055)\n (at 113.907944 118.322944)\n (descr \"Mounting Hole 3.2mm, M3\")\n (tags \"mounting hole 3.2mm m3\")\n (path /58654422)\n (fp_text reference P18 (at -0.077944 0.057056) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MNT (at 0 4.2) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))\n (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))\n (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 -2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:MountingHole_3.2mm_M3_Pad_Via_mod (layer F.Cu) (tedit 586E9C4D) (tstamp 5869B02B)\n (at 112.67 40.14)\n (descr \"Mounting Hole 3.2mm, M3\")\n (tags \"mounting hole 3.2mm m3\")\n (path /5865379D)\n (fp_text reference P17 (at 0 -4.2) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MNT (at 0 4.2) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))\n (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))\n (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 -2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:MountingHole_3.2mm_M3_Pad_Via_mod (layer F.Cu) (tedit 586E9C4D) (tstamp 5869B001)\n (at 178.5 40.375)\n (descr \"Mounting Hole 3.2mm, M3\")\n (tags \"mounting hole 3.2mm m3\")\n (path /586546F9)\n (fp_text reference P19 (at 0 -4.2) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MNT (at 0 4.2) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))\n (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))\n (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -2.4 0) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at -1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 0 -2.4) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 thru_hole circle (at 1.697056 -1.697056) (size 0.6 0.6) (drill 0.5) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA0C) (tstamp 56A3B914)\n (at 165.45 58.45)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A2EFDF)\n (attr smd)\n (fp_text reference C147 (at 0.39 -5.33 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 100 \"Net-(C145-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D719) (tstamp 586E1307)\n (at 163.51 98.94)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/586D767B)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C259 (at -1.29 -1.07) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 337 \"Net-(C121-Pad2)\") (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 586E0567)\n (at 162.69 59.59 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/586D6AD1)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C260 (at 0 -1.7 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 107 \"Net-(C151-Pad2)\") (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D7B7) (tstamp 586BE0DA)\n (at 181.65 107.41 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/586AD281)\n (attr smd)\n (fp_text reference R121 (at -1.52 -0.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D884) (tstamp 586B6A7E)\n (at 140.62 94.02 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /564D0768/586AD1A8)\n (attr smd)\n (fp_text reference C257 (at 1.43 1.32 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D880) (tstamp 586B6954)\n (at 142.66 97.06 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /564D0768/586AD1A2)\n (attr smd)\n (fp_text reference C258 (at 0.04 1.24 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 5870D886) (tstamp 586B53C8)\n (at 141.3 95.25 180)\n (path /564D0768/586AD195)\n (fp_text reference U41 (at 0.85 -1.32 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LP5907 (at 0 -4.05 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 4 smd rect (at 1.9 -2.6 180) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.6 180) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 586B37B3)\n (at 174.51 61.76 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/586AF484)\n (attr smd)\n (fp_text reference C256 (at 0 -1.675 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 55AA3491) (tstamp 569A8DE7)\n (at 125.29 45.88 270)\n (path /564D0768/5695A2C6)\n (fp_text reference U25 (at 0.875 -1.34 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MCP1824T-3302E (at 0 -4.05 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 4 smd rect (at 1.9 -2.6 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 169 \"Net-(U25-Pad4)\"))\n (pad 5 smd rect (at 0 -2.6 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 5870D9A4) (tstamp 5850D7D9)\n (at 161.08 40.435 180)\n (path /564D0768/5853A077)\n (fp_text reference U36 (at 0.97 -1.415 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LP5907-3V3 (at 0 -4.05 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0 180) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 4 smd rect (at 1.9 -2.6 180) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.6 180) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D9E3) (tstamp 586A30C3)\n (at 169.86 59.13 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5869D18B)\n (attr smd)\n (fp_text reference R120 (at -2.32 -1.26 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 414 \"Net-(R120-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 339 /CLK_ADC))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D9E1) (tstamp 586A30A1)\n (at 168.79 59.15 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5869CD21)\n (attr smd)\n (fp_text reference R119 (at -1.57 -1.33 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 297 /CLK_FPGA))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 413 \"Net-(R119-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA18) (tstamp 5868281E)\n (at 160.075 58.875)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/5867AFE9)\n (attr smd)\n (fp_text reference C255 (at -0.235 -1.065) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 412 \"Net-(C255-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 364 /tx_amp/DET_IN))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC47) (tstamp 584E7A1C)\n (at 135.625 67.75 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/5851B759)\n (attr smd)\n (fp_text reference C205 (at 2.145 1.95 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 273 \"Net-(C205-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 267 \"Net-(C205-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 55A401E5) (tstamp 5865BD24)\n (at 142 45.85 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583ABBE9/5865C0D7)\n (attr smd)\n (fp_text reference FB12 (at 0 1.425 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value BLM18PG181SN1D (at 0 -1.9 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 406 /fpga/usb/5V))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D807) (tstamp 56A3B788)\n (at 119.66 113.61 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566C4AD6)\n (attr smd)\n (fp_text reference C111 (at 3.2 1.49) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D805) (tstamp 56A3B7A9)\n (at 118.41 113.61 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566C4BCA)\n (attr smd)\n (fp_text reference C114 (at 2.41 0.32) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D730) (tstamp 56A3B520)\n (at 159.13 92.43 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/56303797)\n (attr smd)\n (fp_text reference C55 (at -0.27 -1.25) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7EB) (tstamp 58593003)\n (at 148.2 107 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5857B83F)\n (attr smd)\n (fp_text reference C253 (at -0.14 1.24 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7E8) (tstamp 585922F9)\n (at 148.25 108.5 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5857B977)\n (attr smd)\n (fp_text reference C254 (at 0.05 -1.27 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D7ED) (tstamp 5859204B)\n (at 149.925 107.75 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/5837DA7A/5857B054)\n (attr smd)\n (fp_text reference FB11 (at -1.59 -0.985 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:EVP-AWBA2A (layer F.Cu) (tedit 5870D8D0) (tstamp 58582D50)\n (at 145.35 84.95 180)\n (path /5837E082/585531EB)\n (fp_text reference SW1 (at -1.4 0.34 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value DNP (at 1 -1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 3.1 1) (end 0.1 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -1) (end 3.1 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.1 -1) (end 3.1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.1 1) (end 0.1 -1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0.5 180) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 1 smd rect (at 0 -0.5 180) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 3.25 0.5 180) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 397 /fpga/M0))\n (pad 2 smd rect (at 3.25 -0.4 180) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 397 /fpga/M0))\n (pad 2 smd rect (at 3.25 0 180) (size 0.55 1.5) (layers F.Cu F.Mask)\n (net 397 /fpga/M0))\n (pad 1 smd rect (at 0 0 180) (size 0.55 1.5) (layers F.Cu F.Mask)\n (net 340 /3V3D))\n )\n\n (module VNA:EVP-AWBA2A (layer F.Cu) (tedit 5582E39A) (tstamp 58582D34)\n (at 124.736958 82.415268 90)\n (path /5837E082/5855D765)\n (fp_text reference SW2 (at 1.5 2.1 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value SW_PUSH (at 1 -1.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.1 1) (end 0.1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.1 -1) (end 3.1 -1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -1) (end 3.1 1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 1) (end 0.1 1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 90) (size 0.55 1.5) (layers F.Cu F.Mask)\n (net 402 /fpga/PROGRAM_B))\n (pad 2 smd rect (at 3.25 0 90) (size 0.55 1.5) (layers F.Cu F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 3.25 -0.4 90) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 3.25 0.5 90) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at 0 -0.5 90) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 402 /fpga/PROGRAM_B))\n (pad 1 smd rect (at 0 0.5 90) (size 0.55 0.5) (layers F.Cu F.Paste F.Mask)\n (net 402 /fpga/PROGRAM_B))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5857ACF0)\n (at 148.375 55.25 270)\n (path /5837E082/585708F8)\n (fp_text reference P15 (at 0.125 0.05 270) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0 270) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 183 /fpga/TCK))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5857ACE3)\n (at 144.175 56.55 270)\n (path /5837E082/58571070)\n (fp_text reference P16 (at 0.125 0.05 270) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0 270) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 274 /fpga/TDO))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5857ACB6)\n (at 146.375 56.65 270)\n (path /5837E082/58570DB4)\n (fp_text reference P13 (at 0.125 0.05 270) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0 270) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 187 /fpga/TDI))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5857ACA1)\n (at 142.55 55.55 270)\n (path /5837E082/58571241)\n (fp_text reference P14 (at 0.125 0.05 270) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0 270) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 192 /fpga/TMS))\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 58570942)\n (at 155.1 42.625 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/5856F6DD)\n (attr smd)\n (fp_text reference C252 (at 0 1.7 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EFC0)\n (at 142.265 81.176786 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58553A4A)\n (attr smd)\n (fp_text reference R113 (at 0 1.4 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 401 /fpga/M1))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EFB0)\n (at 124.636958 81.365268 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/5855D76B)\n (attr smd)\n (fp_text reference R112 (at 0 1.4 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 402 /fpga/PROGRAM_B))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBF2) (tstamp 5856EFA0)\n (at 150.63 61.93 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58556863)\n (attr smd)\n (fp_text reference R111 (at -0.65 -1.125 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1k (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 394 \"Net-(P9-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EEB4)\n (at 142.265 82.576786)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58553D4B)\n (attr smd)\n (fp_text reference R114 (at 0 1.4) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 401 /fpga/M1))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EC26)\n (at 144.62 81.036786 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58553EF2)\n (attr smd)\n (fp_text reference R115 (at 0 1.4 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 399 /fpga/M2))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D9A0) (tstamp 5856EC16)\n (at 151.025 40.225 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/5857A8B8)\n (attr smd)\n (fp_text reference R118 (at -0.065 0.995 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7k (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 400 /fpga/SPI_CS))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EC06)\n (at 144.67 82.536786)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/5855409A)\n (attr smd)\n (fp_text reference R116 (at 0 1.4) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 399 /fpga/M2))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBEF) (tstamp 5856EBF6)\n (at 146.49 68.03 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58563673)\n (attr smd)\n (fp_text reference R117 (at -0.63 1.22 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 398 /fpga/INIT_B))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 5856EBE6)\n (at 142.85 84.95 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/5855502E)\n (attr smd)\n (fp_text reference R110 (at 0 1.4 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 397 /fpga/M0))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5856E75E)\n (at 157.64 46.58)\n (path /5837E082/58586E89)\n (fp_text reference P11 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 396 /fpga/SPI_MOSI))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5856E749)\n (at 148.21 42.53)\n (path /5837E082/58587941)\n (fp_text reference P12 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 395 /fpga/SPI_DIN))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5856E73C)\n (at 150.85 61.11)\n (path /5837E082/58552888)\n (fp_text reference P9 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 394 \"Net-(P9-Pad1)\"))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5856E72F)\n (at 157.68 44.94)\n (path /5837E082/58555ED5)\n (fp_text reference P10 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 393 /fpga/CCLK))\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 584E7B64)\n (at 137.63 67.76)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583B001F)\n (attr smd)\n (fp_text reference C191 (at 0 1.7) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:LED_0603 (layer F.Cu) (tedit 57404998) (tstamp 5853677E)\n (at 125.95 63.025 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/585323DE)\n (attr smd)\n (fp_text reference D6 (at -2.21 0.05 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value LED (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.25 0) (end 0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.25 0) (layer F.SilkS) (width 0.15))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 391 \"Net-(D6-Pad2)\"))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:LED_0603 (layer F.Cu) (tedit 5870D973) (tstamp 5853676E)\n (at 122.37 43.95 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /564D0768/58530D5E)\n (attr smd)\n (fp_text reference D5 (at 0.06 -1.52 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value LED (at 0 1.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 -0.6) (end -0.25 0) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0) (end 0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 392 \"Net-(D5-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D975) (tstamp 585361C8)\n (at 123.96 43.59 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5853110E)\n (attr smd)\n (fp_text reference R108 (at 0.08 1.05 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 240 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 392 \"Net-(D5-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DC2D) (tstamp 585361B8)\n (at 126.925 63.75 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/585323EB)\n (attr smd)\n (fp_text reference R109 (at -1.015 1.08 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 240 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 390 /fpga/LED))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 391 \"Net-(D6-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC1D) (tstamp 5853AAFB)\n (at 128.525 75.75 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/58531E80)\n (attr smd)\n (fp_text reference C251 (at 0.015 1.02 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC00) (tstamp 5853452B)\n (at 140.725 66.75)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/58530C63)\n (attr smd)\n (fp_text reference C250 (at -0.015 -1.56 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D88B) (tstamp 5853F45F)\n (at 145.12 93.17)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5852FADF)\n (attr smd)\n (fp_text reference C150 (at 0.13 -0.98) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 103 \"Net-(C150-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D88A) (tstamp 5853F423)\n (at 145.23 95.08)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/585304B6)\n (attr smd)\n (fp_text reference C153 (at 0.07 -0.95) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 80 /receiver/DITHER))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D88C) (tstamp 5853E0AD)\n (at 143.48 92.68 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5852F8A2)\n (attr smd)\n (fp_text reference R59 (at 0.05 -1.02 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 103 \"Net-(C150-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 388 \"Net-(C132-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D888) (tstamp 5853DF7F)\n (at 143.49 94.66 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/585300BC)\n (attr smd)\n (fp_text reference R107 (at 0.17 -1.1 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 80 /receiver/DITHER))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 103 \"Net-(C150-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B940)\n (at 162.125 60.7 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A454A8)\n (attr smd)\n (fp_text reference C151 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.150001 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.150001 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.150001 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.150001 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 151 \"/port switch/RFC\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 107 \"Net-(C151-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Capacitors_SMD:C_1210 (layer F.Cu) (tedit 5870D94A) (tstamp 58510DE0)\n (at 126.85 51.66 90)\n (descr \"Capacitor SMD 1210, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 1210\")\n (path /5837E082/584F0EB9)\n (attr smd)\n (fp_text reference C181 (at 0 -2.67 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value 100u (at 0 2.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1 1.475) (end 1 1.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.475) (end -1 -1.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.3 -1.6) (end 2.3 1.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.6) (end -2.3 1.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 1.6) (end 2.3 1.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.6) (end 2.3 -1.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.15))\n (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.15))\n (pad 2 smd rect (at 1.5 0 90) (size 1 2.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1.5 0 90) (size 1 2.5) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (model Capacitors_SMD.3dshapes/C_1210.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D912) (tstamp 5851E081)\n (at 111.19 71.54)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/58565323)\n (attr smd)\n (fp_text reference R87 (at -1.46 -0.03 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 381 /power/fpga_power/SYNC_1V8))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 387 /power/fpga_power/SYNC_1V0))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm (layer F.Cu) (tedit 5870D902) (tstamp 58510026)\n (at 114.69 82.05)\n (descr \"DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf)\")\n (tags \"DFN 0.5\")\n (path /564D0768/5851A753/5851BDBD)\n (attr smd)\n (fp_text reference U38 (at 3.23 -3.33 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value L7980 (at 0 2.55) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -0.5) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 -0.5) (end -0.5 -1.5) (layer F.Fab) (width 0.15))\n (fp_line (start -2 -1.8) (end -2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 2 -1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 -1.8) (end 2 -1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.05 1.625) (end 1.05 1.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.825 -1.625) (end 1.05 -1.625) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 369 \"Net-(D4-Pad1)\"))\n (pad 2 smd rect (at -1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 381 /power/fpga_power/SYNC_1V8))\n (pad 3 smd rect (at -1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 4 smd rect (at -1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 375 \"Net-(C237-Pad1)\"))\n (pad 5 smd rect (at 1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (pad 6 smd rect (at 1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 378 \"Net-(R98-Pad1)\"))\n (pad 7 smd rect (at 1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 8 smd rect (at 1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 9 smd rect (at 0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_3x3mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm (layer F.Cu) (tedit 5870D937) (tstamp 5850FFF8)\n (at 115.25 68.33)\n (descr \"DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf)\")\n (tags \"DFN 0.5\")\n (path /564D0768/5851A753/5851B26A)\n (attr smd)\n (fp_text reference U37 (at 4.08 -3.26) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value L7980 (at 0 2.55) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.825 -1.625) (end 1.05 -1.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.05 1.625) (end 1.05 1.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 -1.8) (end 2 -1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 2 -1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 -1.8) (end -2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.5 -0.5) (end -0.5 -1.5) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -0.5) (layer F.Fab) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15))\n (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15))\n (pad 9 smd rect (at -0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 8 smd rect (at 1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 7 smd rect (at 1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 6 smd rect (at 1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 377 \"Net-(R96-Pad1)\"))\n (pad 5 smd rect (at 1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (pad 4 smd rect (at -1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 372 \"Net-(C236-Pad1)\"))\n (pad 3 smd rect (at -1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at -1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 387 /power/fpga_power/SYNC_1V0))\n (pad 1 smd rect (at -1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 367 \"Net-(D1-Pad1)\"))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_3x3mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8E4) (tstamp 5850F7A0)\n (at 112.98 86.295)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851BD6D)\n (attr smd)\n (fp_text reference C239 (at -2.39 0.075) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 380 \"Net-(C239-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D926) (tstamp 5850F77E)\n (at 117.88 71.245)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851B21A)\n (attr smd)\n (fp_text reference C238 (at 0.02 0.985) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 16n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 379 \"Net-(C238-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8F1) (tstamp 5850F75C)\n (at 117.53 84.695)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851BD5F)\n (attr smd)\n (fp_text reference C237 (at -0.09 -0.855) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 375 \"Net-(C237-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D919) (tstamp 5850F73A)\n (at 113.75 71.3 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851B20C)\n (attr smd)\n (fp_text reference C236 (at 1.26 -0.73) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 36p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 372 \"Net-(C236-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8EF) (tstamp 5850F702)\n (at 117.48 85.945)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851BD58)\n (attr smd)\n (fp_text reference C235 (at 2 0.165) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 374 \"Net-(C235-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB38) (tstamp 5850EDC4)\n (at 114.61 71.17 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5851A753/5851B205)\n (attr smd)\n (fp_text reference C234 (at -2.13 0.09 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 373 \"Net-(C234-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 55A401E5) (tstamp 5850ECB0)\n (at 159.77 45.1 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /564D0768/5853A27B)\n (attr smd)\n (fp_text reference C229 (at 0 -1.425 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D9A6) (tstamp 5850EC8E)\n (at 160.255 38.685 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /564D0768/5853A342)\n (attr smd)\n (fp_text reference C228 (at 0.055 1.115 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D82D) (tstamp 5850EB4E)\n (at 124.425 91.875 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/585275B5)\n (attr smd)\n (fp_text reference C249 (at -0.125 1.335 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D932) (tstamp 5850E9F8)\n (at 119.29 67.05)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851D070)\n (attr smd)\n (fp_text reference C230 (at 2.79 -0.5) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D947) (tstamp 5850E9AA)\n (at 120.27 55.075)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851CF8E)\n (attr smd)\n (fp_text reference C231 (at 2.42 -0.025 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D934) (tstamp 5850E946)\n (at 119.29 68.22)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851B1C3)\n (attr smd)\n (fp_text reference C232 (at 2.87 -0.83) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D93D) (tstamp 5850E8CC)\n (at 120.98 58.795 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851B1CA)\n (attr smd)\n (fp_text reference C240 (at 2.515 1.01) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D82E) (tstamp 5850E894)\n (at 127.13 95.65)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/583E250D/5852675F)\n (attr smd)\n (fp_text reference C248 (at -0.05 1.63) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D8FD) (tstamp 5850E872)\n (at 119.93 78.295 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851BD45)\n (attr smd)\n (fp_text reference C247 (at -0.815 -3.26) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D93B) (tstamp 5850E850)\n (at 115.075 57.475 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851B1F2)\n (attr smd)\n (fp_text reference C246 (at 3.155 0.005 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D908) (tstamp 5850E82E)\n (at 121.03 74.295 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851BD3E)\n (attr smd)\n (fp_text reference C245 (at 0.035 2.11 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D93F) (tstamp 5850E80C)\n (at 119.78 58.795 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851B1EB)\n (attr smd)\n (fp_text reference C244 (at 3.365 -0.24) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D942) (tstamp 5850E7EA)\n (at 118.53 58.795 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851B1D1)\n (attr smd)\n (fp_text reference C243 (at 4.275 -1.43) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D905) (tstamp 5850E7C8)\n (at 119.78 74.295 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851BD24)\n (attr smd)\n (fp_text reference C242 (at 0.895 3.36 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D8FE) (tstamp 5850E7A6)\n (at 121.13 78.295 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851BD1D)\n (attr smd)\n (fp_text reference C241 (at 0.025 -2.04) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D8F6) (tstamp 5850E784)\n (at 119.01 81.23)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5851A753/5851BD16)\n (attr smd)\n (fp_text reference C233 (at 2.81 0.11) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8E3) (tstamp 5850DD9C)\n (at 112.23 84.995 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851BD74)\n (attr smd)\n (fp_text reference R106 (at 1.98 -0.485 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 380 \"Net-(C239-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D92C) (tstamp 5850DC88)\n (at 115.97 70.89)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851B221)\n (attr smd)\n (fp_text reference R105 (at -0.05 -0.59) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 379 \"Net-(C238-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8F4) (tstamp 5850DB48)\n (at 118.11 82.87)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851BDA2)\n (attr smd)\n (fp_text reference R98 (at 1.95 -0.15) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 68k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 378 \"Net-(R98-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D92F) (tstamp 5850DAFA)\n (at 118.56 69.49)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851B24F)\n (attr smd)\n (fp_text reference R96 (at 2 0.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 68k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 377 \"Net-(R96-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8E8) (tstamp 5850D9FC)\n (at 113.98 84.995)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851BD9A)\n (attr smd)\n (fp_text reference R103 (at 0.01 -0.955) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.99k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D922) (tstamp 5850D9DA)\n (at 119.3 70.76 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851B240)\n (attr smd)\n (fp_text reference R102 (at 0.17 1.9 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 7.5k (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D928) (tstamp 5850D9B8)\n (at 115.13 71.81 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851B247)\n (attr smd)\n (fp_text reference R101 (at -1.33 -0.92 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.99k (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 376 \"Net-(C234-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8EC) (tstamp 5850D996)\n (at 115.68 85.345 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851BD66)\n (attr smd)\n (fp_text reference R100 (at 1.115 0.5) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 16k (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 374 \"Net-(C235-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 375 \"Net-(C237-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB35) (tstamp 5850D974)\n (at 113.97 69.88 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851B213)\n (attr smd)\n (fp_text reference R99 (at 0.02 1.38 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 15k (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 372 \"Net-(C236-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 373 \"Net-(C234-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8F0) (tstamp 5850D8E4)\n (at 119.43 84.695)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/5851BD93)\n (attr smd)\n (fp_text reference R104 (at 0.15 -1.115) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 2.5k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 371 \"Net-(C235-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOD-123F (layer F.Cu) (tedit 5870D8E2) (tstamp 5850D870)\n (at 110.38 82.51 270)\n (path /564D0768/5851A753/5851BDB6)\n (fp_text reference D4 (at 1.09 -1.71 90) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value SS13FL (at -0.3 -2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -0.1) (end 0.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -1.1) (end -0.8 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.1) (end -1.6 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.9) (end 1.4 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.9) (end 1.4 -1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -1.1) (end -1.6 -1.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 369 \"Net-(D4-Pad1)\"))\n (pad 2 smd rect (at 1.36 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:SOD-123F (layer F.Cu) (tedit 5870D90F) (tstamp 5850D838)\n (at 111.33 68.745 270)\n (path /564D0768/5851A753/5851B263)\n (fp_text reference D1 (at -0.155 1.57 270) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value SS13FL (at -0.3 -2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -0.1) (end 0.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -1.1) (end -0.8 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.1) (end -1.6 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.9) (end 1.4 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.9) (end 1.4 -1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -1.1) (end -1.6 -1.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 367 \"Net-(D1-Pad1)\"))\n (pad 2 smd rect (at 1.36 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 5870D82A) (tstamp 5850D7FE)\n (at 125.866323 93.501517)\n (path /5837E082/583E250D/58526584)\n (fp_text reference U39 (at 1.053677 -1.321517) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LP5907-3V0 (at 0 -4.05) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (pad 5 smd rect (at 0 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 4 smd rect (at 1.9 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at 0 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n )\n\n (module VNA:SRR6040A (layer F.Cu) (tedit 5870D900) (tstamp 5850D71E)\n (at 113.28 76.165 90)\n (path /564D0768/5851A753/5851BDA9)\n (fp_text reference L10 (at 0.205 0.21 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value \"33u (SRR6040A-330M)\" (at -0.25 -4.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 3.1 3.3) (end -3.6 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -3.4) (end 3.1 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -3.4) (end 3.1 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 3.3) (end -3.6 -3.4) (layer F.SilkS) (width 0.15))\n (pad 2 smd rect (at 3.075 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 2 smd rect (at -3.575 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 1 smd rect (at 3.075 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 369 \"Net-(D4-Pad1)\"))\n (pad 1 smd rect (at -3.575 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 369 \"Net-(D4-Pad1)\"))\n (pad 2 smd rect (at -0.25 2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 1 smd rect (at -0.25 -2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 369 \"Net-(D4-Pad1)\"))\n )\n\n (module VNA:SRR6040A (layer F.Cu) (tedit 5870D938) (tstamp 5850D6F6)\n (at 113.88 62.17 90)\n (path /564D0768/5851A753/5851B256)\n (fp_text reference L9 (at -0.07 0.3 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value \"33u (SRR6040A-330M)\" (at -0.25 -4.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 3.3) (end -3.6 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -3.4) (end 3.1 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -3.4) (end 3.1 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 3.3) (end -3.6 3.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.25 -2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 367 \"Net-(D1-Pad1)\"))\n (pad 2 smd rect (at -0.25 2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 1 smd rect (at -3.575 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 367 \"Net-(D1-Pad1)\"))\n (pad 1 smd rect (at 3.075 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 367 \"Net-(D1-Pad1)\"))\n (pad 2 smd rect (at -3.575 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 3.075 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9C4) (tstamp 584F89FB)\n (at 154.16 50.11 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/584EB3A2)\n (attr smd)\n (fp_text reference C227 (at -0.05 1.14 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9C9) (tstamp 584F89EB)\n (at 156.91 53.69)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/584EC1C2)\n (attr smd)\n (fp_text reference C226 (at 1.08 -1.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 366 \"Net-(C226-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D9BF) (tstamp 584F6EB9)\n (at 155.35 54.1 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/584EC0CC)\n (attr smd)\n (fp_text reference R94 (at 0 -1.21 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 22k (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 366 \"Net-(C226-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 363 \"Net-(R94-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 584F6EA9)\n (at 155.79 52.88)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/584EC15C)\n (attr smd)\n (fp_text reference R95 (at 0 -1.4) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 366 \"Net-(C226-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 5870D9C2) (tstamp 584F6DE5)\n (at 155.37 51.55)\n (path /56A2B5A1/584EB099)\n (fp_text reference U35 (at 1.01 -1.35) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TSV911 (at 0 -4.05) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 426 \"Net-(R122-Pad2)\"))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 366 \"Net-(C226-Pad1)\"))\n (pad 4 smd rect (at 1.9 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 426 \"Net-(R122-Pad2)\"))\n (pad 5 smd rect (at 0 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBEB) (tstamp 56A3BD4A)\n (at 146.45 71.17 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5691CEE7)\n (attr smd)\n (fp_text reference R74 (at 1.665 0.1 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 220k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 178 /DITHER))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 82 \"Net-(C129-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBEC) (tstamp 56A3BD55)\n (at 147.3 71.17 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5691D4AF)\n (attr smd)\n (fp_text reference R75 (at -1.73 0.085 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7k (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 82 \"Net-(C129-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0603b (layer F.Cu) (tedit 5870D713) (tstamp 584F0199)\n (at 168.325 101.1 90)\n (descr \"Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0603\")\n (path /562EEB8A/583CF52C/583D1B08)\n (attr smd)\n (fp_text reference R21 (at -2.03 0.055 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value 1.8 (at 0 1.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))\n (fp_line (start -1.3 -0.8) (end 1.3 -0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 -0.8) (end -1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.3 -0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)\n (net 109 \"Net-(C113-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)\n (net 79 \"Net-(C115-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0603b (layer F.Cu) (tedit 5870DA08) (tstamp 584F0185)\n (at 164.7 56.95 270)\n (descr \"Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0603\")\n (path /56A2B5A1/56A3177E)\n (attr smd)\n (fp_text reference R89 (at 0.63 -1.91) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value 1.8 (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.3 -0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 -0.8) (end -1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.3 -0.8) (end 1.3 -0.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))\n (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))\n (pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)\n (net 100 \"Net-(C145-Pad1)\"))\n (pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)\n (net 99 \"Net-(C142-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Capacitors_SMD:C_1206 (layer F.Cu) (tedit 5870D953) (tstamp 584E841E)\n (at 134.26 53.26 90)\n (descr \"Capacitor SMD 1206, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 1206\")\n (path /5837E082/584F6A45)\n (attr smd)\n (fp_text reference C182 (at -0.14 2.35 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value 47u (at 0 2.3 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1 1.025) (end 1 1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.025) (end -1 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.15))\n (pad 2 smd rect (at 1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_1206.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Capacitors_SMD:C_1206 (layer F.Cu) (tedit 5870D94F) (tstamp 584E840E)\n (at 129.65 51.58 90)\n (descr \"Capacitor SMD 1206, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 1206\")\n (path /5837E082/584F34F4)\n (attr smd)\n (fp_text reference C184 (at -2.9 -1.05 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value 47u (at 0 2.3 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.15))\n (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1 -1.025) (end -1 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 1.025) (end 1 1.025) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (pad 2 smd rect (at 1.5 0 90) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_1206.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Capacitors_SMD:C_1206 (layer F.Cu) (tedit 5870D8CD) (tstamp 584E83FE)\n (at 143.15 78.7)\n (descr \"Capacitor SMD 1206, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 1206\")\n (path /5837E082/584F9B52)\n (attr smd)\n (fp_text reference C196 (at -3.41 0.26 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value 47u (at 0 2.3) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1 1.025) (end 1 1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.025) (end -1 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.15))\n (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.15))\n (pad 2 smd rect (at 1.5 0) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1.5 0) (size 1 1.6) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_1206.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm (layer F.Cu) (tedit 5870D8B3) (tstamp 584E8356)\n (at 133.9 85.575 90)\n (descr \"UH Package; 32-Lead Plastic QFN (5mm x 5mm); (see Linear Technology QFN_32_05-08-1693.pdf)\")\n (tags \"QFN 0.5\")\n (path /5837E082/583E250D/583E2588)\n (attr smd)\n (fp_text reference U34 (at 0.105 0.04 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LTC2247 (at 0 3.75 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 2.625 -2.625) (end 2.1 -2.625) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.625 2.625) (end 2.1 2.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.625 2.625) (end -2.1 2.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.625 -2.625) (end -2.1 -2.625) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.625 2.625) (end 2.625 2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.625 2.625) (end -2.625 2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.625 -2.625) (end 2.625 -2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -3 3) (end 3 3) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3 -3) (end 3 -3) (layer F.CrtYd) (width 0.05))\n (fp_line (start 3 -3) (end 3 3) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3 -3) (end -3 3) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2.5 -1.5) (end -1.5 -2.5) (layer F.Fab) (width 0.15))\n (fp_line (start -2.5 2.5) (end -2.5 -1.5) (layer F.Fab) (width 0.15))\n (fp_line (start 2.5 2.5) (end -2.5 2.5) (layer F.Fab) (width 0.15))\n (fp_line (start 2.5 -2.5) (end 2.5 2.5) (layer F.Fab) (width 0.15))\n (fp_line (start -1.5 -2.5) (end 2.5 -2.5) (layer F.Fab) (width 0.15))\n (pad 33 smd rect (at -0.8625 -0.8625 90) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 33 smd rect (at -0.8625 0.8625 90) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 33 smd rect (at 0.8625 -0.8625 90) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 33 smd rect (at 0.8625 0.8625 90) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 32 smd rect (at -1.75 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 31 smd rect (at -1.25 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (pad 30 smd rect (at -0.75 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 188 \"Net-(R93-Pad1)\"))\n (pad 29 smd rect (at -0.25 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 104 \"Net-(R91-Pad2)\"))\n (pad 28 smd rect (at 0.25 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 360 /fpga/OF))\n (pad 27 smd rect (at 0.75 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 283 /fpga/D13))\n (pad 26 smd rect (at 1.25 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 260 /fpga/D12))\n (pad 25 smd rect (at 1.75 -2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 261 /fpga/D11))\n (pad 24 smd rect (at 2.4 -1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 275 /fpga/D10))\n (pad 23 smd rect (at 2.4 -1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 276 /fpga/D9))\n (pad 22 smd rect (at 2.4 -0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 269 /fpga/D8))\n (pad 21 smd rect (at 2.4 -0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 20 smd rect (at 2.4 0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 19 smd rect (at 2.4 0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 277 /fpga/D7))\n (pad 18 smd rect (at 2.4 1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 284 /fpga/D6))\n (pad 17 smd rect (at 2.4 1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 290 /fpga/D5))\n (pad 16 smd rect (at 1.75 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 254 /fpga/D4))\n (pad 15 smd rect (at 1.25 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 255 /fpga/D3))\n (pad 14 smd rect (at 0.75 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 263 /fpga/D2))\n (pad 13 smd rect (at 0.25 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 268 /fpga/D1))\n (pad 12 smd rect (at -0.25 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 262 /fpga/D0))\n (pad 11 smd rect (at -0.75 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 361 /fpga/ADC_OE))\n (pad 10 smd rect (at -1.25 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 362 /fpga/ADC_SHDN))\n (pad 9 smd rect (at -1.75 2.4 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 339 /CLK_ADC))\n (pad 8 smd rect (at -2.4 1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at -2.4 1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 6 smd rect (at -2.4 0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 384 /fpga/adc/REFL))\n (pad 5 smd rect (at -2.4 0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 384 /fpga/adc/REFL))\n (pad 4 smd rect (at -2.4 -0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 383 /fpga/adc/REFH))\n (pad 3 smd rect (at -2.4 -0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 383 /fpga/adc/REFH))\n (pad 2 smd rect (at -2.4 -1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 172 /ADC-))\n (pad 1 smd rect (at -2.4 -1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 170 /ADC+))\n (model Housings_DFN_QFN.3dshapes/QFN-32-1EP_5x5mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Housings_QFP:LQFP-48_7x7mm_Pitch0.5mm (layer F.Cu) (tedit 5870D999) (tstamp 584E82C8)\n (at 143.225 47.3)\n (descr \"48 LEAD LQFP 7x7mm (see MICREL LQFP7x7-48LD-PL-1.pdf)\")\n (tags \"QFP 0.5\")\n (path /5837E082/583ABBE9/583ABC0C)\n (attr smd)\n (fp_text reference U33 (at -0.015 -0.01) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value FT2232D (at 0 6) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.625 -3.175) (end -5 -3.175) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.625 -3.625) (end 3.1 -3.625) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.625 3.625) (end 3.1 3.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.625 3.625) (end -3.1 3.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.625 -3.625) (end -3.1 -3.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.625 3.625) (end -3.625 3.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.625 3.625) (end 3.625 3.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.625 -3.625) (end 3.625 -3.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.625 -3.625) (end -3.625 -3.175) (layer F.SilkS) (width 0.15))\n (fp_line (start -5.25 5.25) (end 5.25 5.25) (layer F.CrtYd) (width 0.05))\n (fp_line (start -5.25 -5.25) (end 5.25 -5.25) (layer F.CrtYd) (width 0.05))\n (fp_line (start 5.25 -5.25) (end 5.25 5.25) (layer F.CrtYd) (width 0.05))\n (fp_line (start -5.25 -5.25) (end -5.25 5.25) (layer F.CrtYd) (width 0.05))\n (fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer F.Fab) (width 0.15))\n (fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer F.Fab) (width 0.15))\n (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.15))\n (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.15))\n (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.15))\n (fp_text user %R (at 0 0) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 48 smd rect (at -2.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 164 /fpga/usb/EECS))\n (pad 47 smd rect (at -2.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 46 smd rect (at -1.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 382 \"Net-(C213-Pad1)\"))\n (pad 45 smd rect (at -1.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 44 smd rect (at -0.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 344 \"Net-(C209-Pad1)\"))\n (pad 43 smd rect (at -0.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 342 \"Net-(C208-Pad1)\"))\n (pad 42 smd rect (at 0.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (pad 41 smd rect (at 0.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 351 \"Net-(U33-Pad41)\"))\n (pad 40 smd rect (at 1.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 300 /fpga/FT_D0))\n (pad 39 smd rect (at 1.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 301 /fpga/FT_D1))\n (pad 38 smd rect (at 2.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 291 /fpga/FT_D2))\n (pad 37 smd rect (at 2.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 286 /fpga/FT_D3))\n (pad 36 smd rect (at 4.35 -2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 279 /fpga/FT_D4))\n (pad 35 smd rect (at 4.35 -2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 285 /fpga/FT_D5))\n (pad 34 smd rect (at 4.35 -1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 33 smd rect (at 4.35 -1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 278 /fpga/FT_D6))\n (pad 32 smd rect (at 4.35 -0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 270 /fpga/FT_D7))\n (pad 31 smd rect (at 4.35 -0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 30 smd rect (at 4.35 0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 208 /fpga/RXF#))\n (pad 29 smd rect (at 4.35 0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 220 /fpga/TXE#))\n (pad 28 smd rect (at 4.35 1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 231 /fpga/RD#))\n (pad 27 smd rect (at 4.35 1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 230 /fpga/WR))\n (pad 26 smd rect (at 4.35 2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 242 /fpga/SI/WUB))\n (pad 25 smd rect (at 4.35 2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 24 smd rect (at 2.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 182 \"Net-(R84-Pad2)\"))\n (pad 23 smd rect (at 2.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 186 \"Net-(R88-Pad2)\"))\n (pad 22 smd rect (at 1.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 274 /fpga/TDO))\n (pad 21 smd rect (at 1.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 191 \"Net-(R85-Pad2)\"))\n (pad 20 smd rect (at 0.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 352 \"Net-(U33-Pad20)\"))\n (pad 19 smd rect (at 0.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 353 \"Net-(U33-Pad19)\"))\n (pad 18 smd rect (at -0.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 17 smd rect (at -0.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 354 \"Net-(U33-Pad17)\"))\n (pad 16 smd rect (at -1.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 355 \"Net-(U33-Pad16)\"))\n (pad 15 smd rect (at -1.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 356 \"Net-(U33-Pad15)\"))\n (pad 14 smd rect (at -2.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 13 smd rect (at -2.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 357 \"Net-(U33-Pad13)\"))\n (pad 12 smd rect (at -4.35 2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 358 \"Net-(U33-Pad12)\"))\n (pad 11 smd rect (at -4.35 2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 359 \"Net-(U33-Pad11)\"))\n (pad 10 smd rect (at -4.35 1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 9 smd rect (at -4.35 1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 8 smd rect (at -4.35 0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 180 \"Net-(R80-Pad1)\"))\n (pad 7 smd rect (at -4.35 0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 181 \"Net-(R81-Pad1)\"))\n (pad 6 smd rect (at -4.35 -0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 343 \"Net-(C210-Pad1)\"))\n (pad 5 smd rect (at -4.35 -0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 90 \"Net-(R82-Pad2)\"))\n (pad 4 smd rect (at -4.35 -1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 193 \"Net-(R71-Pad2)\"))\n (pad 3 smd rect (at -4.35 -1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (pad 2 smd rect (at -4.35 -2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 166 /fpga/usb/EEDATA))\n (pad 1 smd rect (at -4.35 -2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)\n (net 165 /fpga/usb/EESK))\n (model Housings_QFP.3dshapes/LQFP-48_7x7mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:ABMM (layer F.Cu) (tedit 584D6D1A) (tstamp 584E822A)\n (at 146.41 38 180)\n (path /5837E082/583ABBE9/583C5AF8)\n (fp_text reference Y1 (at 3.3 -1.3 270) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value ABMM-6.000MHZ (at 3.075 -4.625 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.4 -3.9) (end 6.8 -3.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 6.8 -3.9) (end 6.8 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 6.8 1.5) (end -0.4 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.4 1.5) (end -0.4 -3.9) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask)\n (net 342 \"Net-(C208-Pad1)\"))\n (pad 2 smd rect (at 6.3 0 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 6.3 -2.54 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask)\n (net 344 \"Net-(C209-Pad1)\"))\n (pad 4 smd rect (at 0 -2.54 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D717) (tstamp 584E8044)\n (at 164.075 97.85 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1BCF)\n (attr smd)\n (fp_text reference C121 (at 0.05 -1.105 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 162 /receiver/RF_BALUN))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 337 \"Net-(C121-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D868) (tstamp 584E800C)\n (at 131.875 101.25)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9EB2)\n (attr smd)\n (fp_text reference C140 (at 0.885 0.85) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 36p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 97 \"Net-(C135-Pad1)\"))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 88 \"Net-(C135-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D873) (tstamp 584E7FBE)\n (at 130.875 98.8)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583EF809)\n (attr smd)\n (fp_text reference C144 (at -1.885 -0.84) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 110 \"Net-(C144-Pad2)\"))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 115 \"Net-(C144-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D862) (tstamp 584E7F86)\n (at 132.975 98.825 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E50)\n (attr smd)\n (fp_text reference C146 (at -2.395 0.575 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 102 \"Net-(C146-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 101 \"Net-(C146-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D879) (tstamp 584E7F64)\n (at 134.72 95.01 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583EAD25)\n (attr smd)\n (fp_text reference C148 (at 2.35 0.01 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D87A) (tstamp 584E7F42)\n (at 134.28 93.39)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583ECEC7)\n (attr smd)\n (fp_text reference C149 (at 2.38 -0.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 584E7EC6)\n (at 134.05 91.6 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E7B)\n (attr smd)\n (fp_text reference C154 (at 0 -1.7 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 172 /ADC-))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8B9) (tstamp 584E7EA4)\n (at 132.05 91.634774 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E74)\n (attr smd)\n (fp_text reference C155 (at 1.43 1.134774 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 220p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 172 /ADC-))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 170 /ADC+))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBA2) (tstamp 584E7E6C)\n (at 168.659966 96.65524 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9F06)\n (attr smd)\n (fp_text reference C124 (at -0.11524 -1.150034 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 176 \"Net-(C123-Pad2)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB8F) (tstamp 584E7E4A)\n (at 166.759966 91.95524 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9F20)\n (attr smd)\n (fp_text reference C125 (at -1.70524 0.739966) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 81 \"Net-(C125-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB95) (tstamp 584E7E28)\n (at 168.559966 94.15524 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9EFF)\n (attr smd)\n (fp_text reference C123 (at -2.91524 -1.440034 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 179 \"Net-(C122-Pad2)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 176 \"Net-(C123-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB84) (tstamp 584E7E06)\n (at 165.106873 94.048369 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9EF8)\n (attr smd)\n (fp_text reference C126 (at -2.138369 0.546873 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 177 \"Net-(C126-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 81 \"Net-(C125-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D84F) (tstamp 584E7DCE)\n (at 135.825 99.875)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9EC0)\n (attr smd)\n (fp_text reference C139 (at 2.245 -0.055) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 80 /receiver/DITHER))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 92 \"Net-(C139-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAE7) (tstamp 584E7DAC)\n (at 139.45 115.375)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FBDB)\n (attr smd)\n (fp_text reference C54 (at -0.74 1.075) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 213 /RX_SW3))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB7C) (tstamp 584E7D8A)\n (at 166.759966 96.33 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9F27)\n (attr smd)\n (fp_text reference C127 (at 1.82 0.299966) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 177 \"Net-(C126-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB81) (tstamp 584E7D68)\n (at 164.006873 94.048369 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9EAB)\n (attr smd)\n (fp_text reference C128 (at 2.161631 -0.013127 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 81 \"Net-(C125-Pad2)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 177 \"Net-(C126-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D84C) (tstamp 584E7D46)\n (at 128.125 99.925 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E5F)\n (attr smd)\n (fp_text reference C138 (at 1.815 -0.135 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 91 \"Net-(C138-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 584E7CA0)\n (at 168.559966 91.95524 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9F0D)\n (attr smd)\n (fp_text reference C122 (at 0 1.7 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 179 \"Net-(C122-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 584E7C68)\n (at 159.98 94.15 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E96)\n (attr smd)\n (fp_text reference C135 (at 0 1.7 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 97 \"Net-(C135-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 88 \"Net-(C135-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D710) (tstamp 584E7C30)\n (at 166.4 100.325 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1AFB)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C115 (at 2.405 -0.08) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 79 \"Net-(C115-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7BD) (tstamp 584E7C0E)\n (at 180.98 113.8 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836E0DB)\n (attr smd)\n (fp_text reference C180 (at 0.13 -2.94 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 152 \"Net-(C180-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 350 /PORT1))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC22) (tstamp 584E7BCA)\n (at 134.725 68.75)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584F34CE)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C187 (at -1.515 0.95) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 368 /1V0) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC25) (tstamp 584E7BA8)\n (at 133.175 67.25 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583AFFDD)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C189 (at 0.73 1.445) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 368 /1V0) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC13) (tstamp 584E7B86)\n (at 138.675 70.75)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584F6A19)\n (attr smd)\n (fp_text reference C190 (at 0.005 1.12) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC11) (tstamp 584E7B42)\n (at 139.725 69.75)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584F6A1F)\n (attr smd)\n (fp_text reference C192 (at 0.515 -0.93) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBFC) (tstamp 584E7B0A)\n (at 142.575 67.75 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FC3A3)\n (attr smd)\n (fp_text reference C198 (at -0.575 1.63 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC36) (tstamp 584E7AE8)\n (at 135.625 63.65)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FBF7D)\n (attr smd)\n (fp_text reference C199 (at -1.485 -0.84) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 584E7AC6)\n (at 143.025 74.85)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FBE1F)\n (attr smd)\n (fp_text reference C200 (at 0 1.7) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC2A) (tstamp 584E7AA4)\n (at 132.725 64.7)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FBCC6)\n (attr smd)\n (fp_text reference C201 (at -2.255 -0.11) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC18) (tstamp 584E7A82)\n (at 134.48 73.92 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FBB6A)\n (attr smd)\n (fp_text reference C202 (at 0.035 -1.16 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC1B) (tstamp 584E7A60)\n (at 131.925 71.95)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583B1D06)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C203 (at -2.085 0.04) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC0D) (tstamp 584E7A3E)\n (at 141.275 71.3 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583B1CF1)\n (attr smd)\n (fp_text reference C204 (at -2.1 -0.005 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D993) (tstamp 584E79FA)\n (at 136.175 37.825 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583C8C2A)\n (attr smd)\n (fp_text reference C207 (at 2.345 -0.005 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D716) (tstamp 584E79D8)\n (at 168.675 98.65 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1ADB)\n (attr smd)\n (fp_text reference C120 (at 0.12 -1.095 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 79 \"Net-(C115-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA58) (tstamp 584E79B6)\n (at 165.29 66.19)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836C3E4)\n (attr smd)\n (fp_text reference C167 (at 0.02 1.21 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9BE) (tstamp 584E7994)\n (at 155.28 56.29 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/5846A2F3)\n (attr smd)\n (fp_text reference C166 (at -0.05 -0.96 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value C (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 118 \"Net-(C166-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA1D) (tstamp 584E7972)\n (at 158.25 61.35)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/58469B87)\n (attr smd)\n (fp_text reference C165 (at 1.4 -0.28 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9CE) (tstamp 584E7924)\n (at 156.925 54.675)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/5846D065)\n (attr smd)\n (fp_text reference C160 (at 1.365 0.005 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value C (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 119 \"Net-(C157-Pad2)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA21) (tstamp 584E7902)\n (at 155.425 61.5 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/5846B986)\n (attr smd)\n (fp_text reference C157 (at 1.605 0.16 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 119 \"Net-(C157-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 117 /tx_amp/OUTP))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D831) (tstamp 584E78E0)\n (at 130.09 91.64 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583E8E25/583E9E82)\n (attr smd)\n (fp_text reference C156 (at 0.18 -0.99 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 170 /ADC+))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBCC) (tstamp 584E78BE)\n (at 164.5 65.8)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/58364DB7)\n (attr smd)\n (fp_text reference C168 (at 0.14 -1.79) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 150 \"Net-(C168-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBF9) (tstamp 584E789C)\n (at 141.725 61.75)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584FC507)\n (attr smd)\n (fp_text reference C197 (at 0.025 -1.1) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC3E) (tstamp 584E787A)\n (at 137.675 66.75 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/584F7C97)\n (attr smd)\n (fp_text reference C193 (at -1.555 -0.46 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA35) (tstamp 584E7858)\n (at 157.4 66.56)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836B70D)\n (attr smd)\n (fp_text reference C170 (at 0.03 0.92) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 173 /PORT_SW1))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 584E7836)\n (at 178.23 114.14 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836638C)\n (attr smd)\n (fp_text reference C171 (at 1.26 -0.8 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 156 \"Net-(C171-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870DA8A) (tstamp 584E7814)\n (at 129.475 115.925)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/583667D2)\n (attr smd)\n (fp_text reference C172 (at 0.605 0.845) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 157 \"Net-(C172-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAA3) (tstamp 584E77F2)\n (at 176.96 114.85 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836C8F1)\n (attr smd)\n (fp_text reference C173 (at 0.36 -1.25 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 171 /3V3A))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB05) (tstamp 584E77D0)\n (at 130.92 115.01)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836CBF9)\n (attr smd)\n (fp_text reference C174 (at 2.18 -0.18 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 415 3V3A_RX))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAAD) (tstamp 584E77AE)\n (at 176.41 111.73 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836AD8A)\n (attr smd)\n (fp_text reference C175 (at -0.74 1.86) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAA9) (tstamp 584E778C)\n (at 174.41 114.33 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836AD84)\n (attr smd)\n (fp_text reference C176 (at -0.04 -0.98 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 173 /PORT_SW1))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB00) (tstamp 584E7748)\n (at 128.62 118.77 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836A2BF)\n (attr smd)\n (fp_text reference C178 (at -0.46 1 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 173 /PORT_SW1))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D803) (tstamp 584E7726)\n (at 123.62 115.44 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836EA2F)\n (attr smd)\n (fp_text reference C179 (at 0.37 2.6 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 160 \"Net-(C179-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 349 /PORT2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DACA) (tstamp 584E7680)\n (at 163.21 114.44 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FBF9)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C35 (at 0.67 1.28 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 204 /RX_SW1) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAC2) (tstamp 584E765E)\n (at 163.58 116.97 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FBF2)\n (attr smd)\n (fp_text reference C36 (at -1.02 -1.17 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 205 /RX_SW0))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DC33) (tstamp 584E7626)\n (at 135.375 65.95 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/5851B3D6)\n (attr smd)\n (fp_text reference C206 (at -0.225 1.3 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 267 \"Net-(C205-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 273 \"Net-(C205-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBD4) (tstamp 584E7604)\n (at 159.9 66.1 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /583625EC/5836B713)\n (attr smd)\n (fp_text reference C169 (at -2.09 -0.49 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7F3) (tstamp 584E75E2)\n (at 138.225 113.425 45)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5838229B)\n (attr smd)\n (fp_text reference C28 (at 0.028284 -0.997021 45) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 7 \"Net-(C28-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 348 /B))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9FA) (tstamp 584E74E4)\n (at 181.02 59.43 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /584E1072)\n (attr smd)\n (fp_text reference C3 (at -1.42 0.17 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 338 \"Net-(C3-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 198 \"Net-(C3-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5871F374) (tstamp 584E74C2)\n (at 172.225 60.15 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /584E2F81)\n (attr smd)\n (fp_text reference C4 (at 1.525 -0.06 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D738) (tstamp 584E7474)\n (at 164.925 90.35 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583D771B)\n (attr smd)\n (fp_text reference C7 (at -0.45 -0.855 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 163 \"Net-(C7-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 112 \"Net-(C7-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7CE) (tstamp 584E7452)\n (at 167.086091 113.311091 135)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC5D)\n (attr smd)\n (fp_text reference C8 (at 0.089931 1.198546 135) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 135) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 145 \"Net-(C8-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 347 /RX1))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 584E7430)\n (at 161.2 113.325 45)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/58381F46)\n (attr smd)\n (fp_text reference C9 (at 0 -1.7 45) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 346 /A))\n (pad 2 smd rect (at 0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 146 \"Net-(C9-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7FF) (tstamp 584E73E2)\n (at 144.425 113.4 135)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/58382292)\n (attr smd)\n (fp_text reference C12 (at 0.060104 1.127835 135) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 135) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 24 \"Net-(C12-Pad2)\"))\n (pad 1 smd rect (at -0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 345 /RX2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAD5) (tstamp 584E7394)\n (at 150.875 115.15)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC17)\n (attr smd)\n (fp_text reference C83 (at -2.045 0.02) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 202 /RX_SW5))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7DA) (tstamp 584E72C2)\n (at 165.725 115.325)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FB5F)\n (attr smd)\n (fp_text reference C81 (at -2.125 1.485) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 149 \"Net-(C81-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAE0) (tstamp 584E728A)\n (at 150.525 116.05 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC10)\n (attr smd)\n (fp_text reference C84 (at 0.045 -1.19 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 203 /RX_SW4))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7E5) (tstamp 584E7268)\n (at 154.575 115.15)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FB44)\n (attr smd)\n (fp_text reference C85 (at 0.355 1.06) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 143 \"Net-(C85-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAB7) (tstamp 584E7246)\n (at 166.18 116.61 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC30)\n (attr smd)\n (fp_text reference C87 (at 0.86 -0.97 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D703) (tstamp 584E7224)\n (at 170.61 103.23 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1ACE)\n (attr smd)\n (fp_text reference C89 (at 0 -1.13 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D701) (tstamp 584E7202)\n (at 163.18 104.22 225)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1BD7)\n (attr smd)\n (fp_text reference C90 (at -2.095 -0.41 225) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 225) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 225) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 46 /receiver/RF_IN))\n (pad 1 smd rect (at -0.55 0 225) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 336 \"Net-(C90-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D71F) (tstamp 584E71E0)\n (at 162.46 101.95 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/583CF52C/583D1AB3)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C91 (at -1.64 -0.04 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 109 \"Net-(C113-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7FA) (tstamp 584E7166)\n (at 143.125 115.425)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FB79)\n (attr smd)\n (fp_text reference C82 (at 0.095 1.575) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 18p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 144 \"Net-(C82-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8A1) (tstamp 584E707E)\n (at 134 89.025)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583E250D/583E64BB)\n (attr smd)\n (fp_text reference C221 (at 0.67 -1.925) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 384 /fpga/adc/REFL))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 383 /fpga/adc/REFH))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D7DC) (tstamp 584E6FC2)\n (at 165.53 116.41 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC3F)\n (attr smd)\n (fp_text reference C80 (at 1.88 -1.56 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAE8) (tstamp 584E6F06)\n (at 140.925 117.85 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FBD4)\n (attr smd)\n (fp_text reference C77 (at 0.355 -1.04 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 18p (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 214 /RX_SW2))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DAF8) (tstamp 584E6EE4)\n (at 143.975 114.025 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5837DA7A/5837FC4E)\n (attr smd)\n (fp_text reference C78 (at -0.905 -0.975 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8C2) (tstamp 584E6EAC)\n (at 133.925 81.85)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583E250D/583E87F7)\n (attr smd)\n (fp_text reference C225 (at 0.005 -1.77) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D89C) (tstamp 584E6E8A)\n (at 136.2 89.025)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583E250D/583E447A)\n (attr smd)\n (fp_text reference C224 (at 1.36 -1.745 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8A4) (tstamp 584E6E68)\n (at 130.5 88.075 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583E250D/583E3A81)\n (attr smd)\n (fp_text reference C223 (at 1.455 -0.18) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D992) (tstamp 584E6E1A)\n (at 137.9 38.925 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583C5B9D)\n (attr smd)\n (fp_text reference C209 (at -1.975 -0.04 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33p (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 344 \"Net-(C209-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D968) (tstamp 584E6DF8)\n (at 136.075 46.95 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B35D4)\n (attr smd)\n (fp_text reference C210 (at 0.055 -0.89 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 343 \"Net-(C210-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D966) (tstamp 584E6DD6)\n (at 136.375 49.15 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B5665)\n (attr smd)\n (fp_text reference C211 (at 0.845 -1.17 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D963) (tstamp 584E6DB4)\n (at 141.225 53.65)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B55E3)\n (attr smd)\n (fp_text reference C212 (at -0.515 1.08) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 584E6D92)\n (at 140.725 43.05 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B4EEE)\n (attr smd)\n (fp_text reference C213 (at 0 1.7 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 382 \"Net-(C213-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB4A) (tstamp 584E6D70)\n (at 139.775 44.9 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B4E78)\n (attr smd)\n (fp_text reference C214 (at -0.09 1.135 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 406 /fpga/usb/5V))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D988) (tstamp 584E6D4E)\n (at 136.675 44.6 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583B519D)\n (attr smd)\n (fp_text reference C215 (at 1.62 0.145 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D99D) (tstamp 584E6D16)\n (at 148.8 39.075 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583ABBE9/583C5BF7)\n (attr smd)\n (fp_text reference C208 (at -0.595 -1.79) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 342 \"Net-(C208-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D8B8) (tstamp 584E6CF4)\n (at 129.4 87.475 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5837E082/583E250D/583E8CF8)\n (attr smd)\n (fp_text reference C219 (at 1.915 0.2 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DC3A) (tstamp 584E6CBC)\n (at 137.56 65.46 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/585196CB)\n (zone_connect 2)\n (attr smd)\n (fp_text reference FB9 (at -1.815 0.45 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value BLM18PG181SN1D (at 0 -1.9 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 199 /1V8) (zone_connect 2))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 273 \"Net-(C205-Pad1)\") (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DC44) (tstamp 584E6C9A)\n (at 135.575 66.91)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/5851C0CC)\n (attr smd)\n (fp_text reference FB10 (at -0.055 0) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value BLM18PG181SN1D (at 0 -1.9) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 267 \"Net-(C205-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 55A401E5) (tstamp 584E6C78)\n (at 164.83 99.56 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/583CF52C/583D1AF4)\n (attr smd)\n (fp_text reference L1 (at 0 -1.425 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value AISC-0603HP-R10J (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 79 \"Net-(C115-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 337 \"Net-(C121-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DB61) (tstamp 584E6C56)\n (at 161.906873 93.398369 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/583E8E25/583E9E9D)\n (attr smd)\n (fp_text reference L3 (at -0.123127 1.248369 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 97 \"Net-(C135-Pad1)\"))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 81 \"Net-(C125-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DB63) (tstamp 584E6C1E)\n (at 161.906873 94.798369 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/583E8E25/583E9EA4)\n (attr smd)\n (fp_text reference L8 (at -0.083127 -1.431631 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 88 \"Net-(C135-Pad2)\"))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 177 \"Net-(C126-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D707) (tstamp 584E6B62)\n (at 170.625 102.2 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/583CF52C/583D1C18)\n (attr smd)\n (fp_text reference FB8 (at -1.645 0.02 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 109 \"Net-(C113-Pad1)\"))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 55A401E5) (tstamp 584E6AFE)\n (at 174.75 60.15 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /584E5027)\n (attr smd)\n (fp_text reference FB5 (at 0 -1.425 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D8A7) (tstamp 584E6A84)\n (at 128.1 87.725 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/583E8D35)\n (attr smd)\n (fp_text reference C216 (at -0.115 1.41 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 2.2u (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 55A401E5) (tstamp 584E6A62)\n (at 134.6 89.375 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/583E669C)\n (attr smd)\n (fp_text reference C218 (at 0 1.425 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 384 /fpga/adc/REFL))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 55A401E5) (tstamp 584E6A40)\n (at 133.675 89.35 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/583E665A)\n (attr smd)\n (fp_text reference C217 (at 1.1 1.525 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 383 /fpga/adc/REFH))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 55A401E5) (tstamp 584E6A1E)\n (at 134 90.125)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/583E6598)\n (attr smd)\n (fp_text reference C220 (at 0 -1.425) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 2.2u (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 384 /fpga/adc/REFL))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 383 /fpga/adc/REFH))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D89A) (tstamp 584E69FC)\n (at 137.2 90.425)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /5837E082/583E250D/583E443A)\n (attr smd)\n (fp_text reference C222 (at -0.26 1.205) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 584E69AE)\n (at 148.42 61.69 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/584FCAC1)\n (attr smd)\n (fp_text reference C195 (at 0 -1.675 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D956) (tstamp 584E698C)\n (at 131.39 57.9)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/584FCC71)\n (attr smd)\n (fp_text reference C194 (at 0.01 -1.48) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D70A) (tstamp 584E6912)\n (at 170.925 99.5 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/583CF52C/583D1BE9)\n (attr smd)\n (fp_text reference C88 (at 2.07 0.035 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D71C) (tstamp 584E6840)\n (at 160.79 101.07 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/583CF52C/583D1AC0)\n (attr smd)\n (fp_text reference C113 (at -0.04 -1.6 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 109 \"Net-(C113-Pad1)\"))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 55A401FA) (tstamp 584E67B0)\n (at 111.4 51.545 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5799430D)\n (zone_connect 2)\n (attr smd)\n (fp_text reference L2 (at 0 1.675 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value CIC21P101NE (at 0 -2.1 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 96 /power/12V_IN) (zone_connect 2))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 56 /power/12V) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D96B) (tstamp 584E678E)\n (at 131.62 51.94 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/583AFBD9)\n (attr smd)\n (fp_text reference C183 (at 2.33 0.54 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 368 /1V0))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D827) (tstamp 584E676C)\n (at 120.44 94.2 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/57993E08)\n (attr smd)\n (fp_text reference L6 (at -0.09 -1.54) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 584E6734)\n (at 119.18 111.03)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/57994C77)\n (attr smd)\n (fp_text reference L7 (at 0 -1.675) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 584E6712)\n (at 140.66 57.82)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/584F6A0D)\n (attr smd)\n (fp_text reference C185 (at 0 -1.675) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 55A401FA) (tstamp 584E66DA)\n (at 135.6 60.15 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/583AFF98)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C186 (at 0 1.675 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7u (at 0 -2.1 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 368 /1V0) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 55A401FA) (tstamp 584E66B8)\n (at 125.35 72.675 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /5837E082/584F6A13)\n (attr smd)\n (fp_text reference C188 (at 0 1.675 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7u (at 0 -2.1 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 199 /1V8))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:DFN-8 (layer F.Cu) (tedit 584D633D) (tstamp 584E662E)\n (at 171.675 58.35 270)\n (descr \"DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF)\")\n (tags \"DFN 0.5\")\n (path /584DFE43)\n (attr smd)\n (fp_text reference U2 (at -0.05 -2.075 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value NB3N551 (at -0.05 2.075 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -1.35) (end -1.45 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -1.35) (end 1.35 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.65 1.15) (end 0.65 1.15) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.225 -1.15) (end 0.65 -1.15) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.95 -0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 421 \"Net-(R133-Pad1)\"))\n (pad 2 smd rect (at -0.95 -0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 420 \"Net-(R131-Pad2)\"))\n (pad 3 smd rect (at -0.95 0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 413 \"Net-(R119-Pad2)\"))\n (pad 4 smd rect (at -0.95 0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 414 \"Net-(R120-Pad2)\"))\n (pad 5 smd rect (at 0.95 0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 419 \"Net-(R132-Pad2)\"))\n (pad 6 smd rect (at 0.95 0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at 0.95 -0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (pad 8 smd rect (at 0.95 -0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 422 \"Net-(C261-Pad1)\"))\n (pad EP smd rect (at 0 0.325 270) (size 0.9 0.65) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad EP smd rect (at 0 -0.325 270) (size 0.9 0.65) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:DFN-8-1EP_2x2mm_Pitch0.5mm (layer F.Cu) (tedit 5870D722) (tstamp 584E65F4)\n (at 164.325 101.7 90)\n (descr \"DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF)\")\n (tags \"DFN 0.5\")\n (path /562EEB8A/583CF52C/583D1AAB)\n (zone_connect 2)\n (attr smd)\n (fp_text reference U12 (at -2.85 2.565 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TRF37A75 (at -0.05 2.075 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -1.35) (end -1.45 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -1.35) (end 1.35 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.65 1.15) (end 0.65 1.15) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.225 -1.15) (end 0.65 -1.15) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.95 -0.75 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 109 \"Net-(C113-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at -0.95 -0.25 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 336 \"Net-(C90-Pad1)\") (zone_connect 2))\n (pad 3 smd rect (at -0.95 0.25 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -0.95 0.75 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at 0.95 0.75 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 175 \"Net-(R14-Pad1)\") (zone_connect 2))\n (pad 6 smd rect (at 0.95 0.25 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 7 smd rect (at 0.95 -0.25 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 337 \"Net-(C121-Pad2)\") (zone_connect 2))\n (pad 8 smd rect (at 0.95 -0.75 90) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 9 smd rect (at 0 0.44 90) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (pad 9 smd rect (at 0 -0.44 90) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2) (zone_connect 2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:KT2520K (layer F.Cu) (tedit 5870D9EE) (tstamp 584E6269)\n (at 181.06 61.505 90)\n (path /58473C64)\n (fp_text reference U1 (at 0.075 0.04 90) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value KT2520K-40MHz (at 0 -2.475 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.275 -1.025) (end 1.225 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.225 -1.025) (end 1.225 0.975) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.225 0.975) (end -1.275 0.975) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.275 0.975) (end -1.275 -1.025) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.775 0.85) (end -1.775 1.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.775 1.45) (end -1.125 1.45) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.175 0.7 90) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at -0.025 0.9 90) (size 0.7 0.43) (layers F.Cu F.Paste F.Mask))\n (pad 3 smd rect (at 1.125 0.7 90) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 4 smd rect (at 1.125 -0.775 90) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask)\n (net 198 \"Net-(C3-Pad2)\"))\n (pad 5 smd rect (at -0.025 -0.975 90) (size 0.7 0.43) (layers F.Cu F.Paste F.Mask))\n (pad 6 smd rect (at -1.175 -0.775 90) (size 0.5 0.825) (layers F.Cu F.Paste F.Mask)\n (net 389 /1V8_OSC))\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D984) (tstamp 584E61BF)\n (at 133.575 44.15 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B978A)\n (attr smd)\n (fp_text reference R71 (at -0.12 1.265 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 4.7k (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 193 \"Net-(R71-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 122 /fpga/usb/USB_5V))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D985) (tstamp 584E6171)\n (at 134.475 44.15 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B97E7)\n (attr smd)\n (fp_text reference R72 (at 1.66 0.045 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10k (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 193 \"Net-(R71-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DC06) (tstamp 584E60F7)\n (at 142.51 70.22 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58514053)\n (attr smd)\n (fp_text reference R70 (at 0.4 1.33 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 190 \"Net-(R69-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D7C2) (tstamp 584E60D5)\n (at 174.86 111.48 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/5836295B)\n (attr smd)\n (fp_text reference R67 (at -0.1 1.19 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 153 \"Net-(R67-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB0A) (tstamp 584E609D)\n (at 128.22 117.37 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58369E0D)\n (attr smd)\n (fp_text reference R66 (at -0.28 0.81 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 173 /PORT_SW1))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 159 \"Net-(R66-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D961) (tstamp 584E607B)\n (at 144.375 53.85 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B63A8)\n (attr smd)\n (fp_text reference R85 (at -0.02 -1.025 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 191 \"Net-(R85-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 192 /fpga/TMS))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DC09) (tstamp 584E6059)\n (at 142.22 71.85 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/58513E23)\n (attr smd)\n (fp_text reference R69 (at 0.05 1.81 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 190 \"Net-(R69-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8AB) (tstamp 584E600B)\n (at 128.8 85.425 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583E250D/583EA10F)\n (attr smd)\n (fp_text reference R93 (at 1.72 -0.055 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 188 \"Net-(R93-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8B0) (tstamp 584E5FE9)\n (at 128.75 83.325 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583E250D/583EA67C)\n (attr smd)\n (fp_text reference R92 (at 1.96 -0.025 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 104 \"Net-(R91-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D8BE) (tstamp 584E5FC7)\n (at 128.8 84.225)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583E250D/583EA63A)\n (attr smd)\n (fp_text reference R91 (at -1.76 0.055) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 104 \"Net-(R91-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 370 /fpga/adc/3V0))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D95C) (tstamp 584E5F8F)\n (at 145.475 53.95 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B5CC5)\n (attr smd)\n (fp_text reference R88 (at -1.52 -0.085 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 186 \"Net-(R88-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 187 /fpga/TDI))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870DA85) (tstamp 584E5F57)\n (at 131.025 113.9 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58362A1E)\n (attr smd)\n (fp_text reference R68 (at -0.13 -2.095 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 161 \"Net-(R68-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D960) (tstamp 584E5F1F)\n (at 146.675 54 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B5C84)\n (attr smd)\n (fp_text reference R84 (at 0.2 1.655 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 33 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 182 \"Net-(R84-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 183 /fpga/TCK))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D98B) (tstamp 584E5EE7)\n (at 134.575 45.85)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B9233)\n (attr smd)\n (fp_text reference R82 (at -1.665 -0.02) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k5 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 90 \"Net-(R82-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 181 \"Net-(R81-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D97D) (tstamp 584E5EC5)\n (at 128.475 44.35 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B315C)\n (attr smd)\n (fp_text reference R81 (at -2.085 -0.17 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 27 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 181 \"Net-(R81-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 123 /fpga/usb/USBDP))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D97B) (tstamp 584E5EA3)\n (at 128.475 43.25 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B312F)\n (attr smd)\n (fp_text reference R80 (at -2.045 0.04 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 27 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 124 /fpga/usb/USBDM))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 180 \"Net-(R80-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB53) (tstamp 584E5E81)\n (at 133.075 38.725 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583C7D2C)\n (attr smd)\n (fp_text reference R79 (at 0.925 -1.465) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 2k2 (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 167 /fpga/usb/DO))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 166 /fpga/usb/EEDATA))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB51) (tstamp 584E5E07)\n (at 133.575 37.325 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583C7CCB)\n (attr smd)\n (fp_text reference R73 (at -1.015 -1.075 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10k (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 167 /fpga/usb/DO))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 406 /fpga/usb/5V))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB4D) (tstamp 584E5DE5)\n (at 142.575 43.05 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5837E082/583ABBE9/583B4D7B)\n (attr smd)\n (fp_text reference R83 (at -0.425 1.61 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 470 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 406 /fpga/usb/5V))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 382 \"Net-(C213-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB98) (tstamp 584E5D81)\n (at 167.159966 93.55524)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9F41)\n (attr smd)\n (fp_text reference R24 (at 0.610034 -1.30524 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 81 \"Net-(C125-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 179 \"Net-(C122-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB8C) (tstamp 584E5D5F)\n (at 169.859966 94.85524)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9EF1)\n (attr smd)\n (fp_text reference R23 (at 1.850034 0.01476) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 78 /receiver/IF+))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 176 \"Net-(C123-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB8B) (tstamp 584E5D3D)\n (at 169.909966 93.65524)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9EEA)\n (attr smd)\n (fp_text reference R22 (at 1.840034 -0.07524) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 179 \"Net-(C122-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 77 /receiver/IF-))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB9C) (tstamp 584E5C97)\n (at 167.159966 94.65524)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9F3A)\n (attr smd)\n (fp_text reference R28 (at 0.560034 1.37476 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 176 \"Net-(C123-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 177 \"Net-(C126-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAD1) (tstamp 584E5C33)\n (at 154.475 115.15 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FB3C)\n (attr smd)\n (fp_text reference R10 (at -0.175 -1.19 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 143 \"Net-(C85-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DADE) (tstamp 584E5C11)\n (at 151.825 114.25)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FB8B)\n (attr smd)\n (fp_text reference R9 (at 1.495 -0.1) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 202 /RX_SW5))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 142 \"Net-(R9-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D86D) (tstamp 584E5BEF)\n (at 131.425 100.075 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E39)\n (attr smd)\n (fp_text reference R40 (at 0.895 1.455) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 110 \"Net-(C144-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 88 \"Net-(C135-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAF2) (tstamp 584E5BCD)\n (at 142.875 114.625 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FB71)\n (attr smd)\n (fp_text reference R7 (at -0.055 0.985 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 144 \"Net-(C82-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAD7) (tstamp 584E5BAB)\n (at 152.45 116.075)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FB92)\n (attr smd)\n (fp_text reference R8 (at -0.04 1.255) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 141 \"Net-(R8-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 203 /RX_SW4))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAEE) (tstamp 584E5B89)\n (at 140.375 114.625)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FBBF)\n (attr smd)\n (fp_text reference R4 (at -0.425 -1.095 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 213 /RX_SW3))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 44 \"Net-(R4-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB07) (tstamp 584E5B67)\n (at 130.26 117.55 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58369E07)\n (attr smd)\n (fp_text reference R55 (at -0.03 0.83 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 158 \"Net-(R55-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAA7) (tstamp 584E5B45)\n (at 176.81 113.03)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58368BB2)\n (attr smd)\n (fp_text reference R54 (at 0.76 -0.78) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 155 \"Net-(R54-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870DA38) (tstamp 584E5B23)\n (at 159.09 66.41)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58366E8E)\n (attr smd)\n (fp_text reference R51 (at 0.18 1.28) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 87 \"Net-(R51-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 173 /PORT_SW1))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAA1) (tstamp 584E5B01)\n (at 178.26 114.06)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58366385)\n (attr smd)\n (fp_text reference R52 (at 1.56 -0.2 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 171 /3V3A))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 156 \"Net-(C171-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 584E5ADF)\n (at 165.825 102.8 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583CF52C/583D1BE1)\n (attr smd)\n (fp_text reference R14 (at 0 1.4 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 175 \"Net-(R14-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DABB) (tstamp 584E5ABD)\n (at 162.225 116.5 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FBAD)\n (attr smd)\n (fp_text reference R1 (at -1.34 -0.245 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 205 /RX_SW0))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 147 \"Net-(R1-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAE5) (tstamp 584E5A85)\n (at 140.8 116.85)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FBC6)\n (attr smd)\n (fp_text reference R2 (at 1.5 0) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 214 /RX_SW2))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 89 \"Net-(R2-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAC5) (tstamp 584E5A63)\n (at 163.08 115.2)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FBA6)\n (attr smd)\n (fp_text reference R3 (at -1.43 -0.18 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 148 \"Net-(R3-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 204 /RX_SW1))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAB3) (tstamp 584E5A41)\n (at 165.71 115.39 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5837DA7A/5837FB57)\n (attr smd)\n (fp_text reference R5 (at -0.91 0.91 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 403 \"/receiver/RX switch/3V3\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 149 \"Net-(C81-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D84D) (tstamp 584E5A09)\n (at 129.85 99.975 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E58)\n (attr smd)\n (fp_text reference R39 (at 1.5 1.205 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 110 \"Net-(C144-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 91 \"Net-(C138-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBCE) (tstamp 584E59D1)\n (at 161.05 66.6)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58366E15)\n (attr smd)\n (fp_text reference R50 (at -0.09 1.18) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1k (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 174 /PORT_SW0))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 86 \"Net-(R50-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBCD) (tstamp 584E59AF)\n (at 164.4 66.6 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58364DAE)\n (attr smd)\n (fp_text reference R49 (at -0.13 -1.15 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 150 \"Net-(C168-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 171 /3V3A))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DAA6) (tstamp 584E598D)\n (at 174.81 112.73)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/58368BB8)\n (attr smd)\n (fp_text reference R56 (at -1.94 0.03) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 173 /PORT_SW1))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 154 \"Net-(R56-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 584E596B)\n (at 157 55.675 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/5846B670)\n (attr smd)\n (fp_text reference R47 (at 0 -1.4 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 119 \"Net-(C157-Pad2)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 117 /tx_amp/OUTP))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D83B) (tstamp 584E5949)\n (at 131.475 92.95 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E6D)\n (attr smd)\n (fp_text reference R46 (at 0.28 1.665) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 50 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 170 /ADC+))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 385 \"Net-(R46-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB0D) (tstamp 584E5927)\n (at 129.275 115.075 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /583625EC/583667CB)\n (attr smd)\n (fp_text reference R53 (at 1.635 -0.005 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 157 \"Net-(C172-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 415 3V3A_RX))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D861) (tstamp 584E5905)\n (at 132.825 98 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E49)\n (attr smd)\n (fp_text reference R44 (at -1.955 0.38 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 3.3k (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 101 \"Net-(C146-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 102 \"Net-(C146-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D875) (tstamp 584E58E3)\n (at 131.075 97.975)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583EF803)\n (attr smd)\n (fp_text reference R43 (at -1.735 -0.805) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 3.3k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 110 \"Net-(C144-Pad2)\"))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 115 \"Net-(C144-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D838) (tstamp 584E58C1)\n (at 132.55 92.925 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E66)\n (attr smd)\n (fp_text reference R45 (at -0.415 -1.51) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 50 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 172 /ADC-))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 386 \"Net-(R45-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D86B) (tstamp 584E589F)\n (at 132.425 100.05 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9E40)\n (attr smd)\n (fp_text reference R41 (at 0.81 -1.245) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 97 \"Net-(C135-Pad1)\"))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 102 \"Net-(C146-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 584E587D)\n (at 156.975 56.575)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/5846B6D0)\n (attr smd)\n (fp_text reference R48 (at 0 -1.4) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 119 \"Net-(C157-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D863) (tstamp 584E5795)\n (at 134.025 99.9)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/583E8E25/583E9EB9)\n (attr smd)\n (fp_text reference R42 (at 1.005 -0.98) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 102 \"Net-(C146-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 92 \"Net-(C139-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOT-23-6 (layer F.Cu) (tedit 5870D98E) (tstamp 584E56CB)\n (at 133.345 38.2725 270)\n (path /5837E082/583ABBE9/583C7AB4)\n (fp_text reference U32 (at 2.3875 -0.095) (layer F.SilkS)\n (effects (font (size 0.762 0.762) (thickness 0.0762)))\n )\n (fp_text value 93LC46B (at 0.0635 0 270) (layer F.SilkS)\n (effects (font (size 0.50038 0.50038) (thickness 0.0762)))\n )\n (fp_circle (center -1.1 0.5) (end -1 0.2) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 0.9) (end -1.5 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -0.8) (end 1.5 -0.8) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -0.8) (end 1.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 0.9) (end -1.5 0.9) (layer F.SilkS) (width 0.15))\n (pad 6 smd rect (at -0.9525 -1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 406 /fpga/usb/5V))\n (pad 5 smd rect (at 0 -1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 164 /fpga/usb/EECS))\n (pad 4 smd rect (at 0.9525 -1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 165 /fpga/usb/EESK))\n (pad 3 smd rect (at 0.9525 1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 166 /fpga/usb/EEDATA))\n (pad 2 smd rect (at 0 1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 1 smd rect (at -0.9525 1.27 270) (size 0.70104 1.00076) (layers F.Cu F.Paste F.Mask)\n (net 167 /fpga/usb/DO))\n (model smd/SOT23_6.wrl\n (at (xyz 0 0 0))\n (scale (xyz 0.11 0.11 0.11))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:TCM1-63AX+ (layer F.Cu) (tedit 5870D72F) (tstamp 584E566E)\n (at 165.4123 94.0925 180)\n (path /562EEB8A/583D46C8)\n (zone_connect 2)\n (fp_text reference T1 (at 3.2823 0.0025 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TCM1-63AX+ (at 0 -3.6 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.9 -2.1) (end 1.9 -2.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.9 -2.1) (end 1.9 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.9 2) (end -1.9 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.9 2) (end -1.9 -2.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.2827 -1.5875 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at -0.0127 -1.5875 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 3 smd rect (at 1.2573 -1.5875 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 162 /receiver/RF_BALUN) (zone_connect 2))\n (pad 4 smd rect (at 1.2573 1.5925 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 163 \"Net-(C7-Pad1)\") (zone_connect 2))\n (pad 5 smd rect (at -0.0127 1.5925 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at -1.2827 1.5925 180) (size 0.76 1.65) (layers F.Cu F.Paste F.Mask)\n (net 31 \"Net-(C52-Pad2)\") (zone_connect 2))\n )\n\n (module VNA:USB_MICRO (layer F.Cu) (tedit 5870D96F) (tstamp 584E52BE)\n (at 125.52 40.635 180)\n (path /5837E082/583ABBE9/583BA416)\n (fp_text reference U31 (at -0.24 5.645 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value USB-MICRO (at 0.1 7.3 180) (layer F.SilkS) hide\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 4.9) (end -3.6 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -0.1) (end 3.4 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 -0.1) (end 3.4 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.4 4.9) (end -3.6 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -4.95 4.125) (end 4.75 4.125) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.3 0 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)\n (net 122 /fpga/usb/USB_5V))\n (pad 5 smd rect (at 1.3 0 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 0 0 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)\n (net 123 /fpga/usb/USBDP))\n (pad 2 smd rect (at -0.65 0 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)\n (net 124 /fpga/usb/USBDM))\n (pad 4 smd rect (at 0.65 0 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)\n (net 125 \"Net-(U31-Pad4)\"))\n (pad ~ smd rect (at -3.1 0.12 180) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at 3.1 0.12 180) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask))\n (pad SH smd rect (at 3.8 2.675 180) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask)\n (net 126 \"Net-(U31-PadSH)\"))\n (pad ~ smd rect (at -3.8 2.675 180) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at 1.2 2.675 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask))\n (pad ~ smd rect (at -1.2 2.675 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask))\n )\n\n (module VNA:VFQFN-16 (layer F.Cu) (tedit 584D6891) (tstamp 584E526C)\n (at 156.8 59.125 180)\n (path /56A2B5A1/584696B7)\n (zone_connect 2)\n (fp_text reference U24 (at 0 2.7 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value HMC713LP3E (at 0 -3.3 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.5 -1.5) (end -1.9 -1.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -1.5) (end 1.5 -1.5) (layer F.SilkS) (width 0.15))\n (pad EP smd rect (at 0 0 270) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 180) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 0.4 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.4 0.4 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 -0.4 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.4 -0.4 180) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 180) (size 1.6 1.6) (layers F.Cu F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 16 smd oval (at -0.75 -1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A) (zone_connect 2))\n (pad 15 smd oval (at -0.25 -1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A) (zone_connect 2))\n (pad 14 smd oval (at 0.25 -1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 363 \"Net-(R94-Pad1)\") (zone_connect 2))\n (pad 13 smd oval (at 0.75 -1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 117 /tx_amp/OUTP) (zone_connect 2))\n (pad 8 smd oval (at 0.75 1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 118 \"Net-(C166-Pad1)\") (zone_connect 2))\n (pad 7 smd oval (at 0.25 1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 119 \"Net-(C157-Pad2)\") (zone_connect 2))\n (pad 6 smd oval (at -0.25 1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A) (zone_connect 2))\n (pad 9 smd oval (at 1.35 0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 10 smd oval (at 1.35 0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 11 smd oval (at 1.35 -0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 12 smd oval (at 1.35 -0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd oval (at -0.75 1.35 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd oval (at -1.35 0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 120 \"Net-(U24-Pad4)\") (zone_connect 2))\n (pad 3 smd oval (at -1.35 0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 412 \"Net-(C255-Pad1)\") (zone_connect 2))\n (pad 2 smd oval (at -1.35 -0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 1 smd oval (at -1.35 -0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 121 \"Net-(U24-Pad1)\") (zone_connect 2))\n )\n\n (module VNA:VFQFN-16 (layer F.Cu) (tedit 5870D878) (tstamp 584E520E)\n (at 132.025 95.65 90)\n (path /562EEB8A/583E8E25/583E9FB8)\n (fp_text reference U21 (at -0.96 3.295 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value ADA4940-1 (at 0 -3.3 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.5 -1.5) (end 1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 1.5) (end -1.5 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.5 -1.5) (end -1.9 -1.9) (layer F.SilkS) (width 0.15))\n (pad 1 smd oval (at -1.35 -0.75 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 115 \"Net-(C144-Pad1)\"))\n (pad 2 smd oval (at -1.35 -0.25 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 110 \"Net-(C144-Pad2)\"))\n (pad 3 smd oval (at -1.35 0.25 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 102 \"Net-(C146-Pad2)\"))\n (pad 4 smd oval (at -1.35 0.75 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 101 \"Net-(C146-Pad1)\"))\n (pad 5 smd oval (at -0.75 1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 12 smd oval (at 1.35 -0.75 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 11 smd oval (at 1.35 -0.25 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 385 \"Net-(R46-Pad2)\"))\n (pad 10 smd oval (at 1.35 0.25 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 386 \"Net-(R45-Pad2)\"))\n (pad 9 smd oval (at 1.35 0.75 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (pad 6 smd oval (at -0.25 1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 7 smd oval (at 0.25 1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 8 smd oval (at 0.75 1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (pad 13 smd oval (at 0.75 -1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 14 smd oval (at 0.25 -1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 15 smd oval (at -0.25 -1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 16 smd oval (at -0.75 -1.35 90) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad EP smd rect (at 0 0 90) (size 1.6 1.6) (layers F.Cu F.Mask)\n (net 1 GND))\n (pad EP thru_hole circle (at -0.4 -0.4 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 -0.4 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.4 0.4 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.4 0.4 90) (size 0.5 0.5) (drill 0.3) (layers *.Cu *.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP smd rect (at 0 0 90) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad EP smd rect (at 0 0 180) (size 1.3 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:VQFN-24 (layer F.Cu) (tedit 587D06F4) (tstamp 5648ED23)\n (at 162.27 51.24 180)\n (path /56A2B5A1/56A2BADD)\n (fp_text reference U3 (at -3.91 0.51 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value PE43711 (at 0 3.25 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2.25 1.75) (end -2.25 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.25 2.25) (end -1.75 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.25 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at -0.75 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 59 \"Net-(C11-Pad1)\"))\n (pad 3 smd rect (at -0.25 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 4 smd rect (at 0.25 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 5 smd rect (at 0.75 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 98 /tx_amp/RF_IN))\n (pad 6 smd rect (at 1.25 1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 13 smd rect (at 1.25 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 14 smd rect (at 0.75 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 106 \"Net-(C152-Pad2)\"))\n (pad 15 smd rect (at 0.25 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 16 smd rect (at -0.25 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 328 /ATTEN_LE))\n (pad 17 smd rect (at -0.75 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 111 /SPI_CLK))\n (pad 18 smd rect (at -1.25 -1.9 180) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 320 /ATTEN_SPI_DATA))\n (pad 19 smd rect (at -1.9 -1.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 20 smd rect (at -1.9 -0.75 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 21 smd rect (at -1.9 -0.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 22 smd rect (at -1.9 0.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 23 smd rect (at -1.9 0.75 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at 1.9 1.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 8 smd rect (at 1.9 0.76 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 9 smd rect (at 1.9 0.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 10 smd rect (at 1.9 -0.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 11 smd rect (at 1.9 -0.75 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 12 smd rect (at 1.9 -1.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 24 smd rect (at -1.9 1.25 270) (size 0.25 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad EP smd rect (at 0 0 180) (size 2.7 2.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad EP thru_hole circle (at 0 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.5 -0.5 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 -1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 -1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.5 -0.5 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -0.5 0.5 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0.5 0.5 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at -1 1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 1 1 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:EJ508A (layer F.Cu) (tedit 56ADBA23) (tstamp 5691778F)\n (at 112.458 53.087 270)\n (path /564D0768/564D0BBF)\n (fp_text reference CON1 (at -4.4 3.5 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value BARREL_JACK (at -0.7 -7.6 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -6.5 7.7) (end -6.5 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -6.5 4.9) (end -2.9 4.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.9 4.9) (end -2.9 7.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -9 -6.7) (end 0 -6.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 7.7) (end -9 7.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -9 7.7) (end -9 -6.7) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 -6.7) (end 0 7.7) (layer F.SilkS) (width 0.15))\n (pad 3 thru_hole circle (at 0 -3 270) (size 4.2 4.2) (drill 3.05) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND))\n (pad 1 thru_hole circle (at -5.9 -6 270) (size 4.6 4.6) (drill 3.56) (layers *.Cu *.Mask F.SilkS)\n (net 96 /power/12V_IN) (zone_connect 2))\n (pad 2 thru_hole circle (at -5.9 0 270) (size 4.2 4.2) (drill 3.05) (layers *.Cu *.Mask F.SilkS)\n (net 1 GND))\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 55A404EB) (tstamp 5648ECB7)\n (at 161.3 88.66)\n (path /562EEB8A/5649122E)\n (fp_text reference P3 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 14 /receiver/DETO))\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 56A67093) (tstamp 5648ED30)\n (at 169.05 37.68 270)\n (path /562E7B12/56306D73)\n (fp_text reference U4 (at 0.91 -1.47 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LP5907-3V3 (at 0 -4.05 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0 270) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 4 smd rect (at 1.9 -2.6 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.6 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n )\n\n (module VNA:VFQFN-24 (layer F.Cu) (tedit 587D0722) (tstamp 5648EDC4)\n (at 165.375 86.625 180)\n (path /562EEB8A/5632744B)\n (fp_text reference U7 (at -0.075 -0.095) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value ADL5801 (at 0 -5 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2.25 1.75) (end -2.25 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2.25 2.25) (end -1.75 2.25) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2 2) (end -2 2) (layer F.SilkS) (width 0.15))\n (fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.15))\n (pad 1 smd oval (at -1.25 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd oval (at -0.75 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd oval (at -0.25 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 29 \"Net-(C37-Pad2)\"))\n (pad 4 smd oval (at 0.25 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 30 \"Net-(C38-Pad1)\"))\n (pad 5 smd oval (at 0.75 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 6 smd oval (at 1.25 1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 13 smd oval (at 1.25 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 14 smd oval (at 0.75 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 15 smd oval (at 0.25 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 112 \"Net-(C7-Pad2)\"))\n (pad 16 smd oval (at -0.25 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 113 \"Net-(C52-Pad1)\"))\n (pad 17 smd oval (at -0.75 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 18 smd oval (at -1.25 -1.8 180) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 19 smd oval (at -1.8 -1.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 20 smd oval (at -1.8 -0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 13 \"Net-(C46-Pad2)\"))\n (pad 21 smd oval (at -1.8 -0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 11 \"Net-(C44-Pad2)\"))\n (pad 22 smd oval (at -1.8 0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 114 \"Net-(U7-Pad22)\"))\n (pad 23 smd oval (at -1.8 0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd oval (at 1.8 1.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 8 smd oval (at 1.8 0.76 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 9 smd oval (at 1.8 0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 215 /MIXER_ENABLE))\n (pad 10 smd oval (at 1.8 -0.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 12 \"Net-(C45-Pad1)\"))\n (pad 11 smd oval (at 1.8 -0.75 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 14 /receiver/DETO))\n (pad 12 smd oval (at 1.8 -1.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 24 smd oval (at -1.8 1.25 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad PAD smd rect (at 0 0 180) (size 2.5 2.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad PAD thru_hole circle (at 0 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at 0 -0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at 0 0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at 0.65 -0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 -0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 0 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad PAD thru_hole circle (at -0.65 0.65 180) (size 0.3 0.3) (drill 0.3) (layers *.Cu F.SilkS F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 56A8FCBE) (tstamp 5648EDD1)\n (at 158 91.18)\n (path /562EEB8A/563156F1/56306D73)\n (fp_text reference U8 (at 1.175 -1.2) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value LP5907-3V3 (at 0 -4.05) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 4 smd rect (at 1.9 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask))\n (pad 5 smd rect (at 0 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n )\n\n (module VNA:SRR6040A (layer F.Cu) (tedit 56A6711D) (tstamp 5671B7BA)\n (at 113.045 90.765 90)\n (path /564D0768/566CB1A4)\n (fp_text reference L4 (at -0.19 -0.115 90) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value \"33u (SRR6040A-330M)\" (at -0.25 -4.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 3.3) (end -3.6 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -3.4) (end 3.1 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -3.4) (end 3.1 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 3.3) (end -3.6 3.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.25 -2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 68 \"Net-(D2-Pad1)\"))\n (pad 2 smd rect (at -0.25 2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 1 smd rect (at -3.575 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 68 \"Net-(D2-Pad1)\"))\n (pad 1 smd rect (at 3.075 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 68 \"Net-(D2-Pad1)\"))\n (pad 2 smd rect (at -3.575 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 3.075 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n )\n\n (module VNA:SRR6040A (layer F.Cu) (tedit 56A66FB5) (tstamp 5671B7C4)\n (at 113.555 110.495 90)\n (path /564D0768/566C477B)\n (fp_text reference L5 (at -0.45 0.275 180) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value \"33u (SRR6040A-330M)\" (at -0.25 -4.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -3.6 3.3) (end -3.6 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start -3.6 -3.4) (end 3.1 -3.4) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 -3.4) (end 3.1 3.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 3.1 3.3) (end -3.6 3.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.25 -2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 69 \"Net-(D3-Pad1)\"))\n (pad 2 smd rect (at -0.25 2.9 90) (size 7.3 1.4) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 1 smd rect (at -3.575 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 69 \"Net-(D3-Pad1)\"))\n (pad 1 smd rect (at 3.075 -1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 69 \"Net-(D3-Pad1)\"))\n (pad 2 smd rect (at -3.575 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 3.075 1.7 90) (size 0.65 1) (layers F.Cu F.Paste F.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n )\n\n (module Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 5671B81E)\n (at 115.09 97.185)\n (descr \"DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf)\")\n (tags \"DFN 0.5\")\n (path /564D0768/566CB19E)\n (attr smd)\n (fp_text reference U19 (at 0 -2.55) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value L7980 (at 0 2.55) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 -1.8) (end -2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 2 -1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 -1.8) (end 2 -1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.05 1.625) (end 1.05 1.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.825 -1.625) (end 1.05 -1.625) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 68 \"Net-(D2-Pad1)\"))\n (pad 2 smd rect (at -1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 76 /power/SYNC_3V3))\n (pad 3 smd rect (at -1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 199 /1V8))\n (pad 4 smd rect (at -1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 62 \"Net-(C105-Pad1)\"))\n (pad 5 smd rect (at 1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (pad 6 smd rect (at 1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 74 \"Net-(R32-Pad1)\"))\n (pad 7 smd rect (at 1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 8 smd rect (at 1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 9 smd rect (at 0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_3x3mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.5mm (layer F.Cu) (tedit 5870D819) (tstamp 5671B82E)\n (at 115.07 105.065)\n (descr \"DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf)\")\n (tags \"DFN 0.5\")\n (path /564D0768/566C40B0)\n (attr smd)\n (fp_text reference U20 (at 3.9 -2.765) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value L7980 (at 0 2.55) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -2 -1.8) (end -2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start 2 -1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 -1.8) (end 2 -1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -2 1.8) (end 2 1.8) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.05 1.625) (end 1.05 1.625) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.825 -1.625) (end 1.05 -1.625) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 69 \"Net-(D3-Pad1)\"))\n (pad 2 smd rect (at -1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 76 /power/SYNC_3V3))\n (pad 3 smd rect (at -1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 4 smd rect (at -1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 63 \"Net-(C106-Pad1)\"))\n (pad 5 smd rect (at 1.4 0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (pad 6 smd rect (at 1.4 0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 75 \"Net-(R34-Pad1)\"))\n (pad 7 smd rect (at 1.4 -0.25) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 8 smd rect (at 1.4 -0.75) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 9 smd rect (at 0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at -0.415 -0.595) (size 0.83 1.19) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_3x3mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:SOT-23-5 (layer F.Cu) (tedit 56A671D1) (tstamp 569163CE)\n (at 142.395 90.38)\n (path /562EEB8A/56921FAD)\n (fp_text reference U22 (at 1.02 -1.34) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TSV911 (at 0 -4.05) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.55 -2.2) (end -0.55 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.55 -0.45) (end 2.45 -0.45) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -0.45) (end 2.45 -2.2) (layer F.SilkS) (width 0.15))\n (fp_line (start 2.45 -2.2) (end -0.55 -2.2) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 388 \"Net-(C132-Pad1)\"))\n (pad 2 smd rect (at 0.95 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 3 smd rect (at 1.9 0) (size 0.6 1.05) (layers F.Cu F.Paste F.Mask)\n (net 85 \"Net-(C133-Pad1)\"))\n (pad 4 smd rect (at 1.9 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 388 \"Net-(C132-Pad1)\"))\n (pad 5 smd rect (at 0 -2.6) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n )\n\n (module VNA:SOD-123F (layer F.Cu) (tedit 5870D822) (tstamp 569A8D84)\n (at 110.59 97.465 270)\n (path /564D0768/566CB1C5)\n (fp_text reference D2 (at 3.015 -0.14 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value SS13FL (at -0.3 -2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -0.1) (end 0.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -1.1) (end -0.8 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.1) (end -1.6 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.9) (end 1.4 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.9) (end 1.4 -1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -1.1) (end -1.6 -1.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 68 \"Net-(D2-Pad1)\"))\n (pad 2 smd rect (at 1.36 -0.1 270) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:SOD-123F (layer F.Cu) (tedit 5870D813) (tstamp 569A8D90)\n (at 110.92 104.665 90)\n (path /564D0768/566C4CB4)\n (fp_text reference D3 (at 2.815 -0.13 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value SS13FL (at -0.3 -2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.8 -0.1) (end 0.5 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.5 -1.1) (end -0.8 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 -1.1) (end -1.6 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.6 0.9) (end 1.4 0.9) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 0.9) (end 1.4 -1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 1.4 -1.1) (end -1.6 -1.1) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.5 -0.1 90) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 69 \"Net-(D3-Pad1)\"))\n (pad 2 smd rect (at 1.36 -0.1 90) (size 1.34 1.8) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n )\n\n (module VNA:DFN-8-1EP_2x2mm_Pitch0.5mm (layer F.Cu) (tedit 56A1373B) (tstamp 56A14955)\n (at 162.12 56.305 270)\n (descr \"DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF)\")\n (tags \"DFN 0.5\")\n (path /56A2B5A1/56A2BEBC)\n (attr smd)\n (fp_text reference U26 (at -0.05 -2.075 270) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value TRF37A75 (at -0.05 2.075 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -1.35) (end -1.45 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -1.35) (end 1.35 -1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 1.35) (end 1.35 1.35) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.65 1.15) (end 0.65 1.15) (layer F.SilkS) (width 0.15))\n (fp_line (start -1.225 -1.15) (end 0.65 -1.15) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.95 -0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 99 \"Net-(C142-Pad1)\"))\n (pad 2 smd rect (at -0.95 -0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 105 \"Net-(C152-Pad1)\"))\n (pad 3 smd rect (at -0.95 0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 4 smd rect (at -0.95 0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 5 smd rect (at 0.95 0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 108 \"Net-(R97-Pad1)\"))\n (pad 6 smd rect (at 0.95 0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 7 smd rect (at 0.95 -0.25 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 107 \"Net-(C151-Pad2)\"))\n (pad 8 smd rect (at 0.95 -0.75 270) (size 0.5 0.28) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 9 smd rect (at 0 0.44 270) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (pad 9 smd rect (at 0 -0.44 270) (size 1.06 0.88) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.2))\n (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:TP_1.00 (layer F.Cu) (tedit 56A145A8) (tstamp 56A15A5C)\n (at 161.34 90.96)\n (path /562EEB8A/56A58165)\n (fp_text reference P5 (at 0.125 0.05) (layer F.SilkS) hide\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value CONN_01X01 (at 0 -0.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (pad 1 smd circle (at 0 0) (size 1 1) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9F1) (tstamp 56A3B2CE)\n (at 181.01 63.63)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56443DCD)\n (attr smd)\n (fp_text reference C1 (at 1.43 0) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 389 /1V8_OSC))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9EC) (tstamp 56A3B2D9)\n (at 182.45 65.47 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5694371A)\n (attr smd)\n (fp_text reference C2 (at -1.18 0.01) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9B4) (tstamp 56A3B2FA)\n (at 174.82 44.09)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5633ADEF)\n (attr smd)\n (fp_text reference C5 (at 0.816 -1.014 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 22 /filter_bank/RF_IN))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 2 /transmitter/RF_OUT_P))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FAD1) (tstamp 56A3B305)\n (at 176.09 45.29)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /5633AEC6)\n (attr smd)\n (fp_text reference C6 (at -0.03 -0.82) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 3 \"Net-(C6-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 4 /transmitter/RF_OUT_N))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FAE4) (tstamp 56A3B33C)\n (at 163.52 48.31)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A2BAE4)\n (attr smd)\n (fp_text reference C11 (at -0.04 -0.97) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 59 \"Net-(C11-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D9A7) (tstamp 56A3B352)\n (at 167.62 38.48 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/56303797)\n (attr smd)\n (fp_text reference C13 (at 0.04 1.29 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 56A8FAD5) (tstamp 56A3B35D)\n (at 173.06 38.56 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/563036EA)\n (attr smd)\n (fp_text reference C14 (at -0.12 -1.2 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 56A8FBFE) (tstamp 56A3B368)\n (at 173.135 53.355 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/562E8D78)\n (attr smd)\n (fp_text reference C15 (at 0.375 -1.165 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 25 \"Net-(C15-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FBEE) (tstamp 56A3B373)\n (at 179.78 51.01 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/563015C1)\n (attr smd)\n (fp_text reference C16 (at 0.62 -1.21 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 56A8FC15) (tstamp 56A3B37E)\n (at 173.06 51.33 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/562E8D71)\n (attr smd)\n (fp_text reference C17 (at -0.75 1.23 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 26 \"Net-(C17-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9F6) (tstamp 56A3B389)\n (at 177.995 56.205 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8D9D)\n (attr smd)\n (fp_text reference C18 (at 0.645 0.875 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 27 \"Net-(C18-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 184 /CLK_SOURCE))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 56A8FBF8) (tstamp 56A3B394)\n (at 175.985 54.655)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/562E8D6A)\n (attr smd)\n (fp_text reference C19 (at 2.305 -0.085) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 28 \"Net-(C19-Pad1)\"))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC0A) (tstamp 56A3B39F)\n (at 177.74 49.06 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/56300C7F)\n (attr smd)\n (fp_text reference C20 (at -1.84 0.37 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC04) (tstamp 56A3B3AA)\n (at 175.385 49.98 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/56300BCA)\n (attr smd)\n (fp_text reference C21 (at 0.03 -1.145 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FA9D) (tstamp 56A3B3B5)\n (at 178.75 47.65 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562EA341)\n (attr smd)\n (fp_text reference C22 (at 0.16 0.94 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FA73) (tstamp 56A3B3C0)\n (at 173.835 49.38 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562EA29E)\n (attr smd)\n (fp_text reference C23 (at 0.645 -1.62 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FBE8) (tstamp 56A3B3CB)\n (at 181.24 50.65 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562EA397)\n (attr smd)\n (fp_text reference C24 (at 1.86 -0.23 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FA74) (tstamp 56A3B3D6)\n (at 173.635 50.255 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562EA2EE)\n (attr smd)\n (fp_text reference C25 (at 0.475 -1.465 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9FB) (tstamp 56A3B3E1)\n (at 176.7 55.74 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8DA7)\n (attr smd)\n (fp_text reference C26 (at 0.98 -0.92) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9F4) (tstamp 56A3B3EC)\n (at 179.57 56.155 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562FFBC7)\n (attr smd)\n (fp_text reference C27 (at -0.015 -1.71 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 56A8FCD5) (tstamp 56A3B402)\n (at 160.9 80.92)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/564E3695)\n (attr smd)\n (fp_text reference C29 (at -1.05 -1.475) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B40D)\n (at 181.385 50.355 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8DF6)\n (attr smd)\n (fp_text reference C30 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 8 \"Net-(C30-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 9 \"Net-(C30-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B418)\n (at 180.835 49.13 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8DE8)\n (attr smd)\n (fp_text reference C31 (at 0 -1.7 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 12n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 9 \"Net-(C30-Pad2)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FAA3) (tstamp 56A3B423)\n (at 180.535 47.155)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8DD1)\n (attr smd)\n (fp_text reference C32 (at 0.335 -0.635) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 820p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 10 \"Net-(C32-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FAA6) (tstamp 56A3B42E)\n (at 178.81 46.92 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/562E8E2E)\n (attr smd)\n (fp_text reference C33 (at -1.13 -1.46) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FA8D) (tstamp 56A3B439)\n (at 175.91 47.72 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562E7B12/56312DF7)\n (attr smd)\n (fp_text reference C34 (at -1.47 0.3) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A46985) (tstamp 56A3B45A)\n (at 165.82 83.25 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632A6FA)\n (attr smd)\n (fp_text reference C37 (at 0.115 -1.03 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 131 /receiver/LON))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 29 \"Net-(C37-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D766) (tstamp 56A3B465)\n (at 165.04 83.26 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56339596)\n (attr smd)\n (fp_text reference C38 (at 0.045 -0.915 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 30 \"Net-(C38-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 130 /receiver/LOP))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBAF) (tstamp 56A3B470)\n (at 168.895 85.205)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56330A68)\n (attr smd)\n (fp_text reference C39 (at 2.125 0.075 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A4697D) (tstamp 56A3B47B)\n (at 168.845 85.305)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563309B9)\n (attr smd)\n (fp_text reference C40 (at -0.17 -0.635) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FBB6) (tstamp 56A3B486)\n (at 161.595 85.205)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56333934)\n (attr smd)\n (fp_text reference C41 (at -2.3 -0.145) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 95 /receiver/5VF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D73E) (tstamp 56A3B491)\n (at 170.51 88.91)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632F516)\n (attr smd)\n (fp_text reference C42 (at 1.23 1.36 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D75E) (tstamp 56A3B49C)\n (at 163.045 83.905 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563337FD)\n (attr smd)\n (fp_text reference C43 (at -0.355 1.005 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D742) (tstamp 56A3B4A7)\n (at 170.9 87.16 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632E626)\n (attr smd)\n (fp_text reference C44 (at -1.43 1.24 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 77 /receiver/IF-))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 11 \"Net-(C44-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FBB9) (tstamp 56A3B4B2)\n (at 161.345 87.205 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56334A99)\n (attr smd)\n (fp_text reference C45 (at 2.16 0.275 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 12 \"Net-(C45-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D740) (tstamp 56A3B4BD)\n (at 170.885 87.96 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632E6C3)\n (attr smd)\n (fp_text reference C46 (at -1.575 -0.7 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 78 /receiver/IF+))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 13 \"Net-(C46-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D753) (tstamp 56A3B4C8)\n (at 160.995 85.905 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56334B55)\n (attr smd)\n (fp_text reference C47 (at -0.035 0.605 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 12 \"Net-(C45-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D743) (tstamp 56A3B4D3)\n (at 170.535 86.185)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632F330)\n (attr smd)\n (fp_text reference C48 (at 0.525 -1.055) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D734) (tstamp 56A3B4DE)\n (at 162.745 89.705 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5633221E)\n (attr smd)\n (fp_text reference C49 (at -0.065 -1.085 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D750) (tstamp 56A3B4E9)\n (at 162.345 88.055 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56336961)\n (attr smd)\n (fp_text reference C50 (at -0.195 1.285) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 14 /receiver/DETO))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D73C) (tstamp 56A3B4F4)\n (at 167.845 89.505 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5632DD14)\n (attr smd)\n (fp_text reference C51 (at 0.875 -1.605) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D73A) (tstamp 56A3B4FF)\n (at 165.875 90.35 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/562EF56F)\n (attr smd)\n (fp_text reference C52 (at -0.25 -0.995 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 113 \"Net-(C52-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 31 \"Net-(C52-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 56A8FCEC) (tstamp 56A3B50A)\n (at 169.405 83.435)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/56A07D69)\n (attr smd)\n (fp_text reference C53 (at 0.09 -0.005 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D758) (tstamp 56A3B52B)\n (at 158.22 86.4 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/563036EA)\n (attr smd)\n (fp_text reference C56 (at 1.51 0.5 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1u (at 0 1.9 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DBBD) (tstamp 56A3B536)\n (at 170.355 75.94)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/562E8D78)\n (attr smd)\n (fp_text reference C57 (at 2.055 -0.19 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 32 \"Net-(C57-Pad1)\"))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBE1) (tstamp 56A3B541)\n (at 161.295 76.555 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/563015C1)\n (attr smd)\n (fp_text reference C58 (at 0.965 1.065 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 5870DBB5) (tstamp 56A3B54C)\n (at 170.005 77.93)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/562E8D71)\n (attr smd)\n (fp_text reference C59 (at 1.435 1.14) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 33 \"Net-(C59-Pad1)\"))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D78A) (tstamp 56A3B557)\n (at 165.245 72.51 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8D9D)\n (attr smd)\n (fp_text reference C60 (at 0.46 -1.475 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 34 \"Net-(C60-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 185 /CLK_LO))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 55A401E5) (tstamp 56A3B562)\n (at 168.495 73.78 90)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/562E8D6A)\n (attr smd)\n (fp_text reference C61 (at 0 1.425 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1u (at 0 -1.9 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 35 \"Net-(C61-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B56D)\n (at 161.545 78.055 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/56300C7F)\n (attr smd)\n (fp_text reference C62 (at 0 -1.7 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBB9) (tstamp 56A3B578)\n (at 168.795 80.13)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/56300BCA)\n (attr smd)\n (fp_text reference C63 (at -0.415 0.85) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FCC7) (tstamp 56A3B583)\n (at 161.645 76.555 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562EA341)\n (attr smd)\n (fp_text reference C64 (at 0.375 -1.7 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D79E) (tstamp 56A3B58E)\n (at 168.72 79.705)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562EA29E)\n (attr smd)\n (fp_text reference C65 (at 2.46 -0.405) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D763) (tstamp 56A3B599)\n (at 163.295 80.73 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562EA397)\n (attr smd)\n (fp_text reference C66 (at 0.155 0.77) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D79A) (tstamp 56A3B5A4)\n (at 169.37 79.055)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562EA2EE)\n (attr smd)\n (fp_text reference C67 (at 0.58 -1.115) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FDBE) (tstamp 56A3B5AF)\n (at 166.695 72.955)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8DA7)\n (attr smd)\n (fp_text reference C68 (at 0.2 -1.025) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D788) (tstamp 56A3B5BA)\n (at 163.495 73.655)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562FFBC7)\n (attr smd)\n (fp_text reference C69 (at -0.185 -0.935) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 56A8FCD7) (tstamp 56A3B5C5)\n (at 158.67 81.07 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/564E2DB1)\n (attr smd)\n (fp_text reference C70 (at 0.07 0.055 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 55A401FA) (tstamp 56A3B5D0)\n (at 118.29 94.165 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566CB1B3)\n (attr smd)\n (fp_text reference C71 (at 0 -1.675 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B5DB)\n (at 161.595 79.005)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8DF6)\n (attr smd)\n (fp_text reference C72 (at 0 -1.7) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 17 \"Net-(C72-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 18 \"Net-(C72-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FCD4) (tstamp 56A3B5E6)\n (at 161.47 79.73 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8DE8)\n (attr smd)\n (fp_text reference C73 (at 0.025 -1.15 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 12n (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 18 \"Net-(C72-Pad2)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBDE) (tstamp 56A3B5F1)\n (at 166.995 75.805 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8DD1)\n (attr smd)\n (fp_text reference C74 (at -1.415 -0.105) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 820p (at 0 -1.7 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 19 \"Net-(C74-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A8FCDF) (tstamp 56A3B5FC)\n (at 162.775 81.9)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/562E8E2E)\n (attr smd)\n (fp_text reference C75 (at -0.025 0) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D783) (tstamp 56A3B607)\n (at 168.075 82.1 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/563156F1/56312DF7)\n (attr smd)\n (fp_text reference C76 (at -1.915 0.08 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 56A8FB44) (tstamp 56A3B628)\n (at 114.72 89.865)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/569FAE1D)\n (attr smd)\n (fp_text reference C79 (at -2.56 -1.75 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -2.1) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 5870DB21) (tstamp 56A3B675)\n (at 115.37 102.84 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/569FB32C)\n (attr smd)\n (fp_text reference C86 (at -0.05 1.31 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -2.1 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A6706C) (tstamp 56A3B6B7)\n (at 170.854 48.55)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/564613A3)\n (attr smd)\n (fp_text reference C92 (at -0.354 -0.92) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 48 \"Net-(C92-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 36 \"Net-(C92-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A6709E) (tstamp 56A3B6C2)\n (at 169.33 42.708)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/56461484)\n (attr smd)\n (fp_text reference C93 (at -0.01 0.892) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 49 \"Net-(C93-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 37 \"Net-(C93-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A670D8) (tstamp 56A3B6CD)\n (at 170.092 46.772)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/564614D8)\n (attr smd)\n (fp_text reference C94 (at -0.782 -1.452) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 50 \"Net-(C94-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 38 \"Net-(C94-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A67097) (tstamp 56A3B6D8)\n (at 171.145 42.03 315)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/56461531)\n (attr smd)\n (fp_text reference C95 (at 0.03182 -1.120764 315) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 315) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 315) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 51 \"Net-(C95-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 315) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 39 \"Net-(C95-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A670E8) (tstamp 56A3B6E3)\n (at 164.27 42.85 45)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/56461589)\n (attr smd)\n (fp_text reference C96 (at -0.898026 -1.619275 45) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 40 \"Net-(C96-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 52 \"Net-(C96-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A670E3) (tstamp 56A3B6EE)\n (at 165.71 43.71 45)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/56461644)\n (attr smd)\n (fp_text reference C97 (at 0.13435 -0.827315 45) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7 45) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 41 \"Net-(C97-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 45) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 53 \"Net-(C97-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A670DC) (tstamp 56A3B6F9)\n (at 165.61 46.13)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/564615F0)\n (attr smd)\n (fp_text reference C98 (at 0.25 -0.94) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 42 \"Net-(C98-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 54 \"Net-(C98-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 56A670C4) (tstamp 56A3B704)\n (at 166.11 47.84 322.5)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56468750/564616DE)\n (attr smd)\n (fp_text reference C99 (at -0.084755 1.022994 322.5) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7 322.5) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.600001) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.600001) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.600001) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.600001) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 322.5) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 43 \"Net-(C99-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 322.5) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 55 \"Net-(C99-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D81C) (tstamp 56A3B70F)\n (at 115.295 102.79 180)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566C49F9)\n (attr smd)\n (fp_text reference C100 (at -0.025 1.41 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0 180) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FB67) (tstamp 56A3B71A)\n (at 114.62 99.745 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566CB23D)\n (attr smd)\n (fp_text reference C101 (at -0.09 1.83 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10n (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 57 \"Net-(C101-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D949) (tstamp 56A3B725)\n (at 120.51 51.675 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/564D0C4C)\n (attr smd)\n (fp_text reference C102 (at -0.035 -1.72 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 96 /power/12V_IN))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 56A8FB3F) (tstamp 56A3B730)\n (at 114.695 88.24)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/564D0C75)\n (attr smd)\n (fp_text reference C103 (at -2.715 1.645 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10u (at 0 -2.1) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 56 /power/12V))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB16) (tstamp 56A3B73B)\n (at 113.67 108.065)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566C864C)\n (attr smd)\n (fp_text reference C104 (at -0.22 1.895) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 60 \"Net-(C104-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FB65) (tstamp 56A3B746)\n (at 115.57 99.765 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566CB237)\n (attr smd)\n (fp_text reference C105 (at -0.13 1.7 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 62 \"Net-(C105-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB19) (tstamp 56A3B751)\n (at 113.67 107.215)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566C85EB)\n (attr smd)\n (fp_text reference C106 (at -0.13 1.995 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 68p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 63 \"Net-(C106-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D9F3) (tstamp 56A3B75C)\n (at 178.41 62.73 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /569FC87A)\n (attr smd)\n (fp_text reference C107 (at -2.01 -0.1) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DB26) (tstamp 56A3B767)\n (at 115.17 93.315 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566CB223)\n (attr smd)\n (fp_text reference C108 (at 0.06 0.965 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 64 \"Net-(C108-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 56A3B772)\n (at 116.52 107.065 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/566C7BB6)\n (attr smd)\n (fp_text reference C109 (at 0 1.7 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.7n (at 0 -1.7 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 65 \"Net-(C109-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 56A8FC96) (tstamp 56A3B77D)\n (at 117.91 88.965 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566CB1B9)\n (attr smd)\n (fp_text reference C110 (at -2.88 0.31 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 56A8FC94) (tstamp 56A3B793)\n (at 119.07 88.965 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566CB1BF)\n (attr smd)\n (fp_text reference C112 (at -2.19 -0.96 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D825) (tstamp 56A3B7BF)\n (at 120.15 96.95)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566CB254)\n (attr smd)\n (fp_text reference C116 (at 0.03 1.63) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D80D) (tstamp 56A3B7CA)\n (at 119.86 108.08 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566C9335)\n (attr smd)\n (fp_text reference C117 (at 2.92 -0.18 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 56A8FCA7) (tstamp 56A3B7D5)\n (at 121.63 85.1 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566CB25A)\n (attr smd)\n (fp_text reference C118 (at 2.75 -1.35 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D80E) (tstamp 56A3B7E0)\n (at 118.64 108.08 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/566C933B)\n (attr smd)\n (fp_text reference C119 (at 2.24 0.99 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC36) (tstamp 56A3B84E)\n (at 140.02 88.805)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5691E3FC)\n (attr smd)\n (fp_text reference C129 (at -0.605 -1.745) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 82 \"Net-(C129-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC38) (tstamp 56A3B859)\n (at 140.055 89.82 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5691ECEF)\n (attr smd)\n (fp_text reference C130 (at 0.69 2.06 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 83 \"Net-(C130-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 82 \"Net-(C129-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D892) (tstamp 56A3B864)\n (at 141.33 92.1 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56920011)\n (attr smd)\n (fp_text reference C131 (at 0.31 -2.2 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 116 /ADC_VCM))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D895) (tstamp 56A3B86F)\n (at 145.595 88.03 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56924C33)\n (attr smd)\n (fp_text reference C132 (at 0.06 -0.985 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100p (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 388 \"Net-(C132-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 84 \"Net-(C132-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC3F) (tstamp 56A3B87A)\n (at 144.27 87.48)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/5692100F)\n (attr smd)\n (fp_text reference C133 (at 2.025 0.47) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100p (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 85 \"Net-(C133-Pad1)\"))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 56A8FC47) (tstamp 56A3B885)\n (at 140.995 87.68)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /562EEB8A/56922719)\n (attr smd)\n (fp_text reference C134 (at 1.49 -0.07 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100n (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 415 3V3A_RX))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D979) (tstamp 56A3B89B)\n (at 124.24 46.44 270)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /564D0768/5695ABA9)\n (attr smd)\n (fp_text reference C136 (at 0.3 1.1 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 168 /3V6))\n (pad 2 smd rect (at 0.55 0 270) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D96A) (tstamp 56A3B8A6)\n (at 129.43 47.09 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/5695A684)\n (attr smd)\n (fp_text reference C137 (at -0.17 -1.59 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 340 /3V3D))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B8D2)\n (at 164.86 54.56 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A2E837)\n (attr smd)\n (fp_text reference C141 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B8DD)\n (at 163.74 54.8 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A2DEF2)\n (attr smd)\n (fp_text reference C142 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100n (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 99 \"Net-(C142-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870DA15) (tstamp 56A3B8E8)\n (at 167.25 55.16 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /56A2B5A1/56A2E066)\n (attr smd)\n (fp_text reference C143 (at 0.06 2.01 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10u (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 99 \"Net-(C142-Pad1)\"))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 55A40188) (tstamp 56A3B8FE)\n (at 163.71 56.81 90)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A31337)\n (attr smd)\n (fp_text reference C145 (at 0 -1.7 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 10p (at 0 1.7 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 100 \"Net-(C145-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 90) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer F.Cu) (tedit 5870D9D3) (tstamp 56A3B94B)\n (at 161.87 54.38 135)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A4C0F0)\n (attr smd)\n (fp_text reference C152 (at 0.056569 -0.042426 135) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1n (at 0 1.7 135) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end -1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.15 -0.6) (end 1.15 0.6) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.475) (end -0.25 -0.475) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.475) (end 0.25 0.475) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 105 \"Net-(C152-Pad1)\"))\n (pad 2 smd rect (at 0.55 0 135) (size 0.6 0.5) (layers F.Cu F.Paste F.Mask)\n (net 106 \"Net-(C152-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 56A8FD6F) (tstamp 56A3B98D)\n (at 181.22 46.53 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/563022EE)\n (attr smd)\n (fp_text reference FB1 (at -2.52 0.095 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value BLM18PG181SN1D (at 0 -1.9 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 5 \"Net-(C16-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer B.Cu) (tedit 56A8FD70) (tstamp 56A3B998)\n (at 175.11 45.69 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562E7B12/56302497)\n (attr smd)\n (fp_text reference FB2 (at -2.47 0.075 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value BLM18PG181SN1D (at 0 -1.9 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end -1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.45 0.75) (end 1.45 -0.75) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15))\n (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)\n (net 6 \"Net-(C21-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D7AB) (tstamp 56A3B9A3)\n (at 159.445 75.155)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/563022EE)\n (attr smd)\n (fp_text reference FB3 (at -1.735 0.055 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 15 \"Net-(C58-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D7AE) (tstamp 56A3B9AE)\n (at 159.445 73.705)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/563156F1/56302497)\n (attr smd)\n (fp_text reference FB4 (at -1.795 -0.105 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 16 \"Net-(C63-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FA7D) (tstamp 56A3BA5E)\n (at 174.22 45.77 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /5633AF94)\n (attr smd)\n (fp_text reference R6 (at 0.53 0.97 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 3 \"Net-(C6-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FA69) (tstamp 56A3BA95)\n (at 174 52.88 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/562E8DAE)\n (attr smd)\n (fp_text reference R11 (at 0.97 -0.68 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 5.1k (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 45 \"Net-(R11-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FC0E) (tstamp 56A3BAA0)\n (at 173.91 47.63)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/56352F1E)\n (attr smd)\n (fp_text reference R12 (at -0.77 -1.01) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 70 \"Net-(R12-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FC12) (tstamp 56A3BAAB)\n (at 173.8 48.52)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/56352FA2)\n (attr smd)\n (fp_text reference R13 (at -1.36 -0.82 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 0 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 71 \"Net-(R13-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FBF1) (tstamp 56A3BAC1)\n (at 179.86 52.48)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/562E8E05)\n (attr smd)\n (fp_text reference R15 (at 0.16 1.15) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 90.9 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 20 \"Net-(R15-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DB59) (tstamp 56A3BACC)\n (at 165.1 49.22)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/56A2BB04)\n (attr smd)\n (fp_text reference R16 (at 0.86 1.01) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 33 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 59 \"Net-(C11-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 171 /3V3A))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FA58) (tstamp 56A3BAD7)\n (at 181.385 51.93 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/562E8DFE)\n (attr smd)\n (fp_text reference R17 (at 1.82 0.015 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 30.1 (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 8 \"Net-(C30-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 20 \"Net-(R15-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FAAB) (tstamp 56A3BAE2)\n (at 180.76 48.13 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/562E8DD8)\n (attr smd)\n (fp_text reference R18 (at 1.33 0.08 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 240 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 9 \"Net-(C30-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 10 \"Net-(C32-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FABA) (tstamp 56A3BAED)\n (at 178.39 48.28 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/562E8E27)\n (attr smd)\n (fp_text reference R19 (at -1.2 -0.89 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 2 /transmitter/RF_OUT_P))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FA90) (tstamp 56A3BAF8)\n (at 176.94 48.27)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562E7B12/56312C62)\n (attr smd)\n (fp_text reference R20 (at -0.19 -1.35 270) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 93 /transmitter/3V3_RF))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 4 /transmitter/RF_OUT_N))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D746) (tstamp 56A3BB2F)\n (at 169.235 86.635 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5632E427)\n (attr smd)\n (fp_text reference R25 (at -0.085 -1.035 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 11 \"Net-(C44-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D749) (tstamp 56A3BB3A)\n (at 169.235 88.485 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5632E388)\n (attr smd)\n (fp_text reference R26 (at 0.255 -0.875 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 13 \"Net-(C46-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D755) (tstamp 56A3BB45)\n (at 161.145 86.755)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5633608D)\n (attr smd)\n (fp_text reference R27 (at -1.565 0.165 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 1k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 12 \"Net-(C45-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D796) (tstamp 56A3BB5B)\n (at 169.795 76.355)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/562E8DAE)\n (attr smd)\n (fp_text reference R29 (at 1.905 -0.525) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 5.1k (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 47 \"Net-(R29-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D780) (tstamp 56A3BB66)\n (at 168.545 81.28 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/56352F1E)\n (attr smd)\n (fp_text reference R30 (at -1.695 0.38 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 72 \"Net-(R30-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D79F) (tstamp 56A3BB71)\n (at 168.545 80.505 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/56352FA2)\n (attr smd)\n (fp_text reference R31 (at -2.385 0.475 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 0 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 73 \"Net-(R31-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D820) (tstamp 56A3BB7C)\n (at 117.32 98.065 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566CB1AD)\n (attr smd)\n (fp_text reference R32 (at 1.555 -0.24) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 68k (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 74 \"Net-(R32-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D7A8) (tstamp 56A3BB87)\n (at 160.445 77.105 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/562E8E05)\n (attr smd)\n (fp_text reference R33 (at 1.705 -0.455 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 90.9 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 21 \"Net-(R33-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D816) (tstamp 56A3BB92)\n (at 117.47 105.015 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566C48D4)\n (attr smd)\n (fp_text reference R34 (at 1.445 0.93 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 59k (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 75 \"Net-(R34-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FCD0) (tstamp 56A3BB9D)\n (at 160.045 78.555 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/562E8DFE)\n (attr smd)\n (fp_text reference R35 (at -0.125 -1.05 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 30.1 (at 0 1.8 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 17 \"Net-(C72-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 21 \"Net-(R33-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 5870DBDB) (tstamp 56A3BBA8)\n (at 165.245 75.08)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/562E8DD8)\n (attr smd)\n (fp_text reference R36 (at -0.015 -0.82) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 240 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 18 \"Net-(C72-Pad2)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 19 \"Net-(C74-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 56A8FCDC) (tstamp 56A3BBB3)\n (at 164.575 81.7)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/562E8E27)\n (attr smd)\n (fp_text reference R37 (at -0.025 -1.05) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 130 /receiver/LOP))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D76A) (tstamp 56A3BBBE)\n (at 166.275 81.7 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/563156F1/56312C62)\n (attr smd)\n (fp_text reference R38 (at -0.545 0.94) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 49.9 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 94 /receiver/lo_synth/3V3_RF))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 131 /receiver/LON))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB5F) (tstamp 56A3BC8F)\n (at 113.34 99.645 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566CB231)\n (attr smd)\n (fp_text reference R57 (at -0.17 0.96 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 6.8k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 62 \"Net-(C105-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 57 \"Net-(C101-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 55A401B2) (tstamp 56A3BC9A)\n (at 112.07 107.665 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566C851F)\n (attr smd)\n (fp_text reference R58 (at 0 1.4 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 8.2k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 63 \"Net-(C106-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 60 \"Net-(C104-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB54) (tstamp 56A3BCB0)\n (at 113.62 94.815 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566CB1CE)\n (attr smd)\n (fp_text reference R60 (at -0.17 1.04 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.99k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB52) (tstamp 56A3BCBB)\n (at 114.57 95.615 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566CB1D4)\n (attr smd)\n (fp_text reference R61 (at 0.74 1.16 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 1k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 58 \"Net-(C101-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB8C) (tstamp 56A3BCC6)\n (at 115.062 108.119 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566C5C68)\n (attr smd)\n (fp_text reference R62 (at -1.816 0.138 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 4.99k (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB79) (tstamp 56A3BCD1)\n (at 115.07 106.715 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566C5CBD)\n (attr smd)\n (fp_text reference R63 (at 0.77 -1.11 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 680 (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 61 \"Net-(C104-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB58) (tstamp 56A3BCDC)\n (at 115.72 94.79 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566CB21D)\n (attr smd)\n (fp_text reference R64 (at -0.085 -0.86 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 66 \"Net-(C110-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 64 \"Net-(C108-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FB85) (tstamp 56A3BCE7)\n (at 116.18 108.395)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/566DF3B9)\n (attr smd)\n (fp_text reference R65 (at 0.22 1.17) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 100 (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 67 \"Net-(C111-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 65 \"Net-(C109-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FC43) (tstamp 56A3BD60)\n (at 140.63 91.02 90)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5691F35C)\n (attr smd)\n (fp_text reference R76 (at 0.09 1.1 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 10k (at 0 -1.8 90) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 116 /ADC_VCM))\n (pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 83 \"Net-(C130-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FC4B) (tstamp 56A3BD6B)\n (at 141.97 89.655 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/56920C0F)\n (attr smd)\n (fp_text reference R77 (at 1.565 0.235 270) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 16k (at 0 -1.8 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 84 \"Net-(C132-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 83 \"Net-(C130-Pad1)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer B.Cu) (tedit 56A8FC3C) (tstamp 56A3BD76)\n (at 144.17 88.955)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /562EEB8A/5692435C)\n (attr smd)\n (fp_text reference R78 (at 1.595 1.195 90) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value 16k (at 0 -1.8) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 85 \"Net-(C133-Pad1)\"))\n (pad 2 smd rect (at 0.45 0) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)\n (net 84 \"Net-(C132-Pad2)\"))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D915) (tstamp 56A3BDCE)\n (at 112.59 71.68 270)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /564D0768/5851A753/58564FC4)\n (attr smd)\n (fp_text reference R86 (at 0.99 -0.1) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 1.8 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 387 /power/fpga_power/SYNC_1V0))\n (pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 76 /power/SYNC_3V3))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 55A401B2) (tstamp 56A3BDFA)\n (at 161.875 58.9 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/56A3207C)\n (attr smd)\n (fp_text reference R90 (at 0 -1.4 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 107 \"Net-(C151-Pad2)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 364 /tx_amp/DET_IN))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:R_0402b (layer F.Cu) (tedit 5870D9D1) (tstamp 56A3BE47)\n (at 159.32 54.105 180)\n (descr \"Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)\")\n (tags \"resistor 0402\")\n (path /56A2B5A1/56A6106A)\n (attr smd)\n (fp_text reference R97 (at -0.12 0.885 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value 100 (at 0 1.8 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.95 -0.65) (end -0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.95 -0.65) (end 0.95 0.65) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.25 -0.525) (end -0.25 -0.525) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.25 0.525) (end 0.25 0.525) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 108 \"Net-(R97-Pad1)\"))\n (pad 2 smd rect (at 0.45 0 180) (size 0.4 0.6) (layers F.Cu F.Paste F.Mask)\n (net 189 /PWDN))\n (model Resistors_SMD.3dshapes/R_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:MLPD-10 (layer F.Cu) (tedit 5884C504) (tstamp 5648EEA9)\n (at 171.524 44.646)\n (path /56468750/5645E3CC)\n (fp_text reference U13 (at 0.056 0.034 90) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value SKY13322-375LF (at 0.2 -2.1) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start -0.6 -1.7) (end -1.5 -1.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 1.5) (end -1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -1.5) (end 1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.5) (end 1 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 1.5) (end -1 1.5) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.875 -1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 37 \"Net-(C93-Pad2)\"))\n (pad 2 smd rect (at -0.875 -0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 195 /FILTER_V2))\n (pad 3 smd rect (at -0.875 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.875 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 194 /FILTER_V1))\n (pad 5 smd rect (at -0.875 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 38 \"Net-(C94-Pad2)\"))\n (pad 6 smd rect (at 0.875 1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 36 \"Net-(C92-Pad2)\"))\n (pad 7 smd rect (at 0.875 0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 197 /FILTER_V3))\n (pad 8 smd rect (at 0.875 0) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 22 /filter_bank/RF_IN))\n (pad 9 smd rect (at 0.875 -0.5) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 196 /FILTER_V4))\n (pad 10 smd rect (at 0.875 -1) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 39 \"Net-(C95-Pad2)\"))\n (pad EP smd rect (at 0 0) (size 0.76 2.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad EP thru_hole circle (at 0 0) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.9) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.9) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:MLPD-10 (layer F.Cu) (tedit 5884C4FC) (tstamp 5648EEC0)\n (at 163.34 45.12 180)\n (path /56468750/5645E3EC)\n (fp_text reference U18 (at -0.04 0.21 270) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value SKY13322-375LF (at 0.2 -2.1 180) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start -0.6 -1.7) (end -1.5 -1.7) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 1.5) (end -1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -1.5) (end 1 -1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -1.5) (end 1 1.5) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 1.5) (end -1 1.5) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.875 -1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 42 \"Net-(C98-Pad1)\"))\n (pad 2 smd rect (at -0.875 -0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 194 /FILTER_V1))\n (pad 3 smd rect (at -0.875 0 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask))\n (pad 4 smd rect (at -0.875 0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 195 /FILTER_V2))\n (pad 5 smd rect (at -0.875 1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 41 \"Net-(C97-Pad1)\"))\n (pad 6 smd rect (at 0.875 1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 40 \"Net-(C96-Pad1)\"))\n (pad 7 smd rect (at 0.875 0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 196 /FILTER_V4))\n (pad 8 smd rect (at 0.875 0 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 23 /filter_bank/RF_OUT))\n (pad 9 smd rect (at 0.875 -0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 197 /FILTER_V3))\n (pad 10 smd rect (at 0.875 -1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 43 \"Net-(C99-Pad1)\"))\n (pad EP smd rect (at 0 0 180) (size 0.76 2.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (solder_paste_margin_ratio -0.15))\n (pad EP thru_hole circle (at 0 0 180) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 -0.9 180) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n (pad EP thru_hole circle (at 0 0.9 180) (size 0.55 0.55) (drill 0.3) (layers *.Cu)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D791) (tstamp 56A6759B)\n (at 170.18 73.98 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /56A2B5A1/56A7C9D4)\n (attr smd)\n (fp_text reference C158 (at -0.28 1.98 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer F.Cu) (tedit 5870D898) (tstamp 56A6FC38)\n (at 140.145 88.69 90)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /562EEB8A/56A807F4)\n (attr smd)\n (fp_text reference C159 (at 0 -1.675 90) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value DNP (at 0 2.1 90) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))\n (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask)\n (net 415 3V3A_RX))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 55A40188) (tstamp 56A923FD)\n (at 167.56 54.39)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A97C26)\n (attr smd)\n (fp_text reference C161 (at 0 1.7) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.55 0) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0402b (layer B.Cu) (tedit 5870DBC4) (tstamp 56A92409)\n (at 167.63 71.14 180)\n (descr \"Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0402\")\n (path /56A2B5A1/56A9796A)\n (zone_connect 2)\n (attr smd)\n (fp_text reference C162 (at -0.19 0.91 180) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -1.7 180) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.15 0.6) (end 1.15 0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 -0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.15 0.6) (end -1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.15 0.6) (end 1.15 -0.6) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.25 0.475) (end -0.25 0.475) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.25 -0.475) (end 0.25 -0.475) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 341 /5V) (zone_connect 2))\n (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.5) (layers B.Cu B.Paste B.Mask)\n (net 1 GND) (zone_connect 2))\n (model Capacitors_SMD.3dshapes/C_0402.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 55A401E5) (tstamp 56A92AAD)\n (at 163.11 58.17 180)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /56A2B5A1/56A30AC0)\n (attr smd)\n (fp_text reference L12 (at 0 -1.425 180) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value AISC-0603HP-R10J (at 0 1.9 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 100 \"Net-(C145-Pad1)\"))\n (pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 107 \"Net-(C151-Pad2)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870DA11) (tstamp 56A93592)\n (at 165.71 55.61 270)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /56A2B5A1/56A99BBC)\n (attr smd)\n (fp_text reference FB6 (at 0.12 -0.09) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 99 \"Net-(C142-Pad1)\"))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module TO_SOT_Packages_SMD:SOT-353 (layer F.Cu) (tedit 5870D9E9) (tstamp 56AA7652)\n (at 180.666 65.43 180)\n (descr SOT353)\n (path /56942D88)\n (attr smd)\n (fp_text reference U23 (at -0.864 -1.83) (layer F.SilkS)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_text value MIC5366-1.8YC5 (at 0.09906 0 270) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start 0.635 1.016) (end 0.635 -1.016) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.635 -1.016) (end -0.635 -1.016) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.635 -1.016) (end -0.635 1.016) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.635 1.016) (end 0.635 1.016) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -1.016 -0.635 180) (size 0.508 0.3048) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 3 smd rect (at -1.016 0.635 180) (size 0.508 0.3048) (layers F.Cu F.Paste F.Mask)\n (net 171 /3V3A))\n (pad 5 smd rect (at 1.016 -0.635 180) (size 0.508 0.3048) (layers F.Cu F.Paste F.Mask)\n (net 389 /1V8_OSC))\n (pad 2 smd rect (at -1.016 0 180) (size 0.508 0.3048) (layers F.Cu F.Paste F.Mask)\n (net 1 GND))\n (pad 4 smd rect (at 1.016 0.635 180) (size 0.508 0.3048) (layers F.Cu F.Paste F.Mask))\n (model TO_SOT_Packages_SMD.3dshapes/SOT-353.wrl\n (at (xyz 0 0 0))\n (scale (xyz 0.07000000000000001 0.09 0.08))\n (rotate (xyz 0 0 90))\n )\n )\n\n (module VNA:C_0603b (layer F.Cu) (tedit 5870D75B) (tstamp 56AC7158)\n (at 160.295 83.57)\n (descr \"Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0603\")\n (path /562EEB8A/56AC87CD)\n (attr smd)\n (fp_text reference FB7 (at 0.215 -1.04) (layer F.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)))\n )\n (fp_text value BLM18PG181SN1D (at 0 1.9) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))\n (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 341 /5V))\n (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)\n (net 95 /receiver/5VF))\n (model Capacitors_SMD.3dshapes/C_0603.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:5515LP15A730 (layer F.Cu) (tedit 56AC6C5D) (tstamp 5648DA48)\n (at 168.59 48.54)\n (path /56468750/5645FC17)\n (fp_text reference U14 (at 0.225 1.625) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value 5515LP15A730 (at 0.325 -1.65) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_circle (center 0.5 0) (end 0.55 -0.1) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 0.65) (end -1 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 -0.6) (end 1 0.65) (layer F.SilkS) (width 0.15))\n (fp_line (start 1 0.65) (end -1 0.65) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0.65 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at 0 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 3 smd rect (at -0.65 -0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at -0.65 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 6 smd rect (at 0 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (zone_connect 2))\n (pad 7 smd rect (at 0.65 0.7) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -1.12 0 90) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 55 \"Net-(C99-Pad2)\") (zone_connect 2))\n (pad 8 smd rect (at 1.12 0 90) (size 0.35 0.6) (layers F.Cu F.Paste F.Mask)\n (net 48 \"Net-(C92-Pad1)\") (zone_connect 2))\n )\n\n (module VNA:LP0603A0902 (layer F.Cu) (tedit 5870D9AC) (tstamp 5648DA50)\n (at 167.298 41.438 180)\n (path /56468750/5645F6D8)\n (fp_text reference U15 (at 2.258 1.048 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value LP0603A0902ANTR (at -0.6 -1.375 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.775 0.425) (end -0.775 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.775 -0.425) (end 0.825 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 -0.425) (end 0.825 0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 0.425) (end -0.775 0.425) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.6 0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 51 \"Net-(C95-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at 0.65 0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 52 \"Net-(C96-Pad2)\") (zone_connect 2))\n (pad 3 smd rect (at 0.65 -0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -0.6 -0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:LP0603A0902 (layer F.Cu) (tedit 56AC6C42) (tstamp 569B91C9)\n (at 167.552 46.264 180)\n (path /56468750/569D84E4)\n (fp_text reference U17 (at -0.048 1.284 180) (layer F.SilkS)\n (effects (font (size 0.7 0.7) (thickness 0.15)))\n )\n (fp_text value LP0603A1880ANTR (at -0.6 -1.375 180) (layer F.Fab)\n (effects (font (size 1 1) (thickness 0.15)))\n )\n (fp_line (start -0.775 0.425) (end -0.775 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start -0.775 -0.425) (end 0.825 -0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 -0.425) (end 0.825 0.425) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.825 0.425) (end -0.775 0.425) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at -0.6 0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 50 \"Net-(C94-Pad1)\") (zone_connect 2))\n (pad 2 smd rect (at 0.65 0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 54 \"Net-(C98-Pad2)\") (zone_connect 2))\n (pad 3 smd rect (at 0.65 -0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at -0.6 -0.35 180) (size 0.5 0.4) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:3550LP14A300 (layer F.Cu) (tedit 5870D9B0) (tstamp 5648DA5A)\n (at 167.806 43.724 180)\n (path /56468750/5645FB19)\n (fp_text reference U16 (at 0.346 0.544 180) (layer F.SilkS)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_text value 3550LP14A300 (at 0.1 -1.1 180) (layer F.Fab)\n (effects (font (size 0.6 0.6) (thickness 0.15)))\n )\n (fp_line (start 0.4 1.6) (end 0.4 1.1) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 1.3) (end 0 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0 -0.3) (end 0.8 -0.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.8 -0.3) (end 0.8 1.3) (layer F.SilkS) (width 0.15))\n (fp_line (start 0.8 1.3) (end 0 1.3) (layer F.SilkS) (width 0.15))\n (pad 1 smd rect (at 0 0 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 2 smd rect (at 0 0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 49 \"Net-(C93-Pad1)\") (zone_connect 2))\n (pad 3 smd rect (at 0 1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 4 smd rect (at 0.8 1 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n (pad 5 smd rect (at 0.8 0.5 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 53 \"Net-(C97-Pad2)\") (zone_connect 2))\n (pad 6 smd rect (at 0.8 0 180) (size 0.55 0.25) (layers F.Cu F.Paste F.Mask)\n (net 1 GND) (zone_connect 2))\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 5870DB42) (tstamp 56ADC16C)\n (at 120.57 51.685 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/56AE0E9C)\n (attr smd)\n (fp_text reference C163 (at 0.075 -2.12) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -2.1 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 96 /power/12V_IN))\n (pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)\n (net 1 GND))\n (model Capacitors_SMD.3dshapes/C_0805.wrl\n (at (xyz 0 0 0))\n (scale (xyz 1 1 1))\n (rotate (xyz 0 0 0))\n )\n )\n\n (module VNA:C_0805b (layer B.Cu) (tedit 5870DB3F) (tstamp 56ADC961)\n (at 119.32 51.675 270)\n (descr \"Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)\")\n (tags \"capacitor 0805\")\n (path /564D0768/56AE175C)\n (attr smd)\n (fp_text reference C164 (at -0.985 -3.35) (layer B.SilkS)\n (effects (font (size 0.5 0.5) (thickness 0.125)) (justify mirror))\n )\n (fp_text value DNP (at 0 -2.1 270) (layer B.Fab)\n (effects (font (size 1 1) (thickness 0.15)) (justify mirror))\n )\n (fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))\n (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))\n (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))\n (pad 1 smd rect (at -1 0 270) (size 1 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19.36.10\nversion=1\nlast_client=kicad\n[pcbnew]\nversion=1\nLastNetListRead=\nUseCmpFile=1\nPadDrill=0.600000000000\nPadDrillOvalY=0.600000000000\nPadSizeH=1.500000000000\nPadSizeV=1.500000000000\nPcbTextSizeV=1.500000000000\nPcbTextSizeH=1.500000000000\nPcbTextThickness=0.300000000000\nModuleTextSizeV=1.000000000000\nModuleTextSizeH=1.000000000000\nModuleTextSizeThickness=0.150000000000\nSolderMaskClearance=0.000000000000\nSolderMaskMinWidth=0.000000000000\nDrawSegmentWidth=0.200000000000\nBoardOutlineThickness=0.100000000000\nModuleOutlineThickness=0.150000000000\n[cvpcb]\nversion=1\nNetIExt=net\n[general]\nversion=1\n[eeschema]\nversion=1\nLibDir=\n[eeschema/libraries]\nLibName1=power\nLibName2=device\nLibName3=transistors\nLibName4=conn\nLibName5=linear\nLibName6=regul\nLibName7=74xx\nLibName8=cmos4000\nLibName9=adc-dac\nLibName10=memory\nLibName11=xilinx\nLibName12=microcontrollers\nLibName13=dsp\nLibName14=microchip\nLibName15=analog_switches\nLibName16=motorola\nLibName17=texas\nLibName18=intel\nLibName19=audio\nLibName20=interface\nLibName21=digital-audio\nLibName22=philips\nLibName23=display\nLibName24=cypress\nLibName25=siliconi\nLibName26=opto\nLibName27=atmel\nLibName28=contrib\nLibName29=valves\nLibName30=lib/vna\n[schematic_editor]\nversion=1\nPageLayoutDescrFile=\nPlotDirectoryName=vna2.pdf\nSubpartIdSeparator=0\nSubpartFirstId=65\nNetFmtName=\nSpiceAjustPassiveValues=0\nLabSize=60\nERC_TestSimilarLabels=1\n" }, { "path": "hw/vna2.sch", "content": "EESchema Schematic File Version 2\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:vna\nLIBS:vna2-cache\nEELAYER 26 0\nEELAYER END\n$Descr A4 11693 8268\nencoding utf-8\nSheet 1 15\nTitle \"VNA\"\nDate \"2016-07-27\"\nRev \"1\"\nComp \"Henrik Forstén\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n$Sheet\nS 1550 800 1600 1300\nU 562E7B12\nF0 \"transmitter\" 60\nF1 \"transmitter.sch\" 60\nF2 \"3V3\" I L 1550 950 60 \nF3 \"CLK\" I L 1550 1250 60 \nF4 \"DATA\" I L 1550 1350 60 \nF5 \"CE\" I L 1550 1450 60 \nF6 \"LE\" I L 1550 1550 60 \nF7 \"RFOUT_EN\" I L 1550 1650 60 \nF8 \"MUXOUT\" O L 1550 1750 60 \nF9 \"LD\" O R 3150 2000 60 \nF10 \"REF_IN\" I L 1550 1950 60 \nF11 \"3V6\" I L 1550 1050 60 \nF12 \"RF_OUT_P\" O R 3150 1250 60 \nF13 \"RF_OUT_N\" O R 3150 1350 60 \n$EndSheet\n$Sheet\nS 9000 2550 1100 1900\nU 562EEB8A\nF0 \"receiver\" 60\nF1 \"receiver.sch\" 60\nF2 \"5V\" I L 9000 2800 60 \nF3 \"ENBL\" I L 9000 4100 60 \nF4 \"LD\" O R 10100 2700 60 \nF5 \"MUXOUT\" O R 10100 2800 60 \nF6 \"3V6\" I R 10100 2600 60 \nF7 \"REF_IN\" I R 10100 3400 60 \nF8 \"CLK\" I R 10100 2900 60 \nF9 \"DATA\" I R 10100 3000 60 \nF10 \"CE\" I R 10100 3100 60 \nF11 \"LE\" I R 10100 3200 60 \nF12 \"RFOUT_EN\" I R 10100 3300 60 \nF13 \"ADC+\" O R 10100 3650 60 \nF14 \"ADC-\" O R 10100 3750 60 \nF15 \"DITHER_3V3\" I L 9000 4200 60 \nF16 \"VCOM\" I L 9000 4300 60 \nF17 \"RF1\" I L 9000 2950 60 \nF18 \"RF3\" I L 9000 3150 60 \nF19 \"RF2\" I L 9000 3050 60 \nF20 \"RF4\" I L 9000 3250 60 \nF21 \"SWA_CTRL1\" I L 9000 3400 60 \nF22 \"SWA_CTRL2\" I L 9000 3500 60 \nF23 \"SWB_CTRL1\" I L 9000 3600 60 \nF24 \"SWB_CTRL2\" I L 9000 3700 60 \nF25 \"SWC_CTRL1\" I L 9000 3800 60 \nF26 \"SWC_CTRL2\" I L 9000 3900 60 \nF27 \"3V3A\" I L 9000 2700 60 \nF28 \"3V3D\" I L 9000 2600 60 \n$EndSheet\nText Label 8900 2600 2 60 ~ 0\n3V3D\nText Label 8900 2800 2 60 ~ 0\n5V\nText Label 8900 4100 2 60 ~ 0\nMIXER_ENABLE\n$Comp\nL C C5\nU 1 1 5633ADEF\nP 3450 1250\nF 0 \"C5\" H 3475 1350 50 0000 L CNN\nF 1 \"1n\" H 3475 1150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3488 1100 30 0001 C CNN\nF 3 \"\" H 3450 1250 60 0000 C CNN\n\t1 3450 1250\n\t0 1 1 0 \n$EndComp\n$Comp\nL C C6\nU 1 1 5633AEC6\nP 3450 1500\nF 0 \"C6\" H 3475 1600 50 0000 L CNN\nF 1 \"1n\" H 3475 1400 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3488 1350 30 0001 C CNN\nF 3 \"\" H 3450 1500 60 0000 C CNN\n\t1 3450 1500\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R6\nU 1 1 5633AF94\nP 3650 1650\nF 0 \"R6\" V 3730 1650 50 0000 C CNN\nF 1 \"49.9\" V 3650 1650 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 3580 1650 30 0001 C CNN\nF 3 \"\" H 3650 1650 30 0000 C CNN\n\t1 3650 1650\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR01\nU 1 1 5633B077\nP 3650 1850\nF 0 \"#PWR01\" H 3650 1600 50 0001 C CNN\nF 1 \"GND\" H 3650 1700 50 0000 C CNN\nF 2 \"\" H 3650 1850 60 0000 C CNN\nF 3 \"\" H 3650 1850 60 0000 C CNN\n\t1 3650 1850\n\t1 0 0 -1 \n$EndComp\nText Label 1500 950 2 60 ~ 0\n3V3D\nText Label 1500 1250 2 60 ~ 0\nSPI_CLK\nText Label 1500 1350 2 60 ~ 0\nSOURCE_SPI_DATA\nText Label 1500 1550 2 60 ~ 0\nSOURCE_LE\nText Label 1500 1450 2 60 ~ 0\nSOURCE_CE\nText Label 1500 1650 2 60 ~ 0\nSOURCE_RF_ENABLE\nText Label 1500 1750 2 60 ~ 0\nSOURCE_MUXOUT\nText Label 10150 2700 0 60 ~ 0\nLO_LD\nText Label 10150 2800 0 60 ~ 0\nLO_MUXOUT\nText Label 10150 2900 0 60 ~ 0\nSPI_CLK\nText Label 10150 3000 0 60 ~ 0\nLO_SPI_DATA\nText Label 10150 3100 0 60 ~ 0\nLO_CE\nText Label 10150 3200 0 60 ~ 0\nLO_LE\nText Label 10150 3300 0 60 ~ 0\nLO_RF_ENABLE\n$Comp\nL GND #PWR02\nU 1 1 56443979\nP 800 7000\nF 0 \"#PWR02\" H 800 6750 50 0001 C CNN\nF 1 \"GND\" H 800 6850 50 0000 C CNN\nF 2 \"\" H 800 7000 60 0000 C CNN\nF 3 \"\" H 800 7000 60 0000 C CNN\n\t1 800 7000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C1\nU 1 1 56443DCD\nP 800 6750\nF 0 \"C1\" H 825 6850 50 0000 L CNN\nF 1 \"1u\" H 825 6650 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 838 6600 30 0001 C CNN\nF 3 \"\" H 800 6750 60 0000 C CNN\n\t1 800 6750\n\t1 0 0 -1 \n$EndComp\nText Label 800 6600 0 60 ~ 0\n1V8_OSC\nText Label 1500 1950 2 60 ~ 0\nCLK_SOURCE\nText Label 10150 3400 0 60 ~ 0\nCLK_LO\nText Notes 800 5150 0 60 ~ 0\n2 mA\n$Sheet\nS 4450 1100 1550 1200\nU 56468750\nF0 \"filter_bank\" 60\nF1 \"filter_bank.sch\" 60\nF2 \"RF_IN\" I L 4450 1250 60 \nF3 \"RF_OUT\" O R 6000 1250 60 \nF4 \"V1\" I L 4450 1700 60 \nF5 \"V2\" I L 4450 1800 60 \nF6 \"V3\" I L 4450 1900 60 \nF7 \"V4\" I L 4450 2000 60 \n$EndSheet\nText Label 3300 2250 0 60 ~ 0\nSOURCE_LD\nText Label 4400 1700 2 60 ~ 0\nFILTER_V1\nText Label 4400 1800 2 60 ~ 0\nFILTER_V2\nText Label 4400 1900 2 60 ~ 0\nFILTER_V3\nText Label 4400 2000 2 60 ~ 0\nFILTER_V4\n$Comp\nL C C10\nU 1 1 56479534\nP 6250 1250\nF 0 \"C10\" H 6275 1350 50 0000 L CNN\nF 1 \"1n\" H 6275 1150 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 6288 1100 30 0001 C CNN\nF 3 \"\" H 6250 1250 60 0000 C CNN\n\t1 6250 1250\n\t0 1 1 0 \n$EndComp\n$Comp\nL SMA P1\nU 1 1 56493CE9\nP 1350 2750\nF 0 \"P1\" H 1500 2750 60 0000 C CNN\nF 1 \"SMA\" H 1350 2900 60 0000 C CNN\nF 2 \"VNA:CONSMA003.062\" H 1350 2750 60 0001 C CNN\nF 3 \"\" H 1350 2750 60 0000 C CNN\n\t1 1350 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR03\nU 1 1 56493CF0\nP 1350 2900\nF 0 \"#PWR03\" H 1350 2650 50 0001 C CNN\nF 1 \"GND\" H 1350 2750 50 0000 C CNN\nF 2 \"\" H 1350 2900 60 0000 C CNN\nF 3 \"\" H 1350 2900 60 0000 C CNN\n\t1 1350 2900\n\t1 0 0 -1 \n$EndComp\nText Label 8900 2950 2 60 ~ 0\nRX1\nText Label 8900 3050 2 60 ~ 0\nA\nText Label 8900 3150 2 60 ~ 0\nRX2\nText Label 8900 3250 2 60 ~ 0\nB\n$Comp\nL SMA P2\nU 1 1 56498D37\nP 2350 2750\nF 0 \"P2\" H 2500 2750 60 0000 C CNN\nF 1 \"SMA\" H 2350 2900 60 0000 C CNN\nF 2 \"VNA:CONSMA003.062\" H 2350 2750 60 0001 C CNN\nF 3 \"\" H 2350 2750 60 0000 C CNN\n\t1 2350 2750\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR04\nU 1 1 56498D3D\nP 2350 2900\nF 0 \"#PWR04\" H 2350 2650 50 0001 C CNN\nF 1 \"GND\" H 2350 2750 50 0000 C CNN\nF 2 \"\" H 2350 2900 60 0000 C CNN\nF 3 \"\" H 2350 2900 60 0000 C CNN\n\t1 2350 2900\n\t1 0 0 -1 \n$EndComp\n$Sheet\nS 8800 5000 1050 850 \nU 564D0768\nF0 \"power\" 60\nF1 \"power.sch\" 60\nF2 \"5V\" O R 9850 5650 60 \nF3 \"3V6\" O R 9850 5550 60 \nF4 \"1V0\" O R 9850 5150 60 \nF5 \"1V8\" O R 9850 5250 60 \nF6 \"3V3D\" O R 9850 5450 60 \nF7 \"3V3A\" O R 9850 5350 60 \nF8 \"3V3A_RX\" O R 9850 5750 60 \n$EndSheet\nText Notes 4900 1800 0 60 ~ 0\nInsertion loss:\\n0-4 GHz: 3 dB\\n4-6 GHz: 4 dB\nText Notes 3250 1050 0 60 ~ 0\n-7 - +2 dBm\nText Notes 6050 900 0 60 ~ 0\n-11 - -1 dBm\nText Notes 8650 1150 0 60 ~ 0\n-32 - +13 dBm\nText Notes 1100 800 0 60 ~ 0\n180 mA\nText Notes 8250 2800 0 60 ~ 0\n220 mA\nText Notes 10400 2550 0 60 ~ 0\n180 mA\nText Label 9900 5350 0 60 ~ 0\n3V3A\nText Label 9900 5550 0 60 ~ 0\n3V6\nText Label 9900 5650 0 60 ~ 0\n5V\nText Label 1500 1050 2 60 ~ 0\n3V6\nText Label 10150 3650 0 60 ~ 0\nADC+\nText Label 10150 3750 0 60 ~ 0\nADC-\nText Label 8900 4200 2 60 ~ 0\nDITHER\n$Comp\nL MIC5366 U23\nU 1 1 56942D88\nP 1800 5350\nF 0 \"U23\" H 1950 5150 60 0000 C CNN\nF 1 \"MIC5366-1.8YC5\" H 1800 5550 60 0000 C CNN\nF 2 \"TO_SOT_Packages_SMD:SOT-353\" H 1750 5200 60 0001 C CNN\nF 3 \"\" H 1750 5200 60 0000 C CNN\n\t1 1800 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR05\nU 1 1 56942FDF\nP 1300 5500\nF 0 \"#PWR05\" H 1300 5250 50 0001 C CNN\nF 1 \"GND\" H 1300 5350 50 0000 C CNN\nF 2 \"\" H 1300 5500 60 0000 C CNN\nF 3 \"\" H 1300 5500 60 0000 C CNN\n\t1 1300 5500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C2\nU 1 1 5694371A\nP 1050 5350\nF 0 \"C2\" H 1075 5450 50 0000 L CNN\nF 1 \"100n\" H 1075 5250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 1088 5200 30 0001 C CNN\nF 3 \"\" H 1050 5350 60 0000 C CNN\n\t1 1050 5350\n\t1 0 0 -1 \n$EndComp\nText Label 1200 5200 0 60 ~ 0\n3V3A\nText Label 2200 5250 0 60 ~ 0\n1V8_OSC\nText Label 10150 2600 0 60 ~ 0\n3V6\n$Comp\nL C C107\nU 1 1 569FC87A\nP 800 5350\nF 0 \"C107\" H 825 5450 50 0000 L CNN\nF 1 \"DNP\" H 825 5250 50 0000 L CNN\nF 2 \"VNA:C_0805b\" H 838 5200 30 0001 C CNN\nF 3 \"\" H 800 5350 60 0000 C CNN\n\t1 800 5350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR06\nU 1 1 569FCAA8\nP 800 5500\nF 0 \"#PWR06\" H 800 5250 50 0001 C CNN\nF 1 \"GND\" H 800 5350 50 0000 C CNN\nF 2 \"\" H 800 5500 60 0000 C CNN\nF 3 \"\" H 800 5500 60 0000 C CNN\n\t1 800 5500\n\t1 0 0 -1 \n$EndComp\n$Sheet\nS 6750 1050 1400 1200\nU 56A2B5A1\nF0 \"tx_amp\" 60\nF1 \"tx_amp.sch\" 60\nF2 \"5V\" I L 6750 1700 60 \nF3 \"SPI_CLK\" I R 8150 1800 60 \nF4 \"SPI_DATA\" I R 8150 1900 60 \nF5 \"3V3\" I L 6750 1800 60 \nF6 \"RF_IN\" I L 6750 1250 60 \nF7 \"RF_OUT\" O R 8150 1250 60 \nF8 \"PWDN\" I L 6750 2100 60 \nF9 \"DETN\" O R 8150 2100 60 \nF10 \"ATTEN_LE\" I R 8150 1700 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\"\" H 2350 4350 60 0000 C CNN\n\t1 2350 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR08\nU 1 1 5834D9A4\nP 2350 4500\nF 0 \"#PWR08\" H 2350 4250 50 0001 C CNN\nF 1 \"GND\" H 2350 4350 50 0000 C CNN\nF 2 \"\" H 2350 4500 60 0000 C CNN\nF 3 \"\" H 2350 4500 60 0000 C CNN\n\t1 2350 4500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL SMA P7\nU 1 1 5834D9AA\nP 2350 3550\nF 0 \"P7\" H 2500 3550 60 0000 C CNN\nF 1 \"SMA\" H 2350 3700 60 0000 C CNN\nF 2 \"VNA:CONSMA003.062\" H 2350 3550 60 0001 C CNN\nF 3 \"\" H 2350 3550 60 0000 C CNN\n\t1 2350 3550\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR09\nU 1 1 5834D9B0\nP 2350 3700\nF 0 \"#PWR09\" H 2350 3450 50 0001 C CNN\nF 1 \"GND\" H 2350 3550 50 0000 C CNN\nF 2 \"\" H 2350 3700 60 0000 C CNN\nF 3 \"\" H 2350 3700 60 0000 C CNN\n\t1 2350 3700\n\t1 0 0 -1 \n$EndComp\n$Comp\nL SMA P6\nU 1 1 5834D9B6\nP 1350 4350\nF 0 \"P6\" H 1500 4350 60 0000 C CNN\nF 1 \"SMA\" H 1350 4500 60 0000 C CNN\nF 2 \"VNA:CONSMA003.062\" H 1350 4350 60 0001 C CNN\nF 3 \"\" H 1350 4350 60 0000 C CNN\n\t1 1350 4350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR010\nU 1 1 5834D9BC\nP 1350 4500\nF 0 \"#PWR010\" H 1350 4250 50 0001 C CNN\nF 1 \"GND\" H 1350 4350 50 0000 C CNN\nF 2 \"\" H 1350 4500 60 0000 C CNN\nF 3 \"\" H 1350 4500 60 0000 C CNN\n\t1 1350 4500\n\t1 0 0 -1 \n$EndComp\nText Label 1050 2750 2 60 ~ 0\nPORT1\nText Label 2000 2750 2 60 ~ 0\nPORT2\nText Label 1000 3550 2 60 ~ 0\nA\nText Label 1000 4350 2 60 ~ 0\nRX1\nText Label 2000 3550 2 60 ~ 0\nB\nText Label 2000 4350 2 60 ~ 0\nRX2\n$Sheet\nS 9500 1150 1000 750 \nU 583625EC\nF0 \"port switch\" 60\nF1 \"port_switch.sch\" 60\nF2 \"RFC\" I L 9500 1250 60 \nF3 \"RF1\" O R 10500 1250 60 \nF4 \"RF2\" O R 10500 1400 60 \nF5 \"3V3\" I L 9500 1550 60 \nF6 \"CTRL1\" I L 9500 1700 60 \nF7 \"CTRL2\" I L 9500 1800 60 \n$EndSheet\nText Label 9350 1550 2 60 ~ 0\n3V3A\nText Label 10700 1250 0 60 ~ 0\nPORT1\nText Label 10700 1400 0 60 ~ 0\nPORT2\n$Comp\nL KT2520K U1\nU 1 1 58473C64\nP 1350 6900\nF 0 \"U1\" H 1550 6650 60 0000 C CNN\nF 1 \"KT2520K-40MHz\" H 1400 7050 60 0000 C CNN\nF 2 \"VNA:KT2520K\" H 1350 6900 60 0001 C CNN\nF 3 \"\" H 1350 6900 60 0000 C CNN\n\t1 1350 6900\n\t1 0 0 -1 \n$EndComp\nText Label 4850 4750 2 60 ~ 0\nSOURCE_LD\nText Label 4850 4200 2 60 ~ 0\nLO_LD\nText Label 4850 4100 2 60 ~ 0\nLO_RF_ENABLE\nText Label 4850 4650 2 60 ~ 0\nSOURCE_RF_ENABLE\nText Label 4850 3850 2 60 ~ 0\nCLK_FPGA\nText Label 4850 4400 2 60 ~ 0\nLO_CE\nText Label 4850 4300 2 60 ~ 0\nLO_LE\nText Label 4850 4500 2 60 ~ 0\nLO_SPI_DATA\nText Label 4850 3950 2 60 ~ 0\nSPI_CLK\nText Label 4850 4850 2 60 ~ 0\nSOURCE_LE\nConnection ~ 1350 5250\nWire Wire Line\n\t800 5200 1350 5200\nWire Wire Line\n\t1300 5500 1050 5500\nWire Wire Line\n\t1350 5200 1350 5350\nWire Wire Line\n\t1300 5450 1300 5500\nWire Wire Line\n\t1350 5450 1300 5450\nWire Wire Line\n\t8900 4200 9000 4200\nWire Wire Line\n\t10150 3750 10100 3750\nWire Wire Line\n\t10100 3650 10150 3650\nWire Wire Line\n\t1550 1050 1500 1050\nWire Wire Line\n\t9850 5650 9900 5650\nWire Wire Line\n\t9850 5550 9900 5550\nWire Wire Line\n\t9850 5350 9900 5350\nWire Wire Line\n\t9000 3250 8900 3250\nWire Wire Line\n\t9000 3150 8900 3150\nWire Wire Line\n\t9000 3050 8900 3050\nWire Wire Line\n\t8900 2950 9000 2950\nWire Wire Line\n\t6400 1250 6750 1250\nWire Wire Line\n\t6000 1250 6100 1250\nWire Wire Line\n\t4450 2000 4400 2000\nWire Wire Line\n\t4450 1900 4400 1900\nWire Wire Line\n\t4450 1800 4400 1800\nWire Wire Line\n\t4400 1700 4450 1700\nWire Wire Line\n\t3250 2000 3250 2250\nWire Wire Line\n\t3150 2000 3250 2000\nWire Wire Line\n\t3250 2250 3300 2250\nConnection ~ 800 6950\nWire Wire Line\n\t800 6900 800 7000\nWire Wire Line\n\t800 6950 950 6950\nWire Wire Line\n\t950 6600 800 6600\nWire Wire Line\n\t950 6850 950 6600\nWire Wire Line\n\t10100 3400 10150 3400\nWire Wire Line\n\t10100 3300 10150 3300\nWire Wire Line\n\t10100 3200 10150 3200\nWire Wire Line\n\t10100 3100 10150 3100\nWire Wire Line\n\t10150 3000 10100 3000\nWire Wire Line\n\t10100 2900 10150 2900\nWire Wire Line\n\t10150 2800 10100 2800\nWire Wire Line\n\t10100 2700 10150 2700\nWire Wire Line\n\t1500 950 1550 950 \nWire Wire Line\n\t1550 1950 1500 1950\nWire Wire Line\n\t1550 1750 1500 1750\nWire Wire Line\n\t1550 1550 1500 1550\nWire Wire Line\n\t1550 1650 1500 1650\nWire Wire Line\n\t1550 1450 1500 1450\nWire Wire Line\n\t1550 1350 1500 1350\nWire Wire Line\n\t1550 1250 1500 1250\nWire Wire Line\n\t3200 1500 3300 1500\nWire Wire Line\n\t3600 1250 4450 1250\nWire Wire Line\n\t3150 1250 3300 1250\nWire Wire Line\n\t3200 1350 3150 1350\nWire Wire Line\n\t3200 1350 3200 1500\nWire Wire Line\n\t3650 1500 3600 1500\nWire Wire Line\n\t3650 1800 3650 1850\nWire Wire Line\n\t8900 4100 9000 4100\nWire Wire Line\n\t9000 2800 8900 2800\nWire Wire Line\n\t9000 2600 8900 2600\nWire Wire Line\n\t10150 2600 10100 2600\nConnection ~ 1050 5200\nWire Wire Line\n\t6750 1700 6700 1700\nWire Wire Line\n\t6750 1800 6700 1800\nWire Wire Line\n\t6750 2100 6700 2100\nWire Wire Line\n\t8150 1700 8200 1700\nWire Wire Line\n\t8150 1800 8200 1800\nWire Wire Line\n\t8150 1900 8200 1900\nWire Wire Line\n\t1150 2750 1050 2750\nWire Wire Line\n\t2000 2750 2150 2750\nWire Wire Line\n\t1150 3550 1000 3550\nWire Wire Line\n\t1150 4350 1000 4350\nWire Wire Line\n\t2150 3550 2000 3550\nWire Wire Line\n\t2000 4350 2150 4350\nWire Wire Line\n\t9500 1250 8150 1250\nWire Wire Line\n\t9500 1550 9350 1550\nWire Wire Line\n\t9350 1700 9500 1700\nWire Wire Line\n\t9500 1800 9350 1800\nWire Wire Line\n\t10500 1250 10700 1250\nWire Wire Line\n\t10500 1400 10700 1400\nWire Wire Line\n\t8150 2100 8250 2100\nWire Wire Line\n\t950 7050 900 7050\nWire Wire Line\n\t900 7050 900 6950\nConnection ~ 900 6950\nWire Wire Line\n\t4950 4750 4850 4750\nWire Wire Line\n\t4950 4200 4850 4200\nWire Wire Line\n\t4850 4100 4950 4100\nWire Wire Line\n\t4850 4650 4950 4650\nWire Wire Line\n\t4950 3850 4850 3850\nWire Wire Line\n\t4850 4400 4950 4400\nWire Wire Line\n\t4850 4300 4950 4300\nWire Wire Line\n\t4850 4500 4950 4500\nWire Wire Line\n\t4950 3950 4850 3950\nWire Wire Line\n\t4950 4850 4850 4850\nText Label 4850 4950 2 60 ~ 0\nSOURCE_CE\nWire Wire Line\n\t4850 4950 4950 4950\nText Label 4850 5050 2 60 ~ 0\nSOURCE_SPI_DATA\nWire Wire Line\n\t4950 5050 4850 5050\nText Label 4850 3700 2 60 ~ 0\nADC_VCM\nWire Wire Line\n\t4850 3700 4950 3700\nText Label 8900 4300 2 60 ~ 0\nADC_VCM\nWire Wire Line\n\t8900 4300 9000 4300\nText Label 7100 4650 0 60 ~ 0\nDITHER\nWire Wire Line\n\t7000 4650 7100 4650\nText Label 7100 4800 0 60 ~ 0\nMIXER_ENABLE\nWire Wire Line\n\t7100 4800 7000 4800\nText Label 7100 4900 0 60 ~ 0\nPWDN\nWire Wire Line\n\t7100 4900 7000 4900\nText Label 7150 2900 0 60 ~ 0\nFILTER_V1\nText Label 7150 3000 0 60 ~ 0\nFILTER_V2\nText Label 7150 3100 0 60 ~ 0\nFILTER_V3\nText Label 7150 3200 0 60 ~ 0\nFILTER_V4\nWire Wire Line\n\t7150 2900 7000 2900\nWire Wire Line\n\t7000 3000 7150 3000\nWire Wire Line\n\t7150 3100 7000 3100\nWire Wire Line\n\t7000 3200 7150 3200\nText Label 7100 4150 0 60 ~ 0\nRX_SW5\nText Label 4850 5450 2 60 ~ 0\nATTEN_LE\nWire Wire Line\n\t4850 5450 4950 5450\nText Label 4850 5550 2 60 ~ 0\nATTEN_SPI_DATA\nWire Wire Line\n\t4850 5550 4950 5550\nText Label 4850 3400 2 60 ~ 0\nADC+\nWire Wire Line\n\t4850 3400 4950 3400\nText Label 4850 3500 2 60 ~ 0\nADC-\nWire Wire Line\n\t4850 3500 4950 3500\nWire Wire Line\n\t4950 3600 4850 3600\nText Label 4850 3600 2 60 ~ 0\nCLK_ADC\nWire Wire Line\n\t7100 4150 7000 4150\nText Label 7100 4050 0 60 ~ 0\nRX_SW4\nText Label 7100 3950 0 60 ~ 0\nRX_SW3\nText Label 7100 3850 0 60 ~ 0\nRX_SW2\nText Label 7100 3750 0 60 ~ 0\nRX_SW1\nText Label 7100 3650 0 60 ~ 0\nRX_SW0\nWire Wire Line\n\t7100 4050 7000 4050\nWire Wire Line\n\t7000 3950 7100 3950\nWire Wire Line\n\t7100 3850 7000 3850\nWire Wire Line\n\t7000 3750 7100 3750\nWire Wire Line\n\t7100 3650 7000 3650\nText Label 7100 3400 0 60 ~ 0\nPORT_SW0\nWire Wire Line\n\t7100 3400 7000 3400\nText Label 7100 3500 0 60 ~ 0\nPORT_SW1\nWire Wire Line\n\t7100 3500 7000 3500\nText Label 9350 1700 2 60 ~ 0\nPORT_SW0\nText Label 9350 1800 2 60 ~ 0\nPORT_SW1\n$Comp\nL NB3N551 U2\nU 1 1 584DFE43\nP 3950 7000\nF 0 \"U2\" H 4150 6650 60 0000 C CNN\nF 1 \"NB3N551\" H 4250 7400 60 0000 C CNN\nF 2 \"VNA:DFN-8\" H 3950 7000 60 0001 C CNN\nF 3 \"\" H 3950 7000 60 0001 C CNN\n\t1 3950 7000\n\t1 0 0 -1 \n$EndComp\n$Comp\nL C C3\nU 1 1 584E1072\nP 2000 6950\nF 0 \"C3\" H 2025 7050 50 0000 L CNN\nF 1 \"10n\" H 2025 6850 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2038 6800 30 0001 C CNN\nF 3 \"\" H 2000 6950 60 0000 C CNN\n\t1 2000 6950\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t1850 6950 1800 6950\nWire Wire Line\n\t3300 7050 3450 7050\n$Comp\nL C C4\nU 1 1 584E2F81\nP 3450 6200\nF 0 \"C4\" H 3475 6300 50 0000 L CNN\nF 1 \"100n\" H 3475 6100 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 3488 6050 30 0001 C CNN\nF 3 \"\" H 3450 6200 60 0000 C CNN\n\t1 3450 6200\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR011\nU 1 1 584E3352\nP 3450 6450\nF 0 \"#PWR011\" H 3450 6200 50 0001 C CNN\nF 1 \"GND\" H 3450 6300 50 0000 C CNN\nF 2 \"\" H 3450 6450 60 0000 C CNN\nF 3 \"\" H 3450 6450 60 0000 C CNN\n\t1 3450 6450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3450 6350 3450 6450\nWire Wire Line\n\t3950 6050 3950 6450\nWire Wire Line\n\t3300 6050 3950 6050\n$Comp\nL FILTER FB5\nU 1 1 584E5027\nP 2950 6050\nF 0 \"FB5\" H 2950 6200 50 0000 C CNN\nF 1 \"BLM18PG181SN1D\" H 2950 5950 50 0000 C CNN\nF 2 \"VNA:C_0603b\" H 2950 6050 60 0001 C CNN\nF 3 \"\" H 2950 6050 60 0000 C CNN\n\t1 2950 6050\n\t1 0 0 -1 \n$EndComp\nConnection ~ 3450 6050\nWire Wire Line\n\t2600 6050 2500 6050\nText Label 2500 6050 2 60 ~ 0\n3V3D\n$Comp\nL GND #PWR012\nU 1 1 584E72A6\nP 3900 7500\nF 0 \"#PWR012\" H 3900 7250 50 0001 C CNN\nF 1 \"GND\" H 3900 7350 50 0000 C CNN\nF 2 \"\" H 3900 7500 60 0000 C CNN\nF 3 \"\" H 3900 7500 60 0000 C CNN\n\t1 3900 7500\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR013\nU 1 1 584E753D\nP 4000 7500\nF 0 \"#PWR013\" H 4000 7250 50 0001 C CNN\nF 1 \"GND\" H 4000 7350 50 0000 C CNN\nF 2 \"\" H 4000 7500 60 0000 C CNN\nF 3 \"\" H 4000 7500 60 0000 C CNN\n\t1 4000 7500\n\t1 0 0 -1 \n$EndComp\nText Label 4950 6950 0 60 ~ 0\nCLK_FPGA\nText Label 4950 7050 0 60 ~ 0\nCLK_ADC\nText Label 4950 6850 0 60 ~ 0\nCLK_SOURCE\nText Label 4950 7150 0 60 ~ 0\nCLK_LO\nWire Wire Line\n\t4550 7150 4450 7150\nWire Wire Line\n\t4450 7050 4550 7050\nWire Wire Line\n\t4550 6950 4450 6950\nWire Wire Line\n\t4450 6850 4550 6850\nText Label 8250 2100 0 60 ~ 0\nPDET\nWire Wire Line\n\t7000 4450 7100 4450\nText Label 7100 4450 0 60 ~ 0\nPDET\n$Sheet\nS 4950 2750 2050 3150\nU 5837E082\nF0 \"fpga\" 60\nF1 \"fpga.sch\" 60\nF2 \"1V0\" I L 4950 2850 60 \nF3 \"3V3D\" I L 4950 3050 60 \nF4 \"ADC+\" I L 4950 3400 60 \nF5 \"ADC-\" I L 4950 3500 60 \nF6 \"ADC_CLK\" I L 4950 3600 60 \nF7 \"ADC_VCM\" O L 4950 3700 60 \nF8 \"CLK_REF\" I L 4950 3850 60 \nF9 \"TX_FILTER1\" O R 7000 3000 60 \nF10 \"TX_FILTER3\" O R 7000 3200 60 \nF11 \"TX_FILTER2\" O R 7000 3100 60 \nF12 \"TX_FILTER0\" O R 7000 2900 60 \nF13 \"PORT_SW1\" O R 7000 3500 60 \nF14 \"PORT_SW0\" O R 7000 3400 60 \nF15 \"DITHER\" O R 7000 4650 60 \nF16 \"MIXER_ENABLE\" O R 7000 4800 60 \nF17 \"AMP_PWDWN\" O R 7000 4900 60 \nF18 \"LO_SPI_DATA\" O L 4950 4500 60 \nF19 \"SOURCE_SPI_DATA\" O L 4950 5050 60 \nF20 \"LO_LE\" O L 4950 4300 60 \nF21 \"LO_CE\" O L 4950 4400 60 \nF22 \"SOURCE_LE\" O L 4950 4850 60 \nF23 \"SOURCE_CE\" O L 4950 4950 60 \nF24 \"ATTEN_LE\" O L 4950 5450 60 \nF25 \"ATTEN_SPI_DATA\" O L 4950 5550 60 \nF26 \"LO_LD\" I L 4950 4200 60 \nF27 \"SOURCE_LD\" I L 4950 4750 60 \nF28 \"LO_RF_ENABLE\" O L 4950 4100 60 \nF29 \"SOURCE_RF_ENABLE\" O L 4950 4650 60 \nF30 \"SPI_CLK\" O L 4950 3950 60 \nF31 \"RX_SW5\" O R 7000 4150 60 \nF32 \"RX_SW4\" O R 7000 4050 60 \nF33 \"RX_SW3\" O R 7000 3950 60 \nF34 \"RX_SW2\" O R 7000 3850 60 \nF35 \"RX_SW1\" O R 7000 3750 60 \nF36 \"RX_SW0\" O R 7000 3650 60 \nF37 \"XADC_VP\" I R 7000 4450 60 \nF38 \"1V8\" I L 4950 2950 60 \nF39 \"SOURCE_MUXOUT\" I L 4950 5150 60 \nF40 \"LO_MUXOUT\" I L 4950 5250 60 \nF41 \"3V6\" I L 4950 3150 60 \nF42 \"5V\" I L 4950 3250 60 \n$EndSheet\nWire Wire Line\n\t4950 5150 4850 5150\nWire Wire Line\n\t4950 5250 4850 5250\nText Label 4850 5150 2 60 ~ 0\nSOURCE_MUXOUT\nText Label 4850 5250 2 60 ~ 0\nLO_MUXOUT\nText Label 8900 3400 2 60 ~ 0\nRX_SW0\nWire Wire Line\n\t8900 3400 9000 3400\nText Label 8900 3500 2 60 ~ 0\nRX_SW1\nText Label 8900 3600 2 60 ~ 0\nRX_SW2\nText Label 8900 3700 2 60 ~ 0\nRX_SW3\nText Label 8900 3800 2 60 ~ 0\nRX_SW4\nText Label 8900 3900 2 60 ~ 0\nRX_SW5\nWire Wire Line\n\t8900 3900 9000 3900\nWire Wire Line\n\t9000 3800 8900 3800\nWire Wire Line\n\t8900 3700 9000 3700\nWire Wire Line\n\t9000 3600 8900 3600\nWire Wire Line\n\t8900 3500 9000 3500\nText Label 4850 3050 2 60 ~ 0\n3V3D\nWire Wire Line\n\t4850 3050 4950 3050\nWire Wire Line\n\t9850 5250 9900 5250\nWire Wire Line\n\t9850 5150 9900 5150\nText Label 9900 5150 0 60 ~ 0\n1V0\nText Label 9900 5250 0 60 ~ 0\n1V8\nText Label 4850 2850 2 60 ~ 0\n1V0\nText Label 4850 2950 2 60 ~ 0\n1V8\nWire Wire Line\n\t4850 2850 4950 2850\nWire Wire Line\n\t4950 2950 4850 2950\nWire Wire Line\n\t4950 3150 4850 3150\nText Label 4850 3150 2 60 ~ 0\n3V6\nText Notes 3850 3250 0 60 ~ 0\n1V0: 100 mA\\n1V8: 50 mA\\n3V3D: 10 mA\\n3V6: 100 mA\\n5V: 30 mA\nWire Wire Line\n\t9850 5450 9900 5450\nText Label 9900 5450 0 60 ~ 0\n3V3D\nText Notes 8850 5650 0 60 ~ 0\n1V0: 0.1 A\\n1V8: 0.05 A\\n3V3D: 0.05 A\\n3V3A: 0.005 A\\n3V6: 0.5 A\\n5V: 0.35 A\nWire Wire Line\n\t9000 2700 8900 2700\nText Label 8900 2700 2 60 ~ 0\n3V3A_RX\n$Comp\nL CONN_01X01 P17\nU 1 1 5865379D\nP 6400 6600\nF 0 \"P17\" H 6400 6700 50 0000 C CNN\nF 1 \"MNT\" V 6500 6600 50 0000 C CNN\nF 2 \"VNA:MountingHole_3.2mm_M3_Pad_Via_mod\" H 6400 6600 60 0001 C CNN\nF 3 \"\" H 6400 6600 60 0000 C CNN\n\t1 6400 6600\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P18\nU 1 1 58654422\nP 6400 7000\nF 0 \"P18\" H 6400 7100 50 0000 C CNN\nF 1 \"MNT\" V 6500 7000 50 0000 C CNN\nF 2 \"VNA:MountingHole_3.2mm_M3_Pad_Via_mod\" H 6400 7000 60 0001 C CNN\nF 3 \"\" H 6400 7000 60 0000 C CNN\n\t1 6400 7000\n\t-1 0 0 1 \n$EndComp\n$Comp\nL CONN_01X01 P19\nU 1 1 586546F9\nP 6400 7400\nF 0 \"P19\" H 6400 7500 50 0000 C CNN\nF 1 \"MNT\" V 6500 7400 50 0000 C CNN\nF 2 \"VNA:MountingHole_3.2mm_M3_Pad_Via_mod\" H 6400 7400 60 0001 C CNN\nF 3 \"\" H 6400 7400 60 0000 C CNN\n\t1 6400 7400\n\t-1 0 0 1 \n$EndComp\nText Notes 6500 6400 0 60 ~ 0\nMounting holes\nWire Wire Line\n\t4950 3250 4850 3250\nText Label 4850 3250 2 60 ~ 0\n5V\n$Comp\nL GND #PWR014\nU 1 1 586960EB\nP 6750 6600\nF 0 \"#PWR014\" H 6750 6350 50 0001 C CNN\nF 1 \"GND\" H 6750 6450 50 0000 C CNN\nF 2 \"\" H 6750 6600 60 0000 C CNN\nF 3 \"\" H 6750 6600 60 0000 C CNN\n\t1 6750 6600\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6600 6600 6750 6600\n$Comp\nL GND #PWR015\nU 1 1 58696704\nP 6750 7050\nF 0 \"#PWR015\" H 6750 6800 50 0001 C CNN\nF 1 \"GND\" H 6750 6900 50 0000 C CNN\nF 2 \"\" H 6750 7050 60 0000 C CNN\nF 3 \"\" H 6750 7050 60 0000 C CNN\n\t1 6750 7050\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR016\nU 1 1 586969D3\nP 6750 7450\nF 0 \"#PWR016\" H 6750 7200 50 0001 C CNN\nF 1 \"GND\" H 6750 7300 50 0000 C CNN\nF 2 \"\" H 6750 7450 60 0000 C CNN\nF 3 \"\" H 6750 7450 60 0000 C CNN\n\t1 6750 7450\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t6750 7050 6750 7000\nWire Wire Line\n\t6750 7000 6600 7000\nWire Wire Line\n\t6750 7450 6750 7400\nWire Wire Line\n\t6750 7400 6600 7400\n$Comp\nL R R119\nU 1 1 5869CD21\nP 4700 6950\nF 0 \"R119\" V 4780 6950 50 0000 C CNN\nF 1 \"33\" V 4700 6950 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4630 6950 30 0001 C CNN\nF 3 \"\" H 4700 6950 30 0000 C CNN\n\t1 4700 6950\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R120\nU 1 1 5869D18B\nP 4700 7050\nF 0 \"R120\" V 4780 7050 50 0000 C CNN\nF 1 \"33\" V 4700 7050 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4630 7050 30 0001 C CNN\nF 3 \"\" H 4700 7050 30 0000 C CNN\n\t1 4700 7050\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t4950 6950 4850 6950\nWire Wire Line\n\t4950 7050 4850 7050\nWire Wire Line\n\t9850 5750 9900 5750\nText Label 9900 5750 0 60 ~ 0\n3V3A_RX\nText Notes 2300 5900 0 60 ~ 0\n40 mA\n$Comp\nL R R131\nU 1 1 58723677\nP 4700 6850\nF 0 \"R131\" V 4780 6850 50 0000 C CNN\nF 1 \"33\" V 4700 6850 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4630 6850 30 0001 C CNN\nF 3 \"\" H 4700 6850 30 0000 C CNN\n\t1 4700 6850\n\t0 1 1 0 \n$EndComp\n$Comp\nL R R132\nU 1 1 5872395E\nP 4700 7150\nF 0 \"R132\" V 4780 7150 50 0000 C CNN\nF 1 \"33\" V 4700 7150 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 4630 7150 30 0001 C CNN\nF 3 \"\" H 4700 7150 30 0000 C CNN\n\t1 4700 7150\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t4950 6850 4850 6850\nWire Wire Line\n\t4950 7150 4850 7150\n$Comp\nL R R133\nU 1 1 5872A695\nP 2600 6550\nF 0 \"R133\" V 2680 6550 50 0000 C CNN\nF 1 \"1M\" V 2600 6550 50 0000 C CNN\nF 2 \"VNA:R_0402b\" V 2530 6550 30 0001 C CNN\nF 3 \"\" H 2600 6550 30 0000 C CNN\n\t1 2600 6550\n\t0 1 1 0 \n$EndComp\nWire Wire Line\n\t2200 6950 2150 6950\nWire Wire Line\n\t2750 6550 3100 6550\n$Comp\nL 74AHC1G04 U42\nU 1 1 5872BB65\nP 2650 6950\nF 0 \"U42\" H 2845 7065 60 0000 C CNN\nF 1 \"NC7S04P5X\" H 3100 6750 60 0000 C CNN\nF 2 \"TO_SOT_Packages_SMD:SOT-353\" H 2650 6950 60 0001 C CNN\nF 3 \"\" H 2650 6950 60 0000 C CNN\n\t1 2650 6950\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t3100 6550 3100 6950\nWire Wire Line\n\t3100 6950 3450 6950\nWire Wire Line\n\t2450 6550 2200 6550\nWire Wire Line\n\t2200 6550 2200 6950\n$Comp\nL GND #PWR017\nU 1 1 5872D110\nP 2600 7150\nF 0 \"#PWR017\" H 2600 6900 50 0001 C CNN\nF 1 \"GND\" H 2600 7000 50 0000 C CNN\nF 2 \"\" H 2600 7150 60 0000 C CNN\nF 3 \"\" H 2600 7150 60 0000 C CNN\n\t1 2600 7150\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2600 6750 2600 6700\nWire Wire Line\n\t2350 6700 3300 6700\nConnection ~ 3300 6700\n$Comp\nL C C261\nU 1 1 5872E280\nP 2350 7350\nF 0 \"C261\" H 2375 7450 50 0000 L CNN\nF 1 \"100n\" H 2375 7250 50 0000 L CNN\nF 2 \"VNA:C_0402b\" H 2388 7200 30 0001 C CNN\nF 3 \"\" H 2350 7350 60 0000 C CNN\n\t1 2350 7350\n\t1 0 0 -1 \n$EndComp\n$Comp\nL GND #PWR018\nU 1 1 5872E746\nP 2350 7500\nF 0 \"#PWR018\" H 2350 7250 50 0001 C CNN\nF 1 \"GND\" H 2350 7350 50 0000 C CNN\nF 2 \"\" H 2350 7500 60 0000 C CNN\nF 3 \"\" H 2350 7500 60 0000 C CNN\n\t1 2350 7500\n\t1 0 0 -1 \n$EndComp\nWire Wire Line\n\t2350 6700 2350 7200\nConnection ~ 2600 6700\nWire Wire Line\n\t3300 6050 3300 7050\n$EndSCHEMATC\n" }, { "path": "openocd/interface.cfg", "content": "interface ftdi\nftdi_device_desc \"VNA\"\nftdi_vid_pid 0x0403 0x6010\nftdi_layout_init 0x0c08 0x0f1b\nreset_config none\nadapter_khz 3000\n\n#telnet_port 4444\n#gdb_port 3333\ntransport select jtag\n" }, { "path": "openocd/program_flash.cfg", "content": "# xilinx series 7 (artix, kintex, virtex)\n# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf\n\nif { [info exists CHIPNAME] } {\n\tset _CHIPNAME $CHIPNAME\n} else {\n\tset _CHIPNAME xc7\n}\n\n# the 4 top bits (28:31) are the die stepping/revisions. ignore it.\njtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \\\n\t-expected-id 0x0362E093 \\\n\t-expected-id 0x0362D093 \\\n\t-expected-id 0x0362D093 \\\n\t-expected-id 0x0362C093 \\\n\t-expected-id 0x03632093 \\\n\t-expected-id 0x03631093 \\\n\t-expected-id 0x03636093 \\\n\t-expected-id 0x03647093 \\\n\t-expected-id 0x0364C093 \\\n\t-expected-id 0x03651093 \\\n\t-expected-id 0x03747093 \\\n\t-expected-id 0x03656093 \\\n\t-expected-id 0x03752093 \\\n\t-expected-id 0x03751093 \\\n\t-expected-id 0x03671093 \\\n\t-expected-id 0x036B3093 \\\n\t-expected-id 0x036B7093 \\\n\t-expected-id 0x036BB093 \\\n\t-expected-id 0x036BF093 \\\n\t-expected-id 0x03667093 \\\n\t-expected-id 0x03682093 \\\n\t-expected-id 0x03687093 \\\n\t-expected-id 0x03692093 \\\n\t-expected-id 0x03691093 \\\n\t-expected-id 0x03696093 \\\n\t-expected-id 0x036D5093 \\\n\t-expected-id 0x036D9093 \\\n\t-expected-id 0x036DB093\n\npld device virtex2 $_CHIPNAME.tap 1\n\nset XC7_JSHUTDOWN 0x0d\nset XC7_JPROGRAM 0x0b\nset XC7_JSTART 0x0c\nset XC7_BYPASS 0x3f\n\nproc xc7_program {tap} {\n\tglobal XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS\n\tirscan $tap $XC7_JSHUTDOWN\n\tirscan $tap $XC7_JPROGRAM\n\truntest 60000\n\t#JSTART prevents this from working...\n\t#irscan $tap $XC7_JSTART\n\truntest 2000\n\tirscan $tap $XC7_BYPASS\n\truntest 2000\n}\n\nsource [find cpld/jtagspi.cfg]\n\ninit\njtagspi_init 0 xc7_bscan_spi.bit\njtagspi_program vna_top.bin 0\nxc7_program xc7.tap\npld load 0 vna_top.bit\nexit\n" }, { "path": "openocd/program_fpga.cfg", "content": "source [find cpld/xilinx-xc7.cfg]\n\ninit\nxc7_program xc7.tap\npld load 0 vna_top.bit\nexit\n" }, { "path": "software/cal_kit/load.s1p", "content": "!Agilent Technologies,N5230A,MY45001695,A.07.50.67\r\n!Agilent N5230A: A.07.50.67\r\n!Date: Thursday, August 18, 2016 06:57:26\r\n!Correction: S11(Full 1 Port(1)) \r\n!S1P File: Measurement: S11:\r\n# Hz S dB R 50\r\n300000 -6.633018e+001 -1.791857e+002 \r\n12799625 -6.594731e+001 1.766612e+002 \r\n25299250 -6.567571e+001 1.687139e+002 \r\n37798875 -6.557128e+001 1.644680e+002 \r\n50298500 -6.537732e+001 1.622783e+002 \r\n62798125 -6.462557e+001 1.559599e+002 \r\n75297750 -6.450978e+001 1.517959e+002 \r\n87797375 -6.450533e+001 1.458601e+002 \r\n100297000 -6.399725e+001 1.406654e+002 \r\n112796625 -6.384388e+001 1.358868e+002 \r\n125296250 -6.327454e+001 1.323676e+002 \r\n137795875 -6.315020e+001 1.295885e+002 \r\n150295500 -6.268062e+001 1.256866e+002 \r\n162795125 -6.256941e+001 1.225154e+002 \r\n175294750 -6.221292e+001 1.195631e+002 \r\n187794375 -6.171311e+001 1.151084e+002 \r\n200294000 -6.153009e+001 1.083402e+002 \r\n212793625 -6.111781e+001 1.082865e+002 \r\n225293250 -6.097395e+001 1.070629e+002 \r\n237792875 -6.098566e+001 1.008409e+002 \r\n250292500 -6.049813e+001 1.001968e+002 \r\n262792125 -5.999853e+001 9.746030e+001 \r\n275291750 -5.977811e+001 9.525069e+001 \r\n287791375 -5.957871e+001 9.235114e+001 \r\n300291000 -5.932900e+001 9.157284e+001 \r\n312790625 -5.891380e+001 8.851630e+001 \r\n325290250 -5.890256e+001 8.743685e+001 \r\n337789875 -5.875449e+001 8.492855e+001 \r\n350289500 -5.862592e+001 8.270796e+001 \r\n362789125 -5.826372e+001 8.152140e+001 \r\n375288750 -5.802206e+001 7.985790e+001 \r\n387788375 -5.784013e+001 7.823132e+001 \r\n400288000 -5.765613e+001 7.799512e+001 \r\n412787625 -5.732348e+001 7.521177e+001 \r\n425287250 -5.735350e+001 7.317807e+001 \r\n437786875 -5.701599e+001 7.196304e+001 \r\n450286500 -5.703485e+001 7.092044e+001 \r\n462786125 -5.718791e+001 7.057696e+001 \r\n475285750 -5.628455e+001 6.796998e+001 \r\n487785375 -5.627592e+001 6.689137e+001 \r\n500285000 -5.611026e+001 6.401632e+001 \r\n512784625 -5.590533e+001 6.322684e+001 \r\n525284250 -5.578068e+001 6.269001e+001 \r\n537783875 -5.562401e+001 6.156867e+001 \r\n550283500 -5.538243e+001 6.020650e+001 \r\n562783125 -5.532725e+001 5.917015e+001 \r\n575282750 -5.521544e+001 5.844260e+001 \r\n587782375 -5.507839e+001 5.618396e+001 \r\n600282000 -5.478727e+001 5.574136e+001 \r\n612781625 -5.464181e+001 5.445385e+001 \r\n625281250 -5.455082e+001 5.322602e+001 \r\n637780875 -5.444962e+001 5.204493e+001 \r\n650280500 -5.431356e+001 5.061882e+001 \r\n662780125 -5.418238e+001 4.977333e+001 \r\n675279750 -5.402066e+001 4.789527e+001 \r\n687779375 -5.397715e+001 4.645826e+001 \r\n700279000 -5.379239e+001 4.636227e+001 \r\n712778625 -5.352642e+001 4.499760e+001 \r\n725278250 -5.351864e+001 4.378580e+001 \r\n737777875 -5.325169e+001 4.300284e+001 \r\n750277500 -5.318799e+001 4.228464e+001 \r\n762777125 -5.303756e+001 4.158965e+001 \r\n775276750 -5.288261e+001 4.009993e+001 \r\n787776375 -5.279138e+001 3.902968e+001 \r\n800276000 -5.268390e+001 3.731693e+001 \r\n812775625 -5.250108e+001 3.735605e+001 \r\n825275250 -5.230118e+001 3.528942e+001 \r\n837774875 -5.228596e+001 3.413509e+001 \r\n850274500 -5.225728e+001 3.397012e+001 \r\n862774125 -5.221925e+001 3.301470e+001 \r\n875273750 -5.197077e+001 3.252770e+001 \r\n887773375 -5.172133e+001 3.175958e+001 \r\n900273000 -5.176516e+001 3.028228e+001 \r\n912772625 -5.165437e+001 2.946870e+001 \r\n925272250 -5.140886e+001 2.911146e+001 \r\n937771875 -5.121451e+001 2.785467e+001 \r\n950271500 -5.115018e+001 2.680370e+001 \r\n962771125 -5.106087e+001 2.589590e+001 \r\n975270750 -5.091766e+001 2.470466e+001 \r\n987770375 -5.077415e+001 2.414316e+001 \r\n1000270000 -5.077781e+001 2.251287e+001 \r\n1012769625 -5.061287e+001 2.184069e+001 \r\n1025269250 -5.046037e+001 2.112867e+001 \r\n1037768875 -5.041710e+001 2.041583e+001 \r\n1050268500 -5.034505e+001 1.964793e+001 \r\n1062768125 -5.010727e+001 1.948736e+001 \r\n1075267750 -4.999567e+001 1.748911e+001 \r\n1087767375 -4.995248e+001 1.650567e+001 \r\n1100267000 -4.983928e+001 1.555959e+001 \r\n1112766625 -4.979542e+001 1.465369e+001 \r\n1125266250 -4.965375e+001 1.431017e+001 \r\n1137765875 -4.959397e+001 1.383675e+001 \r\n1150265500 -4.931949e+001 1.247714e+001 \r\n1162765125 -4.933812e+001 1.212812e+001 \r\n1175264750 -4.920687e+001 1.103721e+001 \r\n1187764375 -4.913387e+001 9.576766e+000 \r\n1200264000 -4.896677e+001 9.515688e+000 \r\n1212763625 -4.891822e+001 8.358768e+000 \r\n1225263250 -4.893336e+001 7.462193e+000 \r\n1237762875 -4.880385e+001 7.016991e+000 \r\n1250262500 -4.871651e+001 6.048291e+000 \r\n1262762125 -4.868192e+001 5.389215e+000 \r\n1275261750 -4.853089e+001 4.799742e+000 \r\n1287761375 -4.837516e+001 4.072433e+000 \r\n1300261000 -4.832850e+001 3.350426e+000 \r\n1312760625 -4.823829e+001 2.926476e+000 \r\n1325260250 -4.811640e+001 2.802995e+000 \r\n1337759875 -4.796046e+001 1.935354e+000 \r\n1350259500 -4.789541e+001 1.078858e+000 \r\n1362759125 -4.772422e+001 1.031734e-001 \r\n1375258750 -4.751549e+001 -7.953963e-001 \r\n1387758375 -4.751718e+001 -1.839079e+000 \r\n1400258000 -4.745274e+001 -2.181090e+000 \r\n1412757625 -4.732962e+001 -2.897630e+000 \r\n1425257250 -4.728725e+001 -3.396981e+000 \r\n1437756875 -4.705547e+001 -4.663998e+000 \r\n1450256500 -4.701888e+001 -4.696922e+000 \r\n1462756125 -4.692214e+001 -5.328847e+000 \r\n1475255750 -4.676532e+001 -6.057939e+000 \r\n1487755375 -4.667664e+001 -6.812870e+000 \r\n1500255000 -4.651433e+001 -7.372804e+000 \r\n1512754625 -4.645776e+001 -8.295530e+000 \r\n1525254250 -4.640414e+001 -8.885608e+000 \r\n1537753875 -4.625462e+001 -9.458611e+000 \r\n1550253500 -4.615759e+001 -1.034769e+001 \r\n1562753125 -4.602901e+001 -1.118359e+001 \r\n1575252750 -4.591785e+001 -1.146670e+001 \r\n1587752375 -4.582006e+001 -1.216476e+001 \r\n1600252000 -4.573895e+001 -1.344271e+001 \r\n1612751625 -4.564947e+001 -1.409981e+001 \r\n1625251250 -4.557269e+001 -1.493916e+001 \r\n1637750875 -4.552905e+001 -1.522885e+001 \r\n1650250500 -4.535494e+001 -1.597471e+001 \r\n1662750125 -4.533935e+001 -1.679436e+001 \r\n1675249750 -4.523017e+001 -1.711101e+001 \r\n1687749375 -4.511380e+001 -1.770077e+001 \r\n1700249000 -4.495482e+001 -1.828860e+001 \r\n1712748625 -4.488248e+001 -1.901546e+001 \r\n1725248250 -4.474555e+001 -1.962140e+001 \r\n1737747875 -4.464362e+001 -2.010393e+001 \r\n1750247500 -4.455316e+001 -2.080236e+001 \r\n1762747125 -4.443913e+001 -2.183280e+001 \r\n1775246750 -4.438253e+001 -2.229253e+001 \r\n1787746375 -4.427594e+001 -2.286547e+001 \r\n1800246000 -4.416278e+001 -2.338794e+001 \r\n1812745625 -4.404190e+001 -2.422547e+001 \r\n1825245250 -4.397051e+001 -2.489734e+001 \r\n1837744875 -4.389664e+001 -2.570900e+001 \r\n1850244500 -4.376480e+001 -2.626579e+001 \r\n1862744125 -4.372022e+001 -2.690115e+001 \r\n1875243750 -4.359946e+001 -2.762733e+001 \r\n1887743375 -4.354422e+001 -2.830352e+001 \r\n1900243000 -4.340113e+001 -2.868166e+001 \r\n1912742625 -4.328941e+001 -2.949524e+001 \r\n1925242250 -4.323482e+001 -3.022578e+001 \r\n1937741875 -4.309921e+001 -3.076512e+001 \r\n1950241500 -4.302616e+001 -3.125579e+001 \r\n1962741125 -4.291639e+001 -3.186052e+001 \r\n1975240750 -4.283813e+001 -3.279428e+001 \r\n1987740375 -4.274488e+001 -3.335489e+001 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9.680785e+001 \r\n9762507125 -1.831733e-001 9.649762e+001 \r\n9775006750 -1.831011e-001 9.618582e+001 \r\n9787506375 -1.844105e-001 9.587793e+001 \r\n9800006000 -1.831756e-001 9.557127e+001 \r\n9812505625 -1.853108e-001 9.526274e+001 \r\n9825005250 -1.850246e-001 9.495493e+001 \r\n9837504875 -1.845219e-001 9.464380e+001 \r\n9850004500 -1.855004e-001 9.433578e+001 \r\n9862504125 -1.862428e-001 9.401950e+001 \r\n9875003750 -1.858779e-001 9.371051e+001 \r\n9887503375 -1.858604e-001 9.340434e+001 \r\n9900003000 -1.868933e-001 9.310152e+001 \r\n9912502625 -1.868922e-001 9.279159e+001 \r\n9925002250 -1.887762e-001 9.249139e+001 \r\n9937501875 -1.886261e-001 9.217996e+001 \r\n9950001500 -1.888863e-001 9.188139e+001 \r\n9962501125 -1.898293e-001 9.157852e+001 \r\n9975000750 -1.900673e-001 9.127148e+001 \r\n9987500375 -1.902464e-001 9.096273e+001 \r\n10000000000 -1.907378e-001 9.065254e+001 \r\n" }, { "path": "software/cal_kit/short.s1p", "content": "!Agilent Technologies,N5230A,MY45001695,A.07.50.67\r\n!Agilent N5230A: A.07.50.67\r\n!Date: Thursday, August 18, 2016 06:58:48\r\n!Correction: S11(Full 1 Port(1)) \r\n!S1P File: Measurement: S11:\r\n# Hz S dB R 50\r\n300000 7.351335e-004 -1.799984e+002 \r\n12799625 -1.857829e-003 1.796434e+002 \r\n25299250 -3.036303e-003 1.793052e+002 \r\n37798875 -5.214687e-003 1.789603e+002 \r\n50298500 -6.140910e-003 1.786251e+002 \r\n62798125 -7.675145e-003 1.782890e+002 \r\n75297750 -8.664010e-003 1.779554e+002 \r\n87797375 -9.969773e-003 1.776260e+002 \r\n100297000 -1.140606e-002 1.772918e+002 \r\n112796625 -1.277121e-002 1.769612e+002 \r\n125296250 -1.471645e-002 1.766316e+002 \r\n137795875 -1.537880e-002 1.763032e+002 \r\n150295500 -1.689541e-002 1.759739e+002 \r\n162795125 -1.828763e-002 1.756426e+002 \r\n175294750 -1.959587e-002 1.753192e+002 \r\n187794375 -2.096942e-002 1.749907e+002 \r\n200294000 -2.295810e-002 1.746615e+002 \r\n212793625 -2.409174e-002 1.743408e+002 \r\n225293250 -2.521767e-002 1.740144e+002 \r\n237792875 -2.597142e-002 1.736883e+002 \r\n250292500 -2.747820e-002 1.733676e+002 \r\n262792125 -2.873391e-002 1.730433e+002 \r\n275291750 -2.957378e-002 1.727194e+002 \r\n287791375 -3.006355e-002 1.723928e+002 \r\n300291000 -3.113103e-002 1.720726e+002 \r\n312790625 -3.218149e-002 1.717440e+002 \r\n325290250 -3.326175e-002 1.714250e+002 \r\n337789875 -3.412849e-002 1.710997e+002 \r\n350289500 -3.441711e-002 1.707749e+002 \r\n362789125 -3.535029e-002 1.704535e+002 \r\n375288750 -3.660453e-002 1.701325e+002 \r\n387788375 -3.774032e-002 1.698072e+002 \r\n400288000 -3.763235e-002 1.694837e+002 \r\n412787625 -3.867501e-002 1.691601e+002 \r\n425287250 -3.985976e-002 1.688395e+002 \r\n437786875 -4.019197e-002 1.685193e+002 \r\n450286500 -4.118941e-002 1.681936e+002 \r\n462786125 -4.150531e-002 1.678724e+002 \r\n475285750 -4.218597e-002 1.675479e+002 \r\n487785375 -4.271821e-002 1.672282e+002 \r\n500285000 -4.272685e-002 1.669029e+002 \r\n512784625 -4.346201e-002 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\r\n1662750125 -7.344915e-002 1.370475e+002 \r\n1675249750 -7.396174e-002 1.367271e+002 \r\n1687749375 -7.373022e-002 1.364090e+002 \r\n1700249000 -7.386257e-002 1.360850e+002 \r\n1712748625 -7.445866e-002 1.357663e+002 \r\n1725248250 -7.476538e-002 1.354458e+002 \r\n1737747875 -7.534304e-002 1.351236e+002 \r\n1750247500 -7.440050e-002 1.348050e+002 \r\n1762747125 -7.535341e-002 1.344838e+002 \r\n1775246750 -7.540124e-002 1.341648e+002 \r\n1787746375 -7.493801e-002 1.338440e+002 \r\n1800246000 -7.552289e-002 1.335230e+002 \r\n1812745625 -7.528725e-002 1.332014e+002 \r\n1825245250 -7.512952e-002 1.328819e+002 \r\n1837744875 -7.526156e-002 1.325638e+002 \r\n1850244500 -7.516642e-002 1.322391e+002 \r\n1862744125 -7.520777e-002 1.319188e+002 \r\n1875243750 -7.556079e-002 1.315960e+002 \r\n1887743375 -7.568080e-002 1.312781e+002 \r\n1900243000 -7.577781e-002 1.309580e+002 \r\n1912742625 -7.560184e-002 1.306364e+002 \r\n1925242250 -7.578556e-002 1.303149e+002 \r\n1937741875 -7.640699e-002 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-6.430661e+001 \r\n9287521375 2.162331e-002 -6.465367e+001 \r\n9300021000 2.196935e-002 -6.500461e+001 \r\n9312520625 2.247820e-002 -6.536101e+001 \r\n9325020250 2.326003e-002 -6.571492e+001 \r\n9337519875 2.298975e-002 -6.606382e+001 \r\n9350019500 2.331924e-002 -6.641138e+001 \r\n9362519125 2.363629e-002 -6.676540e+001 \r\n9375018750 2.360742e-002 -6.712283e+001 \r\n9387518375 2.318852e-002 -6.747208e+001 \r\n9400018000 2.328138e-002 -6.782034e+001 \r\n9412517625 2.349389e-002 -6.817380e+001 \r\n9425017250 2.404018e-002 -6.852669e+001 \r\n9437516875 2.378390e-002 -6.887944e+001 \r\n9450016500 2.403486e-002 -6.922824e+001 \r\n9462516125 2.436830e-002 -6.958586e+001 \r\n9475015750 2.514691e-002 -6.994084e+001 \r\n9487515375 2.409293e-002 -7.028334e+001 \r\n9500015000 2.512429e-002 -7.064005e+001 \r\n9512514625 2.472393e-002 -7.099298e+001 \r\n9525014250 2.573284e-002 -7.134082e+001 \r\n9537513875 2.543492e-002 -7.169782e+001 \r\n9550013500 2.521628e-002 -7.204855e+001 \r\n9562513125 2.548340e-002 -7.240288e+001 \r\n9575012750 2.516956e-002 -7.275547e+001 \r\n9587512375 2.579841e-002 -7.310230e+001 \r\n9600012000 2.563469e-002 -7.345681e+001 \r\n9612511625 2.649604e-002 -7.380375e+001 \r\n9625011250 2.685513e-002 -7.416100e+001 \r\n9637510875 2.688158e-002 -7.450945e+001 \r\n9650010500 2.657865e-002 -7.487021e+001 \r\n9662510125 2.724083e-002 -7.522692e+001 \r\n9675009750 2.761280e-002 -7.557779e+001 \r\n9687509375 2.732278e-002 -7.592046e+001 \r\n9700009000 2.693989e-002 -7.627846e+001 \r\n9712508625 2.736475e-002 -7.663328e+001 \r\n9725008250 2.758121e-002 -7.699052e+001 \r\n9737507875 2.793859e-002 -7.734061e+001 \r\n9750007500 2.825187e-002 -7.769360e+001 \r\n9762507125 2.719993e-002 -7.804804e+001 \r\n9775006750 2.770641e-002 -7.839823e+001 \r\n9787506375 2.889985e-002 -7.874713e+001 \r\n9800006000 2.855774e-002 -7.910695e+001 \r\n9812505625 2.898438e-002 -7.946194e+001 \r\n9825005250 2.854657e-002 -7.981622e+001 \r\n9837504875 2.886684e-002 -8.016561e+001 \r\n9850004500 2.933442e-002 -8.051567e+001 \r\n9862504125 2.917490e-002 -8.087040e+001 \r\n9875003750 3.005832e-002 -8.122479e+001 \r\n9887503375 2.903933e-002 -8.158446e+001 \r\n9900003000 2.908626e-002 -8.192953e+001 \r\n9912502625 2.940763e-002 -8.229158e+001 \r\n9925002250 2.958662e-002 -8.264507e+001 \r\n9937501875 3.064030e-002 -8.299512e+001 \r\n9950001500 3.013025e-002 -8.335085e+001 \r\n9962501125 2.997074e-002 -8.370142e+001 \r\n9975000750 2.999905e-002 -8.405509e+001 \r\n9987500375 2.997749e-002 -8.442043e+001 \r\n10000000000 3.090187e-002 -8.476489e+001 \r\n" }, { "path": "software/max2871.py", "content": "\nfrom fractions import Fraction\n\nclass MAX2871():\n def __init__(self):\n #Register definitions:\n # (Register: name: (First bit, Length, [value]))\n self.register_def = {\n 0:{'int':(31, 1), 'n':(15, 16), 'frac':(3, 12)},\n 1:{'reserved0':(31, 1), 'cpl':(29, 2), 'cpt': (27, 2), 'p':(15,12), 'm':(3,12)},\n 2:{'lds':(31,1), 'sdn':(29,2), 'mux':(26,3), 'dbr':(25,1), 'rdiv2':(24,1), 'r':(14,10),\n 'reg4db':(13,1), 'cp':(9,4), 'ldf':(8,1), 'ldp':(7,1), 'pdp':(6,1), 'shdn':(5,1),\n 'tri':(4,1), 'rst':(3,1)},\n 3:{'vco':(26,6), 'vas_shdn':(25,1), 'vas_temp':(24,1), 'reserved1':(19,5), 'csm':(18,1),\n 'mutedel':(17,1), 'cdm':(15,2), 'cdiv':(3,12)},\n 4:{'reserved2':(29,3), 'sdldo':(28,1), 'sddiv':(27,1), 'sdref':(26,1), 'bs_msb':(24,2),\n 'fb':(23,1), 'diva':(20,3), 'bs_lsb':(12,8), 'sdvco':(11,1), 'mtld':(10,1),\n 'bdiv':(9,1), 'rfb_en':(8,1), 'bpwr':(6,2), 'rfa_en':(5,1), 'apwr':(3,2)},\n 5:{'reserved3':(31,1), 'vas_dly':(29,2), 'reserved4':(26,3), 'sdlo_pll':(25,1),\n 'f01':(24,1), 'ld':(22,2), 'reserved5':(19,3), 'mux3':(18,1), 'reserved6':(7,11),\n 'adcs':(6,1), 'adcm':(3,3)},\n 6:{'die_id':(28,4), 'reserved7':(24,4), 'por':(23,1), 'adc':(16,7), 'adcv':(15,1),\n 'reserved8':(10,5), 'vasa':(9,1), 'v':(3,6)}\n }\n self.registers = [0]*8\n self.modified = [False]*8\n\n self.written_regs = [None]*8\n\n #Check unique names\n keys = []\n for key in self.register_def.values():\n for r in key:\n if r in keys:\n raise Exception(\"Duplicate register {}\".format(r))\n keys.append(r)\n\n def freq_to_regs(self, fout, fpd, m=4095, fb=1, apwr=0, rfa_en=1):\n \"\"\"Output register values for fout output frequency given\n the phase comparator frequency fpd.\n fb = Counter feedback position. 0 = Divider, 1 = VCO.\n M = Fractional modulus. f = (N + F/M)*fpd \"\"\"\n #Reg4:reserved2 must be 3\n self.write_value(reserved2=3)\n self.write_value(pdp=1) #Positive phase-detector polarity\n self.write_value(cpl=1) #Charge pump linearity 10%\n self.write_value(cp=11) #Charge pump current. Icp = (1.63/Rset)*(1+cp)\n self.write_value(ld=1) #Digital lock detect pin function\n self.write_value(mutedel=1)\n self.write_value(ldf=0) #Fractional-N lock detect\n self.write_value(r=1) #Reference divide by 1\n self.write_value(p=1) #Phase, recommended 1\n self.write_value(sdn=0) #Low-noise mode\n self.write_value(reg4db=1) #Double buffer reg4\n self.write_value(apwr=apwr)\n self.write_value(rfa_en=rfa_en)\n\n #self.write_value(dbr=1) #Enable reference doubler\n #fpd *= 2\n\n if fpd < 32e6:\n self.write_value(lds=0)\n else:\n self.write_value(lds=1)\n\n self.write_value(mux3=0)\n self.write_value(mux=0) # Tri-state\n\n if 3e9 <= fout:\n self.write_value(diva=0)\n div = 1\n elif 1.5e9 <= fout:\n self.write_value(diva=1)\n div = 2\n elif 750e6 <= fout:\n self.write_value(diva=2)\n div = 4\n elif 375e6 <= fout:\n self.write_value(diva=3)\n div = 8\n elif 187.5e6 <= fout:\n self.write_value(diva=4)\n div = 16\n elif 93.75e6 <= fout:\n self.write_value(diva=5)\n div = 32\n elif 46.875e6 <= fout:\n self.write_value(diva=6)\n div = 64\n else:\n self.write_value(diva=7)\n div = 128\n\n fvco = fout*div\n for i in range(2):\n d = 1 if fb else min(div, 16)\n n = int((fvco/fpd)/d)\n if 19 <= n <= 4091:\n break\n else:\n fb = int(not fb)\n\n self.write_value(fb=fb)\n self.write_value(n=n)\n\n self.write_value(cdiv=int(round(fpd/100e3)))\n\n bs = int(round(fpd/50e3))\n if bs > 1023:\n bs = 1023\n self.write_value(bs_msb=bs >> 8)\n self.write_value(bs_lsb=bs & 0xFF)\n\n if 1:\n #Choose best f/m to minimize frequency error\n x = Fraction((fvco-d*fpd*n)/(d*fpd)).limit_denominator(4095)\n f = x.numerator\n m = x.denominator\n if f == 1 and m == 1:\n f = 4094\n m = 4095\n else:\n #Fixed modulus\n f = int(round(m*(fvco-d*fpd*n)/(d*fpd)))\n\n if m < 2 or m > 4095:\n if f == 0:\n #Integer mode\n #TODO: Set integer mode\n m = 2\n else:\n raise ValueError(\"Invalid M value {}. 2 <= M <= 4095. f = {}\".format(m, f))\n self.write_value(m=m)\n self.write_value(frac=f)\n\n #print ((n+f/m)*fpd*d)/div,\n #print 'f {} m {} n {} d {} div {} fb {}'.format(f,m,n,d,div,fb)\n #print 'fvco {} fout {}'.format(fvco, fvco/div)\n #assert 3e9 <= fvco <= 6.25e9\n assert f < m\n assert 19 <= n <= 4091\n #fvco = d*fpd*(n+f/m)\n\n\n #VCO number, fmin, fmax\n #https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/common/max287x.hpp\n vcos = [\n (0,2767776024.0,2838472816.0),\n (1,2838472816.0,2879070053.0),\n (1,2879070053.0,2921202504.0),\n (3,2921202504.0,2960407579.0),\n (4,2960407579.0,3001687422.0),\n (5,3001687422.0,3048662562.0),\n (6,3048662562.0,3097511550.0),\n (7,3097511550.0,3145085864.0),\n (8,3145085864.0,3201050835.0),\n (9,3201050835.0,3259581909.0),\n (10,3259581909.0,3321408729.0),\n (11,3321408729.0,3375217285.0),\n (12,3375217285.0,3432807972.0),\n (13,3432807972.0,3503759088.0),\n (14,3503759088.0,3579011283.0),\n (15,3579011283.0,3683570865.0),\n (20,3683570865.0,3711845712.0),\n (21,3711845712.0,3762188221.0),\n (22,3762188221.0,3814209551.0),\n (23,3814209551.0,3865820020.0),\n (24,3865820020.0,3922520021.0),\n (25,3922520021.0,3981682709.0),\n (26,3981682709.0,4043154280.0),\n (27,4043154280.0,4090400020.0),\n (28,4000400020.0,4159647583.0),\n (29,4159647583.0,4228164842.0),\n (30,4228164842.0,4299359879.0),\n (31,4299359879.0,4395947962.0),\n (33,4395947962.0,4426512061.0),\n (34,4426512061.0,4480333656.0),\n (35,4480333656.0,4526297331.0),\n (36,4526297331.0,4574689510.0),\n (37,4574689510.0,4633102021.0),\n (38,4633102021.0,4693755616.0),\n (39,4693755616.0,4745624435.0),\n (40,4745624435.0,4803922123.0),\n (41,4803922123.0,4871523881.0),\n (42,4871523881.0,4942111286.0),\n (43,4942111286.0,5000192446.0),\n (44,5000192446.0,5059567510.0),\n (45,5059567510.0,5136258187.0),\n (46,5136258187.0,5215827295.0),\n (47,5215827295.0,5341282949.0),\n (49,5341282949.0,5379819310.0),\n (50,5379819310.0,5440868434.0),\n (51,5440868434.0,5500079705.0),\n (52,5500079705.0,5555329630.0),\n (53,5555329630.0,5615049833.0),\n (54,5615049833.0,5676098527.0),\n (55,5676098527.0,5724191577.0),\n (56,5724191577.0,5810869917.0),\n (57,5810869917.0,5879176194.0),\n (58,5879176194.0,5952430629.0),\n (59,5952430629.0,6016743964.0),\n (60,6016743964.0,6090658690.0),\n (61,6090658690.0,6128133570.0),\n (63,6128133570.0,6200000001.0),\n\n ]\n\n for vco in range(len(vcos)):\n if vcos[vco][1] < fvco <= vcos[vco][2]:\n #print vcos[vco][0], fvco\n self.write_value(vco=vcos[vco][0])\n break\n else:\n if fvco > 6e9:\n self.write_value(vco=vcos[-1][0])\n else:\n raise Exception('No suitable VCO found. fvco = {}'.format(fvco))\n\n self.write_value(vas_shdn=1)\n\n return ((n+f/m)*fpd*d)/div\n\n def find_reg(self, reg):\n \"\"\"Finds register by name\"\"\"\n for key, val in self.register_def.items():\n if reg in list(val.keys()):\n return key, val[reg]\n return None, None\n\n def write_value(self, **kw):\n \"\"\"Write value to register, doesn't update the device\"\"\"\n for reg, val in kw.items():\n #print \"{} = {}\".format(reg, val)\n reg_n, reg_def = self.find_reg(reg)\n if reg_n == None:\n raise ValueError(\"Register {} not found\".format(reg))\n reg_start = reg_def[0]\n reg_len = reg_def[1]\n if val > 2**reg_len or val < 0:\n raise ValueError(\"Invalid value, got: {}, maximum {}\".format(val, reg_len))\n #Clear previous value\n self.registers[reg_n] &= (~((((2**reg_len-1))&0xFFFFFFFF) << reg_start) & 0xFFFFFFFF)\n self.registers[reg_n] |= (val) << reg_start\n self.modified[reg_n] = True\n return\n" }, { "path": "software/monitor_rx.py", "content": "# -*- coding: utf-8 -*-\n\nfrom vna import VNA\nimport matplotlib.pyplot as plt\nimport numpy as np\nfrom pyqtgraph.Qt import QtGui, QtCore\nimport pyqtgraph as pg\n\nplot_points = 1000\n\ndef init_vna():\n ref_freq = 40e6\n\n vna = VNA()\n\n source_freq = 5e9\n lo_freq = source_freq - 2e6\n\n vna.set_tx_mux('iq', sample_input='adc')\n\n vna.lo.freq_to_regs(lo_freq, ref_freq, apwr=0)\n vna.source.freq_to_regs(source_freq, ref_freq, apwr=0)\n\n #vna.dither_en(1)\n #vna.set_tx_mux('samples', sample_input='adc')\n\n vna.write_sample_time(int(40e6/100+100))\n #vna.write_sample_time(110000)\n vna.write_io(pwdn=0, mixer_enable=0, led=1, adc_oe=0, adc_shdn=0)\n vna.write_pll_io(lo_ce=1, source_ce=1, lo_rf=1, source_rf=1)\n vna.write_att(8.0)\n vna.write_switches(tx_filter=source_freq, port=1, rx_sw='rx1', rx_sw_force=False)\n vna.write_pll(vna.source)\n vna.write_pll(vna.lo)\n vna.write_pll(vna.source)\n vna.write_pll(vna.lo)\n\n vna.read_iq()\n vna.read_iq()\n return vna\n\nvna = init_vna()\niqs = {'rx1':[], 'rx2':[], 'a':[], 'b':[], 'none':[], 'unknown':[]}\n\napp = QtGui.QApplication([])\n\nwin = pg.GraphicsWindow(title=\"RX channels\")\n#win.resize(1000,600)\nwin.setWindowTitle('RX channels')\n\n# Enable antialiasing for prettier plots\npg.setConfigOptions(antialias=True)\n\nplot = win.addPlot(title=\"RX channels\", labels={'left':'Channel reading [dBFs]', 'bottom':'Samples'})\ncurve1 = plot.plot(pen='y', name='RX1')\ncurve2 = plot.plot(pen='g', name='A')\ncurve3 = plot.plot(pen='r', name='B')\ncurve4 = plot.plot(pen='b', name='RX2')\nplot.addLegend()\nplot.legend.addItem(curve1, \"RX1\")\nplot.legend.addItem(curve2, \"A\")\nplot.legend.addItem(curve3, \"B\")\nplot.legend.addItem(curve4, \"RX2\")\nplot.enableAutoRange('xy', False)\nplot.setXRange(0, plot_points, padding=0)\nplot.setYRange(-100, 0, padding=0)\n\ndef update():\n global iqs, vna, curve1, curve2, plot\n for i in range(4):\n iq,sw,tag = vna.read_iq()\n iqs[sw].append(20*np.log10(np.abs(iq)))\n #iqs[sw].append(np.angle(iq))\n rx1 = iqs['rx1'][-plot_points:]\n rx1 = [-100]*(plot_points-len(rx1)) + rx1\n a = iqs['a'][-plot_points:]\n a = [-100]*(plot_points-len(a)) + a\n b = iqs['b'][-plot_points:]\n b = [-100]*(plot_points-len(b)) + b\n rx2 = iqs['rx2'][-plot_points:]\n rx2 = [-100]*(plot_points-len(rx2)) + rx2\n curve1.setData(rx1)\n curve2.setData(a)\n curve3.setData(b)\n curve4.setData(rx2)\ntimer = QtCore.QTimer()\ntimer.timeout.connect(update)\ntimer.start(10)\n\n## Start Qt event loop unless running in interactive mode or using pyside.\nif __name__ == '__main__':\n import sys\n if (sys.flags.interactive != 1) or not hasattr(QtCore, 'PYQT_VERSION'):\n QtGui.QApplication.instance().exec_()\n\n" }, { "path": "software/monitor_sparam.py", "content": "# -*- coding: utf-8 -*-\n\nfrom vna import VNA\nimport matplotlib.pyplot as plt\nimport numpy as np\nfrom pyqtgraph.Qt import QtGui, QtCore\nimport pyqtgraph as pg\n\nplot_points = 500\n\ndef init_vna():\n ref_freq = 40e6\n\n vna = VNA()\n\n source_freq = 3.5e9\n lo_freq = source_freq - 2e6\n\n vna.lo.freq_to_regs(lo_freq, ref_freq, apwr=0)\n vna.source.freq_to_regs(source_freq, ref_freq, apwr=0)\n\n #vna.dither_en(1)\n vna.set_tx_mux('iq', sample_input='adc')\n #vna.set_tx_mux('samples', sample_input='adc')\n\n vna.write_sample_time(int(40e6/1000+100))\n #vna.write_sample_time(110000)\n vna.write_io(pwdn=0, mixer_enable=0, led=1, adc_oe=0, adc_shdn=0)\n vna.write_pll_io(lo_ce=1, source_ce=1, lo_rf=1, source_rf=1)\n vna.write_att(3.0)\n vna.write_switches(tx_filter=source_freq, port=1, rx_sw='rx2', rx_sw_force=False)\n vna.write_pll(vna.source)\n vna.write_pll(vna.lo)\n vna.write_pll(vna.source)\n vna.write_pll(vna.lo)\n\n vna.read_iq()\n vna.read_iq()\n return vna\n\nvna = init_vna()\niqs = {'rx1':[], 'rx2':[], 'a':[], 'b':[], 'none':[], 'unknown':[]}\n\napp = QtGui.QApplication([])\n\nwin = pg.GraphicsWindow(title=\"RX channels\")\n#win.resize(1000,600)\nwin.setWindowTitle('RX channels')\n\n# Enable antialiasing for prettier plots\npg.setConfigOptions(antialias=True)\n\nplot = win.addPlot(title=\"S-parameters\", labels={'left':'Magnitude [dB]', 'bottom':'Samples'})\ncurve1 = plot.plot(pen='y', name='S11')\ncurve2 = plot.plot(pen='g', name='S12')\nplot.addLegend()\nplot.legend.addItem(curve1, \"S11\")\nplot.legend.addItem(curve2, \"S21\")\nplot.enableAutoRange('xy', False)\nplot.setXRange(0, plot_points, padding=0)\nplot.setYRange(-100, 0, padding=0)\n\ndef update():\n global iqs, vna, curve1, curve2, plot\n for i in range(4):\n iq,sw,tag = vna.read_iq()\n iqs[sw].append(iq)\n rx1 = iqs['rx1'][-plot_points:]\n rx1 = np.array([-100]*(plot_points-len(rx1)) + rx1)\n a = iqs['a'][-plot_points:]\n a = np.array([-100]*(plot_points-len(a)) + a)\n b = iqs['b'][-plot_points:]\n b = np.array([-100]*(plot_points-len(b)) + b)\n #rx2 = iqs['rx2'][-plot_points:]\n #rx2 = [-100]*(plot_points-len(rx2)) + rx2\n curve1.setData(20*np.log10(np.abs(a/rx1)))\n curve2.setData(20*np.log10(np.abs(b/rx1)))\n #curve1.setData(180/np.pi*np.angle(a/rx1))\n #curve2.setData(180/np.pi*np.angle(b/rx1))\ntimer = QtCore.QTimer()\ntimer.timeout.connect(update)\ntimer.start(10)\n\n## Start Qt event loop unless running in interactive mode or using pyside.\nif __name__ == '__main__':\n import sys\n if (sys.flags.interactive != 1) or not hasattr(QtCore, 'PYQT_VERSION'):\n QtGui.QApplication.instance().exec_()\n\n" }, { "path": "software/oneport/calibrate.py", "content": "import sys\nimport skrf\nimport matplotlib.pyplot as plt\nimport numpy as np\nskrf.stylely()\n\ndef tline_input(zl, z0, t, f):\n c = 299792458\n w = c/f\n b = np.pi*2/w\n l = t*c\n return z0*(zl+1j*z0*np.tan(b*l))/(z0+1j*zl*np.tan(b*l))\n\ndef gamma(zl, z0):\n return (zl-z0)/(zl+z0)\n\ndef make_open(freqs, c0, c1, c2, c3, offset_t, offset_z0):\n c_coefs = [c0*1e-15, c1*1e-27, c2*1e-36, c3*1e-45]\n\n reactance = []\n for f in freqs:\n c = 0\n for i in xrange(len(c_coefs)):\n c += c_coefs[i]*f**i\n xc = (-1.0j/(2*np.pi*f*c))\n reactance.append(xc)\n reactance = np.array(reactance)\n sparam = gamma(tline_input(reactance, offset_z0, offset_t, freqs), 50)\n\n return skrf.Network(s=sparam, f=freqs, f_unit='Hz')\n\ndef make_short(freqs, l0, l1, l2, l3, offset_t, offset_z0):\n c_coefs = [l0*1e-12, l1*1e-24, l2*1e-34, l3*1e-42]\n\n reactance = []\n for f in freqs:\n c = 0\n for i in xrange(len(c_coefs)):\n c += c_coefs[i]*f**i\n xc = (1.0j*2*np.pi*f*c)\n reactance.append(xc)\n reactance = np.array(reactance)\n sparam = gamma(tline_input(reactance, offset_z0, offset_t, freqs), 50)\n\n return skrf.Network(s=sparam, f=freqs, f_unit='Hz')\n\ndef make_load(freqs, r0, l0, l1, l2, l3, offset_t, offset_z0):\n c_coefs = [l0*1e-12, l1*1e-24, l2*1e-34, l3*1e-42]\n\n reactance = []\n for f in freqs:\n c = 0\n for i in xrange(len(c_coefs)):\n c += c_coefs[i]*f**i\n xc = (1.0j*2*np.pi*f*c)\n reactance.append(xc)\n reactance = np.array(reactance)\n sparam = gamma(tline_input(r0+reactance, offset_z0, offset_t, freqs), 50)\n\n return skrf.Network(s=sparam, f=freqs, f_unit='Hz')\n\n\no = skrf.Network('open.s1p')\ns = skrf.Network('short.s1p')\nl = skrf.Network('load.s1p')\ndut = skrf.Network(sys.argv[1])\n\nfreqs = o.frequency\n\no_i = skrf.Network('../cal_kit/open.s1p')\ns_i = skrf.Network('../cal_kit/short.s1p')\nl_i = skrf.Network('../cal_kit/load.s1p')\n\no_i = o_i.interpolate(freqs)\ns_i = s_i.interpolate(freqs)\nl_i = l_i.interpolate(freqs)\n\n#o_i = make_open(freqs, 4.46941071, -1353.09191861, 2189.61227292, -143.3687188, 31.1e-12, 50)\n#s_i = make_short(freqs, 64.1413939, -11375.46199962, -3975.09654213, -77.69120398, 31.1e-12 ,50)\n#l_i = make_load(freqs, 50.0, 95.97419879, -61.62497249, 262.22809906, -881.59180129, 31.1e-12, 50)\n\n\n\ncal = skrf.OnePort(\\\n measured = [o, s, l],\n ideals =[o_i, s_i, l_i]\n )\n\ncoefs = cal.coefs\nprint coefs.keys()\n\nfor k in coefs.keys():\n plt.figure()\n plt.title(k)\n plt.plot(20*np.log10(np.abs(coefs[k])))\n\nplt.figure()\ndut_cal = cal.apply_cal(dut)\ndut_cal.plot_s_db()\nplt.show(block=True)\n\n" }, { "path": "software/sparam.py", "content": "\nfrom vna import VNA\nimport matplotlib.pyplot as plt\nimport numpy as np\nimport time\nimport skrf\nimport pickle\n\ndef iq_to_sparam(iqs, freqs, ports, sw_correction=True):\n sparams = []\n\n if len(ports) == 1:\n for f in range(len(freqs)):\n if ports[0] == 1:\n s = iqs[f][('a',1)]/iqs[f][('rx1',1)]\n else:\n s = iqs[f][('b',2)]/iqs[f][('rx2',2)]\n sparams.append(s)\n elif len(ports) == 2:\n for f in range(len(freqs)):\n s11 = []\n s12 = []\n s21 = []\n s22 = []\n if sw_correction:\n D = 1.0 - (iqs[f][('rx2',1)]/iqs[f][('rx1',1)])*(iqs[f][('rx1',2)]/iqs[f][('rx2',2)])\n sm11 = (1.0/D)*( iqs[f][('a',1)]/iqs[f][('rx1',1)] - (iqs[f][('a',2)]/iqs[f][('rx2',2)])*(iqs[f][('rx2',1)]/iqs[f][('rx1',1)]) )\n sm12 = (1.0/D)*( iqs[f][('a',2)]/iqs[f][('rx2',2)] - (iqs[f][('a',1)]/iqs[f][('rx1',1)])*(iqs[f][('rx1',2)]/iqs[f][('rx2',2)]) )\n sm21 = (1.0/D)*( iqs[f][('b',1)]/iqs[f][('rx1',1)] - (iqs[f][('b',2)]/iqs[f][('rx2',2)])*(iqs[f][('rx2',1)]/iqs[f][('rx1',1)]) )\n sm22 = (1.0/D)*( iqs[f][('b',2)]/iqs[f][('rx2',2)] - (iqs[f][('b',1)]/iqs[f][('rx1',1)])*(iqs[f][('rx1',2)]/iqs[f][('rx2',2)]) )\n else:\n sm11 = iqs[f][('a',1)]/iqs[f][('rx1',1)]\n sm12 = iqs[f][('a',2)]/iqs[f][('rx2',2)]\n sm21 = iqs[f][('b',1)]/iqs[f][('rx1',1)]\n sm22 = iqs[f][('b',2)]/iqs[f][('rx2',2)]\n s11.append(sm11)\n s12.append(sm12)\n s21.append(sm21)\n s22.append(sm22)\n sparams.append( [[np.mean(s11), np.mean(s12)], [np.mean(s21), np.mean(s22)]] )\n\n return skrf.Network(s=sparams, f=freqs, f_unit='Hz')\n\ndef sw_terms(iqs, freqs):\n \"\"\"Switch terms from IQ\"\"\"\n sparams = []\n\n for f in range(len(freqs)):\n sw_f = iqs[f][('rx2',1)]/iqs[f][('b',1)]\n sw_r = iqs[f][('rx1',2)]/iqs[f][('a',2)]\n sparams.append( [[sw_f, 0], [0, sw_r]] )\n\n return skrf.Network(s=sparams, f=freqs, f_unit='Hz')\n\n\nvna = VNA()\n\nports = [1, 2]\nsw_correction = True\n\nfreqs = np.linspace(30e6, 8.5e9, 801)\n\nvna.set_tx_mux('iq', sample_input='adc')\nvna.write_att(7.0)\nvna.write_sample_time(int(40e6/1000+100))\nvna.write_io(pwdn=0, mixer_enable=0, led=1, adc_oe=0, adc_shdn=0)\nvna.write_pll_io(lo_ce=1, source_ce=1, lo_rf=1, source_rf=1)\niqs = [{} for i in range(len(freqs))]\n\ntime.sleep(0.5)\n\nfirst = True\nfor port in ports:\n tag = 1\n for e,freq in enumerate(freqs):\n if freq > 4.5e9:\n vna.write_att(0)\n vna.write_switches(tx_filter=freq, port=port, rx_sw='rx1')\n vna.program_sources(freq, 2e6)\n if first:\n time.sleep(20e-3)\n vna.write_pll(vna.lo)\n vna.write_pll(vna.source)\n first = False\n for i in range(4):\n iq, sw, t = vna.read_iq()\n time.sleep(1e-3)\n vna.write_tag(tag)\n i = 0\n while True:\n iq, sw, t = vna.read_iq()\n if t != tag:\n continue\n i += 1\n iqs[e].setdefault((sw,port), iq)\n\n print(freq, sw, 20*np.log10(np.abs(iq)))\n if i == 4:\n break\n tag = (tag + 1) % 256\n\nplt.figure()\nnet = iq_to_sparam(iqs, freqs, ports, sw_correction=sw_correction)\nnet.plot_s_db()\nnet.write_touchstone('response.s{}p'.format(net.nports))\n\nif not sw_correction and len(ports) == 2:\n sw = sw_terms(iqs, freqs)\n sw.write_touchstone('sw_terms.s2p')\n\npickle.dump( (freqs, iqs), open( \"iqs.p\", \"wb\" ) )\nplt.ylim([-100, 0])\nplt.show()\n" }, { "path": "software/twoport/calibrate.py", "content": "#!/usr/bin/env python\nimport skrf\nimport matplotlib.pyplot as plt\nimport numpy as np\nimport sys\nskrf.stylely()\n\n# Calibration standards measured as two-port\n# Can be one-port and then combined as two-port\n# when not using SixteenTerm calibration\noo = skrf.Network('open_open.s2p')\nss = skrf.Network('short_short.s2p')\nll = skrf.Network('load_load.s2p')\nthrough = skrf.Network('through.s2p')\n\nfreqs = through.f\nfrequency = through.frequency\n\no_i = skrf.Network('../cal_kit/open.s1p')\ns_i = skrf.Network('../cal_kit/short.s1p')\nl_i = skrf.Network('../cal_kit/load.s1p')\n\no_i = o_i.interpolate(frequency)\ns_i = s_i.interpolate(frequency)\nl_i = l_i.interpolate(frequency)\n\nll_i = skrf.two_port_reflect(l_i, l_i)\nss_i = skrf.two_port_reflect(s_i, s_i)\noo_i = skrf.two_port_reflect(o_i, o_i)\n\n#Make ideal through\nthrough_z0 = 46\nthrough_delay = 100e-12\nd = 2*np.pi*through_delay\natt = np.log(10**(-0.1/20))/6e9\ng = d+1j*att\nthrough_s = [[[0,np.exp(-1j*g*f)],[np.exp(-1j*g*f),0]] for f in freqs]\nthrough_i = skrf.Network(s=through_s, f=freqs, f_unit='Hz', z0=through_z0)\nthrough_i.renormalize(50)\n\nll_i = skrf.two_port_reflect(l_i, l_i)\nls_i = skrf.two_port_reflect(l_i, s_i)\nsl_i = skrf.two_port_reflect(s_i, l_i)\nss_i = skrf.two_port_reflect(s_i, s_i)\noo_i = skrf.two_port_reflect(o_i, o_i)\n\nif 0:\n # Classic VNA calibration\n cal = skrf.TwelveTerm(\\\n measured = [oo, ss, ll, through],\n ideals =[oo_i, ss_i, ll_i, through_i],\n isolation=ll,\n n_thrus = 1,\n )\n cal.run()\nelif 1:\n # Doesn't require fully known through standard\n cal = skrf.UnknownThru(\\\n measured = [oo, ss, ll, through],\n ideals =[oo_i, ss_i, ll_i, through_i],\n n_thrus = 1,\n )\n cal.run()\nelif 0:\n sl = skrf.Network('short_load.s2p')\n ls = skrf.Network('load_short.s2p')\n # Calibrates leakage terms\n cal = skrf.SixteenTerm(\\\n measured = [oo, ss, sl, ls, ll, through],\n ideals =[oo_i, ss_i, sl_i, ls_i, ll_i, through_i],\n n_thrus = 1,\n )\n cal.run()\n\nif 0:\n # Plot calibration error terms\n coefs = cal.coefs\n for k in list(coefs.keys()):\n plt.figure()\n plt.title(k)\n plt.plot(freqs, 20*np.log10(np.abs(coefs[k])))\n\nplt.figure(figsize=(8,5))\nfor dut in sys.argv[1:]:\n dut = skrf.Network(dut)\n dut.frequency.unit = \"GHz\"\n dut = cal.apply_cal(dut)\n dut.plot_s_db()\n\ndut.write_touchstone('dut_calibrated.s2p')\nplt.show(block=True)\n" }, { "path": "software/vna.py", "content": "\nimport pylibftdi as ftdi\nfrom max2871 import MAX2871\nimport time\nimport matplotlib.pyplot as plt\nimport numpy as np\n\nref_freq = 40e6\n\nclass VNA():\n def __init__(self):\n self.device = ftdi.Device(mode='t', interface_select=ftdi.INTERFACE_B)\n self.device.open()\n self.lo = MAX2871()\n self.source = MAX2871()\n self.current_switches = None\n self.current_att = None\n\n self.source_harmonic = 5\n self.lo_harmonic = 3\n self.max_nonharmonic_freq = 6.3e9\n\n def array_to_int(self, a, reverse=False):\n if reverse:\n a = a[::-1]\n l = len(a)\n x = 0\n for i in range(0,l):\n x = (x<<8) + a[i]\n return x\n\n\n def read_samples(self):\n\n def twos_comp(val, bits):\n \"\"\"compute the 2's compliment of int value val\"\"\"\n if (val & (1 << (bits - 1))) != 0: # if sign bit is set e.g., 8bit: 128-255\n val = val - (1 << bits) # compute negative value\n return val # return positive value as is\n\n bytes_in = []\n while True:\n r = self.device.read(1)\n if len(r) == 0:\n continue\n if ord(r) != 0xaa:\n continue\n r = self.device.read(1)\n #Size, don't care\n if self.device.read(1) != '\\x02':\n continue\n if self.device.read(1) != '\\x00':\n continue\n break\n for i in range(10001-1):\n s = self.device.read(1)\n if len(s) == 1:\n bytes_in.append(ord(s))\n\n print((bytes_in[:10]))\n samples = []\n for i in range(len(bytes_in)//2):\n samples.append(twos_comp((bytes_in[2*i]<<8)+bytes_in[2*i+1], 16))\n with open('samples.txt', 'w') as f:\n f.write('\\n'.join(map(str,samples))+'\\n')\n return samples\n\n def read_iq(self):\n\n def twos_comp(val, bits):\n \"\"\"compute the 2's compliment of int value val\"\"\"\n if (val & (1 << (bits - 1))) != 0: # if sign bit is set e.g., 8bit: 128-255\n val = val - (1 << bits) # compute negative value\n return val # return positive value as is\n\n def sw(sw):\n if sw == 1:\n return 'rx1'\n if sw == 2:\n return 'a'\n if sw == 3:\n return 'rx2'\n if sw == 4:\n return 'b'\n if sw == 0:\n return 'none'\n return 'unknown'\n\n while True:\n r = self.device.read(1)\n if len(r) == 0:\n continue\n if ord(r) != 0xaa:\n continue\n r = self.device.read(1)\n if ord(r) != 0x19:\n continue\n r = self.device.read(1)\n if ord(r) != 0x01:\n continue\n break\n iq = list(map(ord, self.device.read(23)))\n\n i = iq[0:7]\n q = iq[7:14]\n cycles = iq[14:21]\n rx_sw = sw(iq[21])\n tag = iq[22]\n #print i,q,cycles\n i = twos_comp(self.array_to_int(i, reverse=True), 8*7)\n q = twos_comp(self.array_to_int(q, reverse=True), 8*7)\n cycles = self.array_to_int(cycles, reverse=True)\n gain = 1.0/((2**21))\n i *= gain/cycles\n q *= gain/cycles\n #print i, q, cycles\n return i+1j*q, rx_sw, tag\n\n def write_att(self, att):\n if self.current_att == att:\n return 0\n def reverse_bits(x, n=8):\n result = 0\n for i in range(n):\n if (x >> i) & 1:\n result |= 1 << (n - 1 - i)\n return result\n\n if att > 31.75:\n raise ValueError(\"Too high attenuation. Max 31.75 dB, got {}\".format(att))\n #Bits must be shifted LSB first, but FPGA shifts MSB first\n w = reverse_bits(int(round(att/0.25)))\n assert 0 <= w <= 255\n assert w & 0x01 == 0x00\n self.current_att = att\n return self.to_device(6, [w])\n\n def write_switches(self, tx_filter, port, rx_sw, rx_sw_force=False):\n if port == 1:\n port_sw = 1\n elif port == 2:\n port_sw = 2\n elif port == 0:\n port_sw = 0\n else:\n raise ValueError(\"Invalid port {}. Valid values are 0-2.\".format(port))\n\n try:\n rx_sw = rx_sw.lower()\n except AttributeError:\n rx_sw = str(rx_sw)\n\n if rx_sw == 'rx1':\n rx_sw = (1 << 5) | (1 << 1)\n elif rx_sw == 'a':\n rx_sw = (1 << 5) | (1 << 0)\n elif rx_sw == 'b':\n rx_sw = (1 << 4) | (1 << 3)\n elif rx_sw == 'rx2':\n rx_sw = (1 << 4) | (1 << 2)\n elif rx_sw == 'none':\n rx_sw = 0\n else:\n raise ValueError(\"Invalid RX port: {}. Valid values are: none, A, B, RX1, RX2\".format(rx_sw))\n\n #0 1.1 - 2.1\n #1 2.1 - 4.2\n #2 4.2 - 6.0\n #3 0.1 - 1.1\n if tx_filter < 1.1e9:\n b1 = (1 << 3)\n elif tx_filter < 2.1e9:\n b1 = (1 << 0)\n elif tx_filter < 4.2e9:\n b1 = (1 << 1)\n else:\n b1 = (1 << 2)\n b1 |= (port_sw & 0x3) << 4\n b2 = rx_sw & 0x3f\n if rx_sw_force:\n b2 |= (1 << 6)\n if [b1,b2] != self.current_switches:\n self.current_switches = [b1,b2]\n return self.to_device(1, [b1,b2])\n return 0\n\n def write_io(self, pwdn, mixer_enable, led, adc_oe, adc_shdn):\n #pwdn: Amplifier enabled when low\n b1 = ((adc_shdn & 1) << 4) | ((adc_oe & 1) << 3) | ((led & 1) << 2) | ((mixer_enable & 1) << 1) | ((pwdn &1) << 0)\n return self.to_device(2, [b1])\n\n def write_tag(self, tag):\n return self.to_device(11, [tag])\n\n def write_pll(self, pll):\n for i in range(5,-1, -1):\n reg = pll.registers[i] | i\n if i != 0 and pll.written_regs[i] == reg:\n continue\n self.write_pll_reg(pll, reg)\n pll.written_regs[i] = reg\n\n def write_sample_time(self, samples):\n b1 = (samples & 0x000000ff) >> 0\n b2 = (samples & 0x0000ff00) >> 8\n b3 = (samples & 0x00ff0000) >> 16\n b4 = (samples & 0xff000000) >> 24\n return self.to_device(5, [b4,b3,b2,b1])\n\n def write_echo(self, word):\n return self.to_device(10, [word & 0xff])\n\n def read_echo(self):\n for i in range(1000):\n r = self.device.read(1)\n if len(r) != 0:\n return r\n return r\n\n def set_tx_mux(self, mux, sample_input='adc'):\n try:\n mux = mux.lower()\n sample_input = sample_input.lower()\n except AttributeError:\n pass\n\n self.tx_mux = mux\n if sample_input == 'adc':\n sin = 0\n elif sample_input == 'if':\n sin = 1\n elif sample_input == 'acc':\n sin = 2\n elif sample_input == 'cic':\n sin = 3\n else:\n raise Exception(\"Invalid sample_input {}. Valid states are 'adc', 'cic', 'acc' and 'if'\".format(sample_input))\n\n if mux == 'iq':\n m = 0\n elif mux == 'samples':\n m = 1\n elif mux == 'io':\n m = 2\n else:\n raise Exception(\"Invalid mux state {}. Valid states are 'iq' or 'samples'\".format(mux))\n\n return self.to_device(8, [(sin << 2) | m])\n\n def write_pll_reg(self, pll, reg):\n if pll == self.lo:\n cmd = 3\n elif pll == self.source:\n cmd = 4\n else:\n raise ValueError('Unknown PLL')\n b1 = (reg & 0x000000ff) >> 0\n b2 = (reg & 0x0000ff00) >> 8\n b3 = (reg & 0x00ff0000) >> 16\n b4 = (reg & 0xff000000) >> 24\n return self.to_device(cmd, [b4,b3,b2,b1])\n\n def write_pll_io(self, lo_ce, source_ce, lo_rf, source_rf):\n b1 = ((lo_rf&1) << 3) | ((source_rf&1) << 2) | ((source_ce&1) << 1) | ((lo_ce&1) << 0)\n return self.to_device(7, [b1])\n\n def dither_en(self, enable):\n b1 = 0 if enable else 1\n return self.to_device(9, [b1])\n\n def to_device(self, cmd, packet):\n p = ''.join(map(chr, packet))\n l = chr(len(packet))\n w = '\\xaa'+l+chr(cmd)+p\n #print 'Wrote', map(ord,w)\n wrote = self.device.write(w)\n if wrote != len(w):\n raise Exception()\n #time.sleep(1e-3)\n return wrote\n\n def program_sources(self, source_freq, if_freq=2e6):\n source_harm = 1\n lo_harm = 1\n if source_freq > self.max_nonharmonic_freq:\n source_harm = self.source_harmonic\n lo_harm = self.lo_harmonic\n source_freq /= source_harm\n lo_freq = (source_freq * source_harm + if_freq) / lo_harm\n lo_apwr = 1\n source_apwr = 0 if source_harm == 1 else 2\n lo_f = self.lo.freq_to_regs(lo_freq, ref_freq, apwr=lo_apwr)\n self.write_pll(self.lo)\n source_f = self.source.freq_to_regs(source_freq, ref_freq, apwr=source_apwr)\n self.write_pll(self.source)\n return lo_f, source_f\n" } ]