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Repository: capstone-engine/capstone
Branch: next
Commit: 905d2d29514a
Files: 3954
Total size: 94.1 MB
Directory structure:
gitextract_6lvft0ip/
├── .appveyor.yml
├── .clang-format
├── .dockerignore
├── .editorconfig
├── .gitattributes
├── .github/
│ ├── ISSUE_TEMPLATE/
│ │ ├── bug_report_asm.md
│ │ ├── bug_report_general.md
│ │ └── feature_request.md
│ ├── PULL_REQUEST_TEMPLATE.md
│ ├── labeler.yml
│ └── workflows/
│ ├── CITest.yml
│ ├── CrossBuilds.yml
│ ├── auto-sync.yml
│ ├── build-wheels-publish.yml
│ ├── build_release.yml
│ ├── clang-format.yml
│ ├── clang-tidy.yml
│ ├── coverity.yml
│ ├── fuzz.yml
│ └── labeler.yml
├── .gitignore
├── .gitmodules
├── .reuse/
│ ├── dep5
│ └── templates/
│ └── license-template.jinja2
├── BUILDING.md
├── CMakeLists.txt
├── CMakePresets.json
├── COMPILE_MAKE.TXT
├── CONTRIBUTING.md
├── CPackConfig.cmake
├── CPackConfig.txt
├── CREDITS.TXT
├── ChangeLog
├── LEB128.h
├── LICENSES/
│ ├── LICENSE.TXT
│ ├── LICENSE_BSD_3_CLAUSE.txt
│ └── LICENSE_LLVM.TXT
├── MCAsmInfo.h
├── MCDisassembler.h
├── MCFixedLenDisassembler.h
├── MCInst.c
├── MCInst.h
├── MCInstPrinter.c
├── MCInstPrinter.h
├── MCInstrDesc.c
├── MCInstrDesc.h
├── MCRegisterInfo.c
├── MCRegisterInfo.h
├── Makefile
├── Mapping.c
├── Mapping.h
├── MathExtras.h
├── README.md
├── SPONSORS.TXT
├── SStream.c
├── SStream.h
├── arch/
│ ├── AArch64/
│ │ ├── AArch64AddressingModes.h
│ │ ├── AArch64BaseInfo.c
│ │ ├── AArch64BaseInfo.h
│ │ ├── AArch64Disassembler.c
│ │ ├── AArch64DisassemblerExtension.c
│ │ ├── AArch64DisassemblerExtension.h
│ │ ├── AArch64GenAsmWriter.inc
│ │ ├── AArch64GenCSAliasMnemMap.inc
│ │ ├── AArch64GenCSFeatureName.inc
│ │ ├── AArch64GenCSMappingInsn.inc
│ │ ├── AArch64GenCSMappingInsnName.inc
│ │ ├── AArch64GenCSMappingInsnOp.inc
│ │ ├── AArch64GenCSOpGroup.inc
│ │ ├── AArch64GenDisassemblerTables.inc
│ │ ├── AArch64GenInstrInfo.inc
│ │ ├── AArch64GenRegisterInfo.inc
│ │ ├── AArch64GenSubtargetInfo.inc
│ │ ├── AArch64GenSystemOperands.inc
│ │ ├── AArch64GenSystemRegister.inc
│ │ ├── AArch64InstPrinter.c
│ │ ├── AArch64InstPrinter.h
│ │ ├── AArch64Linkage.h
│ │ ├── AArch64Mapping.c
│ │ ├── AArch64Mapping.h
│ │ ├── AArch64Module.c
│ │ └── AArch64Module.h
│ ├── ARC/
│ │ ├── ARCDisassembler.c
│ │ ├── ARCGenAsmWriter.inc
│ │ ├── ARCGenCSInsnEnum.inc
│ │ ├── ARCGenCSMappingInsn.inc
│ │ ├── ARCGenCSMappingInsnName.inc
│ │ ├── ARCGenCSMappingInsnOp.inc
│ │ ├── ARCGenCSOpGroup.inc
│ │ ├── ARCGenCSRegEnum.inc
│ │ ├── ARCGenDisassemblerTables.inc
│ │ ├── ARCGenInstrInfo.inc
│ │ ├── ARCGenRegisterInfo.inc
│ │ ├── ARCGenSubtargetInfo.inc
│ │ ├── ARCInfo.h
│ │ ├── ARCInstPrinter.c
│ │ ├── ARCInstPrinter.h
│ │ ├── ARCLinkage.h
│ │ ├── ARCMapping.c
│ │ ├── ARCMapping.h
│ │ ├── ARCModule.c
│ │ └── ARCModule.h
│ ├── ARM/
│ │ ├── ARMAddressingModes.h
│ │ ├── ARMBaseInfo.c
│ │ ├── ARMBaseInfo.h
│ │ ├── ARMDisassembler.c
│ │ ├── ARMDisassemblerExtension.c
│ │ ├── ARMDisassemblerExtension.h
│ │ ├── ARMFeatureEnum.inc
│ │ ├── ARMGenAsmWriter.inc
│ │ ├── ARMGenCSAliasMnemMap.inc
│ │ ├── ARMGenCSFeatureName.inc
│ │ ├── ARMGenCSMappingInsn.inc
│ │ ├── ARMGenCSMappingInsnName.inc
│ │ ├── ARMGenCSMappingInsnOp.inc
│ │ ├── ARMGenCSOpGroup.inc
│ │ ├── ARMGenDisassemblerTables.inc
│ │ ├── ARMGenInstrInfo.inc
│ │ ├── ARMGenRegisterInfo.inc
│ │ ├── ARMGenSubtargetInfo.inc
│ │ ├── ARMGenSystemRegister.inc
│ │ ├── ARMInsnEnum.inc
│ │ ├── ARMInstPrinter.c
│ │ ├── ARMInstPrinter.h
│ │ ├── ARMLinkage.h
│ │ ├── ARMMapping.c
│ │ ├── ARMMapping.h
│ │ ├── ARMModule.c
│ │ └── ARMModule.h
│ ├── Alpha/
│ │ ├── AlphaDisassembler.c
│ │ ├── AlphaDisassembler.h
│ │ ├── AlphaGenAsmWriter.inc
│ │ ├── AlphaGenCSMappingInsn.inc
│ │ ├── AlphaGenCSMappingInsnName.inc
│ │ ├── AlphaGenCSMappingInsnOp.inc
│ │ ├── AlphaGenCSOpGroup.inc
│ │ ├── AlphaGenDisassemblerTables.inc
│ │ ├── AlphaGenInstrInfo.inc
│ │ ├── AlphaGenRegisterInfo.inc
│ │ ├── AlphaGenSubtargetInfo.inc
│ │ ├── AlphaInstPrinter.c
│ │ ├── AlphaLinkage.h
│ │ ├── AlphaMapping.c
│ │ ├── AlphaMapping.h
│ │ ├── AlphaModule.c
│ │ └── AlphaModule.h
│ ├── BPF/
│ │ ├── BPFConstants.h
│ │ ├── BPFDisassembler.c
│ │ ├── BPFDisassembler.h
│ │ ├── BPFInstPrinter.c
│ │ ├── BPFInstPrinter.h
│ │ ├── BPFMapping.c
│ │ ├── BPFMapping.h
│ │ ├── BPFModule.c
│ │ └── BPFModule.h
│ ├── EVM/
│ │ ├── EVMDisassembler.c
│ │ ├── EVMDisassembler.h
│ │ ├── EVMInstPrinter.c
│ │ ├── EVMInstPrinter.h
│ │ ├── EVMMapping.c
│ │ ├── EVMMapping.h
│ │ ├── EVMMappingInsn.inc
│ │ ├── EVMModule.c
│ │ └── EVMModule.h
│ ├── HPPA/
│ │ ├── HPPAConstants.h
│ │ ├── HPPADisassembler.c
│ │ ├── HPPADisassembler.h
│ │ ├── HPPAInstPrinter.c
│ │ ├── HPPAInstPrinter.h
│ │ ├── HPPAMapping.c
│ │ ├── HPPAMapping.h
│ │ ├── HPPAModule.c
│ │ └── HPPAModule.h
│ ├── LoongArch/
│ │ ├── LoongArchDisassembler.c
│ │ ├── LoongArchDisassemblerExtension.c
│ │ ├── LoongArchDisassemblerExtension.h
│ │ ├── LoongArchGenAsmWriter.inc
│ │ ├── LoongArchGenCSAliasEnum.inc
│ │ ├── LoongArchGenCSAliasMnemMap.inc
│ │ ├── LoongArchGenCSFeatureName.inc
│ │ ├── LoongArchGenCSMappingInsn.inc
│ │ ├── LoongArchGenCSMappingInsnName.inc
│ │ ├── LoongArchGenCSMappingInsnOp.inc
│ │ ├── LoongArchGenCSOpGroup.inc
│ │ ├── LoongArchGenDisassemblerTables.inc
│ │ ├── LoongArchGenInstrInfo.inc
│ │ ├── LoongArchGenRegisterInfo.inc
│ │ ├── LoongArchGenSubtargetInfo.inc
│ │ ├── LoongArchInstPrinter.c
│ │ ├── LoongArchInstPrinter.h
│ │ ├── LoongArchLinkage.h
│ │ ├── LoongArchMapping.c
│ │ ├── LoongArchMapping.h
│ │ ├── LoongArchModule.c
│ │ └── LoongArchModule.h
│ ├── M680X/
│ │ ├── M680XDisassembler.c
│ │ ├── M680XDisassembler.h
│ │ ├── M680XDisassemblerInternals.h
│ │ ├── M680XInstPrinter.c
│ │ ├── M680XInstPrinter.h
│ │ ├── M680XModule.c
│ │ ├── M680XModule.h
│ │ ├── cpu12.inc
│ │ ├── hcs08.inc
│ │ ├── hd6301.inc
│ │ ├── hd6309.inc
│ │ ├── insn_props.inc
│ │ ├── m6800.inc
│ │ ├── m6801.inc
│ │ ├── m6805.inc
│ │ ├── m6808.inc
│ │ ├── m6809.inc
│ │ ├── m6811.inc
│ │ └── rs08.inc
│ ├── M68K/
│ │ ├── M68KDisassembler.c
│ │ ├── M68KDisassembler.h
│ │ ├── M68KInstPrinter.c
│ │ ├── M68KInstPrinter.h
│ │ ├── M68KInstructionTable.inc
│ │ ├── M68KModule.c
│ │ └── M68KModule.h
│ ├── MOS65XX/
│ │ ├── MOS65XXDisassembler.c
│ │ ├── MOS65XXDisassembler.h
│ │ ├── MOS65XXDisassemblerInternals.h
│ │ ├── MOS65XXModule.c
│ │ ├── MOS65XXModule.h
│ │ ├── instruction_info.inc
│ │ ├── m6502.inc
│ │ ├── m65816.inc
│ │ ├── m65c02.inc
│ │ └── mw65c02.inc
│ ├── Mips/
│ │ ├── MipsCP0RegisterMap.h
│ │ ├── MipsDisassembler.c
│ │ ├── MipsDisassembler.h
│ │ ├── MipsGenAsmWriter.inc
│ │ ├── MipsGenCSAliasEnum.inc
│ │ ├── MipsGenCSAliasMnemMap.inc
│ │ ├── MipsGenCSFeatureEnum.inc
│ │ ├── MipsGenCSFeatureName.inc
│ │ ├── MipsGenCSInsnEnum.inc
│ │ ├── MipsGenCSMappingInsn.inc
│ │ ├── MipsGenCSMappingInsnName.inc
│ │ ├── MipsGenCSMappingInsnOp.inc
│ │ ├── MipsGenCSOpGroup.inc
│ │ ├── MipsGenCSRegEnum.inc
│ │ ├── MipsGenDisassemblerTables.inc
│ │ ├── MipsGenInstrInfo.inc
│ │ ├── MipsGenRegisterInfo.inc
│ │ ├── MipsGenSubtargetInfo.inc
│ │ ├── MipsInstPrinter.c
│ │ ├── MipsInstPrinter.h
│ │ ├── MipsLinkage.h
│ │ ├── MipsMapping.c
│ │ ├── MipsMapping.h
│ │ ├── MipsMappingInsn.inc
│ │ ├── MipsModule.c
│ │ └── MipsModule.h
│ ├── PowerPC/
│ │ ├── PPCDisassembler.c
│ │ ├── PPCGenAsmWriter.inc
│ │ ├── PPCGenCSAliasMnemMap.inc
│ │ ├── PPCGenCSFeatureName.inc
│ │ ├── PPCGenCSMappingInsn.inc
│ │ ├── PPCGenCSMappingInsnName.inc
│ │ ├── PPCGenCSMappingInsnOp.inc
│ │ ├── PPCGenCSOpGroup.inc
│ │ ├── PPCGenDisassemblerTables.inc
│ │ ├── PPCGenInstrInfo.inc
│ │ ├── PPCGenRegisterInfo.inc
│ │ ├── PPCGenSubtargetInfo.inc
│ │ ├── PPCInstPrinter.c
│ │ ├── PPCInstrInfo.h
│ │ ├── PPCLinkage.h
│ │ ├── PPCMCTargetDesc.h
│ │ ├── PPCMapping.c
│ │ ├── PPCMapping.h
│ │ ├── PPCModule.c
│ │ ├── PPCModule.h
│ │ ├── PPCPredicates.h
│ │ └── PPCRegisterInfo.h
│ ├── RISCV/
│ │ ├── RISCVBaseInfo.c
│ │ ├── RISCVBaseInfo.h
│ │ ├── RISCVDisassembler.c
│ │ ├── RISCVDisassembler.h
│ │ ├── RISCVDisassemblerExtension.c
│ │ ├── RISCVDisassemblerExtension.h
│ │ ├── RISCVGenAsmWriter.inc
│ │ ├── RISCVGenCSAliasEnum.inc
│ │ ├── RISCVGenCSAliasMnemMap.inc
│ │ ├── RISCVGenCSFeatureEnum.inc
│ │ ├── RISCVGenCSFeatureName.inc
│ │ ├── RISCVGenCSInsnEnum.inc
│ │ ├── RISCVGenCSMappingInsn.inc
│ │ ├── RISCVGenCSMappingInsnName.inc
│ │ ├── RISCVGenCSMappingInsnOp.inc
│ │ ├── RISCVGenCSOpGroup.inc
│ │ ├── RISCVGenCSRegEnum.inc
│ │ ├── RISCVGenCSSystemOperandsEnum.inc
│ │ ├── RISCVGenCompressedInstructionsInfo.inc
│ │ ├── RISCVGenDisassemblerTables.inc
│ │ ├── RISCVGenInstrInfo.inc
│ │ ├── RISCVGenRegisterInfo.inc
│ │ ├── RISCVGenSubtargetInfo.inc
│ │ ├── RISCVGenSystemOperands.inc
│ │ ├── RISCVInstPrinter.c
│ │ ├── RISCVInstPrinter.h
│ │ ├── RISCVLinkage.h
│ │ ├── RISCVMapping.c
│ │ ├── RISCVMapping.h
│ │ ├── RISCVModule.c
│ │ └── RISCVModule.h
│ ├── SH/
│ │ ├── SHDisassembler.c
│ │ ├── SHDisassembler.h
│ │ ├── SHInsnTable.inc
│ │ ├── SHInstPrinter.c
│ │ ├── SHInstPrinter.h
│ │ ├── SHModule.c
│ │ ├── SHModule.h
│ │ └── mktable.rb
│ ├── Sparc/
│ │ ├── SparcDisassembler.c
│ │ ├── SparcDisassemblerExtension.c
│ │ ├── SparcDisassemblerExtension.h
│ │ ├── SparcGenAsmWriter.inc
│ │ ├── SparcGenCSAliasMnemMap.inc
│ │ ├── SparcGenCSFeatureName.inc
│ │ ├── SparcGenCSMappingInsn.inc
│ │ ├── SparcGenCSMappingInsnName.inc
│ │ ├── SparcGenCSMappingInsnOp.inc
│ │ ├── SparcGenCSOpGroup.inc
│ │ ├── SparcGenDisassemblerTables.inc
│ │ ├── SparcGenInstrInfo.inc
│ │ ├── SparcGenRegisterInfo.inc
│ │ ├── SparcGenSubtargetInfo.inc
│ │ ├── SparcGenSystemOperands.inc
│ │ ├── SparcInstPrinter.c
│ │ ├── SparcInstPrinter.h
│ │ ├── SparcLinkage.h
│ │ ├── SparcMCTargetDesc.h
│ │ ├── SparcMapping.c
│ │ ├── SparcMapping.h
│ │ ├── SparcModule.c
│ │ └── SparcModule.h
│ ├── SystemZ/
│ │ ├── SystemZDisassembler.c
│ │ ├── SystemZDisassemblerExtension.c
│ │ ├── SystemZDisassemblerExtension.h
│ │ ├── SystemZGenAsmWriter.inc
│ │ ├── SystemZGenCSAliasMnemMap.inc
│ │ ├── SystemZGenCSFeatureName.inc
│ │ ├── SystemZGenCSMappingInsn.inc
│ │ ├── SystemZGenCSMappingInsnName.inc
│ │ ├── SystemZGenCSMappingInsnOp.inc
│ │ ├── SystemZGenCSOpGroup.inc
│ │ ├── SystemZGenDisassemblerTables.inc
│ │ ├── SystemZGenInstrInfo.inc
│ │ ├── SystemZGenRegisterInfo.inc
│ │ ├── SystemZGenSubtargetInfo.inc
│ │ ├── SystemZInstPrinter.c
│ │ ├── SystemZInstPrinter.h
│ │ ├── SystemZLinkage.h
│ │ ├── SystemZMCTargetDesc.c
│ │ ├── SystemZMCTargetDesc.h
│ │ ├── SystemZMapping.c
│ │ ├── SystemZMapping.h
│ │ ├── SystemZModule.c
│ │ └── SystemZModule.h
│ ├── TMS320C64x/
│ │ ├── TMS320C64xDisassembler.c
│ │ ├── TMS320C64xDisassembler.h
│ │ ├── TMS320C64xGenAsmWriter.inc
│ │ ├── TMS320C64xGenDisassemblerTables.inc
│ │ ├── TMS320C64xGenInstrInfo.inc
│ │ ├── TMS320C64xGenRegisterInfo.inc
│ │ ├── TMS320C64xInstPrinter.c
│ │ ├── TMS320C64xInstPrinter.h
│ │ ├── TMS320C64xMapping.c
│ │ ├── TMS320C64xMapping.h
│ │ ├── TMS320C64xModule.c
│ │ └── TMS320C64xModule.h
│ ├── TriCore/
│ │ ├── TriCoreDisassembler.c
│ │ ├── TriCoreDisassembler.h
│ │ ├── TriCoreGenAsmWriter.inc
│ │ ├── TriCoreGenCSFeatureName.inc
│ │ ├── TriCoreGenCSMappingInsn.inc
│ │ ├── TriCoreGenCSMappingInsnName.inc
│ │ ├── TriCoreGenCSMappingInsnOp.inc
│ │ ├── TriCoreGenCSOpGroup.inc
│ │ ├── TriCoreGenDisassemblerTables.inc
│ │ ├── TriCoreGenInstrInfo.inc
│ │ ├── TriCoreGenRegisterInfo.inc
│ │ ├── TriCoreGenSubtargetInfo.inc
│ │ ├── TriCoreInstPrinter.c
│ │ ├── TriCoreLinkage.h
│ │ ├── TriCoreMapping.c
│ │ ├── TriCoreMapping.h
│ │ ├── TriCoreModule.c
│ │ └── TriCoreModule.h
│ ├── WASM/
│ │ ├── WASMDisassembler.c
│ │ ├── WASMDisassembler.h
│ │ ├── WASMInstPrinter.c
│ │ ├── WASMInstPrinter.h
│ │ ├── WASMMapping.c
│ │ ├── WASMMapping.h
│ │ ├── WASMModule.c
│ │ └── WASMModule.h
│ ├── X86/
│ │ ├── X86ATTInstPrinter.c
│ │ ├── X86BaseInfo.h
│ │ ├── X86Disassembler.c
│ │ ├── X86Disassembler.h
│ │ ├── X86DisassemblerDecoder.c
│ │ ├── X86DisassemblerDecoder.h
│ │ ├── X86DisassemblerDecoderCommon.h
│ │ ├── X86GenAsmWriter.inc
│ │ ├── X86GenAsmWriter1.inc
│ │ ├── X86GenAsmWriter1_reduce.inc
│ │ ├── X86GenAsmWriter_reduce.inc
│ │ ├── X86GenDisassemblerTables.inc
│ │ ├── X86GenDisassemblerTables2.inc
│ │ ├── X86GenDisassemblerTables_reduce.inc
│ │ ├── X86GenDisassemblerTables_reduce2.inc
│ │ ├── X86GenInstrInfo.inc
│ │ ├── X86GenInstrInfo_reduce.inc
│ │ ├── X86GenRegisterInfo.inc
│ │ ├── X86GenRegisterName.inc
│ │ ├── X86GenRegisterName1.inc
│ │ ├── X86ImmSize.inc
│ │ ├── X86InstPrinter.h
│ │ ├── X86InstPrinterCommon.c
│ │ ├── X86InstPrinterCommon.h
│ │ ├── X86IntelInstPrinter.c
│ │ ├── X86Lookup16.inc
│ │ ├── X86Lookup16_reduce.inc
│ │ ├── X86Mapping.c
│ │ ├── X86Mapping.h
│ │ ├── X86MappingInsn.inc
│ │ ├── X86MappingInsnName.inc
│ │ ├── X86MappingInsnName_reduce.inc
│ │ ├── X86MappingInsnOp.inc
│ │ ├── X86MappingInsnOp_reduce.inc
│ │ ├── X86MappingInsn_reduce.inc
│ │ ├── X86MappingReg.inc
│ │ ├── X86Module.c
│ │ └── X86Module.h
│ ├── XCore/
│ │ ├── XCoreDisassembler.c
│ │ ├── XCoreDisassembler.h
│ │ ├── XCoreGenAsmWriter.inc
│ │ ├── XCoreGenDisassemblerTables.inc
│ │ ├── XCoreGenInstrInfo.inc
│ │ ├── XCoreGenRegisterInfo.inc
│ │ ├── XCoreInstPrinter.c
│ │ ├── XCoreInstPrinter.h
│ │ ├── XCoreMapping.c
│ │ ├── XCoreMapping.h
│ │ ├── XCoreMappingInsn.inc
│ │ ├── XCoreModule.c
│ │ └── XCoreModule.h
│ └── Xtensa/
│ ├── XtensaDisassembler.c
│ ├── XtensaDisassembler.h
│ ├── XtensaGenAsmWriter.inc
│ ├── XtensaGenCSFeatureName.inc
│ ├── XtensaGenCSMappingInsn.inc
│ ├── XtensaGenCSMappingInsnName.inc
│ ├── XtensaGenCSMappingInsnOp.inc
│ ├── XtensaGenCSOpGroup.inc
│ ├── XtensaGenDisassemblerTables.inc
│ ├── XtensaGenInstrInfo.inc
│ ├── XtensaGenRegisterInfo.inc
│ ├── XtensaGenSubtargetInfo.inc
│ ├── XtensaInstPrinter.c
│ ├── XtensaInstPrinter.h
│ ├── XtensaMapping.c
│ ├── XtensaMapping.h
│ ├── XtensaModule.c
│ ├── XtensaModule.h
│ └── priv.h
├── bindings/
│ ├── README.md
│ ├── const_generator.py
│ ├── java/
│ │ ├── .gitignore
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── TestArm.java
│ │ ├── TestArm64.java
│ │ ├── TestBasic.java
│ │ ├── TestM680x.java
│ │ ├── TestMips.java
│ │ ├── TestPpc.java
│ │ ├── TestSparc.java
│ │ ├── TestSystemz.java
│ │ ├── TestX86.java
│ │ ├── TestXcore.java
│ │ ├── capstone/
│ │ │ ├── .gitignore
│ │ │ ├── Arm.java
│ │ │ ├── Arm64.java
│ │ │ ├── Arm64_const.java
│ │ │ ├── Arm_const.java
│ │ │ ├── Capstone.java
│ │ │ ├── Evm_const.java
│ │ │ ├── M680x.java
│ │ │ ├── M680x_const.java
│ │ │ ├── M68k_const.java
│ │ │ ├── Mips.java
│ │ │ ├── Mips_const.java
│ │ │ ├── Ppc.java
│ │ │ ├── Ppc_const.java
│ │ │ ├── Sparc.java
│ │ │ ├── Sparc_const.java
│ │ │ ├── Systemz.java
│ │ │ ├── Systemz_const.java
│ │ │ ├── Sysz_const.java
│ │ │ ├── TMS320C64x_const.java
│ │ │ ├── Wasm_const.java
│ │ │ ├── X86.java
│ │ │ ├── X86_const.java
│ │ │ ├── Xcore.java
│ │ │ └── Xcore_const.java
│ │ └── run.sh
│ ├── ocaml/
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── arm.ml
│ │ ├── arm64.ml
│ │ ├── arm64_const.ml
│ │ ├── arm_const.ml
│ │ ├── capstone.ml
│ │ ├── evm_const.ml
│ │ ├── m680x.ml
│ │ ├── m680x_const.ml
│ │ ├── m68k_const.ml
│ │ ├── mips.ml
│ │ ├── mips_const.ml
│ │ ├── ocaml.c
│ │ ├── ppc.ml
│ │ ├── ppc_const.ml
│ │ ├── sparc.ml
│ │ ├── sparc_const.ml
│ │ ├── systemz.ml
│ │ ├── systemz_const.ml
│ │ ├── sysz_const.ml
│ │ ├── test_arm.ml
│ │ ├── test_arm64.ml
│ │ ├── test_basic.ml
│ │ ├── test_detail.ml
│ │ ├── test_m680x.ml
│ │ ├── test_mips.ml
│ │ ├── test_ppc.ml
│ │ ├── test_sparc.ml
│ │ ├── test_systemz.ml
│ │ ├── test_x86.ml
│ │ ├── test_xcore.ml
│ │ ├── tms320c64x_const.ml
│ │ ├── wasm_const.ml
│ │ ├── x86.ml
│ │ ├── x86_const.ml
│ │ ├── xcore.ml
│ │ └── xcore_const.ml
│ ├── powershell/
│ │ ├── Capstone/
│ │ │ ├── Capstone.Format.ps1xml
│ │ │ ├── Capstone.psd1
│ │ │ ├── Capstone.psm1
│ │ │ └── Lib/
│ │ │ └── Capstone/
│ │ │ └── .gitignore
│ │ └── README.md
│ ├── python/
│ │ ├── .gitignore
│ │ ├── BUILDING.md
│ │ ├── LICENSE.TXT
│ │ ├── MANIFEST.in
│ │ ├── README.md
│ │ ├── capstone/
│ │ │ ├── aarch64.py
│ │ │ ├── aarch64_const.py
│ │ │ ├── alpha.py
│ │ │ ├── alpha_const.py
│ │ │ ├── arc.py
│ │ │ ├── arc_const.py
│ │ │ ├── arm.py
│ │ │ ├── arm64.py
│ │ │ ├── arm64_const.py
│ │ │ ├── arm_const.py
│ │ │ ├── bpf.py
│ │ │ ├── bpf_const.py
│ │ │ ├── evm.py
│ │ │ ├── evm_const.py
│ │ │ ├── hppa.py
│ │ │ ├── hppa_const.py
│ │ │ ├── loongarch.py
│ │ │ ├── loongarch_const.py
│ │ │ ├── m680x.py
│ │ │ ├── m680x_const.py
│ │ │ ├── m68k.py
│ │ │ ├── m68k_const.py
│ │ │ ├── mips.py
│ │ │ ├── mips_const.py
│ │ │ ├── mos65xx.py
│ │ │ ├── mos65xx_const.py
│ │ │ ├── ppc.py
│ │ │ ├── ppc_const.py
│ │ │ ├── riscv.py
│ │ │ ├── riscv_const.py
│ │ │ ├── sh.py
│ │ │ ├── sh_const.py
│ │ │ ├── sparc.py
│ │ │ ├── sparc_const.py
│ │ │ ├── systemz.py
│ │ │ ├── systemz_const.py
│ │ │ ├── sysz_const.py
│ │ │ ├── tms320c64x.py
│ │ │ ├── tms320c64x_const.py
│ │ │ ├── tricore.py
│ │ │ ├── tricore_const.py
│ │ │ ├── wasm.py
│ │ │ ├── wasm_const.py
│ │ │ ├── x86.py
│ │ │ ├── x86_const.py
│ │ │ ├── xcore.py
│ │ │ ├── xcore_const.py
│ │ │ ├── xtensa.py
│ │ │ └── xtensa_const.py
│ │ ├── cstest_py/
│ │ │ ├── README.md
│ │ │ ├── pyproject.toml
│ │ │ └── src/
│ │ │ └── cstest_py/
│ │ │ ├── compare.py
│ │ │ ├── cs_modes.py
│ │ │ ├── cstest.py
│ │ │ └── details.py
│ │ ├── prebuilt/
│ │ │ └── .gitkeep
│ │ ├── pyproject.toml
│ │ ├── setup.py
│ │ └── tests/
│ │ ├── test_all.py
│ │ ├── test_compatibility_layer.py
│ │ ├── test_customized_mnem.py
│ │ ├── test_iter.py
│ │ ├── test_lite.py
│ │ └── test_skipdata.py
│ ├── stdout_cmp.py
│ └── vb6/
│ ├── Apache_2.0_License.txt
│ ├── CDisassembler.cls
│ ├── CInstDetails.cls
│ ├── CInstruction.cls
│ ├── CX86Inst.cls
│ ├── CX86OpMem.cls
│ ├── CX86Operand.cls
│ ├── Form1.frm
│ ├── Form1.frx
│ ├── Module1.bas
│ ├── Project1.vbp
│ ├── Project1.vbw
│ ├── README.md
│ ├── mMisc.bas
│ ├── mx86.bas
│ ├── vbCapstone.cpp
│ ├── vbCapstone.sln
│ └── vbCapstone.vcproj
├── capstone-config.cmake.in
├── capstone.pc.in
├── cmake.sh
├── cmake_uninstall.cmake.in
├── config.mk
├── contrib/
│ ├── README.md
│ ├── cs_driver/
│ │ ├── README.md
│ │ ├── cs_driver/
│ │ │ ├── cs_driver.c
│ │ │ ├── cs_driver.vcxproj
│ │ │ └── cs_driver.vcxproj.filters
│ │ └── cs_driver.sln
│ ├── m68k_instruction_tbl_gen/
│ │ ├── M68KInstructionTblGen.c
│ │ └── Makefile
│ ├── objdump/
│ │ └── objdump-m68k.py
│ ├── riscv_update/
│ │ ├── 0001-capstone-riscv-patchs.patch
│ │ ├── 0002-update-TableGen-for-generate-RISCV-port-inc-for-CAPS.patch
│ │ ├── 0003-clear-old-patchs.patch
│ │ ├── 0004-fix-riscv-registerclass-array-of-genregisterinfo.patch
│ │ ├── 0005-fix-riscv-registerclass-array-of-genregisterinfo.patch
│ │ ├── 0006-fix-output-TAB-for-riscv-capstone.patch
│ │ ├── 0007-fix-riscv-alias-inst-output-useless-newline.patch
│ │ ├── 0008-fix-riscv-inst-output-more-formal.patch
│ │ ├── 0009-fix-riscv-asmwriter-variable-declaration-place.patch
│ │ ├── 0010-fix-riscvgenasmwiter.inc-memory-leak.patch
│ │ ├── 0011-using-static-array-contain-temp-string-for-riscv-asm.patch
│ │ └── README.md
│ └── windows_kernel/
│ ├── README.md
│ ├── libc.cpp
│ └── libc.h
├── cross_configs/
│ ├── README.md
│ ├── linux_arm_fedora42_musl.cmake
│ ├── linux_arm_ubuntu24.cmake
│ ├── linux_mips64_ubuntu24.cmake
│ ├── linux_mips_ubuntu24.cmake
│ ├── linux_ppc64_ubuntu24.cmake
│ ├── linux_s390x_fedora42.cmake
│ ├── linux_s390x_ubuntu24.cmake
│ ├── linux_x86.cmake
│ └── windows_i686_ubuntu24.cmake
├── cs.c
├── cs_priv.h
├── cs_simple_types.h
├── cstool/
│ ├── Makefile
│ ├── README.md
│ ├── cstool.c
│ ├── cstool.h
│ ├── cstool_aarch64.c
│ ├── cstool_alpha.c
│ ├── cstool_arc.c
│ ├── cstool_arm.c
│ ├── cstool_bpf.c
│ ├── cstool_evm.c
│ ├── cstool_hppa.c
│ ├── cstool_loongarch.c
│ ├── cstool_m680x.c
│ ├── cstool_m68k.c
│ ├── cstool_mips.c
│ ├── cstool_mos65xx.c
│ ├── cstool_powerpc.c
│ ├── cstool_riscv.c
│ ├── cstool_sh.c
│ ├── cstool_sparc.c
│ ├── cstool_systemz.c
│ ├── cstool_tms320c64x.c
│ ├── cstool_tricore.c
│ ├── cstool_wasm.c
│ ├── cstool_x86.c
│ ├── cstool_xcore.c
│ ├── cstool_xtensa.c
│ ├── getopt.c
│ └── getopt.h
├── docs/
│ ├── ARCHITECTURE.md
│ ├── README.md
│ └── cs_v6_release_guide.md
├── ext_patches/
│ ├── README.md
│ └── libcyaml/
│ └── CMakeLists.txt
├── functions.mk
├── include/
│ ├── capstone/
│ │ ├── aarch64.h
│ │ ├── alpha.h
│ │ ├── arc.h
│ │ ├── arm.h
│ │ ├── arm64.h
│ │ ├── bpf.h
│ │ ├── capstone.h
│ │ ├── cs_operand.h
│ │ ├── evm.h
│ │ ├── hppa.h
│ │ ├── loongarch.h
│ │ ├── m680x.h
│ │ ├── m68k.h
│ │ ├── mips.h
│ │ ├── mos65xx.h
│ │ ├── platform.h
│ │ ├── ppc.h
│ │ ├── riscv.h
│ │ ├── sh.h
│ │ ├── sparc.h
│ │ ├── systemz.h
│ │ ├── systemz_compatibility.h
│ │ ├── tms320c64x.h
│ │ ├── tricore.h
│ │ ├── wasm.h
│ │ ├── x86.h
│ │ ├── xcore.h
│ │ └── xtensa.h
│ ├── platform.h
│ └── windowsce/
│ ├── intrin.h
│ └── stdint.h
├── make.sh
├── packages/
│ ├── deb/
│ │ └── triggers
│ ├── freebsd/
│ │ └── ports/
│ │ └── devel/
│ │ └── capstone/
│ │ ├── Makefile
│ │ ├── pkg-descr
│ │ └── pkg-plist
│ ├── macports/
│ │ └── devel/
│ │ └── capstone/
│ │ ├── Portfile
│ │ └── files/
│ │ └── patch-Makefile.diff
│ └── rpm/
│ └── postinstall.sh
├── pkgconfig.mk
├── suite/
│ ├── MC/
│ │ ├── AArch64/
│ │ │ ├── a64-ignored-fields.txt.cs
│ │ │ ├── add.s.cs
│ │ │ ├── addqv.s.cs
│ │ │ ├── andqv.s.cs
│ │ │ ├── arm64-adr.s.cs
│ │ │ ├── arm64-advsimd.s.cs
│ │ │ ├── arm64-advsimd.txt.cs
│ │ │ ├── arm64-aliases.s.cs
│ │ │ ├── arm64-arithmetic-encoding.s.cs
│ │ │ ├── arm64-arithmetic.txt.cs
│ │ │ ├── arm64-basic-a64-instructions.s.cs
│ │ │ ├── arm64-bitfield-encoding.s.cs
│ │ │ ├── arm64-branch-encoding.s.cs
│ │ │ ├── arm64-branch.txt.cs
│ │ │ ├── arm64-compact-unwind-fallback.s.cs
│ │ │ ├── arm64-crc32.txt.cs
│ │ │ ├── arm64-crypto.s.cs
│ │ │ ├── arm64-fp-encoding.s.cs
│ │ │ ├── arm64-invalid-logical.txt.cs
│ │ │ ├── arm64-leaf-compact-unwind.s.cs
│ │ │ ├── arm64-logical-encoding.s.cs
│ │ │ ├── arm64-memory.s.cs
│ │ │ ├── arm64-nv-cond.s.cs
│ │ │ ├── arm64-optional-hash.s.cs
│ │ │ ├── arm64-simd-ldst.s.cs
│ │ │ ├── arm64-spsel-sysreg.s.cs
│ │ │ ├── arm64-system-encoding.s.cs
│ │ │ ├── arm64-system.txt.cs
│ │ │ ├── arm64-target-specific-sysreg.s.cs
│ │ │ ├── arm64-vector-lists.s.cs
│ │ │ ├── arm64-verbose-vector-case.s.cs
│ │ │ ├── arm64e.s.cs
│ │ │ ├── armv8.1a-atomic.s.cs
│ │ │ ├── armv8.1a-atomic.txt.cs
│ │ │ ├── armv8.1a-lor.s.cs
│ │ │ ├── armv8.1a-lor.txt.cs
│ │ │ ├── armv8.1a-lse.s.cs
│ │ │ ├── armv8.1a-pan.s.cs
│ │ │ ├── armv8.1a-pan.txt.cs
│ │ │ ├── armv8.1a-rdma.s.cs
│ │ │ ├── armv8.1a-rdma.txt.cs
│ │ │ ├── armv8.1a-vhe.s.cs
│ │ │ ├── armv8.1a-vhe.txt.cs
│ │ │ ├── armv8.2a-at.s.cs
│ │ │ ├── armv8.2a-at.txt.cs
│ │ │ ├── armv8.2a-crypto-apple.s.cs
│ │ │ ├── armv8.2a-crypto.s.cs
│ │ │ ├── armv8.2a-dotprod.s.cs
│ │ │ ├── armv8.2a-mmfr2.txt.cs
│ │ │ ├── armv8.2a-persistent-memory.s.cs
│ │ │ ├── armv8.2a-persistent-memory.txt.cs
│ │ │ ├── armv8.2a-statistical-profiling.s.cs
│ │ │ ├── armv8.2a-statistical-profiling.txt.cs
│ │ │ ├── armv8.2a-uao.s.cs
│ │ │ ├── armv8.2a-uao.txt.cs
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.s.cs
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.txt.cs
│ │ │ ├── armv8.3a-complex.s.cs
│ │ │ ├── armv8.3a-complex.txt.cs
│ │ │ ├── armv8.3a-complex_nofp16.s.cs
│ │ │ ├── armv8.3a-js.s.cs
│ │ │ ├── armv8.3a-js.txt.cs
│ │ │ ├── armv8.3a-pauth.s.cs
│ │ │ ├── armv8.3a-rcpc.s.cs
│ │ │ ├── armv8.3a-rcpc.txt.cs
│ │ │ ├── armv8.3a-signed-pointer.s.cs
│ │ │ ├── armv8.3a-signed-pointer.txt.cs
│ │ │ ├── armv8.4a-actmon.s.cs
│ │ │ ├── armv8.4a-actmon.txt.cs
│ │ │ ├── armv8.4a-dit.s.cs
│ │ │ ├── armv8.4a-dit.txt.cs
│ │ │ ├── armv8.4a-flag.s.cs
│ │ │ ├── armv8.4a-flag.txt.cs
│ │ │ ├── armv8.4a-flagm.s.cs
│ │ │ ├── armv8.4a-ldst.s.cs
│ │ │ ├── armv8.4a-ldst.txt.cs
│ │ │ ├── armv8.4a-mpam.s.cs
│ │ │ ├── armv8.4a-mpam.txt.cs
│ │ │ ├── armv8.4a-ras.s.cs
│ │ │ ├── armv8.4a-tlb.s.cs
│ │ │ ├── armv8.4a-trace.s.cs
│ │ │ ├── armv8.4a-trace.txt.cs
│ │ │ ├── armv8.4a-virt.s.cs
│ │ │ ├── armv8.4a-vncr.s.cs
│ │ │ ├── armv8.4a-vncr.txt.cs
│ │ │ ├── armv8.5a-altnzcv.s.cs
│ │ │ ├── armv8.5a-bti.s.cs
│ │ │ ├── armv8.5a-dataproc.txt.cs
│ │ │ ├── armv8.5a-frint.s.cs
│ │ │ ├── armv8.5a-mte.s.cs
│ │ │ ├── armv8.5a-mte.txt.cs
│ │ │ ├── armv8.5a-persistent-memory.s.cs
│ │ │ ├── armv8.5a-persistent-memory.txt.cs
│ │ │ ├── armv8.5a-predres.s.cs
│ │ │ ├── armv8.5a-rand.s.cs
│ │ │ ├── armv8.5a-rand.txt.cs
│ │ │ ├── armv8.5a-sb.s.cs
│ │ │ ├── armv8.5a-specrestrict.s.cs
│ │ │ ├── armv8.5a-ssbs.s.cs
│ │ │ ├── armv8.5a-ssbs.txt.cs
│ │ │ ├── armv8.6a-amvs.s.cs
│ │ │ ├── armv8.6a-bf16.s.cs
│ │ │ ├── armv8.6a-bf16.txt.cs
│ │ │ ├── armv8.6a-ecv.s.cs
│ │ │ ├── armv8.6a-ecv.txt.cs
│ │ │ ├── armv8.6a-fgt.s.cs
│ │ │ ├── armv8.6a-fgt.txt.cs
│ │ │ ├── armv8.6a-simd-matmul.s.cs
│ │ │ ├── armv8.6a-simd-matmul.txt.cs
│ │ │ ├── armv8.7a-hcx.s.cs
│ │ │ ├── armv8.7a-hcx.txt.cs
│ │ │ ├── armv8.7a-ls64.s.cs
│ │ │ ├── armv8.7a-ls64.txt.cs
│ │ │ ├── armv8.7a-wfxt.s.cs
│ │ │ ├── armv8.7a-wfxt.txt.cs
│ │ │ ├── armv8.7a-xs.s.cs
│ │ │ ├── armv8.7a-xs.txt.cs
│ │ │ ├── armv8.8a-hbc.txt.cs
│ │ │ ├── armv8.8a-mops.s.cs
│ │ │ ├── armv8.8a-mops.txt.cs
│ │ │ ├── armv8.8a-nmi.s.cs
│ │ │ ├── armv8.8a-nmi.txt.cs
│ │ │ ├── armv8.9a-ats1a.s.cs
│ │ │ ├── armv8.9a-ats1a.txt.cs
│ │ │ ├── armv8.9a-clrbhb.s.cs
│ │ │ ├── armv8.9a-clrbhb.txt.cs
│ │ │ ├── armv8.9a-cssc.s.cs
│ │ │ ├── armv8.9a-cssc.txt.cs
│ │ │ ├── armv8.9a-debug-pmu.s.cs
│ │ │ ├── armv8.9a-debug-pmu.txt.cs
│ │ │ ├── armv8.9a-lrcpc3.s.cs
│ │ │ ├── armv8.9a-lrcpc3.txt.cs
│ │ │ ├── armv8.9a-pfar.s.cs
│ │ │ ├── armv8.9a-pfar.txt.cs
│ │ │ ├── armv8.9a-prfm-slc.s.cs
│ │ │ ├── armv8.9a-prfm-slc.txt.cs
│ │ │ ├── armv8.9a-rasv2.s.cs
│ │ │ ├── armv8.9a-rasv2.txt.cs
│ │ │ ├── armv8.9a-specres2.s.cs
│ │ │ ├── armv8.9a-specres2.txt.cs
│ │ │ ├── armv8.9a-the.s.cs
│ │ │ ├── armv8.9a-the.txt.cs
│ │ │ ├── armv8a-fpmul-err.txt.cs
│ │ │ ├── armv8a-fpmul.s.cs
│ │ │ ├── armv8a-fpmul.txt.cs
│ │ │ ├── armv8r-inst.s.cs
│ │ │ ├── armv8r-sysreg.s.cs
│ │ │ ├── armv8r-sysreg.txt.cs
│ │ │ ├── armv8r-unsupported-inst.s.cs
│ │ │ ├── armv8r-unsupported-sysreg.s.cs
│ │ │ ├── armv9-mrrs.s.cs
│ │ │ ├── armv9-msrr.s.cs
│ │ │ ├── armv9-sysp.s.cs
│ │ │ ├── armv9-sysp.txt.cs
│ │ │ ├── armv9-sysreg128.txt.cs
│ │ │ ├── armv9.4-lse128.s.cs
│ │ │ ├── armv9.4a-chk.s.cs
│ │ │ ├── armv9.4a-chk.txt.cs
│ │ │ ├── armv9.4a-ebep.s.cs
│ │ │ ├── armv9.4a-ebep.txt.cs
│ │ │ ├── armv9.4a-gcs.s.cs
│ │ │ ├── armv9.4a-gcs.txt.cs
│ │ │ ├── armv9.4a-lse128.txt.cs
│ │ │ ├── armv9.5a-cpa.s.cs
│ │ │ ├── armv9.5a-cpa.txt.cs
│ │ │ ├── armv9.5a-e3dse.s.cs
│ │ │ ├── armv9.5a-e3dse.txt.cs
│ │ │ ├── armv9.5a-fgwte3.s.cs
│ │ │ ├── armv9.5a-fgwte3.txt.cs
│ │ │ ├── armv9.5a-hacdbs.s.cs
│ │ │ ├── armv9.5a-hacdbs.txt.cs
│ │ │ ├── armv9.5a-hdbss.s.cs
│ │ │ ├── armv9.5a-hdbss.txt.cs
│ │ │ ├── armv9.5a-pauthlr.txt.cs
│ │ │ ├── armv9.5a-spmu2.s.cs
│ │ │ ├── armv9.5a-spmu2.txt.cs
│ │ │ ├── armv9.5a-step2.s.cs
│ │ │ ├── armv9.5a-step2.txt.cs
│ │ │ ├── armv9a-mec.s.cs
│ │ │ ├── armv9a-mec.txt.cs
│ │ │ ├── armv9a-rme.s.cs
│ │ │ ├── armv9a-rme.txt.cs
│ │ │ ├── basic-a64-instructions.s.cs
│ │ │ ├── basic-a64-instructions.txt.cs
│ │ │ ├── basic-a64-undefined.txt.cs
│ │ │ ├── basic-a64-unpredictable.txt.cs
│ │ │ ├── bfadd.s.cs
│ │ │ ├── bfclamp.s.cs
│ │ │ ├── bfcvt.s.cs
│ │ │ ├── bfcvtn.s.cs
│ │ │ ├── bfdot.s.cs
│ │ │ ├── bfmax.s.cs
│ │ │ ├── bfmaxnm.s.cs
│ │ │ ├── bfmin.s.cs
│ │ │ ├── bfminnm.s.cs
│ │ │ ├── bfmla.s.cs
│ │ │ ├── bfmlal.s.cs
│ │ │ ├── bfmls.s.cs
│ │ │ ├── bfmlsl.s.cs
│ │ │ ├── bfmlslb.s.cs
│ │ │ ├── bfmlslt.s.cs
│ │ │ ├── bfmopa.s.cs
│ │ │ ├── bfmops.s.cs
│ │ │ ├── bfmul.s.cs
│ │ │ ├── bfsub.s.cs
│ │ │ ├── bfvdot.s.cs
│ │ │ ├── bmopa.s.cs
│ │ │ ├── bmops.s.cs
│ │ │ ├── brbe.s.cs
│ │ │ ├── brbe.txt.cs
│ │ │ ├── case-insen-reg-names.s.cs
│ │ │ ├── cntp.s.cs
│ │ │ ├── colored.txt.cs
│ │ │ ├── cvt.s.cs
│ │ │ ├── dot-req.s.cs
│ │ │ ├── dot.s.cs
│ │ │ ├── dupq.s.cs
│ │ │ ├── eorqv.s.cs
│ │ │ ├── ete-sysregs.s.cs
│ │ │ ├── ete.txt.cs
│ │ │ ├── extq.s.cs
│ │ │ ├── fadd.s.cs
│ │ │ ├── faddqv.s.cs
│ │ │ ├── faminmax.s.cs
│ │ │ ├── fclamp.s.cs
│ │ │ ├── fcvt.s.cs
│ │ │ ├── fcvtl.s.cs
│ │ │ ├── fcvtn.s.cs
│ │ │ ├── fcvtzs.s.cs
│ │ │ ├── fcvtzu.s.cs
│ │ │ ├── fdot.s.cs
│ │ │ ├── fmax.s.cs
│ │ │ ├── fmaxnm.s.cs
│ │ │ ├── fmaxnmqv.s.cs
│ │ │ ├── fmaxqv.s.cs
│ │ │ ├── fmin.s.cs
│ │ │ ├── fminnm.s.cs
│ │ │ ├── fminnmqv.s.cs
│ │ │ ├── fminqv.s.cs
│ │ │ ├── fmla.s.cs
│ │ │ ├── fmlal.s.cs
│ │ │ ├── fmlall.s.cs
│ │ │ ├── fmls.s.cs
│ │ │ ├── fmlsl.s.cs
│ │ │ ├── fmopa.s.cs
│ │ │ ├── fmops.s.cs
│ │ │ ├── frinta.s.cs
│ │ │ ├── frintm.s.cs
│ │ │ ├── frintn.s.cs
│ │ │ ├── frintp.s.cs
│ │ │ ├── fscale.s.cs
│ │ │ ├── fsub.s.cs
│ │ │ ├── fullfp16-neg.txt.cs
│ │ │ ├── fullfp16-neon-neg.txt.cs
│ │ │ ├── fvdot.s.cs
│ │ │ ├── gicv3-regs.s.cs
│ │ │ ├── gicv3-regs.txt.cs
│ │ │ ├── ld1b.s.cs
│ │ │ ├── ld1d.s.cs
│ │ │ ├── ld1d_q.s.cs
│ │ │ ├── ld1h.s.cs
│ │ │ ├── ld1q.s.cs
│ │ │ ├── ld1w.s.cs
│ │ │ ├── ld1w_q.s.cs
│ │ │ ├── ld2q.s.cs
│ │ │ ├── ld3q.s.cs
│ │ │ ├── ld4q.s.cs
│ │ │ ├── ldnt1b.s.cs
│ │ │ ├── ldnt1d.s.cs
│ │ │ ├── ldnt1h.s.cs
│ │ │ ├── ldnt1w.s.cs
│ │ │ ├── ldp-offset-predictable.txt.cs
│ │ │ ├── ldp-postind.predictable.txt.cs
│ │ │ ├── ldp-preind.predictable.txt.cs
│ │ │ ├── ldr.s.cs
│ │ │ ├── lut.s.cs
│ │ │ ├── luti2.s.cs
│ │ │ ├── luti4.s.cs
│ │ │ ├── marked-up.txt.cs
│ │ │ ├── mattr-all.txt.cs
│ │ │ ├── mla.s.cs
│ │ │ ├── mopa.s.cs
│ │ │ ├── mova.s.cs
│ │ │ ├── movaz.s.cs
│ │ │ ├── movt.s.cs
│ │ │ ├── neon-2velem.s.cs
│ │ │ ├── neon-3vdiff.s.cs
│ │ │ ├── neon-aba-abd.s.cs
│ │ │ ├── neon-across.s.cs
│ │ │ ├── neon-add-pairwise.s.cs
│ │ │ ├── neon-add-sub-instructions.s.cs
│ │ │ ├── neon-bitwise-instructions.s.cs
│ │ │ ├── neon-compare-instructions.s.cs
│ │ │ ├── neon-crypto.s.cs
│ │ │ ├── neon-extract.s.cs
│ │ │ ├── neon-facge-facgt.s.cs
│ │ │ ├── neon-frsqrt-frecp.s.cs
│ │ │ ├── neon-halving-add-sub.s.cs
│ │ │ ├── neon-instructions.txt.cs
│ │ │ ├── neon-max-min-pairwise.s.cs
│ │ │ ├── neon-max-min.s.cs
│ │ │ ├── neon-mla-mls-instructions.s.cs
│ │ │ ├── neon-mov.s.cs
│ │ │ ├── neon-mul-div-instructions.s.cs
│ │ │ ├── neon-perm.s.cs
│ │ │ ├── neon-rounding-halving-add.s.cs
│ │ │ ├── neon-rounding-shift.s.cs
│ │ │ ├── neon-saturating-add-sub.s.cs
│ │ │ ├── neon-saturating-rounding-shift.s.cs
│ │ │ ├── neon-saturating-shift.s.cs
│ │ │ ├── neon-scalar-abs.s.cs
│ │ │ ├── neon-scalar-add-sub.s.cs
│ │ │ ├── neon-scalar-by-elem-mla.s.cs
│ │ │ ├── neon-scalar-by-elem-mul.s.cs
│ │ │ ├── neon-scalar-by-elem-saturating-mla.s.cs
│ │ │ ├── neon-scalar-by-elem-saturating-mul.s.cs
│ │ │ ├── neon-scalar-compare.s.cs
│ │ │ ├── neon-scalar-cvt.s.cs
│ │ │ ├── neon-scalar-dup.s.cs
│ │ │ ├── neon-scalar-extract-narrow.s.cs
│ │ │ ├── neon-scalar-fp-compare.s.cs
│ │ │ ├── neon-scalar-mul.s.cs
│ │ │ ├── neon-scalar-neg.s.cs
│ │ │ ├── neon-scalar-recip.s.cs
│ │ │ ├── neon-scalar-reduce-pairwise.s.cs
│ │ │ ├── neon-scalar-rounding-shift.s.cs
│ │ │ ├── neon-scalar-saturating-add-sub.s.cs
│ │ │ ├── neon-scalar-saturating-rounding-shift.s.cs
│ │ │ ├── neon-scalar-saturating-shift.s.cs
│ │ │ ├── neon-scalar-shift-imm.s.cs
│ │ │ ├── neon-scalar-shift.s.cs
│ │ │ ├── neon-shift-left-long.s.cs
│ │ │ ├── neon-shift.s.cs
│ │ │ ├── neon-simd-copy.s.cs
│ │ │ ├── neon-simd-ldst-multi-elem.s.cs
│ │ │ ├── neon-simd-ldst-one-elem.s.cs
│ │ │ ├── neon-simd-misc.s.cs
│ │ │ ├── neon-simd-post-ldst-multi-elem.s.cs
│ │ │ ├── neon-simd-shift.s.cs
│ │ │ ├── neon-sxtl.s.cs
│ │ │ ├── neon-tbl.s.cs
│ │ │ ├── neon-uxtl.s.cs
│ │ │ ├── orqv.s.cs
│ │ │ ├── pext.s.cs
│ │ │ ├── pmov.s.cs
│ │ │ ├── ptrue.s.cs
│ │ │ ├── ras-extension.s.cs
│ │ │ ├── ras-extension.txt.cs
│ │ │ ├── rprfm.s.cs
│ │ │ ├── sclamp.s.cs
│ │ │ ├── scvtf.s.cs
│ │ │ ├── sdot.s.cs
│ │ │ ├── sel.s.cs
│ │ │ ├── smax.s.cs
│ │ │ ├── smaxqv.s.cs
│ │ │ ├── smin.s.cs
│ │ │ ├── sminqv.s.cs
│ │ │ ├── smlal.s.cs
│ │ │ ├── smlall.s.cs
│ │ │ ├── smlsl.s.cs
│ │ │ ├── smlsll.s.cs
│ │ │ ├── smopa.s.cs
│ │ │ ├── smops.s.cs
│ │ │ ├── spe.s.cs
│ │ │ ├── speculation-barriers.s.cs
│ │ │ ├── speculation-barriers.txt.cs
│ │ │ ├── sqcvt.s.cs
│ │ │ ├── sqcvtn.s.cs
│ │ │ ├── sqcvtu.s.cs
│ │ │ ├── sqcvtun.s.cs
│ │ │ ├── sqdmulh.s.cs
│ │ │ ├── sqrshr.s.cs
│ │ │ ├── sqrshrn.s.cs
│ │ │ ├── sqrshru.s.cs
│ │ │ ├── sqrshrun.s.cs
│ │ │ ├── srshl.s.cs
│ │ │ ├── st1b.s.cs
│ │ │ ├── st1d.s.cs
│ │ │ ├── st1d_q.s.cs
│ │ │ ├── st1h.s.cs
│ │ │ ├── st1q.s.cs
│ │ │ ├── st1w.s.cs
│ │ │ ├── st1w_q.s.cs
│ │ │ ├── st2q.s.cs
│ │ │ ├── st3q.s.cs
│ │ │ ├── st4q.s.cs
│ │ │ ├── stnt1b.s.cs
│ │ │ ├── stnt1d.s.cs
│ │ │ ├── stnt1h.s.cs
│ │ │ ├── stnt1w.s.cs
│ │ │ ├── str.s.cs
│ │ │ ├── sub.s.cs
│ │ │ ├── sudot.s.cs
│ │ │ ├── sumlall.s.cs
│ │ │ ├── sunpk.s.cs
│ │ │ ├── suvdot.s.cs
│ │ │ ├── svdot.s.cs
│ │ │ ├── tblq.s.cs
│ │ │ ├── tbxq.s.cs
│ │ │ ├── tls-relocs.s.cs
│ │ │ ├── tme.s.cs
│ │ │ ├── tme.txt.cs
│ │ │ ├── trace-regs.s.cs
│ │ │ ├── trace-regs.txt.cs
│ │ │ ├── trbe-sysreg.s.cs
│ │ │ ├── trbe.txt.cs
│ │ │ ├── uclamp.s.cs
│ │ │ ├── ucvtf.s.cs
│ │ │ ├── udf.s.cs
│ │ │ ├── udf.txt.cs
│ │ │ ├── udot.s.cs
│ │ │ ├── umax.s.cs
│ │ │ ├── umaxqv.s.cs
│ │ │ ├── umin.s.cs
│ │ │ ├── uminqv.s.cs
│ │ │ ├── umlal.s.cs
│ │ │ ├── umlall.s.cs
│ │ │ ├── umlsl.s.cs
│ │ │ ├── umlsll.s.cs
│ │ │ ├── umopa.s.cs
│ │ │ ├── umops.s.cs
│ │ │ ├── uqcvt.s.cs
│ │ │ ├── uqcvtn.s.cs
│ │ │ ├── uqrshr.s.cs
│ │ │ ├── uqrshrn.s.cs
│ │ │ ├── urshl.s.cs
│ │ │ ├── usdot.s.cs
│ │ │ ├── usmlall.s.cs
│ │ │ ├── usvdot.s.cs
│ │ │ ├── uunpk.s.cs
│ │ │ ├── uvdot.s.cs
│ │ │ ├── uzp.s.cs
│ │ │ ├── uzpq1.s.cs
│ │ │ ├── uzpq2.s.cs
│ │ │ ├── whilege.s.cs
│ │ │ ├── whilegt.s.cs
│ │ │ ├── whilehi.s.cs
│ │ │ ├── whilehs.s.cs
│ │ │ ├── whilele.s.cs
│ │ │ ├── whilelo.s.cs
│ │ │ ├── whilels.s.cs
│ │ │ ├── whilelt.s.cs
│ │ │ ├── zero.s.cs
│ │ │ ├── zip.s.cs
│ │ │ ├── zipq1.s.cs
│ │ │ └── zipq2.s.cs
│ │ ├── ARC/
│ │ │ ├── alu_arc.s.cs
│ │ │ ├── br_arc.s.cs
│ │ │ ├── compact_arc.s.cs
│ │ │ ├── ldst_arc.s.cs
│ │ │ └── misc_arc.c.cs
│ │ ├── ARM/
│ │ │ ├── arm-aliases.s.cs
│ │ │ ├── arm-arithmetic-aliases.s.cs
│ │ │ ├── arm-branches.s.cs
│ │ │ ├── arm-it-block.s.cs
│ │ │ ├── arm-memory-instructions.s.cs
│ │ │ ├── arm-shift-encoding.s.cs
│ │ │ ├── arm-thumb-trustzone.s.cs
│ │ │ ├── arm-trustzone.s.cs
│ │ │ ├── arm_addrmode2.s.cs
│ │ │ ├── arm_addrmode3.s.cs
│ │ │ ├── arm_instructions.s.cs
│ │ │ ├── armv8.1m-pacbti.s.cs
│ │ │ ├── armv8.2a-dotprod-a32.s.cs
│ │ │ ├── armv8.2a-dotprod-t32.s.cs
│ │ │ ├── armv8.5a-sb.s.cs
│ │ │ ├── armv8a-fpmul.s.cs
│ │ │ ├── basic-arm-instructions-v8.s.cs
│ │ │ ├── basic-arm-instructions.s.cs
│ │ │ ├── basic-thumb-instructions.s.cs
│ │ │ ├── basic-thumb2-instructions-v8.s.cs
│ │ │ ├── basic-thumb2-instructions.s.cs
│ │ │ ├── bfloat16-a32.s.cs
│ │ │ ├── bfloat16-t32.s.cs
│ │ │ ├── cde-integer.s.cs
│ │ │ ├── cde-vec-pred.s.cs
│ │ │ ├── clrm-asm.s.cs
│ │ │ ├── cps.s.cs
│ │ │ ├── crc32-thumb.s.cs
│ │ │ ├── crc32.s.cs
│ │ │ ├── dot-req.s.cs
│ │ │ ├── fconst.s.cs
│ │ │ ├── fp-armv8.s.cs
│ │ │ ├── fpv8.s.cs
│ │ │ ├── gas-compl-copr-reg.s.cs
│ │ │ ├── idiv-thumb.s.cs
│ │ │ ├── idiv.s.cs
│ │ │ ├── implicit-it-generation.s.cs
│ │ │ ├── ldrd-strd-gnu-arm.s.cs
│ │ │ ├── ldrd-strd-gnu-thumb.s.cs
│ │ │ ├── load-store-acquire-release-v8-thumb.s.cs
│ │ │ ├── load-store-acquire-release-v8.s.cs
│ │ │ ├── mve-bitops.s.cs
│ │ │ ├── mve-float.s.cs
│ │ │ ├── mve-integer.s.cs
│ │ │ ├── mve-interleave.s.cs
│ │ │ ├── mve-load-store.s.cs
│ │ │ ├── mve-minmax.s.cs
│ │ │ ├── mve-misc.s.cs
│ │ │ ├── mve-qdest-qsrc.s.cs
│ │ │ ├── mve-qdest-rsrc.s.cs
│ │ │ ├── mve-reductions-fp.s.cs
│ │ │ ├── mve-reductions.s.cs
│ │ │ ├── mve-scalar-shift.s.cs
│ │ │ ├── mve-shifts.s.cs
│ │ │ ├── mve-vcmp.s.cs
│ │ │ ├── mve-vmov-pair.s.cs
│ │ │ ├── mve-vpt.s.cs
│ │ │ ├── negative-immediates.s.cs
│ │ │ ├── neon-abs-encoding.s.cs
│ │ │ ├── neon-absdiff-encoding.s.cs
│ │ │ ├── neon-add-encoding.s.cs
│ │ │ ├── neon-bitcount-encoding.s.cs
│ │ │ ├── neon-bitwise-encoding.s.cs
│ │ │ ├── neon-cmp-encoding.s.cs
│ │ │ ├── neon-convert-encoding.s.cs
│ │ │ ├── neon-crypto.s.cs
│ │ │ ├── neon-dup-encoding.s.cs
│ │ │ ├── neon-minmax-encoding.s.cs
│ │ │ ├── neon-mov-encoding.s.cs
│ │ │ ├── neon-mul-accum-encoding.s.cs
│ │ │ ├── neon-mul-encoding.s.cs
│ │ │ ├── neon-neg-encoding.s.cs
│ │ │ ├── neon-pairwise-encoding.s.cs
│ │ │ ├── neon-reciprocal-encoding.s.cs
│ │ │ ├── neon-reverse-encoding.s.cs
│ │ │ ├── neon-satshift-encoding.s.cs
│ │ │ ├── neon-shift-encoding.s.cs
│ │ │ ├── neon-shiftaccum-encoding.s.cs
│ │ │ ├── neon-shuffle-encoding.s.cs
│ │ │ ├── neon-sub-encoding.s.cs
│ │ │ ├── neon-table-encoding.s.cs
│ │ │ ├── neon-v8.s.cs
│ │ │ ├── neon-vld-encoding.s.cs
│ │ │ ├── neon-vld-vst-align.s.cs
│ │ │ ├── neon-vst-encoding.s.cs
│ │ │ ├── neon-vswp.s.cs
│ │ │ ├── neont2-abs-encoding.s.cs
│ │ │ ├── neont2-absdiff-encoding.s.cs
│ │ │ ├── neont2-add-encoding.s.cs
│ │ │ ├── neont2-bitcount-encoding.s.cs
│ │ │ ├── neont2-bitwise-encoding.s.cs
│ │ │ ├── neont2-cmp-encoding.s.cs
│ │ │ ├── neont2-convert-encoding.s.cs
│ │ │ ├── neont2-dup-encoding.s.cs
│ │ │ ├── neont2-minmax-encoding.s.cs
│ │ │ ├── neont2-mov-encoding.s.cs
│ │ │ ├── neont2-mul-accum-encoding.s.cs
│ │ │ ├── neont2-mul-encoding.s.cs
│ │ │ ├── neont2-neg-encoding.s.cs
│ │ │ ├── neont2-pairwise-encoding.s.cs
│ │ │ ├── neont2-reciprocal-encoding.s.cs
│ │ │ ├── neont2-reverse-encoding.s.cs
│ │ │ ├── neont2-satshift-encoding.s.cs
│ │ │ ├── neont2-shift-encoding.s.cs
│ │ │ ├── neont2-shiftaccum-encoding.s.cs
│ │ │ ├── neont2-shuffle-encoding.s.cs
│ │ │ ├── neont2-sub-encoding.s.cs
│ │ │ ├── neont2-table-encoding.s.cs
│ │ │ ├── neont2-vld-encoding.s.cs
│ │ │ ├── neont2-vst-encoding.s.cs
│ │ │ ├── simple-fp-encoding.s.cs
│ │ │ ├── thumb-add-sub-width.s.cs
│ │ │ ├── thumb-fp-armv8.s.cs
│ │ │ ├── thumb-hints.s.cs
│ │ │ ├── thumb-mov.s.cs
│ │ │ ├── thumb-neon-crypto.s.cs
│ │ │ ├── thumb-neon-v8.s.cs
│ │ │ ├── thumb-shift-encoding.s.cs
│ │ │ ├── thumb.s.cs
│ │ │ ├── thumb2-b.w-encodingT4.s.cs
│ │ │ ├── thumb2-branches.s.cs
│ │ │ ├── thumb2-bxj-v8.s.cs
│ │ │ ├── thumb2-bxj.s.cs
│ │ │ ├── thumb2-ldr.w-str.w.s.cs
│ │ │ ├── thumb2-ldrexd-strexd.s.cs
│ │ │ ├── thumb2-mclass.s.cs
│ │ │ ├── thumb2-narrow-dp.ll.cs
│ │ │ ├── thumb2-pldw.s.cs
│ │ │ ├── thumb_rewrites.s.cs
│ │ │ ├── thumbv7em.s.cs
│ │ │ ├── thumbv7m.s.cs
│ │ │ ├── thumbv8.1m-vmrs-vmsr.s.cs
│ │ │ ├── thumbv8.1m.s.cs
│ │ │ ├── thumbv8m.s.cs
│ │ │ ├── udf-arm.s.cs
│ │ │ ├── udf-thumb-2.s.cs
│ │ │ ├── udf-thumb.s.cs
│ │ │ ├── vfp4-thumb.s.cs
│ │ │ ├── vfp4.s.cs
│ │ │ ├── vmov-vmvn-replicate.s.cs
│ │ │ ├── vmovhr.s.cs
│ │ │ ├── vpush-vpop-thumb.s.cs
│ │ │ ├── vpush-vpop.s.cs
│ │ │ ├── vscclrm-asm.s.cs
│ │ │ └── vstrldr_sys.s.cs
│ │ ├── Alpha/
│ │ │ ├── insn-alpha-be.s.cs
│ │ │ └── insn-alpha.s.cs
│ │ ├── BPF/
│ │ │ ├── classic-all.cs
│ │ │ ├── classic-be.cs
│ │ │ ├── extended-all.cs
│ │ │ └── extended-be.cs
│ │ ├── HPPA/
│ │ │ ├── alu11.s.cs
│ │ │ ├── arith_imm11.s.cs
│ │ │ ├── assist20.s.cs
│ │ │ ├── branch11.s.cs
│ │ │ ├── branch20.s.cs
│ │ │ ├── computation20.s.cs
│ │ │ ├── copr_dw11.s.cs
│ │ │ ├── float11.s.cs
│ │ │ ├── float20.s.cs
│ │ │ ├── index_mem11.s.cs
│ │ │ ├── longimm20.s.cs
│ │ │ ├── mem_mgmt11.s.cs
│ │ │ ├── memory_reference20.s.cs
│ │ │ ├── multimedia20.s.cs
│ │ │ ├── no_grp11.s.cs
│ │ │ ├── sfu11.s.cs
│ │ │ ├── shexdep11.s.cs
│ │ │ ├── sysctrl20.s.cs
│ │ │ └── system_op11.s.cs
│ │ ├── LoongArch/
│ │ │ ├── absd.s.cs
│ │ │ ├── add.s.cs
│ │ │ ├── adda.s.cs
│ │ │ ├── addi.s.cs
│ │ │ ├── addw.s.cs
│ │ │ ├── and.s.cs
│ │ │ ├── andi.s.cs
│ │ │ ├── andn.s.cs
│ │ │ ├── arith.s.cs
│ │ │ ├── arm-alu.s.cs
│ │ │ ├── arm-jump.s.cs
│ │ │ ├── arm-mov.s.cs
│ │ │ ├── arm-shift.s.cs
│ │ │ ├── atomic.s.cs
│ │ │ ├── avg.s.cs
│ │ │ ├── avgr.s.cs
│ │ │ ├── barrier.s.cs
│ │ │ ├── base.s.cs
│ │ │ ├── bit-manipu.s.cs
│ │ │ ├── bit-shift.s.cs
│ │ │ ├── bitclr.s.cs
│ │ │ ├── bitrev.s.cs
│ │ │ ├── bitsel.s.cs
│ │ │ ├── bitseli.s.cs
│ │ │ ├── bitset.s.cs
│ │ │ ├── bound-check.s.cs
│ │ │ ├── branch.s.cs
│ │ │ ├── bsll.s.cs
│ │ │ ├── bsrl.s.cs
│ │ │ ├── clo.s.cs
│ │ │ ├── clz.s.cs
│ │ │ ├── crc.s.cs
│ │ │ ├── d-arith.s.cs
│ │ │ ├── d-bound-check.s.cs
│ │ │ ├── d-branch.s.cs
│ │ │ ├── d-comp.s.cs
│ │ │ ├── d-conv.s.cs
│ │ │ ├── d-memory.s.cs
│ │ │ ├── d-move.s.cs
│ │ │ ├── div.s.cs
│ │ │ ├── ext2xv.s.cs
│ │ │ ├── exth.s.cs
│ │ │ ├── extl.s.cs
│ │ │ ├── extrins.s.cs
│ │ │ ├── f-arith.s.cs
│ │ │ ├── f-bound-check.s.cs
│ │ │ ├── f-branch.s.cs
│ │ │ ├── f-comp.s.cs
│ │ │ ├── f-conv.s.cs
│ │ │ ├── f-memory.s.cs
│ │ │ ├── f-move.s.cs
│ │ │ ├── fadd.s.cs
│ │ │ ├── fclass.s.cs
│ │ │ ├── fcmp.s.cs
│ │ │ ├── fcvt.s.cs
│ │ │ ├── fcvth.s.cs
│ │ │ ├── fcvtl.s.cs
│ │ │ ├── fdiv.s.cs
│ │ │ ├── ffint.s.cs
│ │ │ ├── flogb.s.cs
│ │ │ ├── fmadd.s.cs
│ │ │ ├── fmax.s.cs
│ │ │ ├── fmaxa.s.cs
│ │ │ ├── fmin.s.cs
│ │ │ ├── fmina.s.cs
│ │ │ ├── fmsub.s.cs
│ │ │ ├── fmul.s.cs
│ │ │ ├── fnmadd.s.cs
│ │ │ ├── fnmsub.s.cs
│ │ │ ├── frecip.s.cs
│ │ │ ├── frint.s.cs
│ │ │ ├── frsqrt.s.cs
│ │ │ ├── frstp.s.cs
│ │ │ ├── fsqrt.s.cs
│ │ │ ├── fsub.s.cs
│ │ │ ├── ftint.s.cs
│ │ │ ├── haddw.s.cs
│ │ │ ├── hsubw.s.cs
│ │ │ ├── ilv.s.cs
│ │ │ ├── insgr2vr.s.cs
│ │ │ ├── insve0.s.cs
│ │ │ ├── ld.s.cs
│ │ │ ├── ldrepl.s.cs
│ │ │ ├── lvz.s.cs
│ │ │ ├── madd.s.cs
│ │ │ ├── maddw.s.cs
│ │ │ ├── max.s.cs
│ │ │ ├── memory.s.cs
│ │ │ ├── min.s.cs
│ │ │ ├── misc.s.cs
│ │ │ ├── mod.s.cs
│ │ │ ├── mskgez.s.cs
│ │ │ ├── mskltz.s.cs
│ │ │ ├── msknz.s.cs
│ │ │ ├── msub.s.cs
│ │ │ ├── muh.s.cs
│ │ │ ├── mul.s.cs
│ │ │ ├── mulw.s.cs
│ │ │ ├── neg.s.cs
│ │ │ ├── nor.s.cs
│ │ │ ├── nori.s.cs
│ │ │ ├── or.s.cs
│ │ │ ├── ori.s.cs
│ │ │ ├── orn.s.cs
│ │ │ ├── pack.s.cs
│ │ │ ├── pcnt.s.cs
│ │ │ ├── perm.s.cs
│ │ │ ├── permi.s.cs
│ │ │ ├── pick.s.cs
│ │ │ ├── pickve.s.cs
│ │ │ ├── pickve2gr.s.cs
│ │ │ ├── pseudos.s.cs
│ │ │ ├── repl128vei.s.cs
│ │ │ ├── replgr2vr.s.cs
│ │ │ ├── replve.s.cs
│ │ │ ├── replve0.s.cs
│ │ │ ├── replvei.s.cs
│ │ │ ├── rotr.s.cs
│ │ │ ├── sadd.s.cs
│ │ │ ├── sat.s.cs
│ │ │ ├── scr.s.cs
│ │ │ ├── seq.s.cs
│ │ │ ├── set.s.cs
│ │ │ ├── setallnez.s.cs
│ │ │ ├── setanyeqz.s.cs
│ │ │ ├── shuf.s.cs
│ │ │ ├── shuf4i.s.cs
│ │ │ ├── signcov.s.cs
│ │ │ ├── sle.s.cs
│ │ │ ├── sll.s.cs
│ │ │ ├── sllwil.s.cs
│ │ │ ├── slt.s.cs
│ │ │ ├── sra.s.cs
│ │ │ ├── sran.s.cs
│ │ │ ├── srani.s.cs
│ │ │ ├── srar.s.cs
│ │ │ ├── srarn.s.cs
│ │ │ ├── srarni.s.cs
│ │ │ ├── srl.s.cs
│ │ │ ├── srln.s.cs
│ │ │ ├── srlni.s.cs
│ │ │ ├── srlr.s.cs
│ │ │ ├── srlrn.s.cs
│ │ │ ├── srlrni.s.cs
│ │ │ ├── ssran.s.cs
│ │ │ ├── ssrani.s.cs
│ │ │ ├── ssrarn.s.cs
│ │ │ ├── ssrarni.s.cs
│ │ │ ├── ssrln.s.cs
│ │ │ ├── ssrlni.s.cs
│ │ │ ├── ssrlrn.s.cs
│ │ │ ├── ssrlrni.s.cs
│ │ │ ├── ssub.s.cs
│ │ │ ├── st.s.cs
│ │ │ ├── stelm.s.cs
│ │ │ ├── sub.s.cs
│ │ │ ├── subi.s.cs
│ │ │ ├── subw.s.cs
│ │ │ ├── valid.s.cs
│ │ │ ├── x86-alu.s.cs
│ │ │ ├── x86-jump.s.cs
│ │ │ ├── x86-misc.s.cs
│ │ │ ├── x86-shift.s.cs
│ │ │ ├── xor.s.cs
│ │ │ └── xori.s.cs
│ │ ├── Mips/
│ │ │ ├── hilo-addressing.s.cs
│ │ │ ├── micromips-alu-instructions-EB.s.cs
│ │ │ ├── micromips-alu-instructions.s.cs
│ │ │ ├── micromips-branch-instructions-EB.s.cs
│ │ │ ├── micromips-branch-instructions.s.cs
│ │ │ ├── micromips-expansions.s.cs
│ │ │ ├── micromips-jump-instructions-EB.s.cs
│ │ │ ├── micromips-jump-instructions.s.cs
│ │ │ ├── micromips-loadstore-instructions-EB.s.cs
│ │ │ ├── micromips-loadstore-instructions.s.cs
│ │ │ ├── micromips-loadstore-unaligned-EB.s.cs
│ │ │ ├── micromips-loadstore-unaligned.s.cs
│ │ │ ├── micromips-movcond-instructions-EB.s.cs
│ │ │ ├── micromips-movcond-instructions.s.cs
│ │ │ ├── micromips-multiply-instructions-EB.s.cs
│ │ │ ├── micromips-multiply-instructions.s.cs
│ │ │ ├── micromips-shift-instructions-EB.s.cs
│ │ │ ├── micromips-shift-instructions.s.cs
│ │ │ ├── micromips-trap-instructions-EB.s.cs
│ │ │ ├── micromips-trap-instructions.s.cs
│ │ │ ├── mips-alu-instructions.s.cs
│ │ │ ├── mips-control-instructions-64.s.cs
│ │ │ ├── mips-control-instructions.s.cs
│ │ │ ├── mips-coprocessor-encodings.s.cs
│ │ │ ├── mips-dsp-instructions.s.cs
│ │ │ ├── mips-expansions.s.cs
│ │ │ ├── mips-fpu-instructions.s.cs
│ │ │ ├── mips-jump-instructions.s.cs
│ │ │ ├── mips-memory-instructions.s.cs
│ │ │ ├── mips-register-names.s.cs
│ │ │ ├── mips64-alu-instructions.s.cs
│ │ │ ├── mips64-instructions.s.cs
│ │ │ ├── mips64-register-names-n32-n64.s.cs
│ │ │ ├── mips64-register-names.s.cs
│ │ │ ├── mips_directives.s.cs
│ │ │ ├── nabi-regs.s.cs
│ │ │ ├── set-at-directive.s.cs
│ │ │ ├── test_2r.s.cs
│ │ │ ├── test_2rf.s.cs
│ │ │ ├── test_3r.s.cs
│ │ │ ├── test_3rf.s.cs
│ │ │ ├── test_bit.s.cs
│ │ │ ├── test_cbranch.s.cs
│ │ │ ├── test_ctrlregs.s.cs
│ │ │ ├── test_elm.s.cs
│ │ │ ├── test_elm_insert.s.cs
│ │ │ ├── test_elm_insve.s.cs
│ │ │ ├── test_i10.s.cs
│ │ │ ├── test_i5.s.cs
│ │ │ ├── test_i8.s.cs
│ │ │ ├── test_lsa.s.cs
│ │ │ ├── test_mi10.s.cs
│ │ │ └── test_vec.s.cs
│ │ ├── PowerPC/
│ │ │ ├── ppc64-encoding-bookII.s.cs
│ │ │ ├── ppc64-encoding-bookIII.s.cs
│ │ │ ├── ppc64-encoding-ext.s.cs
│ │ │ ├── ppc64-encoding-fp.s.cs
│ │ │ ├── ppc64-encoding-vmx.s.cs
│ │ │ ├── ppc64-encoding.s.cs
│ │ │ ├── ppc64-operands.s.cs
│ │ │ └── qpx.s.cs
│ │ ├── README.md
│ │ ├── RISCV/
│ │ │ ├── XCValu_valid_riscv32_riscv_xcvalu_syntax_no_alias_text.txt.cs
│ │ │ ├── XCVbi_riscv32_riscv_xcvbi.txt.cs
│ │ │ ├── XCVbitmanip_riscv32_riscv_xcvbitmanip.txt.cs
│ │ │ ├── XCVelw_valid_riscv32_riscv_xcvelw.txt.cs
│ │ │ ├── XCVmac_valid_riscv32_riscv_xcvmac_syntax_no_alias_text.txt.cs
│ │ │ ├── XCVmem_valid_riscv32_riscv_xcvmem.txt.cs
│ │ │ ├── XCVsimd_riscv32_riscv_xcvsimd.txt.cs
│ │ │ ├── XTHeadBa_valid_riscv32_riscv_xtheadba.txt.cs
│ │ │ ├── XTHeadVdot_valid_riscv64_riscv_xtheadvdot.txt.cs
│ │ │ ├── XVentanaCondOps_valid_riscv64_xventanacondops_syntax_no_alias_text.txt.cs
│ │ │ ├── Zawrs_valid_riscv32_zawrs_syntax_no_alias_text.txt.cs
│ │ │ ├── add_riscv64_riscv_v.txt.cs
│ │ │ ├── and_riscv64_riscv_v.txt.cs
│ │ │ ├── clip_riscv64_riscv_v.txt.cs
│ │ │ ├── compare_riscv64_riscv_v.txt.cs
│ │ │ ├── compress_cjal_riscv32_riscv_c.txt.cs
│ │ │ ├── compress_rv32d_riscv32_riscv_c_riscv_d.txt.cs
│ │ │ ├── compress_rv32f_riscv32_riscv_c_riscv_f.txt.cs
│ │ │ ├── compress_rv32i_riscv32_riscv_c.txt.cs
│ │ │ ├── compress_rv64i_riscv64_riscv_c.txt.cs
│ │ │ ├── compressed_zicfiss_riscv32_riscv_experimental_zicfiss__experimental_zcmop_syntax_no_alias_text.txt.cs
│ │ │ ├── convert_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── debug_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── deprecated_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── div_riscv64_riscv_v.txt.cs
│ │ │ ├── ext_riscv64_riscv_v.txt.cs
│ │ │ ├── fadd_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fcompare_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fdiv_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fixups_compressed_riscv32_riscv_c.txt.cs
│ │ │ ├── fixups_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── fmacc_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fminmax_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fmul_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fmv_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fothers_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── freduction_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── fsub_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── insn-riscv32.s.cs
│ │ │ ├── insn-riscv64.s.cs
│ │ │ ├── load_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── macc_riscv64_riscv_v.txt.cs
│ │ │ ├── machine_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── mask_riscv64_riscv_v.txt.cs
│ │ │ ├── minmax_riscv64_riscv_v.txt.cs
│ │ │ ├── mul_riscv64_riscv_v.txt.cs
│ │ │ ├── mv_riscv64_riscv_v.txt.cs
│ │ │ ├── option_arch_riscv32.txt.cs
│ │ │ ├── option_rvc_riscv32.txt.cs
│ │ │ ├── or_riscv64_riscv_v.txt.cs
│ │ │ ├── others_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── print_imm_hex_riscv32_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── priv_valid_riscv32_svinval_syntax_no_alias_text.txt.cs
│ │ │ ├── reduction_riscv64_riscv_v.txt.cs
│ │ │ ├── rv32_hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_immediate_riscv32_riscv_v.txt.cs
│ │ │ ├── rv32_machine_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_supervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_user_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32c_only_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32c_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32d_valid_riscv32_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32dc_valid_riscv32_riscv_c_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32e_valid_riscv32_riscv_e_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32f_valid_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32fc_valid_riscv32_riscv_c_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32i_only_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32i_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32ih_aliases_valid_riscv32_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32ih_valid_riscv32_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32m_valid_riscv32_m_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32xtheadbs_valid_riscv32_riscv_xtheadbs.txt.cs
│ │ │ ├── rv32xtheadfmemidx_valid_riscv32_riscv_d_riscv_xtheadfmemidx.txt.cs
│ │ │ ├── rv32xtheadmac_valid_riscv32_riscv_xtheadmac.txt.cs
│ │ │ ├── rv32xtheadmemidx_valid_riscv32_riscv_xtheadmemidx.txt.cs
│ │ │ ├── rv32xtheadmempair_valid_riscv32_riscv_xtheadmempair.txt.cs
│ │ │ ├── rv32zaamo_valid_riscv32_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zacas_valid_riscv32_experimental_zacas_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zalrsc_valid_riscv32_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zba_valid_riscv32_riscv_zba.txt.cs
│ │ │ ├── rv32zbb_only_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zbb_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zbc_valid_riscv32_riscv_zbc.txt.cs
│ │ │ ├── rv32zbkb_only_valid_riscv32_riscv_zbkb.txt.cs
│ │ │ ├── rv32zbkb_valid_riscv32_riscv_zbkb.txt.cs
│ │ │ ├── rv32zbkc_valid_riscv32_riscv_zbkc.txt.cs
│ │ │ ├── rv32zbkx_valid_riscv32_riscv_zbkx.txt.cs
│ │ │ ├── rv32zbs_valid_riscv32_riscv_zbs.txt.cs
│ │ │ ├── rv32zcb_valid_riscv32_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zcmp_valid_riscv32_riscv_zcmp_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zcmt_valid_riscv32_riscv_zcmt_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zdinx_valid_riscv32_riscv_zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfa_only_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfbfmin_valid_riscv32_experimental_zfbfmin_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfh_valid_riscv32_zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfhmin_valid_riscv32_zfhmin_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zhinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zhinxmin_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zicbom_valid_riscv32_zicbom.txt.cs
│ │ │ ├── rv32zicbop_valid_riscv32_zicbop.txt.cs
│ │ │ ├── rv32zicboz_valid_riscv32_zicboz.txt.cs
│ │ │ ├── rv32zicond_valid_riscv32_zicond.txt.cs
│ │ │ ├── rv32zihintntl_valid_riscv32_zihintntl_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zihintntlc_valid_riscv32_zihintntl_riscv_c.txt.cs
│ │ │ ├── rv32zihintpause_valid_riscv32_zihintpause_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zknd_only_valid_riscv32_zknd.txt.cs
│ │ │ ├── rv32zkne_only_valid_riscv32_zkne.txt.cs
│ │ │ ├── rv32zknh_only_valid_riscv32_zknh.txt.cs
│ │ │ ├── rv32zknh_valid_riscv32_zknh.txt.cs
│ │ │ ├── rv32zksed_valid_riscv32_zksed.txt.cs
│ │ │ ├── rv32zksh_valid_riscv32_zksh.txt.cs
│ │ │ ├── rv64_machine_csr_names_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64_user_csr_names_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64c_hints_valid_riscv64_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64c_valid_riscv64_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64d_valid_riscv64_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64dc_valid_riscv64_riscv_c_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64e_valid_riscv64_riscv_e_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64f_valid_riscv64_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64i_valid_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64ih_valid_riscv64_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64m_valid_riscv64_m_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64xtheadfmemidx_valid_riscv64_riscv_d_riscv_xtheadfmemidx.txt.cs
│ │ │ ├── rv64xtheadmac_valid_riscv64_riscv_xtheadmac.txt.cs
│ │ │ ├── rv64xtheadmemidx_valid_riscv64_riscv_xtheadmemidx.txt.cs
│ │ │ ├── rv64xtheadmempair_valid_riscv64_riscv_xtheadmempair.txt.cs
│ │ │ ├── rv64zaamo_valid_riscv64_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zacas_valid_riscv64_experimental_zacas_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zalrsc_valid_riscv64_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zba_valid_riscv64_riscv_zba.txt.cs
│ │ │ ├── rv64zbb_valid_riscv64_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zbkb_valid_riscv64_riscv_zbkb.txt.cs
│ │ │ ├── rv64zcb_valid_riscv64_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zcmp_valid_riscv64_riscv_zcmp_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zdinx_valid_riscv64_riscv_zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zfh_valid_riscv64_zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zfinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zhinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zhinxmin_valid_riscv64_riscv_zfinx__zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zknd_only_valid_riscv64_zknd.txt.cs
│ │ │ ├── rv64zkne_only_valid_riscv64_zkne.txt.cs
│ │ │ ├── rv64zknh_only_valid_riscv64_zknh.txt.cs
│ │ │ ├── rvc_hints_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rvf_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rvk_user_csr_name_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rvv_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rvzcmop_valid_riscv32_experimental_zcmop.txt.cs
│ │ │ ├── rvzcmt_user_csr_name_riscv32_riscv_zcmt_syntax_no_alias_text.txt.cs
│ │ │ ├── rvzimop_valid_riscv32_experimental_zimop.txt.cs
│ │ │ ├── shift_riscv64_riscv_v.txt.cs
│ │ │ ├── sign_injection_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── store_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── sub_riscv64_riscv_v.txt.cs
│ │ │ ├── supervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── user_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── vsetvl_riscv64_riscv_v.txt.cs
│ │ │ ├── xor_riscv64_riscv_v.txt.cs
│ │ │ ├── xsfvcp_riscv32_riscv_v_riscv_xsfvcp.txt.cs
│ │ │ ├── xsfvfnrclip_riscv64_riscv_v_riscv_xsfvfnrclipxfqf.txt.cs
│ │ │ ├── xsfvfwmacc_riscv64_riscv_v_riscv_xsfvfwmaccqqq.txt.cs
│ │ │ ├── xsfvqmacc_riscv64_riscv_v_riscv_xsfvqmaccqoq_riscv_xsfvqmaccdod.txt.cs
│ │ │ ├── xtheadcmo_valid_riscv32_riscv_xtheadcmo.txt.cs
│ │ │ ├── xtheadcondmov_valid_riscv32_riscv_xtheadcondmov.txt.cs
│ │ │ ├── xtheadsync_valid_riscv32_riscv_xtheadsync.txt.cs
│ │ │ ├── zfa_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── zfa_zfhmin_zvfh_valid_riscv32_zfa__zfhmin__zvfh_syntax_no_alias_text.txt.cs
│ │ │ ├── zicfilp_valid_riscv32_experimental_zicfilp_syntax_no_alias_text.txt.cs
│ │ │ ├── zicfiss_valid_riscv32_riscv_a_riscv_experimental_zicfiss_syntax_no_alias_text.txt.cs
│ │ │ ├── zvbb_riscv32_zve32x_zvbb.txt.cs
│ │ │ ├── zvbc_riscv32_zve64x_zvbc.txt.cs
│ │ │ ├── zvfbfmin_riscv32_experimental_zvfbfmin.txt.cs
│ │ │ ├── zvfbfwma_riscv32_experimental_zvfbfwma.txt.cs
│ │ │ ├── zvkb_riscv32_zve32x_zvkb.txt.cs
│ │ │ ├── zvkg_riscv32_zve32x_zvkg.txt.cs
│ │ │ ├── zvkned_riscv32_zve32x_zvkned.txt.cs
│ │ │ ├── zvknh_riscv32_zve32x_zvknha.txt.cs
│ │ │ ├── zvksed_riscv32_zve32x_zvksed.txt.cs
│ │ │ ├── zvksh_riscv32_zve32x_zvksh.txt.cs
│ │ │ └── zvlsseg_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ ├── Sparc/
│ │ │ ├── sparc-alu-instructions.s.cs
│ │ │ ├── sparc-atomic-instructions.s.cs
│ │ │ ├── sparc-ctrl-instructions.s.cs
│ │ │ ├── sparc-fp-instructions.s.cs
│ │ │ ├── sparc-mem-instructions.s.cs
│ │ │ ├── sparc-vis.s.cs
│ │ │ ├── sparc64-alu-instructions.s.cs
│ │ │ ├── sparc64-ctrl-instructions.s.cs
│ │ │ ├── sparcv8-instructions.s.cs
│ │ │ └── sparcv9-instructions.s.cs
│ │ ├── SystemZ/
│ │ │ ├── insn-good-z196.s.cs
│ │ │ ├── insn-good.s.cs
│ │ │ └── regs-good.s.cs
│ │ ├── TriCore/
│ │ │ ├── ADC_Background_Scan_1_KIT_TC275_LK.s.cs
│ │ │ ├── ADC_Queued_Scan_1_KIT_TC397_TFT.s.cs
│ │ │ ├── J_Call_Loop.s.cs
│ │ │ ├── LoadStore.s.cs
│ │ │ ├── csfr.s.cs
│ │ │ ├── debug.s.cs
│ │ │ ├── extr_u.s.cs
│ │ │ ├── handwrite.s.cs
│ │ │ ├── iLLD_TC375_ADS_Bluetooth_RFCOMM.s.cs
│ │ │ ├── ldst_br_circ.s.cs
│ │ │ ├── rr_insn.s.cs
│ │ │ ├── tc110.s.cs
│ │ │ ├── tc120.s.cs
│ │ │ ├── tc130.s.cs
│ │ │ ├── tc131.s.cs
│ │ │ ├── tc160.s.cs
│ │ │ ├── tc161.s.cs
│ │ │ ├── tc162.s.cs
│ │ │ └── tc180.c.cs
│ │ ├── X86/
│ │ │ ├── 3DNow.s.cs
│ │ │ ├── address-size.s.cs
│ │ │ ├── avx512-encodings.s.cs
│ │ │ ├── intel-syntax-encoding.s.cs
│ │ │ ├── x86-32-avx.s.cs
│ │ │ ├── x86-32-fma3.s.cs
│ │ │ ├── x86-32-ms-inline-asm.s.cs
│ │ │ ├── x86_64-avx-clmul-encoding.s.cs
│ │ │ ├── x86_64-avx-encoding.s.cs
│ │ │ ├── x86_64-bmi-encoding.s.cs
│ │ │ ├── x86_64-encoding.s.cs
│ │ │ ├── x86_64-fma3-encoding.s.cs
│ │ │ ├── x86_64-fma4-encoding.s.cs
│ │ │ ├── x86_64-imm-widths.s.cs
│ │ │ ├── x86_64-rand-encoding.s.cs
│ │ │ ├── x86_64-rtm-encoding.s.cs
│ │ │ ├── x86_64-sse4a.s.cs
│ │ │ ├── x86_64-tbm-encoding.s.cs
│ │ │ └── x86_64-xop-encoding.s.cs
│ │ └── Xtensa/
│ │ ├── arith.s.cs
│ │ ├── branch.s.cs
│ │ ├── call-jump.s.cs
│ │ ├── memorder.s.cs
│ │ ├── memory.s.cs
│ │ ├── move.s.cs
│ │ ├── processor-control.s.cs
│ │ └── shift.s.cs
│ ├── README.md
│ ├── auto-sync/
│ │ ├── .gitignore
│ │ ├── ARCHITECTURE.md
│ │ ├── README.md
│ │ ├── RefactorGuide.md
│ │ ├── format_py.sh
│ │ ├── inc_patches/
│ │ │ └── ARM/
│ │ │ ├── 01_LDM_reg_lists_write_attribute.patch
│ │ │ ├── 02_vector_data_types.patch
│ │ │ ├── 03_vector_size.patch
│ │ │ └── 04_tPOP_reg_lists_write_attribute.patch
│ │ ├── intro.md
│ │ ├── pyproject.toml
│ │ ├── src/
│ │ │ └── autosync/
│ │ │ ├── ASUpdater.py
│ │ │ ├── HeaderPatcher.py
│ │ │ ├── Helper.py
│ │ │ ├── IncGenerator.py
│ │ │ ├── MCUpdater.py
│ │ │ ├── PathVarHandler.py
│ │ │ ├── Targets.py
│ │ │ ├── Tests/
│ │ │ │ ├── MCUpdaterTests/
│ │ │ │ │ ├── Disassembler/
│ │ │ │ │ │ ├── ARCH/
│ │ │ │ │ │ │ ├── test_a.txt
│ │ │ │ │ │ │ ├── test_b.txt
│ │ │ │ │ │ │ └── test_no_symbol.s.txt
│ │ │ │ │ │ └── SystemZ/
│ │ │ │ │ │ └── test_systemz_mapping.txt
│ │ │ │ │ ├── cps.s.cs
│ │ │ │ │ └── expected/
│ │ │ │ │ ├── fuzz/
│ │ │ │ │ │ ├── test_a.txt.cs
│ │ │ │ │ │ └── test_b.txt.cs
│ │ │ │ │ ├── merged/
│ │ │ │ │ │ ├── separated/
│ │ │ │ │ │ │ ├── test_a.txt.yaml
│ │ │ │ │ │ │ └── test_b.txt.yaml
│ │ │ │ │ │ └── unified/
│ │ │ │ │ │ ├── test_a.txt.yaml
│ │ │ │ │ │ └── test_b.txt.yaml
│ │ │ │ │ ├── mode_mapping/
│ │ │ │ │ │ └── test_systemz_mapping.txt.yaml
│ │ │ │ │ └── multi/
│ │ │ │ │ ├── separated/
│ │ │ │ │ │ ├── test_a_aarch64_v8a__fp_armv8.txt.yaml
│ │ │ │ │ │ ├── test_a_arm64_v8.2a.txt.yaml
│ │ │ │ │ │ └── test_b_arm64.txt.yaml
│ │ │ │ │ └── unified/
│ │ │ │ │ ├── test_a_aarch64_v8a__fp_armv8.txt.yaml
│ │ │ │ │ ├── test_a_arm64_v8.2a.txt.yaml
│ │ │ │ │ └── test_b_arm64.txt.yaml
│ │ │ │ ├── test_aarch64_header.h
│ │ │ │ ├── test_arm64_header.h
│ │ │ │ ├── test_header.h
│ │ │ │ ├── test_header_patcher.py
│ │ │ │ ├── test_include.inc
│ │ │ │ ├── test_mcupdater.py
│ │ │ │ ├── test_systemz_header.h
│ │ │ │ └── test_sysz_header.h
│ │ │ ├── cpptranslator/
│ │ │ │ ├── Configurator.py
│ │ │ │ ├── CppTranslator.py
│ │ │ │ ├── Differ.py
│ │ │ │ ├── README.md
│ │ │ │ ├── TemplateCollector.py
│ │ │ │ ├── Tests/
│ │ │ │ │ ├── Differ/
│ │ │ │ │ │ ├── expected/
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── new_src/
│ │ │ │ │ │ │ ├── diff_test_file.c
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── old_src/
│ │ │ │ │ │ │ ├── diff_test_file.c
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── output/
│ │ │ │ │ │ │ └── README.md
│ │ │ │ │ │ └── test_arch_config.json
│ │ │ │ │ ├── Patches/
│ │ │ │ │ │ ├── template_src.c
│ │ │ │ │ │ └── test_arch_config.json
│ │ │ │ │ ├── test_differ.py
│ │ │ │ │ ├── test_patches.py
│ │ │ │ │ └── test_unit.py
│ │ │ │ ├── arch_config.json
│ │ │ │ ├── patches/
│ │ │ │ │ ├── AddCSDetail.py
│ │ │ │ │ ├── AddOperand.py
│ │ │ │ │ ├── Assert.py
│ │ │ │ │ ├── BadConditionCode.py
│ │ │ │ │ ├── BitCastStdArray.py
│ │ │ │ │ ├── CheckDecoderStatus.py
│ │ │ │ │ ├── ClassConstructorDef.py
│ │ │ │ │ ├── ClassesDef.py
│ │ │ │ │ ├── ConstMCInstParameter.py
│ │ │ │ │ ├── ConstMCOperand.py
│ │ │ │ │ ├── CppInitCast.py
│ │ │ │ │ ├── CreateOperand0.py
│ │ │ │ │ ├── CreateOperand1.py
│ │ │ │ │ ├── Data.py
│ │ │ │ │ ├── DeclarationInConditionClause.py
│ │ │ │ │ ├── DecodeInstruction.py
│ │ │ │ │ ├── DecoderCast.py
│ │ │ │ │ ├── DecoderParameter.py
│ │ │ │ │ ├── FallThrough.py
│ │ │ │ │ ├── FeatureBits.py
│ │ │ │ │ ├── FeatureBitsDecl.py
│ │ │ │ │ ├── FieldFromInstr.py
│ │ │ │ │ ├── GetNumOperands.py
│ │ │ │ │ ├── GetOpcode.py
│ │ │ │ │ ├── GetOperand.py
│ │ │ │ │ ├── GetOperandRegImm.py
│ │ │ │ │ ├── GetRegClass.py
│ │ │ │ │ ├── GetRegFromClass.py
│ │ │ │ │ ├── GetSubReg.py
│ │ │ │ │ ├── Helper.py
│ │ │ │ │ ├── Includes.py
│ │ │ │ │ ├── InlineToStaticInline.py
│ │ │ │ │ ├── IsOptionalDef.py
│ │ │ │ │ ├── IsPredicate.py
│ │ │ │ │ ├── IsRegImm.py
│ │ │ │ │ ├── LLVMFallThrough.py
│ │ │ │ │ ├── LLVM_DEBUG.py
│ │ │ │ │ ├── LLVMunreachable.py
│ │ │ │ │ ├── MethodToFunctions.py
│ │ │ │ │ ├── MethodTypeQualifier.py
│ │ │ │ │ ├── NamespaceAnon.py
│ │ │ │ │ ├── NamespaceArch.py
│ │ │ │ │ ├── NamespaceLLVM.py
│ │ │ │ │ ├── OutStreamParam.py
│ │ │ │ │ ├── Override.py
│ │ │ │ │ ├── Patch.py
│ │ │ │ │ ├── PredicateBlockFunctions.py
│ │ │ │ │ ├── PrintAnnotation.py
│ │ │ │ │ ├── PrintRegImmShift.py
│ │ │ │ │ ├── QualifiedIdentifier.py
│ │ │ │ │ ├── ReferencesDecl.py
│ │ │ │ │ ├── RegClassContains.py
│ │ │ │ │ ├── STIArgument.py
│ │ │ │ │ ├── STIFeatureBits.py
│ │ │ │ │ ├── STParameter.py
│ │ │ │ │ ├── SetOpcode.py
│ │ │ │ │ ├── SignExtend.py
│ │ │ │ │ ├── Size.py
│ │ │ │ │ ├── SizeAssignments.py
│ │ │ │ │ ├── StreamOperation.py
│ │ │ │ │ ├── TemplateDeclaration.py
│ │ │ │ │ ├── TemplateDefinition.py
│ │ │ │ │ ├── TemplateParamDecl.py
│ │ │ │ │ ├── TemplateRefs.py
│ │ │ │ │ ├── UseMarkup.py
│ │ │ │ │ ├── UsingDeclaration.py
│ │ │ │ │ └── isUInt.py
│ │ │ │ ├── saved_patches.json
│ │ │ │ └── tree_sitter_compatibility.py
│ │ │ ├── inc_gen.json
│ │ │ ├── lit_config/
│ │ │ │ ├── README.md
│ │ │ │ ├── lit.cfg.py
│ │ │ │ └── lit.site.cfg.py
│ │ │ ├── mcupdater.json
│ │ │ └── path_vars.json
│ │ └── vendor/
│ │ └── README.md
│ ├── cstest/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── include/
│ │ │ ├── helper.h
│ │ │ ├── test_case.h
│ │ │ ├── test_compare.h
│ │ │ ├── test_detail.h
│ │ │ ├── test_detail_aarch64.h
│ │ │ ├── test_detail_alpha.h
│ │ │ ├── test_detail_arc.h
│ │ │ ├── test_detail_arm.h
│ │ │ ├── test_detail_bpf.h
│ │ │ ├── test_detail_evm.h
│ │ │ ├── test_detail_hppa.h
│ │ │ ├── test_detail_loongarch.h
│ │ │ ├── test_detail_m680x.h
│ │ │ ├── test_detail_m68k.h
│ │ │ ├── test_detail_mips.h
│ │ │ ├── test_detail_mos65xx.h
│ │ │ ├── test_detail_ppc.h
│ │ │ ├── test_detail_riscv.h
│ │ │ ├── test_detail_sh.h
│ │ │ ├── test_detail_sparc.h
│ │ │ ├── test_detail_systemz.h
│ │ │ ├── test_detail_tms320c64x.h
│ │ │ ├── test_detail_tricore.h
│ │ │ ├── test_detail_wasm.h
│ │ │ ├── test_detail_x86.h
│ │ │ ├── test_detail_xcore.h
│ │ │ ├── test_detail_xtensa.h
│ │ │ ├── test_mapping.h
│ │ │ └── test_run.h
│ │ ├── src/
│ │ │ ├── cstest.c
│ │ │ ├── helper.c
│ │ │ ├── test_case.c
│ │ │ ├── test_detail.c
│ │ │ ├── test_detail_aarch64.c
│ │ │ ├── test_detail_alpha.c
│ │ │ ├── test_detail_arc.c
│ │ │ ├── test_detail_arm.c
│ │ │ ├── test_detail_bpf.c
│ │ │ ├── test_detail_evm.c
│ │ │ ├── test_detail_hppa.c
│ │ │ ├── test_detail_loongarch.c
│ │ │ ├── test_detail_m680x.c
│ │ │ ├── test_detail_m68k.c
│ │ │ ├── test_detail_mips.c
│ │ │ ├── test_detail_mos65xx.c
│ │ │ ├── test_detail_ppc.c
│ │ │ ├── test_detail_riscv.c
│ │ │ ├── test_detail_sh.c
│ │ │ ├── test_detail_sparc.c
│ │ │ ├── test_detail_systemz.c
│ │ │ ├── test_detail_tms320c64x.c
│ │ │ ├── test_detail_tricore.c
│ │ │ ├── test_detail_wasm.c
│ │ │ ├── test_detail_x86.c
│ │ │ ├── test_detail_xcore.c
│ │ │ ├── test_detail_xtensa.c
│ │ │ └── test_run.c
│ │ └── test/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── empty_test_file.yaml
│ │ ├── integration_tests.py
│ │ ├── invalid_cs_input.yaml
│ │ ├── invalid_test_file.yaml
│ │ ├── min_valid_test_file.yaml
│ │ ├── missing_madatory_field.yaml
│ │ ├── some_dir/
│ │ │ └── some_other_dir/
│ │ │ └── min_valid_test_file.yaml
│ │ └── src/
│ │ └── unit_tests.c
│ ├── fuzz/
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── driverbin.c
│ │ ├── drivermc.c
│ │ ├── fuzz_decode_platform.c
│ │ ├── fuzz_diff.c
│ │ ├── fuzz_disasm.c
│ │ ├── fuzz_disasm.options
│ │ ├── fuzz_harness.c
│ │ ├── fuzz_llvm.cpp
│ │ ├── onefile.c
│ │ ├── platform.c
│ │ └── platform.h
│ ├── fuzz.py
│ ├── run_clang_format.sh
│ ├── run_clang_tidy.sh
│ ├── run_invalid_cstool.sh
│ ├── run_tests.py
│ └── test_corpus3.py
├── tests/
│ ├── MC/
│ │ ├── AArch64/
│ │ │ ├── CSSC/
│ │ │ │ ├── abs_32.s.yaml
│ │ │ │ ├── abs_64.s.yaml
│ │ │ │ ├── cnt_32.s.yaml
│ │ │ │ ├── cnt_64.s.yaml
│ │ │ │ ├── ctz_32.s.yaml
│ │ │ │ ├── ctz_64.s.yaml
│ │ │ │ ├── smax_32_imm.s.yaml
│ │ │ │ ├── smax_32_reg.s.yaml
│ │ │ │ ├── smax_64_imm.s.yaml
│ │ │ │ ├── smax_64_reg.s.yaml
│ │ │ │ ├── smin_32_imm.s.yaml
│ │ │ │ ├── smin_32_reg.s.yaml
│ │ │ │ ├── smin_64_imm.s.yaml
│ │ │ │ ├── smin_64_reg.s.yaml
│ │ │ │ ├── umax_32_imm.s.yaml
│ │ │ │ ├── umax_32_reg.s.yaml
│ │ │ │ ├── umax_64_imm.s.yaml
│ │ │ │ ├── umax_64_reg.s.yaml
│ │ │ │ ├── umin_32_imm.s.yaml
│ │ │ │ ├── umin_32_reg.s.yaml
│ │ │ │ ├── umin_64_imm.s.yaml
│ │ │ │ └── umin_64_reg.s.yaml
│ │ │ ├── FP8/
│ │ │ │ ├── dot.s.yaml
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── miscellaneous-fp8.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ └── system-regs.s.yaml
│ │ │ ├── FP8_SME2/
│ │ │ │ ├── cvt.s.yaml
│ │ │ │ ├── dot.s.yaml
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── fscale.s.yaml
│ │ │ │ ├── lut.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mopa.s.yaml
│ │ │ │ └── movt.s.yaml
│ │ │ ├── FP8_SVE2/
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtn.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── fmlal.s.yaml
│ │ │ │ ├── fmlall.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ └── luti4.s.yaml
│ │ │ ├── SME/
│ │ │ │ ├── addha-u32.s.yaml
│ │ │ │ ├── addha-u64.s.yaml
│ │ │ │ ├── addspl.s.yaml
│ │ │ │ ├── addsvl.s.yaml
│ │ │ │ ├── addva-u32.s.yaml
│ │ │ │ ├── addva-u64.s.yaml
│ │ │ │ ├── bfmopa.s.yaml
│ │ │ │ ├── bfmops.s.yaml
│ │ │ │ ├── fa64-implies-sve2.s.yaml
│ │ │ │ ├── feature.s.yaml
│ │ │ │ ├── fmopa-fp64.s.yaml
│ │ │ │ ├── fmopa.s.yaml
│ │ │ │ ├── fmops-fp64.s.yaml
│ │ │ │ ├── fmops.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1q.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── mova.s.yaml
│ │ │ │ ├── psel.s.yaml
│ │ │ │ ├── rdsvl.s.yaml
│ │ │ │ ├── revd.s.yaml
│ │ │ │ ├── sclamp.s.yaml
│ │ │ │ ├── smopa-32.s.yaml
│ │ │ │ ├── smopa-64.s.yaml
│ │ │ │ ├── smops-32.s.yaml
│ │ │ │ ├── smops-64.s.yaml
│ │ │ │ ├── smstart.s.yaml
│ │ │ │ ├── smstop.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1q.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── streaming-mode-neon-bf16.s.yaml
│ │ │ │ ├── streaming-mode-neon-fp16.s.yaml
│ │ │ │ ├── streaming-mode-neon.s.yaml
│ │ │ │ ├── sumopa-32.s.yaml
│ │ │ │ ├── sumopa-64.s.yaml
│ │ │ │ ├── sumops-32.s.yaml
│ │ │ │ ├── sumops-64.s.yaml
│ │ │ │ ├── system-regs-mpam.s.yaml
│ │ │ │ ├── system-regs.s.yaml
│ │ │ │ ├── uclamp.s.yaml
│ │ │ │ ├── umopa-32.s.yaml
│ │ │ │ ├── umopa-64.s.yaml
│ │ │ │ ├── umops-32.s.yaml
│ │ │ │ ├── umops-64.s.yaml
│ │ │ │ ├── usmopa-32.s.yaml
│ │ │ │ ├── usmopa-64.s.yaml
│ │ │ │ ├── usmops-32.s.yaml
│ │ │ │ ├── usmops-64.s.yaml
│ │ │ │ └── zero.s.yaml
│ │ │ ├── SME2/
│ │ │ │ ├── add.s.yaml
│ │ │ │ ├── bfadd.s.yaml
│ │ │ │ ├── bfclamp.s.yaml
│ │ │ │ ├── bfcvt.s.yaml
│ │ │ │ ├── bfcvtn.s.yaml
│ │ │ │ ├── bfdot.s.yaml
│ │ │ │ ├── bfmax.s.yaml
│ │ │ │ ├── bfmaxnm.s.yaml
│ │ │ │ ├── bfmin.s.yaml
│ │ │ │ ├── bfminnm.s.yaml
│ │ │ │ ├── bfmla.s.yaml
│ │ │ │ ├── bfmlal.s.yaml
│ │ │ │ ├── bfmls.s.yaml
│ │ │ │ ├── bfmlsl.s.yaml
│ │ │ │ ├── bfmopa.s.yaml
│ │ │ │ ├── bfmops.s.yaml
│ │ │ │ ├── bfsub.s.yaml
│ │ │ │ ├── bfvdot.s.yaml
│ │ │ │ ├── bmopa.s.yaml
│ │ │ │ ├── bmops.s.yaml
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fclamp.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtn.s.yaml
│ │ │ │ ├── fcvtzs.s.yaml
│ │ │ │ ├── fcvtzu.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── feature-sme2-implies-sme.s.yaml
│ │ │ │ ├── fmax.s.yaml
│ │ │ │ ├── fmaxnm.s.yaml
│ │ │ │ ├── fmin.s.yaml
│ │ │ │ ├── fminnm.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmlal.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmlsl.s.yaml
│ │ │ │ ├── frinta.s.yaml
│ │ │ │ ├── frintm.s.yaml
│ │ │ │ ├── frintn.s.yaml
│ │ │ │ ├── frintp.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── fvdot.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── mova.s.yaml
│ │ │ │ ├── movt.s.yaml
│ │ │ │ ├── sclamp.s.yaml
│ │ │ │ ├── scvtf.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── sel.s.yaml
│ │ │ │ ├── smax.s.yaml
│ │ │ │ ├── smin.s.yaml
│ │ │ │ ├── smlal.s.yaml
│ │ │ │ ├── smlall.s.yaml
│ │ │ │ ├── smlsl.s.yaml
│ │ │ │ ├── smlsll.s.yaml
│ │ │ │ ├── smopa.s.yaml
│ │ │ │ ├── smops.s.yaml
│ │ │ │ ├── sqcvt.s.yaml
│ │ │ │ ├── sqcvtn.s.yaml
│ │ │ │ ├── sqcvtu.s.yaml
│ │ │ │ ├── sqcvtun.s.yaml
│ │ │ │ ├── sqdmulh.s.yaml
│ │ │ │ ├── sqrshr.s.yaml
│ │ │ │ ├── sqrshrn.s.yaml
│ │ │ │ ├── sqrshru.s.yaml
│ │ │ │ ├── sqrshrun.s.yaml
│ │ │ │ ├── srshl.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── sub.s.yaml
│ │ │ │ ├── sudot.s.yaml
│ │ │ │ ├── sumlall.s.yaml
│ │ │ │ ├── sunpk.s.yaml
│ │ │ │ ├── suvdot.s.yaml
│ │ │ │ ├── svdot.s.yaml
│ │ │ │ ├── uclamp.s.yaml
│ │ │ │ ├── ucvtf.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umax.s.yaml
│ │ │ │ ├── umin.s.yaml
│ │ │ │ ├── umlal.s.yaml
│ │ │ │ ├── umlall.s.yaml
│ │ │ │ ├── umlsl.s.yaml
│ │ │ │ ├── umlsll.s.yaml
│ │ │ │ ├── umopa.s.yaml
│ │ │ │ ├── umops.s.yaml
│ │ │ │ ├── uqcvt.s.yaml
│ │ │ │ ├── uqcvtn.s.yaml
│ │ │ │ ├── uqrshr.s.yaml
│ │ │ │ ├── uqrshrn.s.yaml
│ │ │ │ ├── urshl.s.yaml
│ │ │ │ ├── usdot.s.yaml
│ │ │ │ ├── usmlall.s.yaml
│ │ │ │ ├── usvdot.s.yaml
│ │ │ │ ├── uunpk.s.yaml
│ │ │ │ ├── uvdot.s.yaml
│ │ │ │ ├── uzp.s.yaml
│ │ │ │ ├── zero.s.yaml
│ │ │ │ └── zip.s.yaml
│ │ │ ├── SME2p1/
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtl.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmopa.s.yaml
│ │ │ │ ├── fmops.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── movaz.s.yaml
│ │ │ │ └── zero.s.yaml
│ │ │ ├── SVE/
│ │ │ │ ├── abs.s.yaml
│ │ │ │ ├── add.s.yaml
│ │ │ │ ├── addpl.s.yaml
│ │ │ │ ├── addvl.s.yaml
│ │ │ │ ├── adr.s.yaml
│ │ │ │ ├── and.s.yaml
│ │ │ │ ├── ands.s.yaml
│ │ │ │ ├── andv.s.yaml
│ │ │ │ ├── armv9.5a-cpa.s.yaml
│ │ │ │ ├── asr.s.yaml
│ │ │ │ ├── asrd.s.yaml
│ │ │ │ ├── asrr.s.yaml
│ │ │ │ ├── bfcvt.s.yaml
│ │ │ │ ├── bfcvtnt.s.yaml
│ │ │ │ ├── bfdot.s.yaml
│ │ │ │ ├── bfmlal.s.yaml
│ │ │ │ ├── bfmmla.s.yaml
│ │ │ │ ├── bic.s.yaml
│ │ │ │ ├── bics.s.yaml
│ │ │ │ ├── brka.s.yaml
│ │ │ │ ├── brkas.s.yaml
│ │ │ │ ├── brkb.s.yaml
│ │ │ │ ├── brkbs.s.yaml
│ │ │ │ ├── brkn.s.yaml
│ │ │ │ ├── brkns.s.yaml
│ │ │ │ ├── brkpa.s.yaml
│ │ │ │ ├── brkpas.s.yaml
│ │ │ │ ├── brkpb.s.yaml
│ │ │ │ ├── brkpbs.s.yaml
│ │ │ │ ├── clasta.s.yaml
│ │ │ │ ├── clastb.s.yaml
│ │ │ │ ├── cls.s.yaml
│ │ │ │ ├── clz.s.yaml
│ │ │ │ ├── cmpeq.s.yaml
│ │ │ │ ├── cmpge.s.yaml
│ │ │ │ ├── cmpgt.s.yaml
│ │ │ │ ├── cmphi.s.yaml
│ │ │ │ ├── cmphs.s.yaml
│ │ │ │ ├── cmple.s.yaml
│ │ │ │ ├── cmplo.s.yaml
│ │ │ │ ├── cmpls.s.yaml
│ │ │ │ ├── cmplt.s.yaml
│ │ │ │ ├── cmpne.s.yaml
│ │ │ │ ├── cnot.s.yaml
│ │ │ │ ├── cnt.s.yaml
│ │ │ │ ├── cntb.s.yaml
│ │ │ │ ├── cntd.s.yaml
│ │ │ │ ├── cnth.s.yaml
│ │ │ │ ├── cntp.s.yaml
│ │ │ │ ├── cntw.s.yaml
│ │ │ │ ├── compact.s.yaml
│ │ │ │ ├── cpy.s.yaml
│ │ │ │ ├── ctermeq.s.yaml
│ │ │ │ ├── ctermne.s.yaml
│ │ │ │ ├── decb.s.yaml
│ │ │ │ ├── decd.s.yaml
│ │ │ │ ├── dech.s.yaml
│ │ │ │ ├── decp.s.yaml
│ │ │ │ ├── decw.s.yaml
│ │ │ │ ├── dot-req.s.yaml
│ │ │ │ ├── dup.s.yaml
│ │ │ │ ├── dupm.s.yaml
│ │ │ │ ├── eon.s.yaml
│ │ │ │ ├── eor.s.yaml
│ │ │ │ ├── eors.s.yaml
│ │ │ │ ├── eorv.s.yaml
│ │ │ │ ├── ext.s.yaml
│ │ │ │ ├── fabd.s.yaml
│ │ │ │ ├── fabs.s.yaml
│ │ │ │ ├── facge.s.yaml
│ │ │ │ ├── facgt.s.yaml
│ │ │ │ ├── facle.s.yaml
│ │ │ │ ├── faclt.s.yaml
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fadda.s.yaml
│ │ │ │ ├── faddv.s.yaml
│ │ │ │ ├── fcadd.s.yaml
│ │ │ │ ├── fcmeq.s.yaml
│ │ │ │ ├── fcmge.s.yaml
│ │ │ │ ├── fcmgt.s.yaml
│ │ │ │ ├── fcmla.s.yaml
│ │ │ │ ├── fcmle.s.yaml
│ │ │ │ ├── fcmlt.s.yaml
│ │ │ │ ├── fcmne.s.yaml
│ │ │ │ ├── fcmuo.s.yaml
│ │ │ │ ├── fcpy.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtzs.s.yaml
│ │ │ │ ├── fcvtzu.s.yaml
│ │ │ │ ├── fdiv.s.yaml
│ │ │ │ ├── fdivr.s.yaml
│ │ │ │ ├── fdup.s.yaml
│ │ │ │ ├── fexpa.s.yaml
│ │ │ │ ├── fmad.s.yaml
│ │ │ │ ├── fmax.s.yaml
│ │ │ │ ├── fmaxnm.s.yaml
│ │ │ │ ├── fmaxnmv.s.yaml
│ │ │ │ ├── fmaxv.s.yaml
│ │ │ │ ├── fmin.s.yaml
│ │ │ │ ├── fminnm.s.yaml
│ │ │ │ ├── fminnmv.s.yaml
│ │ │ │ ├── fminv.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmov.s.yaml
│ │ │ │ ├── fmsb.s.yaml
│ │ │ │ ├── fmul.s.yaml
│ │ │ │ ├── fmulx.s.yaml
│ │ │ │ ├── fneg.s.yaml
│ │ │ │ ├── fnmad.s.yaml
│ │ │ │ ├── fnmla.s.yaml
│ │ │ │ ├── fnmls.s.yaml
│ │ │ │ ├── fnmsb.s.yaml
│ │ │ │ ├── frecpe.s.yaml
│ │ │ │ ├── frecps.s.yaml
│ │ │ │ ├── frecpx.s.yaml
│ │ │ │ ├── frinta.s.yaml
│ │ │ │ ├── frinti.s.yaml
│ │ │ │ ├── frintm.s.yaml
│ │ │ │ ├── frintn.s.yaml
│ │ │ │ ├── frintp.s.yaml
│ │ │ │ ├── frintx.s.yaml
│ │ │ │ ├── frintz.s.yaml
│ │ │ │ ├── frsqrte.s.yaml
│ │ │ │ ├── frsqrts.s.yaml
│ │ │ │ ├── fscale.s.yaml
│ │ │ │ ├── fsqrt.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── fsubr.s.yaml
│ │ │ │ ├── ftmad.s.yaml
│ │ │ │ ├── ftsmul.s.yaml
│ │ │ │ ├── ftssel.s.yaml
│ │ │ │ ├── incb.s.yaml
│ │ │ │ ├── incd.s.yaml
│ │ │ │ ├── inch.s.yaml
│ │ │ │ ├── incp.s.yaml
│ │ │ │ ├── incw.s.yaml
│ │ │ │ ├── index.s.yaml
│ │ │ │ ├── insr.s.yaml
│ │ │ │ ├── lasta.s.yaml
│ │ │ │ ├── lastb.s.yaml
│ │ │ │ ├── ld1b-sve-only.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d-sve-only.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h-sve-only.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1rb.s.yaml
│ │ │ │ ├── ld1rd.s.yaml
│ │ │ │ ├── ld1rh.s.yaml
│ │ │ │ ├── ld1rqb.s.yaml
│ │ │ │ ├── ld1rqd.s.yaml
│ │ │ │ ├── ld1rqh.s.yaml
│ │ │ │ ├── ld1rqw.s.yaml
│ │ │ │ ├── ld1rsb.s.yaml
│ │ │ │ ├── ld1rsh.s.yaml
│ │ │ │ ├── ld1rsw.s.yaml
│ │ │ │ ├── ld1rw.s.yaml
│ │ │ │ ├── ld1sb-sve-only.s.yaml
│ │ │ │ ├── ld1sb.s.yaml
│ │ │ │ ├── ld1sh-sve-only.s.yaml
│ │ │ │ ├── ld1sh.s.yaml
│ │ │ │ ├── ld1sw-sve-only.s.yaml
│ │ │ │ ├── ld1sw.s.yaml
│ │ │ │ ├── ld1w-sve-only.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ld2b.s.yaml
│ │ │ │ ├── ld2d.s.yaml
│ │ │ │ ├── ld2h.s.yaml
│ │ │ │ ├── ld2w.s.yaml
│ │ │ │ ├── ld3b.s.yaml
│ │ │ │ ├── ld3d.s.yaml
│ │ │ │ ├── ld3h.s.yaml
│ │ │ │ ├── ld3w.s.yaml
│ │ │ │ ├── ld4b.s.yaml
│ │ │ │ ├── ld4d.s.yaml
│ │ │ │ ├── ld4h.s.yaml
│ │ │ │ ├── ld4w.s.yaml
│ │ │ │ ├── ldff1b.s.yaml
│ │ │ │ ├── ldff1d.s.yaml
│ │ │ │ ├── ldff1h.s.yaml
│ │ │ │ ├── ldff1sb.s.yaml
│ │ │ │ ├── ldff1sh.s.yaml
│ │ │ │ ├── ldff1sw.s.yaml
│ │ │ │ ├── ldff1w.s.yaml
│ │ │ │ ├── ldnf1b.s.yaml
│ │ │ │ ├── ldnf1d.s.yaml
│ │ │ │ ├── ldnf1h.s.yaml
│ │ │ │ ├── ldnf1sb.s.yaml
│ │ │ │ ├── ldnf1sh.s.yaml
│ │ │ │ ├── ldnf1sw.s.yaml
│ │ │ │ ├── ldnf1w.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── lsl.s.yaml
│ │ │ │ ├── lslr.s.yaml
│ │ │ │ ├── lsr.s.yaml
│ │ │ │ ├── lsrr.s.yaml
│ │ │ │ ├── mad.s.yaml
│ │ │ │ ├── matrix-multiply-fp32.s.yaml
│ │ │ │ ├── matrix-multiply-fp64.s.yaml
│ │ │ │ ├── matrix-multiply-int8.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mls.s.yaml
│ │ │ │ ├── mov.s.yaml
│ │ │ │ ├── movprfx.s.yaml
│ │ │ │ ├── movs.s.yaml
│ │ │ │ ├── msb.s.yaml
│ │ │ │ ├── mul.s.yaml
│ │ │ │ ├── nand.s.yaml
│ │ │ │ ├── nands.s.yaml
│ │ │ │ ├── neg.s.yaml
│ │ │ │ ├── nor.s.yaml
│ │ │ │ ├── nors.s.yaml
│ │ │ │ ├── not.s.yaml
│ │ │ │ ├── nots.s.yaml
│ │ │ │ ├── orn.s.yaml
│ │ │ │ ├── orns.s.yaml
│ │ │ │ ├── orr.s.yaml
│ │ │ │ ├── orrs.s.yaml
│ │ │ │ ├── orv.s.yaml
│ │ │ │ ├── pfalse.s.yaml
│ │ │ │ ├── pfirst.s.yaml
│ │ │ │ ├── pnext.s.yaml
│ │ │ │ ├── predicate-as-counter-aliases.s.yaml
│ │ │ │ ├── prfb-sve-only.s.yaml
│ │ │ │ ├── prfb.s.yaml
│ │ │ │ ├── prfd-sve-only.s.yaml
│ │ │ │ ├── prfd.s.yaml
│ │ │ │ ├── prfh-sve-only.s.yaml
│ │ │ │ ├── prfh.s.yaml
│ │ │ │ ├── prfw-sve-only.s.yaml
│ │ │ │ ├── prfw.s.yaml
│ │ │ │ ├── ptest.s.yaml
│ │ │ │ ├── ptrue.s.yaml
│ │ │ │ ├── ptrues.s.yaml
│ │ │ │ ├── punpkhi.s.yaml
│ │ │ │ ├── punpklo.s.yaml
│ │ │ │ ├── rbit.s.yaml
│ │ │ │ ├── rdffr.s.yaml
│ │ │ │ ├── rdffrs.s.yaml
│ │ │ │ ├── rdvl.s.yaml
│ │ │ │ ├── rev.s.yaml
│ │ │ │ ├── revb.s.yaml
│ │ │ │ ├── revh.s.yaml
│ │ │ │ ├── revw.s.yaml
│ │ │ │ ├── sabd.s.yaml
│ │ │ │ ├── saddv.s.yaml
│ │ │ │ ├── scvtf.s.yaml
│ │ │ │ ├── sdiv.s.yaml
│ │ │ │ ├── sdivr.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── sel.s.yaml
│ │ │ │ ├── setffr.s.yaml
│ │ │ │ ├── smax.s.yaml
│ │ │ │ ├── smaxv.s.yaml
│ │ │ │ ├── smin.s.yaml
│ │ │ │ ├── sminv.s.yaml
│ │ │ │ ├── smulh.s.yaml
│ │ │ │ ├── splice.s.yaml
│ │ │ │ ├── sqadd.s.yaml
│ │ │ │ ├── sqdecb.s.yaml
│ │ │ │ ├── sqdecd.s.yaml
│ │ │ │ ├── sqdech.s.yaml
│ │ │ │ ├── sqdecp.s.yaml
│ │ │ │ ├── sqdecw.s.yaml
│ │ │ │ ├── sqincb.s.yaml
│ │ │ │ ├── sqincd.s.yaml
│ │ │ │ ├── sqinch.s.yaml
│ │ │ │ ├── sqincp.s.yaml
│ │ │ │ ├── sqincw.s.yaml
│ │ │ │ ├── sqsub.s.yaml
│ │ │ │ ├── st1b-sve-only.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d-sve-only.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h-sve-only.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1w-sve-only.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── st2b.s.yaml
│ │ │ │ ├── st2d.s.yaml
│ │ │ │ ├── st2h.s.yaml
│ │ │ │ ├── st2w.s.yaml
│ │ │ │ ├── st3b.s.yaml
│ │ │ │ ├── st3d.s.yaml
│ │ │ │ ├── st3h.s.yaml
│ │ │ │ ├── st3w.s.yaml
│ │ │ │ ├── st4b.s.yaml
│ │ │ │ ├── st4d.s.yaml
│ │ │ │ ├── st4h.s.yaml
│ │ │ │ ├── st4w.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── sub.s.yaml
│ │ │ │ ├── subr.s.yaml
│ │ │ │ ├── sunpkhi.s.yaml
│ │ │ │ ├── sunpklo.s.yaml
│ │ │ │ ├── sxtb.s.yaml
│ │ │ │ ├── sxth.s.yaml
│ │ │ │ ├── sxtw.s.yaml
│ │ │ │ ├── system-regs.s.yaml
│ │ │ │ ├── tbl.s.yaml
│ │ │ │ ├── trn1.s.yaml
│ │ │ │ ├── trn2.s.yaml
│ │ │ │ ├── uabd.s.yaml
│ │ │ │ ├── uaddv.s.yaml
│ │ │ │ ├── ucvtf.s.yaml
│ │ │ │ ├── udiv.s.yaml
│ │ │ │ ├── udivr.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umax.s.yaml
│ │ │ │ ├── umaxv.s.yaml
│ │ │ │ ├── umin.s.yaml
│ │ │ │ ├── uminv.s.yaml
│ │ │ │ ├── umulh.s.yaml
│ │ │ │ ├── uqadd.s.yaml
│ │ │ │ ├── uqdecb.s.yaml
│ │ │ │ ├── uqdecd.s.yaml
│ │ │ │ ├── uqdech.s.yaml
│ │ │ │ ├── uqdecp.s.yaml
│ │ │ │ ├── uqdecw.s.yaml
│ │ │ │ ├── uqincb.s.yaml
│ │ │ │ ├── uqincd.s.yaml
│ │ │ │ ├── uqinch.s.yaml
│ │ │ │ ├── uqincp.s.yaml
│ │ │ │ ├── uqincw.s.yaml
│ │ │ │ ├── uqsub.s.yaml
│ │ │ │ ├── uunpkhi.s.yaml
│ │ │ │ ├── uunpklo.s.yaml
│ │ │ │ ├── uxtb.s.yaml
│ │ │ │ ├── uxth.s.yaml
│ │ │ │ ├── uxtw.s.yaml
│ │ │ │ ├── uzp1.s.yaml
│ │ │ │ ├── uzp2.s.yaml
│ │ │ │ ├── whilele.s.yaml
│ │ │ │ ├── whilelo.s.yaml
│ │ │ │ ├── whilels.s.yaml
│ │ │ │ ├── whilelt.s.yaml
│ │ │ │ ├── wrffr.s.yaml
│ │ │ │ ├── zip1.s.yaml
│ │ │ │ └── zip2.s.yaml
│ │ │ ├── SVE2/
│ │ │ │ ├── adclb.s.yaml
│ │ │ │ ├── adclt.s.yaml
│ │ │ │ ├── addhnb.s.yaml
│ │ │ │ ├── addhnt.s.yaml
│ │ │ │ ├── addp.s.yaml
│ │ │ │ ├── aesd.s.yaml
│ │ │ │ ├── aese.s.yaml
│ │ │ │ ├── aesimc.s.yaml
│ │ │ │ ├── aesmc.s.yaml
│ │ │ │ ├── bcax.s.yaml
│ │ │ │ ├── bdep.s.yaml
│ │ │ │ ├── bext.s.yaml
│ │ │ │ ├── bgrp.s.yaml
│ │ │ │ ├── bsl.s.yaml
│ │ │ │ ├── bsl1n.s.yaml
│ │ │ │ ├── bsl2n.s.yaml
│ │ │ │ ├── cadd.s.yaml
│ │ │ │ ├── cdot.s.yaml
│ │ │ │ ├── cmla.s.yaml
│ │ │ │ ├── eor3.s.yaml
│ │ │ │ ├── eorbt.s.yaml
│ │ │ │ ├── eortb.s.yaml
│ │ │ │ ├── ext.s.yaml
│ │ │ │ ├── faddp.s.yaml
│ │ │ │ ├── fcvtlt.s.yaml
│ │ │ │ ├── fcvtnt.s.yaml
│ │ │ │ ├── fcvtx.s.yaml
│ │ │ │ ├── fcvtxnt.s.yaml
│ │ │ │ ├── flogb.s.yaml
│ │ │ │ ├── fmaxnmp.s.yaml
│ │ │ │ ├── fmaxp.s.yaml
│ │ │ │ ├── fminnmp.s.yaml
│ │ │ │ ├── fminp.s.yaml
│ │ │ │ ├── fmlalb.s.yaml
│ │ │ │ ├── fmlalt.s.yaml
│ │ │ │ ├── fmlslb.s.yaml
│ │ │ │ ├── fmlslt.s.yaml
│ │ │ │ ├── histcnt.s.yaml
│ │ │ │ ├── histseg.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1sb.s.yaml
│ │ │ │ ├── ldnt1sh.s.yaml
│ │ │ │ ├── ldnt1sw.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── match.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mls.s.yaml
│ │ │ │ ├── mul.s.yaml
│ │ │ │ ├── nbsl.s.yaml
│ │ │ │ ├── nmatch.s.yaml
│ │ │ │ ├── pmul.s.yaml
│ │ │ │ ├── pmullb-128.s.yaml
│ │ │ │ ├── pmullb.s.yaml
│ │ │ │ ├── pmullt-128.s.yaml
│ │ │ │ ├── pmullt.s.yaml
│ │ │ │ ├── raddhnb.s.yaml
│ │ │ │ ├── raddhnt.s.yaml
│ │ │ │ ├── rax1.s.yaml
│ │ │ │ ├── rshrnb.s.yaml
│ │ │ │ ├── rshrnt.s.yaml
│ │ │ │ ├── rsubhnb.s.yaml
│ │ │ │ ├── rsubhnt.s.yaml
│ │ │ │ ├── saba.s.yaml
│ │ │ │ ├── sabalb.s.yaml
│ │ │ │ ├── sabalt.s.yaml
│ │ │ │ ├── sabdlb.s.yaml
│ │ │ │ ├── sabdlt.s.yaml
│ │ │ │ ├── sadalp.s.yaml
│ │ │ │ ├── saddlb.s.yaml
│ │ │ │ ├── saddlbt.s.yaml
│ │ │ │ ├── saddlt.s.yaml
│ │ │ │ ├── saddwb.s.yaml
│ │ │ │ ├── saddwt.s.yaml
│ │ │ │ ├── sbclb.s.yaml
│ │ │ │ ├── sbclt.s.yaml
│ │ │ │ ├── shadd.s.yaml
│ │ │ │ ├── shrnb.s.yaml
│ │ │ │ ├── shrnt.s.yaml
│ │ │ │ ├── shsub.s.yaml
│ │ │ │ ├── shsubr.s.yaml
│ │ │ │ ├── sli.s.yaml
│ │ │ │ ├── sm4e.s.yaml
│ │ │ │ ├── sm4ekey.s.yaml
│ │ │ │ ├── smaxp.s.yaml
│ │ │ │ ├── sminp.s.yaml
│ │ │ │ ├── smlalb.s.yaml
│ │ │ │ ├── smlalt.s.yaml
│ │ │ │ ├── smlslb.s.yaml
│ │ │ │ ├── smlslt.s.yaml
│ │ │ │ ├── smulh.s.yaml
│ │ │ │ ├── smullb.s.yaml
│ │ │ │ ├── smullt.s.yaml
│ │ │ │ ├── splice.s.yaml
│ │ │ │ ├── sqabs.s.yaml
│ │ │ │ ├── sqadd.s.yaml
│ │ │ │ ├── sqcadd.s.yaml
│ │ │ │ ├── sqdmlalb.s.yaml
│ │ │ │ ├── sqdmlalbt.s.yaml
│ │ │ │ ├── sqdmlalt.s.yaml
│ │ │ │ ├── sqdmlslb.s.yaml
│ │ │ │ ├── sqdmlslbt.s.yaml
│ │ │ │ ├── sqdmlslt.s.yaml
│ │ │ │ ├── sqdmulh.s.yaml
│ │ │ │ ├── sqdmullb.s.yaml
│ │ │ │ ├── sqdmullt.s.yaml
│ │ │ │ ├── sqneg.s.yaml
│ │ │ │ ├── sqrdcmlah.s.yaml
│ │ │ │ ├── sqrdmlah.s.yaml
│ │ │ │ ├── sqrdmlsh.s.yaml
│ │ │ │ ├── sqrdmulh.s.yaml
│ │ │ │ ├── sqrshl.s.yaml
│ │ │ │ ├── sqrshlr.s.yaml
│ │ │ │ ├── sqrshrnb.s.yaml
│ │ │ │ ├── sqrshrnt.s.yaml
│ │ │ │ ├── sqrshrunb.s.yaml
│ │ │ │ ├── sqrshrunt.s.yaml
│ │ │ │ ├── sqshl.s.yaml
│ │ │ │ ├── sqshlr.s.yaml
│ │ │ │ ├── sqshlu.s.yaml
│ │ │ │ ├── sqshrnb.s.yaml
│ │ │ │ ├── sqshrnt.s.yaml
│ │ │ │ ├── sqshrunb.s.yaml
│ │ │ │ ├── sqshrunt.s.yaml
│ │ │ │ ├── sqsub.s.yaml
│ │ │ │ ├── sqsubr.s.yaml
│ │ │ │ ├── sqxtnb.s.yaml
│ │ │ │ ├── sqxtnt.s.yaml
│ │ │ │ ├── sqxtunb.s.yaml
│ │ │ │ ├── sqxtunt.s.yaml
│ │ │ │ ├── srhadd.s.yaml
│ │ │ │ ├── sri.s.yaml
│ │ │ │ ├── srshl.s.yaml
│ │ │ │ ├── srshlr.s.yaml
│ │ │ │ ├── srshr.s.yaml
│ │ │ │ ├── srsra.s.yaml
│ │ │ │ ├── sshllb.s.yaml
│ │ │ │ ├── sshllt.s.yaml
│ │ │ │ ├── ssra.s.yaml
│ │ │ │ ├── ssublb.s.yaml
│ │ │ │ ├── ssublbt.s.yaml
│ │ │ │ ├── ssublt.s.yaml
│ │ │ │ ├── ssubltb.s.yaml
│ │ │ │ ├── ssubwb.s.yaml
│ │ │ │ ├── ssubwt.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── subhnb.s.yaml
│ │ │ │ ├── subhnt.s.yaml
│ │ │ │ ├── suqadd.s.yaml
│ │ │ │ ├── tbl.s.yaml
│ │ │ │ ├── tbx.s.yaml
│ │ │ │ ├── uaba.s.yaml
│ │ │ │ ├── uabalb.s.yaml
│ │ │ │ ├── uabalt.s.yaml
│ │ │ │ ├── uabdlb.s.yaml
│ │ │ │ ├── uabdlt.s.yaml
│ │ │ │ ├── uadalp.s.yaml
│ │ │ │ ├── uaddlb.s.yaml
│ │ │ │ ├── uaddlt.s.yaml
│ │ │ │ ├── uaddwb.s.yaml
│ │ │ │ ├── uaddwt.s.yaml
│ │ │ │ ├── uhadd.s.yaml
│ │ │ │ ├── uhsub.s.yaml
│ │ │ │ ├── uhsubr.s.yaml
│ │ │ │ ├── umaxp.s.yaml
│ │ │ │ ├── uminp.s.yaml
│ │ │ │ ├── umlalb.s.yaml
│ │ │ │ ├── umlalt.s.yaml
│ │ │ │ ├── umlslb.s.yaml
│ │ │ │ ├── umlslt.s.yaml
│ │ │ │ ├── umulh.s.yaml
│ │ │ │ ├── umullb.s.yaml
│ │ │ │ ├── umullt.s.yaml
│ │ │ │ ├── uqadd.s.yaml
│ │ │ │ ├── uqrshl.s.yaml
│ │ │ │ ├── uqrshlr.s.yaml
│ │ │ │ ├── uqrshrnb.s.yaml
│ │ │ │ ├── uqrshrnt.s.yaml
│ │ │ │ ├── uqshl.s.yaml
│ │ │ │ ├── uqshlr.s.yaml
│ │ │ │ ├── uqshrnb.s.yaml
│ │ │ │ ├── uqshrnt.s.yaml
│ │ │ │ ├── uqsub.s.yaml
│ │ │ │ ├── uqsubr.s.yaml
│ │ │ │ ├── uqxtnb.s.yaml
│ │ │ │ ├── uqxtnt.s.yaml
│ │ │ │ ├── urecpe.s.yaml
│ │ │ │ ├── urhadd.s.yaml
│ │ │ │ ├── urshl.s.yaml
│ │ │ │ ├── urshlr.s.yaml
│ │ │ │ ├── urshr.s.yaml
│ │ │ │ ├── ursqrte.s.yaml
│ │ │ │ ├── ursra.s.yaml
│ │ │ │ ├── ushllb.s.yaml
│ │ │ │ ├── ushllt.s.yaml
│ │ │ │ ├── usqadd.s.yaml
│ │ │ │ ├── usra.s.yaml
│ │ │ │ ├── usublb.s.yaml
│ │ │ │ ├── usublt.s.yaml
│ │ │ │ ├── usubwb.s.yaml
│ │ │ │ ├── usubwt.s.yaml
│ │ │ │ ├── whilege.s.yaml
│ │ │ │ ├── whilegt.s.yaml
│ │ │ │ ├── whilehi.s.yaml
│ │ │ │ ├── whilehs.s.yaml
│ │ │ │ ├── whilerw.s.yaml
│ │ │ │ ├── whilewr.s.yaml
│ │ │ │ └── xar.s.yaml
│ │ │ ├── SVE2p1/
│ │ │ │ ├── addqv.s.yaml
│ │ │ │ ├── andqv.s.yaml
│ │ │ │ ├── bfadd.s.yaml
│ │ │ │ ├── bfclamp.s.yaml
│ │ │ │ ├── bfmax.s.yaml
│ │ │ │ ├── bfmaxnm.s.yaml
│ │ │ │ ├── bfmin.s.yaml
│ │ │ │ ├── bfminnm.s.yaml
│ │ │ │ ├── bfmla.s.yaml
│ │ │ │ ├── bfmls.s.yaml
│ │ │ │ ├── bfmlslb.s.yaml
│ │ │ │ ├── bfmlslt.s.yaml
│ │ │ │ ├── bfmul.s.yaml
│ │ │ │ ├── bfsub.s.yaml
│ │ │ │ ├── cntp.s.yaml
│ │ │ │ ├── dupq.s.yaml
│ │ │ │ ├── eorqv.s.yaml
│ │ │ │ ├── extq.s.yaml
│ │ │ │ ├── faddqv.s.yaml
│ │ │ │ ├── fclamp.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── feature-sve2p1-implies-sve2.s.yaml
│ │ │ │ ├── fmaxnmqv.s.yaml
│ │ │ │ ├── fmaxqv.s.yaml
│ │ │ │ ├── fminnmqv.s.yaml
│ │ │ │ ├── fminqv.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1d_q.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1q.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ld1w_q.s.yaml
│ │ │ │ ├── ld2q.s.yaml
│ │ │ │ ├── ld3q.s.yaml
│ │ │ │ ├── ld4q.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── orqv.s.yaml
│ │ │ │ ├── pext.s.yaml
│ │ │ │ ├── pmov.s.yaml
│ │ │ │ ├── ptrue.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── smaxqv.s.yaml
│ │ │ │ ├── sminqv.s.yaml
│ │ │ │ ├── sqcvtn.s.yaml
│ │ │ │ ├── sqcvtun.s.yaml
│ │ │ │ ├── sqrshrn.s.yaml
│ │ │ │ ├── sqrshrun.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1d_q.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1q.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── st1w_q.s.yaml
│ │ │ │ ├── st2q.s.yaml
│ │ │ │ ├── st3q.s.yaml
│ │ │ │ ├── st4q.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── tblq.s.yaml
│ │ │ │ ├── tbxq.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umaxqv.s.yaml
│ │ │ │ ├── uminqv.s.yaml
│ │ │ │ ├── uqcvtn.s.yaml
│ │ │ │ ├── uqrshrn.s.yaml
│ │ │ │ ├── uzpq1.s.yaml
│ │ │ │ ├── uzpq2.s.yaml
│ │ │ │ ├── whilege.s.yaml
│ │ │ │ ├── whilegt.s.yaml
│ │ │ │ ├── whilehi.s.yaml
│ │ │ │ ├── whilehs.s.yaml
│ │ │ │ ├── whilele.s.yaml
│ │ │ │ ├── whilelo.s.yaml
│ │ │ │ ├── whilels.s.yaml
│ │ │ │ ├── whilelt.s.yaml
│ │ │ │ ├── zipq1.s.yaml
│ │ │ │ └── zipq2.s.yaml
│ │ │ ├── a64-ignored-fields.txt.yaml
│ │ │ ├── apple_proprietary.yaml
│ │ │ ├── arm64-basic-a64-instructions.s.yaml
│ │ │ ├── arm64-nv-cond.s.yaml
│ │ │ ├── arm64-target-specific-sysreg.s.yaml
│ │ │ ├── arm64-verbose-vector-case.s.yaml
│ │ │ ├── arm64e.s.yaml
│ │ │ ├── armv8.1a-vhe.s.yaml
│ │ │ ├── armv8.2a-at.s.yaml
│ │ │ ├── armv8.2a-dotprod.s.yaml
│ │ │ ├── armv8.2a-persistent-memory.s.yaml
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.s.yaml
│ │ │ ├── armv8.3a-complex.s.yaml
│ │ │ ├── armv8.3a-complex_nofp16.s.yaml
│ │ │ ├── armv8.3a-js.s.yaml
│ │ │ ├── armv8.3a-pauth.s.yaml
│ │ │ ├── armv8.3a-rcpc.s.yaml
│ │ │ ├── armv8.3a-signed-pointer.s.yaml
│ │ │ ├── armv8.4a-flag.s.yaml
│ │ │ ├── armv8.4a-flagm.s.yaml
│ │ │ ├── armv8.4a-ldst.s.yaml
│ │ │ ├── armv8.4a-trace.s.yaml
│ │ │ ├── armv8.4a-virt.s.yaml
│ │ │ ├── armv8.4a-vncr.s.yaml
│ │ │ ├── armv8.5a-altnzcv.s.yaml
│ │ │ ├── armv8.5a-bti.s.yaml
│ │ │ ├── armv8.5a-frint.s.yaml
│ │ │ ├── armv8.5a-mte.s.yaml
│ │ │ ├── armv8.5a-persistent-memory.s.yaml
│ │ │ ├── armv8.5a-predres.s.yaml
│ │ │ ├── armv8.5a-rand.s.yaml
│ │ │ ├── armv8.5a-sb.s.yaml
│ │ │ ├── armv8.5a-specrestrict.s.yaml
│ │ │ ├── armv8.5a-ssbs.s.yaml
│ │ │ ├── armv8.6a-amvs.s.yaml
│ │ │ ├── armv8.6a-bf16.s.yaml
│ │ │ ├── armv8.6a-fgt.s.yaml
│ │ │ ├── armv8.6a-simd-matmul.s.yaml
│ │ │ ├── armv8.7a-hcx.s.yaml
│ │ │ ├── armv8.7a-wfxt.s.yaml
│ │ │ ├── armv8.8a-nmi.s.yaml
│ │ │ ├── armv8.9a-ats1a.s.yaml
│ │ │ ├── armv8.9a-clrbhb.s.yaml
│ │ │ ├── armv8.9a-cssc.s.yaml
│ │ │ ├── armv8.9a-debug-pmu.s.yaml
│ │ │ ├── armv8.9a-lrcpc3.s.yaml
│ │ │ ├── armv8.9a-lrcpc3.txt.yaml
│ │ │ ├── armv8.9a-pfar.s.yaml
│ │ │ ├── armv8.9a-prfm-slc.s.yaml
│ │ │ ├── armv8.9a-rasv2.s.yaml
│ │ │ ├── armv8.9a-specres2.s.yaml
│ │ │ ├── armv8a-fpmul.s.yaml
│ │ │ ├── armv8r-inst.s.yaml
│ │ │ ├── armv8r-sysreg.s.yaml
│ │ │ ├── armv8r-unsupported-inst.s.yaml
│ │ │ ├── armv8r-unsupported-sysreg.s.yaml
│ │ │ ├── armv9-sysreg128.txt.yaml
│ │ │ ├── armv9.4a-chk.s.yaml
│ │ │ ├── armv9.4a-ebep.s.yaml
│ │ │ ├── armv9.4a-gcs.s.yaml
│ │ │ ├── armv9.5a-cpa.s.yaml
│ │ │ ├── armv9.5a-e3dse.s.yaml
│ │ │ ├── armv9.5a-fgwte3.s.yaml
│ │ │ ├── armv9.5a-hacdbs.s.yaml
│ │ │ ├── armv9.5a-hdbss.s.yaml
│ │ │ ├── armv9.5a-pauthlr.s.yaml
│ │ │ ├── armv9.5a-spmu2.s.yaml
│ │ │ ├── armv9.5a-step2.s.yaml
│ │ │ ├── armv9.5a-tlbiw.s.yaml
│ │ │ ├── armv9a-mec.s.yaml
│ │ │ ├── basic-a64-instructions.s.yaml
│ │ │ ├── case-insen-reg-names.s.yaml
│ │ │ ├── dot-req.s.yaml
│ │ │ ├── ete-sysregs.s.yaml
│ │ │ ├── gicv3-regs.s.yaml
│ │ │ ├── neon-2velem.s.yaml
│ │ │ ├── neon-3vdiff.s.yaml
│ │ │ ├── neon-aba-abd.s.yaml
│ │ │ ├── neon-across.s.yaml
│ │ │ ├── neon-add-pairwise.s.yaml
│ │ │ ├── neon-add-sub-instructions.s.yaml
│ │ │ ├── neon-bitwise-instructions.s.yaml
│ │ │ ├── neon-compare-instructions.s.yaml
│ │ │ ├── neon-crypto.s.yaml
│ │ │ ├── neon-extract.s.yaml
│ │ │ ├── neon-facge-facgt.s.yaml
│ │ │ ├── neon-frsqrt-frecp.s.yaml
│ │ │ ├── neon-halving-add-sub.s.yaml
│ │ │ ├── neon-max-min-pairwise.s.yaml
│ │ │ ├── neon-max-min.s.yaml
│ │ │ ├── neon-mla-mls-instructions.s.yaml
│ │ │ ├── neon-mov.s.yaml
│ │ │ ├── neon-mul-div-instructions.s.yaml
│ │ │ ├── neon-perm.s.yaml
│ │ │ ├── neon-rounding-halving-add.s.yaml
│ │ │ ├── neon-rounding-shift.s.yaml
│ │ │ ├── neon-saturating-add-sub.s.yaml
│ │ │ ├── neon-saturating-rounding-shift.s.yaml
│ │ │ ├── neon-saturating-shift.s.yaml
│ │ │ ├── neon-scalar-abs.s.yaml
│ │ │ ├── neon-scalar-add-sub.s.yaml
│ │ │ ├── neon-scalar-by-elem-mla.s.yaml
│ │ │ ├── neon-scalar-by-elem-mul.s.yaml
│ │ │ ├── neon-scalar-by-elem-saturating-mla.s.yaml
│ │ │ ├── neon-scalar-by-elem-saturating-mul.s.yaml
│ │ │ ├── neon-scalar-compare.s.yaml
│ │ │ ├── neon-scalar-cvt.s.yaml
│ │ │ ├── neon-scalar-dup.s.yaml
│ │ │ ├── neon-scalar-extract-narrow.s.yaml
│ │ │ ├── neon-scalar-fp-compare.s.yaml
│ │ │ ├── neon-scalar-mul.s.yaml
│ │ │ ├── neon-scalar-neg.s.yaml
│ │ │ ├── neon-scalar-recip.s.yaml
│ │ │ ├── neon-scalar-reduce-pairwise.s.yaml
│ │ │ ├── neon-scalar-rounding-shift.s.yaml
│ │ │ ├── neon-scalar-saturating-add-sub.s.yaml
│ │ │ ├── neon-scalar-saturating-rounding-shift.s.yaml
│ │ │ ├── neon-scalar-saturating-shift.s.yaml
│ │ │ ├── neon-scalar-shift-imm.s.yaml
│ │ │ ├── neon-scalar-shift.s.yaml
│ │ │ ├── neon-shift-left-long.s.yaml
│ │ │ ├── neon-shift.s.yaml
│ │ │ ├── neon-simd-copy.s.yaml
│ │ │ ├── neon-simd-ldst-multi-elem.s.yaml
│ │ │ ├── neon-simd-ldst-one-elem.s.yaml
│ │ │ ├── neon-simd-misc.s.yaml
│ │ │ ├── neon-simd-post-ldst-multi-elem.s.yaml
│ │ │ ├── neon-simd-shift.s.yaml
│ │ │ ├── neon-sxtl.s.yaml
│ │ │ ├── neon-tbl.s.yaml
│ │ │ ├── neon-uxtl.s.yaml
│ │ │ ├── ras-extension.s.yaml
│ │ │ ├── rprfm.s.yaml
│ │ │ ├── spe.s.yaml
│ │ │ ├── speculation-barriers.s.yaml
│ │ │ ├── tme.s.yaml
│ │ │ ├── trace-regs.s.yaml
│ │ │ ├── trbe-sysreg.s.yaml
│ │ │ └── udf.s.yaml
│ │ ├── ARC/
│ │ │ ├── alu_arc.s.yaml
│ │ │ ├── br_arc.s.yaml
│ │ │ ├── compact_arc.s.yaml
│ │ │ ├── ldst_arc.s.yaml
│ │ │ └── misc_arc.s.yaml
│ │ ├── ARM/
│ │ │ ├── arm-aliases.s.yaml
│ │ │ ├── arm-arithmetic-aliases.s.yaml
│ │ │ ├── arm-branches.s.yaml
│ │ │ ├── arm-it-block.s.yaml
│ │ │ ├── arm-memory-instructions.s.yaml
│ │ │ ├── arm-shift-encoding.s.yaml
│ │ │ ├── arm-thumb-trustzone.s.yaml
│ │ │ ├── arm-trustzone.s.yaml
│ │ │ ├── arm_addrmode2.s.yaml
│ │ │ ├── arm_addrmode3.s.yaml
│ │ │ ├── arm_instructions.s.yaml
│ │ │ ├── armv8.1m-pacbti.s.yaml
│ │ │ ├── armv8.2a-dotprod-a32.s.yaml
│ │ │ ├── armv8.2a-dotprod-t32.s.yaml
│ │ │ ├── armv8.5a-sb.s.yaml
│ │ │ ├── armv8a-fpmul.s.yaml
│ │ │ ├── basic-arm-instructions-v8.s.yaml
│ │ │ ├── basic-arm-instructions.s.yaml
│ │ │ ├── basic-thumb-instructions.s.yaml
│ │ │ ├── basic-thumb2-instructions.s.yaml
│ │ │ ├── bfloat16-a32.s.yaml
│ │ │ ├── bfloat16-t32.s.yaml
│ │ │ ├── cde-integer.s.yaml
│ │ │ ├── cde-vec-pred.s.yaml
│ │ │ ├── clrm-asm.s.yaml
│ │ │ ├── cps.s.yaml
│ │ │ ├── crc32-thumb.s.yaml
│ │ │ ├── crc32.s.yaml
│ │ │ ├── dot-req.s.yaml
│ │ │ ├── fconst.s.yaml
│ │ │ ├── fp-armv8.s.yaml
│ │ │ ├── fpv8.s.yaml
│ │ │ ├── gas-compl-copr-reg.s.yaml
│ │ │ ├── idiv-thumb.s.yaml
│ │ │ ├── idiv.s.yaml
│ │ │ ├── implicit-it-generation.s.yaml
│ │ │ ├── ldrd-strd-gnu-arm.s.yaml
│ │ │ ├── ldrd-strd-gnu-thumb.s.yaml
│ │ │ ├── load-store-acquire-release-v8-thumb.s.yaml
│ │ │ ├── load-store-acquire-release-v8.s.yaml
│ │ │ ├── mve-bitops.s.yaml
│ │ │ ├── mve-float.s.yaml
│ │ │ ├── mve-integer.s.yaml
│ │ │ ├── mve-interleave.s.yaml
│ │ │ ├── mve-load-store.s.yaml
│ │ │ ├── mve-minmax.s.yaml
│ │ │ ├── mve-misc.s.yaml
│ │ │ ├── mve-qdest-qsrc.s.yaml
│ │ │ ├── mve-qdest-rsrc.s.yaml
│ │ │ ├── mve-reductions-fp.s.yaml
│ │ │ ├── mve-reductions.s.yaml
│ │ │ ├── mve-scalar-shift.s.yaml
│ │ │ ├── mve-shifts.s.yaml
│ │ │ ├── mve-vcmp.s.yaml
│ │ │ ├── mve-vmov-pair.s.yaml
│ │ │ ├── mve-vpt.s.yaml
│ │ │ ├── negative-immediates.s.yaml
│ │ │ ├── neon-abs-encoding.s.yaml
│ │ │ ├── neon-absdiff-encoding.s.yaml
│ │ │ ├── neon-add-encoding.s.yaml
│ │ │ ├── neon-bitcount-encoding.s.yaml
│ │ │ ├── neon-bitwise-encoding.s.yaml
│ │ │ ├── neon-cmp-encoding.s.yaml
│ │ │ ├── neon-convert-encoding.s.yaml
│ │ │ ├── neon-crypto.s.yaml
│ │ │ ├── neon-dup-encoding.s.yaml
│ │ │ ├── neon-minmax-encoding.s.yaml
│ │ │ ├── neon-mov-encoding.s.yaml
│ │ │ ├── neon-mul-accum-encoding.s.yaml
│ │ │ ├── neon-mul-encoding.s.yaml
│ │ │ ├── neon-neg-encoding.s.yaml
│ │ │ ├── neon-pairwise-encoding.s.yaml
│ │ │ ├── neon-reciprocal-encoding.s.yaml
│ │ │ ├── neon-reverse-encoding.s.yaml
│ │ │ ├── neon-satshift-encoding.s.yaml
│ │ │ ├── neon-shift-encoding.s.yaml
│ │ │ ├── neon-shiftaccum-encoding.s.yaml
│ │ │ ├── neon-shuffle-encoding.s.yaml
│ │ │ ├── neon-sub-encoding.s.yaml
│ │ │ ├── neon-table-encoding.s.yaml
│ │ │ ├── neon-v8.s.yaml
│ │ │ ├── neon-vld-encoding.s.yaml
│ │ │ ├── neon-vld-vst-align.s.yaml
│ │ │ ├── neon-vst-encoding.s.yaml
│ │ │ ├── neon-vswp.s.yaml
│ │ │ ├── neont2-abs-encoding.s.yaml
│ │ │ ├── neont2-absdiff-encoding.s.yaml
│ │ │ ├── neont2-add-encoding.s.yaml
│ │ │ ├── neont2-bitcount-encoding.s.yaml
│ │ │ ├── neont2-bitwise-encoding.s.yaml
│ │ │ ├── neont2-cmp-encoding.s.yaml
│ │ │ ├── neont2-convert-encoding.s.yaml
│ │ │ ├── neont2-dup-encoding.s.yaml
│ │ │ ├── neont2-minmax-encoding.s.yaml
│ │ │ ├── neont2-mov-encoding.s.yaml
│ │ │ ├── neont2-mul-accum-encoding.s.yaml
│ │ │ ├── neont2-mul-encoding.s.yaml
│ │ │ ├── neont2-neg-encoding.s.yaml
│ │ │ ├── neont2-pairwise-encoding.s.yaml
│ │ │ ├── neont2-reciprocal-encoding.s.yaml
│ │ │ ├── neont2-reverse-encoding.s.yaml
│ │ │ ├── neont2-satshift-encoding.s.yaml
│ │ │ ├── neont2-shift-encoding.s.yaml
│ │ │ ├── neont2-shiftaccum-encoding.s.yaml
│ │ │ ├── neont2-shuffle-encoding.s.yaml
│ │ │ ├── neont2-sub-encoding.s.yaml
│ │ │ ├── neont2-table-encoding.s.yaml
│ │ │ ├── neont2-vld-encoding.s.yaml
│ │ │ ├── neont2-vst-encoding.s.yaml
│ │ │ ├── simple-fp-encoding.s.yaml
│ │ │ ├── thumb-add-sub-width.s.yaml
│ │ │ ├── thumb-fp-armv8.s.yaml
│ │ │ ├── thumb-hints.s.yaml
│ │ │ ├── thumb-mov.s.yaml
│ │ │ ├── thumb-neon-crypto.s.yaml
│ │ │ ├── thumb-neon-v8.s.yaml
│ │ │ ├── thumb-shift-encoding.s.yaml
│ │ │ ├── thumb.s.yaml
│ │ │ ├── thumb2-b.w-encodingT4.s.yaml
│ │ │ ├── thumb2-branches.s.yaml
│ │ │ ├── thumb2-bxj-v8.s.yaml
│ │ │ ├── thumb2-bxj.s.yaml
│ │ │ ├── thumb2-ldr.w-str.w.s.yaml
│ │ │ ├── thumb2-ldrexd-strexd.s.yaml
│ │ │ ├── thumb2-mclass.s.yaml
│ │ │ ├── thumb2-narrow-dp.ll.yaml
│ │ │ ├── thumb2-pldw.s.yaml
│ │ │ ├── thumb_rewrites.s.yaml
│ │ │ ├── thumbv7em.s.yaml
│ │ │ ├── thumbv7m.s.yaml
│ │ │ ├── thumbv8.1m-vmrs-vmsr.s.yaml
│ │ │ ├── thumbv8.1m.s.yaml
│ │ │ ├── thumbv8m.s.yaml
│ │ │ ├── udf-arm.s.yaml
│ │ │ ├── udf-thumb-2.s.yaml
│ │ │ ├── udf-thumb.s.yaml
│ │ │ ├── vfp4-thumb.s.yaml
│ │ │ ├── vfp4.s.yaml
│ │ │ ├── vmov-vmvn-replicate.s.yaml
│ │ │ ├── vmovhr.s.yaml
│ │ │ ├── vpush-vpop-thumb.s.yaml
│ │ │ ├── vpush-vpop.s.yaml
│ │ │ ├── vscclrm-asm.s.yaml
│ │ │ └── vstrldr_sys.s.yaml
│ │ ├── Alpha/
│ │ │ ├── insn-alpha-be.s.yaml
│ │ │ └── insn-alpha.s.yaml
│ │ ├── BPF/
│ │ │ ├── classic-all.yaml
│ │ │ ├── classic-be.yaml
│ │ │ ├── extended-all.yaml
│ │ │ └── extended-be.yaml
│ │ ├── HPPA/
│ │ │ ├── alu11.s.yaml
│ │ │ ├── arith_imm11.s.yaml
│ │ │ ├── assist20.s.yaml
│ │ │ ├── branch11.s.yaml
│ │ │ ├── branch20.s.yaml
│ │ │ ├── computation20.s.yaml
│ │ │ ├── copr_dw11.s.yaml
│ │ │ ├── float11.s.yaml
│ │ │ ├── float20.s.yaml
│ │ │ ├── index_mem11.s.yaml
│ │ │ ├── longimm20.s.yaml
│ │ │ ├── mem_mgmt11.s.yaml
│ │ │ ├── memory_reference20.s.yaml
│ │ │ ├── multimedia20.s.yaml
│ │ │ ├── no_grp11.s.yaml
│ │ │ ├── sfu11.s.yaml
│ │ │ ├── shexdep11.s.yaml
│ │ │ ├── sysctrl20.s.yaml
│ │ │ └── system_op11.s.yaml
│ │ ├── LoongArch/
│ │ │ ├── absd.s.yaml
│ │ │ ├── add.s.yaml
│ │ │ ├── adda.s.yaml
│ │ │ ├── addi.s.yaml
│ │ │ ├── addw.s.yaml
│ │ │ ├── and.s.yaml
│ │ │ ├── andi.s.yaml
│ │ │ ├── andn.s.yaml
│ │ │ ├── arith.s.yaml
│ │ │ ├── arm-alu.s.yaml
│ │ │ ├── arm-jump.s.yaml
│ │ │ ├── arm-mov.s.yaml
│ │ │ ├── arm-shift.s.yaml
│ │ │ ├── atomic.s.yaml
│ │ │ ├── avg.s.yaml
│ │ │ ├── avgr.s.yaml
│ │ │ ├── barrier.s.yaml
│ │ │ ├── base.s.yaml
│ │ │ ├── bit-manipu.s.yaml
│ │ │ ├── bit-shift.s.yaml
│ │ │ ├── bitclr.s.yaml
│ │ │ ├── bitrev.s.yaml
│ │ │ ├── bitsel.s.yaml
│ │ │ ├── bitseli.s.yaml
│ │ │ ├── bitset.s.yaml
│ │ │ ├── bound-check.s.yaml
│ │ │ ├── branch.s.yaml
│ │ │ ├── bsll.s.yaml
│ │ │ ├── bsrl.s.yaml
│ │ │ ├── clo.s.yaml
│ │ │ ├── clz.s.yaml
│ │ │ ├── crc.s.yaml
│ │ │ ├── d-arith.s.yaml
│ │ │ ├── d-bound-check.s.yaml
│ │ │ ├── d-branch.s.yaml
│ │ │ ├── d-comp.s.yaml
│ │ │ ├── d-conv.s.yaml
│ │ │ ├── d-memory.s.yaml
│ │ │ ├── d-move.s.yaml
│ │ │ ├── div.s.yaml
│ │ │ ├── ext2xv.s.yaml
│ │ │ ├── exth.s.yaml
│ │ │ ├── extl.s.yaml
│ │ │ ├── extrins.s.yaml
│ │ │ ├── f-arith.s.yaml
│ │ │ ├── f-bound-check.s.yaml
│ │ │ ├── f-branch.s.yaml
│ │ │ ├── f-comp.s.yaml
│ │ │ ├── f-conv.s.yaml
│ │ │ ├── f-memory.s.yaml
│ │ │ ├── f-move.s.yaml
│ │ │ ├── fadd.s.yaml
│ │ │ ├── fclass.s.yaml
│ │ │ ├── fcmp.s.yaml
│ │ │ ├── fcvt.s.yaml
│ │ │ ├── fcvth.s.yaml
│ │ │ ├── fcvtl.s.yaml
│ │ │ ├── fdiv.s.yaml
│ │ │ ├── ffint.s.yaml
│ │ │ ├── flogb.s.yaml
│ │ │ ├── fmadd.s.yaml
│ │ │ ├── fmax.s.yaml
│ │ │ ├── fmaxa.s.yaml
│ │ │ ├── fmin.s.yaml
│ │ │ ├── fmina.s.yaml
│ │ │ ├── fmsub.s.yaml
│ │ │ ├── fmul.s.yaml
│ │ │ ├── fnmadd.s.yaml
│ │ │ ├── fnmsub.s.yaml
│ │ │ ├── frecip.s.yaml
│ │ │ ├── frint.s.yaml
│ │ │ ├── frsqrt.s.yaml
│ │ │ ├── frstp.s.yaml
│ │ │ ├── fsqrt.s.yaml
│ │ │ ├── fsub.s.yaml
│ │ │ ├── ftint.s.yaml
│ │ │ ├── haddw.s.yaml
│ │ │ ├── hsubw.s.yaml
│ │ │ ├── ilv.s.yaml
│ │ │ ├── insgr2vr.s.yaml
│ │ │ ├── insve0.s.yaml
│ │ │ ├── ld.s.yaml
│ │ │ ├── ldrepl.s.yaml
│ │ │ ├── lvz.s.yaml
│ │ │ ├── madd.s.yaml
│ │ │ ├── maddw.s.yaml
│ │ │ ├── max.s.yaml
│ │ │ ├── memory.s.yaml
│ │ │ ├── min.s.yaml
│ │ │ ├── misc.s.yaml
│ │ │ ├── mod.s.yaml
│ │ │ ├── mskgez.s.yaml
│ │ │ ├── mskltz.s.yaml
│ │ │ ├── msknz.s.yaml
│ │ │ ├── msub.s.yaml
│ │ │ ├── muh.s.yaml
│ │ │ ├── mul.s.yaml
│ │ │ ├── mulw.s.yaml
│ │ │ ├── neg.s.yaml
│ │ │ ├── nor.s.yaml
│ │ │ ├── nori.s.yaml
│ │ │ ├── or.s.yaml
│ │ │ ├── ori.s.yaml
│ │ │ ├── orn.s.yaml
│ │ │ ├── pack.s.yaml
│ │ │ ├── pcnt.s.yaml
│ │ │ ├── perm.s.yaml
│ │ │ ├── permi.s.yaml
│ │ │ ├── pick.s.yaml
│ │ │ ├── pickve.s.yaml
│ │ │ ├── pickve2gr.s.yaml
│ │ │ ├── pseudos.s.yaml
│ │ │ ├── repl128vei.s.yaml
│ │ │ ├── replgr2vr.s.yaml
│ │ │ ├── replve.s.yaml
│ │ │ ├── replve0.s.yaml
│ │ │ ├── replvei.s.yaml
│ │ │ ├── rotr.s.yaml
│ │ │ ├── sadd.s.yaml
│ │ │ ├── sat.s.yaml
│ │ │ ├── scr.s.yaml
│ │ │ ├── seq.s.yaml
│ │ │ ├── set.s.yaml
│ │ │ ├── setallnez.s.yaml
│ │ │ ├── setanyeqz.s.yaml
│ │ │ ├── shuf.s.yaml
│ │ │ ├── shuf4i.s.yaml
│ │ │ ├── signcov.s.yaml
│ │ │ ├── sle.s.yaml
│ │ │ ├── sll.s.yaml
│ │ │ ├── sllwil.s.yaml
│ │ │ ├── slt.s.yaml
│ │ │ ├── sra.s.yaml
│ │ │ ├── sran.s.yaml
│ │ │ ├── srani.s.yaml
│ │ │ ├── srar.s.yaml
│ │ │ ├── srarn.s.yaml
│ │ │ ├── srarni.s.yaml
│ │ │ ├── srl.s.yaml
│ │ │ ├── srln.s.yaml
│ │ │ ├── srlni.s.yaml
│ │ │ ├── srlr.s.yaml
│ │ │ ├── srlrn.s.yaml
│ │ │ ├── srlrni.s.yaml
│ │ │ ├── ssran.s.yaml
│ │ │ ├── ssrani.s.yaml
│ │ │ ├── ssrarn.s.yaml
│ │ │ ├── ssrarni.s.yaml
│ │ │ ├── ssrln.s.yaml
│ │ │ ├── ssrlni.s.yaml
│ │ │ ├── ssrlrn.s.yaml
│ │ │ ├── ssrlrni.s.yaml
│ │ │ ├── ssub.s.yaml
│ │ │ ├── st.s.yaml
│ │ │ ├── stelm.s.yaml
│ │ │ ├── sub.s.yaml
│ │ │ ├── subi.s.yaml
│ │ │ ├── subw.s.yaml
│ │ │ ├── valid.s.yaml
│ │ │ ├── x86-alu.s.yaml
│ │ │ ├── x86-jump.s.yaml
│ │ │ ├── x86-misc.s.yaml
│ │ │ ├── x86-shift.s.yaml
│ │ │ ├── xor.s.yaml
│ │ │ └── xori.s.yaml
│ │ ├── Mips/
│ │ │ ├── hilo-addressing.s.yaml
│ │ │ ├── invalid-xfail.txt.yaml
│ │ │ ├── invalid.txt.yaml
│ │ │ ├── mftr-mttr-aliases.s.yaml
│ │ │ ├── mftr-mttr-reserved-valid.s.yaml
│ │ │ ├── micromips-alu-instructions-EB.s.yaml
│ │ │ ├── micromips-alu-instructions.s.yaml
│ │ │ ├── micromips-branch-instructions-EB.s.yaml
│ │ │ ├── micromips-branch-instructions.s.yaml
│ │ │ ├── micromips-expansions.s.yaml
│ │ │ ├── micromips-jump-instructions-EB.s.yaml
│ │ │ ├── micromips-jump-instructions.s.yaml
│ │ │ ├── micromips-loadstore-instructions-EB.s.yaml
│ │ │ ├── micromips-loadstore-instructions.s.yaml
│ │ │ ├── micromips-loadstore-unaligned-EB.s.yaml
│ │ │ ├── micromips-loadstore-unaligned.s.yaml
│ │ │ ├── micromips-movcond-instructions-EB.s.yaml
│ │ │ ├── micromips-movcond-instructions.s.yaml
│ │ │ ├── micromips-multiply-instructions-EB.s.yaml
│ │ │ ├── micromips-multiply-instructions.s.yaml
│ │ │ ├── micromips-shift-instructions-EB.s.yaml
│ │ │ ├── micromips-shift-instructions.s.yaml
│ │ │ ├── micromips-trap-instructions-EB.s.yaml
│ │ │ ├── micromips-trap-instructions.s.yaml
│ │ │ ├── mips-alu-instructions.s.yaml
│ │ │ ├── mips-control-instructions-64.s.yaml
│ │ │ ├── mips-control-instructions.s.yaml
│ │ │ ├── mips-coprocessor-encodings.s.yaml
│ │ │ ├── mips-dsp-instructions.s.yaml
│ │ │ ├── mips-expansions.s.yaml
│ │ │ ├── mips-fpu-instructions.s.yaml
│ │ │ ├── mips-memory-instructions.s.yaml
│ │ │ ├── mips-register-names.s.yaml
│ │ │ ├── mips64-alu-instructions.s.yaml
│ │ │ ├── mips64-instructions.s.yaml
│ │ │ ├── mips64-register-names.s.yaml
│ │ │ ├── mips_directives.s.yaml
│ │ │ ├── nabi-regs.s.yaml
│ │ │ ├── set-at-directive.s.yaml
│ │ │ ├── test_2r.s.yaml
│ │ │ ├── test_2r.txt.yaml
│ │ │ ├── test_2r_msa64.txt.yaml
│ │ │ ├── test_2rf.s.yaml
│ │ │ ├── test_2rf.txt.yaml
│ │ │ ├── test_3r.s.yaml
│ │ │ ├── test_3r.txt.yaml
│ │ │ ├── test_3rf.s.yaml
│ │ │ ├── test_3rf.txt.yaml
│ │ │ ├── test_bit.s.yaml
│ │ │ ├── test_bit.txt.yaml
│ │ │ ├── test_ctrlregs.s.yaml
│ │ │ ├── test_ctrlregs.txt.yaml
│ │ │ ├── test_dlsa.txt.yaml
│ │ │ ├── test_elm.s.yaml
│ │ │ ├── test_elm.txt.yaml
│ │ │ ├── test_elm_insert.s.yaml
│ │ │ ├── test_elm_insert.txt.yaml
│ │ │ ├── test_elm_insert_msa64.txt.yaml
│ │ │ ├── test_elm_insve.s.yaml
│ │ │ ├── test_elm_insve.txt.yaml
│ │ │ ├── test_elm_msa64.txt.yaml
│ │ │ ├── test_i10.s.yaml
│ │ │ ├── test_i10.txt.yaml
│ │ │ ├── test_i5.s.yaml
│ │ │ ├── test_i5.txt.yaml
│ │ │ ├── test_i8.s.yaml
│ │ │ ├── test_i8.txt.yaml
│ │ │ ├── test_lsa.s.yaml
│ │ │ ├── test_lsa.txt.yaml
│ │ │ ├── test_mi10.s.yaml
│ │ │ ├── test_mi10.txt.yaml
│ │ │ ├── test_vec.s.yaml
│ │ │ ├── test_vec.txt.yaml
│ │ │ ├── valid-32-el.txt.yaml
│ │ │ ├── valid-32.txt.yaml
│ │ │ ├── valid-32r6-el.txt.yaml
│ │ │ ├── valid-32r6.txt.yaml
│ │ │ ├── valid-64-el.txt.yaml
│ │ │ ├── valid-64.txt.yaml
│ │ │ ├── valid-64r6-el.txt.yaml
│ │ │ ├── valid-64r6.txt.yaml
│ │ │ ├── valid-el.txt.yaml
│ │ │ ├── valid-fp64-el.txt.yaml
│ │ │ ├── valid-fp64.txt.yaml
│ │ │ ├── valid-micromips-el.txt.yaml
│ │ │ ├── valid-micromips.txt.yaml
│ │ │ ├── valid-micromips32r3.txt.yaml
│ │ │ ├── valid-mips1-el.txt.yaml
│ │ │ ├── valid-mips1.txt.yaml
│ │ │ ├── valid-mips2-el.txt.yaml
│ │ │ ├── valid-mips2.txt.yaml
│ │ │ ├── valid-mips3-el.txt.yaml
│ │ │ ├── valid-mips3.txt.yaml
│ │ │ ├── valid-mips32-el.txt.yaml
│ │ │ ├── valid-mips32.txt.yaml
│ │ │ ├── valid-mips32r2-el.txt.yaml
│ │ │ ├── valid-mips32r2.txt.yaml
│ │ │ ├── valid-mips32r3-el.txt.yaml
│ │ │ ├── valid-mips32r3.txt.yaml
│ │ │ ├── valid-mips32r5-el.txt.yaml
│ │ │ ├── valid-mips32r5.txt.yaml
│ │ │ ├── valid-mips32r6-el.txt.yaml
│ │ │ ├── valid-mips32r6.txt.yaml
│ │ │ ├── valid-mips4-el.txt.yaml
│ │ │ ├── valid-mips4.txt.yaml
│ │ │ ├── valid-mips64-el.txt.yaml
│ │ │ ├── valid-mips64-xfail.txt.yaml
│ │ │ ├── valid-mips64.txt.yaml
│ │ │ ├── valid-mips64r2-el.txt.yaml
│ │ │ ├── valid-mips64r2.txt.yaml
│ │ │ ├── valid-mips64r3-el.txt.yaml
│ │ │ ├── valid-mips64r3.txt.yaml
│ │ │ ├── valid-mips64r5-el.txt.yaml
│ │ │ ├── valid-mips64r5.txt.yaml
│ │ │ ├── valid-mips64r6-el.txt.yaml
│ │ │ ├── valid-mips64r6.txt.yaml
│ │ │ ├── valid-r2-el.txt.yaml
│ │ │ ├── valid-r2.txt.yaml
│ │ │ ├── valid-xfail-mips32.txt.yaml
│ │ │ ├── valid-xfail-mips32r2.txt.yaml
│ │ │ ├── valid-xfail-mips32r3.txt.yaml
│ │ │ ├── valid-xfail-mips32r5.txt.yaml
│ │ │ ├── valid-xfail-mips32r6.txt.yaml
│ │ │ ├── valid-xfail-mips64r2.txt.yaml
│ │ │ ├── valid-xfail-mips64r3.txt.yaml
│ │ │ ├── valid-xfail-mips64r5.txt.yaml
│ │ │ ├── valid-xfail-mips64r6.txt.yaml
│ │ │ ├── valid-xfail.txt.yaml
│ │ │ ├── valid.s.yaml
│ │ │ ├── valid.txt.yaml
│ │ │ ├── valid_R6-eva.txt.yaml
│ │ │ └── valid_preR6-eva.txt.yaml
│ │ ├── PowerPC/
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_a2.txt.yaml
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_booke.txt.yaml
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc32_extpid_e500_only_offset_branch_syntax_noregname_powerpc_unknown_unknown_big_endian.txt.yaml
│ │ │ ├── ppc64-encoding-bookii.s.yaml
│ │ │ ├── ppc64-encoding-bookiii.s.yaml
│ │ │ ├── ppc64-encoding-ext.s.yaml
│ │ │ ├── ppc64-encoding-fp.s.yaml
│ │ │ ├── ppc64-encoding-vmx.s.yaml
│ │ │ ├── ppc64-encoding.s.yaml
│ │ │ ├── ppc64-operands.s.yaml
│ │ │ ├── ppc64_encoding_4xx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_6xx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_bookii_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_bookiii_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_dfp_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_e500_only_offset_branch_syntax_noregname_big_endian_64_e500_spe.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_aix_os_modern_aix_as_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_aix_os_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_pwr7_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_fp_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_isa31_invalid_only_offset_branch_syntax_noregname_pwr10_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_isa31_only_offset_branch_syntax_noregname_pwr10_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_p8htm_only_offset_branch_syntax_noregname_big_endian_64_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_p8vector_only_offset_branch_syntax_noregname_big_endian_64_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_p9vector_only_offset_branch_syntax_noregname_little_endian_64_pwr9.txt.yaml
│ │ │ ├── ppc64_encoding_vmx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_operands_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64le_encoding_isafuture_only_offset_branch_syntax_noregname_little_endian_64_ppc_isa_future.txt.yaml
│ │ │ ├── ppc64le_encoding_only_offset_branch_syntax_noregname_little_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_big_endian_64_aix_os_ppc_isa_future.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_powerpc_unknown_aix_gnu_ppc_isa_future_big_endian.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_ppc_isa_future_big_endian.txt.yaml
│ │ │ ├── qpx.s.yaml
│ │ │ └── vsx_only_offset_branch_syntax_noregname_pwr7_big_endian.txt.yaml
│ │ ├── RISCV/
│ │ │ ├── XCValu_valid_riscv32_riscv_xcvalu_syntax_no_alias_text.txt.yaml
│ │ │ ├── XCVbi_riscv32_riscv_xcvbi.txt.yaml
│ │ │ ├── XCVbitmanip_riscv32_riscv_xcvbitmanip.txt.yaml
│ │ │ ├── XCVelw_valid_riscv32_riscv_xcvelw.txt.yaml
│ │ │ ├── XCVmac_valid_riscv32_riscv_xcvmac_syntax_no_alias_text.txt.yaml
│ │ │ ├── XCVmem_valid_riscv32_riscv_xcvmem.txt.yaml
│ │ │ ├── XCVsimd_riscv32_riscv_xcvsimd.txt.yaml
│ │ │ ├── XTHeadBa_valid_riscv32_riscv_xtheadba.txt.yaml
│ │ │ ├── XTHeadVdot_valid_riscv64_riscv_xtheadvdot.txt.yaml
│ │ │ ├── XVentanaCondOps_valid_riscv64_xventanacondops_syntax_no_alias_text.txt.yaml
│ │ │ ├── Zawrs_valid_riscv32_zawrs_syntax_no_alias_text.txt.yaml
│ │ │ ├── add_riscv64_riscv_v.txt.yaml
│ │ │ ├── and_riscv64_riscv_v.txt.yaml
│ │ │ ├── clip_riscv64_riscv_v.txt.yaml
│ │ │ ├── compare_riscv64_riscv_v.txt.yaml
│ │ │ ├── compress_cjal_riscv32_riscv_c.txt.yaml
│ │ │ ├── compress_rv32d_riscv32_riscv_c_riscv_d.txt.yaml
│ │ │ ├── compress_rv32f_riscv32_riscv_c_riscv_f.txt.yaml
│ │ │ ├── compress_rv32i_riscv32_riscv_c.txt.yaml
│ │ │ ├── compress_rv64i_riscv64_riscv_c.txt.yaml
│ │ │ ├── compressed_zicfiss_riscv32_riscv_experimental_zicfiss__experimental_zcmop_syntax_no_alias_text.txt.yaml
│ │ │ ├── convert_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── debug_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── deprecated_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── div_riscv64_riscv_v.txt.yaml
│ │ │ ├── ext_riscv64_riscv_v.txt.yaml
│ │ │ ├── fadd_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fcompare_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fdiv_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fixups_compressed_riscv32_riscv_c.txt.yaml
│ │ │ ├── fixups_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── fmacc_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fminmax_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fmul_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fmv_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fothers_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── freduction_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── fsub_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── insn-riscv32.s.yaml
│ │ │ ├── insn-riscv64.s.yaml
│ │ │ ├── load_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── macc_riscv64_riscv_v.txt.yaml
│ │ │ ├── machine_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── mask_riscv64_riscv_v.txt.yaml
│ │ │ ├── minmax_riscv64_riscv_v.txt.yaml
│ │ │ ├── mul_riscv64_riscv_v.txt.yaml
│ │ │ ├── mv_riscv64_riscv_v.txt.yaml
│ │ │ ├── option_arch_riscv32.txt.yaml
│ │ │ ├── option_rvc_riscv32.txt.yaml
│ │ │ ├── or_riscv64_riscv_v.txt.yaml
│ │ │ ├── others_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── print_imm_hex_riscv32_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── priv_valid_riscv32_svinval_syntax_no_alias_text.txt.yaml
│ │ │ ├── reduction_riscv64_riscv_v.txt.yaml
│ │ │ ├── rv32_hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_immediate_riscv32_riscv_v.txt.yaml
│ │ │ ├── rv32_machine_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_supervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_user_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32c_only_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32c_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32d_valid_riscv32_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32dc_valid_riscv32_riscv_c_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32e_valid_riscv32_riscv_e_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32f_valid_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32fc_valid_riscv32_riscv_c_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32i_only_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32i_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32ih_aliases_valid_riscv32_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32ih_valid_riscv32_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32m_valid_riscv32_m_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32xtheadbs_valid_riscv32_riscv_xtheadbs.txt.yaml
│ │ │ ├── rv32xtheadfmemidx_valid_riscv32_riscv_d_riscv_xtheadfmemidx.txt.yaml
│ │ │ ├── rv32xtheadmac_valid_riscv32_riscv_xtheadmac.txt.yaml
│ │ │ ├── rv32xtheadmemidx_valid_riscv32_riscv_xtheadmemidx.txt.yaml
│ │ │ ├── rv32xtheadmempair_valid_riscv32_riscv_xtheadmempair.txt.yaml
│ │ │ ├── rv32zaamo_valid_riscv32_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zacas_valid_riscv32_experimental_zacas_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zalrsc_valid_riscv32_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zba_valid_riscv32_riscv_zba.txt.yaml
│ │ │ ├── rv32zbb_only_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zbb_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zbc_valid_riscv32_riscv_zbc.txt.yaml
│ │ │ ├── rv32zbkb_only_valid_riscv32_riscv_zbkb.txt.yaml
│ │ │ ├── rv32zbkb_valid_riscv32_riscv_zbkb.txt.yaml
│ │ │ ├── rv32zbkc_valid_riscv32_riscv_zbkc.txt.yaml
│ │ │ ├── rv32zbkx_valid_riscv32_riscv_zbkx.txt.yaml
│ │ │ ├── rv32zbs_valid_riscv32_riscv_zbs.txt.yaml
│ │ │ ├── rv32zcb_valid_riscv32_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zcmp_valid_riscv32_riscv_zcmp_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zcmt_valid_riscv32_riscv_zcmt_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zdinx_valid_riscv32_riscv_zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfa_only_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfbfmin_valid_riscv32_experimental_zfbfmin_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfh_valid_riscv32_zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfhmin_valid_riscv32_zfhmin_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zhinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zhinxmin_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zicbom_valid_riscv32_zicbom.txt.yaml
│ │ │ ├── rv32zicbop_valid_riscv32_zicbop.txt.yaml
│ │ │ ├── rv32zicboz_valid_riscv32_zicboz.txt.yaml
│ │ │ ├── rv32zicond_valid_riscv32_zicond.txt.yaml
│ │ │ ├── rv32zihintntl_valid_riscv32_zihintntl_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zihintntlc_valid_riscv32_zihintntl_riscv_c.txt.yaml
│ │ │ ├── rv32zihintpause_valid_riscv32_zihintpause_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zknd_only_valid_riscv32_zknd.txt.yaml
│ │ │ ├── rv32zkne_only_valid_riscv32_zkne.txt.yaml
│ │ │ ├── rv32zknh_only_valid_riscv32_zknh.txt.yaml
│ │ │ ├── rv32zknh_valid_riscv32_zknh.txt.yaml
│ │ │ ├── rv32zksed_valid_riscv32_zksed.txt.yaml
│ │ │ ├── rv32zksh_valid_riscv32_zksh.txt.yaml
│ │ │ ├── rv64_machine_csr_names_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64_user_csr_names_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64c_hints_valid_riscv64_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64c_valid_riscv64_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64d_valid_riscv64_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64dc_valid_riscv64_riscv_c_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64e_valid_riscv64_riscv_e_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64f_valid_riscv64_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64i_valid_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64ih_valid_riscv64_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64m_valid_riscv64_m_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64xtheadfmemidx_valid_riscv64_riscv_d_riscv_xtheadfmemidx.txt.yaml
│ │ │ ├── rv64xtheadmac_valid_riscv64_riscv_xtheadmac.txt.yaml
│ │ │ ├── rv64xtheadmemidx_valid_riscv64_riscv_xtheadmemidx.txt.yaml
│ │ │ ├── rv64xtheadmempair_valid_riscv64_riscv_xtheadmempair.txt.yaml
│ │ │ ├── rv64zaamo_valid_riscv64_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zacas_valid_riscv64_experimental_zacas_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zalrsc_valid_riscv64_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zba_valid_riscv64_riscv_zba.txt.yaml
│ │ │ ├── rv64zbb_valid_riscv64_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zbkb_valid_riscv64_riscv_zbkb.txt.yaml
│ │ │ ├── rv64zcb_valid_riscv64_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zcmp_valid_riscv64_riscv_zcmp_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zdinx_valid_riscv64_riscv_zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zfh_valid_riscv64_zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zfinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zhinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zhinxmin_valid_riscv64_riscv_zfinx__zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zknd_only_valid_riscv64_zknd.txt.yaml
│ │ │ ├── rv64zkne_only_valid_riscv64_zkne.txt.yaml
│ │ │ ├── rv64zknh_only_valid_riscv64_zknh.txt.yaml
│ │ │ ├── rvc_hints_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvf_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvk_user_csr_name_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvv_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvzcmop_valid_riscv32_experimental_zcmop.txt.yaml
│ │ │ ├── rvzcmt_user_csr_name_riscv32_riscv_zcmt_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvzimop_valid_riscv32_experimental_zimop.txt.yaml
│ │ │ ├── shift_riscv64_riscv_v.txt.yaml
│ │ │ ├── sign_injection_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── store_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── sub_riscv64_riscv_v.txt.yaml
│ │ │ ├── supervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── user_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── vsetvl_riscv64_riscv_v.txt.yaml
│ │ │ ├── xor_riscv64_riscv_v.txt.yaml
│ │ │ ├── xsfvcp_riscv32_riscv_v_riscv_xsfvcp.txt.yaml
│ │ │ ├── xsfvfnrclip_riscv64_riscv_v_riscv_xsfvfnrclipxfqf.txt.yaml
│ │ │ ├── xsfvfwmacc_riscv64_riscv_v_riscv_xsfvfwmaccqqq.txt.yaml
│ │ │ ├── xsfvqmacc_riscv64_riscv_v_riscv_xsfvqmaccqoq_riscv_xsfvqmaccdod.txt.yaml
│ │ │ ├── xtheadcmo_valid_riscv32_riscv_xtheadcmo.txt.yaml
│ │ │ ├── xtheadcondmov_valid_riscv32_riscv_xtheadcondmov.txt.yaml
│ │ │ ├── xtheadsync_valid_riscv32_riscv_xtheadsync.txt.yaml
│ │ │ ├── zfa_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── zfa_zfhmin_zvfh_valid_riscv32_zfa__zfhmin__zvfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── zicfilp_valid_riscv32_experimental_zicfilp_syntax_no_alias_text.txt.yaml
│ │ │ ├── zicfiss_valid_riscv32_riscv_a_riscv_experimental_zicfiss_syntax_no_alias_text.txt.yaml
│ │ │ ├── zvbb_riscv32_zve32x_zvbb.txt.yaml
│ │ │ ├── zvbc_riscv32_zve64x_zvbc.txt.yaml
│ │ │ ├── zvfbfmin_riscv32_experimental_zvfbfmin.txt.yaml
│ │ │ ├── zvfbfwma_riscv32_experimental_zvfbfwma.txt.yaml
│ │ │ ├── zvkb_riscv32_zve32x_zvkb.txt.yaml
│ │ │ ├── zvkg_riscv32_zve32x_zvkg.txt.yaml
│ │ │ ├── zvkned_riscv32_zve32x_zvkned.txt.yaml
│ │ │ ├── zvknh_riscv32_zve32x_zvknha.txt.yaml
│ │ │ ├── zvksed_riscv32_zve32x_zvksed.txt.yaml
│ │ │ ├── zvksh_riscv32_zve32x_zvksh.txt.yaml
│ │ │ └── zvlsseg_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ ├── Sparc/
│ │ │ ├── leon_instructions_big_endian_gr712rc.txt.yaml
│ │ │ ├── leon_instructions_big_endian_gr740.txt.yaml
│ │ │ ├── leon_instructions_big_endian_leon3.txt.yaml
│ │ │ ├── leon_instructions_big_endian_leon4.txt.yaml
│ │ │ ├── leon_instructions_big_endian_ut699.txt.yaml
│ │ │ ├── leon_pwrpsr_instruction_big_endian_gr740.txt.yaml
│ │ │ ├── sparc-alu-instructions.s.yaml
│ │ │ ├── sparc-atomic-instructions.s.yaml
│ │ │ ├── sparc-ctrl-instructions.s.yaml
│ │ │ ├── sparc-fp-instructions.s.yaml
│ │ │ ├── sparc-mem-instructions.s.yaml
│ │ │ ├── sparc-vis.s.yaml
│ │ │ ├── sparc64-alu-instructions.s.yaml
│ │ │ ├── sparc64-ctrl-instructions.s.yaml
│ │ │ ├── sparc64_alu_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc64_ctrl_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_alu_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_alu_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_assembly_exprs_big_endian.txt.yaml
│ │ │ ├── sparc_atomic_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_atomic_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_atomics_v9_big_endian.txt.yaml
│ │ │ ├── sparc_big_endian.txt.yaml
│ │ │ ├── sparc_coproc_big_endian.txt.yaml
│ │ │ ├── sparc_ctrl_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_ctrl_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_fp_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_fp_v9_big_endian.txt.yaml
│ │ │ ├── sparc_little_endian_sparcel_linux_gnu_big_endian.txt.yaml
│ │ │ ├── sparc_mem_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_mem_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_mem_v9_big_endian.txt.yaml
│ │ │ ├── sparc_mem_v9_v9_big_endian.txt.yaml
│ │ │ ├── sparc_misc_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_misc_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_special_registers_big_endian.txt.yaml
│ │ │ ├── sparc_special_registers_v9_big_endian.txt.yaml
│ │ │ ├── sparc_synthetic_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_synthetic_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_traps_big_endian.txt.yaml
│ │ │ ├── sparc_v9_asi_v9_big_endian.txt.yaml
│ │ │ ├── sparc_v9_traps_v9_big_endian.txt.yaml
│ │ │ ├── sparc_v9_v9_big_endian.txt.yaml
│ │ │ ├── sparc_vis_v9_niagara_big_endian.txt.yaml
│ │ │ ├── sparcv8-instructions.s.yaml
│ │ │ ├── sparcv8_instructions_big_endian.txt.yaml
│ │ │ ├── sparcv9_asi_names_v9_big_endian.txt.yaml
│ │ │ └── sparcv9_atomic_instructions_v9_big_endian.txt.yaml
│ │ ├── SystemZ/
│ │ │ ├── insns-z13.txt.yaml
│ │ │ ├── insns-z14.txt.yaml
│ │ │ ├── insns-z15.txt.yaml
│ │ │ ├── insns-z16.txt.yaml
│ │ │ └── insns.txt.yaml
│ │ ├── TriCore/
│ │ │ ├── ADC_Background_Scan_1_KIT_TC275_LK.s.yaml
│ │ │ ├── ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
│ │ │ ├── J_Call_Loop.s.yaml
│ │ │ ├── LoadStore.s.yaml
│ │ │ ├── csfr.s.yaml
│ │ │ ├── debug.s.yaml
│ │ │ ├── extr_u.s.yaml
│ │ │ ├── handwrite.s.yaml
│ │ │ ├── iLLD_TC375_ADS_Bluetooth_RFCOMM.s.yaml
│ │ │ ├── ldst_br_circ.s.yaml
│ │ │ ├── rr_insn.s.yaml
│ │ │ ├── tc110.s.yaml
│ │ │ ├── tc120.s.yaml
│ │ │ ├── tc130.s.yaml
│ │ │ ├── tc131.s.yaml
│ │ │ ├── tc160.s.yaml
│ │ │ ├── tc161.s.yaml
│ │ │ ├── tc162.s.yaml
│ │ │ └── tc180.s.yaml
│ │ ├── X86/
│ │ │ ├── 3DNow.s.yaml
│ │ │ ├── address-size.s.yaml
│ │ │ ├── avx512-encodings.s.yaml
│ │ │ ├── intel-syntax-encoding.s.yaml
│ │ │ ├── x86-32-avx.s.yaml
│ │ │ ├── x86-32-fma3.s.yaml
│ │ │ ├── x86-32-ms-inline-asm.s.yaml
│ │ │ ├── x86_64-avx-clmul-encoding.s.yaml
│ │ │ ├── x86_64-avx-encoding.s.yaml
│ │ │ ├── x86_64-bmi-encoding.s.yaml
│ │ │ ├── x86_64-encoding.s.yaml
│ │ │ ├── x86_64-fma3-encoding.s.yaml
│ │ │ ├── x86_64-fma4-encoding.s.yaml
│ │ │ ├── x86_64-imm-widths.s.yaml
│ │ │ ├── x86_64-rand-encoding.s.yaml
│ │ │ ├── x86_64-rtm-encoding.s.yaml
│ │ │ ├── x86_64-tbm-encoding.s.yaml
│ │ │ └── x86_64-xop-encoding.s.yaml
│ │ └── Xtensa/
│ │ ├── arith.s.yaml
│ │ ├── branch.s.yaml
│ │ ├── call-jump.s.yaml
│ │ ├── l32r.yaml
│ │ ├── mac16.s.yaml
│ │ ├── memorder.s.yaml
│ │ ├── memory.s.yaml
│ │ ├── move.s.yaml
│ │ ├── processor-control.s.yaml
│ │ └── shift.s.yaml
│ ├── README.md
│ ├── details/
│ │ ├── README.md
│ │ ├── aarch64.yaml
│ │ ├── alpha.yaml
│ │ ├── arc.yaml
│ │ ├── arm.yaml
│ │ ├── bpf.yaml
│ │ ├── cs_common_details.yaml
│ │ ├── evm.yaml
│ │ ├── hppa.yaml
│ │ ├── loongarch.yaml
│ │ ├── m680x.yaml
│ │ ├── m68k.yaml
│ │ ├── mips.yaml
│ │ ├── mos65xx.yaml
│ │ ├── ppc.yaml
│ │ ├── riscv.yaml
│ │ ├── sh.yaml
│ │ ├── sparc.yaml
│ │ ├── systemz.yaml
│ │ ├── tms320c64x.yaml
│ │ ├── tricore.yaml
│ │ ├── wasm.yaml
│ │ ├── x86.yaml
│ │ ├── xcore.yaml
│ │ └── xtensa.yaml
│ ├── features/
│ │ └── skipdata.yaml
│ ├── integration/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── compat_header/
│ │ │ ├── README.md
│ │ │ ├── include/
│ │ │ │ └── compat.h
│ │ │ └── src/
│ │ │ ├── main.c
│ │ │ ├── test_arm64_compatibility_header.c
│ │ │ └── test_sysz_compatibility_header.c
│ │ ├── test_assert_macros.c
│ │ ├── test_customized_mnem.c
│ │ ├── test_iter.c
│ │ ├── test_litbase.c
│ │ ├── test_poc.c
│ │ ├── test_skipdata.c
│ │ └── test_winkernel.cpp
│ ├── issues/
│ │ ├── fuzzing.yaml
│ │ ├── issues.yaml
│ │ ├── x86-mandatory-prefixes.yaml
│ │ └── x86-prefixes.yaml
│ ├── negative/
│ │ ├── should_fail_I.yaml
│ │ ├── should_fail_II.yaml
│ │ ├── should_fail_III.yaml
│ │ ├── should_fail_IV.yaml
│ │ ├── should_fail_V.yaml
│ │ └── should_fail_VI.yaml
│ └── unit/
│ ├── CMakeLists.txt
│ ├── README.md
│ ├── include/
│ │ └── unit_test.h
│ ├── sstream.c
│ └── utils.c
├── utils.c
├── utils.h
├── windows/
│ ├── README.md
│ ├── winkernel_mm.c
│ └── winkernel_mm.h
├── windowsce/
│ ├── .gitignore
│ ├── COMPILE.md
│ ├── make_windowsce7-armv7.bat
│ └── make_windowsce8-armv7.bat
└── xcode/
├── Capstone.xcodeproj/
│ ├── project.pbxproj
│ ├── project.xcworkspace/
│ │ └── contents.xcworkspacedata
│ └── xcshareddata/
│ └── xcschemes/
│ ├── Dynamic Library.xcscheme
│ ├── Framework.xcscheme
│ ├── Static Library.xcscheme
│ └── Tests.xcscheme
├── CapstoneFramework/
│ ├── Info.plist
│ └── module.modulemap
└── README.md
================================================
FILE CONTENTS
================================================
================================================
FILE: .appveyor.yml
================================================
version: 4.0-{build}
os:
- Visual Studio 2015
before_build:
- call "C:\Program Files (x86)\Microsoft Visual Studio 14.0\VC\vcvarsall.bat" amd64
build_script:
- mkdir build
- cd build
- cmake -DCMAKE_BUILD_TYPE=RELEASE -G "NMake Makefiles" ..
- nmake
================================================
FILE: .clang-format
================================================
# SPDX-License-Identifier: BSD-3-Clause
#
# clang-format configuration file. Intended for clang-format >= 11.
#
# For more information, see:
#
# Documentation/process/clang-format.rst
# https://clang.llvm.org/docs/ClangFormat.html
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
#
---
AccessModifierOffset: -4
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
AlignEscapedNewlines: DontAlign
AlignOperands: true
AlignTrailingComments: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: false
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterDefinitionReturnType: None
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: false
AlwaysBreakTemplateDeclarations: false
BinPackArguments: true
BinPackParameters: true
BraceWrapping:
AfterClass: false
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: false
AfterStruct: false
AfterUnion: false
AfterExternBlock: false
BeforeCatch: false
BeforeElse: false
IndentBraces: false
SplitEmptyFunction: true
SplitEmptyRecord: true
SplitEmptyNamespace: true
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
BreakBeforeInheritanceComma: false
BreakBeforeTernaryOperators: false
BreakConstructorInitializersBeforeComma: false
BreakConstructorInitializers: BeforeComma
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 80
CommentPragmas: '^ IWYU pragma:'
CompactNamespaces: false
ConstructorInitializerAllOnOneLineOrOnePerLine: false
ConstructorInitializerIndentWidth: 8
ContinuationIndentWidth: 8
Cpp11BracedListStyle: false
DerivePointerAlignment: false
DisableFormat: false
ExperimentalAutoDetectBinPacking: false
FixNamespaceComments: false
IncludeBlocks: Preserve
IncludeCategories:
- Regex: '.*'
Priority: 1
IncludeIsMainRegex: '(Test)?$'
IndentCaseLabels: false
IndentGotoLabels: false
IndentPPDirectives: None
IndentWidth: 8
IndentWrappedFunctionNames: false
JavaScriptQuotes: Leave
JavaScriptWrapImports: true
KeepEmptyLinesAtTheStartOfBlocks: false
MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 1
NamespaceIndentation: None
ObjCBinPackProtocolList: Auto
ObjCBlockIndentWidth: 8
ObjCSpaceAfterProperty: true
ObjCSpaceBeforeProtocolList: true
# Taken from git's rules
PenaltyBreakAssignment: 10
PenaltyBreakBeforeFirstCallParameter: 30
PenaltyBreakComment: 10
PenaltyBreakFirstLessLess: 0
PenaltyBreakString: 10
PenaltyExcessCharacter: 100
PenaltyReturnTypeOnItsOwnLine: 60
PointerAlignment: Right
ReflowComments: false
SortIncludes: false
SortUsingDeclarations: false
SpaceAfterCStyleCast: false
SpaceAfterTemplateKeyword: true
SpaceBeforeAssignmentOperators: true
SpaceBeforeCtorInitializerColon: true
SpaceBeforeInheritanceColon: true
SpaceBeforeParens: ControlStatementsExceptForEachMacros
SpaceBeforeRangeBasedForLoopColon: true
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 1
SpacesInAngles: false
SpacesInContainerLiterals: false
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Cpp03
TabWidth: 8
UseTab: Always
================================================
FILE: .dockerignore
================================================
# Ignore source control directories
.git
.svn
# Ignore build directories
build
dist
# Ignore dependency directories
node_modules
vendor
# Ignore temporary files
*.log
*.tmp
# Ignore environment files
.env
# Ignore tests
tests
================================================
FILE: .editorconfig
================================================
root = true
[*]
end_of_line = lf
insert_final_newline = true
[*.{py,pyx,pxd}]
indent_style = space
indent_size = 4
# Follow Linux kernel coding style
[*.{c,h,cpp,hpp,inc}]
indent_style = tab
indent_size = 8
# OCaml bindings
[*.ml]
indent_style = tab
indent_size = 4
[Makefile]
indent_style = tab
================================================
FILE: .gitattributes
================================================
/arch/**/*.inc linguist-language=C
# Ensure shell scripts have LF line endings
*.sh text eol=lf
================================================
FILE: .github/ISSUE_TEMPLATE/bug_report_asm.md
================================================
---
name: Bug report - Incorrect disassembly
about: Create a report about incorrect disassembly.
---
<!-- This template is meant for disassembly related bug reports, please be as descriptive as possible -->
### Work environment
<!-- Filling this table is mandatory -->
| Questions | Answers
|------------------------------------------|--------------------
| System Capstone runs on OS/arch/bits | Debian arm 64, MacOS AArch64, MacOS x86, Windows x86 etc.
| Capstone module affected | ppc, x86, arm, aarch64 etc.
| Source of Capstone | `git clone`, brew, pip, release binaries etc.
| Version/git commit | v5.0.1, <commit hash>
<!-- INCORRECT DISASSEMBLY BUGS -->
### Instruction bytes giving faulty results
```
0x00,0x00,0x00,0x00
```
### Expected results
It should be:
```
<this or that>
```
### Steps to get the wrong result
With `cstool`:
```sh
cstool arm -d 0x00,0x00,0x00,0x00
```
or with `Python`
```python
CODE = b'\x90\x90\x90\x90'
md = Cs(CS_ARCH_ARM, CS_MODE_THUMB)
md.detail = True
for insn in md.disasm(CODE, 0x1000):
# Print the faulty disassembly
```
<!-- ADDITIONAL CONTEXT -->
### Additional Logs, screenshots, source code, configuration dump, ...
Drag and drop zip archives containing the Additional info here, don't use external services or link.
Screenshots can be directly dropped here.
================================================
FILE: .github/ISSUE_TEMPLATE/bug_report_general.md
================================================
---
name: Bug report - Other bugs
about: Create a report to help us improve
---
<!-- This template is meant for GENERAL bug reports.
For bugs regarding incorrect disassembly,
please use the "Bug report - Incorrect disassembly" template.
Please be as descriptive as possible
-->
### Work environment
<!-- Filling this table is mandatory -->
| Questions | Answers
|------------------------------------------|--------------------
| System Capstone runs on OS/arch/bits | Debian arm 64, MacOS AArch64, MacOS x86, Windows x86 etc.
| Capstone module affected | ppc, x86, arm, aarch64 etc.
| Source of Capstone | `git clone`, brew, pip, release binaries etc.
| Version/git commit | v5.0.1, <commit hash>
<!-- OTHER BUGS -->
### Expected behavior
### Actual behavior
### Steps to reproduce the behavior
- Use code markdown `CODE` to make your code visible
<!-- ADDITIONAL CONTEXT -->
### Additional Logs, screenshots, source code, configuration dump, ...
Drag and drop zip archives containing the Additional info here, don't use external services or link.
Screenshots can be directly dropped here.
================================================
FILE: .github/ISSUE_TEMPLATE/feature_request.md
================================================
---
name: Feature request
about: Suggest an idea for this project
---
### Feature
- [ ] New architecture module
- [ ] Support for processor extension
- [ ] Add more instruction details (elaborated below)
- [ ] Binding support for: `language`
- [ ] Other (elaborated below)
**Describe the feature you'd like**
A clear and concise description of what you want to happen.
**Additional context**
Add any other context about the feature request here.
================================================
FILE: .github/PULL_REQUEST_TEMPLATE.md
================================================
<!-- Filling this template is mandatory -->
**Your checklist for this pull request**
- [ ] I've documented or updated the documentation of every API function and struct this PR changes.
- [ ] I've added tests that prove my fix is effective or that my feature works (if possible)
**Detailed description**
<!-- Explain the **details** for making this change. Is a new feature implemented? What existing problem does the pull request solve? How does the pull request solve these issues? Please provide enough information so that others can review your pull request. -->
...
**Test plan**
<!-- What steps should the reviewer take to test your pull request? Demonstrate the code is solid. Or what test cases you added. Disassembly tests should be added in suite/cs_test/issues.cs -->
...
**Closing issues**
<!-- put "closes #XXXX" in your comment to auto-close the issue that your PR fixes (if any). -->
...
================================================
FILE: .github/labeler.yml
================================================
Auto-Sync-files:
- suite/auto-sync/**
LLVM-core-files:
- MC*.[ch]
LLVM-generated-files:
- arch/*/*.inc
Documentation:
- '**/*.md'
CS-core-files:
- cs*.[ch]
- SStream.[ch]
- utis.[ch]
- MathExtras.h
- Mapping.[ch]
- LEB128.h
- cstool/cstool.[ch]
- cstool/getopt.[ch]
- include/capstone/capstone.h
- include/capstone/cs_operand.h
- include/capstone/platform.h
ARM:
- arch/ARM/**
- cstool/cstool_arm.c
- include/capstone/arm.h
- suite/MC/ARM/**
- tests/MC/ARM/**
- tests/details/arm.yaml
AArch64:
- arch/AArch64/**
- cstool/cstool_aarch64.c
- include/capstone/aarch64.h
- include/capstone/arm64.h
- suite/MC/AArch64/**
- tests/MC/AArch64/**
- tests/details/aarch64.yaml
Alpha:
- arch/Alpha/**
- cstool/cstool_alpha.c
- include/capstone/alpha.h
- suite/MC/Alpha/**
- tests/MC/Alpha/**
- tests/details/alpha.yaml
ARC:
- arch/ARC/*
- cstool/cstool_arc.c
- include/capstone/arc.h
- suite/MC/ARC/*
- tests/test_arc.c
BPF:
- arch/BPF/**
- cstool/cstool_bpf.c
- include/capstone/bpf.h
- suite/MC/BPF/**
- tests/MC/BPF/**
- tests/details/bpf.yaml
EVM:
- arch/EVM/**
- cstool/cstool_evm.c
- include/capstone/evm.h
- tests/details/evm.yaml
HPPA:
- arch/HPPA/**
- cstool/cstool_hppa.c
- include/capstone/hppa.h
- suite/MC/HPPA/**
- tests/MC/HPPA/**
- tests/details/hppa.yaml
LoongArch:
- arch/LoongArch/**
- cstool/cstool_loongarch.c
- include/capstone/loongarch.h
- suite/MC/LoongArch/**
- tests/MC/LoongArch/**
- tests/details/loongarch.yaml
M680X:
- arch/M680X/**
- cstool/cstool_m680x.c
- include/capstone/m680x.h
- tests/details/m680x.yaml
M68K:
- arch/M68K/**
- cstool/cstool_m68k.c
- include/capstone/m68k.h
- tests/details/m68k.yaml
MOS65XX:
- arch/MOS65XX/**
- cstool/cstool_mos65xx.c
- include/capstone/mos65xx.h
- tests/details/mos65xx.yaml
Mips:
- arch/Mips/**
- cstool/cstool_mips.c
- include/capstone/mips.h
- suite/MC/Mips/**
- tests/MC/Mips/**
- tests/details/mips.yaml
PowerPC:
- arch/PowerPC/**
- cstool/cstool_powerpc.c
- include/capstone/ppc.h
- suite/MC/PowerPC/**
- tests/MC/PowerPC/**
- tests/details/ppc.yaml
RISCV:
- arch/RISCV/**
- cstool/cstool_riscv.c
- include/capstone/riscv.h
- suite/MC/RISCV/**
- tests/MC/RISCV/**
- tests/details/riscv.yaml
SH:
- arch/SH/**
- cstool/cstool_sh.c
- include/capstone/sh.h
- tests/details/sh.yaml
Sparc:
- arch/Sparc/**
- cstool/cstool_sparc.c
- include/capstone/sparc.h
- suite/MC/Sparc/**
- tests/MC/Sparc/**
- tests/details/sparc.yaml
SystemZ:
- arch/SystemZ/**
- cstool/cstool_systemz.c
- include/capstone/systemz.h
- include/capstone/systemz_compatibility.h
- suite/MC/SystemZ/**
- tests/MC/SystemZ/**
- tests/details/systemz.yaml
TMS320C64x:
- arch/TMS320C6x/**
- cstool/cstool_tms320c64x.c
- include/capstone/tms320x64x.h
- tests/details/tms320c64x.yaml
TriCore:
- arch/TriCore/**
- cstool/cstool_tricore.c
- include/capstone/tricore.h
- suite/MC/Tricore/**
- tests/MC/Tricore/**
- tests/details/tricore.yaml
WASM:
- arch/WASM/**
- cstool/cstool_wasm.c
- include/capstone/wasm.h
- tests/details/wasm.yaml
X86:
- arch/X86/**
- cstool/cstool_x86.c
- include/capstone/x86.h
- suite/MC/X86/**
- tests/MC/X86/**
- tests/details/x86.yaml
XCore:
- arch/XCore/**
- cstool/cstool_xcore.c
- include/capstone/xcore.h
- tests/details/xcore.yaml
Xtensa:
- arch/Xtensa/**
- cstool/cstool_xtensa.c
- include/capstone/xtensa.h
- tests/MC/Xtensa/**
- tests/details/xtensa.yaml
python:
- bindings/python/**
ocaml:
- bindings/ocaml/**
java:
- bindings/java/**
Github-files:
- .github/**
================================================
FILE: .github/workflows/CITest.yml
================================================
name: Run Test
on:
push:
paths-ignore:
- ".gitignore"
- "docs/**"
- "ChangeLog"
- "CREDITS.TXT"
- "COMPILE_MAKE.TXT"
- "BUILDING.md"
- "CONTRIBUTING.md"
- "LICENSE.TXT"
- "LICENSE_LLVM.TXT"
- "README.md"
- "RELEASE_NOTES"
- "SPONSORS.TXT"
- "TODO"
pull_request:
# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
env:
CI: true
UBSAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
ASAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
LSAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
jobs:
Linux:
runs-on: ${{ matrix.config.os }}
name: ${{ matrix.config.name }}
strategy:
fail-fast: false
matrix:
config:
- {
name: 'ubuntu-22.04 x64 make',
os: ubuntu-22.04,
arch: x64,
build-system: 'make',
diet-build: 'OFF',
enable-asan: 'OFF'
}
- {
name: 'ubuntu-22.04 x64 cmake',
os: ubuntu-22.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
enable-asan: 'OFF',
build_type: 'Debug'
}
- {
name: 'ubuntu-22.04 x64 debug - assert warn',
os: ubuntu-22.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
enable-asan: 'OFF',
build_type: 'Debug',
build_options: '-DCAPSTONE_ASSERTION_WARNINGS=ON'
}
- {
name: 'ubuntu-22.04 x64 release - no assert warnings',
os: ubuntu-22.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
enable-asan: 'OFF',
build_type: 'Release',
build_options: '-DCAPSTONE_ASSERTION_WARNINGS=OFF'
}
- {
name: 'ubuntu-22.04 x64 release - assert warn',
os: ubuntu-22.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
enable-asan: 'OFF',
build_type: 'Release',
build_options: '-DCAPSTONE_ASSERTION_WARNINGS=ON'
}
- {
name: 'ubuntu-24.04 x64 ASAN',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
enable-asan: 'ON',
build_type: 'Debug'
}
steps:
- uses: actions/checkout@v4
- name: Set up Python
uses: actions/setup-python@v5
with:
python-version: ${{ matrix.config.python-version }}
- name: Prepare fuzzing
run: |
export LD_LIBRARY_PATH=`pwd`/tests/:$LD_LIBRARY_PATH
wget https://github.com/groundx/capstonefuzz/raw/master/corpus/corpus-libFuzzer-capstone_fuzz_disasmnext-latest.zip
unzip -q corpus-libFuzzer-capstone_fuzz_disasmnext-latest.zip -d suite/fuzz
- name: make
if: startsWith(matrix.config.build-system, 'make')
run: |
./make.sh
sudo make install
- name: cmake
if: startsWith(matrix.config.build-system, 'cmake')
env:
asan: ${{ matrix.config.enable-asan }}
build_option: ${{ matrix.config.build_option }}
build_type: ${{ matrix.config.build_type }}
run: |
mkdir build && cd build
# build static library
cmake -DCMAKE_BUILD_TYPE=${build_type} -DCAPSTONE_INSTALL=1 -DCMAKE_INSTALL_PREFIX=/usr -DENABLE_ASAN=${asan} -DCAPSTONE_BUILD_DIET=${diet_build} ${build_option} ..
cmake --build . --config ${build_type}
# build shared library
cmake -DCMAKE_BUILD_TYPE=${build_type} -DCAPSTONE_INSTALL=1 -DCAPSTONE_BUILD_SHARED_LIBS=1 -DCMAKE_INSTALL_PREFIX=/usr -DCAPSTONE_BUILD_CSTEST=ON -DENABLE_ASAN=${asan} ${build_option} ..
sudo cmake --build . --config ${build_type} --target install
- name: Lower number of KASL randomized address bits
run: |
# Work-around ASAN bug https://github.com/google/sanitizers/issues/1716
sudo sysctl vm.mmap_rnd_bits=28
- name: unit tests
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R unit_*
- name: "Integration tests"
if: startsWith(matrix.config.build-system, 'cmake') && matrix.config.diet-build == 'OFF'
run: |
ctest --test-dir build --output-on-failure -R integration_*
- name: cstool - reaches disassembler engine
run: |
sh suite/run_invalid_cstool.sh
- name: cstest negatives
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R NegativeTests1
ctest --test-dir build --output-on-failure -R NegativeTests2
ctest --test-dir build --output-on-failure -R NegativeTests3
ctest --test-dir build --output-on-failure -R NegativeTests4
ctest --test-dir build --output-on-failure -R NegativeTests5
ctest --test-dir build --output-on-failure -R NegativeTests6
- name: cstest MC
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R MCTests
- name: cstest details
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R DetailTests
- name: cstest issues
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R IssueTests
- name: cstest features
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R FeaturesTests
- name: Legacy integration tests
if: startsWith(matrix.config.build-system, 'cmake')
run: |
ctest --test-dir build --output-on-failure -R legacy*
- name: Valgrind cstest
if: startsWith(matrix.config.build-system, 'cmake') && startsWith(matrix.config.enable-asan, 'OFF')
run: |
sudo apt-get -y update
sudo apt-get -y install valgrind
valgrind --leak-check=full cstest tests/details
valgrind --leak-check=full cstest tests/features
valgrind --leak-check=full cstest tests/issues
valgrind --leak-check=full cstest tests/MC
- name: Compatibility header generation
# clang-format-17 is only available in Ubuntu 24.04
# Hence the check only happens for it.
if: startsWith(matrix.config.build-system, 'cmake') && startsWith(matrix.config.os, 'ubuntu-24.04')
run: |
sudo apt-get -y update
sudo apt-get -y install clang-format-17
clang-format-17 --version
cp ./include/capstone/arm64.h arm64_compat_current.h
cp ./include/capstone/systemz_compatibility.h systemz_compat_current.h
./suite/auto-sync/src/autosync/HeaderPatcher.py -C ./.clang-format -c --v6 ./include/capstone/aarch64.h --v5 ./include/capstone/arm64.h
./suite/auto-sync/src/autosync/HeaderPatcher.py -C ./.clang-format -c --v6 ./include/capstone/systemz.h --v5 ./include/capstone/systemz_compatibility.h
diff ./include/capstone/arm64.h arm64_compat_current.h &&
diff ./include/capstone/systemz_compatibility.h systemz_compat_current.h
Windows:
runs-on: ${{ matrix.config.os }}
name: ${{ matrix.config.name }}
strategy:
fail-fast: false
matrix:
config:
- name: 'windows x64 MSVC 64bit'
os: windows-latest
arch: x64
platform: windows
python-arch: x64
python-version: '3.9'
diet_build: false
- name: 'windows x64 MSVC 64bit DIET'
os: windows-latest
arch: x64
platform: windows
python-arch: x64
python-version: '3.9'
diet_build: true
steps:
- uses: actions/checkout@v4
- uses: lukka/get-cmake@latest
name: Get CMake
- name: '🛠️ Win MSVC 64 setup'
if: contains(matrix.config.name, 'MSVC 64')
uses: ilammy/msvc-dev-cmd@v1
with:
arch: 'x64'
- name: '🚧 Win MSVC 64 build'
if: contains(matrix.config.name, 'MSVC 64')
shell: bash
run: |
cmake --version
cmake --preset=${{ matrix.config.platform }}-x64${{ matrix.config.diet_build == true && '-diet' || '' }}
cmake --build --preset build-${{ matrix.config.platform }}${{ matrix.config.diet_build == true && '-diet' || '' }}-release
cmake --build --preset install-${{ matrix.config.platform }}${{ matrix.config.diet_build == true && '-diet' || '' }}-release
================================================
FILE: .github/workflows/CrossBuilds.yml
================================================
name: Cross Build Tests
on:
push:
paths-ignore:
- ".gitignore"
- "docs/**"
- "ChangeLog"
- "CREDITS.TXT"
- "COMPILE_MAKE.TXT"
- "BUILDING.md"
- "CONTRIBUTING.md"
- "LICENSE.TXT"
- "LICENSE_LLVM.TXT"
- "README.md"
- "RELEASE_NOTES"
- "SPONSORS.TXT"
- "TODO"
pull_request:
# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
env:
CI: true
UBSAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
ASAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
LSAN_OPTIONS: "halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1"
jobs:
Linux:
runs-on: ${{ matrix.config.os }}
name: ${{ matrix.config.name }}
strategy:
fail-fast: false
matrix:
config:
- {
name: 'QEMU Linux s390x',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
packages: 'gcc-s390x-linux-gnu g++-s390x-linux-gnu binutils-s390x-linux-gnu libc6-dev-s390x-cross qemu-user-static',
cross_file: 'cross_configs/linux_s390x_ubuntu24.cmake',
}
- {
name: 'QEMU Linux Mips 32',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
packages: 'gcc-mips-linux-gnu g++-mips-linux-gnu binutils-mips-linux-gnu libc6-dev-mips-cross qemu-user-static',
cross_file: 'cross_configs/linux_mips_ubuntu24.cmake',
}
- {
name: 'QEMU Linux Mips64el',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
packages: 'gcc-mips64el-linux-gnuabi64 g++-mips64el-linux-gnuabi64 binutils-mips64el-linux-gnuabi64 libc6-dev-mips64el-cross qemu-user-static',
cross_file: 'cross_configs/linux_mips64_ubuntu24.cmake',
}
- {
name: 'QEMU Linux PPC64',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
packages: 'gcc-powerpc64-linux-gnu g++-powerpc64-linux-gnu binutils-powerpc64-linux-gnu libc6-dev-ppc64-cross qemu-user-static',
cross_file: 'cross_configs/linux_ppc64_ubuntu24.cmake',
}
- {
name: 'QEMU Linux ARM',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
packages: 'gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf binutils-arm-linux-gnueabihf libc6-armhf-cross libc6-dev-armhf-cross qemu-user-static',
cross_file: 'cross_configs/linux_arm_ubuntu24.cmake',
}
- {
name: '[BUILD ONLY] Windows i686 mingw',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
skip_tests: true,
packages: 'gcc-mingw-w64-i686 g++-mingw-w64-i686 mingw-w64-tools',
cross_file: 'cross_configs/windows_i686_ubuntu24.cmake',
}
- {
name: '[BUILD ONLY] Android 35 (arm64_v8a) NDK 29',
os: ubuntu-24.04,
arch: x64,
build-system: 'cmake',
build_option: '-DANDROID_NDK=ndk/ -DANDROID_PLATFORM=android-35 -DANDROID_ABI=arm64-v8a',
diet-build: 'OFF',
build_type: 'Debug',
diet_build: false,
# QEMU alone can't emulate the binaries, because the NDK doesn't
# provide dynamic linker.
skip_tests: true,
packages: 'qemu-user-static',
ndk_version: 'r29',
cross_file: 'ndk/build/cmake/android.toolchain.cmake',
qemu: 'qemu-aarch64-static'
}
steps:
- uses: actions/checkout@v4
- name: Set up Python
uses: actions/setup-python@v5
with:
python-version: ${{ matrix.config.python-version }}
- name: Install cross build dependencies
if: ${{ matrix.config.packages != '' }}
env:
packages: ${{ matrix.config.packages }}
run: |
sudo apt-get update
sudo apt-get install -y ${packages}
- name: Setup Android NDK
if: contains(matrix.config.name, 'Android')
env:
ndk_version: ${{ matrix.config.ndk_version }}
qemu: ${{ matrix.config.qemu }}
cross_file: ${{ matrix.config.cross_file }}
run: |
wget -q https://dl.google.com/android/repository/android-ndk-${ndk_version}-linux.zip
mkdir ndk
unzip -q -d ndk android-ndk-${ndk_version}-linux.zip
mv ndk/*/* ndk/
cat ndk/source.properties
- name: cmake (cross build)
env:
build_option: ${{ matrix.config.build_option }}
build_type: ${{ matrix.config.build_type }}
cross_file: ${{ matrix.config.cross_file }}
run: |
cmake -DCMAKE_BUILD_TYPE=${build_type} \
-DCAPSTONE_BUILD_STATIC_LIBS=ON \
-S . \
-DCAPSTONE_BUILD_CSTEST=ON \
-DCAPSTONE_BUILD_DIET=${diet_build} \
-DCMAKE_TOOLCHAIN_FILE=${cross_file} \
${build_option} \
-B build .
cmake --build build --config ${build_type}
- name: unit tests
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R unit_*
- name: "Integration tests"
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R integration_c_*
- name: cstest MC
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R MCTests
- name: cstest details
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R DetailTests
- name: cstest issues
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R IssueTests
- name: cstest features
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R FeaturesTests
- name: Legacy integration tests
if: ${{ matrix.config.skip_tests != true }}
run: |
ctest --test-dir build --output-on-failure -R legacy*
================================================
FILE: .github/workflows/auto-sync.yml
================================================
name: Auto-Sync
on:
push:
paths:
- "suite/auto-sync/**"
- ".github/workflows/auto-sync.yml"
pull_request:
# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
jobs:
check:
runs-on: ubuntu-24.04
defaults:
run:
working-directory: suite/auto-sync/
steps:
- name: Set up Python
uses: actions/setup-python@v5
with:
python-version: '3.11'
- name: Check out repository
uses: actions/checkout@v4
with:
submodules: true
- name: Install auto-sync package
run: |
pip install .
- name: Check formatting
run: |
python3.11 -m black --check src/autosync
- name: Install llvm-mc
run: |
sudo apt install llvm-18
llvm-mc-18 --version
FileCheck-18 --version
sudo ln -s $(whereis -b llvm-mc-18 | grep -Eo "/.*") /usr/local/bin/llvm-mc
sudo ln -s $(whereis -b FileCheck-18 | grep -Eo "/.*") /usr/local/bin/FileCheck
llvm-mc --version
FileCheck --version
- name: Clone llvm-capstone
run: |
git clone https://github.com/capstone-engine/llvm-capstone.git vendor/llvm_root
- name: Build llvm-tblgen
run: |
cd vendor/llvm_root
mkdir build
cd build
cmake -G Ninja -DCMAKE_BUILD_TYPE=Debug -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=ARC ../llvm
cmake --build . --target llvm-tblgen --config Debug
cd ../../../
- name: Test Header patcher
run: |
python -m unittest src/autosync/Tests/test_header_patcher.py
python -m unittest src/autosync/Tests/test_mcupdater.py
- name: Remove llvm-mc
run: |
sudo apt remove llvm-18
sudo rm /usr/local/bin/llvm-mc
sudo rm /usr/local/bin/FileCheck
- name: Test generation of inc files
run: |
./src/autosync/ASUpdater.py -d -a AArch64 -s IncGen
./src/autosync/ASUpdater.py -d -a Alpha -s IncGen
./src/autosync/ASUpdater.py -d -a ARC -s IncGen
./src/autosync/ASUpdater.py -d -a ARM -s IncGen
./src/autosync/ASUpdater.py -d -a PPC -s IncGen
./src/autosync/ASUpdater.py -d -a LoongArch -s IncGen
./src/autosync/ASUpdater.py -d -a Mips -s IncGen
./src/autosync/ASUpdater.py -d -a SystemZ -s IncGen
./src/autosync/ASUpdater.py -d -a Xtensa -s IncGen
./src/autosync/ASUpdater.py -d -a TriCore -s IncGen
- name: CppTranslator - Patch tests
run: |
python -m unittest src/autosync/cpptranslator/Tests/test_patches.py
- name: CppTranslator - Differ tests
run: |
python -m unittest src/autosync/cpptranslator/Tests/test_differ.py
- name: CppTranslator - Test translation
run: |
./src/autosync/ASUpdater.py --ci -d -a AArch64 -s Translate
./src/autosync/ASUpdater.py --ci -d -a ARC -s Translate
./src/autosync/ASUpdater.py --ci -d -a ARM -s Translate
./src/autosync/ASUpdater.py --ci -d -a PPC -s Translate
./src/autosync/ASUpdater.py --ci -d -a LoongArch -s Translate
./src/autosync/ASUpdater.py --ci -d -a Mips -s Translate
./src/autosync/ASUpdater.py --ci -d -a SystemZ -s Translate
./src/autosync/ASUpdater.py --ci -d -a Xtensa -s Translate
./src/autosync/ASUpdater.py --ci -d -a TriCore -s Translate
================================================
FILE: .github/workflows/build-wheels-publish.yml
================================================
# SPDX-FileCopyrightText: 2024 Antelox <anteloxrce@gmail.com>
# SPDX-License-Identifier: BSD-3
name: Python - Build and publish wheels with cibuildwheel
on:
workflow_dispatch:
inputs:
debugMode:
description: 'Debug Mode'
required: false
default: ''
type: choice
options:
- '0'
- '1'
push:
paths-ignore:
- ".gitignore"
- "CREDITS.TXT"
- "ChangeLog"
- "README.md"
- "docs/**"
pull_request:
release:
types: [published]
# Automatically cancel any previous running workflow on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}-${{ github.event_name }}
cancel-in-progress: true
env:
# Enable DEBUG flag either according to the tag release or manual override
CAPSTONE_DEBUG: ${{ inputs.debugMode != '' && inputs.debugMode || startsWith(github.ref, 'refs/tags') && '0' || '1' }}
jobs:
build_and_test_wheels:
name: Building on ${{ matrix.os }} - ${{ matrix.arch }} - ${{ matrix.cibw_build }}
runs-on: ${{ matrix.os }}
strategy:
fail-fast: false
matrix:
include:
# NOTE: Making this to parallelize and speed up workflow
# i686 - manylinux
- { os: ubuntu-latest, arch: i686, cibw_build: 'cp*-manylinux*', cibw_skip: '' }
# i686 - musllinux
- { os: ubuntu-latest, arch: i686, cibw_build: 'cp*-musllinux*', cibw_skip: '' }
# x86_64 - manylinux
- { os: ubuntu-latest, arch: x86_64, cibw_build: 'cp*-manylinux*', cibw_skip: '' }
# x86_64 - musllinux
- { os: ubuntu-latest, arch: x86_64, cibw_build: 'cp*-musllinux*', cibw_skip: '' }
# aarch64 - manylinux
- { os: ubuntu-24.04-arm, arch: aarch64, cibw_build: 'cp*-manylinux*', cibw_skip: '' }
# aarch64 - musllinux
- { os: ubuntu-24.04-arm, arch: aarch64, cibw_build: 'cp*-musllinux*', cibw_skip: '' }
# macos - x86_64
- { os: macos-15-intel, arch: x86_64, cibw_build: 'cp*', cibw_skip: '' }
# macos - arm64
- { os: macos-latest, arch: arm64, cibw_build: 'cp*', cibw_skip: '' }
# windows - amd64
- { os: windows-latest, arch: AMD64, cibw_build: 'cp*', cibw_skip: '' }
# windows - x86
- { os: windows-latest, arch: x86, cibw_build: 'cp*', cibw_skip: '' }
# windows - arm64
- { os: windows-11-arm, arch: ARM64, cibw_build: 'cp*', cibw_skip: '*38* *39* *310*' }
steps:
- uses: actions/checkout@v4
# https://github.com/actions/upload-artifact/issues/22
- name: Prepare a unique name for Artifacts
shell: bash
run: |
# replace not-allowed chars with dash
name="cibw-wheels-${{ matrix.os }}-${{ matrix.arch }}-${{ matrix.cibw_build }}"
name=$(echo -n "$name" | sed -e 's/[ \t:\/\\"<>|*?]/-/g' -e 's/--*/-/g' | sed -e 's/\-$//')
echo "ARTIFACT_NAME=$name" >> $GITHUB_ENV
# https://cibuildwheel.pypa.io/en/stable/faq/#macos-building-cpython-38-wheels-on-arm64
- uses: actions/setup-python@v5
if: runner.os == 'macOS' && runner.arch == 'ARM64'
with:
python-version: 3.8
- name: '🛠️ Win MSVC 32 dev cmd setup'
if: runner.os == 'Windows' && matrix.arch == 'x86'
uses: ilammy/msvc-dev-cmd@v1
with:
arch: x86
- name: '🛠️ Win MSVC 64 dev cmd setup'
if: runner.os == 'Windows' && matrix.arch == 'AMD64'
uses: ilammy/msvc-dev-cmd@v1
with:
arch: x64
- name: '🛠️ Win MSVC ARM64 dev cmd setup'
if: runner.os == 'Windows' && matrix.arch == 'ARM64'
uses: ilammy/msvc-dev-cmd@v1
with:
arch: amd64_arm64
- name: '🛠️ Set up QEMU'
if: runner.os == 'Linux' && matrix.arch == 'i686'
uses: docker/setup-qemu-action@v3
- name: '🚧 cibuildwheel run'
uses: pypa/cibuildwheel@v3.1.3
env:
CIBW_BUILD_FRONTEND: build
CIBW_BUILD: ${{ matrix.cibw_build }}
CIBW_SKIP: ${{ matrix.cibw_skip }}
CIBW_ARCHS: ${{ matrix.arch }}
CIBW_ENVIRONMENT: DEBUG=${{ env.CAPSTONE_DEBUG }}
CIBW_ENVIRONMENT_PASS_LINUX: DEBUG
# https://github.com/pypa/cibuildwheel/pull/1169
CIBW_TEST_SKIP: "cp38-macosx_*:arm64"
CIBW_TEST_COMMAND: >
python -m pip install {package}/cstest_py &&
python {project}/suite/run_tests.py
with:
package-dir: bindings/python
output-dir: wheelhouse
- uses: actions/upload-artifact@v4
with:
name: ${{ env.ARTIFACT_NAME }}
path: ./wheelhouse/*.whl
make_sdist:
name: Make SDist
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
with:
fetch-depth: 0
submodules: true
- name: Build SDist
run: |
python3 -m pip install -U pip build
python3 -m build --sdist bindings/python
python3 -m pip install bindings/python/dist/*.tar.gz
python3 -c 'import capstone; print(f"Capstone version installed from sdist: {capstone.__version__}")'
- uses: actions/upload-artifact@v4
with:
name: sdist-archive
path: bindings/python/dist/*.tar.gz
publish:
needs: [ build_and_test_wheels, make_sdist ]
environment: pypi
permissions:
id-token: write
runs-on: ubuntu-latest
if: startsWith(github.ref, 'refs/tags') && github.event_name == 'release'
steps:
- uses: actions/download-artifact@v4
with:
merge-multiple: true
path: dist
- name: Show downloaded artifacts
run: ls -laR dist
- name: '📦 Publish distribution to PyPI'
uses: pypa/gh-action-pypi-publish@release/v1
if: ${{ success() }}
with:
user: __token__
password: ${{ secrets.pypi_pass }}
================================================
FILE: .github/workflows/build_release.yml
================================================
name: Packages Build
on:
push:
paths-ignore:
- ".gitignore"
- "docs/**"
- "ChangeLog"
- "CREDITS.TXT"
- "COMPILE_MAKE.TXT"
- "BUILDING.md"
- "CONTRIBUTING.md"
- "LICENSE.TXT"
- "LICENSE_LLVM.TXT"
- "README.md"
- "RELEASE_NOTES"
- "SPONSORS.TXT"
- "TODO"
pull_request:
release:
types: [published]
jobs:
build:
name: build_linux
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
with:
submodules: true
- name: Create archive
id: archive
run: |
VERSION=${{ github.event.release.tag_name }}
PKGNAME="capstone-$VERSION"
SHASUM=$PKGNAME.tar.xz.sha256
mkdir -p /tmp/$PKGNAME
rsync -a --exclude=build --exclude='.*' ./ /tmp/$PKGNAME/
TARBALL=$PKGNAME.tar.xz
tar -C /tmp -cJf $TARBALL $PKGNAME
sha256sum $TARBALL > $SHASUM
echo "tarball=$TARBALL" >> $GITHUB_OUTPUT
echo "shasum=$SHASUM" >> $GITHUB_OUTPUT
- uses: actions/upload-artifact@v4
with:
name: ${{ steps.archive.outputs.tarball }}
path: ${{ steps.archive.outputs.tarball }}
- uses: actions/upload-artifact@v4
with:
name: ${{ steps.archive.outputs.shasum }}
path: ${{ steps.archive.outputs.shasum }}
- name: Upload tarball and shasum to release
uses: softprops/action-gh-release@v2
if: startsWith(github.ref, 'refs/tags') && github.event_name == 'release'
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ github.event.release.tag_name }}
files: |
${{ steps.archive.outputs.tarball }}
${{ steps.archive.outputs.shasum }}
- name: Configure CMake and build the project
run: |
cmake -B build \
-DPROJECT_VERSION=${{ github.event.release.tag_name }} \
-DCMAKE_BUILD_TYPE=Release \
-DCAPSTONE_BUILD_SHARED_LIBS=1 \
-DCMAKE_INSTALL_PREFIX=/usr
cmake --build build
- name: Package DEB and RPM package
run: |
cd build
cpack -G DEB
cpack -G RPM
- uses: actions/upload-artifact@v4
with:
name: capstone_x86.deb
path: ./build/*.deb
- uses: actions/upload-artifact@v4
with:
name: capstone_x86.rpm
path: ./build/*.rpm
- name: Upload debian package to release
uses: softprops/action-gh-release@v2
if: startsWith(github.ref, 'refs/tags') && github.event_name == 'release'
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ github.event.release.tag_name }}
files: |
./build/*.deb
./build/*.rpm
build_windows:
name: build_windows
runs-on: windows-latest
steps:
- uses: actions/checkout@v4
with:
submodules: true
- name: Win MSVC 64 dev cmd setup
uses: ilammy/msvc-dev-cmd@v1
with:
arch: x64
- name: Configure CMake and build the project
run: |
cmake -B build `
-T "ClangCL,host=x64" `
-A x64 `
-DPROJECT_VERSION="${{ github.event.release.tag_name }}" `
-DCMAKE_BUILD_TYPE=Release `
-DCAPSTONE_BUILD_SHARED_LIBS=1
cmake --build build --config Release
cmake --install build --config Release
# Install NSIS according to https://github.com/NSIS-Dev/ci-examples/blob/main/.github/workflows/windows-latest.yml
- name: Package NSIS installer
run: |
iwr -useb get.scoop.sh -outfile 'install.ps1'
.\install.ps1 -RunAsAdmin
scoop update
scoop bucket add extras
scoop install nsis --global
cd build
cpack -G NSIS
- uses: actions/upload-artifact@v4
with:
name: capstone_x64.exe
path: ./build/*.exe
- name: Upload NSIS installer to release
uses: softprops/action-gh-release@v2
if: startsWith(github.ref, 'refs/tags') && github.event_name == 'release'
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ github.event.release.tag_name }}
files: |
./build/*.exe
================================================
FILE: .github/workflows/clang-format.yml
================================================
name: Run clang-format-17
on:
push:
paths:
- '**.c'
- '**.h'
# Ignore
- '!suite/auto-sync/**'
pull_request:
# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
jobs:
analyze:
runs-on: ubuntu-24.04
name: clang-format-17
steps:
- uses: actions/checkout@v4
with:
fetch-depth: 0
- name: Install clang-format-17
run: |
sudo apt update -y
sudo apt install -y clang-format-17
clang-format-17 --version
- name: Check formatting
run: |
./suite/run_clang_format.sh
================================================
FILE: .github/workflows/clang-tidy.yml
================================================
name: Run clang-tidy
on:
push:
paths:
- '**.c'
- '**.h'
pull_request:
# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true
jobs:
analyze:
runs-on: ubuntu-24.04
name: clang-tidy
steps:
- uses: actions/checkout@v4
with:
fetch-depth: 0
- name: Install clang-tidy
run: |
sudo apt install clang-tidy
- name: Build
run: |
mkdir build && cd build
CC=clang cmake -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCAPSTONE_BUILD_SHARED_LIBS=1 ..
CC=clang sudo cmake --build . --config Release
cd ..
- name: Install clang-tidy-18
run: |
sudo apt install clang-tidy-18
- name: Check for warnings
env:
base_sha: ${{ github.event.pull_request.base.sha }}
head_sha: ${{ github.event.pull_request.head.sha }}
run: |
./suite/run_clang_tidy.sh build
- uses: actions/upload-artifact@v4
if: ${{ failure() }}
with:
path: ct-warnings.txt
================================================
FILE: .github/workflows/coverity.yml
================================================
name: Coverity Scan
on:
workflow_dispatch:
schedule:
- cron: '0 0 * * 1' # On every Monday at midnight UTC
# Automatically cancel any previous workflow on new push.
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}-${{ github.event_name }}
cancel-in-progress: true
jobs:
latest:
runs-on: ubuntu-latest
steps:
- name: Determine current repository
id: "determine-repo"
run: echo "repo=${GITHUB_REPOSITORY}" >> $GITHUB_OUTPUT
- uses: actions/checkout@v4
- name: Download Coverity Build Tool
run: |
wget -q https://scan.coverity.com/download/cxx/linux64 --post-data "token=$TOKEN&project=capstone-next" -O cov-analysis-linux64.tar.gz
mkdir cov-analysis-linux64
tar xzf cov-analysis-linux64.tar.gz --strip 1 -C cov-analysis-linux64
env:
TOKEN: ${{ secrets.COVERITY_TOKEN }}
- name: Installing build dependencies
run: |
sudo apt-get --assume-yes install cmake
- name: Setup
run: |
cmake . -B build -DCAPSTONE_BUILD_CSTEST=ON
- name: Build with cov-build
run: |
export PATH=`pwd`/cov-analysis-linux64/bin:$PATH
cov-build --dir cov-int cmake --build build
tar czvf capstone.tgz cov-int
- uses: actions/upload-artifact@v4
with:
path: capstone.tgz
- name: Submit the result to Coverity Scan
run: |
curl \
--form token=$TOKEN \
--form email=capstone.engine@gmail.com \
--form file=@capstone.tgz \
--form version=trunk \
--form description="capstone" \
https://scan.coverity.com/builds?project=capstone-next
env:
TOKEN: ${{ secrets.COVERITY_TOKEN }}
if: steps.determine-repo.outputs.repo == 'capstone-engine/capstone'
================================================
FILE: .github/workflows/fuzz.yml
================================================
name: CIFuzz
on: [pull_request]
jobs:
Fuzzing:
runs-on: ubuntu-latest
steps:
- name: Build Fuzzers
uses: google/oss-fuzz/infra/cifuzz/actions/build_fuzzers@master
with:
oss-fuzz-project-name: 'capstone'
dry-run: false
- name: Run Fuzzers
uses: google/oss-fuzz/infra/cifuzz/actions/run_fuzzers@master
with:
oss-fuzz-project-name: 'capstone'
fuzz-seconds: 600
dry-run: false
- name: Upload Crash
uses: actions/upload-artifact@v4
if: failure()
with:
name: artifacts
path: ./out/artifacts
================================================
FILE: .github/workflows/labeler.yml
================================================
name: "Pull Request Labeler"
on:
- pull_request_target
# Automatically cancel any previous workflow on new push.
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}-${{ github.event_name }}
cancel-in-progress: true
jobs:
triage:
permissions:
contents: read
pull-requests: write
runs-on: ubuntu-22.04
steps:
- uses: actions/labeler@v4
with:
repo-token: "${{ secrets.GITHUB_TOKEN }}"
================================================
FILE: .gitignore
================================================
.DS_Store
# Object files
*.o
*.ko
# Gcc dependency-tracking files
*.d
# Libraries
*.lib
*.a
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
# Executables
*.exe
*.out
*.app
# python
bindings/python/build/
bindings/python/capstone.egg-info/
bindings/python/cstest_py/src/cstest_py.egg**
bindings/cython/capstone.egg-info/
*.pyc
# java
bindings/java/capstone.jar
# ocaml
bindings/ocaml/*.cmi
bindings/ocaml/*.cmx
bindings/ocaml/*.cmxa
bindings/ocaml/*.mli
bindings/ocaml/test
bindings/ocaml/test_arm
bindings/ocaml/test_aarch64
bindings/ocaml/test_basic
bindings/ocaml/test_mips
bindings/ocaml/test_x86
bindings/ocaml/test_detail
bindings/ocaml/test_ppc
bindings/ocaml/test_sparc
bindings/ocaml/test_systemz
bindings/ocaml/test_xcore
bindings/ocaml/test_m680x
# test binaries
tests/test_basic
tests/test_detail
tests/test_iter
tests/test_arm
tests/test_aarch64
tests/test_mips
tests/test_x86
tests/test_ppc
tests/test_skipdata
tests/test_sparc
tests/test_systemz
tests/test_xcore
tests/test_tricore
tests/*.static
tests/test_customized_mnem
tests/test_m68k
tests/test_tms320c64x
tests/test_m680x
tests/test_evm
tests/test_wasm
tests/test_mos65xx
tests/test_bpf
tests/test_sh
tests/test_riscv
tests/test_sh
tests/test_alpha
tests/test_hppa
tests/test_arc
# regress binaries
suite/regress/invalid_read_in_print_operand
# vim tmp file
*.swp
*~
capstone.pc
# local files
_*
# freebsd ports: generated file with "make makesum" command
packages/freebsd/ports/devel/capstone/distinfo
# VisualStudio
ProjectUpgradeLog.log
Debug/
Release/
ipch/
build*/
*.sdf
*.opensdf
*.suo
*.user
*.backup
*.VC.db
*.VC.opendb
.vscode/
# CMake build directories
build*/
/build
/out
# Xcode
xcode/Capstone.xcodeproj/xcuserdata
xcode/Capstone.xcodeproj/project.xcworkspace/xcuserdata
# IntelliJ IDEs
.idea/
# suite/
corpus-libFuzzer-capstone_fuzz_disasmnext-latest.zip
test_arm_regression
test_arm_regression.o
fuzz_harness
test_iter_benchmark
test_file_benchmark
fuzz_bindisasm
fuzz_disasm
fuzz_decode_platform
capstone_get_setup
suite/fuzz/corpus
*.s
cstool/cstool
# android
android-ndk-*
# python virtual env
.ven*/
# Auto-sync files
suite/auto-sync/src/autosync.egg-info
# clangd cache
/.cache
================================================
FILE: .gitmodules
================================================
[submodule "suite/auto-sync/vendor/tree-sitter-cpp"]
path = suite/auto-sync/vendor/tree-sitter-cpp
url = https://github.com/tree-sitter/tree-sitter-cpp.git
================================================
FILE: .reuse/dep5
================================================
Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
Upstream-Name: CapstoneEngine
Source: https://github.com/capstone-engine/capstone
Files: src/autosync/cpptranslator/Tests/test_config.json
Copyright: 2022 Rot127 <unisono@quyllur.org>
License: BSD-3
Files: src/autosync/cpptranslator/arch_config.json
Copyright: 2022 Rot127 <unisono@quyllur.org>
License: BSD-3
Files: src/autosync/cpptranslator/saved_patches.json
Copyright: 2022 Rot127 <unisono@quyllur.org>
License: BSD-3
Files: src/autosync/path_vars.json
Copyright: 2022 Rot127 <unisono@quyllur.org>
License: BSD-3
================================================
FILE: .reuse/templates/license-template.jinja2
================================================
{% for copyright_line in copyright_lines %}
{{ copyright_line }}
{% endfor %}
{% for contributor_line in contributor_lines %}
SPDX-FileContributor: {{ contributor_line }}
{% endfor %}
{% for expression in spdx_expressions %}
SPDX-License-Identifier: {{ expression }}
{% endfor %}
================================================
FILE: BUILDING.md
================================================
# Building Capstone
This guide describes how to build Capstone with `CMake`.
## Build commands
**Unix**
```bash
cmake -B build -DCMAKE_BUILD_TYPE=Release # For debug build change "Release" to "Debug"
cmake --build build
cmake --install build --prefix "<install-prefix>"
```
To create rpm, debian and OSX packages, run the following
```bash
cmake -B build -DCMAKE_BUILD_TYPE=Release -DCAPSTONE_BUILD_SHARED_LIBS=1 -DCMAKE_INSTALL_PREFIX=/usr
cmake --build build
cd build
cpack -G DEB
cpack -G RPM
cpack -G DragNDrop
```
**Windows**
```bash
cmake.exe -B build
cmake.exe --build build --config Release # For debug build change "Release" to "Debug"
cmake.exe --install build
```
## Tailor Capstone to your needs.
Enable and disable options in the "configure" step (first `cmake` command from above).
Options are added with `-D<OPTION>=ON/OFF` or `-D<OPTION>=1/0`
### Exclude architecture modules
You can build Capstone with only the architectures you need.
By default all are enabled.
- `CAPSTONE_ARCHITECTURE_DEFAULT`: Whether all architectures are enabled by default.
- `CAPSTONE_ARM_SUPPORT`: Support ARM.
- `CAPSTONE_AARCH64_SUPPORT`: Support AARCH64.
- `CAPSTONE_ALPHA_SUPPORT`: Support Alpha.
- `CAPSTONE_ARC_SUPPORT`: Support ARC.
- `CAPSTONE_HPPA_SUPPORT`: Support HPPA.
- `CAPSTONE_LOONGARCH_SUPPORT`: Support LoongArch.
- `CAPSTONE_M680X_SUPPORT`: Support M680X.
- `CAPSTONE_M68K_SUPPORT`: Support M68K.
- `CAPSTONE_MIPS_SUPPORT`: Support Mips.
- `CAPSTONE_MOS65XX_SUPPORT`: Support MOS65XX.
- `CAPSTONE_PPC_SUPPORT`: Support PPC.
- `CAPSTONE_SPARC_SUPPORT`: Support Sparc.
- `CAPSTONE_SYSTEMZ_SUPPORT`: Support SystemZ.
- `CAPSTONE_XCORE_SUPPORT`: Support XCore.
- `CAPSTONE_TRICORE_SUPPORT`: Support TriCore.
- `CAPSTONE_X86_SUPPORT`: Support X86.
- `CAPSTONE_TMS320C64X_SUPPORT`: Support TMS320C64X.
- `CAPSTONE_M680X_SUPPORT`: Support M680X.
- `CAPSTONE_EVM_SUPPORT`: Support EVM.
- `CAPSTONE_WASM_SUPPORT`: Support Web Assembly.
- `CAPSTONE_BPF_SUPPORT`: Support BPF.
- `CAPSTONE_RISCV_SUPPORT`: Support RISCV.
### Module registration
If you're building a static library that you intend to link into multiple consumers,
and they have differing architecture requirements, you may want `-DCAPSTONE_USE_ARCH_REGISTRATION=1`.
In your consumer code you can call `cs_arch_register_*()` to register the specific module for initialization.
In this way you only pay footprint size for the architectures you're actually using in each consumer,
without having to compile Capstone multiple times.
### Additional options
Capstone allows some more customization via the following options:
- `CAPSTONE_BUILD_SHARED_LIBS`: Build shared libraries.
- `CAPSTONE_BUILD_STATIC_LIBS`: Build static libraries (`ON` by default).
- `CAPSTONE_BUILD_STATIC_MSVC_RUNTIME`: (Windows only) - Build with static MSVC runtime. Always set if `CAPSTONE_BUILD_SHARED_LIBS=ON`.
- `CAPSTONE_BUILD_CSTOOL`: Enable/disable build of `cstool`. Default is enabled if build runs from the repository root.
- `CAPSTONE_USE_SYS_DYN_MEM`: change this to OFF to use your own dynamic memory management.
- `CAPSTONE_BUILD_MACOS_THIN`: MacOS only. Disables universal2 build. So you only get the binary for you processor architecture.
- `CAPSTONE_BUILD_DIET`: change this to ON to make the binaries more compact.
- `CAPSTONE_X86_REDUCE`: change this to ON to make X86 binary smaller.
- `CAPSTONE_X86_ATT_DISABLE`: change this to ON to disable AT&T syntax on x86.
By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE
modes are disabled. To use your own memory allocations, turn ON both DIET &
X86_REDUCE, run "cmake" with: `-DCAPSTONE_USE_SYS_DYN_MEM=0`, `-DCAPSTONE_BUILD_DIET=1`, `-DCAPSTONE_X86_REDUCE=1`
### Cross compilation
We have some example configurations for cross builds in [cross_configs](cross_configs/).
Build them with the following command (static build is of course optional):
```bash
cmake -DCMAKE_TOOLCHAIN_FILE=cross_configs/<cross_build_config>.cmake -DCAPSTONE_BUILD_STATIC_LIBS=ON -S . -B build
cmake --build build
```
See the cmake cross compilation [documentation](https://cmake.org/cmake/help/book/mastering-cmake/chapter/Cross%20Compiling%20With%20CMake.html)
for more details.
**Android**
The [Android SDK provides](https://developer.android.com/ndk/guides/cmake) a toolchain file for CMake.
It is the most reliable way to build Capstone for Android.
_Example:_
```bash
cmake -B build -DCMAKE_TOOLCHAIN_FILE=$NDK_PATH/build/cmake/android.toolchain.cmake -DANDROID_NDK=$NDK_PATH -DANDROID_ABI=arm64-v8a
cmake --build build
```
#### Test cross build with QEMU
Running the binaries with QEMU (here an example for s390x on Fedora 40)
is usually done with a command like this:
```bash
QEMU_LD_PREFIX=/usr/s390x-redhat-linux/sys-root/fc40/usr/ qemu-s390x-static ./build/cstool -d aarch64 01421bd501423bd5
```
### Developer specific options
- `CAPSTONE_DEBUG`: Change this to ON to enable extra debug assertions. Automatically enabled with `Debug` build.
- `CAPSTONE_BUILD_CSTEST`: Build `cstest` in `suite/cstest/`. **Note:** `cstest` requires `libyaml` on your system. It attempts to build it from source otherwise.
- `CMAKE_EXPORT_COMPILE_COMMANDS`: To export `compile_commands.json` for `clangd` and other language servers.
- `ENABLE_ASAN`: Compiles Capstone with the address sanitizer.
- `ENABLE_COVERAGE`: Generate coverage files.
- `CAPSTONE_BUILD_LEGACY_TESTS`: Build some legacy integration tests.
## Building cstest
`cstest` is build together with Capstone by adding the flag `-DCAPSTONE_BUILD_CSTEST`.
The build requires `libyaml`. It is a fairly common package and should be provided by your package manager.
If not present it will attempt to build it from source.
_Note:_ Currently `cstest` is only tested on Linux.
If you run another operation system, please install `cstest_py`.
See `bindings/python/BUILDING.md` for instructions.
================================================
FILE: CMakeLists.txt
================================================
# For MSVC_RUNTIME_LIBRARY
cmake_minimum_required(VERSION 3.15)
if(CMAKE_SOURCE_DIR STREQUAL CMAKE_BINARY_DIR)
message(FATAL_ERROR "In-tree builds are not supported. Run CMake from a separate directory: cmake -B build")
endif()
set(BUILD_RPATH_USE_ORIGIN true)
# Detect whether capstone is compiled as top-level or a subdirectory
set(PROJECT_IS_TOP_LEVEL OFF)
if(CMAKE_CURRENT_SOURCE_DIR STREQUAL CMAKE_SOURCE_DIR)
set(PROJECT_IS_TOP_LEVEL ON)
# Enable folder support
set_property(GLOBAL PROPERTY USE_FOLDERS ON)
endif()
# https://cmake.org/cmake/help/latest/policy/CMP0042.html
cmake_policy(SET CMP0042 NEW)
# Check if VERSION is provided externally, otherwise default to 6.0.0
if(NOT DEFINED PROJECT_VERSION OR PROJECT_VERSION STREQUAL "")
set(PROJECT_VERSION "6.0.0")
endif()
# Remove the 'v' prefix if it exists and extract the major, minor, and patch versions
string(REGEX MATCH "^[vV]?([0-9]+\\.[0-9]+\\.[0-9]+)" _ "${PROJECT_VERSION}")
set(PROJECT_VERSION_BASE ${CMAKE_MATCH_1})
# Use PROJECT_VERSION directly for CPack
set(CPACK_PACKAGE_VERSION ${PROJECT_VERSION})
# Set the project version without the pre-release identifier
project(capstone VERSION ${PROJECT_VERSION_BASE})
# Print the values of PROJECT_VERSION and PROJECT_VERSION_BASE
message(STATUS "PROJECT_VERSION: ${CPACK_PACKAGE_VERSION} CAPSTONE_VERSION: ${PROJECT_VERSION_BASE}")
set(UNIX_COMPILER_OPTIONS -Werror -Wall -Warray-bounds -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)
# maybe-uninitialized is only supported by newer versions of GCC.
# Unfortunately, it is pretty unreliable and reports wrong results.
# So we disable it for all compilers versions which support it.
include(CheckCCompilerFlag)
check_c_compiler_flag("-Wno-maybe-uninitialized" SUPPORTS_MU)
check_c_compiler_flag("-Wshadow=local" SUPPORTS_SHADOWING)
check_c_compiler_flag("-Wsometimes-uninitialized" SUPPORTS_SUNINIT)
if (SUPPORTS_MU)
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wno-maybe-uninitialized)
endif()
if (SUPPORTS_SHADOWING)
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wshadow=local)
endif()
if (SUPPORTS_SUNINIT)
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wsometimes-uninitialized)
endif()
if (MSVC)
add_compile_options(/W1 /w14189)
else()
add_compile_options(${UNIX_COMPILER_OPTIONS})
endif()
# to configure the options specify them in the command line or change them in the cmake UI.
# Don't edit the makefile!
option(CAPSTONE_BUILD_SHARED_LIBS "Build shared library" OFF)
option(CAPSTONE_BUILD_STATIC_LIBS "Build static library" ON)
option(CAPSTONE_BUILD_STATIC_MSVC_RUNTIME "Embed static MSVC runtime (Windows only). Always set if CAPSTONE_BUILD_SHARED_LIBS=ON" ${CAPSTONE_BUILD_SHARED_LIBS})
option(CAPSTONE_BUILD_MACOS_THIN "Disable universal2 builds on macOS" OFF)
option(CAPSTONE_BUILD_DIET "Build diet library" OFF)
option(CAPSTONE_BUILD_LEGACY_TESTS "Build legacy tests" ${PROJECT_IS_TOP_LEVEL})
option(CAPSTONE_BUILD_CSTOOL "Build cstool" ${PROJECT_IS_TOP_LEVEL})
option(CAPSTONE_BUILD_CSTEST "Build cstest" OFF)
option(CAPSTONE_USE_DEFAULT_ALLOC "Use default memory allocation functions" ON)
option(CAPSTONE_USE_ARCH_REGISTRATION "Use explicit architecture registration" OFF)
option(CAPSTONE_ARCHITECTURE_DEFAULT "Whether architectures are enabled by default" ON)
option(CAPSTONE_DEBUG "Whether to enable extra debug assertions (enabled with CMAKE_BUILD_TYPE=Debug)" OFF)
option(CAPSTONE_ASSERTION_WARNINGS "Disables some asserts and warns instead when hit. Does not disable all asserts." OFF)
option(CAPSTONE_INSTALL "Generate install target" ${PROJECT_IS_TOP_LEVEL})
option(ENABLE_ASAN "Enable address sanitizer" OFF)
option(ENABLE_COVERAGE "Enable test coverage" OFF)
if (NOT CAPSTONE_BUILD_SHARED_LIBS AND NOT CAPSTONE_BUILD_STATIC_LIBS)
FATAL_ERROR("CAPSTONE_BUILD_SHARED_LIBS and CAPSTONE_BUILD_STATIC_LIBS are both unset. Nothing to build.")
endif()
if (ENABLE_ASAN)
message("Enabling ASAN")
add_definitions(-DASAN_ENABLED)
add_compile_options(-fsanitize=address,undefined)
add_link_options(-fsanitize=address,undefined)
endif()
if (ENABLE_COVERAGE)
message("Enabling COVERAGE")
add_compile_options(--coverage)
add_link_options(--coverage)
endif()
# If building for OSX it's best to allow CMake to handle building both architectures
if(APPLE AND NOT CAPSTONE_BUILD_MACOS_THIN)
set(CMAKE_OSX_ARCHITECTURES "x86_64;arm64")
endif()
set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSTEMZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE ALPHA HPPA LOONGARCH XTENSA ARC)
set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore Alpha HPPA LoongArch Xtensa ARC)
# If building for OSX it's best to allow CMake to handle building both architectures
if(APPLE AND NOT CAPSTONE_BUILD_MACOS_THIN)
# The cibuildwheel on Github Actions sets this env variable
# with the architecture flags it wants to build for.
if(DEFINED ENV{ARCHFLAGS})
if("$ENV{ARCHFLAGS}" STREQUAL "-arch arm64 -arch x86_64")
set(CMAKE_OSX_ARCHITECTURES "x86_64;arm64")
elseif("$ENV{ARCHFLAGS}" STREQUAL "-arch arm64")
set(CMAKE_OSX_ARCHITECTURES "arm64")
elseif("$ENV{ARCHFLAGS}" STREQUAL "-arch x86_64")
set(CMAKE_OSX_ARCHITECTURES "x86_64")
endif()
else()
set(CMAKE_OSX_ARCHITECTURES "x86_64;arm64")
endif()
endif()
list(LENGTH SUPPORTED_ARCHITECTURES count)
math(EXPR count "${count}-1")
# create options controlling whether support for a particular architecture is needed
foreach(i RANGE ${count})
list(GET SUPPORTED_ARCHITECTURES ${i} supported_architecture)
list(GET SUPPORTED_ARCHITECTURE_LABELS ${i} supported_architecture_label)
option("CAPSTONE_${supported_architecture}_SUPPORT" "${supported_architecture_label} support" ${CAPSTONE_ARCHITECTURE_DEFAULT})
endforeach()
option(CAPSTONE_X86_REDUCE "x86 with reduce instruction sets to minimize library" OFF)
option(CAPSTONE_X86_ATT_DISABLE "Disable x86 AT&T syntax" OFF)
option(CAPSTONE_OSXKERNEL_SUPPORT "Support to embed Capstone into OS X Kernel extensions" OFF)
if(CAPSTONE_BUILD_DIET)
add_definitions(-DCAPSTONE_DIET)
endif()
if(CAPSTONE_USE_DEFAULT_ALLOC)
add_definitions(-DCAPSTONE_USE_SYS_DYN_MEM)
endif()
if(CAPSTONE_USE_ARCH_REGISTRATION)
add_definitions(-DCAPSTONE_USE_ARCH_REGISTRATION)
elseif(CAPSTONE_ARCHITECTURE_DEFAULT)
# propagate architecture support variables to preprocessor
foreach(supported_architecture ${SUPPORTED_ARCHITECTURES})
set(option_name "CAPSTONE_${supported_architecture}_SUPPORT")
if(${option_name})
message("Enabling ${option_name}")
add_definitions("-D${option_name}")
endif()
endforeach()
endif()
if(CAPSTONE_X86_REDUCE)
add_definitions(-DCAPSTONE_X86_REDUCE)
endif()
if(CAPSTONE_X86_ATT_DISABLE)
add_definitions(-DCAPSTONE_X86_ATT_DISABLE)
endif()
if(CAPSTONE_DEBUG OR CMAKE_BUILD_TYPE STREQUAL "Debug")
add_definitions(-DCAPSTONE_DEBUG)
endif()
# Force static runtime libraries
if(CAPSTONE_BUILD_STATIC_MSVC_RUNTIME)
set(CMAKE_MSVC_RUNTIME_LIBRARY "MultiThreaded$<$<CONFIG:Debug>:Debug>")
endif()
# The directory for external project patches.
set(EXTERNAL_PROJ_PATCH_DIR ${PROJECT_SOURCE_DIR}/ext_patches/)
## sources
set(SOURCES_ENGINE
cs.c
Mapping.c
MCInst.c
MCInstrDesc.c
MCInstPrinter.c
MCRegisterInfo.c
SStream.c
utils.c
)
set(HEADERS_ENGINE
cs_simple_types.h
cs_priv.h
LEB128.h
Mapping.h
MathExtras.h
MCDisassembler.h
MCFixedLenDisassembler.h
MCInst.h
MCInstrDesc.h
MCInstPrinter.h
MCRegisterInfo.h
SStream.h
utils.h
)
set(HEADERS_COMMON
include/capstone/aarch64.h
include/capstone/arm64.h
include/capstone/arm.h
include/capstone/capstone.h
include/capstone/cs_operand.h
include/capstone/evm.h
include/capstone/wasm.h
include/capstone/mips.h
include/capstone/ppc.h
include/capstone/x86.h
include/capstone/sparc.h
include/capstone/systemz.h
include/capstone/systemz_compatibility.h
include/capstone/xcore.h
include/capstone/m68k.h
include/capstone/tms320c64x.h
include/capstone/m680x.h
include/capstone/mos65xx.h
include/capstone/bpf.h
include/capstone/riscv.h
include/capstone/sh.h
include/capstone/tricore.h
include/capstone/platform.h
include/capstone/sh.h
include/capstone/alpha.h
include/capstone/hppa.h
include/capstone/loongarch.h
include/capstone/xtensa.h
include/capstone/arc.h
)
## architecture support
if(CAPSTONE_ARM_SUPPORT)
add_definitions(-DCAPSTONE_HAS_ARM)
set(SOURCES_ARM
arch/ARM/ARMBaseInfo.c
arch/ARM/ARMDisassembler.c
arch/ARM/ARMDisassemblerExtension.c
arch/ARM/ARMInstPrinter.c
arch/ARM/ARMMapping.c
arch/ARM/ARMModule.c
)
set(HEADERS_ARM
arch/ARM/ARMAddressingModes.h
arch/ARM/ARMBaseInfo.h
arch/ARM/ARMDisassemblerExtension.h
arch/ARM/ARMInstPrinter.h
arch/ARM/ARMLinkage.h
arch/ARM/ARMMapping.h
arch/ARM/ARMGenAsmWriter.inc
arch/ARM/ARMGenDisassemblerTables.inc
arch/ARM/ARMGenInstrInfo.inc
arch/ARM/ARMGenRegisterInfo.inc
arch/ARM/ARMGenSubtargetInfo.inc
arch/ARM/ARMGenCSFeatureName.inc
arch/ARM/ARMGenCSMappingInsn.inc
arch/ARM/ARMGenCSMappingInsnOp.inc
arch/ARM/ARMGenCSMappingInsnName.inc
arch/ARM/ARMGenSystemRegister.inc
)
endif()
if(CAPSTONE_AARCH64_SUPPORT)
add_definitions(-DCAPSTONE_HAS_AARCH64)
set(SOURCES_AARCH64
arch/AArch64/AArch64BaseInfo.c
arch/AArch64/AArch64Disassembler.c
arch/AArch64/AArch64DisassemblerExtension.c
arch/AArch64/AArch64InstPrinter.c
arch/AArch64/AArch64Mapping.c
arch/AArch64/AArch64Module.c
)
set(HEADERS_AARCH64
arch/AArch64/AArch64AddressingModes.h
arch/AArch64/AArch64BaseInfo.h
arch/AArch64/AArch64DisassemblerExtension.h
arch/AArch64/AArch64InstPrinter.h
arch/AArch64/AArch64Linkage.h
arch/AArch64/AArch64Mapping.h
arch/AArch64/AArch64GenAsmWriter.inc
arch/AArch64/AArch64GenDisassemblerTables.inc
arch/AArch64/AArch64GenInstrInfo.inc
arch/AArch64/AArch64GenRegisterInfo.inc
arch/AArch64/AArch64GenSubtargetInfo.inc
arch/AArch64/AArch64GenSystemOperands.inc
arch/AArch64/AArch64GenCSMappingInsn.inc
arch/AArch64/AArch64GenCSMappingInsnName.inc
arch/AArch64/AArch64GenCSMappingInsnOp.inc
)
endif()
if(CAPSTONE_MIPS_SUPPORT)
add_definitions(-DCAPSTONE_HAS_MIPS)
set(SOURCES_MIPS
arch/Mips/MipsDisassembler.c
arch/Mips/MipsInstPrinter.c
arch/Mips/MipsMapping.c
arch/Mips/MipsModule.c
)
set(HEADERS_MIPS
arch/Mips/MipsDisassembler.h
arch/Mips/MipsGenAsmWriter.inc
arch/Mips/MipsGenDisassemblerTables.inc
arch/Mips/MipsGenInstrInfo.inc
arch/Mips/MipsGenRegisterInfo.inc
arch/Mips/MipsGenSubtargetInfo.inc
arch/Mips/MipsInstPrinter.h
arch/Mips/MipsMapping.h
arch/Mips/MipsMappingInsn.inc
)
set(HEADERS_MIPS
arch/Mips/MipsDisassembler.h
arch/Mips/MipsGenAsmWriter.inc
arch/Mips/MipsGenDisassemblerTables.inc
arch/Mips/MipsGenInstrInfo.inc
arch/Mips/MipsGenRegisterInfo.inc
arch/Mips/MipsGenSubtargetInfo.inc
arch/Mips/MipsInstPrinter.h
arch/Mips/MipsMapping.h
)
endif()
if(CAPSTONE_PPC_SUPPORT)
add_definitions(-DCAPSTONE_HAS_POWERPC)
set(SOURCES_PPC
arch/PowerPC/PPCDisassembler.c
arch/PowerPC/PPCInstPrinter.c
arch/PowerPC/PPCMapping.c
arch/PowerPC/PPCModule.c
)
set(HEADERS_PPC
arch/PowerPC/PPCInstrInfo.h
arch/PowerPC/PPCLinkage.h
arch/PowerPC/PPCMapping.h
arch/PowerPC/PPCMCTargetDesc.h
arch/PowerPC/PPCPredicates.h
arch/PowerPC/PPCRegisterInfo.h
arch/PowerPC/PPCGenAsmWriter.inc
arch/PowerPC/PPCGenCSFeatureName.inc
arch/PowerPC/PPCGenCSMappingInsn.inc
arch/PowerPC/PPCGenCSMappingInsnOp.inc
arch/PowerPC/PPCGenCSMappingInsnName.inc
arch/PowerPC/PPCGenCSOpGroup.inc
arch/PowerPC/PPCGenDisassemblerTables.inc
arch/PowerPC/PPCGenInstrInfo.inc
arch/PowerPC/PPCGenSubtargetInfo.inc
arch/PowerPC/PPCGenRegisterInfo.inc
)
endif()
if(CAPSTONE_X86_SUPPORT)
add_definitions(-DCAPSTONE_HAS_X86)
set(SOURCES_X86
arch/X86/X86Disassembler.c
arch/X86/X86DisassemblerDecoder.c
arch/X86/X86IntelInstPrinter.c
arch/X86/X86InstPrinterCommon.c
arch/X86/X86Mapping.c
arch/X86/X86Module.c
)
set(HEADERS_X86
arch/X86/X86BaseInfo.h
arch/X86/X86Disassembler.h
arch/X86/X86DisassemblerDecoder.h
arch/X86/X86DisassemblerDecoderCommon.h
arch/X86/X86GenAsmWriter.inc
arch/X86/X86GenAsmWriter1.inc
arch/X86/X86GenAsmWriter1_reduce.inc
arch/X86/X86GenAsmWriter_reduce.inc
arch/X86/X86GenDisassemblerTables.inc
arch/X86/X86GenDisassemblerTables_reduce.inc
arch/X86/X86GenInstrInfo.inc
arch/X86/X86GenInstrInfo_reduce.inc
arch/X86/X86GenRegisterInfo.inc
arch/X86/X86InstPrinter.h
arch/X86/X86Mapping.h
arch/X86/X86MappingInsn.inc
arch/X86/X86MappingInsnOp.inc
arch/X86/X86MappingInsnOp_reduce.inc
arch/X86/X86MappingInsn_reduce.inc
)
set(HEADERS_X86
arch/X86/X86BaseInfo.h
arch/X86/X86Disassembler.h
arch/X86/X86DisassemblerDecoder.h
arch/X86/X86DisassemblerDecoderCommon.h
arch/X86/X86GenAsmWriter.inc
arch/X86/X86GenAsmWriter1.inc
arch/X86/X86GenAsmWriter1_reduce.inc
arch/X86/X86GenAsmWriter_reduce.inc
arch/X86/X86GenDisassemblerTables.inc
arch/X86/X86GenDisassemblerTables_reduce.inc
arch/X86/X86GenInstrInfo.inc
arch/X86/X86GenInstrInfo_reduce.inc
arch/X86/X86GenRegisterInfo.inc
arch/X86/X86InstPrinter.h
arch/X86/X86Mapping.h
)
if(NOT CAPSTONE_BUILD_DIET)
set(SOURCES_X86 ${SOURCES_X86} arch/X86/X86ATTInstPrinter.c)
endif()
endif()
if(CAPSTONE_SPARC_SUPPORT)
add_definitions(-DCAPSTONE_HAS_SPARC)
set(SOURCES_SPARC
arch/Sparc/SparcDisassembler.c
arch/Sparc/SparcDisassemblerExtension.c
arch/Sparc/SparcInstPrinter.c
arch/Sparc/SparcMapping.c
arch/Sparc/SparcModule.c
)
set(HEADERS_SPARC
arch/Sparc/SparcDisassemblerExtension.h
arch/Sparc/SparcInstPrinter.h
arch/Sparc/SparcLinkage.h
arch/Sparc/SparcMCTargetDesc.h
arch/Sparc/SparcMapping.h
arch/Sparc/SparcModule.h
arch/Sparc/SparcGenAsmWriter.inc
arch/Sparc/SparcGenCSAliasMnemMap.inc
arch/Sparc/SparcGenCSFeatureName.inc
arch/Sparc/SparcGenCSMappingInsn.inc
arch/Sparc/SparcGenCSMappingInsnName.inc
arch/Sparc/SparcGenCSMappingInsnOp.inc
arch/Sparc/SparcGenCSOpGroup.inc
arch/Sparc/SparcGenDisassemblerTables.inc
arch/Sparc/SparcGenInstrInfo.inc
arch/Sparc/SparcGenRegisterInfo.inc
arch/Sparc/SparcGenSubtargetInfo.inc
arch/Sparc/SparcGenSystemOperands.inc
)
endif()
if(CAPSTONE_SYSTEMZ_SUPPORT)
add_definitions(-DCAPSTONE_HAS_SYSTEMZ)
set(SOURCES_SYSTEMZ
arch/SystemZ/SystemZDisassembler.c
arch/SystemZ/SystemZDisassemblerExtension.c
arch/SystemZ/SystemZInstPrinter.c
arch/SystemZ/SystemZMapping.c
arch/SystemZ/SystemZModule.c
arch/SystemZ/SystemZMCTargetDesc.c
)
set(HEADERS_SYSTEMZ
arch/SystemZ/SystemZLinkage.h
arch/SystemZ/SystemZDisassemblerExtension.h
arch/SystemZ/SystemZInstPrinter.h
arch/SystemZ/SystemZMCTargetDesc.h
arch/SystemZ/SystemZMapping.h
arch/SystemZ/SystemZModule.h
arch/SystemZ/SystemZGenAsmWriter.inc
arch/SystemZ/SystemZGenCSAliasMnemMap.inc
arch/SystemZ/SystemZGenCSFeatureName.inc
arch/SystemZ/SystemZGenCSMappingInsn.inc
arch/SystemZ/SystemZGenCSMappingInsnName.inc
arch/SystemZ/SystemZGenCSMappingInsnOp.inc
arch/SystemZ/SystemZGenCSOpGroup.inc
arch/SystemZ/SystemZGenDisassemblerTables.inc
arch/SystemZ/SystemZGenInstrInfo.inc
arch/SystemZ/SystemZGenRegisterInfo.inc
arch/SystemZ/SystemZGenSubtargetInfo.inc
)
endif()
if(CAPSTONE_XCORE_SUPPORT)
add_definitions(-DCAPSTONE_HAS_XCORE)
set(SOURCES_XCORE
arch/XCore/XCoreDisassembler.c
arch/XCore/XCoreInstPrinter.c
arch/XCore/XCoreMapping.c
arch/XCore/XCoreModule.c
)
set(HEADERS_XCORE
arch/XCore/XCoreDisassembler.h
arch/XCore/XCoreGenAsmWriter.inc
arch/XCore/XCoreGenDisassemblerTables.inc
arch/XCore/XCoreGenInstrInfo.inc
arch/XCore/XCoreGenRegisterInfo.inc
arch/XCore/XCoreInstPrinter.h
arch/XCore/XCoreMapping.h
arch/XCore/XCoreMappingInsn.inc
)
endif()
if(CAPSTONE_M68K_SUPPORT)
add_definitions(-DCAPSTONE_HAS_M68K)
set(SOURCES_M68K
arch/M68K/M68KDisassembler.c
arch/M68K/M68KInstPrinter.c
arch/M68K/M68KModule.c
)
set(HEADERS_M68K
arch/M68K/M68KDisassembler.h
)
endif()
if(CAPSTONE_TMS320C64X_SUPPORT)
add_definitions(-DCAPSTONE_HAS_TMS320C64X)
set(SOURCES_TMS320C64X
arch/TMS320C64x/TMS320C64xDisassembler.c
arch/TMS320C64x/TMS320C64xInstPrinter.c
arch/TMS320C64x/TMS320C64xMapping.c
arch/TMS320C64x/TMS320C64xModule.c
)
set(HEADERS_TMS320C64X
arch/TMS320C64x/TMS320C64xDisassembler.h
arch/TMS320C64x/TMS320C64xGenAsmWriter.inc
arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc
arch/TMS320C64x/TMS320C64xGenInstrInfo.inc
arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc
arch/TMS320C64x/TMS320C64xInstPrinter.h
arch/TMS320C64x/TMS320C64xMapping.h
)
endif()
if(CAPSTONE_M680X_SUPPORT)
add_definitions(-DCAPSTONE_HAS_M680X)
set(SOURCES_M680X
arch/M680X/M680XDisassembler.c
arch/M680X/M680XInstPrinter.c
arch/M680X/M680XModule.c
)
set(HEADERS_M680X
arch/M680X/M680XInstPrinter.h
arch/M680X/M680XDisassembler.h
arch/M680X/M680XDisassemblerInternals.h
)
endif()
if(CAPSTONE_EVM_SUPPORT)
add_definitions(-DCAPSTONE_HAS_EVM)
set(SOURCES_EVM
arch/EVM/EVMDisassembler.c
arch/EVM/EVMInstPrinter.c
arch/EVM/EVMMapping.c
arch/EVM/EVMModule.c
)
set(HEADERS_EVM
arch/EVM/EVMDisassembler.h
arch/EVM/EVMInstPrinter.h
arch/EVM/EVMMapping.h
arch/EVM/EVMMappingInsn.inc
)
endif()
if(CAPSTONE_WASM_SUPPORT)
add_definitions(-DCAPSTONE_HAS_WASM)
set(SOURCES_WASM
arch/WASM/WASMDisassembler.c
arch/WASM/WASMInstPrinter.c
arch/WASM/WASMMapping.c
arch/WASM/WASMModule.c
)
set(HEADERS_WASM
arch/WASM/WASMDisassembler.h
arch/WASM/WASMInstPrinter.h
arch/WASM/WASMMapping.h
)
endif()
if(CAPSTONE_MOS65XX_SUPPORT)
add_definitions(-DCAPSTONE_HAS_MOS65XX)
set(SOURCES_MOS65XX
arch/MOS65XX/MOS65XXModule.c
arch/MOS65XX/MOS65XXDisassembler.c)
set(HEADERS_SOURCES_MOS65XX
arch/MOS65XX/MOS65XXDisassembler.h
)
endif()
if(CAPSTONE_BPF_SUPPORT)
add_definitions(-DCAPSTONE_HAS_BPF)
set(SOURCES_BPF
arch/BPF/BPFDisassembler.c
arch/BPF/BPFInstPrinter.c
arch/BPF/BPFMapping.c
arch/BPF/BPFModule.c
)
set(HEADERS_BPF
arch/BPF/BPFConstants.h
arch/BPF/BPFDisassembler.h
arch/BPF/BPFInstPrinter.h
arch/BPF/BPFMapping.h
arch/BPF/BPFModule.h
)
endif()
if(CAPSTONE_RISCV_SUPPORT)
add_definitions(-DCAPSTONE_HAS_RISCV)
set(SOURCES_RISCV
arch/RISCV/RISCVBaseInfo.c
arch/RISCV/RISCVDisassembler.c
arch/RISCV/RISCVDisassemblerExtension.c
arch/RISCV/RISCVInstPrinter.c
arch/RISCV/RISCVMapping.c
arch/RISCV/RISCVModule.c
)
set(HEADERS_RISCV
arch/RISCV/RISCVBaseInfo.h
arch/RISCV/RISCVDisassemblerExtension.h
arch/RISCV/RISCVInstPrinter.h
arch/RISCV/RISCVMapping.h
arch/RISCV/RISCVModule.h
arch/RISCV/RISCVLinkage.h
arch/RISCV/RISCVGenAsmWriter.inc
arch/RISCV/RISCVGenCSAliasMnemMap.inc
arch/RISCV/RISCVGenCSFeatureName.inc
arch/RISCV/RISCVGenCSMappingInsn.inc
arch/RISCV/RISCVGenCSMappingInsnName.inc
arch/RISCV/RISCVGenCSMappingInsnOp.inc
arch/RISCV/RISCVGenCSOpGroup.inc
arch/RISCV/RISCVGenCSSystemOperandsEnum.inc
arch/RISCV/RISCVGenDisassemblerTables.inc
arch/RISCV/RISCVGenInstrInfo.inc
arch/RISCV/RISCVGenRegisterInfo.inc
arch/RISCV/RISCVGenSubtargetInfo.inc
arch/RISCV/RISCVGenSystemOperands.inc
arch/RISCV/RISCVGenCompressedInstructionsInfo.inc
arch/RISCV/RISCVGenCSAliasEnum.inc
arch/RISCV/RISCVGenCSFeatureEnum.inc
arch/RISCV/RISCVGenCSInsnEnum.inc
arch/RISCV/RISCVGenCSRegEnum.inc
)
endif()
if(CAPSTONE_SH_SUPPORT)
add_definitions(-DCAPSTONE_HAS_SH)
set(SOURCES_SH
arch/SH/SHDisassembler.c
arch/SH/SHInstPrinter.c
arch/SH/SHModule.c
)
set(HEADERS_SH
arch/SH/SHDisassembler.h
arch/SH/SHInstPrinter.h
arch/SH/SHModule.h
arch/SH/SHInsnTable.inc
)
endif()
if (CAPSTONE_TRICORE_SUPPORT)
add_definitions(-DCAPSTONE_HAS_TRICORE)
set(SOURCES_TRICORE
arch/TriCore/TriCoreDisassembler.c
arch/TriCore/TriCoreInstPrinter.c
arch/TriCore/TriCoreMapping.c
arch/TriCore/TriCoreModule.c
)
set(HEADERS_TRICORE
arch/TriCore/TriCoreDisassembler.h
arch/TriCore/TriCoreLinkage.h
arch/TriCore/TriCoreGenAsmWriter.inc
arch/TriCore/TriCoreGenDisassemblerTables.inc
arch/TriCore/TriCoreGenInstrInfo.inc
arch/TriCore/TriCoreGenRegisterInfo.inc
arch/TriCore/TriCoreMapping.h
arch/TriCore/TriCoreModule.h
)
endif ()
if (CAPSTONE_ALPHA_SUPPORT)
add_definitions(-DCAPSTONE_HAS_ALPHA)
set(SOURCES_ALPHA
arch/Alpha/AlphaDisassembler.c
arch/Alpha/AlphaInstPrinter.c
arch/Alpha/AlphaMapping.c
arch/Alpha/AlphaModule.c
)
set(HEADERS_ALPHA
arch/Alpha/AlphaDisassembler.h
arch/Alpha/AlphaGenAsmWriter.inc
arch/Alpha/AlphaGenDisassemblerTables.inc
arch/Alpha/AlphaGenInstrInfo.inc
arch/Alpha/AlphaGenRegisterInfo.inc
arch/Alpha/AlphaLinkage.h
arch/Alpha/AlphaMapping.h
arch/Alpha/AlphaModule.h
arch/Alpha/AlphaGenCSMappingInsnOp.inc
arch/Alpha/AlphaGenCSMappingInsn.inc
arch/Alpha/AlphaGenCSMappingInsnName.inc
)
endif ()
if(CAPSTONE_HPPA_SUPPORT)
add_definitions(-DCAPSTONE_HAS_HPPA)
set(SOURCES_HPPA
arch/HPPA/HPPADisassembler.c
arch/HPPA/HPPAInstPrinter.c
arch/HPPA/HPPAMapping.c
arch/HPPA/HPPAModule.c
)
set(HEADERS_HPPA
arch/HPPA/HPPAConstants.h
arch/HPPA/HPPADisassembler.h
arch/HPPA/HPPAInstPrinter.h
arch/HPPA/HPPAMapping.h
arch/HPPA/HPPAModule.h
)
endif()
if (CAPSTONE_LOONGARCH_SUPPORT)
add_definitions(-DCAPSTONE_HAS_LOONGARCH)
set(SOURCES_LOONGARCH
arch/LoongArch/LoongArchDisassembler.c
arch/LoongArch/LoongArchDisassemblerExtension.c
arch/LoongArch/LoongArchInstPrinter.c
arch/LoongArch/LoongArchMapping.c
arch/LoongArch/LoongArchModule.c
)
set(HEADERS_LOONGARCH
arch/LoongArch/LoongArchInstPrinter.h
arch/LoongArch/LoongArchMapping.h
arch/LoongArch/LoongArchModule.h
arch/LoongArch/LoongArchLinkage.h
)
endif ()
if(CAPSTONE_XTENSA_SUPPORT)
add_definitions(-DCAPSTONE_HAS_XTENSA)
set(SOURCES_XTENSA
arch/Xtensa/XtensaDisassembler.c
arch/Xtensa/XtensaInstPrinter.c
arch/Xtensa/XtensaMapping.c
arch/Xtensa/XtensaModule.c
)
set(HEADERS_XTENSA
arch/Xtensa/XtensaDisassembler.h
arch/Xtensa/XtensaInstPrinter.h
arch/Xtensa/XtensaMapping.h
arch/Xtensa/XtensaModule.h
)
endif()
if (CAPSTONE_ARC_SUPPORT)
add_definitions(-DCAPSTONE_HAS_ARC)
set(SOURCES_ARC
arch/ARC/ARCDisassembler.c
arch/ARC/ARCInstPrinter.c
arch/ARC/ARCMapping.c
arch/ARC/ARCModule.c
)
set(HEADERS_ARC
arch/ARC/ARCInstPrinter.h
arch/ARC/ARCMapping.h
arch/ARC/ARCModule.h
arch/ARC/ARCLinkage.h
)
endif ()
if (CAPSTONE_OSXKERNEL_SUPPORT)
add_definitions(-DCAPSTONE_HAS_OSXKERNEL)
endif()
set(ALL_SOURCES
${SOURCES_ENGINE}
${SOURCES_ARM}
${SOURCES_AARCH64}
${SOURCES_MIPS}
${SOURCES_PPC}
${SOURCES_X86}
${SOURCES_SPARC}
${SOURCES_SYSTEMZ}
${SOURCES_XCORE}
${SOURCES_M68K}
${SOURCES_TMS320C64X}
${SOURCES_M680X}
${SOURCES_EVM}
${SOURCES_WASM}
${SOURCES_MOS65XX}
${SOURCES_BPF}
${SOURCES_RISCV}
${SOURCES_SH}
${SOURCES_TRICORE}
${SOURCES_ALPHA}
${SOURCES_HPPA}
${SOURCES_LOONGARCH}
${SOURCES_XTENSA}
${SOURCES_ARC}
)
set(ALL_HEADERS
${HEADERS_COMMON}
${HEADERS_ENGINE}
${HEADERS_ARM}
${HEADERS_AARCH64}
${HEADERS_MIPS}
${HEADERS_PPC}
${HEADERS_X86}
${HEADERS_SPARC}
${HEADERS_SYSTEMZ}
${HEADERS_XCORE}
${HEADERS_M68K}
${HEADERS_TMS320C64X}
${HEADERS_M680X}
${HEADERS_EVM}
${HEADERS_WASM}
${HEADERS_MOS65XX}
${HEADERS_BPF}
${HEADERS_RISCV}
${HEADERS_SH}
${HEADERS_TRICORE}
${HEADERS_ALPHA}
${HEADERS_HPPA}
${HEADERS_LOONGARCH}
${HEADERS_XTENSA}
${HEADERS_ARC}
)
## properties
# version info
set_property(GLOBAL PROPERTY VERSION ${PROJECT_VERSION})
## targets
add_library(capstone OBJECT ${ALL_SOURCES} ${ALL_HEADERS})
set_property(TARGET capstone PROPERTY C_STANDARD 99)
target_include_directories(capstone PUBLIC
$<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/include>
)
set_property(TARGET capstone PROPERTY POSITION_INDEPENDENT_CODE ON)
if(CAPSTONE_BUILD_STATIC_LIBS)
add_library(capstone_static STATIC $<TARGET_OBJECTS:capstone>)
# Use normal capstone name. Otherwise we get libcapstone_static.a
set_target_properties(capstone_static PROPERTIES OUTPUT_NAME "capstone")
target_include_directories(capstone_static PUBLIC
$<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/include>
)
endif()
if(CAPSTONE_BUILD_SHARED_LIBS)
add_library(capstone_shared SHARED $<TARGET_OBJECTS:capstone>)
# Use normal capstone name. Otherwise we get libcapstone_shared.so
set_target_properties(capstone_shared PROPERTIES OUTPUT_NAME "capstone")
set_target_properties(capstone_shared PROPERTIES
VERSION ${PROJECT_VERSION}
SOVERSION ${PROJECT_VERSION_MAJOR}
)
target_include_directories(capstone_shared PUBLIC
$<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/include>
)
target_compile_definitions(capstone PUBLIC CAPSTONE_SHARED)
# Build pdb file for dll on Windows
if(MSVC)
message("Enabling PDB for Windows")
set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /Zi")
set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "${CMAKE_SHARED_LINKER_FLAGS_RELEASE} /DEBUG")
endif()
endif()
# Fuzzer if this is moved to it's own CMakeLists.txt (as it should be)
# the OSS fuzzer build fails. And must be fixed.
# Simply because it builds the fuzzer there again with hard-coded paths.
# See: https://github.com/google/oss-fuzz/blob/master/projects/capstone/build.sh
# and: https://github.com/capstone-engine/capstone/issues/2454
add_executable(fuzz_disasm ${PROJECT_SOURCE_DIR}/suite/fuzz/onefile.c ${PROJECT_SOURCE_DIR}/suite/fuzz/fuzz_disasm.c ${PROJECT_SOURCE_DIR}/suite/fuzz/platform.c)
target_link_libraries(fuzz_disasm PRIVATE capstone)
source_group("Source\\Engine" FILES ${SOURCES_ENGINE})
source_group("Source\\ARM" FILES ${SOURCES_ARM})
source_group("Source\\AARCH64" FILES ${SOURCES_AARCH64})
source_group("Source\\Mips" FILES ${SOURCES_MIPS})
source_group("Source\\PowerPC" FILES ${SOURCES_PPC})
source_group("Source\\Sparc" FILES ${SOURCES_SPARC})
source_group("Source\\SystemZ" FILES ${SOURCES_SYSTEMZ})
source_group("Source\\X86" FILES ${SOURCES_X86})
source_group("Source\\XCore" FILES ${SOURCES_XCORE})
source_group("Source\\M68K" FILES ${SOURCES_M68K})
source_group("Source\\TMS320C64x" FILES ${SOURCES_TMS320C64X})
source_group("Source\\M680X" FILES ${SOURCES_M680X})
source_group("Source\\EVM" FILES ${SOURCES_EVM})
source_group("Source\\WASM" FILES ${SOURCES_WASM})
source_group("Source\\MOS65XX" FILES ${SOURCES_MOS65XX})
source_group("Source\\BPF" FILES ${SOURCES_BPF})
source_group("Source\\RISCV" FILES ${SOURCES_RISCV})
source_group("Source\\SH" FILES ${SOURCES_SH})
source_group("Source\\TriCore" FILES ${SOURCES_TRICORE})
source_group("Source\\Alpha" FILES ${SOURCES_ALPHA})
source_group("Source\\HPPA" FILES ${SOURCES_HPPA})
source_group("Source\\LoongArch" FILES ${SOURCES_LOONGARCH})
source_group("Source\\Xtensa" FILES ${SOURCES_XTENSA})
source_group("Source\\ARC" FILES ${SOURCES_ARC})
source_group("Include\\Common" FILES ${HEADERS_COMMON})
source_group("Include\\Engine" FILES ${HEADERS_ENGINE})
source_group("Include\\ARM" FILES ${HEADERS_ARM})
source_group("Include\\AARCH64" FILES ${HEADERS_AARCH64})
source_group("Include\\Mips" FILES ${HEADERS_MIPS})
source_group("Include\\PowerPC" FILES ${HEADERS_PPC})
source_group("Include\\Sparc" FILES ${HEADERS_SPARC})
source_group("Include\\SystemZ" FILES ${HEADERS_SYSTEMZ})
source_group("Include\\X86" FILES ${HEADERS_X86})
source_group("Include\\XCore" FILES ${HEADERS_XCORE})
source_group("Include\\M68K" FILES ${HEADERS_M68K})
source_group("Include\\TMS320C64x" FILES ${HEADERS_TMS320C64X})
source_group("Include\\M680X" FILES ${HEADERS_MC680X})
source_group("Include\\EVM" FILES ${HEADERS_EVM})
source_group("Include\\WASM" FILES ${HEADERS_WASM})
source_group("Include\\MOS65XX" FILES ${HEADERS_MOS65XX})
source_group("Include\\BPF" FILES ${HEADERS_BPF})
source_group("Include\\RISCV" FILES ${HEADERS_RISCV})
source_group("Include\\SH" FILES ${HEADERS_SH})
source_group("Include\\TriCore" FILES ${HEADERS_TRICORE})
source_group("Include\\Alpha" FILES ${HEADERS_ALPHA})
source_group("Include\\HPPA" FILES ${HEADERS_HPPA})
source_group("Include\\LoongArch" FILES ${HEADERS_LOONGARCH})
source_group("Include\\Xtensa" FILES ${HEADERS_XTENSA})
source_group("Include\\ARC" FILES ${HEADERS_ARC})
## installation
if(CAPSTONE_INSTALL)
include(GNUInstallDirs)
install(FILES ${HEADERS_COMMON} DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/capstone)
install(FILES ${HEADERS_INC} DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/capstone/inc)
# Support absolute installation paths (discussion: https://github.com/NixOS/nixpkgs/issues/144170)
if(IS_ABSOLUTE ${CMAKE_INSTALL_LIBDIR})
set(CAPSTONE_PKGCONFIG_INSTALL_LIBDIR ${CMAKE_INSTALL_LIBDIR})
set(CAPSTONE_CMAKE_INSTALL_LIBDIR ${CMAKE_INSTALL_LIBDIR})
else()
set(CAPSTONE_PKGCONFIG_INSTALL_LIBDIR "\${prefix}/${CMAKE_INSTALL_LIBDIR}")
set(CAPSTONE_CMAKE_INSTALL_LIBDIR "\${PACKAGE_PREFIX_DIR}/${CMAKE_INSTALL_LIBDIR}")
endif()
if(IS_ABSOLUTE ${CMAKE_INSTALL_INCLUDEDIR})
set(CAPSTONE_PKGCONFIG_INSTALL_INCLUDEDIR ${CMAKE_INSTALL_INCLUDEDIR})
set(CAPSTONE_CMAKE_INSTALL_INCLUDEDIR ${CMAKE_INSTALL_INCLUDEDIR})
else()
set(CAPSTONE_PKGCONFIG_INSTALL_INCLUDEDIR "\${prefix}/${CMAKE_INSTALL_INCLUDEDIR}")
set(CAPSTONE_CMAKE_INSTALL_INCLUDEDIR "\${PACKAGE_PREFIX_DIR}/${CMAKE_INSTALL_INCLUDEDIR}")
endif()
configure_file(capstone.pc.in ${CMAKE_BINARY_DIR}/capstone.pc @ONLY)
install(FILES ${CMAKE_BINARY_DIR}/capstone.pc DESTINATION ${CMAKE_INSTALL_LIBDIR}/pkgconfig)
include(CMakePackageConfigHelpers)
set(CAPSTONE_CMAKE_CONFIG_INSTALL_DIR "${CMAKE_INSTALL_LIBDIR}/cmake/capstone")
configure_package_config_file(
capstone-config.cmake.in
${CMAKE_CURRENT_BINARY_DIR}/capstone-config.cmake
INSTALL_DESTINATION ${CAPSTONE_CMAKE_CONFIG_INSTALL_DIR}
)
write_basic_package_version_file(
${CMAKE_CURRENT_BINARY_DIR}/capstone-config-version.cmake
VERSION ${PROJECT_VERSION}
COMPATIBILITY SameMajorVersion
)
install(FILES
"${CMAKE_CURRENT_BINARY_DIR}/capstone-config.cmake"
"${CMAKE_CURRENT_BINARY_DIR}/capstone-config-version.cmake"
DESTINATION ${CAPSTONE_CMAKE_CONFIG_INSTALL_DIR}
)
if(CAPSTONE_BUILD_SHARED_LIBS)
set(LIB_INSTALL_TARGETS capstone_shared)
endif()
if (CAPSTONE_BUILD_STATIC_LIBS)
set(LIB_INSTALL_TARGETS ${LIB_INSTALL_TARGETS} capstone_static)
endif()
install(TARGETS ${LIB_INSTALL_TARGETS}
EXPORT capstone-targets
RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR}
LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}
ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}
INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}
)
install(EXPORT capstone-targets
NAMESPACE capstone::
DESTINATION ${CAPSTONE_CMAKE_CONFIG_INSTALL_DIR}
)
if (MSVC AND CAPSTONE_BUILD_SHARED_LIBS)
install(FILES
$<TARGET_PDB_FILE:capstone_shared>
DESTINATION ${CMAKE_INSTALL_BINDIR}
OPTIONAL
)
endif()
# uninstall target
if(NOT TARGET UNINSTALL)
configure_file(
"${CMAKE_CURRENT_SOURCE_DIR}/cmake_uninstall.cmake.in"
"${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake"
IMMEDIATE @ONLY
)
add_custom_target(UNINSTALL COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
set_target_properties(UNINSTALL PROPERTIES
FOLDER CMakePredefinedTargets
)
endif()
endif()
if(CAPSTONE_BUILD_CSTOOL)
file(GLOB CSTOOL_SRC cstool/*.c)
add_executable(cstool ${CSTOOL_SRC})
target_link_libraries(cstool PRIVATE capstone)
if(CAPSTONE_INSTALL)
install(TARGETS cstool EXPORT capstone-targets DESTINATION ${CMAKE_INSTALL_BINDIR})
endif()
endif()
if(CAPSTONE_BUILD_CSTEST)
enable_testing()
set(CSTEST_DIR ${PROJECT_SOURCE_DIR}/suite/cstest)
add_subdirectory(${CSTEST_DIR})
# Integration and unit tests
set(TESTS_INTEGRATION_DIR ${PROJECT_SOURCE_DIR}/tests/integration)
add_subdirectory(${TESTS_INTEGRATION_DIR})
set(TESTS_UNIT_DIR ${PROJECT_SOURCE_DIR}/tests/unit)
add_subdirectory(${TESTS_UNIT_DIR})
endif()
# Include CPack
if(PROJECT_IS_TOP_LEVEL)
set(CPACK_PROJECT_CONFIG_FILE "${PROJECT_SOURCE_DIR}/CPackConfig.cmake")
include(CPackConfig.txt)
endif()
================================================
FILE: CMakePresets.json
================================================
{
"version": 3,
"configurePresets": [
{
"name": "locations-base",
"hidden": true,
"binaryDir": "${sourceDir}/build/${presetName}",
"installDir": "${sourceDir}/out/install/${presetName}"
},
{
"name": "warnings-base",
"hidden": true,
"warnings": {
"dev": true,
"deprecated": true,
"systemVars": true
},
"errors": {
"dev": true,
"deprecated": false
}
},
{
"name": "ninja",
"hidden": true,
"displayName": "Ninja",
"generator": "Ninja Multi-Config",
"cacheVariables": {
"CMAKE_DEFAULT_BUILD_TYPE": "Debug"
}
},
{
"name": "x64",
"hidden": true,
"architecture": {
"value": "x64",
"strategy": "external"
}
},
{
"name": "diet",
"hidden": true,
"displayName": "DIET",
"generator": "DIET build",
"cacheVariables": {
"CAPSTONE_BUILD_DIET": {
"type": "BOOL",
"value": "ON"
}
}
},
{
"name": "linux-x64",
"inherits": [ "ninja", "x64", "locations-base", "warnings-base" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Linux"}
},
{
"name": "macos-x64",
"inherits": [ "ninja", "x64", "locations-base", "warnings-base" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Darwin"}
},
{
"name": "windows-x64",
"inherits": [ "ninja", "x64", "locations-base", "warnings-base" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "windows-x64-diet",
"inherits": [ "ninja", "x64", "locations-base", "warnings-base", "diet" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
}
],
"buildPresets": [
{
"name": "build-linux",
"configurePreset": "linux-x64",
"nativeToolOptions": [ "-v" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Linux"}
},
{
"name": "build-macos",
"configurePreset": "macos-x64",
"nativeToolOptions": [ "-v" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Darwin"}
},
{
"name": "build-windows",
"configurePreset": "windows-x64",
"nativeToolOptions": [ "-v" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "build-windows-diet",
"configurePreset": "windows-x64-diet",
"nativeToolOptions": [ "-v" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "build-linux-release",
"inherits": "build-linux",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Linux"}
},
{
"name": "build-macos-release",
"inherits": "build-macos",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Darwin"}
},
{
"name": "build-windows-release",
"inherits": "build-windows",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "build-windows-diet-release",
"inherits": "build-windows-diet",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "install-linux",
"configurePreset": "linux-x64",
"inherits": "build-linux",
"targets": [ "install" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Linux"}
},
{
"name": "install-macos",
"configurePreset": "macos-x64",
"inherits": "build-macos",
"targets": [ "install" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Darwin"}
},
{
"name": "install-windows",
"configurePreset": "windows-x64",
"inherits": "build-windows",
"targets": [ "install" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "install-windows-diet",
"configurePreset": "windows-x64-diet",
"inherits": "build-windows-diet",
"targets": [ "install" ],
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "install-linux-release",
"inherits": "install-linux",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Linux"}
},
{
"name": "install-macos-release",
"inherits": "install-macos",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Darwin"}
},
{
"name": "install-windows-release",
"inherits": "install-windows",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
},
{
"name": "install-windows-diet-release",
"inherits": "install-windows-diet",
"configuration": "Release",
"condition": {"type": "equals", "lhs": "${hostSystemName}", "rhs": "Windows"}
}
]
}
================================================
FILE: COMPILE_MAKE.TXT
================================================
# NOTICE
> Please be aware that the Makefile build is deprecated.
> Use cmake instead.
<hr>
This documentation explains how to compile, install & run Capstone on MacOSX,
Linux, *BSD & Solaris. We also show steps to cross-compile for Microsoft Windows.
To natively compile for Windows using Microsoft Visual Studio, see BUILDING.md.
To compile using CMake, see BUILDING.md.
To compile using XCode on MacOSX, see xcode/README.md.
To compile for Windows CE (a.k.a, Windows Embedded Compact), see windowsce/COMPILE.md.
*-*-*-*-*-*
Capstone requires no prerequisite packages, so it is easy to compile & install.
(0) Tailor Capstone to your need.
Out of all architectures supported by Capstone, if you just need several
selected archs, choose the ones you want to compile in by editing "config.mk"
before going to next steps.
By default, all architectures are compiled.
The other way of customize Capstone without having to edit config.mk is to
pass the desired options on the commandline to ./make.sh. Currently,
Capstone supports 8 options, as followings.
- CAPSTONE_ARCHS: specify list of architectures to compiled in.
- CAPSTONE_USE_SYS_DYN_MEM: change this if you have your own dynamic memory management.
- CAPSTONE_DIET: use this to make the output binaries more compact.
- CAPSTONE_X86_REDUCE: another option to make X86 binary smaller.
- CAPSTONE_X86_ATT_DISABLE: disables AT&T syntax on x86.
- CAPSTONE_STATIC: build static library.
- CAPSTONE_SHARED: build dynamic (shared) library.
- CAPSTONE_DEBUG: enable debug build supporting assert().
By default, Capstone uses system dynamic memory management, both DIET and X86_REDUCE
modes are disable, and builds all the static & shared libraries.
To avoid editing config.mk for these customization, we can pass their values to
make.sh, as followings.
$ CAPSTONE_ARCHS="arm aarch64 x86" CAPSTONE_USE_SYS_DYN_MEM=no CAPSTONE_DIET=yes CAPSTONE_X86_REDUCE=yes ./make.sh
NOTE: on commandline, put these values in front of ./make.sh, not after it.
For each option, refer to docs/README for more details.
(1) Compile from source
On *nix (such as MacOSX, Linux, *BSD, Solaris):
- To compile for current platform, run:
$ ./make.sh
- On 64-bit OS, run the command below to cross-compile Capstone for 32-bit binary:
$ ./make.sh nix32
(2) Install Capstone on *nix
To install Capstone, run:
$ sudo ./make.sh install
For FreeBSD/OpenBSD, where sudo is unavailable, run:
$ su; ./make.sh install
Users are then required to enter root password to copy Capstone into machine
system directories.
Afterwards, run ./tests/test* to see the tests disassembling sample code.
NOTE: The core framework installed by "./make.sh install" consist of
following files:
/usr/include/capstone/arm.h
/usr/include/capstone/arm64.h
/usr/include/capstone/alpha.h
/usr/include/capstone/arc.h
/usr/include/capstone/bpf.h
/usr/include/capstone/capstone.h
/usr/include/capstone/evm.h
/usr/include/capstone/hppa.h
/usr/include/capstone/loongarch.h
/usr/include/capstone/m680x.h
/usr/include/capstone/m68k.h
/usr/include/capstone/mips.h
/usr/include/capstone/mos65xx.h
/usr/include/capstone/platform.h
/usr/include/capstone/ppc.h
/usr/include/capstone/sparc.h
/usr/include/capstone/systemz.h
/usr/include/capstone/tms320c64x.h
/usr/include/capstone/wasm.h
/usr/include/capstone/x86.h
/usr/include/capstone/xcore.h
/usr/include/capstone/tricore.h
/usr/lib/libcapstone.a
/usr/lib/libcapstone.so (for Linux/*nix), or /usr/lib/libcapstone.dylib (OSX)
(3) Cross-compile for Windows from *nix
To cross-compile for Windows, Linux & gcc-mingw-w64-i686 (and also gcc-mingw-w64-x86-64
for 64-bit binaries) are required.
- To cross-compile Windows 32-bit binary, simply run:
$ ./make.sh cross-win32
- To cross-compile Windows 64-bit binary, run:
$ ./make.sh cross-win64
Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then
be used on Windows machine.
(4) Cross-compile for iOS from Mac OSX.
To cross-compile for iOS (iPhone/iPad/iPod), Mac OSX with XCode installed is required.
- To cross-compile for ArmV7 (iPod 4, iPad 1/2/3, iPhone4, iPhone4S), run:
$ ./make.sh ios_armv7
- To cross-compile for ArmV7s (iPad 4, iPhone 5C, iPad mini), run:
$ ./make.sh ios_armv7s
- To cross-compile for Arm64 (iPhone 5S, iPad mini Retina, iPad Air), run:
$ ./make.sh ios_arm64
- To cross-compile for all iDevices (armv7 + armv7s + arm64), run:
$ ./make.sh ios
Resulted files libcapstone.dylib, libcapstone.a & tests/test* can then
be used on iOS devices.
(5) Cross-compile for Android
To cross-compile for Android (smartphone/tablet), Android NDK is required.
NOTE: Only ARM and AARCH64 are currently supported.
$ NDK=/android/android-ndk-r10e ./make.sh cross-android arm
or
$ NDK=/android/android-ndk-r10e ./make.sh cross-android arm64
Resulted files libcapstone.so, libcapstone.a & tests/test* can then
be used on Android devices.
(6) Compile on Windows with Cygwin
To compile under Cygwin gcc-mingw-w64-i686 or x86_64-w64-mingw32 run:
- To compile Windows 32-bit binary under Cygwin, run:
$ ./make.sh cygwin-mingw32
- To compile Windows 64-bit binary under Cygwin, run:
$ ./make.sh cygwin-mingw64
Resulted files libcapstone.dll, libcapstone.dll.a & tests/test*.exe can then
be used on Windows machine.
(7) By default, "cc" (default C compiler on the system) is used as compiler.
- To use "clang" compiler instead, run the command below:
$ ./make.sh clang
- To use "gcc" compiler instead, run:
$ ./make.sh gcc
(8) To uninstall Capstone, run the command below:
$ sudo ./make.sh uninstall
(9) Language bindings
So far, Python, Ocaml & Java are supported by bindings in the main code.
Look for the bindings under directory bindings/, and refer to README file
of corresponding languages.
Community also provide bindings for C#, Go, Ruby, NodeJS, C++ & Vala. Links to
these can be found at address http://capstone-engine.org/download.html
================================================
FILE: CONTRIBUTING.md
================================================
Code structure
--------------
Capstone source is organized as followings.
```
. <- core engine + README.md + BUILDING.md etc
├── arch <- code handling disasm engine for each arch
│ ├── AArch64 <- AArch64 engine
│ ├── Alpha <- Alpha engine
│ ├── ARM <- ARM engine
│ ├── BPF <- Berkeley Packet Filter engine
│ ├── EVM <- Ethereum engine
│ ├── HPPA <- HPPA engine
│ ├── M680X <- M680X engine
│ ├── M68K <- M68K engine
│ ├── Mips <- Mips engine
│ ├── MOS65XX <- MOS65XX engine
│ ├── PowerPC <- PowerPC engine
│ ├── RISCV <- RISCV engine
│ ├── SH <- SH engine
│ ├── Sparc <- Sparc engine
│ ├── SystemZ <- SystemZ engine
│ ├── TMS320C64x <- TMS320C64x engine
│ ├── TriCore <- TriCore engine
│ └── WASM <- WASM engine
├── bindings <- all bindings are under this dir
│ ├── java <- Java bindings
│ ├── ocaml <- Ocaml bindings
│ └── python <- Python bindings
│ └── cstest <- Testing tool for the Python bindings.
├── suite <- Several tools used for development
│ ├── cstest <- Testing tool to consume and check the test `yaml` files in `tests`
│ ├── fuzz <- Fuzzer
│ └── auto-sync <- The updater for Capstone modules
├── contrib <- Code contributed by community to help Capstone integration
├── cstool <- Cstool
├── docs <- Documentation
├── include <- API headers in C language (*.h)
├── packages <- Packages for Linux/OSX/BSD.
├── windows <- Windows support (for Windows kernel driver compile)
├── tests <- Unit and itegration tests
└── xcode <- Xcode support (for MacOSX compile)
```
Building
--------
Follow the instructions in [BUILDING.md](BUILDING.md) for how to compile and run test code.
Testing
-------
General testing docs are at [tests/README.md](tests/README.md).
You can test single instructions easily with the `cstool`.
For example:
```bash
$ cstool x32 "90 91"
```
Using `cstool` is also the prefered way for debugging a single instruction.
**Bindings**
Bindings currently have not equivalent to a `cstool`.
The Python bindings have `cstool` implemented.
Other bindings are out-of-date for a while because of missing maintainers.
They only have legacy integration tests.
Please check the issues or open a new one if you intent to work on them or need them.
Coding style
------------
- We provide a `.clang-format` for C code.
- Python files should be formatted with `black`.
Support
-------
**Please always open an issue or leave a comment in one, before starting work on an architecture! We can give support and save you a lot of time.**
Updating an Architecture
------------------------
The update tool for Capstone is called `Auto-Sync` and can be found in `suite/auto-sync`.
Not all architectures are supported yet.
Run `suite/auto-sync/Updater/ASUpdater.py -h` to get a list of currently supported architectures.
The documentation how to update with `Auto-Sync` or refactor an architecture module
can be found in [suite/auto-sync/README.md](suite/auto-sync/README.md).
If a module does not support `Auto-Sync` yet, it is highly recommended to refactor it
instead of attempting to update it manually.
Refactoring will take less time and updates it during the procedure.
The one exception is `x86`. In LLVM we use several emitter backends to generate C code.
One of those LLVM backends (the `DecoderEmitter`) has two versions.
One for `x86` and another for all the other architectures.
Until now it was not worth it to refactoring this unique `x86` backend. So `x86` is not
supported currently.
Adding an Architecture
----------------------
If your architecture is supported in LLVM or one of its forks, you can use `Auto-Sync` to
add the new module.
Checkout [suite/auto-sync/RefactorGuide.md](suite/auto-sync/RefactorGuide.md).
Otherwise, you need to implement the disassembler on your own and make it work with the Capstone API.
================================================
FILE: CPackConfig.cmake
================================================
# Used to dynamically set the package file name based on the generator
foreach(generator ${CPACK_GENERATOR})
if("${generator}" STREQUAL "DEB")
set(CPACK_PACKAGE_FILE_NAME ${CPACK_DEBIAN_PACKAGE_FILE_NAME})
elseif("${generator}" STREQUAL "RPM")
set(CPACK_PACKAGE_FILE_NAME ${CPACK_RPM_PACKAGE_FILE_NAME})
elseif("${generator}" STREQUAL "NSIS")
set(CPACK_PACKAGE_FILE_NAME ${CPACK_NSIS_PACKAGE_FILE_NAME})
elseif("${generator}" STREQUAL "DragNDrop")
set(CPACK_PACKAGE_FILE_NAME ${CPACK_DMG_PACKAGE_FILE_NAME})
else()
set(CPACK_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}-unknown")
endif()
message(STATUS "Generating package for ${generator} with file name ${CPACK_PACKAGE_FILE_NAME}")
endforeach()
================================================
FILE: CPackConfig.txt
================================================
# Copyright © 2024 Andrew Quijano <andrewquijano92@gmail.com>
# SPDX-License-Identifier: MIT
# Set general CPack values
set(CPACK_PACKAGE_NAME "capstone")
set(CPACK_PACKAGE_VENDOR "Rot127")
set(CPACK_PACKAGE_CONTACT "Rot127 <unisono@quyllur.org>")
set(CPACK_PACKAGE_DESCRIPTION "Capstone is a lightweight multi-platform, multi-architecture disassembly framework. These are the development headers and libraries.\n Features:\n - Support hardware architectures: AArch64, ARM, Alpha, BPF, EVM, HPPA, LongArch, M680X, M68K, MOS65XX, Mips, PowerPC, RISCV, SH, Sparc, SystemZ, TMS320C64x, TriCore, WASM, x86, XCore, Xtensa.\n - Clean/simple/lightweight/intuitive architecture-neutral API.\n - Provide details on disassembled instructions (called \\\"decomposer\\\" by some others).\n - Provide some semantics of the disassembled instruction, such as list of implicit registers read & written.\n - Thread-safe by design.\n - Special support for embedding into firmware or OS kernel.\n - Distributed under the open source BSD license.")
set(CPACK_PACKAGE_DESCRIPTION_SUMMARY "Lightweight multi-architecture disassembly framework - devel files")
set(CPACK_PACKAGE_HOMEPAGE_URL "https://www.capstone-engine.org/")
set(CPACK_STRIP_FILES false)
set(CPACK_RESOURCE_FILE_LICENSE "${PROJECT_SOURCE_DIR}/LICENSES/LICENSE.TXT")
# Set Debian-specific package variables
set(CPACK_DEBIAN_PACKAGE_NAME "libcapstone-dev")
set(CPACK_DEBIAN_PACKAGE_SOURCE "capstone")
set(CPACK_DEBIAN_PACKAGE_VERSION "${PROJECT_VERSION}")
set(CPACK_DEBIAN_PACKAGE_ORIGINAL_MAINTAINER "Debian Security Tools <team+pkg-security@tracker.debian.org>")
set(CPACK_DEBIAN_PACKAGE_DEPENDS "libc6 (>= 2.2.5)")
set(CPACK_DEBIAN_PACKAGE_SECTION "libdevel")
set(CPACK_DEBIAN_PACKAGE_PRIORITY "optional")
set(CPACK_DEBIAN_PACKAGE_MULTIARCH "same")
# Determine architecture for Debian package
if("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "x86_64")
set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "amd64")
elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "i386" OR "${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "i686")
set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "i386")
elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "arm")
if(CMAKE_SIZE_OF_VOID_P EQUAL 4)
set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "armhf")
else()
set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "arm64")
endif()
else()
set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE ${CMAKE_SYSTEM_PROCESSOR})
endif()
# Include additional file to run 'ldconfig' after install
set(CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA "${PROJECT_SOURCE_DIR}/packages/deb/triggers")
# RPM package settings
set(CPACK_RPM_PACKAGE_NAME "capstone-devel")
set(CPACK_RPM_PACKAGE_VERSION "${PROJECT_VERSION}")
set(CPACK_RPM_PACKAGE_ARCHITECTURE ${CMAKE_SYSTEM_PROCESSOR})
set(CPACK_RPM_PACKAGE_GROUP "Development/Libraries")
set(CPACK_RPM_PACKAGE_REQUIRES "glibc >= 2.2.5")
set(CPACK_RPM_POST_INSTALL_SCRIPT_FILE "${PROJECT_SOURCE_DIR}/packages/rpm/postinstall.sh")
set(CPACK_RPM_POST_UNINSTALL_SCRIPT_FILE "${PROJECT_SOURCE_DIR}/packages/rpm/postinstall.sh")
set(CPACK_RPM_CHANGELOG_FILE "${PROJECT_SOURCE_DIR}/ChangeLog")
set(CPACK_RPM_PACKAGE_LICENSE "BSD3, LLVM")
set(CPACK_RPM_PACKAGE_DESCRIPTION "${CPACK_PACKAGE_DESCRIPTION}")
# Windows package settings
if(WIN32)
set(CPACK_PACKAGE_INSTALL_DIRECTORY "capstone")
set(CPACK_SYSTEM_NAME "Windows-x64")
set(CPACK_NSIS_MODIFY_PATH ON)
set(CPACK_NSIS_PACKAGE_NAME "${CPACK_PACKAGE_NAME} ${CPACK_PACKAGE_VERSION}")
endif()
# Set package file name based on the generator
set(CPACK_DEBIAN_PACKAGE_FILE_NAME "${CPACK_DEBIAN_PACKAGE_NAME}_${CPACK_PACKAGE_VERSION}_${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}")
set(CPACK_RPM_PACKAGE_FILE_NAME "${CPACK_RPM_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}.${CMAKE_SYSTEM_PROCESSOR}")
set(CPACK_DMG_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}")
set(CPACK_NSIS_PACKAGE_FILE_NAME "${CPACK_PACKAGE_NAME}-${CPACK_PACKAGE_VERSION}-${CPACK_SYSTEM_NAME}")
include(CPack)
================================================
FILE: CREDITS.TXT
================================================
This file credits all the contributors of the Capstone engine project.
Key developers
==============
Nguyen Anh Quynh <aquynh -at- gmail.com>
Chenxu Wu (kabeor) kabeor@qiling.io
Past key developers
===================
Tan Sheng Di <shengdi -at- coseinc.com>
- Bindings: Ruby
Ben Nagy <ben -at- coseinc.com>
- Bindings: Ruby, Go
Dang Hoang Vu <dang.hvu -at- gmail.com>
- Bindings: Java
Beta testers (in random order)
==============================
Pancake
Van Hauser
FX of Phenoelit
The Grugq, The Grugq <-- our hero for submitting the first ever patch!
Isaac Dawson, Veracode Inc
Patroklos Argyroudis, Census Inc. (http://census-labs.com)
Attila Suszter
Le Dinh Long
Nicolas Ruff
Gunther
Alex Ionescu, Winsider Seminars & Solutions Inc.
Snare
Daniel Godas-Lopez
Joshua J. Drake
Edgar Barbosa
Ralf-Philipp Weinmann
Hugo Fortier
Joxean Koret
Bruce Dang
Andrew Dunham
Contributors (in no particular order)
=====================================
(Please let us know if you want to have your name here)
Ole André Vadla Ravnås (author of the 100th Pull-Request in our Github repo, thanks!)
Axel "0vercl0k" Souchet (@0vercl0k) & Alex Ionescu: port to MSVC.
Daniel Pistelli: Cmake support.
Peter Hlavaty: integrate Capstone for Windows kernel drivers.
Guillaume Jeanne: Ocaml binding.
Martin Tofall, Obsidium Software: Optimize X86 performance & size + x86 encoding features.
David Martínez Moreno & Hilko Bengen: Debian package.
Félix Cloutier: Xcode project.
Benoit Lecocq: OpenBSD package.
Christophe Avoinne (Hlide): Improve memory management for better performance.
Michael Cohen & Nguyen Tan Cong: Python module installer.
Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
Felix Gröbert (Google): fuzz testing harness.
Xipiter LLC: Capstone logo redesigned.
Satoshi Tanda: Support Windows kernel driver.
Tang Yuhang: cstool.
Andrew Dutcher: better Python setup.
Ruben Boonen: PowerShell binding.
David Zimmer: VB6 binding.
Philippe Antoine: Integration with oss-fuzz and various fixes.
Bui Dinh Cuong: Explicit registers accessed for Arm64.
Vincent Bénony: Explicit registers accessed for X86.
Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
Felix Gröbert (Google): fuzz testing harness.
Daniel Collin & Nicolas Planel: M68K architecture.
Pranith Kumar: Explicit registers accessed for Arm64.
Xipiter LLC: Capstone logo redesigned.
Satoshi Tanda: Support Windows kernel driver.
Koutheir Attouchi: Support for Windows CE.
Fotis Loukos: TMS320C64x architecture.
Wolfgang Schwotzer: M680X architecture.
Philippe Antoine: Integration with oss-fuzz and various fixes.
Stephen Eckels (stevemk14ebr): x86 encoding features
Tong Yu(Spike) & Kai Jern, Lau (xwings): WASM architecture.
Sebastian Macke: MOS65XX architecture
Ilya Leoshkevich: SystemZ architecture improvements.
Do Minh Tuan: Regression testing tool (cstest)
david942j: BPF (both classic and extended) architecture.
fanfuqiang & citypw & porto703 : RISCV architecture.
Josh "blacktop" Maine: Arm64 architecture improvements.
Finn Wilkinson: AArch64 update to Armv9.2-a (SME + SVE2 support)
Billow & Sidneyp: TriCore architecture.
Dmitry Sibirtsev: Alpha, HPPA, ARC architecture.
Jiajie Chen & Yanglin Xun: LoongArch architecture.
Billow: Xtensa architecture.
================================================
FILE: ChangeLog
================================================
This file details the changelog of Capstone.
-----------------------------
Version 6.0.0-Alpha7: February 15th, 2026
## What's Changed
* Refactoring the RISCV architecture to Auto-Sync on LLVM by @moste00 in https://github.com/capstone-engine/capstone/pull/2756
* Added RISCV v6 release notes by @moste00 in https://github.com/capstone-engine/capstone/pull/2846
* Package build workflow fix by @Rot127 in https://github.com/capstone-engine/capstone/pull/2849
* Ignore ES/CS/SS/DS segment overrides in x64 mode by @jxors in https://github.com/capstone-engine/capstone/pull/2819
* RISCV: Details: Fix ret groups by @moste00 in https://github.com/capstone-engine/capstone/pull/2859
* RISCV: Fix spurious return groups for JALR instructions using ra as a source for indirect jumps. by @moste00 in https://github.com/capstone-engine/capstone/pull/2860
* x86: fix decoding of mandatory prefixes by @jxors in https://github.com/capstone-engine/capstone/pull/2856
* Fix unchecked allocations by @Grond66 in https://github.com/capstone-engine/capstone/pull/2844
* Convert all README's to markdown files. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2863
* Fix 32bit build by @Rot127 in https://github.com/capstone-engine/capstone/pull/2796
## New Contributors
* @jxors made their first contribution in https://github.com/capstone-engine/capstone/pull/2819
* @Grond66 made their first contribution in https://github.com/capstone-engine/capstone/pull/2844
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha6...gen-changelog
-----------------------------
Version 6.0.0-Alpha6: January 13th, 2026
## What's Changed
* Update register semantics for x86 pop instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2770
* Python binding: Support 3.14 free-threaded CPython build by @Antelox in https://github.com/capstone-engine/capstone/pull/2769
* Only publish if tag is present and workflow is triggered by release. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2766
* Add Python prominently to the workflow name to prevent confusion. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2774
* Fix incorrectly defined BSHUFFLE opcode. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2772
* Fix cstest missing size checks by @Rot127 in https://github.com/capstone-engine/capstone/pull/2775
* Update read/written registers for x86 call instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2773
* Apply other VIS instruction fixes from llvm/#130967 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2777
* Fix regex match syntax for project version by @Zangetsu38 in https://github.com/capstone-engine/capstone/pull/2779
* Add workflow to check for C code formatting and format all code with clang-format-17 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2744
* Fix log message in cstest_py/compare.compare_bit_flags by @hainest in https://github.com/capstone-engine/capstone/pull/2783
* DIET MSVC C1001 Fix by @LADIlib in https://github.com/capstone-engine/capstone/pull/2782
* Update read/written registers for x86 interrupt instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2781
* Update read/written registers for x87 comparison instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2784
* Update read/written registers for x86 enter/leave instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2788
* Update read/written registers for x86 procedure return instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2789
* Add instruction details to cstest logging by @hainest in https://github.com/capstone-engine/capstone/pull/2787
* Update read/written registers for x86 interrupt return instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2793
* Remove unused fuzzit.sh script and key. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2797
* Fix assertions if CAPSTONE_ASSERTION_WARNINGS=1. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2792
* Update read/written registers for x86 string instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2790
* Update read/written registers for x86 conditional jump instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2798
* Minor formatting changes by @moste00 in https://github.com/capstone-engine/capstone/pull/2804
* Fix cstest_py and add negative tests. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2807
* Add null check for Xtensa operation detail in Xtensa_add_cs_detail_0 by @b1llow in https://github.com/capstone-engine/capstone/pull/2809
* Update read/written registers for x86 loop instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2799
* Update read/written registers for x86 unconditional jump instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2800
* Bump to latest MacOS runner. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2812
* Fix SH `decode` table being exported globally by @stuxnot in https://github.com/capstone-engine/capstone/pull/2814
* Doc fixups by @Rot127 in https://github.com/capstone-engine/capstone/pull/2754
* Add better support for cross builds. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2803
* Update read/written registers for x86 system call instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2820
* Fix possible OOB read by @Rot127 in https://github.com/capstone-engine/capstone/pull/2825
* Update read/written registers for x86 cmpxchg instruction by @hainest in https://github.com/capstone-engine/capstone/pull/2821
* Apply clang-format-17 to `test_poc.c` by @Rot127 in https://github.com/capstone-engine/capstone/pull/2833
* Add missing apt-get update before installing dependencies. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2832
* Return for failing range asserts to enforce the assumptions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2829
* [alpha] Fix immediate to be 64bit wide by @wargio in https://github.com/capstone-engine/capstone/pull/2840
* Build static libs with PIC by @hainest in https://github.com/capstone-engine/capstone/pull/2836
* M68K: fix displacement, register naming and suppressed registers by @csoren in https://github.com/capstone-engine/capstone/pull/2839
* X86: Fix movabsq immediates >= 2^63 printed as decimal in ATT syntax by @0verflowme in https://github.com/capstone-engine/capstone/pull/2843
* M68K: add displacement size fields to disassembler by @csoren in https://github.com/capstone-engine/capstone/pull/2842
* fix: use uintptr_t to maintain pointer provenance by @kingiler in https://github.com/capstone-engine/capstone/pull/2845
## New Contributors
* @Zangetsu38 made their first contribution in https://github.com/capstone-engine/capstone/pull/2779
* @LADIlib made their first contribution in https://github.com/capstone-engine/capstone/pull/2782
* @moste00 made their first contribution in https://github.com/capstone-engine/capstone/pull/2804
* @stuxnot made their first contribution in https://github.com/capstone-engine/capstone/pull/2814
* @csoren made their first contribution in https://github.com/capstone-engine/capstone/pull/2839
* @0verflowme made their first contribution in https://github.com/capstone-engine/capstone/pull/2843
* @kingiler made their first contribution in https://github.com/capstone-engine/capstone/pull/2845
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha5...6.0.0-Alpha6
-----------------------------
Version 6.0.0-Alpha5: August 3rd, 2025
## What's Changed
* Apple AArch64 proprietary by @Rot127 in https://github.com/capstone-engine/capstone/pull/2692
* Add jump group for generic jirl by @jiegec in https://github.com/capstone-engine/capstone/pull/2698
* LoongArch: Compute absolute address for address operand by @jiegec in https://github.com/capstone-engine/capstone/pull/2699
* Fix LoongArch ld/st instructions register info by @jiegec in https://github.com/capstone-engine/capstone/pull/2701
* ARM: fix typo, cspr -> cpsr by @jiegec in https://github.com/capstone-engine/capstone/pull/2716
* Fix arm pop reg access by @jiegec in https://github.com/capstone-engine/capstone/pull/2718
* Fix missing sp register read in ret instruction by @jiegec in https://github.com/capstone-engine/capstone/pull/2719
* Fix missing operand for smstart, due to space replaced by tab by @jiegec in https://github.com/capstone-engine/capstone/pull/2720
* Add flag for the SoftFail case of the LLVM disassembler. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2707
* Remove unused files. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2709
* clang-format: change license to BSD-3-Clause by @tmfink in https://github.com/capstone-engine/capstone/pull/2724
* Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type by @jiegec in https://github.com/capstone-engine/capstone/pull/2721
* Make SStream respect the CS_OPT_UNSIGNED flag. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2723
* Make assertion hit warnings optional in release builds. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2729
* Update source list before installing valgrind. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2730
* Add x30 implicit read to the RET alias. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2739
* Print immediate only memory operands for AArch64. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2732
* Add warning about naive search and replace to patch reg names. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2728
* Enable to generate legacy MC tests for the fuzzer. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2733
* Auto-Sync update Sparc LLVM-18 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2704
* Python binding: Use ABI3 wheels by @Antelox in https://github.com/capstone-engine/capstone/pull/2742
* Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2705
* Fix for Risc-V C.SRLI decoding (issue #2731) by @h01G3r in https://github.com/capstone-engine/capstone/pull/2745
* HPPA fix mem operands access and instruction printing by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2746
* Handle zero case of R1 operand field by @Rot127 in https://github.com/capstone-engine/capstone/pull/2743
* Fix comisd memory operand size: xmmword -> qword by @jiegec in https://github.com/capstone-engine/capstone/pull/2750
* Fix missing repne for movsd op by @jiegec in https://github.com/capstone-engine/capstone/pull/2752
* Explain more details about CC change. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2753
* Add a test for FCC conditions for none FPU instructions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2758
* Print register access type and registers accessed in cstool_mips.c by @jiegec in https://github.com/capstone-engine/capstone/pull/2762
* Fix duplication of memory operand by @Rot127 in https://github.com/capstone-engine/capstone/pull/2761
* Python binding: Windows ARM64 build by @Antelox in https://github.com/capstone-engine/capstone/pull/2760
* Implement cs_regs_access for Alpha architecture by @jiegec in https://github.com/capstone-engine/capstone/pull/2763
* Fix decoding of the FCC fields of FBPcc (format 2_3). by @Rot127 in https://github.com/capstone-engine/capstone/pull/2764
## New Contributors
* @h01G3r made their first contribution in https://github.com/capstone-engine/capstone/pull/2745
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha4...6.0.0-Alpha5
-----------------------------
Version 6.0.0-Alpha4: April 11th, 2025
## What's Changed
* Fix wrong version requirement of tricore instructions by @Changqing-JING in https://github.com/capstone-engine/capstone/pull/2620
* Python bindings: Switch to ubuntu-24.04-arm runner image by @Antelox in https://github.com/capstone-engine/capstone/pull/2625
* Build Tarball before DEB/RPM package. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2627
* Add aliases mapping for MIPS & test for id, alias_id by @wargio in https://github.com/capstone-engine/capstone/pull/2635
* Add checks for MIPS details on cstest_py by @wargio in https://github.com/capstone-engine/capstone/pull/2640
* Give the user some guidance where to add missing enumeration values. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2639
* Python bindings: sdist creation fix + relative test by @Antelox in https://github.com/capstone-engine/capstone/pull/2624
* cmake: Fix building capstone as sub-project by @imphil in https://github.com/capstone-engine/capstone/pull/2629
* Update operand type enums of all arch modules to the one in `capstone.h` by @Rot127 in https://github.com/capstone-engine/capstone/pull/2633
* Enhance shift value and types of shift instructions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2638
* Fix #2643 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2645
* Tms32c64x Little Endian by @Rot127 in https://github.com/capstone-engine/capstone/pull/2648
* Add call group to svc, smc and hvc. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2651
* Decode BH field in print_insn_detail_ppc by @hainest in https://github.com/capstone-engine/capstone/pull/2662
* Remove undefined constants in riscv_const.py (#2660) by @Asphaltt in https://github.com/capstone-engine/capstone/pull/2661
* Stringify BH fields when printing ppc details by @hainest in https://github.com/capstone-engine/capstone/pull/2663
* MIPS: Fix MIPS16 decoding, wrong flags and ghost registers by @wargio in https://github.com/capstone-engine/capstone/pull/2665
* Add a script to compare the inc file content with the lastest generated ones. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2667
* Mips32r6_64r632 is for both mips32r6 and mips64r6 by @wargio in https://github.com/capstone-engine/capstone/pull/2673
* Fix nanoMIPS decoding of jalrc by @wargio in https://github.com/capstone-engine/capstone/pull/2672
* Revert "Add a script to compare the inc file content with the lastest generated ones." by @Rot127 in https://github.com/capstone-engine/capstone/pull/2678
* Add workflow for building on Windows by @stevenjoezhang in https://github.com/capstone-engine/capstone/pull/2675
* Update read/written registers for x87 comparison instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2680
## New Contributors
* @imphil made their first contribution in https://github.com/capstone-engine/capstone/pull/2629
* @Asphaltt made their first contribution in https://github.com/capstone-engine/capstone/pull/2661
* @stevenjoezhang made their first contribution in https://github.com/capstone-engine/capstone/pull/2675
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha3...6.0.0-Alpha4
-----------------------------
Version 6.0.0-Alpha3: January 29th, 2025
## What's Changed
* Update Changelog Version to 6.0.0-Alpha2 by @kabeor in https://github.com/capstone-engine/capstone/pull/2553
* PPC LLVM 18 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2540
* Arm regressions by @Rot127 in https://github.com/capstone-engine/capstone/pull/2556
* Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 by @Antelox in https://github.com/capstone-engine/capstone/pull/2558
* Add arm64 and sysz compatibility layer to Python bindings by @peace-maker in https://github.com/capstone-engine/capstone/pull/2559
* Make thumb, v8 and m-class positional cstool arguments. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2557
* Small arm64 compat header fixes by @satk0 in https://github.com/capstone-engine/capstone/pull/2563
* PPC regressions by @Rot127 in https://github.com/capstone-engine/capstone/pull/2575
* Fix 2572 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2574
* Clean up the cstest documentation and build instructions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2580
* Update BPF arch by @Roeegg2 in https://github.com/capstone-engine/capstone/pull/2568
* x86: update read/write registers for transfer instructions by @hainest in https://github.com/capstone-engine/capstone/pull/2578
* cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally by @hainest in https://github.com/capstone-engine/capstone/pull/2581
* Capstone v6 now supports Debian Packaging by @AndrewQuijano in https://github.com/capstone-engine/capstone/pull/2579
* Fix complex atomic instructions handling by @Roeegg2 in https://github.com/capstone-engine/capstone/pull/2584
* Fix linking issue on Windows. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2587
* Clarify between machine used vs. Capstone module affected. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2586
* Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support by @wargio in https://github.com/capstone-engine/capstone/pull/2594
* Update Actions by @AndrewQuijano in https://github.com/capstone-engine/capstone/pull/2593
* Downgrade labeler to v4 again due to failing CI. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2598
* Delete Travis by @AndrewQuijano in https://github.com/capstone-engine/capstone/pull/2600
* Implement CPack for Debian/RPM by @AndrewQuijano in https://github.com/capstone-engine/capstone/pull/2590
* Add tricore tc1.8 instructions by @Changqing-JING in https://github.com/capstone-engine/capstone/pull/2595
* Apply new EVM opcode updates by @andelf in https://github.com/capstone-engine/capstone/pull/2602
* Fix SystemZ macro in Makefile by @Changqing-JING in https://github.com/capstone-engine/capstone/pull/2603
* Rebased #2570 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2614
## New Contributors
* @satk0 made their first contribution in https://github.com/capstone-engine/capstone/pull/2563
* @Roeegg2 made their first contribution in https://github.com/capstone-engine/capstone/pull/2568
* @hainest made their first contribution in https://github.com/capstone-engine/capstone/pull/2578
* @Changqing-JING made their first contribution in https://github.com/capstone-engine/capstone/pull/2595
* @andelf made their first contribution in https://github.com/capstone-engine/capstone/pull/2602
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha2...6.0.0-RC1
-----------------------------
Version 6.0.0-Alpha2: November 24th, 2024
## What's Changed
* Update changelog for V6.0.0-Alpha1 by @kabeor in https://github.com/capstone-engine/capstone/pull/2493
* Remove irrelevant changes. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2495
* Fixing UB santizer, `LITBASE` and assert errors. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2499
* Update labeler with Xtensa and v6 files. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2500
* Add hard asserts to all SStream functions and memset MCInst. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2501
* Only trigger on released action. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2497
* Fix cstest build with Ninja by @thestr4ng3r in https://github.com/capstone-engine/capstone/pull/2506
* Tricore EA calculation by @Rot127 in https://github.com/capstone-engine/capstone/pull/2504
* Update libcyaml dependency in cstest to 1.4.2 by @thestr4ng3r in https://github.com/capstone-engine/capstone/pull/2508
* xtensa: Fix Branch Target by @imbillow in https://github.com/capstone-engine/capstone/pull/2516
* Fix #2509. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2510
* AArch64: Replace vararg add_cs_detail by multiple concrete functions by @thestr4ng3r in https://github.com/capstone-engine/capstone/pull/2507
* Fix stringop-truncation warning some compilers raise. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2522
* Adds ARM and AArch64 compatibility macros for the CC/VAS enums by @Rot127 in https://github.com/capstone-engine/capstone/pull/2525
* Fix endianess issue during assignment. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2528
* This time actually fix big endian issue. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2530
* tricore: fixes #2474 by @imbillow in https://github.com/capstone-engine/capstone/pull/2523
* Change CI to create Debian Package to Release by @AndrewQuijano in https://github.com/capstone-engine/capstone/pull/2521
* Rename cmake build arguments by @Rot127 in https://github.com/capstone-engine/capstone/pull/2534
* xtensa: update to espressif/llvm-project by @imbillow in https://github.com/capstone-engine/capstone/pull/2533
* fix coverity by @imbillow in https://github.com/capstone-engine/capstone/pull/2546
* Move debian package generation to a dispatch only workflow by @Rot127 in https://github.com/capstone-engine/capstone/pull/2543
* Python package building rework by @Antelox in https://github.com/capstone-engine/capstone/pull/2538
* Auto-Sync reproducability + ARM update by @Rot127 in https://github.com/capstone-engine/capstone/pull/2532
* fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… by @imbillow in https://github.com/capstone-engine/capstone/pull/2551
* Prepare for update by @kabeor in https://github.com/capstone-engine/capstone/pull/2552
## New Contributors
* @AndrewQuijano made their first contribution in https://github.com/capstone-engine/capstone/pull/2521
* @Antelox made their first contribution in https://github.com/capstone-engine/capstone/pull/2538
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha1...6.0.0-Alpha2
-----------------------------
Version 6.0.0-Alpha1: September 30th, 2024
## **Breaking Changes**
- `ARM64` was renamed to `AArch64` everywhere (compatibility header is provided).
- `SysZ` was renamed to `SystemZ` everywhere (compatibility header is provided).
- Changes happened **especially to the PPC, ARM and AArch64 API**, as well as changes to enumeration values and stucts.
**Please be sure to read the [release guide](https://github.com/capstone-engine/capstone/blob/next/docs/cs_v6_release_guide.md) carefully!**
You can find all the breaking changes and justifications for them!
## What's New
* LoongArch, HPPA and Alpha support added.
* AArch64, SystemZ and Mips updated to LLVM 18.
* NanoMips extension added.
* ARM and PPC updated to LLVM 16.
* Exotic PPC PairedSingle extension added.
* Instruction formats for PPC, SystemZ and LoongArch added.
* Instruction alias support added.
* RISCV operand access information added.
* Testing was rewritten from scratch.
* All tests are run with the address sanitizer.
* Several improvements to the API of the ARM, AArch64 and PPC modules.
For an exhaustive list, see the release guide at https://github.com/capstone-engine/capstone/blob/next/docs/cs_v6_release_guide.md
## What's Changed
* tricore: fix runtime errors of integer overflow by @imbillow in https://github.com/capstone-engine/capstone/pull/2204
* [ARM] Add alias support by @Rot127 in https://github.com/capstone-engine/capstone/pull/2209
* [TriCore] Replace one- and sign-extend with MathExtra.h functions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2212
* [ARM] Add RET group to pop instructions which write to the PC. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2216
* V6 release guide by @Rot127 in https://github.com/capstone-engine/capstone/pull/2124
* Fix broken disassembly of floating point immediates on big endian hosts by @huth in https://github.com/capstone-engine/capstone/pull/2222
* Add Alpha architecture by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2071
* Ignore JetBrains based IDE data for clean PRs by @rickmark in https://github.com/capstone-engine/capstone/pull/2224
* Add Big-endian mode for Alpha by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2227
* Fix typos in COMPILE_CMAKE.TXT by @kobykahane in https://github.com/capstone-engine/capstone/pull/2229
* LIBDIRARCH does not propagate to Makefile by @YaSuenag in https://github.com/capstone-engine/capstone/pull/2214
* Fix type punning in `AArch64_AM_isSVEMaskOfIdenticalElements` by @kazarmy in https://github.com/capstone-engine/capstone/pull/2237
* Raise minimum requirement to VS2017 by @XVilka in https://github.com/capstone-engine/capstone/pull/2228
* Update docs wit ASUpdater.py script by @Rot127 in https://github.com/capstone-engine/capstone/pull/2217
* Add autolabeler GitHub Action by @XVilka in https://github.com/capstone-engine/capstone/pull/2239
* By default compile as universal2 for macOS by @rickmark in https://github.com/capstone-engine/capstone/pull/2221
* Use `union` in `AArch64_AM_isSVEMaskOfIdenticalElements` type punning fix by @kazarmy in https://github.com/capstone-engine/capstone/pull/2238
* Fix #2234. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2236
* Remove comment stating support for multiple `clang-format` versions by @kazarmy in https://github.com/capstone-engine/capstone/pull/2242
* Fix label assignment for LLVM generated files. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2243
* Constify Alpha and TriCore by @rth7680 in https://github.com/capstone-engine/capstone/pull/2245
* Fix compilation with DIET + X86_REDUCE by @oleavr in https://github.com/capstone-engine/capstone/pull/2248
* Fix warnings when building with CAPSTONE_DIET by @oleavr in https://github.com/capstone-engine/capstone/pull/2249
* Fix MSVC warning overrides when using non-MSVC toolchains by @oleavr in https://github.com/capstone-engine/capstone/pull/2250
* Add support for architecture registration by @oleavr in https://github.com/capstone-engine/capstone/pull/2252
* auto-sync: Fix some tree-sitter queries by @kazarmy in https://github.com/capstone-engine/capstone/pull/2255
* cstool: Fix ppc_br_hint comparison by @oleavr in https://github.com/capstone-engine/capstone/pull/2254
* Fix crash on x86 when building with MSVC by @oleavr in https://github.com/capstone-engine/capstone/pull/2253
* Fix regressions in custom memory allocator support by @oleavr in https://github.com/capstone-engine/capstone/pull/2251
* Fix compilation with CAPSTONE_X86_REDUCE by @oleavr in https://github.com/capstone-engine/capstone/pull/2256
* auto-sync BitCastStdArray.py: Transform to `union` instead by @kazarmy in https://github.com/capstone-engine/capstone/pull/2257
* Make helper functions static to prevent multiple defintions. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2266
* Drop distutils in python binding by @Xeonacid in https://github.com/capstone-engine/capstone/pull/2271
* Fix #2233 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2267
* Fix OOB read and wries by @Rot127 in https://github.com/capstone-engine/capstone/pull/2273
* [AArch64] Fix incorrect alignment of labels. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2277
* Makefile: Improve Apple detection by @sevan in https://github.com/capstone-engine/capstone/pull/2263
* [CMake] Architecture definition fix by @Rot127 in https://github.com/capstone-engine/capstone/pull/2272
* Add issue and PR templates by @Rot127 in https://github.com/capstone-engine/capstone/pull/2294
* Avoid random access values for operands in not-yet-specified instructions. by @mur47x111 in https://github.com/capstone-engine/capstone/pull/2259
* Remove repetitive words by @majorteach in https://github.com/capstone-engine/capstone/pull/2297
* Add HPPA(PA-RISC) architecture by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2265
* Fix invalid comparison with HPPA_OP_INVALID by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2300
* HPPA dissassembler fix unitialized variables errors by @R33v0LT in https://github.com/capstone-engine/capstone/pull/2309
* [Auto-Sync] LLVM 18 update by @Rot127 in https://github.com/capstone-engine/capstone/pull/2296
* chore: remove repetitive words by @careworry in https://github.com/capstone-engine/capstone/pull/2326
* Fix cstool Makefile for non-C99-defaulting compilers by @thestr4ng3r in https://github.com/capstone-engine/capstone/pull/2315
* check if decode[idx] is callable by @Ced2911 in https://github.com/capstone-engine/capstone/pull/2322
* Add eBPF bswap16/32/64 instruction by @chengshuyi in https://github.com/capstone-engine/capstone/pull/2323
* Add a clang-tidy checks and warnings by @Rot127 in https://github.com/capstone-engine/capstone/pull/2312
* [next] Fix #2128 by adding missing mapping values. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2335
* Replace manually compile tree-sitter-cpp with their Python bindings. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2337
* [next] Fix #2079: Add missing 1 immediate to `rcl` by @Rot127 in https://github.com/capstone-engine/capstone/pull/2330
* fix typos by @RainRat in https://github.com/capstone-engine/capstone/pull/2344
* Fix pkgconfig file to make #include <capstone/capstone.h> work by @ret2libc in https://github.com/capstone-engine/capstone/pull/2307
* Rewrite str_replace using snprintf for security and fix clang-tidy by @jiegec in https://github.com/capstone-engine/capstone/pull/2350
* [next] Fix #2244: Don't apply pseudo-instr. offset to `vcmp` id by @Rot127 in https://github.com/capstone-engine/capstone/pull/2331
* chore: fix typos by @xiaoxianBoy in https://github.com/capstone-engine/capstone/pull/2328
* fix typos by @RainRat in https://github.com/capstone-engine/capstone/pull/2346
* Replace non-standard 0b(...) literals by @thestr4ng3r in https://github.com/capstone-engine/capstone/pull/2314
* README: Mention Alpha and HPPA by @XVilka in https://github.com/capstone-engine/capstone/pull/2357
* Typo and tree-sitter init fix by @Rot127 in https://github.com/capstone-engine/capstone/pull/2358
* Apply #2360 to next by @Rot127 in https://github.com/capstone-engine/capstone/pull/2361
* Mapping - return NULL if compiled with DIET by @XVilka in https://github.com/capstone-engine/capstone/pull/2370
* Fix Warning C4098: void returns value. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2362
* AArch64 compatibility header by @Rot127 in https://github.com/capstone-engine/capstone/pull/2321
* Remove python2 leftovers by @twizmwazin in https://github.com/capstone-engine/capstone/pull/2378
* Restructure auto-sync docs to have them more contained by @Rot127 in https://github.com/capstone-engine/capstone/pull/2355
* Add test with ASAN enabled. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2313
* chore: fix some comments by @dufucun in https://github.com/capstone-engine/capstone/pull/2379
* Use python3 as default interpreter for python scripts by @Rot127 in https://github.com/capstone-engine/capstone/pull/2390
* fix typos by @RainRat in https://github.com/capstone-engine/capstone/pull/2387
* Revert "Remove python2 leftovers" by @kabeor in https://github.com/capstone-engine/capstone/pull/2391
* Initial auto-sync LoongArch support by @jiegec in https://github.com/capstone-engine/capstone/pull/2349
* Python2 leftovers v2 by @twizmwazin in https://github.com/capstone-engine/capstone/pull/2395
* AArch64 update to LLVM 18 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2298
* Add access support for RISC-V by @wxrdnx in https://github.com/capstone-engine/capstone/pull/2393
* Constify three ARM and AArch64 variables by @rth7680 in https://github.com/capstone-engine/capstone/pull/2399
* Python/remove deprecated packaging by @twizmwazin in https://github.com/capstone-engine/capstone/pull/2396
* [PPC] Fix #2401 - incorrect operands in disassembled instructions by @valdaarhun in https://github.com/capstone-engine/capstone/pull/2403
* [next] Fix typo in AArch64 Python binding by @david942j in https://github.com/capstone-engine/capstone/pull/2413
* Add release wheel build workflow for all Python versions by @Rot127 in https://github.com/capstone-engine/capstone/pull/2414
* [next] Fix unintended zero set in Sparc printInst by @david942j in https://github.com/capstone-engine/capstone/pull/2421
* Fix CI fuzz job yml syntax by @Rot127 in https://github.com/capstone-engine/capstone/pull/2429
* chore: fix some comments by @luozexuan in https://github.com/capstone-engine/capstone/pull/2432
* Add Coverity workflow by @Rot127 in https://github.com/capstone-engine/capstone/pull/2437
* [next] Updates and fixes to the Python wheel builder workflow by @Rot127 in https://github.com/capstone-engine/capstone/pull/2441
* Add back support for relocatable packages by @mrexodia in https://github.com/capstone-engine/capstone/pull/2431
* Fix 'make check' for python tests by @hamarituc in https://github.com/capstone-engine/capstone/pull/2439
* Update and add labels by @Rot127 in https://github.com/capstone-engine/capstone/pull/2446
* [next] Wheel build fixes: manylinux1, trigger upload on release, Linux AArch64... by @Rot127 in https://github.com/capstone-engine/capstone/pull/2444
* Use any-glob for labeler. Otherwise it is not checked recursively. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2450
* Modern Testing by @Rot127 in https://github.com/capstone-engine/capstone/pull/2456
* Some small fixes for capstone-next by @wargio in https://github.com/capstone-engine/capstone/pull/2460
* Auto-Sync Mips by @wargio in https://github.com/capstone-engine/capstone/pull/2410
* SystemZ Auto-Sync refactor by @Rot127 in https://github.com/capstone-engine/capstone/pull/2462
* Coverity defects by @Rot127 in https://github.com/capstone-engine/capstone/pull/2469
* [next] SH: Use bitwise OR with mask for sign extension by @lhsazevedo in https://github.com/capstone-engine/capstone/pull/2389
* [next][SuperH] Fix missing setting detail->sh by @david942j in https://github.com/capstone-engine/capstone/pull/2466
* Fix jumps and branches on a non-zero PC by @wargio in https://github.com/capstone-engine/capstone/pull/2479
* Documentation updates by @Rot127 in https://github.com/capstone-engine/capstone/pull/2476
* ARM fixes by @Rot127 in https://github.com/capstone-engine/capstone/pull/2477
* AArch64 issues by @Rot127 in https://github.com/capstone-engine/capstone/pull/2473
* Replace `assert` with `CS_ASSERT` in modules by @Rot127 in https://github.com/capstone-engine/capstone/pull/2478
* Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2482
* Fix Coverity CID 509730: overflow before widen by @wargio in https://github.com/capstone-engine/capstone/pull/2486
* Update sponsors and remove empty file. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2485
* Several small fixups by @Rot127 in https://github.com/capstone-engine/capstone/pull/2489
* Xtensa Support by @imbillow in https://github.com/capstone-engine/capstone/pull/2380
* LDR offset by @Rot127 in https://github.com/capstone-engine/capstone/pull/2487
* SystemZ fixes by @Rot127 in https://github.com/capstone-engine/capstone/pull/2488
* Be ready for V6-Alpha1 by @kabeor in https://github.com/capstone-engine/capstone/pull/2492
## New Contributors
* @R33v0LT made their first contribution in https://github.com/capstone-engine/capstone/pull/2071
* @rickmark made their first contribution in https://github.com/capstone-engine/capstone/pull/2224
* @kobykahane made their first contribution in https://github.com/capstone-engine/capstone/pull/2229
* @YaSuenag made their first contribution in https://github.com/capstone-engine/capstone/pull/2214
* @Xeonacid made their first contribution in https://github.com/capstone-engine/capstone/pull/2271
* @sevan made their first contribution in https://github.com/capstone-engine/capstone/pull/2263
* @majorteach made their first contribution in https://github.com/capstone-engine/capstone/pull/2297
* @careworry made their first contribution in https://github.com/capstone-engine/capstone/pull/2326
* @thestr4ng3r made their first contribution in https://github.com/capstone-engine/capstone/pull/2315
* @Ced2911 made their first contribution in https://github.com/capstone-engine/capstone/pull/2322
* @chengshuyi made their first contribution in https://github.com/capstone-engine/capstone/pull/2323
* @RainRat made their first contribution in https://github.com/capstone-engine/capstone/pull/2344
* @jiegec made their first contribution in https://github.com/capstone-engine/capstone/pull/2350
* @xiaoxianBoy made their first contribution in https://github.com/capstone-engine/capstone/pull/2328
* @dufucun made their first contribution in https://github.com/capstone-engine/capstone/pull/2379
* @wxrdnx made their first contribution in https://github.com/capstone-engine/capstone/pull/2393
* @valdaarhun made their first contribution in https://github.com/capstone-engine/capstone/pull/2403
* @luozexuan made their first contribution in https://github.com/capstone-engine/capstone/pull/2432
* @wargio made their first contribution in https://github.com/capstone-engine/capstone/pull/2460
**Full Changelog**: https://github.com/capstone-engine/capstone/compare/5.0.3...6.0.0-Alpha1
--------------------------------
Version 5.0.2: August 20th, 2024
## What's Changed
* [v5] Updates and fixes to the Python wheel builder workflow by @Rot127 in https://github.com/capstone-engine/capstone/pull/2440
* Relocatable package v5 by @mrexodia in https://github.com/capstone-engine/capstone/pull/2447
* [v5] Wheel build fixes: manylinux1, trigger upload on release, Linux AArch64 by @Rot127 in https://github.com/capstone-engine/capstone/pull/2443
--------------------------------
Version 5.0.2: August 12th, 2024
## What's Changed
* [v5] Add meta-programming macros for ARM64/AArch64 name change to capstone.h by @Rot127 in https://github.com/capstone-engine/capstone/pull/2199
* [v5] Add CS_aarch64 macro without parameter. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2219
* [v5] python: Fix definition of capstone syntax value option constants by @nmeum in https://github.com/capstone-engine/capstone/pull/2240
* Constify TriCore by @rth7680 in https://github.com/capstone-engine/capstone/pull/2246
* Revert constant value of CS_OP_MEM to `v5.0.1` by @Rot127 in https://github.com/capstone-engine/capstone/pull/2275
* Do not use 0b prefix, not supported on old compilers by @trufae in https://github.com/capstone-engine/capstone/pull/2306
* Update CMakeLists.txt version (See #2310) by @PerikiyoXD in https://github.com/capstone-engine/capstone/pull/2311
* [v5] Fix #2128 by adding missing mapping values. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2334
* [v5] Fix #2079: Add missing 1 immediate to `rcl` by @Rot127 in https://github.com/capstone-engine/capstone/pull/2329
* [v5] Fix incorrect ID mappings for PPC by @Rot127 in https://github.com/capstone-engine/capstone/pull/2333
* [v5] Fix #2244: Don't apply pseudo-instr. offset to `vcmp` id by @Rot127 in https://github.com/capstone-engine/capstone/pull/2332
* Fix comparison using narrow types in loop condition by @trufae in https://github.com/capstone-engine/capstone/pull/2360
* SH: Use bitwise OR with mask for sign extension by @lhsazevedo in https://github.com/capstone-engine/capstone/pull/2371
* Remove deprecated packaging and cython by @twizmwazin in https://github.com/capstone-engine/capstone/pull/2400
* [v5] Fix typo in AArch64 Python binding by @david942j in https://github.com/capstone-engine/capstone/pull/2412
* Backport python-publish.yml from next by @twizmwazin in https://github.com/capstone-engine/capstone/pull/2408
* [v5] Add release wheel build workflow for all Python versions by @Rot127 in https://github.com/capstone-engine/capstone/pull/2415
* [v5] Fix unintended zero set in Sparc printInst by @david942j in https://github.com/capstone-engine/capstone/pull/2420
* [v5][arm] Consider SpecRegRBit on setting SYSREG by @david942j in https://github.com/capstone-engine/capstone/pull/2422
* Prepare for release v5.0.2 by @kabeor in https://github.com/capstone-engine/capstone/pull/2425
## New Contributors
* @nmeum made their first contribution in https://github.com/capstone-engine/capstone/pull/2240
* @PerikiyoXD made their first contribution in https://github.com/capstone-engine/capstone/pull/2311
* @lhsazevedo made their first contribution in https://github.com/capstone-engine/capstone/pull/2371
--------------------------------
Version 5.0.1: August 23rd, 2023
## What's Changed
* [ARM] Fix VFP feature check by @Rot127 in https://github.com/capstone-engine/capstone/pull/2090
* Restore the ARM register naming from v4. by @gerph in https://github.com/capstone-engine/capstone/pull/2108
* Use OS independent printf formatting. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2109
* Cherry-pick from next for v5.0.1 by @kabeor in https://github.com/capstone-engine/capstone/pull/2141
* Add Python bindings for WASM by @peace-maker https://github.com/capstone-engine/capstone/pull/2095
* Sync Python bindings for x86, m68k, and mos65xx by @peace-maker https://github.com/capstone-engine/capstone/pull/2100
* Add Python bindings for SH by @peace-maker https://github.com/capstone-engine/capstone/pull/2096
* Update Python binding constants by @peace-maker https://github.com/capstone-engine/capstone/pull/2097
* Fixing TriCore disasm instructions by @bkoppelmann https://github.com/capstone-engine/capstone/pull/2088
* allow absolute CMAKE_INSTALL_*DIR @chayleaf https://github.com/capstone-engine/capstone/pull/2134
## New Contributors
* @gerph made their first contribution in https://github.com/capstone-engine/capstone/pull/2108
* @bkoppelmann made their first contribution in https://github.com/capstone-engine/capstone/pull/2088
* @chayleaf made their first contribution in https://github.com/capstone-engine/capstone/pull/2134
-----------------------------
Version 5.0.0: July 5th, 2023
## What's Changed
* [workflows] Remove deprecated image versions by @kabeor in https://github.com/capstone-engine/capstone/pull/2057
* Fix capstone_test.c #2059 by @imbillow in https://github.com/capstone-engine/capstone/pull/2060
* Support repz prefix on X86 ret instructions by @adamjseitz in https://github.com/capstone-engine/capstone/pull/2063
* fix for msvc static lib, dll build error and warnings by @arkup in https://github.com/capstone-engine/capstone/pull/2061
* use calloc for cs_insn instead of malloc by @ConnorRigby in https://github.com/capstone-engine/capstone/pull/1972
* Fix access bug for TEST op by @melynx in https://github.com/capstone-engine/capstone/pull/1511
* Update Cython bindings by @peace-maker in https://github.com/capstone-engine/capstone/pull/2068
* Use Intel register syntax for Tricore by @XVilka in https://github.com/capstone-engine/capstone/pull/2067
* Add `#` prefix to tricore imm operand by @imbillow in https://github.com/capstone-engine/capstone/pull/2070
* Revert "Mark cs_* as thread local to avoid race condition in multithreads" by @oleavr in https://github.com/capstone-engine/capstone/pull/1933
* Replace strncpy with memcpy to fix compiler warning. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2075
* Remove outdated and irrelevant TODO by @XVilka in https://github.com/capstone-engine/capstone/pull/2074
## New Contributors
* @arkup made their first contribution in https://github.com/capstone-engine/capstone/pull/2061
* @ConnorRigby made their first contribution in https://github.com/capstone-engine/capstone/pull/1972
* @melynx made their first contribution in https://github.com/capstone-engine/capstone/pull/1511
---------------------------------
Version 5.0.0-rc4: June 18th, 2023
## What's Changed
* Fix TriCore test by @hamarituc in https://github.com/capstone-engine/capstone/pull/2049
* [workflows] Fix python-publish issue by @kabeor in https://github.com/capstone-engine/capstone/pull/2050
* Update version tag by @kabeor in https://github.com/capstone-engine/capstone/pull/2052
* Release 5.0-rc4 by @kabeor in https://github.com/capstone-engine/capstone/pull/2051
---------------------------------
Version 5.0.0-rc3: June 17th, 2023
What's Changed:
- update pkgconfig version by @kabeor in #1847
- vb6 bindings: clarify license as Apache v2.0 by @dzzie in #1850
- AArch64 SYS instruction operands by @adamjseitz in #1859
- AArch64: fix missing VAS specifiers in aliased instructions by @adamjseitz in #1860
- Add cstool in CMake Package Config + CMake Github Workflow by @theblackunknown in #1867
- Fix pkgconfig not installed when CAPSTONE_BUILD_CSTOOL is false by @theblackunknown in #1870
- AArch64 comprehensively add vas specifiers to aliased instructions by @adamjseitz in #1877
- Fix pkg-config template by @hamarituc in #1878
- Fix eBPF lddw opcode by @terorie in #1885
- Add eBPF callx instruction by @terorie in #1886
- Mark cs_* as thread local to avoid race condition in multithreads by @wtdcode in #1891
- One semicolon is enough in C by @trufae in #1892
- Add PowerPC paired-singles support by @terorie in #1898
- Update the table for UD0 and UD1 with the latest llvm table by @junghee in #1863
- Sync eBPF and PowerPC bindings by @terorie in #1900
- Fix PPC insn names and psq displacement by @terorie in #1902
- Fix -Werror build by @trufae in #1906
- Remove outdated ctypes requirement by @jbott in #1910
- Fix memory leak in testsuite by @hamarituc in #1919
- PPC: fix out of bound memory access by @hamarituc in #1913
- AArch64 armv9.2 update by @FinnWilkinson in #1907
- m68k: Add support for the FNOP instruction by @huth in #1921
- arm64: fix invalid free introduced in 662bb3f by @trufae in #1926
- Fixed SME index alias printing issue. by @FinnWilkinson in #1925
- Updated Arm64 python bindings after Armv9.2-a support. by @FinnWilkinson in #1932
- ARM/AArch64: Add post-index to instruction info by @ZehMatt in #1937
- Fix regressions in custom memory allocator support by @oleavr in #1934
- cstool: support riscv compressed instruction disassemble by @rrwhx in #1940
- Mention debug build option for cmake. by @Rot127 in #1942
- cstool: avoid misaligned instructions in compressed riscv by @carenas in #1943
- arm64: fix missing post_index by @HyperSine in #1944
- Add CMAKE_EXPORT_COMPILE_COMMANDS to cmake build doc by @Rot127 in #1948
- Fix potential array out of bounds by @mjunix in #1938
- Add Renesas SuperH instructions support by @ysat0 in #1927
- fix missing access field in arm64 java binding by @sunxingxing in #1959
- Update python bindings to fix ARM in detail mode. by @wideglide in #1961
- sh: add missing include for CMake install step by @SweetVishnya in #1964
- Fix CITest && python binding issues by @kabeor in #1965
- correct register accesses for ARM's sxtb/uxtb and similar instructions by @covanam in #1968
- In x86: Fixed backward compatibility with C90 by @hasherezade in #1969
- Fix for missing register usages on ARM64 authenticated branches (issue #1975) by - @stevielavern in #1976
- AArch64: fixes register access flags for moves by @thomasdangl in #1974
- [SH] Fix build warnings by @Rot127 in #1960
- update CI ubuntu version by @kabeor in #1986
- fix cstest Makefile by @imbillow in #1989
- fix: compile error missing file cstool msvc/visual studio by @raigorx in #2000
- Fix missing NOTRACK prefix by @junghee in #2002
- Fix make builds with SH support by @trufae in #2006
- Add missing architectures in the readme and sort them by @trufae in #2008
- Add TriCore Architecture by @imbillow in #1973
- Fix compilation warnings related to TriCore. by @imbillow in #2012
- Fix SH build warnings. by @Rot127 in #2016
- Tricore fix the negative call and jump by @imbillow in #2018
- [SH] Fix warnings about unhandled switch cases by adding defaults. by @Rot127 in #2017
- Tricore fix disp fill and ctest build by @imbillow in #2019
- Fix disassemble of xor by @imbillow in #2023
- Fix register accesses & operands of multiple ARMv8.3 PAC instructions by @stevielavern in - #2022
- Add missing arm64 to Darwin LIBARCHS and remove dependencies tracking… by @gdbinit in #2024
- Fix tricore compile warning by @imbillow in #2027
- [PPC] Fix random branch hint and update_cr0 set up. by @Rot127 in #2028
- Fix #2032 by @Rot127 in #2033
- Add operands access support for TriCore by @imbillow in #2034
- Hotfix for -DCAPSTONE_DIET build. by @Rot127 in #2038
- Fix Python bindings after changes to cs_detail by @peace-maker in #2041
- RISCV: Add call, int and branch_relative instruction groups by @peace-maker in #2007
- Re-fix pkgconfig includedir/Cflags by @orlitzky in #2046
New Contributors:
- @adamjseitz made their first contribution in #1859
- @theblackunknown made their first contribution in #1867
- @hamarituc made their first contribution in #1878
- @terorie made their first contribution in #1885
- @junghee made their first contribution in #1863
- @jbott made their first contribution in #1910
- @FinnWilkinson made their first contribution in #1907
- @huth made their first contribution in #1921
- @ZehMatt made their first contribution in #1937
- @rrwhx made their first contribution in #1940
- @Rot127 made their first contribution in #1942
- @HyperSine made their first contribution in #1944
- @mjunix made their first contribution in #1938
- @ysat0 made their first contribution in #1927
- @sunxingxing made their first contribution in #1959
- @wideglide made their first contribution in #1961
- @SweetVishnya made their first contribution in #1964
- @covanam made their first contribution in #1968
- @thomasdangl made their first contribution in #1974
- @imbillow made their first contribution in #1989
- @raigorx made their first contribution in #2000
- @peace-maker made their first contribution in #2041
- @orlitzky made their first contribution in #2046
---------------------------------
Version 5.0.0-rc2: February 28th, 2022
New features:
- None
Improvements:
- Fix for python publish build (#1844)
- Modernize CMake and switch to CMake 3.15 (#1841)
- Fix AArch64 ldapr detailed information (#1840)
- Fix incorrect MI->ac_idx leading to wrong AArch64 InsnOp access printing (#1845)
Contributors:
- stevielavern
- mrexodia
- kabeor
---------------------------------
Version 5.0.0-rc1: February 27th, 2022
New features:
- Add arch BPF (#1388)
- Add arch RISCV (#1401)
- Add arch WASM (#1359)
- PyPI workflow (#1645)
- Option to generate install target (#1698 #1700)
- Swift binding (#1707)
- Add CI Test support (#1797)
- Add benchmark (#1811)
Improvements:
- Add fixups for aarch64 instructions (#1632 #1655)
- Add fixups for x86 instructions (#1644 #1657 #1689 1751)
- Add fixups for m68k instructions (#1663 #1709)
- Add fixups for m680x instructions (#1695)
- Add fixups for mips instructions (#1674)
- Add fixups for mos65xx instructions (#1702)
- Add fixups for systemz instructions (#1679)
- Add fixups for risc-v instructions (#1682 #1690 #1691)
- Add fixups for ppc instructions (#1687 #1688)
- Add cmake config and export targets (#1637)
- Fix issues in Makefiles (#1639)
- Fix issues about cmake builds (#1649 #1659)
- MSVC tooling updates (#1651)
- Fix crash when using skipdata with NULL mnemonic(#1703)
- Fix python only use ascii character (#1704)
- Add support for aarch64 distributions (#1720)
- Fix registry access for several versions of pop such as POPDS, POPSS, etc. (#1725)
- Fix registry access on cmov instructions (#1727)
- Fix -Wstringop-truncation warnings (#1730)
- Fix always return the same type from regs_read (#1736)
- Fix inconsistent behavior of Mips_option() (#1744)
- Fix pythonic bug (#1745)
- Fixes the (pip) Python Module build on FreeBSD (#1750)
- Enable detection and build on all BSD systems (#1753)
- Fix the displacement offset for moffset-encoded operands (#1754)
- Update cmake_minimum_required to version 2.8.12 (#1756)
- Fixed typos in compilation steps (#1762)
- Fix build android (#1765)
- Support disassembling bytes from memoryview (#1773)
- Fixed library extension to build properly under CYGWIN (#1791)
- Add Capstone Engine Documentation (#1794)
- Fix eflags effects for adc/sbb (#1798)
- Update x86 operand access information (#1801)
- CI automatically build release tarball (#1802)
- Don't format sstreams when there's nothing to format (#1805)
- Fix warning about Unused variables (#1815)
- Fix insn initialization when instruction have no operands or have a prefix (#1816)
- Avoid abort() if x86 not supported (#1818)
- Fix unterminated string regression (#1819)
- Fixed incorrect operand access on x86 instruction vmovdqu (#1823)
Contributors:
- ekilmer
- mcmtroffaes
- sh1r4s3
- emoon
- chfl4gs
- heshpdx
- hmoenck
- cyanpencil
- NicolasDerumigny
- trofi
- maximumspatium
- junchao-loongson
- carenas
- notyourusualaccountname
- rth7680
- StalkR
- aeflores
- TobiasFaller
- XVilka
- meme
- zydeco
- catenacyber
- michalsc
- urbas
- keenk
- kazarmy
- learn-more
- veritas501
- trufae
- cederom
- Quentin01
- jranieri-grammatech
- scribam
- huettenhain
- LBJ-the-GOAT
- wheremyfoodat
- Jaysonicc
- huettenhain
- syscl
- bezita
- Smartsmurf
- tmfink
- kazarmy
- rofl0r
- bSr43
- wtdcode
- dropTableUsers42
- carenas
- owlxiao
- Mxz297
- SpikeI
- catenacyber
- david942j
- fanfuqiang
- aquynh
- kabeor
---------------------------------
Version 4.0.2: May 8th, 2020
[ Core ]
- Windows kernel-mode driver support
- Fix installation path on FreeBSD and DragonFly
[ cstool ]
- Add armv8, ppc32 & thumbv8 modes
- Print instruction ID
[ X86 ]
- Support CS_OPT_UNSIGNED for ATT syntax
- Fix operand size for some instructions
- Fix LOCK prefixes
- Recognize xacquire/xrelease prefix
- Fix call/jmp access mode of mem operand
- Add ENDBR32, ENDBR64 to reduce mode
- Other minor fixes
[ ARM64 ]
- Support CS_OPT_UNSIGNED
- Fix register access flags for memory instructions
- Fix UMOV vess
[ ARM ]
- Update writeback for STR_POST_REG
[ M68K ]
- Store correct register value in op.reg_pair
[ PowerPC ]
- BDZLA is absolute branch
[ SystemZ ]
- Fix truncated 64bit imm operand
- Fix base/index printing
[ Python ]
- Fix skipdata struct being destroyed
- Add repr for capstone.CsInsn
[ Java ]
- Fix Java bindings to use pointers instead of longs
[ Ocaml ]
- Fix x86_op record
---------------------------------
Version 4.0.1: January 10th, 2019
[ Core ]
- Fix some issues for packaging (Debian, Gentoo).
- Better support for building with Mingw.
- cstool has new option -s to turn on skipdata mode.
- cstool -v now report build settings of the core.
- Add suite/capstone_get_setup.c so users can integrate with their own code
to retrieve Capstone settings at build time.
[ Arm ]
- Fix 4.0 regression: the `tbh [r0, r1, lsl #1]` instruction sets the operand.shift.value back again (see #1317)
- Remove ARM_REG_PC group for BX instruction.
[ X86 ]
- Fix: endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64 (#1129)
[ M680X ]
- Fix some issues reported by clang-analyzer (#1329).
[ Python ]
- Fix skipdata setup.
- Add getter/setter for skipdata_mnem, skipdata_callback.
---------------------------------
Version 4.0: December 18th, 2018
[ Core ]
- New APIs: cs_regs_access()
- Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM.
- Various updates & bugfixes for all architectures.
- Add 4 new architectures: EVM, M68K, M680X & TMS320C64x.
- Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE.
- Add new error types: CS_ERR_X86_MASM.
[ X86 ]
- Add XOP code condition type in x86_xop_cc.
- Add some info on encoding to cs_x86 in cs_x86_encoding.
- Add register flags update in cs_x86.{eflags, fpu_flags}
- Change cs_x86.disp type from int32_t to int64_t.
- Add new groups: X86_GRP_VM & X86_GRP_FPU.
- Lots of new instructions (AVX)
[ ARM64 ]
- Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS.
[ Mips ]
- Add mode CS_MODE_MIPS2.
[ PPC ]
- Change cs_ppc_op.imm type from int32_t to int64_t.
- Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX.
- Lots of new instructions (QPX among them)
[ Sparc ]
- Change cs_sparc_op.imm type from int32_t to int64_t.
[ Binding ]
- New bindings: PowerShell & VB6
---------------------------------
Version 3.0.5: July 18th, 2018
[ Core ]
- Fix the include path for Android builds when building cstool.
- Add possibility to disable universal build for Mac OS.
- cstool: Separate instruction bytes by spaces.
- Fix code path of pkg-config in Cmake.
- Update XCode project for XCode 9.1.
- Add Cortex-M support to cstool.
- Cmake forces to be build using MT with MSVC.
- Better support for Mac OS kernel.
[ X86 ]
- Fix some issues in handling EVEX & VEX3 instructions.
- Fix immediate operand for AND instruction in ATT mode.
- Fix ATT syntax when imm operand is 0.
- Better handle XACQUIRE/XRELEASE.
- Fix imm operand of RETF.
[ ARM ]
- Fix an integer overflow bug.
[ ARM64 ]
- Bug fix for incorrect operand type in certain load/store instructions.
[ Mips ]
- Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32
[ PPC ]
- Fix endian check.
[ Sparc ]
- Fix an integer overflow bug.
[ SystemZ ]
- Fix an integer overflow bug.
[ Python binding ]
- Raise error on accessing irrelevant data fields if skipdata & detail modes are enable.
---------------------------------
Version 3.0.5-rc3: July 31st, 2017
[ Core ]
- Fix compilation for MacOS kernel extension
- cstool to support armbe and arm64be modes
- Add nmake.bat for Windows build
- Fix an integer overflow for Windows kernel driver
- Support to embedded Capstone into MacOS kernel
- cstool: fix mips64 mode
- Fix a compiling error in MS Visual Studio 2015
- Install pkgconfig file with CMake build
- Fix SOVERSION property of CMake build
- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
- Fix MingW build
- Better handle CMake installation for Linux 64bit
[ X86 ]
- Support BND prefix of Intel MPX extension
- Correct operand size for CALL/JMP in 64bit mode with prefix 0x66
- LOCK NOP is a valid instruction
- Fix ATT syntax for instruction with zero offset segment register
- LES/LDS are invalid in 64bit mode
- Fix number of operands for some MOV instructions
[ ARM ]
- Fix POP reg to update SP register
- Update flags for UADD8 instruction
[ ARM64 ]
- Better performance with new lookup table
- Handle system registers added in ARMv8.1/2
[ Java binding ]
- Better handle input with invalid code
[ Visual Basic binding ]
- New binding
---------------------------------
Version 3.0.5-rc2: March 2nd, 2017
[ Core ]
- Fix build for Visual Studio 2012
- Fix X86_REL_ADDR macro
- Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA
- Better support for embedding Capstone into Windows kernel drivers
- Support to embedded Capstone into MacOS kernel
- Support MacOS 10.11 and up
- Better support for Cygwin
- Support build packages for FreeBSD & DragonflyBSD
- Add a command-line tool "cstool"
- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
[ X86 ]
- Some random 16-bit code can be handled wrongly.
- Remove abundant operand type X86_OP_FP
- Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL
- Add X86_REG_EFLAGS for STC and STD
- Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT
- Rename registers ST0-ST7 to be consistent with asm output
[ ARM ]
- Properly handle IT instruction
- Fix LDRSB
- Fix writeback for LDR
- Fix Thumb BigEndian setup
[ ARM64 ]
- Fix arith extender
- Fix writeback for LDR
- Rename enum arm64_mrs_reg to arm64_sysreg
[ PowerPC ]
- Print 0 offset for memory operand
[ Sparc ]
- Fix POPC instruction
[ Python binding ]
- Better PyPy support
- Add __version__
- Better support for Python 3
- Fix CS_SKIPDATA_CALLBACK prototype
- Cast skipdata function inside binding to simplify the API
[ Java binding ]
- Better handle input with invalid code
[ PowerShell ]
- New binding
---------------------------------
Version 3.0.4: July 15th, 2015
[ Library ]
- Improve cross-compile for Android using Android NDK.
- Support cross-compile for AArch64 Android (with Linux GCC).
- Removed osxkernel_inttypes.h that is incompatible with BSD license.
- Make it possible to compile with CC having a space inside (like "ccache gcc").
[ X86 ]
- Fix a null pointer dereference bug on handling code with special prefixes.
- Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
- Print immediate operand in positive form in some algorithm instructions.
- Properly decode some SSE instructions.
[ PowerPC ]
- Fixed a memory corruption bug.
- Fixed a memory corruption bug for the engine built in DIET mode.
[ Mips ]
- Fixed instruction ID of SUBU instruction.
- Fixed a memory corruption bug.
[ Arm ]
- Fixed a memory corruption bug on IT instruction.
[ XCore ]
- Fixed a memory corruption bug when instruction has a memory operand.
[ Python ]
- Support Virtualenv.
- setup.py supports option --user if not in a virtualenv to allow for local usage.
- Properly handle the destruction of Cs object in the case the shared library
was already unloaded.
---------------------------------
Version 3.0.3: May 08th, 2015
[ Library ]
- Support to embed into Mac OS X kernel extensions.
- Now it is possible to compile Capstone with older C compilers, such as
GCC 4.8 on Ubuntu 12.04.
- Add "test_iter" to MSVC project.
[ X86 ]
- All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
$1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of
"rcll %edx").
- CMPXCHG16B is a valid instruction with LOCK prefix.
- Fixed a segfault on the input of 0xF3.
[ Arm ]
- BLX instruction modifies PC & LR registers.
[ Sparc ]
- Improved displacement decoding for sparc banching instructions.
[ Python binding ]
- Fix for Cython so it can properly initialize.
- X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type.
- Properly support compile with Cygwin & install binding (setup.py).
---------------------------------
Version 3.0.2: March 11th, 2015
[ Library ]
- On *nix, only export symbols that are part of the API (instead of all
the internal symbols).
[ X86 ]
- Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding.
- Fix implicit registers read/written & instruction groups of some instructions.
- More flexible on the order of prefixes, so better handle some tricky
instructions.
- REPNE prefix can go with STOS & MOVS instructions.
- Fix a compilation bug for X86_REDUCE mode.
- Fix operand size of instructions with operand PTR []
[ Arm ]
- Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode).
- Fix a bug on handling the If-Then block.
[ Mips ]
- Sanity check for the input size for MIPS64 mode.
[ MSVC ]
- Compile capstone.dll with static runtime MSVCR built in.
[ Python binding ]
- Fix a compiling issue of Cython binding with gcc 4.9.
---------------------------------
Version 3.0.1: February 03rd, 2015
[ X86 ]
- Properly handle LOCK, REP, REPE & REPNE prefixes.
- Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions.
- Print LJUMP/LCALL without * as prefix for Intel syntax.
- Handle REX prefix properly for segment/MMX related instructions (x86_64).
- Instruction with length > 15 is consider invalid.
- Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP,
FSTP, FSTPNCE, NOP.
- Handle some tricky code for some X86_64 instructions with REX prefix.
- Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg
- MOV32ms & MOV32sm should reference word rather than dword.
[ Arm64 ]
- BL & BLR instructions do not read SP register.
- Print absolute (rather than relative) address for instructions B, BL,
CBNZ, ADR.
[ Arm ]
- Instructions ADC & SBC do not update flags.
- BL & BLX do not read SP, but PC register.
- Alias LDR instruction with operands [sp], 4 to POP.
- Print immediate operand of MVN instruction in positive hexadecimal form.
[ PowerPC ]
- Fix some compilation bugs when DIET mode is enable.
- Populate SLWI/SRWI instruction details with SH operand.
[ Python binding ]
- Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes.
- Fixed a memory leak for Cython disasm functions when we immaturely quit
the enumeration of disassembled instructions.
- Fix a NULL memory access issue when SKIPDATA & Detail modes are enable
at the same time.
- Fix a memory leaking bug when we stop enumeration over the disassembled
instructions prematurely.
- Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
---------------------------------
Version 3.0: November 19th, 2014
[ API ]
- New API: cs_disasm_iter & cs_malloc. See docs/README for tutorials.
- Renamed cs_disasm_ex to cs_disasm (cs_disasm_ex is still supported, but
marked obsolete to be removed in future)
- Support SKIPDATA mode, so Capstone can jump over unknown data and keep going
from the next legitimate instruction. See docs/README for tutorials.
- More details provided in cs_detail struct for all architectures.
- API version was bumped to 3.0.
[ Bindings ]
- Python binding supports Python3 (besides Python2).
- Support Ocaml binding.
- Java: add close() method to be used to deinitialize a Capstone object when
no longer use it.
[ Architectures ]
- New architectures: Sparc, SystemZ & XCore.
- Important bugfixes for Arm, Arm64, Mips, PowerPC & X86.
- Support more instructions for Arm, Arm64, Mips, PowerPC & X86.
- Always expose absolute addresses rather than relative addresses (Arm, Arm64,
Mips, PPC, Sparc, X86).
- Use common instruction operand types REG, IMM, MEM & FP across all
architectures (to enable cross-architecture analysis).
- Use common instruction group types across all architectures (to enable
cross-architecture analysis).
[ X86 ]
- X86 engine is mature & handles all the malware tricks (that we are aware of).
- Added a lot of new instructions (such as AVX512, 3DNow, etc).
- Add prefix symbols X86_PREFIX_REP/REPNE/LOCK/CS/DS/SS/FS/GS/ES/OPSIZE/ADDRSIZE.
- Print immediate in positive form & hexadecimal for AND/OR/XOR instructions.
- More friendly disassembly for JMP16i (in the form segment:offset)
[ Mips ]
- Engine added supports for new hardware modes: Mips32R6 (CS_MODE_MIPS32R6) &
MipsGP64 (CS_MODE_MIPSGP64).
- Removed the ABI-only mode CS_MODE_N64.
- New modes CS_MODE_MIPS32 & CS_MODE_MIPS64 (to use instead of CS_MODE_32 &
CS_MODE_64).
[ ARM ]
- Support new mode CS_MODE_V8 for Armv8 A32 encodings.
- Print immediate in positive form & hexadecimal for AND/ORR/EOR/BIC instructions
[ ARM64 ]
- Print immediate in hexadecimal for AND/ORR/EOR/TST instructions.
[ PowerPC ]
- Do not print a dot in front of absolute address.
[ Other features ]
- Support for Microsoft Visual Studio (so enable Windows native compilation).
- Support CMake compilation.
- Cross-compile for Android.
- Build libraries/tests using XCode project
- Much faster, while consuming less memory for all architectures.
---------------------------------
Version 2.1.2: April 3rd, 2014
This is a stable release to fix some bugs deep in the core. There is no update
to any architectures or bindings, so bindings version 2.1 can be used with this
version 2.1.2 just fine.
[ Core changes]
- Support cross-compilation for all iDevices (iPhone/iPad/iPod).
- X86: do not print memory offset in negative form.
- Fix a bug in X86 when Capstone cannot handle short instruction.
- Print negative number above -9 without prefix 0x (arm64, mips, arm).
- Correct the SONAME setup for library versioning (Linux, *BSD, Solaris).
- Set library versioning for dylib of OSX.
---------------------------------
Version 2.1.1: March 13th, 2014
This is a stable release to fix some bugs deep in the core. There is no update
to any architectures or bindings, so bindings version 2.1 can be used with this
version 2.1.1 just fine.
[ Core changes]
- Fix a buffer overflow bug in Thumb mode (ARM). Some special input can
trigger this flaw.
- Fix a crash issue when embedding Capstone into OSX kernel. This should
also enable Capstone to be embedded into other systems with limited stack
memory size such as Linux kernel or some firmwares.
- Use a proper SONAME for library versioning (Linux).
---------------------------------
Version 2.1: March 5th, 2014
[ API changes ]
- API version has been bumped to 2.1.
- Change prototype of cs_close() to be able to invalidate closed handle.
See http://capstone-engine.org/version_2.1_API.html for more information.
- Extend cs_support() to handle more query types, not only about supported
architectures. This change is backward compatible, however, so existent code
do not need to be modified to support this.
- New query type CS_SUPPORT_DIET for cs_support() to ask about diet status of
the engine.
- New error code CS_ERR_DIET to report errors about newly added diet mode.
- New error code CS_ERR_VERSION to report issue of incompatible versions between
bindings & core engine.
[ Core changes ]
- On memory usage, Capstone uses about 40% less memory, while still faster
than version 2.0.
- All architectures are much smaller: binaries size reduce at least 30%.
Especially, X86-only binary reduces from 1.9MB to just 720KB.
- Support "diet" mode, in which engine size is further reduced (by around 40%)
for embedding purpose. The price to pay is that we have to sacrifice some
non-critical data fields. See http://capstone-engine.org/diet.html for more
details.
[ Architectures ]
- Update all 5 architectures to fix bugs.
- PowerPC:
- New instructions: FMR & MSYNC.
- Mips:
- New instruction: DLSA
- X86:
- Properly handle AVX-512 instructions.
- New instructions: PSETPM, SALC, INT1, GETSEC.
- Fix some memory leaking issues in case of prefixed instructions such
as LOCK, REP, REPNE.
[ Python binding ]
- Verify the core version at initialization time. Refuse to run if its version
is different from the core's version.
- New API disasm_lite() added to Cs class. This light API only returns tuples of
(address, size, mnemonic, op_str), rather than list of CsInsn objects. This
improves performance by around 30% in some benchmarks.
- New API version_bind() returns binding's version, which might differ from
the core's API version if the binding is out-of-date.
- New API debug() returns information on Cython support, diet status & archs
compiled in.
- Fixed some memory leaking bugs for Cython binding.
- Fix a bug crashing Cython code when accessing @regs_read/regs_write/groups.
- Support diet mode.
[ Java binding ]
- Fix some memory leaking bugs.
- New API version() returns combined version.
- Support diet mode.
- Better support for detail option.
[ Miscellaneous ]
- make.sh now can uninstall the core engine. This is done with:
$ sudo ./make.sh uninstall
----------------------------------
Version 2.0: January 22nd, 2014
Release 2.0 deprecates version 1.0 and brings a lot of crucial changes.
[ API changes ]
- API version has been bumped to 2.0 (see cs_version() API)
- New API cs_strerror(errno) returns a string describing error code given
in its only argument.
- cs_version() now returns combined version encoding both major & minor versions.
- New option CS_OPT_MODE allows to change engine’s mode at run-time with
cs_option().
- New option CS_OPT_MEM allows to specify user-defined functions for dynamically
memory management used internally by Capstone. This is useful to embed Capstone
into special environments such as kernel or firmware.
- New API cs_support() can be used to check if this lib supports a particular
architecture (this is necessary since we now allow to choose which architectures
to compile in).
- The detail option is OFF by default now. To get detail information, it should be
explicitly turned ON. The details then can be accessed using cs_insn.detail
pointer (to newly added structure cs_detail)
[ Core changes ]
- On memory usage, Capstone uses much less memory, but a lot faster now.
- User now can choose which architectures to be supported by modifying config.mk
before compiling/installing.
[ Architectures ]
- Arm
- Support Big-Endian mode (besides Little-Endian mode).
- Support friendly register, so instead of output sub "r12,r11,0x14",
we have "sub ip,fp,0x14".
- Arm64: support Big-Endian mode (besides Little-Endian mode).
- PowerPC: newly added.
- Mips: support friendly register, so instead of output "srl $2,$1,0x1f",
we have "srl $v0,$at,0x1f".
- X86: bug fixes.
[ Python binding ]
- Python binding is vastly improved in performance: around 3 ~ 4 times faster
than in 1.0.
- Cython support has been added, which can further speed up over the default
pure Python binding (up to 30% in some cases)
- Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
to return successfully disassembled instructions. This improves the performance
and reduces memory usage.
[ Java binding ]
- Better performance & bug fixes.
[ Miscellaneous ]
- Fixed some installation issues with Gentoo Linux.
- Capstone now can easily compile/install on all *nix, including Linux, OSX,
{Net, Free, Open}BSD & Solaris.
----------------------------------
[Version 1.0]: December 18th, 2013
- Initial public release.
================================================
FILE: LEB128.h
================================================
//===- llvm/Support/LEB128.h - [SU]LEB128 utility functions -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file declares some utility functions for encoding SLEB128 and
// ULEB128 values.
//
//===----------------------------------------------------------------------===//
/* Capstone Disassembly Engine */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
#ifndef CS_LLVM_SUPPORT_LEB128_H
#define CS_LLVM_SUPPORT_LEB128_H
#include "include/capstone/capstone.h"
/// Utility function to decode a ULEB128 value.
static inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n)
{
const uint8_t *orig_p = p;
uint64_t Value = 0;
unsigned Shift = 0;
do {
Value += (uint64_t)(*p & 0x7f) << Shift;
Shift += 7;
} while (*p++ >= 128);
if (n)
*n = (unsigned)(p - orig_p);
return Value;
}
#endif // LLVM_SYSTEM_LEB128_H
================================================
FILE: LICENSES/LICENSE.TXT
================================================
This is the software license for Capstone disassembly framework.
Capstone has been designed & implemented by Nguyen Anh Quynh <aquynh@gmail.com>
See http://www.capstone-engine.org for further information.
Copyright (c) 2013, COSEINC.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
* Neither the name of the developer(s) nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
================================================
FILE: LICENSES/LICENSE_BSD_3_CLAUSE.txt
================================================
Copyright (c) <year> <owner>.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
================================================
FILE: LICENSES/LICENSE_LLVM.TXT
================================================
==============================================================================
LLVM Release License
==============================================================================
University of Illinois/NCSA
Open Source License
Copyright (c) 2003-2013 University of Illinois at Urbana-Champaign.
All rights reserved.
Developed by:
LLVM Team
University of Illinois at Urbana-Champaign
http://llvm.org
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal with
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimers.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimers in the
documentation and/or other materials provided with the distribution.
* Neither the names of the LLVM Team, University of Illinois at
Urbana-Champaign, nor the names of its contributors may be used to
endorse or promote products derived from this Software without specific
prior written permission.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
SOFTWARE.
==============================================================================
Copyrights and Licenses for Third Party Software Distributed with LLVM:
==============================================================================
The LLVM software contains code written by third parties. Such software will
have its own individual LICENSE.TXT file in the directory in which it appears.
This file will describe the copyrights, license, and restrictions which apply
to that code.
The disclaimer of warranty in the University of Illinois Open Source License
applies to all code in the L
gitextract_6lvft0ip/
├── .appveyor.yml
├── .clang-format
├── .dockerignore
├── .editorconfig
├── .gitattributes
├── .github/
│ ├── ISSUE_TEMPLATE/
│ │ ├── bug_report_asm.md
│ │ ├── bug_report_general.md
│ │ └── feature_request.md
│ ├── PULL_REQUEST_TEMPLATE.md
│ ├── labeler.yml
│ └── workflows/
│ ├── CITest.yml
│ ├── CrossBuilds.yml
│ ├── auto-sync.yml
│ ├── build-wheels-publish.yml
│ ├── build_release.yml
│ ├── clang-format.yml
│ ├── clang-tidy.yml
│ ├── coverity.yml
│ ├── fuzz.yml
│ └── labeler.yml
├── .gitignore
├── .gitmodules
├── .reuse/
│ ├── dep5
│ └── templates/
│ └── license-template.jinja2
├── BUILDING.md
├── CMakeLists.txt
├── CMakePresets.json
├── COMPILE_MAKE.TXT
├── CONTRIBUTING.md
├── CPackConfig.cmake
├── CPackConfig.txt
├── CREDITS.TXT
├── ChangeLog
├── LEB128.h
├── LICENSES/
│ ├── LICENSE.TXT
│ ├── LICENSE_BSD_3_CLAUSE.txt
│ └── LICENSE_LLVM.TXT
├── MCAsmInfo.h
├── MCDisassembler.h
├── MCFixedLenDisassembler.h
├── MCInst.c
├── MCInst.h
├── MCInstPrinter.c
├── MCInstPrinter.h
├── MCInstrDesc.c
├── MCInstrDesc.h
├── MCRegisterInfo.c
├── MCRegisterInfo.h
├── Makefile
├── Mapping.c
├── Mapping.h
├── MathExtras.h
├── README.md
├── SPONSORS.TXT
├── SStream.c
├── SStream.h
├── arch/
│ ├── AArch64/
│ │ ├── AArch64AddressingModes.h
│ │ ├── AArch64BaseInfo.c
│ │ ├── AArch64BaseInfo.h
│ │ ├── AArch64Disassembler.c
│ │ ├── AArch64DisassemblerExtension.c
│ │ ├── AArch64DisassemblerExtension.h
│ │ ├── AArch64GenAsmWriter.inc
│ │ ├── AArch64GenCSAliasMnemMap.inc
│ │ ├── AArch64GenCSFeatureName.inc
│ │ ├── AArch64GenCSMappingInsn.inc
│ │ ├── AArch64GenCSMappingInsnName.inc
│ │ ├── AArch64GenCSMappingInsnOp.inc
│ │ ├── AArch64GenCSOpGroup.inc
│ │ ├── AArch64GenDisassemblerTables.inc
│ │ ├── AArch64GenInstrInfo.inc
│ │ ├── AArch64GenRegisterInfo.inc
│ │ ├── AArch64GenSubtargetInfo.inc
│ │ ├── AArch64GenSystemOperands.inc
│ │ ├── AArch64GenSystemRegister.inc
│ │ ├── AArch64InstPrinter.c
│ │ ├── AArch64InstPrinter.h
│ │ ├── AArch64Linkage.h
│ │ ├── AArch64Mapping.c
│ │ ├── AArch64Mapping.h
│ │ ├── AArch64Module.c
│ │ └── AArch64Module.h
│ ├── ARC/
│ │ ├── ARCDisassembler.c
│ │ ├── ARCGenAsmWriter.inc
│ │ ├── ARCGenCSInsnEnum.inc
│ │ ├── ARCGenCSMappingInsn.inc
│ │ ├── ARCGenCSMappingInsnName.inc
│ │ ├── ARCGenCSMappingInsnOp.inc
│ │ ├── ARCGenCSOpGroup.inc
│ │ ├── ARCGenCSRegEnum.inc
│ │ ├── ARCGenDisassemblerTables.inc
│ │ ├── ARCGenInstrInfo.inc
│ │ ├── ARCGenRegisterInfo.inc
│ │ ├── ARCGenSubtargetInfo.inc
│ │ ├── ARCInfo.h
│ │ ├── ARCInstPrinter.c
│ │ ├── ARCInstPrinter.h
│ │ ├── ARCLinkage.h
│ │ ├── ARCMapping.c
│ │ ├── ARCMapping.h
│ │ ├── ARCModule.c
│ │ └── ARCModule.h
│ ├── ARM/
│ │ ├── ARMAddressingModes.h
│ │ ├── ARMBaseInfo.c
│ │ ├── ARMBaseInfo.h
│ │ ├── ARMDisassembler.c
│ │ ├── ARMDisassemblerExtension.c
│ │ ├── ARMDisassemblerExtension.h
│ │ ├── ARMFeatureEnum.inc
│ │ ├── ARMGenAsmWriter.inc
│ │ ├── ARMGenCSAliasMnemMap.inc
│ │ ├── ARMGenCSFeatureName.inc
│ │ ├── ARMGenCSMappingInsn.inc
│ │ ├── ARMGenCSMappingInsnName.inc
│ │ ├── ARMGenCSMappingInsnOp.inc
│ │ ├── ARMGenCSOpGroup.inc
│ │ ├── ARMGenDisassemblerTables.inc
│ │ ├── ARMGenInstrInfo.inc
│ │ ├── ARMGenRegisterInfo.inc
│ │ ├── ARMGenSubtargetInfo.inc
│ │ ├── ARMGenSystemRegister.inc
│ │ ├── ARMInsnEnum.inc
│ │ ├── ARMInstPrinter.c
│ │ ├── ARMInstPrinter.h
│ │ ├── ARMLinkage.h
│ │ ├── ARMMapping.c
│ │ ├── ARMMapping.h
│ │ ├── ARMModule.c
│ │ └── ARMModule.h
│ ├── Alpha/
│ │ ├── AlphaDisassembler.c
│ │ ├── AlphaDisassembler.h
│ │ ├── AlphaGenAsmWriter.inc
│ │ ├── AlphaGenCSMappingInsn.inc
│ │ ├── AlphaGenCSMappingInsnName.inc
│ │ ├── AlphaGenCSMappingInsnOp.inc
│ │ ├── AlphaGenCSOpGroup.inc
│ │ ├── AlphaGenDisassemblerTables.inc
│ │ ├── AlphaGenInstrInfo.inc
│ │ ├── AlphaGenRegisterInfo.inc
│ │ ├── AlphaGenSubtargetInfo.inc
│ │ ├── AlphaInstPrinter.c
│ │ ├── AlphaLinkage.h
│ │ ├── AlphaMapping.c
│ │ ├── AlphaMapping.h
│ │ ├── AlphaModule.c
│ │ └── AlphaModule.h
│ ├── BPF/
│ │ ├── BPFConstants.h
│ │ ├── BPFDisassembler.c
│ │ ├── BPFDisassembler.h
│ │ ├── BPFInstPrinter.c
│ │ ├── BPFInstPrinter.h
│ │ ├── BPFMapping.c
│ │ ├── BPFMapping.h
│ │ ├── BPFModule.c
│ │ └── BPFModule.h
│ ├── EVM/
│ │ ├── EVMDisassembler.c
│ │ ├── EVMDisassembler.h
│ │ ├── EVMInstPrinter.c
│ │ ├── EVMInstPrinter.h
│ │ ├── EVMMapping.c
│ │ ├── EVMMapping.h
│ │ ├── EVMMappingInsn.inc
│ │ ├── EVMModule.c
│ │ └── EVMModule.h
│ ├── HPPA/
│ │ ├── HPPAConstants.h
│ │ ├── HPPADisassembler.c
│ │ ├── HPPADisassembler.h
│ │ ├── HPPAInstPrinter.c
│ │ ├── HPPAInstPrinter.h
│ │ ├── HPPAMapping.c
│ │ ├── HPPAMapping.h
│ │ ├── HPPAModule.c
│ │ └── HPPAModule.h
│ ├── LoongArch/
│ │ ├── LoongArchDisassembler.c
│ │ ├── LoongArchDisassemblerExtension.c
│ │ ├── LoongArchDisassemblerExtension.h
│ │ ├── LoongArchGenAsmWriter.inc
│ │ ├── LoongArchGenCSAliasEnum.inc
│ │ ├── LoongArchGenCSAliasMnemMap.inc
│ │ ├── LoongArchGenCSFeatureName.inc
│ │ ├── LoongArchGenCSMappingInsn.inc
│ │ ├── LoongArchGenCSMappingInsnName.inc
│ │ ├── LoongArchGenCSMappingInsnOp.inc
│ │ ├── LoongArchGenCSOpGroup.inc
│ │ ├── LoongArchGenDisassemblerTables.inc
│ │ ├── LoongArchGenInstrInfo.inc
│ │ ├── LoongArchGenRegisterInfo.inc
│ │ ├── LoongArchGenSubtargetInfo.inc
│ │ ├── LoongArchInstPrinter.c
│ │ ├── LoongArchInstPrinter.h
│ │ ├── LoongArchLinkage.h
│ │ ├── LoongArchMapping.c
│ │ ├── LoongArchMapping.h
│ │ ├── LoongArchModule.c
│ │ └── LoongArchModule.h
│ ├── M680X/
│ │ ├── M680XDisassembler.c
│ │ ├── M680XDisassembler.h
│ │ ├── M680XDisassemblerInternals.h
│ │ ├── M680XInstPrinter.c
│ │ ├── M680XInstPrinter.h
│ │ ├── M680XModule.c
│ │ ├── M680XModule.h
│ │ ├── cpu12.inc
│ │ ├── hcs08.inc
│ │ ├── hd6301.inc
│ │ ├── hd6309.inc
│ │ ├── insn_props.inc
│ │ ├── m6800.inc
│ │ ├── m6801.inc
│ │ ├── m6805.inc
│ │ ├── m6808.inc
│ │ ├── m6809.inc
│ │ ├── m6811.inc
│ │ └── rs08.inc
│ ├── M68K/
│ │ ├── M68KDisassembler.c
│ │ ├── M68KDisassembler.h
│ │ ├── M68KInstPrinter.c
│ │ ├── M68KInstPrinter.h
│ │ ├── M68KInstructionTable.inc
│ │ ├── M68KModule.c
│ │ └── M68KModule.h
│ ├── MOS65XX/
│ │ ├── MOS65XXDisassembler.c
│ │ ├── MOS65XXDisassembler.h
│ │ ├── MOS65XXDisassemblerInternals.h
│ │ ├── MOS65XXModule.c
│ │ ├── MOS65XXModule.h
│ │ ├── instruction_info.inc
│ │ ├── m6502.inc
│ │ ├── m65816.inc
│ │ ├── m65c02.inc
│ │ └── mw65c02.inc
│ ├── Mips/
│ │ ├── MipsCP0RegisterMap.h
│ │ ├── MipsDisassembler.c
│ │ ├── MipsDisassembler.h
│ │ ├── MipsGenAsmWriter.inc
│ │ ├── MipsGenCSAliasEnum.inc
│ │ ├── MipsGenCSAliasMnemMap.inc
│ │ ├── MipsGenCSFeatureEnum.inc
│ │ ├── MipsGenCSFeatureName.inc
│ │ ├── MipsGenCSInsnEnum.inc
│ │ ├── MipsGenCSMappingInsn.inc
│ │ ├── MipsGenCSMappingInsnName.inc
│ │ ├── MipsGenCSMappingInsnOp.inc
│ │ ├── MipsGenCSOpGroup.inc
│ │ ├── MipsGenCSRegEnum.inc
│ │ ├── MipsGenDisassemblerTables.inc
│ │ ├── MipsGenInstrInfo.inc
│ │ ├── MipsGenRegisterInfo.inc
│ │ ├── MipsGenSubtargetInfo.inc
│ │ ├── MipsInstPrinter.c
│ │ ├── MipsInstPrinter.h
│ │ ├── MipsLinkage.h
│ │ ├── MipsMapping.c
│ │ ├── MipsMapping.h
│ │ ├── MipsMappingInsn.inc
│ │ ├── MipsModule.c
│ │ └── MipsModule.h
│ ├── PowerPC/
│ │ ├── PPCDisassembler.c
│ │ ├── PPCGenAsmWriter.inc
│ │ ├── PPCGenCSAliasMnemMap.inc
│ │ ├── PPCGenCSFeatureName.inc
│ │ ├── PPCGenCSMappingInsn.inc
│ │ ├── PPCGenCSMappingInsnName.inc
│ │ ├── PPCGenCSMappingInsnOp.inc
│ │ ├── PPCGenCSOpGroup.inc
│ │ ├── PPCGenDisassemblerTables.inc
│ │ ├── PPCGenInstrInfo.inc
│ │ ├── PPCGenRegisterInfo.inc
│ │ ├── PPCGenSubtargetInfo.inc
│ │ ├── PPCInstPrinter.c
│ │ ├── PPCInstrInfo.h
│ │ ├── PPCLinkage.h
│ │ ├── PPCMCTargetDesc.h
│ │ ├── PPCMapping.c
│ │ ├── PPCMapping.h
│ │ ├── PPCModule.c
│ │ ├── PPCModule.h
│ │ ├── PPCPredicates.h
│ │ └── PPCRegisterInfo.h
│ ├── RISCV/
│ │ ├── RISCVBaseInfo.c
│ │ ├── RISCVBaseInfo.h
│ │ ├── RISCVDisassembler.c
│ │ ├── RISCVDisassembler.h
│ │ ├── RISCVDisassemblerExtension.c
│ │ ├── RISCVDisassemblerExtension.h
│ │ ├── RISCVGenAsmWriter.inc
│ │ ├── RISCVGenCSAliasEnum.inc
│ │ ├── RISCVGenCSAliasMnemMap.inc
│ │ ├── RISCVGenCSFeatureEnum.inc
│ │ ├── RISCVGenCSFeatureName.inc
│ │ ├── RISCVGenCSInsnEnum.inc
│ │ ├── RISCVGenCSMappingInsn.inc
│ │ ├── RISCVGenCSMappingInsnName.inc
│ │ ├── RISCVGenCSMappingInsnOp.inc
│ │ ├── RISCVGenCSOpGroup.inc
│ │ ├── RISCVGenCSRegEnum.inc
│ │ ├── RISCVGenCSSystemOperandsEnum.inc
│ │ ├── RISCVGenCompressedInstructionsInfo.inc
│ │ ├── RISCVGenDisassemblerTables.inc
│ │ ├── RISCVGenInstrInfo.inc
│ │ ├── RISCVGenRegisterInfo.inc
│ │ ├── RISCVGenSubtargetInfo.inc
│ │ ├── RISCVGenSystemOperands.inc
│ │ ├── RISCVInstPrinter.c
│ │ ├── RISCVInstPrinter.h
│ │ ├── RISCVLinkage.h
│ │ ├── RISCVMapping.c
│ │ ├── RISCVMapping.h
│ │ ├── RISCVModule.c
│ │ └── RISCVModule.h
│ ├── SH/
│ │ ├── SHDisassembler.c
│ │ ├── SHDisassembler.h
│ │ ├── SHInsnTable.inc
│ │ ├── SHInstPrinter.c
│ │ ├── SHInstPrinter.h
│ │ ├── SHModule.c
│ │ ├── SHModule.h
│ │ └── mktable.rb
│ ├── Sparc/
│ │ ├── SparcDisassembler.c
│ │ ├── SparcDisassemblerExtension.c
│ │ ├── SparcDisassemblerExtension.h
│ │ ├── SparcGenAsmWriter.inc
│ │ ├── SparcGenCSAliasMnemMap.inc
│ │ ├── SparcGenCSFeatureName.inc
│ │ ├── SparcGenCSMappingInsn.inc
│ │ ├── SparcGenCSMappingInsnName.inc
│ │ ├── SparcGenCSMappingInsnOp.inc
│ │ ├── SparcGenCSOpGroup.inc
│ │ ├── SparcGenDisassemblerTables.inc
│ │ ├── SparcGenInstrInfo.inc
│ │ ├── SparcGenRegisterInfo.inc
│ │ ├── SparcGenSubtargetInfo.inc
│ │ ├── SparcGenSystemOperands.inc
│ │ ├── SparcInstPrinter.c
│ │ ├── SparcInstPrinter.h
│ │ ├── SparcLinkage.h
│ │ ├── SparcMCTargetDesc.h
│ │ ├── SparcMapping.c
│ │ ├── SparcMapping.h
│ │ ├── SparcModule.c
│ │ └── SparcModule.h
│ ├── SystemZ/
│ │ ├── SystemZDisassembler.c
│ │ ├── SystemZDisassemblerExtension.c
│ │ ├── SystemZDisassemblerExtension.h
│ │ ├── SystemZGenAsmWriter.inc
│ │ ├── SystemZGenCSAliasMnemMap.inc
│ │ ├── SystemZGenCSFeatureName.inc
│ │ ├── SystemZGenCSMappingInsn.inc
│ │ ├── SystemZGenCSMappingInsnName.inc
│ │ ├── SystemZGenCSMappingInsnOp.inc
│ │ ├── SystemZGenCSOpGroup.inc
│ │ ├── SystemZGenDisassemblerTables.inc
│ │ ├── SystemZGenInstrInfo.inc
│ │ ├── SystemZGenRegisterInfo.inc
│ │ ├── SystemZGenSubtargetInfo.inc
│ │ ├── SystemZInstPrinter.c
│ │ ├── SystemZInstPrinter.h
│ │ ├── SystemZLinkage.h
│ │ ├── SystemZMCTargetDesc.c
│ │ ├── SystemZMCTargetDesc.h
│ │ ├── SystemZMapping.c
│ │ ├── SystemZMapping.h
│ │ ├── SystemZModule.c
│ │ └── SystemZModule.h
│ ├── TMS320C64x/
│ │ ├── TMS320C64xDisassembler.c
│ │ ├── TMS320C64xDisassembler.h
│ │ ├── TMS320C64xGenAsmWriter.inc
│ │ ├── TMS320C64xGenDisassemblerTables.inc
│ │ ├── TMS320C64xGenInstrInfo.inc
│ │ ├── TMS320C64xGenRegisterInfo.inc
│ │ ├── TMS320C64xInstPrinter.c
│ │ ├── TMS320C64xInstPrinter.h
│ │ ├── TMS320C64xMapping.c
│ │ ├── TMS320C64xMapping.h
│ │ ├── TMS320C64xModule.c
│ │ └── TMS320C64xModule.h
│ ├── TriCore/
│ │ ├── TriCoreDisassembler.c
│ │ ├── TriCoreDisassembler.h
│ │ ├── TriCoreGenAsmWriter.inc
│ │ ├── TriCoreGenCSFeatureName.inc
│ │ ├── TriCoreGenCSMappingInsn.inc
│ │ ├── TriCoreGenCSMappingInsnName.inc
│ │ ├── TriCoreGenCSMappingInsnOp.inc
│ │ ├── TriCoreGenCSOpGroup.inc
│ │ ├── TriCoreGenDisassemblerTables.inc
│ │ ├── TriCoreGenInstrInfo.inc
│ │ ├── TriCoreGenRegisterInfo.inc
│ │ ├── TriCoreGenSubtargetInfo.inc
│ │ ├── TriCoreInstPrinter.c
│ │ ├── TriCoreLinkage.h
│ │ ├── TriCoreMapping.c
│ │ ├── TriCoreMapping.h
│ │ ├── TriCoreModule.c
│ │ └── TriCoreModule.h
│ ├── WASM/
│ │ ├── WASMDisassembler.c
│ │ ├── WASMDisassembler.h
│ │ ├── WASMInstPrinter.c
│ │ ├── WASMInstPrinter.h
│ │ ├── WASMMapping.c
│ │ ├── WASMMapping.h
│ │ ├── WASMModule.c
│ │ └── WASMModule.h
│ ├── X86/
│ │ ├── X86ATTInstPrinter.c
│ │ ├── X86BaseInfo.h
│ │ ├── X86Disassembler.c
│ │ ├── X86Disassembler.h
│ │ ├── X86DisassemblerDecoder.c
│ │ ├── X86DisassemblerDecoder.h
│ │ ├── X86DisassemblerDecoderCommon.h
│ │ ├── X86GenAsmWriter.inc
│ │ ├── X86GenAsmWriter1.inc
│ │ ├── X86GenAsmWriter1_reduce.inc
│ │ ├── X86GenAsmWriter_reduce.inc
│ │ ├── X86GenDisassemblerTables.inc
│ │ ├── X86GenDisassemblerTables2.inc
│ │ ├── X86GenDisassemblerTables_reduce.inc
│ │ ├── X86GenDisassemblerTables_reduce2.inc
│ │ ├── X86GenInstrInfo.inc
│ │ ├── X86GenInstrInfo_reduce.inc
│ │ ├── X86GenRegisterInfo.inc
│ │ ├── X86GenRegisterName.inc
│ │ ├── X86GenRegisterName1.inc
│ │ ├── X86ImmSize.inc
│ │ ├── X86InstPrinter.h
│ │ ├── X86InstPrinterCommon.c
│ │ ├── X86InstPrinterCommon.h
│ │ ├── X86IntelInstPrinter.c
│ │ ├── X86Lookup16.inc
│ │ ├── X86Lookup16_reduce.inc
│ │ ├── X86Mapping.c
│ │ ├── X86Mapping.h
│ │ ├── X86MappingInsn.inc
│ │ ├── X86MappingInsnName.inc
│ │ ├── X86MappingInsnName_reduce.inc
│ │ ├── X86MappingInsnOp.inc
│ │ ├── X86MappingInsnOp_reduce.inc
│ │ ├── X86MappingInsn_reduce.inc
│ │ ├── X86MappingReg.inc
│ │ ├── X86Module.c
│ │ └── X86Module.h
│ ├── XCore/
│ │ ├── XCoreDisassembler.c
│ │ ├── XCoreDisassembler.h
│ │ ├── XCoreGenAsmWriter.inc
│ │ ├── XCoreGenDisassemblerTables.inc
│ │ ├── XCoreGenInstrInfo.inc
│ │ ├── XCoreGenRegisterInfo.inc
│ │ ├── XCoreInstPrinter.c
│ │ ├── XCoreInstPrinter.h
│ │ ├── XCoreMapping.c
│ │ ├── XCoreMapping.h
│ │ ├── XCoreMappingInsn.inc
│ │ ├── XCoreModule.c
│ │ └── XCoreModule.h
│ └── Xtensa/
│ ├── XtensaDisassembler.c
│ ├── XtensaDisassembler.h
│ ├── XtensaGenAsmWriter.inc
│ ├── XtensaGenCSFeatureName.inc
│ ├── XtensaGenCSMappingInsn.inc
│ ├── XtensaGenCSMappingInsnName.inc
│ ├── XtensaGenCSMappingInsnOp.inc
│ ├── XtensaGenCSOpGroup.inc
│ ├── XtensaGenDisassemblerTables.inc
│ ├── XtensaGenInstrInfo.inc
│ ├── XtensaGenRegisterInfo.inc
│ ├── XtensaGenSubtargetInfo.inc
│ ├── XtensaInstPrinter.c
│ ├── XtensaInstPrinter.h
│ ├── XtensaMapping.c
│ ├── XtensaMapping.h
│ ├── XtensaModule.c
│ ├── XtensaModule.h
│ └── priv.h
├── bindings/
│ ├── README.md
│ ├── const_generator.py
│ ├── java/
│ │ ├── .gitignore
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── TestArm.java
│ │ ├── TestArm64.java
│ │ ├── TestBasic.java
│ │ ├── TestM680x.java
│ │ ├── TestMips.java
│ │ ├── TestPpc.java
│ │ ├── TestSparc.java
│ │ ├── TestSystemz.java
│ │ ├── TestX86.java
│ │ ├── TestXcore.java
│ │ ├── capstone/
│ │ │ ├── .gitignore
│ │ │ ├── Arm.java
│ │ │ ├── Arm64.java
│ │ │ ├── Arm64_const.java
│ │ │ ├── Arm_const.java
│ │ │ ├── Capstone.java
│ │ │ ├── Evm_const.java
│ │ │ ├── M680x.java
│ │ │ ├── M680x_const.java
│ │ │ ├── M68k_const.java
│ │ │ ├── Mips.java
│ │ │ ├── Mips_const.java
│ │ │ ├── Ppc.java
│ │ │ ├── Ppc_const.java
│ │ │ ├── Sparc.java
│ │ │ ├── Sparc_const.java
│ │ │ ├── Systemz.java
│ │ │ ├── Systemz_const.java
│ │ │ ├── Sysz_const.java
│ │ │ ├── TMS320C64x_const.java
│ │ │ ├── Wasm_const.java
│ │ │ ├── X86.java
│ │ │ ├── X86_const.java
│ │ │ ├── Xcore.java
│ │ │ └── Xcore_const.java
│ │ └── run.sh
│ ├── ocaml/
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── arm.ml
│ │ ├── arm64.ml
│ │ ├── arm64_const.ml
│ │ ├── arm_const.ml
│ │ ├── capstone.ml
│ │ ├── evm_const.ml
│ │ ├── m680x.ml
│ │ ├── m680x_const.ml
│ │ ├── m68k_const.ml
│ │ ├── mips.ml
│ │ ├── mips_const.ml
│ │ ├── ocaml.c
│ │ ├── ppc.ml
│ │ ├── ppc_const.ml
│ │ ├── sparc.ml
│ │ ├── sparc_const.ml
│ │ ├── systemz.ml
│ │ ├── systemz_const.ml
│ │ ├── sysz_const.ml
│ │ ├── test_arm.ml
│ │ ├── test_arm64.ml
│ │ ├── test_basic.ml
│ │ ├── test_detail.ml
│ │ ├── test_m680x.ml
│ │ ├── test_mips.ml
│ │ ├── test_ppc.ml
│ │ ├── test_sparc.ml
│ │ ├── test_systemz.ml
│ │ ├── test_x86.ml
│ │ ├── test_xcore.ml
│ │ ├── tms320c64x_const.ml
│ │ ├── wasm_const.ml
│ │ ├── x86.ml
│ │ ├── x86_const.ml
│ │ ├── xcore.ml
│ │ └── xcore_const.ml
│ ├── powershell/
│ │ ├── Capstone/
│ │ │ ├── Capstone.Format.ps1xml
│ │ │ ├── Capstone.psd1
│ │ │ ├── Capstone.psm1
│ │ │ └── Lib/
│ │ │ └── Capstone/
│ │ │ └── .gitignore
│ │ └── README.md
│ ├── python/
│ │ ├── .gitignore
│ │ ├── BUILDING.md
│ │ ├── LICENSE.TXT
│ │ ├── MANIFEST.in
│ │ ├── README.md
│ │ ├── capstone/
│ │ │ ├── aarch64.py
│ │ │ ├── aarch64_const.py
│ │ │ ├── alpha.py
│ │ │ ├── alpha_const.py
│ │ │ ├── arc.py
│ │ │ ├── arc_const.py
│ │ │ ├── arm.py
│ │ │ ├── arm64.py
│ │ │ ├── arm64_const.py
│ │ │ ├── arm_const.py
│ │ │ ├── bpf.py
│ │ │ ├── bpf_const.py
│ │ │ ├── evm.py
│ │ │ ├── evm_const.py
│ │ │ ├── hppa.py
│ │ │ ├── hppa_const.py
│ │ │ ├── loongarch.py
│ │ │ ├── loongarch_const.py
│ │ │ ├── m680x.py
│ │ │ ├── m680x_const.py
│ │ │ ├── m68k.py
│ │ │ ├── m68k_const.py
│ │ │ ├── mips.py
│ │ │ ├── mips_const.py
│ │ │ ├── mos65xx.py
│ │ │ ├── mos65xx_const.py
│ │ │ ├── ppc.py
│ │ │ ├── ppc_const.py
│ │ │ ├── riscv.py
│ │ │ ├── riscv_const.py
│ │ │ ├── sh.py
│ │ │ ├── sh_const.py
│ │ │ ├── sparc.py
│ │ │ ├── sparc_const.py
│ │ │ ├── systemz.py
│ │ │ ├── systemz_const.py
│ │ │ ├── sysz_const.py
│ │ │ ├── tms320c64x.py
│ │ │ ├── tms320c64x_const.py
│ │ │ ├── tricore.py
│ │ │ ├── tricore_const.py
│ │ │ ├── wasm.py
│ │ │ ├── wasm_const.py
│ │ │ ├── x86.py
│ │ │ ├── x86_const.py
│ │ │ ├── xcore.py
│ │ │ ├── xcore_const.py
│ │ │ ├── xtensa.py
│ │ │ └── xtensa_const.py
│ │ ├── cstest_py/
│ │ │ ├── README.md
│ │ │ ├── pyproject.toml
│ │ │ └── src/
│ │ │ └── cstest_py/
│ │ │ ├── compare.py
│ │ │ ├── cs_modes.py
│ │ │ ├── cstest.py
│ │ │ └── details.py
│ │ ├── prebuilt/
│ │ │ └── .gitkeep
│ │ ├── pyproject.toml
│ │ ├── setup.py
│ │ └── tests/
│ │ ├── test_all.py
│ │ ├── test_compatibility_layer.py
│ │ ├── test_customized_mnem.py
│ │ ├── test_iter.py
│ │ ├── test_lite.py
│ │ └── test_skipdata.py
│ ├── stdout_cmp.py
│ └── vb6/
│ ├── Apache_2.0_License.txt
│ ├── CDisassembler.cls
│ ├── CInstDetails.cls
│ ├── CInstruction.cls
│ ├── CX86Inst.cls
│ ├── CX86OpMem.cls
│ ├── CX86Operand.cls
│ ├── Form1.frm
│ ├── Form1.frx
│ ├── Module1.bas
│ ├── Project1.vbp
│ ├── Project1.vbw
│ ├── README.md
│ ├── mMisc.bas
│ ├── mx86.bas
│ ├── vbCapstone.cpp
│ ├── vbCapstone.sln
│ └── vbCapstone.vcproj
├── capstone-config.cmake.in
├── capstone.pc.in
├── cmake.sh
├── cmake_uninstall.cmake.in
├── config.mk
├── contrib/
│ ├── README.md
│ ├── cs_driver/
│ │ ├── README.md
│ │ ├── cs_driver/
│ │ │ ├── cs_driver.c
│ │ │ ├── cs_driver.vcxproj
│ │ │ └── cs_driver.vcxproj.filters
│ │ └── cs_driver.sln
│ ├── m68k_instruction_tbl_gen/
│ │ ├── M68KInstructionTblGen.c
│ │ └── Makefile
│ ├── objdump/
│ │ └── objdump-m68k.py
│ ├── riscv_update/
│ │ ├── 0001-capstone-riscv-patchs.patch
│ │ ├── 0002-update-TableGen-for-generate-RISCV-port-inc-for-CAPS.patch
│ │ ├── 0003-clear-old-patchs.patch
│ │ ├── 0004-fix-riscv-registerclass-array-of-genregisterinfo.patch
│ │ ├── 0005-fix-riscv-registerclass-array-of-genregisterinfo.patch
│ │ ├── 0006-fix-output-TAB-for-riscv-capstone.patch
│ │ ├── 0007-fix-riscv-alias-inst-output-useless-newline.patch
│ │ ├── 0008-fix-riscv-inst-output-more-formal.patch
│ │ ├── 0009-fix-riscv-asmwriter-variable-declaration-place.patch
│ │ ├── 0010-fix-riscvgenasmwiter.inc-memory-leak.patch
│ │ ├── 0011-using-static-array-contain-temp-string-for-riscv-asm.patch
│ │ └── README.md
│ └── windows_kernel/
│ ├── README.md
│ ├── libc.cpp
│ └── libc.h
├── cross_configs/
│ ├── README.md
│ ├── linux_arm_fedora42_musl.cmake
│ ├── linux_arm_ubuntu24.cmake
│ ├── linux_mips64_ubuntu24.cmake
│ ├── linux_mips_ubuntu24.cmake
│ ├── linux_ppc64_ubuntu24.cmake
│ ├── linux_s390x_fedora42.cmake
│ ├── linux_s390x_ubuntu24.cmake
│ ├── linux_x86.cmake
│ └── windows_i686_ubuntu24.cmake
├── cs.c
├── cs_priv.h
├── cs_simple_types.h
├── cstool/
│ ├── Makefile
│ ├── README.md
│ ├── cstool.c
│ ├── cstool.h
│ ├── cstool_aarch64.c
│ ├── cstool_alpha.c
│ ├── cstool_arc.c
│ ├── cstool_arm.c
│ ├── cstool_bpf.c
│ ├── cstool_evm.c
│ ├── cstool_hppa.c
│ ├── cstool_loongarch.c
│ ├── cstool_m680x.c
│ ├── cstool_m68k.c
│ ├── cstool_mips.c
│ ├── cstool_mos65xx.c
│ ├── cstool_powerpc.c
│ ├── cstool_riscv.c
│ ├── cstool_sh.c
│ ├── cstool_sparc.c
│ ├── cstool_systemz.c
│ ├── cstool_tms320c64x.c
│ ├── cstool_tricore.c
│ ├── cstool_wasm.c
│ ├── cstool_x86.c
│ ├── cstool_xcore.c
│ ├── cstool_xtensa.c
│ ├── getopt.c
│ └── getopt.h
├── docs/
│ ├── ARCHITECTURE.md
│ ├── README.md
│ └── cs_v6_release_guide.md
├── ext_patches/
│ ├── README.md
│ └── libcyaml/
│ └── CMakeLists.txt
├── functions.mk
├── include/
│ ├── capstone/
│ │ ├── aarch64.h
│ │ ├── alpha.h
│ │ ├── arc.h
│ │ ├── arm.h
│ │ ├── arm64.h
│ │ ├── bpf.h
│ │ ├── capstone.h
│ │ ├── cs_operand.h
│ │ ├── evm.h
│ │ ├── hppa.h
│ │ ├── loongarch.h
│ │ ├── m680x.h
│ │ ├── m68k.h
│ │ ├── mips.h
│ │ ├── mos65xx.h
│ │ ├── platform.h
│ │ ├── ppc.h
│ │ ├── riscv.h
│ │ ├── sh.h
│ │ ├── sparc.h
│ │ ├── systemz.h
│ │ ├── systemz_compatibility.h
│ │ ├── tms320c64x.h
│ │ ├── tricore.h
│ │ ├── wasm.h
│ │ ├── x86.h
│ │ ├── xcore.h
│ │ └── xtensa.h
│ ├── platform.h
│ └── windowsce/
│ ├── intrin.h
│ └── stdint.h
├── make.sh
├── packages/
│ ├── deb/
│ │ └── triggers
│ ├── freebsd/
│ │ └── ports/
│ │ └── devel/
│ │ └── capstone/
│ │ ├── Makefile
│ │ ├── pkg-descr
│ │ └── pkg-plist
│ ├── macports/
│ │ └── devel/
│ │ └── capstone/
│ │ ├── Portfile
│ │ └── files/
│ │ └── patch-Makefile.diff
│ └── rpm/
│ └── postinstall.sh
├── pkgconfig.mk
├── suite/
│ ├── MC/
│ │ ├── AArch64/
│ │ │ ├── a64-ignored-fields.txt.cs
│ │ │ ├── add.s.cs
│ │ │ ├── addqv.s.cs
│ │ │ ├── andqv.s.cs
│ │ │ ├── arm64-adr.s.cs
│ │ │ ├── arm64-advsimd.s.cs
│ │ │ ├── arm64-advsimd.txt.cs
│ │ │ ├── arm64-aliases.s.cs
│ │ │ ├── arm64-arithmetic-encoding.s.cs
│ │ │ ├── arm64-arithmetic.txt.cs
│ │ │ ├── arm64-basic-a64-instructions.s.cs
│ │ │ ├── arm64-bitfield-encoding.s.cs
│ │ │ ├── arm64-branch-encoding.s.cs
│ │ │ ├── arm64-branch.txt.cs
│ │ │ ├── arm64-compact-unwind-fallback.s.cs
│ │ │ ├── arm64-crc32.txt.cs
│ │ │ ├── arm64-crypto.s.cs
│ │ │ ├── arm64-fp-encoding.s.cs
│ │ │ ├── arm64-invalid-logical.txt.cs
│ │ │ ├── arm64-leaf-compact-unwind.s.cs
│ │ │ ├── arm64-logical-encoding.s.cs
│ │ │ ├── arm64-memory.s.cs
│ │ │ ├── arm64-nv-cond.s.cs
│ │ │ ├── arm64-optional-hash.s.cs
│ │ │ ├── arm64-simd-ldst.s.cs
│ │ │ ├── arm64-spsel-sysreg.s.cs
│ │ │ ├── arm64-system-encoding.s.cs
│ │ │ ├── arm64-system.txt.cs
│ │ │ ├── arm64-target-specific-sysreg.s.cs
│ │ │ ├── arm64-vector-lists.s.cs
│ │ │ ├── arm64-verbose-vector-case.s.cs
│ │ │ ├── arm64e.s.cs
│ │ │ ├── armv8.1a-atomic.s.cs
│ │ │ ├── armv8.1a-atomic.txt.cs
│ │ │ ├── armv8.1a-lor.s.cs
│ │ │ ├── armv8.1a-lor.txt.cs
│ │ │ ├── armv8.1a-lse.s.cs
│ │ │ ├── armv8.1a-pan.s.cs
│ │ │ ├── armv8.1a-pan.txt.cs
│ │ │ ├── armv8.1a-rdma.s.cs
│ │ │ ├── armv8.1a-rdma.txt.cs
│ │ │ ├── armv8.1a-vhe.s.cs
│ │ │ ├── armv8.1a-vhe.txt.cs
│ │ │ ├── armv8.2a-at.s.cs
│ │ │ ├── armv8.2a-at.txt.cs
│ │ │ ├── armv8.2a-crypto-apple.s.cs
│ │ │ ├── armv8.2a-crypto.s.cs
│ │ │ ├── armv8.2a-dotprod.s.cs
│ │ │ ├── armv8.2a-mmfr2.txt.cs
│ │ │ ├── armv8.2a-persistent-memory.s.cs
│ │ │ ├── armv8.2a-persistent-memory.txt.cs
│ │ │ ├── armv8.2a-statistical-profiling.s.cs
│ │ │ ├── armv8.2a-statistical-profiling.txt.cs
│ │ │ ├── armv8.2a-uao.s.cs
│ │ │ ├── armv8.2a-uao.txt.cs
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.s.cs
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.txt.cs
│ │ │ ├── armv8.3a-complex.s.cs
│ │ │ ├── armv8.3a-complex.txt.cs
│ │ │ ├── armv8.3a-complex_nofp16.s.cs
│ │ │ ├── armv8.3a-js.s.cs
│ │ │ ├── armv8.3a-js.txt.cs
│ │ │ ├── armv8.3a-pauth.s.cs
│ │ │ ├── armv8.3a-rcpc.s.cs
│ │ │ ├── armv8.3a-rcpc.txt.cs
│ │ │ ├── armv8.3a-signed-pointer.s.cs
│ │ │ ├── armv8.3a-signed-pointer.txt.cs
│ │ │ ├── armv8.4a-actmon.s.cs
│ │ │ ├── armv8.4a-actmon.txt.cs
│ │ │ ├── armv8.4a-dit.s.cs
│ │ │ ├── armv8.4a-dit.txt.cs
│ │ │ ├── armv8.4a-flag.s.cs
│ │ │ ├── armv8.4a-flag.txt.cs
│ │ │ ├── armv8.4a-flagm.s.cs
│ │ │ ├── armv8.4a-ldst.s.cs
│ │ │ ├── armv8.4a-ldst.txt.cs
│ │ │ ├── armv8.4a-mpam.s.cs
│ │ │ ├── armv8.4a-mpam.txt.cs
│ │ │ ├── armv8.4a-ras.s.cs
│ │ │ ├── armv8.4a-tlb.s.cs
│ │ │ ├── armv8.4a-trace.s.cs
│ │ │ ├── armv8.4a-trace.txt.cs
│ │ │ ├── armv8.4a-virt.s.cs
│ │ │ ├── armv8.4a-vncr.s.cs
│ │ │ ├── armv8.4a-vncr.txt.cs
│ │ │ ├── armv8.5a-altnzcv.s.cs
│ │ │ ├── armv8.5a-bti.s.cs
│ │ │ ├── armv8.5a-dataproc.txt.cs
│ │ │ ├── armv8.5a-frint.s.cs
│ │ │ ├── armv8.5a-mte.s.cs
│ │ │ ├── armv8.5a-mte.txt.cs
│ │ │ ├── armv8.5a-persistent-memory.s.cs
│ │ │ ├── armv8.5a-persistent-memory.txt.cs
│ │ │ ├── armv8.5a-predres.s.cs
│ │ │ ├── armv8.5a-rand.s.cs
│ │ │ ├── armv8.5a-rand.txt.cs
│ │ │ ├── armv8.5a-sb.s.cs
│ │ │ ├── armv8.5a-specrestrict.s.cs
│ │ │ ├── armv8.5a-ssbs.s.cs
│ │ │ ├── armv8.5a-ssbs.txt.cs
│ │ │ ├── armv8.6a-amvs.s.cs
│ │ │ ├── armv8.6a-bf16.s.cs
│ │ │ ├── armv8.6a-bf16.txt.cs
│ │ │ ├── armv8.6a-ecv.s.cs
│ │ │ ├── armv8.6a-ecv.txt.cs
│ │ │ ├── armv8.6a-fgt.s.cs
│ │ │ ├── armv8.6a-fgt.txt.cs
│ │ │ ├── armv8.6a-simd-matmul.s.cs
│ │ │ ├── armv8.6a-simd-matmul.txt.cs
│ │ │ ├── armv8.7a-hcx.s.cs
│ │ │ ├── armv8.7a-hcx.txt.cs
│ │ │ ├── armv8.7a-ls64.s.cs
│ │ │ ├── armv8.7a-ls64.txt.cs
│ │ │ ├── armv8.7a-wfxt.s.cs
│ │ │ ├── armv8.7a-wfxt.txt.cs
│ │ │ ├── armv8.7a-xs.s.cs
│ │ │ ├── armv8.7a-xs.txt.cs
│ │ │ ├── armv8.8a-hbc.txt.cs
│ │ │ ├── armv8.8a-mops.s.cs
│ │ │ ├── armv8.8a-mops.txt.cs
│ │ │ ├── armv8.8a-nmi.s.cs
│ │ │ ├── armv8.8a-nmi.txt.cs
│ │ │ ├── armv8.9a-ats1a.s.cs
│ │ │ ├── armv8.9a-ats1a.txt.cs
│ │ │ ├── armv8.9a-clrbhb.s.cs
│ │ │ ├── armv8.9a-clrbhb.txt.cs
│ │ │ ├── armv8.9a-cssc.s.cs
│ │ │ ├── armv8.9a-cssc.txt.cs
│ │ │ ├── armv8.9a-debug-pmu.s.cs
│ │ │ ├── armv8.9a-debug-pmu.txt.cs
│ │ │ ├── armv8.9a-lrcpc3.s.cs
│ │ │ ├── armv8.9a-lrcpc3.txt.cs
│ │ │ ├── armv8.9a-pfar.s.cs
│ │ │ ├── armv8.9a-pfar.txt.cs
│ │ │ ├── armv8.9a-prfm-slc.s.cs
│ │ │ ├── armv8.9a-prfm-slc.txt.cs
│ │ │ ├── armv8.9a-rasv2.s.cs
│ │ │ ├── armv8.9a-rasv2.txt.cs
│ │ │ ├── armv8.9a-specres2.s.cs
│ │ │ ├── armv8.9a-specres2.txt.cs
│ │ │ ├── armv8.9a-the.s.cs
│ │ │ ├── armv8.9a-the.txt.cs
│ │ │ ├── armv8a-fpmul-err.txt.cs
│ │ │ ├── armv8a-fpmul.s.cs
│ │ │ ├── armv8a-fpmul.txt.cs
│ │ │ ├── armv8r-inst.s.cs
│ │ │ ├── armv8r-sysreg.s.cs
│ │ │ ├── armv8r-sysreg.txt.cs
│ │ │ ├── armv8r-unsupported-inst.s.cs
│ │ │ ├── armv8r-unsupported-sysreg.s.cs
│ │ │ ├── armv9-mrrs.s.cs
│ │ │ ├── armv9-msrr.s.cs
│ │ │ ├── armv9-sysp.s.cs
│ │ │ ├── armv9-sysp.txt.cs
│ │ │ ├── armv9-sysreg128.txt.cs
│ │ │ ├── armv9.4-lse128.s.cs
│ │ │ ├── armv9.4a-chk.s.cs
│ │ │ ├── armv9.4a-chk.txt.cs
│ │ │ ├── armv9.4a-ebep.s.cs
│ │ │ ├── armv9.4a-ebep.txt.cs
│ │ │ ├── armv9.4a-gcs.s.cs
│ │ │ ├── armv9.4a-gcs.txt.cs
│ │ │ ├── armv9.4a-lse128.txt.cs
│ │ │ ├── armv9.5a-cpa.s.cs
│ │ │ ├── armv9.5a-cpa.txt.cs
│ │ │ ├── armv9.5a-e3dse.s.cs
│ │ │ ├── armv9.5a-e3dse.txt.cs
│ │ │ ├── armv9.5a-fgwte3.s.cs
│ │ │ ├── armv9.5a-fgwte3.txt.cs
│ │ │ ├── armv9.5a-hacdbs.s.cs
│ │ │ ├── armv9.5a-hacdbs.txt.cs
│ │ │ ├── armv9.5a-hdbss.s.cs
│ │ │ ├── armv9.5a-hdbss.txt.cs
│ │ │ ├── armv9.5a-pauthlr.txt.cs
│ │ │ ├── armv9.5a-spmu2.s.cs
│ │ │ ├── armv9.5a-spmu2.txt.cs
│ │ │ ├── armv9.5a-step2.s.cs
│ │ │ ├── armv9.5a-step2.txt.cs
│ │ │ ├── armv9a-mec.s.cs
│ │ │ ├── armv9a-mec.txt.cs
│ │ │ ├── armv9a-rme.s.cs
│ │ │ ├── armv9a-rme.txt.cs
│ │ │ ├── basic-a64-instructions.s.cs
│ │ │ ├── basic-a64-instructions.txt.cs
│ │ │ ├── basic-a64-undefined.txt.cs
│ │ │ ├── basic-a64-unpredictable.txt.cs
│ │ │ ├── bfadd.s.cs
│ │ │ ├── bfclamp.s.cs
│ │ │ ├── bfcvt.s.cs
│ │ │ ├── bfcvtn.s.cs
│ │ │ ├── bfdot.s.cs
│ │ │ ├── bfmax.s.cs
│ │ │ ├── bfmaxnm.s.cs
│ │ │ ├── bfmin.s.cs
│ │ │ ├── bfminnm.s.cs
│ │ │ ├── bfmla.s.cs
│ │ │ ├── bfmlal.s.cs
│ │ │ ├── bfmls.s.cs
│ │ │ ├── bfmlsl.s.cs
│ │ │ ├── bfmlslb.s.cs
│ │ │ ├── bfmlslt.s.cs
│ │ │ ├── bfmopa.s.cs
│ │ │ ├── bfmops.s.cs
│ │ │ ├── bfmul.s.cs
│ │ │ ├── bfsub.s.cs
│ │ │ ├── bfvdot.s.cs
│ │ │ ├── bmopa.s.cs
│ │ │ ├── bmops.s.cs
│ │ │ ├── brbe.s.cs
│ │ │ ├── brbe.txt.cs
│ │ │ ├── case-insen-reg-names.s.cs
│ │ │ ├── cntp.s.cs
│ │ │ ├── colored.txt.cs
│ │ │ ├── cvt.s.cs
│ │ │ ├── dot-req.s.cs
│ │ │ ├── dot.s.cs
│ │ │ ├── dupq.s.cs
│ │ │ ├── eorqv.s.cs
│ │ │ ├── ete-sysregs.s.cs
│ │ │ ├── ete.txt.cs
│ │ │ ├── extq.s.cs
│ │ │ ├── fadd.s.cs
│ │ │ ├── faddqv.s.cs
│ │ │ ├── faminmax.s.cs
│ │ │ ├── fclamp.s.cs
│ │ │ ├── fcvt.s.cs
│ │ │ ├── fcvtl.s.cs
│ │ │ ├── fcvtn.s.cs
│ │ │ ├── fcvtzs.s.cs
│ │ │ ├── fcvtzu.s.cs
│ │ │ ├── fdot.s.cs
│ │ │ ├── fmax.s.cs
│ │ │ ├── fmaxnm.s.cs
│ │ │ ├── fmaxnmqv.s.cs
│ │ │ ├── fmaxqv.s.cs
│ │ │ ├── fmin.s.cs
│ │ │ ├── fminnm.s.cs
│ │ │ ├── fminnmqv.s.cs
│ │ │ ├── fminqv.s.cs
│ │ │ ├── fmla.s.cs
│ │ │ ├── fmlal.s.cs
│ │ │ ├── fmlall.s.cs
│ │ │ ├── fmls.s.cs
│ │ │ ├── fmlsl.s.cs
│ │ │ ├── fmopa.s.cs
│ │ │ ├── fmops.s.cs
│ │ │ ├── frinta.s.cs
│ │ │ ├── frintm.s.cs
│ │ │ ├── frintn.s.cs
│ │ │ ├── frintp.s.cs
│ │ │ ├── fscale.s.cs
│ │ │ ├── fsub.s.cs
│ │ │ ├── fullfp16-neg.txt.cs
│ │ │ ├── fullfp16-neon-neg.txt.cs
│ │ │ ├── fvdot.s.cs
│ │ │ ├── gicv3-regs.s.cs
│ │ │ ├── gicv3-regs.txt.cs
│ │ │ ├── ld1b.s.cs
│ │ │ ├── ld1d.s.cs
│ │ │ ├── ld1d_q.s.cs
│ │ │ ├── ld1h.s.cs
│ │ │ ├── ld1q.s.cs
│ │ │ ├── ld1w.s.cs
│ │ │ ├── ld1w_q.s.cs
│ │ │ ├── ld2q.s.cs
│ │ │ ├── ld3q.s.cs
│ │ │ ├── ld4q.s.cs
│ │ │ ├── ldnt1b.s.cs
│ │ │ ├── ldnt1d.s.cs
│ │ │ ├── ldnt1h.s.cs
│ │ │ ├── ldnt1w.s.cs
│ │ │ ├── ldp-offset-predictable.txt.cs
│ │ │ ├── ldp-postind.predictable.txt.cs
│ │ │ ├── ldp-preind.predictable.txt.cs
│ │ │ ├── ldr.s.cs
│ │ │ ├── lut.s.cs
│ │ │ ├── luti2.s.cs
│ │ │ ├── luti4.s.cs
│ │ │ ├── marked-up.txt.cs
│ │ │ ├── mattr-all.txt.cs
│ │ │ ├── mla.s.cs
│ │ │ ├── mopa.s.cs
│ │ │ ├── mova.s.cs
│ │ │ ├── movaz.s.cs
│ │ │ ├── movt.s.cs
│ │ │ ├── neon-2velem.s.cs
│ │ │ ├── neon-3vdiff.s.cs
│ │ │ ├── neon-aba-abd.s.cs
│ │ │ ├── neon-across.s.cs
│ │ │ ├── neon-add-pairwise.s.cs
│ │ │ ├── neon-add-sub-instructions.s.cs
│ │ │ ├── neon-bitwise-instructions.s.cs
│ │ │ ├── neon-compare-instructions.s.cs
│ │ │ ├── neon-crypto.s.cs
│ │ │ ├── neon-extract.s.cs
│ │ │ ├── neon-facge-facgt.s.cs
│ │ │ ├── neon-frsqrt-frecp.s.cs
│ │ │ ├── neon-halving-add-sub.s.cs
│ │ │ ├── neon-instructions.txt.cs
│ │ │ ├── neon-max-min-pairwise.s.cs
│ │ │ ├── neon-max-min.s.cs
│ │ │ ├── neon-mla-mls-instructions.s.cs
│ │ │ ├── neon-mov.s.cs
│ │ │ ├── neon-mul-div-instructions.s.cs
│ │ │ ├── neon-perm.s.cs
│ │ │ ├── neon-rounding-halving-add.s.cs
│ │ │ ├── neon-rounding-shift.s.cs
│ │ │ ├── neon-saturating-add-sub.s.cs
│ │ │ ├── neon-saturating-rounding-shift.s.cs
│ │ │ ├── neon-saturating-shift.s.cs
│ │ │ ├── neon-scalar-abs.s.cs
│ │ │ ├── neon-scalar-add-sub.s.cs
│ │ │ ├── neon-scalar-by-elem-mla.s.cs
│ │ │ ├── neon-scalar-by-elem-mul.s.cs
│ │ │ ├── neon-scalar-by-elem-saturating-mla.s.cs
│ │ │ ├── neon-scalar-by-elem-saturating-mul.s.cs
│ │ │ ├── neon-scalar-compare.s.cs
│ │ │ ├── neon-scalar-cvt.s.cs
│ │ │ ├── neon-scalar-dup.s.cs
│ │ │ ├── neon-scalar-extract-narrow.s.cs
│ │ │ ├── neon-scalar-fp-compare.s.cs
│ │ │ ├── neon-scalar-mul.s.cs
│ │ │ ├── neon-scalar-neg.s.cs
│ │ │ ├── neon-scalar-recip.s.cs
│ │ │ ├── neon-scalar-reduce-pairwise.s.cs
│ │ │ ├── neon-scalar-rounding-shift.s.cs
│ │ │ ├── neon-scalar-saturating-add-sub.s.cs
│ │ │ ├── neon-scalar-saturating-rounding-shift.s.cs
│ │ │ ├── neon-scalar-saturating-shift.s.cs
│ │ │ ├── neon-scalar-shift-imm.s.cs
│ │ │ ├── neon-scalar-shift.s.cs
│ │ │ ├── neon-shift-left-long.s.cs
│ │ │ ├── neon-shift.s.cs
│ │ │ ├── neon-simd-copy.s.cs
│ │ │ ├── neon-simd-ldst-multi-elem.s.cs
│ │ │ ├── neon-simd-ldst-one-elem.s.cs
│ │ │ ├── neon-simd-misc.s.cs
│ │ │ ├── neon-simd-post-ldst-multi-elem.s.cs
│ │ │ ├── neon-simd-shift.s.cs
│ │ │ ├── neon-sxtl.s.cs
│ │ │ ├── neon-tbl.s.cs
│ │ │ ├── neon-uxtl.s.cs
│ │ │ ├── orqv.s.cs
│ │ │ ├── pext.s.cs
│ │ │ ├── pmov.s.cs
│ │ │ ├── ptrue.s.cs
│ │ │ ├── ras-extension.s.cs
│ │ │ ├── ras-extension.txt.cs
│ │ │ ├── rprfm.s.cs
│ │ │ ├── sclamp.s.cs
│ │ │ ├── scvtf.s.cs
│ │ │ ├── sdot.s.cs
│ │ │ ├── sel.s.cs
│ │ │ ├── smax.s.cs
│ │ │ ├── smaxqv.s.cs
│ │ │ ├── smin.s.cs
│ │ │ ├── sminqv.s.cs
│ │ │ ├── smlal.s.cs
│ │ │ ├── smlall.s.cs
│ │ │ ├── smlsl.s.cs
│ │ │ ├── smlsll.s.cs
│ │ │ ├── smopa.s.cs
│ │ │ ├── smops.s.cs
│ │ │ ├── spe.s.cs
│ │ │ ├── speculation-barriers.s.cs
│ │ │ ├── speculation-barriers.txt.cs
│ │ │ ├── sqcvt.s.cs
│ │ │ ├── sqcvtn.s.cs
│ │ │ ├── sqcvtu.s.cs
│ │ │ ├── sqcvtun.s.cs
│ │ │ ├── sqdmulh.s.cs
│ │ │ ├── sqrshr.s.cs
│ │ │ ├── sqrshrn.s.cs
│ │ │ ├── sqrshru.s.cs
│ │ │ ├── sqrshrun.s.cs
│ │ │ ├── srshl.s.cs
│ │ │ ├── st1b.s.cs
│ │ │ ├── st1d.s.cs
│ │ │ ├── st1d_q.s.cs
│ │ │ ├── st1h.s.cs
│ │ │ ├── st1q.s.cs
│ │ │ ├── st1w.s.cs
│ │ │ ├── st1w_q.s.cs
│ │ │ ├── st2q.s.cs
│ │ │ ├── st3q.s.cs
│ │ │ ├── st4q.s.cs
│ │ │ ├── stnt1b.s.cs
│ │ │ ├── stnt1d.s.cs
│ │ │ ├── stnt1h.s.cs
│ │ │ ├── stnt1w.s.cs
│ │ │ ├── str.s.cs
│ │ │ ├── sub.s.cs
│ │ │ ├── sudot.s.cs
│ │ │ ├── sumlall.s.cs
│ │ │ ├── sunpk.s.cs
│ │ │ ├── suvdot.s.cs
│ │ │ ├── svdot.s.cs
│ │ │ ├── tblq.s.cs
│ │ │ ├── tbxq.s.cs
│ │ │ ├── tls-relocs.s.cs
│ │ │ ├── tme.s.cs
│ │ │ ├── tme.txt.cs
│ │ │ ├── trace-regs.s.cs
│ │ │ ├── trace-regs.txt.cs
│ │ │ ├── trbe-sysreg.s.cs
│ │ │ ├── trbe.txt.cs
│ │ │ ├── uclamp.s.cs
│ │ │ ├── ucvtf.s.cs
│ │ │ ├── udf.s.cs
│ │ │ ├── udf.txt.cs
│ │ │ ├── udot.s.cs
│ │ │ ├── umax.s.cs
│ │ │ ├── umaxqv.s.cs
│ │ │ ├── umin.s.cs
│ │ │ ├── uminqv.s.cs
│ │ │ ├── umlal.s.cs
│ │ │ ├── umlall.s.cs
│ │ │ ├── umlsl.s.cs
│ │ │ ├── umlsll.s.cs
│ │ │ ├── umopa.s.cs
│ │ │ ├── umops.s.cs
│ │ │ ├── uqcvt.s.cs
│ │ │ ├── uqcvtn.s.cs
│ │ │ ├── uqrshr.s.cs
│ │ │ ├── uqrshrn.s.cs
│ │ │ ├── urshl.s.cs
│ │ │ ├── usdot.s.cs
│ │ │ ├── usmlall.s.cs
│ │ │ ├── usvdot.s.cs
│ │ │ ├── uunpk.s.cs
│ │ │ ├── uvdot.s.cs
│ │ │ ├── uzp.s.cs
│ │ │ ├── uzpq1.s.cs
│ │ │ ├── uzpq2.s.cs
│ │ │ ├── whilege.s.cs
│ │ │ ├── whilegt.s.cs
│ │ │ ├── whilehi.s.cs
│ │ │ ├── whilehs.s.cs
│ │ │ ├── whilele.s.cs
│ │ │ ├── whilelo.s.cs
│ │ │ ├── whilels.s.cs
│ │ │ ├── whilelt.s.cs
│ │ │ ├── zero.s.cs
│ │ │ ├── zip.s.cs
│ │ │ ├── zipq1.s.cs
│ │ │ └── zipq2.s.cs
│ │ ├── ARC/
│ │ │ ├── alu_arc.s.cs
│ │ │ ├── br_arc.s.cs
│ │ │ ├── compact_arc.s.cs
│ │ │ ├── ldst_arc.s.cs
│ │ │ └── misc_arc.c.cs
│ │ ├── ARM/
│ │ │ ├── arm-aliases.s.cs
│ │ │ ├── arm-arithmetic-aliases.s.cs
│ │ │ ├── arm-branches.s.cs
│ │ │ ├── arm-it-block.s.cs
│ │ │ ├── arm-memory-instructions.s.cs
│ │ │ ├── arm-shift-encoding.s.cs
│ │ │ ├── arm-thumb-trustzone.s.cs
│ │ │ ├── arm-trustzone.s.cs
│ │ │ ├── arm_addrmode2.s.cs
│ │ │ ├── arm_addrmode3.s.cs
│ │ │ ├── arm_instructions.s.cs
│ │ │ ├── armv8.1m-pacbti.s.cs
│ │ │ ├── armv8.2a-dotprod-a32.s.cs
│ │ │ ├── armv8.2a-dotprod-t32.s.cs
│ │ │ ├── armv8.5a-sb.s.cs
│ │ │ ├── armv8a-fpmul.s.cs
│ │ │ ├── basic-arm-instructions-v8.s.cs
│ │ │ ├── basic-arm-instructions.s.cs
│ │ │ ├── basic-thumb-instructions.s.cs
│ │ │ ├── basic-thumb2-instructions-v8.s.cs
│ │ │ ├── basic-thumb2-instructions.s.cs
│ │ │ ├── bfloat16-a32.s.cs
│ │ │ ├── bfloat16-t32.s.cs
│ │ │ ├── cde-integer.s.cs
│ │ │ ├── cde-vec-pred.s.cs
│ │ │ ├── clrm-asm.s.cs
│ │ │ ├── cps.s.cs
│ │ │ ├── crc32-thumb.s.cs
│ │ │ ├── crc32.s.cs
│ │ │ ├── dot-req.s.cs
│ │ │ ├── fconst.s.cs
│ │ │ ├── fp-armv8.s.cs
│ │ │ ├── fpv8.s.cs
│ │ │ ├── gas-compl-copr-reg.s.cs
│ │ │ ├── idiv-thumb.s.cs
│ │ │ ├── idiv.s.cs
│ │ │ ├── implicit-it-generation.s.cs
│ │ │ ├── ldrd-strd-gnu-arm.s.cs
│ │ │ ├── ldrd-strd-gnu-thumb.s.cs
│ │ │ ├── load-store-acquire-release-v8-thumb.s.cs
│ │ │ ├── load-store-acquire-release-v8.s.cs
│ │ │ ├── mve-bitops.s.cs
│ │ │ ├── mve-float.s.cs
│ │ │ ├── mve-integer.s.cs
│ │ │ ├── mve-interleave.s.cs
│ │ │ ├── mve-load-store.s.cs
│ │ │ ├── mve-minmax.s.cs
│ │ │ ├── mve-misc.s.cs
│ │ │ ├── mve-qdest-qsrc.s.cs
│ │ │ ├── mve-qdest-rsrc.s.cs
│ │ │ ├── mve-reductions-fp.s.cs
│ │ │ ├── mve-reductions.s.cs
│ │ │ ├── mve-scalar-shift.s.cs
│ │ │ ├── mve-shifts.s.cs
│ │ │ ├── mve-vcmp.s.cs
│ │ │ ├── mve-vmov-pair.s.cs
│ │ │ ├── mve-vpt.s.cs
│ │ │ ├── negative-immediates.s.cs
│ │ │ ├── neon-abs-encoding.s.cs
│ │ │ ├── neon-absdiff-encoding.s.cs
│ │ │ ├── neon-add-encoding.s.cs
│ │ │ ├── neon-bitcount-encoding.s.cs
│ │ │ ├── neon-bitwise-encoding.s.cs
│ │ │ ├── neon-cmp-encoding.s.cs
│ │ │ ├── neon-convert-encoding.s.cs
│ │ │ ├── neon-crypto.s.cs
│ │ │ ├── neon-dup-encoding.s.cs
│ │ │ ├── neon-minmax-encoding.s.cs
│ │ │ ├── neon-mov-encoding.s.cs
│ │ │ ├── neon-mul-accum-encoding.s.cs
│ │ │ ├── neon-mul-encoding.s.cs
│ │ │ ├── neon-neg-encoding.s.cs
│ │ │ ├── neon-pairwise-encoding.s.cs
│ │ │ ├── neon-reciprocal-encoding.s.cs
│ │ │ ├── neon-reverse-encoding.s.cs
│ │ │ ├── neon-satshift-encoding.s.cs
│ │ │ ├── neon-shift-encoding.s.cs
│ │ │ ├── neon-shiftaccum-encoding.s.cs
│ │ │ ├── neon-shuffle-encoding.s.cs
│ │ │ ├── neon-sub-encoding.s.cs
│ │ │ ├── neon-table-encoding.s.cs
│ │ │ ├── neon-v8.s.cs
│ │ │ ├── neon-vld-encoding.s.cs
│ │ │ ├── neon-vld-vst-align.s.cs
│ │ │ ├── neon-vst-encoding.s.cs
│ │ │ ├── neon-vswp.s.cs
│ │ │ ├── neont2-abs-encoding.s.cs
│ │ │ ├── neont2-absdiff-encoding.s.cs
│ │ │ ├── neont2-add-encoding.s.cs
│ │ │ ├── neont2-bitcount-encoding.s.cs
│ │ │ ├── neont2-bitwise-encoding.s.cs
│ │ │ ├── neont2-cmp-encoding.s.cs
│ │ │ ├── neont2-convert-encoding.s.cs
│ │ │ ├── neont2-dup-encoding.s.cs
│ │ │ ├── neont2-minmax-encoding.s.cs
│ │ │ ├── neont2-mov-encoding.s.cs
│ │ │ ├── neont2-mul-accum-encoding.s.cs
│ │ │ ├── neont2-mul-encoding.s.cs
│ │ │ ├── neont2-neg-encoding.s.cs
│ │ │ ├── neont2-pairwise-encoding.s.cs
│ │ │ ├── neont2-reciprocal-encoding.s.cs
│ │ │ ├── neont2-reverse-encoding.s.cs
│ │ │ ├── neont2-satshift-encoding.s.cs
│ │ │ ├── neont2-shift-encoding.s.cs
│ │ │ ├── neont2-shiftaccum-encoding.s.cs
│ │ │ ├── neont2-shuffle-encoding.s.cs
│ │ │ ├── neont2-sub-encoding.s.cs
│ │ │ ├── neont2-table-encoding.s.cs
│ │ │ ├── neont2-vld-encoding.s.cs
│ │ │ ├── neont2-vst-encoding.s.cs
│ │ │ ├── simple-fp-encoding.s.cs
│ │ │ ├── thumb-add-sub-width.s.cs
│ │ │ ├── thumb-fp-armv8.s.cs
│ │ │ ├── thumb-hints.s.cs
│ │ │ ├── thumb-mov.s.cs
│ │ │ ├── thumb-neon-crypto.s.cs
│ │ │ ├── thumb-neon-v8.s.cs
│ │ │ ├── thumb-shift-encoding.s.cs
│ │ │ ├── thumb.s.cs
│ │ │ ├── thumb2-b.w-encodingT4.s.cs
│ │ │ ├── thumb2-branches.s.cs
│ │ │ ├── thumb2-bxj-v8.s.cs
│ │ │ ├── thumb2-bxj.s.cs
│ │ │ ├── thumb2-ldr.w-str.w.s.cs
│ │ │ ├── thumb2-ldrexd-strexd.s.cs
│ │ │ ├── thumb2-mclass.s.cs
│ │ │ ├── thumb2-narrow-dp.ll.cs
│ │ │ ├── thumb2-pldw.s.cs
│ │ │ ├── thumb_rewrites.s.cs
│ │ │ ├── thumbv7em.s.cs
│ │ │ ├── thumbv7m.s.cs
│ │ │ ├── thumbv8.1m-vmrs-vmsr.s.cs
│ │ │ ├── thumbv8.1m.s.cs
│ │ │ ├── thumbv8m.s.cs
│ │ │ ├── udf-arm.s.cs
│ │ │ ├── udf-thumb-2.s.cs
│ │ │ ├── udf-thumb.s.cs
│ │ │ ├── vfp4-thumb.s.cs
│ │ │ ├── vfp4.s.cs
│ │ │ ├── vmov-vmvn-replicate.s.cs
│ │ │ ├── vmovhr.s.cs
│ │ │ ├── vpush-vpop-thumb.s.cs
│ │ │ ├── vpush-vpop.s.cs
│ │ │ ├── vscclrm-asm.s.cs
│ │ │ └── vstrldr_sys.s.cs
│ │ ├── Alpha/
│ │ │ ├── insn-alpha-be.s.cs
│ │ │ └── insn-alpha.s.cs
│ │ ├── BPF/
│ │ │ ├── classic-all.cs
│ │ │ ├── classic-be.cs
│ │ │ ├── extended-all.cs
│ │ │ └── extended-be.cs
│ │ ├── HPPA/
│ │ │ ├── alu11.s.cs
│ │ │ ├── arith_imm11.s.cs
│ │ │ ├── assist20.s.cs
│ │ │ ├── branch11.s.cs
│ │ │ ├── branch20.s.cs
│ │ │ ├── computation20.s.cs
│ │ │ ├── copr_dw11.s.cs
│ │ │ ├── float11.s.cs
│ │ │ ├── float20.s.cs
│ │ │ ├── index_mem11.s.cs
│ │ │ ├── longimm20.s.cs
│ │ │ ├── mem_mgmt11.s.cs
│ │ │ ├── memory_reference20.s.cs
│ │ │ ├── multimedia20.s.cs
│ │ │ ├── no_grp11.s.cs
│ │ │ ├── sfu11.s.cs
│ │ │ ├── shexdep11.s.cs
│ │ │ ├── sysctrl20.s.cs
│ │ │ └── system_op11.s.cs
│ │ ├── LoongArch/
│ │ │ ├── absd.s.cs
│ │ │ ├── add.s.cs
│ │ │ ├── adda.s.cs
│ │ │ ├── addi.s.cs
│ │ │ ├── addw.s.cs
│ │ │ ├── and.s.cs
│ │ │ ├── andi.s.cs
│ │ │ ├── andn.s.cs
│ │ │ ├── arith.s.cs
│ │ │ ├── arm-alu.s.cs
│ │ │ ├── arm-jump.s.cs
│ │ │ ├── arm-mov.s.cs
│ │ │ ├── arm-shift.s.cs
│ │ │ ├── atomic.s.cs
│ │ │ ├── avg.s.cs
│ │ │ ├── avgr.s.cs
│ │ │ ├── barrier.s.cs
│ │ │ ├── base.s.cs
│ │ │ ├── bit-manipu.s.cs
│ │ │ ├── bit-shift.s.cs
│ │ │ ├── bitclr.s.cs
│ │ │ ├── bitrev.s.cs
│ │ │ ├── bitsel.s.cs
│ │ │ ├── bitseli.s.cs
│ │ │ ├── bitset.s.cs
│ │ │ ├── bound-check.s.cs
│ │ │ ├── branch.s.cs
│ │ │ ├── bsll.s.cs
│ │ │ ├── bsrl.s.cs
│ │ │ ├── clo.s.cs
│ │ │ ├── clz.s.cs
│ │ │ ├── crc.s.cs
│ │ │ ├── d-arith.s.cs
│ │ │ ├── d-bound-check.s.cs
│ │ │ ├── d-branch.s.cs
│ │ │ ├── d-comp.s.cs
│ │ │ ├── d-conv.s.cs
│ │ │ ├── d-memory.s.cs
│ │ │ ├── d-move.s.cs
│ │ │ ├── div.s.cs
│ │ │ ├── ext2xv.s.cs
│ │ │ ├── exth.s.cs
│ │ │ ├── extl.s.cs
│ │ │ ├── extrins.s.cs
│ │ │ ├── f-arith.s.cs
│ │ │ ├── f-bound-check.s.cs
│ │ │ ├── f-branch.s.cs
│ │ │ ├── f-comp.s.cs
│ │ │ ├── f-conv.s.cs
│ │ │ ├── f-memory.s.cs
│ │ │ ├── f-move.s.cs
│ │ │ ├── fadd.s.cs
│ │ │ ├── fclass.s.cs
│ │ │ ├── fcmp.s.cs
│ │ │ ├── fcvt.s.cs
│ │ │ ├── fcvth.s.cs
│ │ │ ├── fcvtl.s.cs
│ │ │ ├── fdiv.s.cs
│ │ │ ├── ffint.s.cs
│ │ │ ├── flogb.s.cs
│ │ │ ├── fmadd.s.cs
│ │ │ ├── fmax.s.cs
│ │ │ ├── fmaxa.s.cs
│ │ │ ├── fmin.s.cs
│ │ │ ├── fmina.s.cs
│ │ │ ├── fmsub.s.cs
│ │ │ ├── fmul.s.cs
│ │ │ ├── fnmadd.s.cs
│ │ │ ├── fnmsub.s.cs
│ │ │ ├── frecip.s.cs
│ │ │ ├── frint.s.cs
│ │ │ ├── frsqrt.s.cs
│ │ │ ├── frstp.s.cs
│ │ │ ├── fsqrt.s.cs
│ │ │ ├── fsub.s.cs
│ │ │ ├── ftint.s.cs
│ │ │ ├── haddw.s.cs
│ │ │ ├── hsubw.s.cs
│ │ │ ├── ilv.s.cs
│ │ │ ├── insgr2vr.s.cs
│ │ │ ├── insve0.s.cs
│ │ │ ├── ld.s.cs
│ │ │ ├── ldrepl.s.cs
│ │ │ ├── lvz.s.cs
│ │ │ ├── madd.s.cs
│ │ │ ├── maddw.s.cs
│ │ │ ├── max.s.cs
│ │ │ ├── memory.s.cs
│ │ │ ├── min.s.cs
│ │ │ ├── misc.s.cs
│ │ │ ├── mod.s.cs
│ │ │ ├── mskgez.s.cs
│ │ │ ├── mskltz.s.cs
│ │ │ ├── msknz.s.cs
│ │ │ ├── msub.s.cs
│ │ │ ├── muh.s.cs
│ │ │ ├── mul.s.cs
│ │ │ ├── mulw.s.cs
│ │ │ ├── neg.s.cs
│ │ │ ├── nor.s.cs
│ │ │ ├── nori.s.cs
│ │ │ ├── or.s.cs
│ │ │ ├── ori.s.cs
│ │ │ ├── orn.s.cs
│ │ │ ├── pack.s.cs
│ │ │ ├── pcnt.s.cs
│ │ │ ├── perm.s.cs
│ │ │ ├── permi.s.cs
│ │ │ ├── pick.s.cs
│ │ │ ├── pickve.s.cs
│ │ │ ├── pickve2gr.s.cs
│ │ │ ├── pseudos.s.cs
│ │ │ ├── repl128vei.s.cs
│ │ │ ├── replgr2vr.s.cs
│ │ │ ├── replve.s.cs
│ │ │ ├── replve0.s.cs
│ │ │ ├── replvei.s.cs
│ │ │ ├── rotr.s.cs
│ │ │ ├── sadd.s.cs
│ │ │ ├── sat.s.cs
│ │ │ ├── scr.s.cs
│ │ │ ├── seq.s.cs
│ │ │ ├── set.s.cs
│ │ │ ├── setallnez.s.cs
│ │ │ ├── setanyeqz.s.cs
│ │ │ ├── shuf.s.cs
│ │ │ ├── shuf4i.s.cs
│ │ │ ├── signcov.s.cs
│ │ │ ├── sle.s.cs
│ │ │ ├── sll.s.cs
│ │ │ ├── sllwil.s.cs
│ │ │ ├── slt.s.cs
│ │ │ ├── sra.s.cs
│ │ │ ├── sran.s.cs
│ │ │ ├── srani.s.cs
│ │ │ ├── srar.s.cs
│ │ │ ├── srarn.s.cs
│ │ │ ├── srarni.s.cs
│ │ │ ├── srl.s.cs
│ │ │ ├── srln.s.cs
│ │ │ ├── srlni.s.cs
│ │ │ ├── srlr.s.cs
│ │ │ ├── srlrn.s.cs
│ │ │ ├── srlrni.s.cs
│ │ │ ├── ssran.s.cs
│ │ │ ├── ssrani.s.cs
│ │ │ ├── ssrarn.s.cs
│ │ │ ├── ssrarni.s.cs
│ │ │ ├── ssrln.s.cs
│ │ │ ├── ssrlni.s.cs
│ │ │ ├── ssrlrn.s.cs
│ │ │ ├── ssrlrni.s.cs
│ │ │ ├── ssub.s.cs
│ │ │ ├── st.s.cs
│ │ │ ├── stelm.s.cs
│ │ │ ├── sub.s.cs
│ │ │ ├── subi.s.cs
│ │ │ ├── subw.s.cs
│ │ │ ├── valid.s.cs
│ │ │ ├── x86-alu.s.cs
│ │ │ ├── x86-jump.s.cs
│ │ │ ├── x86-misc.s.cs
│ │ │ ├── x86-shift.s.cs
│ │ │ ├── xor.s.cs
│ │ │ └── xori.s.cs
│ │ ├── Mips/
│ │ │ ├── hilo-addressing.s.cs
│ │ │ ├── micromips-alu-instructions-EB.s.cs
│ │ │ ├── micromips-alu-instructions.s.cs
│ │ │ ├── micromips-branch-instructions-EB.s.cs
│ │ │ ├── micromips-branch-instructions.s.cs
│ │ │ ├── micromips-expansions.s.cs
│ │ │ ├── micromips-jump-instructions-EB.s.cs
│ │ │ ├── micromips-jump-instructions.s.cs
│ │ │ ├── micromips-loadstore-instructions-EB.s.cs
│ │ │ ├── micromips-loadstore-instructions.s.cs
│ │ │ ├── micromips-loadstore-unaligned-EB.s.cs
│ │ │ ├── micromips-loadstore-unaligned.s.cs
│ │ │ ├── micromips-movcond-instructions-EB.s.cs
│ │ │ ├── micromips-movcond-instructions.s.cs
│ │ │ ├── micromips-multiply-instructions-EB.s.cs
│ │ │ ├── micromips-multiply-instructions.s.cs
│ │ │ ├── micromips-shift-instructions-EB.s.cs
│ │ │ ├── micromips-shift-instructions.s.cs
│ │ │ ├── micromips-trap-instructions-EB.s.cs
│ │ │ ├── micromips-trap-instructions.s.cs
│ │ │ ├── mips-alu-instructions.s.cs
│ │ │ ├── mips-control-instructions-64.s.cs
│ │ │ ├── mips-control-instructions.s.cs
│ │ │ ├── mips-coprocessor-encodings.s.cs
│ │ │ ├── mips-dsp-instructions.s.cs
│ │ │ ├── mips-expansions.s.cs
│ │ │ ├── mips-fpu-instructions.s.cs
│ │ │ ├── mips-jump-instructions.s.cs
│ │ │ ├── mips-memory-instructions.s.cs
│ │ │ ├── mips-register-names.s.cs
│ │ │ ├── mips64-alu-instructions.s.cs
│ │ │ ├── mips64-instructions.s.cs
│ │ │ ├── mips64-register-names-n32-n64.s.cs
│ │ │ ├── mips64-register-names.s.cs
│ │ │ ├── mips_directives.s.cs
│ │ │ ├── nabi-regs.s.cs
│ │ │ ├── set-at-directive.s.cs
│ │ │ ├── test_2r.s.cs
│ │ │ ├── test_2rf.s.cs
│ │ │ ├── test_3r.s.cs
│ │ │ ├── test_3rf.s.cs
│ │ │ ├── test_bit.s.cs
│ │ │ ├── test_cbranch.s.cs
│ │ │ ├── test_ctrlregs.s.cs
│ │ │ ├── test_elm.s.cs
│ │ │ ├── test_elm_insert.s.cs
│ │ │ ├── test_elm_insve.s.cs
│ │ │ ├── test_i10.s.cs
│ │ │ ├── test_i5.s.cs
│ │ │ ├── test_i8.s.cs
│ │ │ ├── test_lsa.s.cs
│ │ │ ├── test_mi10.s.cs
│ │ │ └── test_vec.s.cs
│ │ ├── PowerPC/
│ │ │ ├── ppc64-encoding-bookII.s.cs
│ │ │ ├── ppc64-encoding-bookIII.s.cs
│ │ │ ├── ppc64-encoding-ext.s.cs
│ │ │ ├── ppc64-encoding-fp.s.cs
│ │ │ ├── ppc64-encoding-vmx.s.cs
│ │ │ ├── ppc64-encoding.s.cs
│ │ │ ├── ppc64-operands.s.cs
│ │ │ └── qpx.s.cs
│ │ ├── README.md
│ │ ├── RISCV/
│ │ │ ├── XCValu_valid_riscv32_riscv_xcvalu_syntax_no_alias_text.txt.cs
│ │ │ ├── XCVbi_riscv32_riscv_xcvbi.txt.cs
│ │ │ ├── XCVbitmanip_riscv32_riscv_xcvbitmanip.txt.cs
│ │ │ ├── XCVelw_valid_riscv32_riscv_xcvelw.txt.cs
│ │ │ ├── XCVmac_valid_riscv32_riscv_xcvmac_syntax_no_alias_text.txt.cs
│ │ │ ├── XCVmem_valid_riscv32_riscv_xcvmem.txt.cs
│ │ │ ├── XCVsimd_riscv32_riscv_xcvsimd.txt.cs
│ │ │ ├── XTHeadBa_valid_riscv32_riscv_xtheadba.txt.cs
│ │ │ ├── XTHeadVdot_valid_riscv64_riscv_xtheadvdot.txt.cs
│ │ │ ├── XVentanaCondOps_valid_riscv64_xventanacondops_syntax_no_alias_text.txt.cs
│ │ │ ├── Zawrs_valid_riscv32_zawrs_syntax_no_alias_text.txt.cs
│ │ │ ├── add_riscv64_riscv_v.txt.cs
│ │ │ ├── and_riscv64_riscv_v.txt.cs
│ │ │ ├── clip_riscv64_riscv_v.txt.cs
│ │ │ ├── compare_riscv64_riscv_v.txt.cs
│ │ │ ├── compress_cjal_riscv32_riscv_c.txt.cs
│ │ │ ├── compress_rv32d_riscv32_riscv_c_riscv_d.txt.cs
│ │ │ ├── compress_rv32f_riscv32_riscv_c_riscv_f.txt.cs
│ │ │ ├── compress_rv32i_riscv32_riscv_c.txt.cs
│ │ │ ├── compress_rv64i_riscv64_riscv_c.txt.cs
│ │ │ ├── compressed_zicfiss_riscv32_riscv_experimental_zicfiss__experimental_zcmop_syntax_no_alias_text.txt.cs
│ │ │ ├── convert_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── debug_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── deprecated_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── div_riscv64_riscv_v.txt.cs
│ │ │ ├── ext_riscv64_riscv_v.txt.cs
│ │ │ ├── fadd_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fcompare_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fdiv_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fixups_compressed_riscv32_riscv_c.txt.cs
│ │ │ ├── fixups_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── fmacc_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fminmax_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fmul_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fmv_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── fothers_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── freduction_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── fsub_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── insn-riscv32.s.cs
│ │ │ ├── insn-riscv64.s.cs
│ │ │ ├── load_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── macc_riscv64_riscv_v.txt.cs
│ │ │ ├── machine_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── mask_riscv64_riscv_v.txt.cs
│ │ │ ├── minmax_riscv64_riscv_v.txt.cs
│ │ │ ├── mul_riscv64_riscv_v.txt.cs
│ │ │ ├── mv_riscv64_riscv_v.txt.cs
│ │ │ ├── option_arch_riscv32.txt.cs
│ │ │ ├── option_rvc_riscv32.txt.cs
│ │ │ ├── or_riscv64_riscv_v.txt.cs
│ │ │ ├── others_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── print_imm_hex_riscv32_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── priv_valid_riscv32_svinval_syntax_no_alias_text.txt.cs
│ │ │ ├── reduction_riscv64_riscv_v.txt.cs
│ │ │ ├── rv32_hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_immediate_riscv32_riscv_v.txt.cs
│ │ │ ├── rv32_machine_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_supervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32_user_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32c_only_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32c_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32d_valid_riscv32_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32dc_valid_riscv32_riscv_c_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32e_valid_riscv32_riscv_e_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32f_valid_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32fc_valid_riscv32_riscv_c_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32i_only_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32i_valid_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32ih_aliases_valid_riscv32_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32ih_valid_riscv32_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32m_valid_riscv32_m_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32xtheadbs_valid_riscv32_riscv_xtheadbs.txt.cs
│ │ │ ├── rv32xtheadfmemidx_valid_riscv32_riscv_d_riscv_xtheadfmemidx.txt.cs
│ │ │ ├── rv32xtheadmac_valid_riscv32_riscv_xtheadmac.txt.cs
│ │ │ ├── rv32xtheadmemidx_valid_riscv32_riscv_xtheadmemidx.txt.cs
│ │ │ ├── rv32xtheadmempair_valid_riscv32_riscv_xtheadmempair.txt.cs
│ │ │ ├── rv32zaamo_valid_riscv32_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zacas_valid_riscv32_experimental_zacas_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zalrsc_valid_riscv32_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zba_valid_riscv32_riscv_zba.txt.cs
│ │ │ ├── rv32zbb_only_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zbb_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zbc_valid_riscv32_riscv_zbc.txt.cs
│ │ │ ├── rv32zbkb_only_valid_riscv32_riscv_zbkb.txt.cs
│ │ │ ├── rv32zbkb_valid_riscv32_riscv_zbkb.txt.cs
│ │ │ ├── rv32zbkc_valid_riscv32_riscv_zbkc.txt.cs
│ │ │ ├── rv32zbkx_valid_riscv32_riscv_zbkx.txt.cs
│ │ │ ├── rv32zbs_valid_riscv32_riscv_zbs.txt.cs
│ │ │ ├── rv32zcb_valid_riscv32_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zcmp_valid_riscv32_riscv_zcmp_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zcmt_valid_riscv32_riscv_zcmt_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zdinx_valid_riscv32_riscv_zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfa_only_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfbfmin_valid_riscv32_experimental_zfbfmin_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfh_valid_riscv32_zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfhmin_valid_riscv32_zfhmin_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zfinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zhinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zhinxmin_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zicbom_valid_riscv32_zicbom.txt.cs
│ │ │ ├── rv32zicbop_valid_riscv32_zicbop.txt.cs
│ │ │ ├── rv32zicboz_valid_riscv32_zicboz.txt.cs
│ │ │ ├── rv32zicond_valid_riscv32_zicond.txt.cs
│ │ │ ├── rv32zihintntl_valid_riscv32_zihintntl_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zihintntlc_valid_riscv32_zihintntl_riscv_c.txt.cs
│ │ │ ├── rv32zihintpause_valid_riscv32_zihintpause_syntax_no_alias_text.txt.cs
│ │ │ ├── rv32zknd_only_valid_riscv32_zknd.txt.cs
│ │ │ ├── rv32zkne_only_valid_riscv32_zkne.txt.cs
│ │ │ ├── rv32zknh_only_valid_riscv32_zknh.txt.cs
│ │ │ ├── rv32zknh_valid_riscv32_zknh.txt.cs
│ │ │ ├── rv32zksed_valid_riscv32_zksed.txt.cs
│ │ │ ├── rv32zksh_valid_riscv32_zksh.txt.cs
│ │ │ ├── rv64_machine_csr_names_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64_user_csr_names_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64c_hints_valid_riscv64_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64c_valid_riscv64_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64d_valid_riscv64_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64dc_valid_riscv64_riscv_c_riscv_d_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64e_valid_riscv64_riscv_e_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64f_valid_riscv64_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64i_valid_riscv64_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64ih_valid_riscv64_h_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64m_valid_riscv64_m_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64xtheadfmemidx_valid_riscv64_riscv_d_riscv_xtheadfmemidx.txt.cs
│ │ │ ├── rv64xtheadmac_valid_riscv64_riscv_xtheadmac.txt.cs
│ │ │ ├── rv64xtheadmemidx_valid_riscv64_riscv_xtheadmemidx.txt.cs
│ │ │ ├── rv64xtheadmempair_valid_riscv64_riscv_xtheadmempair.txt.cs
│ │ │ ├── rv64zaamo_valid_riscv64_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zacas_valid_riscv64_experimental_zacas_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zalrsc_valid_riscv64_riscv_a_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zba_valid_riscv64_riscv_zba.txt.cs
│ │ │ ├── rv64zbb_valid_riscv64_riscv_zbb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zbkb_valid_riscv64_riscv_zbkb.txt.cs
│ │ │ ├── rv64zcb_valid_riscv64_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zcmp_valid_riscv64_riscv_zcmp_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zdinx_valid_riscv64_riscv_zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zfh_valid_riscv64_zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zfinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zhinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zhinxmin_valid_riscv64_riscv_zfinx__zdinx_syntax_no_alias_text.txt.cs
│ │ │ ├── rv64zknd_only_valid_riscv64_zknd.txt.cs
│ │ │ ├── rv64zkne_only_valid_riscv64_zkne.txt.cs
│ │ │ ├── rv64zknh_only_valid_riscv64_zknh.txt.cs
│ │ │ ├── rvc_hints_valid_riscv32_riscv_c_syntax_no_alias_text.txt.cs
│ │ │ ├── rvf_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rvk_user_csr_name_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── rvv_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.cs
│ │ │ ├── rvzcmop_valid_riscv32_experimental_zcmop.txt.cs
│ │ │ ├── rvzcmt_user_csr_name_riscv32_riscv_zcmt_syntax_no_alias_text.txt.cs
│ │ │ ├── rvzimop_valid_riscv32_experimental_zimop.txt.cs
│ │ │ ├── shift_riscv64_riscv_v.txt.cs
│ │ │ ├── sign_injection_riscv64_riscv_v_riscv_f.txt.cs
│ │ │ ├── store_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ │ ├── sub_riscv64_riscv_v.txt.cs
│ │ │ ├── supervisor_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── user_csr_names_riscv32_syntax_no_alias_text.txt.cs
│ │ │ ├── vsetvl_riscv64_riscv_v.txt.cs
│ │ │ ├── xor_riscv64_riscv_v.txt.cs
│ │ │ ├── xsfvcp_riscv32_riscv_v_riscv_xsfvcp.txt.cs
│ │ │ ├── xsfvfnrclip_riscv64_riscv_v_riscv_xsfvfnrclipxfqf.txt.cs
│ │ │ ├── xsfvfwmacc_riscv64_riscv_v_riscv_xsfvfwmaccqqq.txt.cs
│ │ │ ├── xsfvqmacc_riscv64_riscv_v_riscv_xsfvqmaccqoq_riscv_xsfvqmaccdod.txt.cs
│ │ │ ├── xtheadcmo_valid_riscv32_riscv_xtheadcmo.txt.cs
│ │ │ ├── xtheadcondmov_valid_riscv32_riscv_xtheadcondmov.txt.cs
│ │ │ ├── xtheadsync_valid_riscv32_riscv_xtheadsync.txt.cs
│ │ │ ├── zfa_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.cs
│ │ │ ├── zfa_zfhmin_zvfh_valid_riscv32_zfa__zfhmin__zvfh_syntax_no_alias_text.txt.cs
│ │ │ ├── zicfilp_valid_riscv32_experimental_zicfilp_syntax_no_alias_text.txt.cs
│ │ │ ├── zicfiss_valid_riscv32_riscv_a_riscv_experimental_zicfiss_syntax_no_alias_text.txt.cs
│ │ │ ├── zvbb_riscv32_zve32x_zvbb.txt.cs
│ │ │ ├── zvbc_riscv32_zve64x_zvbc.txt.cs
│ │ │ ├── zvfbfmin_riscv32_experimental_zvfbfmin.txt.cs
│ │ │ ├── zvfbfwma_riscv32_experimental_zvfbfwma.txt.cs
│ │ │ ├── zvkb_riscv32_zve32x_zvkb.txt.cs
│ │ │ ├── zvkg_riscv32_zve32x_zvkg.txt.cs
│ │ │ ├── zvkned_riscv32_zve32x_zvkned.txt.cs
│ │ │ ├── zvknh_riscv32_zve32x_zvknha.txt.cs
│ │ │ ├── zvksed_riscv32_zve32x_zvksed.txt.cs
│ │ │ ├── zvksh_riscv32_zve32x_zvksh.txt.cs
│ │ │ └── zvlsseg_riscv64_riscv_v_syntax_no_alias_text.txt.cs
│ │ ├── Sparc/
│ │ │ ├── sparc-alu-instructions.s.cs
│ │ │ ├── sparc-atomic-instructions.s.cs
│ │ │ ├── sparc-ctrl-instructions.s.cs
│ │ │ ├── sparc-fp-instructions.s.cs
│ │ │ ├── sparc-mem-instructions.s.cs
│ │ │ ├── sparc-vis.s.cs
│ │ │ ├── sparc64-alu-instructions.s.cs
│ │ │ ├── sparc64-ctrl-instructions.s.cs
│ │ │ ├── sparcv8-instructions.s.cs
│ │ │ └── sparcv9-instructions.s.cs
│ │ ├── SystemZ/
│ │ │ ├── insn-good-z196.s.cs
│ │ │ ├── insn-good.s.cs
│ │ │ └── regs-good.s.cs
│ │ ├── TriCore/
│ │ │ ├── ADC_Background_Scan_1_KIT_TC275_LK.s.cs
│ │ │ ├── ADC_Queued_Scan_1_KIT_TC397_TFT.s.cs
│ │ │ ├── J_Call_Loop.s.cs
│ │ │ ├── LoadStore.s.cs
│ │ │ ├── csfr.s.cs
│ │ │ ├── debug.s.cs
│ │ │ ├── extr_u.s.cs
│ │ │ ├── handwrite.s.cs
│ │ │ ├── iLLD_TC375_ADS_Bluetooth_RFCOMM.s.cs
│ │ │ ├── ldst_br_circ.s.cs
│ │ │ ├── rr_insn.s.cs
│ │ │ ├── tc110.s.cs
│ │ │ ├── tc120.s.cs
│ │ │ ├── tc130.s.cs
│ │ │ ├── tc131.s.cs
│ │ │ ├── tc160.s.cs
│ │ │ ├── tc161.s.cs
│ │ │ ├── tc162.s.cs
│ │ │ └── tc180.c.cs
│ │ ├── X86/
│ │ │ ├── 3DNow.s.cs
│ │ │ ├── address-size.s.cs
│ │ │ ├── avx512-encodings.s.cs
│ │ │ ├── intel-syntax-encoding.s.cs
│ │ │ ├── x86-32-avx.s.cs
│ │ │ ├── x86-32-fma3.s.cs
│ │ │ ├── x86-32-ms-inline-asm.s.cs
│ │ │ ├── x86_64-avx-clmul-encoding.s.cs
│ │ │ ├── x86_64-avx-encoding.s.cs
│ │ │ ├── x86_64-bmi-encoding.s.cs
│ │ │ ├── x86_64-encoding.s.cs
│ │ │ ├── x86_64-fma3-encoding.s.cs
│ │ │ ├── x86_64-fma4-encoding.s.cs
│ │ │ ├── x86_64-imm-widths.s.cs
│ │ │ ├── x86_64-rand-encoding.s.cs
│ │ │ ├── x86_64-rtm-encoding.s.cs
│ │ │ ├── x86_64-sse4a.s.cs
│ │ │ ├── x86_64-tbm-encoding.s.cs
│ │ │ └── x86_64-xop-encoding.s.cs
│ │ └── Xtensa/
│ │ ├── arith.s.cs
│ │ ├── branch.s.cs
│ │ ├── call-jump.s.cs
│ │ ├── memorder.s.cs
│ │ ├── memory.s.cs
│ │ ├── move.s.cs
│ │ ├── processor-control.s.cs
│ │ └── shift.s.cs
│ ├── README.md
│ ├── auto-sync/
│ │ ├── .gitignore
│ │ ├── ARCHITECTURE.md
│ │ ├── README.md
│ │ ├── RefactorGuide.md
│ │ ├── format_py.sh
│ │ ├── inc_patches/
│ │ │ └── ARM/
│ │ │ ├── 01_LDM_reg_lists_write_attribute.patch
│ │ │ ├── 02_vector_data_types.patch
│ │ │ ├── 03_vector_size.patch
│ │ │ └── 04_tPOP_reg_lists_write_attribute.patch
│ │ ├── intro.md
│ │ ├── pyproject.toml
│ │ ├── src/
│ │ │ └── autosync/
│ │ │ ├── ASUpdater.py
│ │ │ ├── HeaderPatcher.py
│ │ │ ├── Helper.py
│ │ │ ├── IncGenerator.py
│ │ │ ├── MCUpdater.py
│ │ │ ├── PathVarHandler.py
│ │ │ ├── Targets.py
│ │ │ ├── Tests/
│ │ │ │ ├── MCUpdaterTests/
│ │ │ │ │ ├── Disassembler/
│ │ │ │ │ │ ├── ARCH/
│ │ │ │ │ │ │ ├── test_a.txt
│ │ │ │ │ │ │ ├── test_b.txt
│ │ │ │ │ │ │ └── test_no_symbol.s.txt
│ │ │ │ │ │ └── SystemZ/
│ │ │ │ │ │ └── test_systemz_mapping.txt
│ │ │ │ │ ├── cps.s.cs
│ │ │ │ │ └── expected/
│ │ │ │ │ ├── fuzz/
│ │ │ │ │ │ ├── test_a.txt.cs
│ │ │ │ │ │ └── test_b.txt.cs
│ │ │ │ │ ├── merged/
│ │ │ │ │ │ ├── separated/
│ │ │ │ │ │ │ ├── test_a.txt.yaml
│ │ │ │ │ │ │ └── test_b.txt.yaml
│ │ │ │ │ │ └── unified/
│ │ │ │ │ │ ├── test_a.txt.yaml
│ │ │ │ │ │ └── test_b.txt.yaml
│ │ │ │ │ ├── mode_mapping/
│ │ │ │ │ │ └── test_systemz_mapping.txt.yaml
│ │ │ │ │ └── multi/
│ │ │ │ │ ├── separated/
│ │ │ │ │ │ ├── test_a_aarch64_v8a__fp_armv8.txt.yaml
│ │ │ │ │ │ ├── test_a_arm64_v8.2a.txt.yaml
│ │ │ │ │ │ └── test_b_arm64.txt.yaml
│ │ │ │ │ └── unified/
│ │ │ │ │ ├── test_a_aarch64_v8a__fp_armv8.txt.yaml
│ │ │ │ │ ├── test_a_arm64_v8.2a.txt.yaml
│ │ │ │ │ └── test_b_arm64.txt.yaml
│ │ │ │ ├── test_aarch64_header.h
│ │ │ │ ├── test_arm64_header.h
│ │ │ │ ├── test_header.h
│ │ │ │ ├── test_header_patcher.py
│ │ │ │ ├── test_include.inc
│ │ │ │ ├── test_mcupdater.py
│ │ │ │ ├── test_systemz_header.h
│ │ │ │ └── test_sysz_header.h
│ │ │ ├── cpptranslator/
│ │ │ │ ├── Configurator.py
│ │ │ │ ├── CppTranslator.py
│ │ │ │ ├── Differ.py
│ │ │ │ ├── README.md
│ │ │ │ ├── TemplateCollector.py
│ │ │ │ ├── Tests/
│ │ │ │ │ ├── Differ/
│ │ │ │ │ │ ├── expected/
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── new_src/
│ │ │ │ │ │ │ ├── diff_test_file.c
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── old_src/
│ │ │ │ │ │ │ ├── diff_test_file.c
│ │ │ │ │ │ │ ├── diff_test_file_patching_new.c
│ │ │ │ │ │ │ └── diff_test_file_patching_replace.c
│ │ │ │ │ │ ├── output/
│ │ │ │ │ │ │ └── README.md
│ │ │ │ │ │ └── test_arch_config.json
│ │ │ │ │ ├── Patches/
│ │ │ │ │ │ ├── template_src.c
│ │ │ │ │ │ └── test_arch_config.json
│ │ │ │ │ ├── test_differ.py
│ │ │ │ │ ├── test_patches.py
│ │ │ │ │ └── test_unit.py
│ │ │ │ ├── arch_config.json
│ │ │ │ ├── patches/
│ │ │ │ │ ├── AddCSDetail.py
│ │ │ │ │ ├── AddOperand.py
│ │ │ │ │ ├── Assert.py
│ │ │ │ │ ├── BadConditionCode.py
│ │ │ │ │ ├── BitCastStdArray.py
│ │ │ │ │ ├── CheckDecoderStatus.py
│ │ │ │ │ ├── ClassConstructorDef.py
│ │ │ │ │ ├── ClassesDef.py
│ │ │ │ │ ├── ConstMCInstParameter.py
│ │ │ │ │ ├── ConstMCOperand.py
│ │ │ │ │ ├── CppInitCast.py
│ │ │ │ │ ├── CreateOperand0.py
│ │ │ │ │ ├── CreateOperand1.py
│ │ │ │ │ ├── Data.py
│ │ │ │ │ ├── DeclarationInConditionClause.py
│ │ │ │ │ ├── DecodeInstruction.py
│ │ │ │ │ ├── DecoderCast.py
│ │ │ │ │ ├── DecoderParameter.py
│ │ │ │ │ ├── FallThrough.py
│ │ │ │ │ ├── FeatureBits.py
│ │ │ │ │ ├── FeatureBitsDecl.py
│ │ │ │ │ ├── FieldFromInstr.py
│ │ │ │ │ ├── GetNumOperands.py
│ │ │ │ │ ├── GetOpcode.py
│ │ │ │ │ ├── GetOperand.py
│ │ │ │ │ ├── GetOperandRegImm.py
│ │ │ │ │ ├── GetRegClass.py
│ │ │ │ │ ├── GetRegFromClass.py
│ │ │ │ │ ├── GetSubReg.py
│ │ │ │ │ ├── Helper.py
│ │ │ │ │ ├── Includes.py
│ │ │ │ │ ├── InlineToStaticInline.py
│ │ │ │ │ ├── IsOptionalDef.py
│ │ │ │ │ ├── IsPredicate.py
│ │ │ │ │ ├── IsRegImm.py
│ │ │ │ │ ├── LLVMFallThrough.py
│ │ │ │ │ ├── LLVM_DEBUG.py
│ │ │ │ │ ├── LLVMunreachable.py
│ │ │ │ │ ├── MethodToFunctions.py
│ │ │ │ │ ├── MethodTypeQualifier.py
│ │ │ │ │ ├── NamespaceAnon.py
│ │ │ │ │ ├── NamespaceArch.py
│ │ │ │ │ ├── NamespaceLLVM.py
│ │ │ │ │ ├── OutStreamParam.py
│ │ │ │ │ ├── Override.py
│ │ │ │ │ ├── Patch.py
│ │ │ │ │ ├── PredicateBlockFunctions.py
│ │ │ │ │ ├── PrintAnnotation.py
│ │ │ │ │ ├── PrintRegImmShift.py
│ │ │ │ │ ├── QualifiedIdentifier.py
│ │ │ │ │ ├── ReferencesDecl.py
│ │ │ │ │ ├── RegClassContains.py
│ │ │ │ │ ├── STIArgument.py
│ │ │ │ │ ├── STIFeatureBits.py
│ │ │ │ │ ├── STParameter.py
│ │ │ │ │ ├── SetOpcode.py
│ │ │ │ │ ├── SignExtend.py
│ │ │ │ │ ├── Size.py
│ │ │ │ │ ├── SizeAssignments.py
│ │ │ │ │ ├── StreamOperation.py
│ │ │ │ │ ├── TemplateDeclaration.py
│ │ │ │ │ ├── TemplateDefinition.py
│ │ │ │ │ ├── TemplateParamDecl.py
│ │ │ │ │ ├── TemplateRefs.py
│ │ │ │ │ ├── UseMarkup.py
│ │ │ │ │ ├── UsingDeclaration.py
│ │ │ │ │ └── isUInt.py
│ │ │ │ ├── saved_patches.json
│ │ │ │ └── tree_sitter_compatibility.py
│ │ │ ├── inc_gen.json
│ │ │ ├── lit_config/
│ │ │ │ ├── README.md
│ │ │ │ ├── lit.cfg.py
│ │ │ │ └── lit.site.cfg.py
│ │ │ ├── mcupdater.json
│ │ │ └── path_vars.json
│ │ └── vendor/
│ │ └── README.md
│ ├── cstest/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── include/
│ │ │ ├── helper.h
│ │ │ ├── test_case.h
│ │ │ ├── test_compare.h
│ │ │ ├── test_detail.h
│ │ │ ├── test_detail_aarch64.h
│ │ │ ├── test_detail_alpha.h
│ │ │ ├── test_detail_arc.h
│ │ │ ├── test_detail_arm.h
│ │ │ ├── test_detail_bpf.h
│ │ │ ├── test_detail_evm.h
│ │ │ ├── test_detail_hppa.h
│ │ │ ├── test_detail_loongarch.h
│ │ │ ├── test_detail_m680x.h
│ │ │ ├── test_detail_m68k.h
│ │ │ ├── test_detail_mips.h
│ │ │ ├── test_detail_mos65xx.h
│ │ │ ├── test_detail_ppc.h
│ │ │ ├── test_detail_riscv.h
│ │ │ ├── test_detail_sh.h
│ │ │ ├── test_detail_sparc.h
│ │ │ ├── test_detail_systemz.h
│ │ │ ├── test_detail_tms320c64x.h
│ │ │ ├── test_detail_tricore.h
│ │ │ ├── test_detail_wasm.h
│ │ │ ├── test_detail_x86.h
│ │ │ ├── test_detail_xcore.h
│ │ │ ├── test_detail_xtensa.h
│ │ │ ├── test_mapping.h
│ │ │ └── test_run.h
│ │ ├── src/
│ │ │ ├── cstest.c
│ │ │ ├── helper.c
│ │ │ ├── test_case.c
│ │ │ ├── test_detail.c
│ │ │ ├── test_detail_aarch64.c
│ │ │ ├── test_detail_alpha.c
│ │ │ ├── test_detail_arc.c
│ │ │ ├── test_detail_arm.c
│ │ │ ├── test_detail_bpf.c
│ │ │ ├── test_detail_evm.c
│ │ │ ├── test_detail_hppa.c
│ │ │ ├── test_detail_loongarch.c
│ │ │ ├── test_detail_m680x.c
│ │ │ ├── test_detail_m68k.c
│ │ │ ├── test_detail_mips.c
│ │ │ ├── test_detail_mos65xx.c
│ │ │ ├── test_detail_ppc.c
│ │ │ ├── test_detail_riscv.c
│ │ │ ├── test_detail_sh.c
│ │ │ ├── test_detail_sparc.c
│ │ │ ├── test_detail_systemz.c
│ │ │ ├── test_detail_tms320c64x.c
│ │ │ ├── test_detail_tricore.c
│ │ │ ├── test_detail_wasm.c
│ │ │ ├── test_detail_x86.c
│ │ │ ├── test_detail_xcore.c
│ │ │ ├── test_detail_xtensa.c
│ │ │ └── test_run.c
│ │ └── test/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── empty_test_file.yaml
│ │ ├── integration_tests.py
│ │ ├── invalid_cs_input.yaml
│ │ ├── invalid_test_file.yaml
│ │ ├── min_valid_test_file.yaml
│ │ ├── missing_madatory_field.yaml
│ │ ├── some_dir/
│ │ │ └── some_other_dir/
│ │ │ └── min_valid_test_file.yaml
│ │ └── src/
│ │ └── unit_tests.c
│ ├── fuzz/
│ │ ├── Makefile
│ │ ├── README.md
│ │ ├── driverbin.c
│ │ ├── drivermc.c
│ │ ├── fuzz_decode_platform.c
│ │ ├── fuzz_diff.c
│ │ ├── fuzz_disasm.c
│ │ ├── fuzz_disasm.options
│ │ ├── fuzz_harness.c
│ │ ├── fuzz_llvm.cpp
│ │ ├── onefile.c
│ │ ├── platform.c
│ │ └── platform.h
│ ├── fuzz.py
│ ├── run_clang_format.sh
│ ├── run_clang_tidy.sh
│ ├── run_invalid_cstool.sh
│ ├── run_tests.py
│ └── test_corpus3.py
├── tests/
│ ├── MC/
│ │ ├── AArch64/
│ │ │ ├── CSSC/
│ │ │ │ ├── abs_32.s.yaml
│ │ │ │ ├── abs_64.s.yaml
│ │ │ │ ├── cnt_32.s.yaml
│ │ │ │ ├── cnt_64.s.yaml
│ │ │ │ ├── ctz_32.s.yaml
│ │ │ │ ├── ctz_64.s.yaml
│ │ │ │ ├── smax_32_imm.s.yaml
│ │ │ │ ├── smax_32_reg.s.yaml
│ │ │ │ ├── smax_64_imm.s.yaml
│ │ │ │ ├── smax_64_reg.s.yaml
│ │ │ │ ├── smin_32_imm.s.yaml
│ │ │ │ ├── smin_32_reg.s.yaml
│ │ │ │ ├── smin_64_imm.s.yaml
│ │ │ │ ├── smin_64_reg.s.yaml
│ │ │ │ ├── umax_32_imm.s.yaml
│ │ │ │ ├── umax_32_reg.s.yaml
│ │ │ │ ├── umax_64_imm.s.yaml
│ │ │ │ ├── umax_64_reg.s.yaml
│ │ │ │ ├── umin_32_imm.s.yaml
│ │ │ │ ├── umin_32_reg.s.yaml
│ │ │ │ ├── umin_64_imm.s.yaml
│ │ │ │ └── umin_64_reg.s.yaml
│ │ │ ├── FP8/
│ │ │ │ ├── dot.s.yaml
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── miscellaneous-fp8.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ └── system-regs.s.yaml
│ │ │ ├── FP8_SME2/
│ │ │ │ ├── cvt.s.yaml
│ │ │ │ ├── dot.s.yaml
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── fscale.s.yaml
│ │ │ │ ├── lut.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mopa.s.yaml
│ │ │ │ └── movt.s.yaml
│ │ │ ├── FP8_SVE2/
│ │ │ │ ├── faminmax.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtn.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── fmlal.s.yaml
│ │ │ │ ├── fmlall.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ └── luti4.s.yaml
│ │ │ ├── SME/
│ │ │ │ ├── addha-u32.s.yaml
│ │ │ │ ├── addha-u64.s.yaml
│ │ │ │ ├── addspl.s.yaml
│ │ │ │ ├── addsvl.s.yaml
│ │ │ │ ├── addva-u32.s.yaml
│ │ │ │ ├── addva-u64.s.yaml
│ │ │ │ ├── bfmopa.s.yaml
│ │ │ │ ├── bfmops.s.yaml
│ │ │ │ ├── fa64-implies-sve2.s.yaml
│ │ │ │ ├── feature.s.yaml
│ │ │ │ ├── fmopa-fp64.s.yaml
│ │ │ │ ├── fmopa.s.yaml
│ │ │ │ ├── fmops-fp64.s.yaml
│ │ │ │ ├── fmops.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1q.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── mova.s.yaml
│ │ │ │ ├── psel.s.yaml
│ │ │ │ ├── rdsvl.s.yaml
│ │ │ │ ├── revd.s.yaml
│ │ │ │ ├── sclamp.s.yaml
│ │ │ │ ├── smopa-32.s.yaml
│ │ │ │ ├── smopa-64.s.yaml
│ │ │ │ ├── smops-32.s.yaml
│ │ │ │ ├── smops-64.s.yaml
│ │ │ │ ├── smstart.s.yaml
│ │ │ │ ├── smstop.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1q.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── streaming-mode-neon-bf16.s.yaml
│ │ │ │ ├── streaming-mode-neon-fp16.s.yaml
│ │ │ │ ├── streaming-mode-neon.s.yaml
│ │ │ │ ├── sumopa-32.s.yaml
│ │ │ │ ├── sumopa-64.s.yaml
│ │ │ │ ├── sumops-32.s.yaml
│ │ │ │ ├── sumops-64.s.yaml
│ │ │ │ ├── system-regs-mpam.s.yaml
│ │ │ │ ├── system-regs.s.yaml
│ │ │ │ ├── uclamp.s.yaml
│ │ │ │ ├── umopa-32.s.yaml
│ │ │ │ ├── umopa-64.s.yaml
│ │ │ │ ├── umops-32.s.yaml
│ │ │ │ ├── umops-64.s.yaml
│ │ │ │ ├── usmopa-32.s.yaml
│ │ │ │ ├── usmopa-64.s.yaml
│ │ │ │ ├── usmops-32.s.yaml
│ │ │ │ ├── usmops-64.s.yaml
│ │ │ │ └── zero.s.yaml
│ │ │ ├── SME2/
│ │ │ │ ├── add.s.yaml
│ │ │ │ ├── bfadd.s.yaml
│ │ │ │ ├── bfclamp.s.yaml
│ │ │ │ ├── bfcvt.s.yaml
│ │ │ │ ├── bfcvtn.s.yaml
│ │ │ │ ├── bfdot.s.yaml
│ │ │ │ ├── bfmax.s.yaml
│ │ │ │ ├── bfmaxnm.s.yaml
│ │ │ │ ├── bfmin.s.yaml
│ │ │ │ ├── bfminnm.s.yaml
│ │ │ │ ├── bfmla.s.yaml
│ │ │ │ ├── bfmlal.s.yaml
│ │ │ │ ├── bfmls.s.yaml
│ │ │ │ ├── bfmlsl.s.yaml
│ │ │ │ ├── bfmopa.s.yaml
│ │ │ │ ├── bfmops.s.yaml
│ │ │ │ ├── bfsub.s.yaml
│ │ │ │ ├── bfvdot.s.yaml
│ │ │ │ ├── bmopa.s.yaml
│ │ │ │ ├── bmops.s.yaml
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fclamp.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtn.s.yaml
│ │ │ │ ├── fcvtzs.s.yaml
│ │ │ │ ├── fcvtzu.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── feature-sme2-implies-sme.s.yaml
│ │ │ │ ├── fmax.s.yaml
│ │ │ │ ├── fmaxnm.s.yaml
│ │ │ │ ├── fmin.s.yaml
│ │ │ │ ├── fminnm.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmlal.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmlsl.s.yaml
│ │ │ │ ├── frinta.s.yaml
│ │ │ │ ├── frintm.s.yaml
│ │ │ │ ├── frintn.s.yaml
│ │ │ │ ├── frintp.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── fvdot.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── mova.s.yaml
│ │ │ │ ├── movt.s.yaml
│ │ │ │ ├── sclamp.s.yaml
│ │ │ │ ├── scvtf.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── sel.s.yaml
│ │ │ │ ├── smax.s.yaml
│ │ │ │ ├── smin.s.yaml
│ │ │ │ ├── smlal.s.yaml
│ │ │ │ ├── smlall.s.yaml
│ │ │ │ ├── smlsl.s.yaml
│ │ │ │ ├── smlsll.s.yaml
│ │ │ │ ├── smopa.s.yaml
│ │ │ │ ├── smops.s.yaml
│ │ │ │ ├── sqcvt.s.yaml
│ │ │ │ ├── sqcvtn.s.yaml
│ │ │ │ ├── sqcvtu.s.yaml
│ │ │ │ ├── sqcvtun.s.yaml
│ │ │ │ ├── sqdmulh.s.yaml
│ │ │ │ ├── sqrshr.s.yaml
│ │ │ │ ├── sqrshrn.s.yaml
│ │ │ │ ├── sqrshru.s.yaml
│ │ │ │ ├── sqrshrun.s.yaml
│ │ │ │ ├── srshl.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── sub.s.yaml
│ │ │ │ ├── sudot.s.yaml
│ │ │ │ ├── sumlall.s.yaml
│ │ │ │ ├── sunpk.s.yaml
│ │ │ │ ├── suvdot.s.yaml
│ │ │ │ ├── svdot.s.yaml
│ │ │ │ ├── uclamp.s.yaml
│ │ │ │ ├── ucvtf.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umax.s.yaml
│ │ │ │ ├── umin.s.yaml
│ │ │ │ ├── umlal.s.yaml
│ │ │ │ ├── umlall.s.yaml
│ │ │ │ ├── umlsl.s.yaml
│ │ │ │ ├── umlsll.s.yaml
│ │ │ │ ├── umopa.s.yaml
│ │ │ │ ├── umops.s.yaml
│ │ │ │ ├── uqcvt.s.yaml
│ │ │ │ ├── uqcvtn.s.yaml
│ │ │ │ ├── uqrshr.s.yaml
│ │ │ │ ├── uqrshrn.s.yaml
│ │ │ │ ├── urshl.s.yaml
│ │ │ │ ├── usdot.s.yaml
│ │ │ │ ├── usmlall.s.yaml
│ │ │ │ ├── usvdot.s.yaml
│ │ │ │ ├── uunpk.s.yaml
│ │ │ │ ├── uvdot.s.yaml
│ │ │ │ ├── uzp.s.yaml
│ │ │ │ ├── zero.s.yaml
│ │ │ │ └── zip.s.yaml
│ │ │ ├── SME2p1/
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtl.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmopa.s.yaml
│ │ │ │ ├── fmops.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── luti2.s.yaml
│ │ │ │ ├── luti4.s.yaml
│ │ │ │ ├── movaz.s.yaml
│ │ │ │ └── zero.s.yaml
│ │ │ ├── SVE/
│ │ │ │ ├── abs.s.yaml
│ │ │ │ ├── add.s.yaml
│ │ │ │ ├── addpl.s.yaml
│ │ │ │ ├── addvl.s.yaml
│ │ │ │ ├── adr.s.yaml
│ │ │ │ ├── and.s.yaml
│ │ │ │ ├── ands.s.yaml
│ │ │ │ ├── andv.s.yaml
│ │ │ │ ├── armv9.5a-cpa.s.yaml
│ │ │ │ ├── asr.s.yaml
│ │ │ │ ├── asrd.s.yaml
│ │ │ │ ├── asrr.s.yaml
│ │ │ │ ├── bfcvt.s.yaml
│ │ │ │ ├── bfcvtnt.s.yaml
│ │ │ │ ├── bfdot.s.yaml
│ │ │ │ ├── bfmlal.s.yaml
│ │ │ │ ├── bfmmla.s.yaml
│ │ │ │ ├── bic.s.yaml
│ │ │ │ ├── bics.s.yaml
│ │ │ │ ├── brka.s.yaml
│ │ │ │ ├── brkas.s.yaml
│ │ │ │ ├── brkb.s.yaml
│ │ │ │ ├── brkbs.s.yaml
│ │ │ │ ├── brkn.s.yaml
│ │ │ │ ├── brkns.s.yaml
│ │ │ │ ├── brkpa.s.yaml
│ │ │ │ ├── brkpas.s.yaml
│ │ │ │ ├── brkpb.s.yaml
│ │ │ │ ├── brkpbs.s.yaml
│ │ │ │ ├── clasta.s.yaml
│ │ │ │ ├── clastb.s.yaml
│ │ │ │ ├── cls.s.yaml
│ │ │ │ ├── clz.s.yaml
│ │ │ │ ├── cmpeq.s.yaml
│ │ │ │ ├── cmpge.s.yaml
│ │ │ │ ├── cmpgt.s.yaml
│ │ │ │ ├── cmphi.s.yaml
│ │ │ │ ├── cmphs.s.yaml
│ │ │ │ ├── cmple.s.yaml
│ │ │ │ ├── cmplo.s.yaml
│ │ │ │ ├── cmpls.s.yaml
│ │ │ │ ├── cmplt.s.yaml
│ │ │ │ ├── cmpne.s.yaml
│ │ │ │ ├── cnot.s.yaml
│ │ │ │ ├── cnt.s.yaml
│ │ │ │ ├── cntb.s.yaml
│ │ │ │ ├── cntd.s.yaml
│ │ │ │ ├── cnth.s.yaml
│ │ │ │ ├── cntp.s.yaml
│ │ │ │ ├── cntw.s.yaml
│ │ │ │ ├── compact.s.yaml
│ │ │ │ ├── cpy.s.yaml
│ │ │ │ ├── ctermeq.s.yaml
│ │ │ │ ├── ctermne.s.yaml
│ │ │ │ ├── decb.s.yaml
│ │ │ │ ├── decd.s.yaml
│ │ │ │ ├── dech.s.yaml
│ │ │ │ ├── decp.s.yaml
│ │ │ │ ├── decw.s.yaml
│ │ │ │ ├── dot-req.s.yaml
│ │ │ │ ├── dup.s.yaml
│ │ │ │ ├── dupm.s.yaml
│ │ │ │ ├── eon.s.yaml
│ │ │ │ ├── eor.s.yaml
│ │ │ │ ├── eors.s.yaml
│ │ │ │ ├── eorv.s.yaml
│ │ │ │ ├── ext.s.yaml
│ │ │ │ ├── fabd.s.yaml
│ │ │ │ ├── fabs.s.yaml
│ │ │ │ ├── facge.s.yaml
│ │ │ │ ├── facgt.s.yaml
│ │ │ │ ├── facle.s.yaml
│ │ │ │ ├── faclt.s.yaml
│ │ │ │ ├── fadd.s.yaml
│ │ │ │ ├── fadda.s.yaml
│ │ │ │ ├── faddv.s.yaml
│ │ │ │ ├── fcadd.s.yaml
│ │ │ │ ├── fcmeq.s.yaml
│ │ │ │ ├── fcmge.s.yaml
│ │ │ │ ├── fcmgt.s.yaml
│ │ │ │ ├── fcmla.s.yaml
│ │ │ │ ├── fcmle.s.yaml
│ │ │ │ ├── fcmlt.s.yaml
│ │ │ │ ├── fcmne.s.yaml
│ │ │ │ ├── fcmuo.s.yaml
│ │ │ │ ├── fcpy.s.yaml
│ │ │ │ ├── fcvt.s.yaml
│ │ │ │ ├── fcvtzs.s.yaml
│ │ │ │ ├── fcvtzu.s.yaml
│ │ │ │ ├── fdiv.s.yaml
│ │ │ │ ├── fdivr.s.yaml
│ │ │ │ ├── fdup.s.yaml
│ │ │ │ ├── fexpa.s.yaml
│ │ │ │ ├── fmad.s.yaml
│ │ │ │ ├── fmax.s.yaml
│ │ │ │ ├── fmaxnm.s.yaml
│ │ │ │ ├── fmaxnmv.s.yaml
│ │ │ │ ├── fmaxv.s.yaml
│ │ │ │ ├── fmin.s.yaml
│ │ │ │ ├── fminnm.s.yaml
│ │ │ │ ├── fminnmv.s.yaml
│ │ │ │ ├── fminv.s.yaml
│ │ │ │ ├── fmla.s.yaml
│ │ │ │ ├── fmls.s.yaml
│ │ │ │ ├── fmov.s.yaml
│ │ │ │ ├── fmsb.s.yaml
│ │ │ │ ├── fmul.s.yaml
│ │ │ │ ├── fmulx.s.yaml
│ │ │ │ ├── fneg.s.yaml
│ │ │ │ ├── fnmad.s.yaml
│ │ │ │ ├── fnmla.s.yaml
│ │ │ │ ├── fnmls.s.yaml
│ │ │ │ ├── fnmsb.s.yaml
│ │ │ │ ├── frecpe.s.yaml
│ │ │ │ ├── frecps.s.yaml
│ │ │ │ ├── frecpx.s.yaml
│ │ │ │ ├── frinta.s.yaml
│ │ │ │ ├── frinti.s.yaml
│ │ │ │ ├── frintm.s.yaml
│ │ │ │ ├── frintn.s.yaml
│ │ │ │ ├── frintp.s.yaml
│ │ │ │ ├── frintx.s.yaml
│ │ │ │ ├── frintz.s.yaml
│ │ │ │ ├── frsqrte.s.yaml
│ │ │ │ ├── frsqrts.s.yaml
│ │ │ │ ├── fscale.s.yaml
│ │ │ │ ├── fsqrt.s.yaml
│ │ │ │ ├── fsub.s.yaml
│ │ │ │ ├── fsubr.s.yaml
│ │ │ │ ├── ftmad.s.yaml
│ │ │ │ ├── ftsmul.s.yaml
│ │ │ │ ├── ftssel.s.yaml
│ │ │ │ ├── incb.s.yaml
│ │ │ │ ├── incd.s.yaml
│ │ │ │ ├── inch.s.yaml
│ │ │ │ ├── incp.s.yaml
│ │ │ │ ├── incw.s.yaml
│ │ │ │ ├── index.s.yaml
│ │ │ │ ├── insr.s.yaml
│ │ │ │ ├── lasta.s.yaml
│ │ │ │ ├── lastb.s.yaml
│ │ │ │ ├── ld1b-sve-only.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d-sve-only.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1h-sve-only.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1rb.s.yaml
│ │ │ │ ├── ld1rd.s.yaml
│ │ │ │ ├── ld1rh.s.yaml
│ │ │ │ ├── ld1rqb.s.yaml
│ │ │ │ ├── ld1rqd.s.yaml
│ │ │ │ ├── ld1rqh.s.yaml
│ │ │ │ ├── ld1rqw.s.yaml
│ │ │ │ ├── ld1rsb.s.yaml
│ │ │ │ ├── ld1rsh.s.yaml
│ │ │ │ ├── ld1rsw.s.yaml
│ │ │ │ ├── ld1rw.s.yaml
│ │ │ │ ├── ld1sb-sve-only.s.yaml
│ │ │ │ ├── ld1sb.s.yaml
│ │ │ │ ├── ld1sh-sve-only.s.yaml
│ │ │ │ ├── ld1sh.s.yaml
│ │ │ │ ├── ld1sw-sve-only.s.yaml
│ │ │ │ ├── ld1sw.s.yaml
│ │ │ │ ├── ld1w-sve-only.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ld2b.s.yaml
│ │ │ │ ├── ld2d.s.yaml
│ │ │ │ ├── ld2h.s.yaml
│ │ │ │ ├── ld2w.s.yaml
│ │ │ │ ├── ld3b.s.yaml
│ │ │ │ ├── ld3d.s.yaml
│ │ │ │ ├── ld3h.s.yaml
│ │ │ │ ├── ld3w.s.yaml
│ │ │ │ ├── ld4b.s.yaml
│ │ │ │ ├── ld4d.s.yaml
│ │ │ │ ├── ld4h.s.yaml
│ │ │ │ ├── ld4w.s.yaml
│ │ │ │ ├── ldff1b.s.yaml
│ │ │ │ ├── ldff1d.s.yaml
│ │ │ │ ├── ldff1h.s.yaml
│ │ │ │ ├── ldff1sb.s.yaml
│ │ │ │ ├── ldff1sh.s.yaml
│ │ │ │ ├── ldff1sw.s.yaml
│ │ │ │ ├── ldff1w.s.yaml
│ │ │ │ ├── ldnf1b.s.yaml
│ │ │ │ ├── ldnf1d.s.yaml
│ │ │ │ ├── ldnf1h.s.yaml
│ │ │ │ ├── ldnf1sb.s.yaml
│ │ │ │ ├── ldnf1sh.s.yaml
│ │ │ │ ├── ldnf1sw.s.yaml
│ │ │ │ ├── ldnf1w.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── ldr.s.yaml
│ │ │ │ ├── lsl.s.yaml
│ │ │ │ ├── lslr.s.yaml
│ │ │ │ ├── lsr.s.yaml
│ │ │ │ ├── lsrr.s.yaml
│ │ │ │ ├── mad.s.yaml
│ │ │ │ ├── matrix-multiply-fp32.s.yaml
│ │ │ │ ├── matrix-multiply-fp64.s.yaml
│ │ │ │ ├── matrix-multiply-int8.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mls.s.yaml
│ │ │ │ ├── mov.s.yaml
│ │ │ │ ├── movprfx.s.yaml
│ │ │ │ ├── movs.s.yaml
│ │ │ │ ├── msb.s.yaml
│ │ │ │ ├── mul.s.yaml
│ │ │ │ ├── nand.s.yaml
│ │ │ │ ├── nands.s.yaml
│ │ │ │ ├── neg.s.yaml
│ │ │ │ ├── nor.s.yaml
│ │ │ │ ├── nors.s.yaml
│ │ │ │ ├── not.s.yaml
│ │ │ │ ├── nots.s.yaml
│ │ │ │ ├── orn.s.yaml
│ │ │ │ ├── orns.s.yaml
│ │ │ │ ├── orr.s.yaml
│ │ │ │ ├── orrs.s.yaml
│ │ │ │ ├── orv.s.yaml
│ │ │ │ ├── pfalse.s.yaml
│ │ │ │ ├── pfirst.s.yaml
│ │ │ │ ├── pnext.s.yaml
│ │ │ │ ├── predicate-as-counter-aliases.s.yaml
│ │ │ │ ├── prfb-sve-only.s.yaml
│ │ │ │ ├── prfb.s.yaml
│ │ │ │ ├── prfd-sve-only.s.yaml
│ │ │ │ ├── prfd.s.yaml
│ │ │ │ ├── prfh-sve-only.s.yaml
│ │ │ │ ├── prfh.s.yaml
│ │ │ │ ├── prfw-sve-only.s.yaml
│ │ │ │ ├── prfw.s.yaml
│ │ │ │ ├── ptest.s.yaml
│ │ │ │ ├── ptrue.s.yaml
│ │ │ │ ├── ptrues.s.yaml
│ │ │ │ ├── punpkhi.s.yaml
│ │ │ │ ├── punpklo.s.yaml
│ │ │ │ ├── rbit.s.yaml
│ │ │ │ ├── rdffr.s.yaml
│ │ │ │ ├── rdffrs.s.yaml
│ │ │ │ ├── rdvl.s.yaml
│ │ │ │ ├── rev.s.yaml
│ │ │ │ ├── revb.s.yaml
│ │ │ │ ├── revh.s.yaml
│ │ │ │ ├── revw.s.yaml
│ │ │ │ ├── sabd.s.yaml
│ │ │ │ ├── saddv.s.yaml
│ │ │ │ ├── scvtf.s.yaml
│ │ │ │ ├── sdiv.s.yaml
│ │ │ │ ├── sdivr.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── sel.s.yaml
│ │ │ │ ├── setffr.s.yaml
│ │ │ │ ├── smax.s.yaml
│ │ │ │ ├── smaxv.s.yaml
│ │ │ │ ├── smin.s.yaml
│ │ │ │ ├── sminv.s.yaml
│ │ │ │ ├── smulh.s.yaml
│ │ │ │ ├── splice.s.yaml
│ │ │ │ ├── sqadd.s.yaml
│ │ │ │ ├── sqdecb.s.yaml
│ │ │ │ ├── sqdecd.s.yaml
│ │ │ │ ├── sqdech.s.yaml
│ │ │ │ ├── sqdecp.s.yaml
│ │ │ │ ├── sqdecw.s.yaml
│ │ │ │ ├── sqincb.s.yaml
│ │ │ │ ├── sqincd.s.yaml
│ │ │ │ ├── sqinch.s.yaml
│ │ │ │ ├── sqincp.s.yaml
│ │ │ │ ├── sqincw.s.yaml
│ │ │ │ ├── sqsub.s.yaml
│ │ │ │ ├── st1b-sve-only.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d-sve-only.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1h-sve-only.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1w-sve-only.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── st2b.s.yaml
│ │ │ │ ├── st2d.s.yaml
│ │ │ │ ├── st2h.s.yaml
│ │ │ │ ├── st2w.s.yaml
│ │ │ │ ├── st3b.s.yaml
│ │ │ │ ├── st3d.s.yaml
│ │ │ │ ├── st3h.s.yaml
│ │ │ │ ├── st3w.s.yaml
│ │ │ │ ├── st4b.s.yaml
│ │ │ │ ├── st4d.s.yaml
│ │ │ │ ├── st4h.s.yaml
│ │ │ │ ├── st4w.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── str.s.yaml
│ │ │ │ ├── sub.s.yaml
│ │ │ │ ├── subr.s.yaml
│ │ │ │ ├── sunpkhi.s.yaml
│ │ │ │ ├── sunpklo.s.yaml
│ │ │ │ ├── sxtb.s.yaml
│ │ │ │ ├── sxth.s.yaml
│ │ │ │ ├── sxtw.s.yaml
│ │ │ │ ├── system-regs.s.yaml
│ │ │ │ ├── tbl.s.yaml
│ │ │ │ ├── trn1.s.yaml
│ │ │ │ ├── trn2.s.yaml
│ │ │ │ ├── uabd.s.yaml
│ │ │ │ ├── uaddv.s.yaml
│ │ │ │ ├── ucvtf.s.yaml
│ │ │ │ ├── udiv.s.yaml
│ │ │ │ ├── udivr.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umax.s.yaml
│ │ │ │ ├── umaxv.s.yaml
│ │ │ │ ├── umin.s.yaml
│ │ │ │ ├── uminv.s.yaml
│ │ │ │ ├── umulh.s.yaml
│ │ │ │ ├── uqadd.s.yaml
│ │ │ │ ├── uqdecb.s.yaml
│ │ │ │ ├── uqdecd.s.yaml
│ │ │ │ ├── uqdech.s.yaml
│ │ │ │ ├── uqdecp.s.yaml
│ │ │ │ ├── uqdecw.s.yaml
│ │ │ │ ├── uqincb.s.yaml
│ │ │ │ ├── uqincd.s.yaml
│ │ │ │ ├── uqinch.s.yaml
│ │ │ │ ├── uqincp.s.yaml
│ │ │ │ ├── uqincw.s.yaml
│ │ │ │ ├── uqsub.s.yaml
│ │ │ │ ├── uunpkhi.s.yaml
│ │ │ │ ├── uunpklo.s.yaml
│ │ │ │ ├── uxtb.s.yaml
│ │ │ │ ├── uxth.s.yaml
│ │ │ │ ├── uxtw.s.yaml
│ │ │ │ ├── uzp1.s.yaml
│ │ │ │ ├── uzp2.s.yaml
│ │ │ │ ├── whilele.s.yaml
│ │ │ │ ├── whilelo.s.yaml
│ │ │ │ ├── whilels.s.yaml
│ │ │ │ ├── whilelt.s.yaml
│ │ │ │ ├── wrffr.s.yaml
│ │ │ │ ├── zip1.s.yaml
│ │ │ │ └── zip2.s.yaml
│ │ │ ├── SVE2/
│ │ │ │ ├── adclb.s.yaml
│ │ │ │ ├── adclt.s.yaml
│ │ │ │ ├── addhnb.s.yaml
│ │ │ │ ├── addhnt.s.yaml
│ │ │ │ ├── addp.s.yaml
│ │ │ │ ├── aesd.s.yaml
│ │ │ │ ├── aese.s.yaml
│ │ │ │ ├── aesimc.s.yaml
│ │ │ │ ├── aesmc.s.yaml
│ │ │ │ ├── bcax.s.yaml
│ │ │ │ ├── bdep.s.yaml
│ │ │ │ ├── bext.s.yaml
│ │ │ │ ├── bgrp.s.yaml
│ │ │ │ ├── bsl.s.yaml
│ │ │ │ ├── bsl1n.s.yaml
│ │ │ │ ├── bsl2n.s.yaml
│ │ │ │ ├── cadd.s.yaml
│ │ │ │ ├── cdot.s.yaml
│ │ │ │ ├── cmla.s.yaml
│ │ │ │ ├── eor3.s.yaml
│ │ │ │ ├── eorbt.s.yaml
│ │ │ │ ├── eortb.s.yaml
│ │ │ │ ├── ext.s.yaml
│ │ │ │ ├── faddp.s.yaml
│ │ │ │ ├── fcvtlt.s.yaml
│ │ │ │ ├── fcvtnt.s.yaml
│ │ │ │ ├── fcvtx.s.yaml
│ │ │ │ ├── fcvtxnt.s.yaml
│ │ │ │ ├── flogb.s.yaml
│ │ │ │ ├── fmaxnmp.s.yaml
│ │ │ │ ├── fmaxp.s.yaml
│ │ │ │ ├── fminnmp.s.yaml
│ │ │ │ ├── fminp.s.yaml
│ │ │ │ ├── fmlalb.s.yaml
│ │ │ │ ├── fmlalt.s.yaml
│ │ │ │ ├── fmlslb.s.yaml
│ │ │ │ ├── fmlslt.s.yaml
│ │ │ │ ├── histcnt.s.yaml
│ │ │ │ ├── histseg.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1sb.s.yaml
│ │ │ │ ├── ldnt1sh.s.yaml
│ │ │ │ ├── ldnt1sw.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── match.s.yaml
│ │ │ │ ├── mla.s.yaml
│ │ │ │ ├── mls.s.yaml
│ │ │ │ ├── mul.s.yaml
│ │ │ │ ├── nbsl.s.yaml
│ │ │ │ ├── nmatch.s.yaml
│ │ │ │ ├── pmul.s.yaml
│ │ │ │ ├── pmullb-128.s.yaml
│ │ │ │ ├── pmullb.s.yaml
│ │ │ │ ├── pmullt-128.s.yaml
│ │ │ │ ├── pmullt.s.yaml
│ │ │ │ ├── raddhnb.s.yaml
│ │ │ │ ├── raddhnt.s.yaml
│ │ │ │ ├── rax1.s.yaml
│ │ │ │ ├── rshrnb.s.yaml
│ │ │ │ ├── rshrnt.s.yaml
│ │ │ │ ├── rsubhnb.s.yaml
│ │ │ │ ├── rsubhnt.s.yaml
│ │ │ │ ├── saba.s.yaml
│ │ │ │ ├── sabalb.s.yaml
│ │ │ │ ├── sabalt.s.yaml
│ │ │ │ ├── sabdlb.s.yaml
│ │ │ │ ├── sabdlt.s.yaml
│ │ │ │ ├── sadalp.s.yaml
│ │ │ │ ├── saddlb.s.yaml
│ │ │ │ ├── saddlbt.s.yaml
│ │ │ │ ├── saddlt.s.yaml
│ │ │ │ ├── saddwb.s.yaml
│ │ │ │ ├── saddwt.s.yaml
│ │ │ │ ├── sbclb.s.yaml
│ │ │ │ ├── sbclt.s.yaml
│ │ │ │ ├── shadd.s.yaml
│ │ │ │ ├── shrnb.s.yaml
│ │ │ │ ├── shrnt.s.yaml
│ │ │ │ ├── shsub.s.yaml
│ │ │ │ ├── shsubr.s.yaml
│ │ │ │ ├── sli.s.yaml
│ │ │ │ ├── sm4e.s.yaml
│ │ │ │ ├── sm4ekey.s.yaml
│ │ │ │ ├── smaxp.s.yaml
│ │ │ │ ├── sminp.s.yaml
│ │ │ │ ├── smlalb.s.yaml
│ │ │ │ ├── smlalt.s.yaml
│ │ │ │ ├── smlslb.s.yaml
│ │ │ │ ├── smlslt.s.yaml
│ │ │ │ ├── smulh.s.yaml
│ │ │ │ ├── smullb.s.yaml
│ │ │ │ ├── smullt.s.yaml
│ │ │ │ ├── splice.s.yaml
│ │ │ │ ├── sqabs.s.yaml
│ │ │ │ ├── sqadd.s.yaml
│ │ │ │ ├── sqcadd.s.yaml
│ │ │ │ ├── sqdmlalb.s.yaml
│ │ │ │ ├── sqdmlalbt.s.yaml
│ │ │ │ ├── sqdmlalt.s.yaml
│ │ │ │ ├── sqdmlslb.s.yaml
│ │ │ │ ├── sqdmlslbt.s.yaml
│ │ │ │ ├── sqdmlslt.s.yaml
│ │ │ │ ├── sqdmulh.s.yaml
│ │ │ │ ├── sqdmullb.s.yaml
│ │ │ │ ├── sqdmullt.s.yaml
│ │ │ │ ├── sqneg.s.yaml
│ │ │ │ ├── sqrdcmlah.s.yaml
│ │ │ │ ├── sqrdmlah.s.yaml
│ │ │ │ ├── sqrdmlsh.s.yaml
│ │ │ │ ├── sqrdmulh.s.yaml
│ │ │ │ ├── sqrshl.s.yaml
│ │ │ │ ├── sqrshlr.s.yaml
│ │ │ │ ├── sqrshrnb.s.yaml
│ │ │ │ ├── sqrshrnt.s.yaml
│ │ │ │ ├── sqrshrunb.s.yaml
│ │ │ │ ├── sqrshrunt.s.yaml
│ │ │ │ ├── sqshl.s.yaml
│ │ │ │ ├── sqshlr.s.yaml
│ │ │ │ ├── sqshlu.s.yaml
│ │ │ │ ├── sqshrnb.s.yaml
│ │ │ │ ├── sqshrnt.s.yaml
│ │ │ │ ├── sqshrunb.s.yaml
│ │ │ │ ├── sqshrunt.s.yaml
│ │ │ │ ├── sqsub.s.yaml
│ │ │ │ ├── sqsubr.s.yaml
│ │ │ │ ├── sqxtnb.s.yaml
│ │ │ │ ├── sqxtnt.s.yaml
│ │ │ │ ├── sqxtunb.s.yaml
│ │ │ │ ├── sqxtunt.s.yaml
│ │ │ │ ├── srhadd.s.yaml
│ │ │ │ ├── sri.s.yaml
│ │ │ │ ├── srshl.s.yaml
│ │ │ │ ├── srshlr.s.yaml
│ │ │ │ ├── srshr.s.yaml
│ │ │ │ ├── srsra.s.yaml
│ │ │ │ ├── sshllb.s.yaml
│ │ │ │ ├── sshllt.s.yaml
│ │ │ │ ├── ssra.s.yaml
│ │ │ │ ├── ssublb.s.yaml
│ │ │ │ ├── ssublbt.s.yaml
│ │ │ │ ├── ssublt.s.yaml
│ │ │ │ ├── ssubltb.s.yaml
│ │ │ │ ├── ssubwb.s.yaml
│ │ │ │ ├── ssubwt.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── subhnb.s.yaml
│ │ │ │ ├── subhnt.s.yaml
│ │ │ │ ├── suqadd.s.yaml
│ │ │ │ ├── tbl.s.yaml
│ │ │ │ ├── tbx.s.yaml
│ │ │ │ ├── uaba.s.yaml
│ │ │ │ ├── uabalb.s.yaml
│ │ │ │ ├── uabalt.s.yaml
│ │ │ │ ├── uabdlb.s.yaml
│ │ │ │ ├── uabdlt.s.yaml
│ │ │ │ ├── uadalp.s.yaml
│ │ │ │ ├── uaddlb.s.yaml
│ │ │ │ ├── uaddlt.s.yaml
│ │ │ │ ├── uaddwb.s.yaml
│ │ │ │ ├── uaddwt.s.yaml
│ │ │ │ ├── uhadd.s.yaml
│ │ │ │ ├── uhsub.s.yaml
│ │ │ │ ├── uhsubr.s.yaml
│ │ │ │ ├── umaxp.s.yaml
│ │ │ │ ├── uminp.s.yaml
│ │ │ │ ├── umlalb.s.yaml
│ │ │ │ ├── umlalt.s.yaml
│ │ │ │ ├── umlslb.s.yaml
│ │ │ │ ├── umlslt.s.yaml
│ │ │ │ ├── umulh.s.yaml
│ │ │ │ ├── umullb.s.yaml
│ │ │ │ ├── umullt.s.yaml
│ │ │ │ ├── uqadd.s.yaml
│ │ │ │ ├── uqrshl.s.yaml
│ │ │ │ ├── uqrshlr.s.yaml
│ │ │ │ ├── uqrshrnb.s.yaml
│ │ │ │ ├── uqrshrnt.s.yaml
│ │ │ │ ├── uqshl.s.yaml
│ │ │ │ ├── uqshlr.s.yaml
│ │ │ │ ├── uqshrnb.s.yaml
│ │ │ │ ├── uqshrnt.s.yaml
│ │ │ │ ├── uqsub.s.yaml
│ │ │ │ ├── uqsubr.s.yaml
│ │ │ │ ├── uqxtnb.s.yaml
│ │ │ │ ├── uqxtnt.s.yaml
│ │ │ │ ├── urecpe.s.yaml
│ │ │ │ ├── urhadd.s.yaml
│ │ │ │ ├── urshl.s.yaml
│ │ │ │ ├── urshlr.s.yaml
│ │ │ │ ├── urshr.s.yaml
│ │ │ │ ├── ursqrte.s.yaml
│ │ │ │ ├── ursra.s.yaml
│ │ │ │ ├── ushllb.s.yaml
│ │ │ │ ├── ushllt.s.yaml
│ │ │ │ ├── usqadd.s.yaml
│ │ │ │ ├── usra.s.yaml
│ │ │ │ ├── usublb.s.yaml
│ │ │ │ ├── usublt.s.yaml
│ │ │ │ ├── usubwb.s.yaml
│ │ │ │ ├── usubwt.s.yaml
│ │ │ │ ├── whilege.s.yaml
│ │ │ │ ├── whilegt.s.yaml
│ │ │ │ ├── whilehi.s.yaml
│ │ │ │ ├── whilehs.s.yaml
│ │ │ │ ├── whilerw.s.yaml
│ │ │ │ ├── whilewr.s.yaml
│ │ │ │ └── xar.s.yaml
│ │ │ ├── SVE2p1/
│ │ │ │ ├── addqv.s.yaml
│ │ │ │ ├── andqv.s.yaml
│ │ │ │ ├── bfadd.s.yaml
│ │ │ │ ├── bfclamp.s.yaml
│ │ │ │ ├── bfmax.s.yaml
│ │ │ │ ├── bfmaxnm.s.yaml
│ │ │ │ ├── bfmin.s.yaml
│ │ │ │ ├── bfminnm.s.yaml
│ │ │ │ ├── bfmla.s.yaml
│ │ │ │ ├── bfmls.s.yaml
│ │ │ │ ├── bfmlslb.s.yaml
│ │ │ │ ├── bfmlslt.s.yaml
│ │ │ │ ├── bfmul.s.yaml
│ │ │ │ ├── bfsub.s.yaml
│ │ │ │ ├── cntp.s.yaml
│ │ │ │ ├── dupq.s.yaml
│ │ │ │ ├── eorqv.s.yaml
│ │ │ │ ├── extq.s.yaml
│ │ │ │ ├── faddqv.s.yaml
│ │ │ │ ├── fclamp.s.yaml
│ │ │ │ ├── fdot.s.yaml
│ │ │ │ ├── feature-sve2p1-implies-sve2.s.yaml
│ │ │ │ ├── fmaxnmqv.s.yaml
│ │ │ │ ├── fmaxqv.s.yaml
│ │ │ │ ├── fminnmqv.s.yaml
│ │ │ │ ├── fminqv.s.yaml
│ │ │ │ ├── ld1b.s.yaml
│ │ │ │ ├── ld1d.s.yaml
│ │ │ │ ├── ld1d_q.s.yaml
│ │ │ │ ├── ld1h.s.yaml
│ │ │ │ ├── ld1q.s.yaml
│ │ │ │ ├── ld1w.s.yaml
│ │ │ │ ├── ld1w_q.s.yaml
│ │ │ │ ├── ld2q.s.yaml
│ │ │ │ ├── ld3q.s.yaml
│ │ │ │ ├── ld4q.s.yaml
│ │ │ │ ├── ldnt1b.s.yaml
│ │ │ │ ├── ldnt1d.s.yaml
│ │ │ │ ├── ldnt1h.s.yaml
│ │ │ │ ├── ldnt1w.s.yaml
│ │ │ │ ├── orqv.s.yaml
│ │ │ │ ├── pext.s.yaml
│ │ │ │ ├── pmov.s.yaml
│ │ │ │ ├── ptrue.s.yaml
│ │ │ │ ├── sdot.s.yaml
│ │ │ │ ├── smaxqv.s.yaml
│ │ │ │ ├── sminqv.s.yaml
│ │ │ │ ├── sqcvtn.s.yaml
│ │ │ │ ├── sqcvtun.s.yaml
│ │ │ │ ├── sqrshrn.s.yaml
│ │ │ │ ├── sqrshrun.s.yaml
│ │ │ │ ├── st1b.s.yaml
│ │ │ │ ├── st1d.s.yaml
│ │ │ │ ├── st1d_q.s.yaml
│ │ │ │ ├── st1h.s.yaml
│ │ │ │ ├── st1q.s.yaml
│ │ │ │ ├── st1w.s.yaml
│ │ │ │ ├── st1w_q.s.yaml
│ │ │ │ ├── st2q.s.yaml
│ │ │ │ ├── st3q.s.yaml
│ │ │ │ ├── st4q.s.yaml
│ │ │ │ ├── stnt1b.s.yaml
│ │ │ │ ├── stnt1d.s.yaml
│ │ │ │ ├── stnt1h.s.yaml
│ │ │ │ ├── stnt1w.s.yaml
│ │ │ │ ├── tblq.s.yaml
│ │ │ │ ├── tbxq.s.yaml
│ │ │ │ ├── udot.s.yaml
│ │ │ │ ├── umaxqv.s.yaml
│ │ │ │ ├── uminqv.s.yaml
│ │ │ │ ├── uqcvtn.s.yaml
│ │ │ │ ├── uqrshrn.s.yaml
│ │ │ │ ├── uzpq1.s.yaml
│ │ │ │ ├── uzpq2.s.yaml
│ │ │ │ ├── whilege.s.yaml
│ │ │ │ ├── whilegt.s.yaml
│ │ │ │ ├── whilehi.s.yaml
│ │ │ │ ├── whilehs.s.yaml
│ │ │ │ ├── whilele.s.yaml
│ │ │ │ ├── whilelo.s.yaml
│ │ │ │ ├── whilels.s.yaml
│ │ │ │ ├── whilelt.s.yaml
│ │ │ │ ├── zipq1.s.yaml
│ │ │ │ └── zipq2.s.yaml
│ │ │ ├── a64-ignored-fields.txt.yaml
│ │ │ ├── apple_proprietary.yaml
│ │ │ ├── arm64-basic-a64-instructions.s.yaml
│ │ │ ├── arm64-nv-cond.s.yaml
│ │ │ ├── arm64-target-specific-sysreg.s.yaml
│ │ │ ├── arm64-verbose-vector-case.s.yaml
│ │ │ ├── arm64e.s.yaml
│ │ │ ├── armv8.1a-vhe.s.yaml
│ │ │ ├── armv8.2a-at.s.yaml
│ │ │ ├── armv8.2a-dotprod.s.yaml
│ │ │ ├── armv8.2a-persistent-memory.s.yaml
│ │ │ ├── armv8.3a-ID_ISAR6_EL1.s.yaml
│ │ │ ├── armv8.3a-complex.s.yaml
│ │ │ ├── armv8.3a-complex_nofp16.s.yaml
│ │ │ ├── armv8.3a-js.s.yaml
│ │ │ ├── armv8.3a-pauth.s.yaml
│ │ │ ├── armv8.3a-rcpc.s.yaml
│ │ │ ├── armv8.3a-signed-pointer.s.yaml
│ │ │ ├── armv8.4a-flag.s.yaml
│ │ │ ├── armv8.4a-flagm.s.yaml
│ │ │ ├── armv8.4a-ldst.s.yaml
│ │ │ ├── armv8.4a-trace.s.yaml
│ │ │ ├── armv8.4a-virt.s.yaml
│ │ │ ├── armv8.4a-vncr.s.yaml
│ │ │ ├── armv8.5a-altnzcv.s.yaml
│ │ │ ├── armv8.5a-bti.s.yaml
│ │ │ ├── armv8.5a-frint.s.yaml
│ │ │ ├── armv8.5a-mte.s.yaml
│ │ │ ├── armv8.5a-persistent-memory.s.yaml
│ │ │ ├── armv8.5a-predres.s.yaml
│ │ │ ├── armv8.5a-rand.s.yaml
│ │ │ ├── armv8.5a-sb.s.yaml
│ │ │ ├── armv8.5a-specrestrict.s.yaml
│ │ │ ├── armv8.5a-ssbs.s.yaml
│ │ │ ├── armv8.6a-amvs.s.yaml
│ │ │ ├── armv8.6a-bf16.s.yaml
│ │ │ ├── armv8.6a-fgt.s.yaml
│ │ │ ├── armv8.6a-simd-matmul.s.yaml
│ │ │ ├── armv8.7a-hcx.s.yaml
│ │ │ ├── armv8.7a-wfxt.s.yaml
│ │ │ ├── armv8.8a-nmi.s.yaml
│ │ │ ├── armv8.9a-ats1a.s.yaml
│ │ │ ├── armv8.9a-clrbhb.s.yaml
│ │ │ ├── armv8.9a-cssc.s.yaml
│ │ │ ├── armv8.9a-debug-pmu.s.yaml
│ │ │ ├── armv8.9a-lrcpc3.s.yaml
│ │ │ ├── armv8.9a-lrcpc3.txt.yaml
│ │ │ ├── armv8.9a-pfar.s.yaml
│ │ │ ├── armv8.9a-prfm-slc.s.yaml
│ │ │ ├── armv8.9a-rasv2.s.yaml
│ │ │ ├── armv8.9a-specres2.s.yaml
│ │ │ ├── armv8a-fpmul.s.yaml
│ │ │ ├── armv8r-inst.s.yaml
│ │ │ ├── armv8r-sysreg.s.yaml
│ │ │ ├── armv8r-unsupported-inst.s.yaml
│ │ │ ├── armv8r-unsupported-sysreg.s.yaml
│ │ │ ├── armv9-sysreg128.txt.yaml
│ │ │ ├── armv9.4a-chk.s.yaml
│ │ │ ├── armv9.4a-ebep.s.yaml
│ │ │ ├── armv9.4a-gcs.s.yaml
│ │ │ ├── armv9.5a-cpa.s.yaml
│ │ │ ├── armv9.5a-e3dse.s.yaml
│ │ │ ├── armv9.5a-fgwte3.s.yaml
│ │ │ ├── armv9.5a-hacdbs.s.yaml
│ │ │ ├── armv9.5a-hdbss.s.yaml
│ │ │ ├── armv9.5a-pauthlr.s.yaml
│ │ │ ├── armv9.5a-spmu2.s.yaml
│ │ │ ├── armv9.5a-step2.s.yaml
│ │ │ ├── armv9.5a-tlbiw.s.yaml
│ │ │ ├── armv9a-mec.s.yaml
│ │ │ ├── basic-a64-instructions.s.yaml
│ │ │ ├── case-insen-reg-names.s.yaml
│ │ │ ├── dot-req.s.yaml
│ │ │ ├── ete-sysregs.s.yaml
│ │ │ ├── gicv3-regs.s.yaml
│ │ │ ├── neon-2velem.s.yaml
│ │ │ ├── neon-3vdiff.s.yaml
│ │ │ ├── neon-aba-abd.s.yaml
│ │ │ ├── neon-across.s.yaml
│ │ │ ├── neon-add-pairwise.s.yaml
│ │ │ ├── neon-add-sub-instructions.s.yaml
│ │ │ ├── neon-bitwise-instructions.s.yaml
│ │ │ ├── neon-compare-instructions.s.yaml
│ │ │ ├── neon-crypto.s.yaml
│ │ │ ├── neon-extract.s.yaml
│ │ │ ├── neon-facge-facgt.s.yaml
│ │ │ ├── neon-frsqrt-frecp.s.yaml
│ │ │ ├── neon-halving-add-sub.s.yaml
│ │ │ ├── neon-max-min-pairwise.s.yaml
│ │ │ ├── neon-max-min.s.yaml
│ │ │ ├── neon-mla-mls-instructions.s.yaml
│ │ │ ├── neon-mov.s.yaml
│ │ │ ├── neon-mul-div-instructions.s.yaml
│ │ │ ├── neon-perm.s.yaml
│ │ │ ├── neon-rounding-halving-add.s.yaml
│ │ │ ├── neon-rounding-shift.s.yaml
│ │ │ ├── neon-saturating-add-sub.s.yaml
│ │ │ ├── neon-saturating-rounding-shift.s.yaml
│ │ │ ├── neon-saturating-shift.s.yaml
│ │ │ ├── neon-scalar-abs.s.yaml
│ │ │ ├── neon-scalar-add-sub.s.yaml
│ │ │ ├── neon-scalar-by-elem-mla.s.yaml
│ │ │ ├── neon-scalar-by-elem-mul.s.yaml
│ │ │ ├── neon-scalar-by-elem-saturating-mla.s.yaml
│ │ │ ├── neon-scalar-by-elem-saturating-mul.s.yaml
│ │ │ ├── neon-scalar-compare.s.yaml
│ │ │ ├── neon-scalar-cvt.s.yaml
│ │ │ ├── neon-scalar-dup.s.yaml
│ │ │ ├── neon-scalar-extract-narrow.s.yaml
│ │ │ ├── neon-scalar-fp-compare.s.yaml
│ │ │ ├── neon-scalar-mul.s.yaml
│ │ │ ├── neon-scalar-neg.s.yaml
│ │ │ ├── neon-scalar-recip.s.yaml
│ │ │ ├── neon-scalar-reduce-pairwise.s.yaml
│ │ │ ├── neon-scalar-rounding-shift.s.yaml
│ │ │ ├── neon-scalar-saturating-add-sub.s.yaml
│ │ │ ├── neon-scalar-saturating-rounding-shift.s.yaml
│ │ │ ├── neon-scalar-saturating-shift.s.yaml
│ │ │ ├── neon-scalar-shift-imm.s.yaml
│ │ │ ├── neon-scalar-shift.s.yaml
│ │ │ ├── neon-shift-left-long.s.yaml
│ │ │ ├── neon-shift.s.yaml
│ │ │ ├── neon-simd-copy.s.yaml
│ │ │ ├── neon-simd-ldst-multi-elem.s.yaml
│ │ │ ├── neon-simd-ldst-one-elem.s.yaml
│ │ │ ├── neon-simd-misc.s.yaml
│ │ │ ├── neon-simd-post-ldst-multi-elem.s.yaml
│ │ │ ├── neon-simd-shift.s.yaml
│ │ │ ├── neon-sxtl.s.yaml
│ │ │ ├── neon-tbl.s.yaml
│ │ │ ├── neon-uxtl.s.yaml
│ │ │ ├── ras-extension.s.yaml
│ │ │ ├── rprfm.s.yaml
│ │ │ ├── spe.s.yaml
│ │ │ ├── speculation-barriers.s.yaml
│ │ │ ├── tme.s.yaml
│ │ │ ├── trace-regs.s.yaml
│ │ │ ├── trbe-sysreg.s.yaml
│ │ │ └── udf.s.yaml
│ │ ├── ARC/
│ │ │ ├── alu_arc.s.yaml
│ │ │ ├── br_arc.s.yaml
│ │ │ ├── compact_arc.s.yaml
│ │ │ ├── ldst_arc.s.yaml
│ │ │ └── misc_arc.s.yaml
│ │ ├── ARM/
│ │ │ ├── arm-aliases.s.yaml
│ │ │ ├── arm-arithmetic-aliases.s.yaml
│ │ │ ├── arm-branches.s.yaml
│ │ │ ├── arm-it-block.s.yaml
│ │ │ ├── arm-memory-instructions.s.yaml
│ │ │ ├── arm-shift-encoding.s.yaml
│ │ │ ├── arm-thumb-trustzone.s.yaml
│ │ │ ├── arm-trustzone.s.yaml
│ │ │ ├── arm_addrmode2.s.yaml
│ │ │ ├── arm_addrmode3.s.yaml
│ │ │ ├── arm_instructions.s.yaml
│ │ │ ├── armv8.1m-pacbti.s.yaml
│ │ │ ├── armv8.2a-dotprod-a32.s.yaml
│ │ │ ├── armv8.2a-dotprod-t32.s.yaml
│ │ │ ├── armv8.5a-sb.s.yaml
│ │ │ ├── armv8a-fpmul.s.yaml
│ │ │ ├── basic-arm-instructions-v8.s.yaml
│ │ │ ├── basic-arm-instructions.s.yaml
│ │ │ ├── basic-thumb-instructions.s.yaml
│ │ │ ├── basic-thumb2-instructions.s.yaml
│ │ │ ├── bfloat16-a32.s.yaml
│ │ │ ├── bfloat16-t32.s.yaml
│ │ │ ├── cde-integer.s.yaml
│ │ │ ├── cde-vec-pred.s.yaml
│ │ │ ├── clrm-asm.s.yaml
│ │ │ ├── cps.s.yaml
│ │ │ ├── crc32-thumb.s.yaml
│ │ │ ├── crc32.s.yaml
│ │ │ ├── dot-req.s.yaml
│ │ │ ├── fconst.s.yaml
│ │ │ ├── fp-armv8.s.yaml
│ │ │ ├── fpv8.s.yaml
│ │ │ ├── gas-compl-copr-reg.s.yaml
│ │ │ ├── idiv-thumb.s.yaml
│ │ │ ├── idiv.s.yaml
│ │ │ ├── implicit-it-generation.s.yaml
│ │ │ ├── ldrd-strd-gnu-arm.s.yaml
│ │ │ ├── ldrd-strd-gnu-thumb.s.yaml
│ │ │ ├── load-store-acquire-release-v8-thumb.s.yaml
│ │ │ ├── load-store-acquire-release-v8.s.yaml
│ │ │ ├── mve-bitops.s.yaml
│ │ │ ├── mve-float.s.yaml
│ │ │ ├── mve-integer.s.yaml
│ │ │ ├── mve-interleave.s.yaml
│ │ │ ├── mve-load-store.s.yaml
│ │ │ ├── mve-minmax.s.yaml
│ │ │ ├── mve-misc.s.yaml
│ │ │ ├── mve-qdest-qsrc.s.yaml
│ │ │ ├── mve-qdest-rsrc.s.yaml
│ │ │ ├── mve-reductions-fp.s.yaml
│ │ │ ├── mve-reductions.s.yaml
│ │ │ ├── mve-scalar-shift.s.yaml
│ │ │ ├── mve-shifts.s.yaml
│ │ │ ├── mve-vcmp.s.yaml
│ │ │ ├── mve-vmov-pair.s.yaml
│ │ │ ├── mve-vpt.s.yaml
│ │ │ ├── negative-immediates.s.yaml
│ │ │ ├── neon-abs-encoding.s.yaml
│ │ │ ├── neon-absdiff-encoding.s.yaml
│ │ │ ├── neon-add-encoding.s.yaml
│ │ │ ├── neon-bitcount-encoding.s.yaml
│ │ │ ├── neon-bitwise-encoding.s.yaml
│ │ │ ├── neon-cmp-encoding.s.yaml
│ │ │ ├── neon-convert-encoding.s.yaml
│ │ │ ├── neon-crypto.s.yaml
│ │ │ ├── neon-dup-encoding.s.yaml
│ │ │ ├── neon-minmax-encoding.s.yaml
│ │ │ ├── neon-mov-encoding.s.yaml
│ │ │ ├── neon-mul-accum-encoding.s.yaml
│ │ │ ├── neon-mul-encoding.s.yaml
│ │ │ ├── neon-neg-encoding.s.yaml
│ │ │ ├── neon-pairwise-encoding.s.yaml
│ │ │ ├── neon-reciprocal-encoding.s.yaml
│ │ │ ├── neon-reverse-encoding.s.yaml
│ │ │ ├── neon-satshift-encoding.s.yaml
│ │ │ ├── neon-shift-encoding.s.yaml
│ │ │ ├── neon-shiftaccum-encoding.s.yaml
│ │ │ ├── neon-shuffle-encoding.s.yaml
│ │ │ ├── neon-sub-encoding.s.yaml
│ │ │ ├── neon-table-encoding.s.yaml
│ │ │ ├── neon-v8.s.yaml
│ │ │ ├── neon-vld-encoding.s.yaml
│ │ │ ├── neon-vld-vst-align.s.yaml
│ │ │ ├── neon-vst-encoding.s.yaml
│ │ │ ├── neon-vswp.s.yaml
│ │ │ ├── neont2-abs-encoding.s.yaml
│ │ │ ├── neont2-absdiff-encoding.s.yaml
│ │ │ ├── neont2-add-encoding.s.yaml
│ │ │ ├── neont2-bitcount-encoding.s.yaml
│ │ │ ├── neont2-bitwise-encoding.s.yaml
│ │ │ ├── neont2-cmp-encoding.s.yaml
│ │ │ ├── neont2-convert-encoding.s.yaml
│ │ │ ├── neont2-dup-encoding.s.yaml
│ │ │ ├── neont2-minmax-encoding.s.yaml
│ │ │ ├── neont2-mov-encoding.s.yaml
│ │ │ ├── neont2-mul-accum-encoding.s.yaml
│ │ │ ├── neont2-mul-encoding.s.yaml
│ │ │ ├── neont2-neg-encoding.s.yaml
│ │ │ ├── neont2-pairwise-encoding.s.yaml
│ │ │ ├── neont2-reciprocal-encoding.s.yaml
│ │ │ ├── neont2-reverse-encoding.s.yaml
│ │ │ ├── neont2-satshift-encoding.s.yaml
│ │ │ ├── neont2-shift-encoding.s.yaml
│ │ │ ├── neont2-shiftaccum-encoding.s.yaml
│ │ │ ├── neont2-shuffle-encoding.s.yaml
│ │ │ ├── neont2-sub-encoding.s.yaml
│ │ │ ├── neont2-table-encoding.s.yaml
│ │ │ ├── neont2-vld-encoding.s.yaml
│ │ │ ├── neont2-vst-encoding.s.yaml
│ │ │ ├── simple-fp-encoding.s.yaml
│ │ │ ├── thumb-add-sub-width.s.yaml
│ │ │ ├── thumb-fp-armv8.s.yaml
│ │ │ ├── thumb-hints.s.yaml
│ │ │ ├── thumb-mov.s.yaml
│ │ │ ├── thumb-neon-crypto.s.yaml
│ │ │ ├── thumb-neon-v8.s.yaml
│ │ │ ├── thumb-shift-encoding.s.yaml
│ │ │ ├── thumb.s.yaml
│ │ │ ├── thumb2-b.w-encodingT4.s.yaml
│ │ │ ├── thumb2-branches.s.yaml
│ │ │ ├── thumb2-bxj-v8.s.yaml
│ │ │ ├── thumb2-bxj.s.yaml
│ │ │ ├── thumb2-ldr.w-str.w.s.yaml
│ │ │ ├── thumb2-ldrexd-strexd.s.yaml
│ │ │ ├── thumb2-mclass.s.yaml
│ │ │ ├── thumb2-narrow-dp.ll.yaml
│ │ │ ├── thumb2-pldw.s.yaml
│ │ │ ├── thumb_rewrites.s.yaml
│ │ │ ├── thumbv7em.s.yaml
│ │ │ ├── thumbv7m.s.yaml
│ │ │ ├── thumbv8.1m-vmrs-vmsr.s.yaml
│ │ │ ├── thumbv8.1m.s.yaml
│ │ │ ├── thumbv8m.s.yaml
│ │ │ ├── udf-arm.s.yaml
│ │ │ ├── udf-thumb-2.s.yaml
│ │ │ ├── udf-thumb.s.yaml
│ │ │ ├── vfp4-thumb.s.yaml
│ │ │ ├── vfp4.s.yaml
│ │ │ ├── vmov-vmvn-replicate.s.yaml
│ │ │ ├── vmovhr.s.yaml
│ │ │ ├── vpush-vpop-thumb.s.yaml
│ │ │ ├── vpush-vpop.s.yaml
│ │ │ ├── vscclrm-asm.s.yaml
│ │ │ └── vstrldr_sys.s.yaml
│ │ ├── Alpha/
│ │ │ ├── insn-alpha-be.s.yaml
│ │ │ └── insn-alpha.s.yaml
│ │ ├── BPF/
│ │ │ ├── classic-all.yaml
│ │ │ ├── classic-be.yaml
│ │ │ ├── extended-all.yaml
│ │ │ └── extended-be.yaml
│ │ ├── HPPA/
│ │ │ ├── alu11.s.yaml
│ │ │ ├── arith_imm11.s.yaml
│ │ │ ├── assist20.s.yaml
│ │ │ ├── branch11.s.yaml
│ │ │ ├── branch20.s.yaml
│ │ │ ├── computation20.s.yaml
│ │ │ ├── copr_dw11.s.yaml
│ │ │ ├── float11.s.yaml
│ │ │ ├── float20.s.yaml
│ │ │ ├── index_mem11.s.yaml
│ │ │ ├── longimm20.s.yaml
│ │ │ ├── mem_mgmt11.s.yaml
│ │ │ ├── memory_reference20.s.yaml
│ │ │ ├── multimedia20.s.yaml
│ │ │ ├── no_grp11.s.yaml
│ │ │ ├── sfu11.s.yaml
│ │ │ ├── shexdep11.s.yaml
│ │ │ ├── sysctrl20.s.yaml
│ │ │ └── system_op11.s.yaml
│ │ ├── LoongArch/
│ │ │ ├── absd.s.yaml
│ │ │ ├── add.s.yaml
│ │ │ ├── adda.s.yaml
│ │ │ ├── addi.s.yaml
│ │ │ ├── addw.s.yaml
│ │ │ ├── and.s.yaml
│ │ │ ├── andi.s.yaml
│ │ │ ├── andn.s.yaml
│ │ │ ├── arith.s.yaml
│ │ │ ├── arm-alu.s.yaml
│ │ │ ├── arm-jump.s.yaml
│ │ │ ├── arm-mov.s.yaml
│ │ │ ├── arm-shift.s.yaml
│ │ │ ├── atomic.s.yaml
│ │ │ ├── avg.s.yaml
│ │ │ ├── avgr.s.yaml
│ │ │ ├── barrier.s.yaml
│ │ │ ├── base.s.yaml
│ │ │ ├── bit-manipu.s.yaml
│ │ │ ├── bit-shift.s.yaml
│ │ │ ├── bitclr.s.yaml
│ │ │ ├── bitrev.s.yaml
│ │ │ ├── bitsel.s.yaml
│ │ │ ├── bitseli.s.yaml
│ │ │ ├── bitset.s.yaml
│ │ │ ├── bound-check.s.yaml
│ │ │ ├── branch.s.yaml
│ │ │ ├── bsll.s.yaml
│ │ │ ├── bsrl.s.yaml
│ │ │ ├── clo.s.yaml
│ │ │ ├── clz.s.yaml
│ │ │ ├── crc.s.yaml
│ │ │ ├── d-arith.s.yaml
│ │ │ ├── d-bound-check.s.yaml
│ │ │ ├── d-branch.s.yaml
│ │ │ ├── d-comp.s.yaml
│ │ │ ├── d-conv.s.yaml
│ │ │ ├── d-memory.s.yaml
│ │ │ ├── d-move.s.yaml
│ │ │ ├── div.s.yaml
│ │ │ ├── ext2xv.s.yaml
│ │ │ ├── exth.s.yaml
│ │ │ ├── extl.s.yaml
│ │ │ ├── extrins.s.yaml
│ │ │ ├── f-arith.s.yaml
│ │ │ ├── f-bound-check.s.yaml
│ │ │ ├── f-branch.s.yaml
│ │ │ ├── f-comp.s.yaml
│ │ │ ├── f-conv.s.yaml
│ │ │ ├── f-memory.s.yaml
│ │ │ ├── f-move.s.yaml
│ │ │ ├── fadd.s.yaml
│ │ │ ├── fclass.s.yaml
│ │ │ ├── fcmp.s.yaml
│ │ │ ├── fcvt.s.yaml
│ │ │ ├── fcvth.s.yaml
│ │ │ ├── fcvtl.s.yaml
│ │ │ ├── fdiv.s.yaml
│ │ │ ├── ffint.s.yaml
│ │ │ ├── flogb.s.yaml
│ │ │ ├── fmadd.s.yaml
│ │ │ ├── fmax.s.yaml
│ │ │ ├── fmaxa.s.yaml
│ │ │ ├── fmin.s.yaml
│ │ │ ├── fmina.s.yaml
│ │ │ ├── fmsub.s.yaml
│ │ │ ├── fmul.s.yaml
│ │ │ ├── fnmadd.s.yaml
│ │ │ ├── fnmsub.s.yaml
│ │ │ ├── frecip.s.yaml
│ │ │ ├── frint.s.yaml
│ │ │ ├── frsqrt.s.yaml
│ │ │ ├── frstp.s.yaml
│ │ │ ├── fsqrt.s.yaml
│ │ │ ├── fsub.s.yaml
│ │ │ ├── ftint.s.yaml
│ │ │ ├── haddw.s.yaml
│ │ │ ├── hsubw.s.yaml
│ │ │ ├── ilv.s.yaml
│ │ │ ├── insgr2vr.s.yaml
│ │ │ ├── insve0.s.yaml
│ │ │ ├── ld.s.yaml
│ │ │ ├── ldrepl.s.yaml
│ │ │ ├── lvz.s.yaml
│ │ │ ├── madd.s.yaml
│ │ │ ├── maddw.s.yaml
│ │ │ ├── max.s.yaml
│ │ │ ├── memory.s.yaml
│ │ │ ├── min.s.yaml
│ │ │ ├── misc.s.yaml
│ │ │ ├── mod.s.yaml
│ │ │ ├── mskgez.s.yaml
│ │ │ ├── mskltz.s.yaml
│ │ │ ├── msknz.s.yaml
│ │ │ ├── msub.s.yaml
│ │ │ ├── muh.s.yaml
│ │ │ ├── mul.s.yaml
│ │ │ ├── mulw.s.yaml
│ │ │ ├── neg.s.yaml
│ │ │ ├── nor.s.yaml
│ │ │ ├── nori.s.yaml
│ │ │ ├── or.s.yaml
│ │ │ ├── ori.s.yaml
│ │ │ ├── orn.s.yaml
│ │ │ ├── pack.s.yaml
│ │ │ ├── pcnt.s.yaml
│ │ │ ├── perm.s.yaml
│ │ │ ├── permi.s.yaml
│ │ │ ├── pick.s.yaml
│ │ │ ├── pickve.s.yaml
│ │ │ ├── pickve2gr.s.yaml
│ │ │ ├── pseudos.s.yaml
│ │ │ ├── repl128vei.s.yaml
│ │ │ ├── replgr2vr.s.yaml
│ │ │ ├── replve.s.yaml
│ │ │ ├── replve0.s.yaml
│ │ │ ├── replvei.s.yaml
│ │ │ ├── rotr.s.yaml
│ │ │ ├── sadd.s.yaml
│ │ │ ├── sat.s.yaml
│ │ │ ├── scr.s.yaml
│ │ │ ├── seq.s.yaml
│ │ │ ├── set.s.yaml
│ │ │ ├── setallnez.s.yaml
│ │ │ ├── setanyeqz.s.yaml
│ │ │ ├── shuf.s.yaml
│ │ │ ├── shuf4i.s.yaml
│ │ │ ├── signcov.s.yaml
│ │ │ ├── sle.s.yaml
│ │ │ ├── sll.s.yaml
│ │ │ ├── sllwil.s.yaml
│ │ │ ├── slt.s.yaml
│ │ │ ├── sra.s.yaml
│ │ │ ├── sran.s.yaml
│ │ │ ├── srani.s.yaml
│ │ │ ├── srar.s.yaml
│ │ │ ├── srarn.s.yaml
│ │ │ ├── srarni.s.yaml
│ │ │ ├── srl.s.yaml
│ │ │ ├── srln.s.yaml
│ │ │ ├── srlni.s.yaml
│ │ │ ├── srlr.s.yaml
│ │ │ ├── srlrn.s.yaml
│ │ │ ├── srlrni.s.yaml
│ │ │ ├── ssran.s.yaml
│ │ │ ├── ssrani.s.yaml
│ │ │ ├── ssrarn.s.yaml
│ │ │ ├── ssrarni.s.yaml
│ │ │ ├── ssrln.s.yaml
│ │ │ ├── ssrlni.s.yaml
│ │ │ ├── ssrlrn.s.yaml
│ │ │ ├── ssrlrni.s.yaml
│ │ │ ├── ssub.s.yaml
│ │ │ ├── st.s.yaml
│ │ │ ├── stelm.s.yaml
│ │ │ ├── sub.s.yaml
│ │ │ ├── subi.s.yaml
│ │ │ ├── subw.s.yaml
│ │ │ ├── valid.s.yaml
│ │ │ ├── x86-alu.s.yaml
│ │ │ ├── x86-jump.s.yaml
│ │ │ ├── x86-misc.s.yaml
│ │ │ ├── x86-shift.s.yaml
│ │ │ ├── xor.s.yaml
│ │ │ └── xori.s.yaml
│ │ ├── Mips/
│ │ │ ├── hilo-addressing.s.yaml
│ │ │ ├── invalid-xfail.txt.yaml
│ │ │ ├── invalid.txt.yaml
│ │ │ ├── mftr-mttr-aliases.s.yaml
│ │ │ ├── mftr-mttr-reserved-valid.s.yaml
│ │ │ ├── micromips-alu-instructions-EB.s.yaml
│ │ │ ├── micromips-alu-instructions.s.yaml
│ │ │ ├── micromips-branch-instructions-EB.s.yaml
│ │ │ ├── micromips-branch-instructions.s.yaml
│ │ │ ├── micromips-expansions.s.yaml
│ │ │ ├── micromips-jump-instructions-EB.s.yaml
│ │ │ ├── micromips-jump-instructions.s.yaml
│ │ │ ├── micromips-loadstore-instructions-EB.s.yaml
│ │ │ ├── micromips-loadstore-instructions.s.yaml
│ │ │ ├── micromips-loadstore-unaligned-EB.s.yaml
│ │ │ ├── micromips-loadstore-unaligned.s.yaml
│ │ │ ├── micromips-movcond-instructions-EB.s.yaml
│ │ │ ├── micromips-movcond-instructions.s.yaml
│ │ │ ├── micromips-multiply-instructions-EB.s.yaml
│ │ │ ├── micromips-multiply-instructions.s.yaml
│ │ │ ├── micromips-shift-instructions-EB.s.yaml
│ │ │ ├── micromips-shift-instructions.s.yaml
│ │ │ ├── micromips-trap-instructions-EB.s.yaml
│ │ │ ├── micromips-trap-instructions.s.yaml
│ │ │ ├── mips-alu-instructions.s.yaml
│ │ │ ├── mips-control-instructions-64.s.yaml
│ │ │ ├── mips-control-instructions.s.yaml
│ │ │ ├── mips-coprocessor-encodings.s.yaml
│ │ │ ├── mips-dsp-instructions.s.yaml
│ │ │ ├── mips-expansions.s.yaml
│ │ │ ├── mips-fpu-instructions.s.yaml
│ │ │ ├── mips-memory-instructions.s.yaml
│ │ │ ├── mips-register-names.s.yaml
│ │ │ ├── mips64-alu-instructions.s.yaml
│ │ │ ├── mips64-instructions.s.yaml
│ │ │ ├── mips64-register-names.s.yaml
│ │ │ ├── mips_directives.s.yaml
│ │ │ ├── nabi-regs.s.yaml
│ │ │ ├── set-at-directive.s.yaml
│ │ │ ├── test_2r.s.yaml
│ │ │ ├── test_2r.txt.yaml
│ │ │ ├── test_2r_msa64.txt.yaml
│ │ │ ├── test_2rf.s.yaml
│ │ │ ├── test_2rf.txt.yaml
│ │ │ ├── test_3r.s.yaml
│ │ │ ├── test_3r.txt.yaml
│ │ │ ├── test_3rf.s.yaml
│ │ │ ├── test_3rf.txt.yaml
│ │ │ ├── test_bit.s.yaml
│ │ │ ├── test_bit.txt.yaml
│ │ │ ├── test_ctrlregs.s.yaml
│ │ │ ├── test_ctrlregs.txt.yaml
│ │ │ ├── test_dlsa.txt.yaml
│ │ │ ├── test_elm.s.yaml
│ │ │ ├── test_elm.txt.yaml
│ │ │ ├── test_elm_insert.s.yaml
│ │ │ ├── test_elm_insert.txt.yaml
│ │ │ ├── test_elm_insert_msa64.txt.yaml
│ │ │ ├── test_elm_insve.s.yaml
│ │ │ ├── test_elm_insve.txt.yaml
│ │ │ ├── test_elm_msa64.txt.yaml
│ │ │ ├── test_i10.s.yaml
│ │ │ ├── test_i10.txt.yaml
│ │ │ ├── test_i5.s.yaml
│ │ │ ├── test_i5.txt.yaml
│ │ │ ├── test_i8.s.yaml
│ │ │ ├── test_i8.txt.yaml
│ │ │ ├── test_lsa.s.yaml
│ │ │ ├── test_lsa.txt.yaml
│ │ │ ├── test_mi10.s.yaml
│ │ │ ├── test_mi10.txt.yaml
│ │ │ ├── test_vec.s.yaml
│ │ │ ├── test_vec.txt.yaml
│ │ │ ├── valid-32-el.txt.yaml
│ │ │ ├── valid-32.txt.yaml
│ │ │ ├── valid-32r6-el.txt.yaml
│ │ │ ├── valid-32r6.txt.yaml
│ │ │ ├── valid-64-el.txt.yaml
│ │ │ ├── valid-64.txt.yaml
│ │ │ ├── valid-64r6-el.txt.yaml
│ │ │ ├── valid-64r6.txt.yaml
│ │ │ ├── valid-el.txt.yaml
│ │ │ ├── valid-fp64-el.txt.yaml
│ │ │ ├── valid-fp64.txt.yaml
│ │ │ ├── valid-micromips-el.txt.yaml
│ │ │ ├── valid-micromips.txt.yaml
│ │ │ ├── valid-micromips32r3.txt.yaml
│ │ │ ├── valid-mips1-el.txt.yaml
│ │ │ ├── valid-mips1.txt.yaml
│ │ │ ├── valid-mips2-el.txt.yaml
│ │ │ ├── valid-mips2.txt.yaml
│ │ │ ├── valid-mips3-el.txt.yaml
│ │ │ ├── valid-mips3.txt.yaml
│ │ │ ├── valid-mips32-el.txt.yaml
│ │ │ ├── valid-mips32.txt.yaml
│ │ │ ├── valid-mips32r2-el.txt.yaml
│ │ │ ├── valid-mips32r2.txt.yaml
│ │ │ ├── valid-mips32r3-el.txt.yaml
│ │ │ ├── valid-mips32r3.txt.yaml
│ │ │ ├── valid-mips32r5-el.txt.yaml
│ │ │ ├── valid-mips32r5.txt.yaml
│ │ │ ├── valid-mips32r6-el.txt.yaml
│ │ │ ├── valid-mips32r6.txt.yaml
│ │ │ ├── valid-mips4-el.txt.yaml
│ │ │ ├── valid-mips4.txt.yaml
│ │ │ ├── valid-mips64-el.txt.yaml
│ │ │ ├── valid-mips64-xfail.txt.yaml
│ │ │ ├── valid-mips64.txt.yaml
│ │ │ ├── valid-mips64r2-el.txt.yaml
│ │ │ ├── valid-mips64r2.txt.yaml
│ │ │ ├── valid-mips64r3-el.txt.yaml
│ │ │ ├── valid-mips64r3.txt.yaml
│ │ │ ├── valid-mips64r5-el.txt.yaml
│ │ │ ├── valid-mips64r5.txt.yaml
│ │ │ ├── valid-mips64r6-el.txt.yaml
│ │ │ ├── valid-mips64r6.txt.yaml
│ │ │ ├── valid-r2-el.txt.yaml
│ │ │ ├── valid-r2.txt.yaml
│ │ │ ├── valid-xfail-mips32.txt.yaml
│ │ │ ├── valid-xfail-mips32r2.txt.yaml
│ │ │ ├── valid-xfail-mips32r3.txt.yaml
│ │ │ ├── valid-xfail-mips32r5.txt.yaml
│ │ │ ├── valid-xfail-mips32r6.txt.yaml
│ │ │ ├── valid-xfail-mips64r2.txt.yaml
│ │ │ ├── valid-xfail-mips64r3.txt.yaml
│ │ │ ├── valid-xfail-mips64r5.txt.yaml
│ │ │ ├── valid-xfail-mips64r6.txt.yaml
│ │ │ ├── valid-xfail.txt.yaml
│ │ │ ├── valid.s.yaml
│ │ │ ├── valid.txt.yaml
│ │ │ ├── valid_R6-eva.txt.yaml
│ │ │ └── valid_preR6-eva.txt.yaml
│ │ ├── PowerPC/
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_a2.txt.yaml
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_booke.txt.yaml
│ │ │ ├── dcbt_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc32_extpid_e500_only_offset_branch_syntax_noregname_powerpc_unknown_unknown_big_endian.txt.yaml
│ │ │ ├── ppc64-encoding-bookii.s.yaml
│ │ │ ├── ppc64-encoding-bookiii.s.yaml
│ │ │ ├── ppc64-encoding-ext.s.yaml
│ │ │ ├── ppc64-encoding-fp.s.yaml
│ │ │ ├── ppc64-encoding-vmx.s.yaml
│ │ │ ├── ppc64-encoding.s.yaml
│ │ │ ├── ppc64-operands.s.yaml
│ │ │ ├── ppc64_encoding_4xx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_6xx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_bookii_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_bookiii_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_dfp_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_e500_only_offset_branch_syntax_noregname_big_endian_64_e500_spe.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_aix_os_modern_aix_as_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_aix_os_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_ext_only_offset_branch_syntax_noregname_pwr7_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_fp_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_isa31_invalid_only_offset_branch_syntax_noregname_pwr10_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_isa31_only_offset_branch_syntax_noregname_pwr10_big_endian.txt.yaml
│ │ │ ├── ppc64_encoding_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_encoding_p8htm_only_offset_branch_syntax_noregname_big_endian_64_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_p8vector_only_offset_branch_syntax_noregname_big_endian_64_pwr8.txt.yaml
│ │ │ ├── ppc64_encoding_p9vector_only_offset_branch_syntax_noregname_little_endian_64_pwr9.txt.yaml
│ │ │ ├── ppc64_encoding_vmx_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64_operands_only_offset_branch_syntax_noregname_big_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc64le_encoding_isafuture_only_offset_branch_syntax_noregname_little_endian_64_ppc_isa_future.txt.yaml
│ │ │ ├── ppc64le_encoding_only_offset_branch_syntax_noregname_little_endian_64_pwr7.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_big_endian_64_aix_os_ppc_isa_future.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_powerpc_unknown_aix_gnu_ppc_isa_future_big_endian.txt.yaml
│ │ │ ├── ppc_encoding_isafuture_only_offset_branch_syntax_noregname_ppc_isa_future_big_endian.txt.yaml
│ │ │ ├── qpx.s.yaml
│ │ │ └── vsx_only_offset_branch_syntax_noregname_pwr7_big_endian.txt.yaml
│ │ ├── RISCV/
│ │ │ ├── XCValu_valid_riscv32_riscv_xcvalu_syntax_no_alias_text.txt.yaml
│ │ │ ├── XCVbi_riscv32_riscv_xcvbi.txt.yaml
│ │ │ ├── XCVbitmanip_riscv32_riscv_xcvbitmanip.txt.yaml
│ │ │ ├── XCVelw_valid_riscv32_riscv_xcvelw.txt.yaml
│ │ │ ├── XCVmac_valid_riscv32_riscv_xcvmac_syntax_no_alias_text.txt.yaml
│ │ │ ├── XCVmem_valid_riscv32_riscv_xcvmem.txt.yaml
│ │ │ ├── XCVsimd_riscv32_riscv_xcvsimd.txt.yaml
│ │ │ ├── XTHeadBa_valid_riscv32_riscv_xtheadba.txt.yaml
│ │ │ ├── XTHeadVdot_valid_riscv64_riscv_xtheadvdot.txt.yaml
│ │ │ ├── XVentanaCondOps_valid_riscv64_xventanacondops_syntax_no_alias_text.txt.yaml
│ │ │ ├── Zawrs_valid_riscv32_zawrs_syntax_no_alias_text.txt.yaml
│ │ │ ├── add_riscv64_riscv_v.txt.yaml
│ │ │ ├── and_riscv64_riscv_v.txt.yaml
│ │ │ ├── clip_riscv64_riscv_v.txt.yaml
│ │ │ ├── compare_riscv64_riscv_v.txt.yaml
│ │ │ ├── compress_cjal_riscv32_riscv_c.txt.yaml
│ │ │ ├── compress_rv32d_riscv32_riscv_c_riscv_d.txt.yaml
│ │ │ ├── compress_rv32f_riscv32_riscv_c_riscv_f.txt.yaml
│ │ │ ├── compress_rv32i_riscv32_riscv_c.txt.yaml
│ │ │ ├── compress_rv64i_riscv64_riscv_c.txt.yaml
│ │ │ ├── compressed_zicfiss_riscv32_riscv_experimental_zicfiss__experimental_zcmop_syntax_no_alias_text.txt.yaml
│ │ │ ├── convert_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── debug_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── deprecated_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── div_riscv64_riscv_v.txt.yaml
│ │ │ ├── ext_riscv64_riscv_v.txt.yaml
│ │ │ ├── fadd_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fcompare_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fdiv_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fixups_compressed_riscv32_riscv_c.txt.yaml
│ │ │ ├── fixups_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── fmacc_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fminmax_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fmul_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fmv_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── fothers_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── freduction_riscv64_riscv_v_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── fsub_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── insn-riscv32.s.yaml
│ │ │ ├── insn-riscv64.s.yaml
│ │ │ ├── load_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── macc_riscv64_riscv_v.txt.yaml
│ │ │ ├── machine_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── mask_riscv64_riscv_v.txt.yaml
│ │ │ ├── minmax_riscv64_riscv_v.txt.yaml
│ │ │ ├── mul_riscv64_riscv_v.txt.yaml
│ │ │ ├── mv_riscv64_riscv_v.txt.yaml
│ │ │ ├── option_arch_riscv32.txt.yaml
│ │ │ ├── option_rvc_riscv32.txt.yaml
│ │ │ ├── or_riscv64_riscv_v.txt.yaml
│ │ │ ├── others_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── print_imm_hex_riscv32_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── priv_valid_riscv32_svinval_syntax_no_alias_text.txt.yaml
│ │ │ ├── reduction_riscv64_riscv_v.txt.yaml
│ │ │ ├── rv32_hypervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_immediate_riscv32_riscv_v.txt.yaml
│ │ │ ├── rv32_machine_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_supervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32_user_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32c_only_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32c_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32d_valid_riscv32_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32dc_valid_riscv32_riscv_c_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32e_valid_riscv32_riscv_e_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32f_valid_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32fc_valid_riscv32_riscv_c_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32i_only_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32i_valid_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32ih_aliases_valid_riscv32_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32ih_valid_riscv32_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32m_valid_riscv32_m_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32xtheadbs_valid_riscv32_riscv_xtheadbs.txt.yaml
│ │ │ ├── rv32xtheadfmemidx_valid_riscv32_riscv_d_riscv_xtheadfmemidx.txt.yaml
│ │ │ ├── rv32xtheadmac_valid_riscv32_riscv_xtheadmac.txt.yaml
│ │ │ ├── rv32xtheadmemidx_valid_riscv32_riscv_xtheadmemidx.txt.yaml
│ │ │ ├── rv32xtheadmempair_valid_riscv32_riscv_xtheadmempair.txt.yaml
│ │ │ ├── rv32zaamo_valid_riscv32_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zacas_valid_riscv32_experimental_zacas_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zalrsc_valid_riscv32_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zba_valid_riscv32_riscv_zba.txt.yaml
│ │ │ ├── rv32zbb_only_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zbb_valid_riscv32_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zbc_valid_riscv32_riscv_zbc.txt.yaml
│ │ │ ├── rv32zbkb_only_valid_riscv32_riscv_zbkb.txt.yaml
│ │ │ ├── rv32zbkb_valid_riscv32_riscv_zbkb.txt.yaml
│ │ │ ├── rv32zbkc_valid_riscv32_riscv_zbkc.txt.yaml
│ │ │ ├── rv32zbkx_valid_riscv32_riscv_zbkx.txt.yaml
│ │ │ ├── rv32zbs_valid_riscv32_riscv_zbs.txt.yaml
│ │ │ ├── rv32zcb_valid_riscv32_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zcmp_valid_riscv32_riscv_zcmp_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zcmt_valid_riscv32_riscv_zcmt_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zdinx_valid_riscv32_riscv_zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfa_only_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfbfmin_valid_riscv32_experimental_zfbfmin_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfh_valid_riscv32_zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfhmin_valid_riscv32_zfhmin_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zfinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zhinx_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zhinxmin_valid_riscv32_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zicbom_valid_riscv32_zicbom.txt.yaml
│ │ │ ├── rv32zicbop_valid_riscv32_zicbop.txt.yaml
│ │ │ ├── rv32zicboz_valid_riscv32_zicboz.txt.yaml
│ │ │ ├── rv32zicond_valid_riscv32_zicond.txt.yaml
│ │ │ ├── rv32zihintntl_valid_riscv32_zihintntl_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zihintntlc_valid_riscv32_zihintntl_riscv_c.txt.yaml
│ │ │ ├── rv32zihintpause_valid_riscv32_zihintpause_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv32zknd_only_valid_riscv32_zknd.txt.yaml
│ │ │ ├── rv32zkne_only_valid_riscv32_zkne.txt.yaml
│ │ │ ├── rv32zknh_only_valid_riscv32_zknh.txt.yaml
│ │ │ ├── rv32zknh_valid_riscv32_zknh.txt.yaml
│ │ │ ├── rv32zksed_valid_riscv32_zksed.txt.yaml
│ │ │ ├── rv32zksh_valid_riscv32_zksh.txt.yaml
│ │ │ ├── rv64_machine_csr_names_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64_user_csr_names_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64c_hints_valid_riscv64_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64c_valid_riscv64_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64d_valid_riscv64_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64dc_valid_riscv64_riscv_c_riscv_d_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64e_valid_riscv64_riscv_e_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64f_valid_riscv64_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64i_valid_riscv64_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64ih_valid_riscv64_h_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64m_valid_riscv64_m_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64xtheadfmemidx_valid_riscv64_riscv_d_riscv_xtheadfmemidx.txt.yaml
│ │ │ ├── rv64xtheadmac_valid_riscv64_riscv_xtheadmac.txt.yaml
│ │ │ ├── rv64xtheadmemidx_valid_riscv64_riscv_xtheadmemidx.txt.yaml
│ │ │ ├── rv64xtheadmempair_valid_riscv64_riscv_xtheadmempair.txt.yaml
│ │ │ ├── rv64zaamo_valid_riscv64_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zacas_valid_riscv64_experimental_zacas_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zalrsc_valid_riscv64_riscv_a_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zba_valid_riscv64_riscv_zba.txt.yaml
│ │ │ ├── rv64zbb_valid_riscv64_riscv_zbb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zbkb_valid_riscv64_riscv_zbkb.txt.yaml
│ │ │ ├── rv64zcb_valid_riscv64_m_riscv_zbb_riscv_zba__zcb_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zcmp_valid_riscv64_riscv_zcmp_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zdinx_valid_riscv64_riscv_zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zfh_valid_riscv64_zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zfinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zhinx_valid_riscv64_riscv_zfinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zhinxmin_valid_riscv64_riscv_zfinx__zdinx_syntax_no_alias_text.txt.yaml
│ │ │ ├── rv64zknd_only_valid_riscv64_zknd.txt.yaml
│ │ │ ├── rv64zkne_only_valid_riscv64_zkne.txt.yaml
│ │ │ ├── rv64zknh_only_valid_riscv64_zknh.txt.yaml
│ │ │ ├── rvc_hints_valid_riscv32_riscv_c_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvf_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvk_user_csr_name_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvv_user_csr_names_riscv32_riscv_f_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvzcmop_valid_riscv32_experimental_zcmop.txt.yaml
│ │ │ ├── rvzcmt_user_csr_name_riscv32_riscv_zcmt_syntax_no_alias_text.txt.yaml
│ │ │ ├── rvzimop_valid_riscv32_experimental_zimop.txt.yaml
│ │ │ ├── shift_riscv64_riscv_v.txt.yaml
│ │ │ ├── sign_injection_riscv64_riscv_v_riscv_f.txt.yaml
│ │ │ ├── store_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ │ ├── sub_riscv64_riscv_v.txt.yaml
│ │ │ ├── supervisor_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── user_csr_names_riscv32_syntax_no_alias_text.txt.yaml
│ │ │ ├── vsetvl_riscv64_riscv_v.txt.yaml
│ │ │ ├── xor_riscv64_riscv_v.txt.yaml
│ │ │ ├── xsfvcp_riscv32_riscv_v_riscv_xsfvcp.txt.yaml
│ │ │ ├── xsfvfnrclip_riscv64_riscv_v_riscv_xsfvfnrclipxfqf.txt.yaml
│ │ │ ├── xsfvfwmacc_riscv64_riscv_v_riscv_xsfvfwmaccqqq.txt.yaml
│ │ │ ├── xsfvqmacc_riscv64_riscv_v_riscv_xsfvqmaccqoq_riscv_xsfvqmaccdod.txt.yaml
│ │ │ ├── xtheadcmo_valid_riscv32_riscv_xtheadcmo.txt.yaml
│ │ │ ├── xtheadcondmov_valid_riscv32_riscv_xtheadcondmov.txt.yaml
│ │ │ ├── xtheadsync_valid_riscv32_riscv_xtheadsync.txt.yaml
│ │ │ ├── zfa_valid_riscv32_zfa_riscv_d__zfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── zfa_zfhmin_zvfh_valid_riscv32_zfa__zfhmin__zvfh_syntax_no_alias_text.txt.yaml
│ │ │ ├── zicfilp_valid_riscv32_experimental_zicfilp_syntax_no_alias_text.txt.yaml
│ │ │ ├── zicfiss_valid_riscv32_riscv_a_riscv_experimental_zicfiss_syntax_no_alias_text.txt.yaml
│ │ │ ├── zvbb_riscv32_zve32x_zvbb.txt.yaml
│ │ │ ├── zvbc_riscv32_zve64x_zvbc.txt.yaml
│ │ │ ├── zvfbfmin_riscv32_experimental_zvfbfmin.txt.yaml
│ │ │ ├── zvfbfwma_riscv32_experimental_zvfbfwma.txt.yaml
│ │ │ ├── zvkb_riscv32_zve32x_zvkb.txt.yaml
│ │ │ ├── zvkg_riscv32_zve32x_zvkg.txt.yaml
│ │ │ ├── zvkned_riscv32_zve32x_zvkned.txt.yaml
│ │ │ ├── zvknh_riscv32_zve32x_zvknha.txt.yaml
│ │ │ ├── zvksed_riscv32_zve32x_zvksed.txt.yaml
│ │ │ ├── zvksh_riscv32_zve32x_zvksh.txt.yaml
│ │ │ └── zvlsseg_riscv64_riscv_v_syntax_no_alias_text.txt.yaml
│ │ ├── Sparc/
│ │ │ ├── leon_instructions_big_endian_gr712rc.txt.yaml
│ │ │ ├── leon_instructions_big_endian_gr740.txt.yaml
│ │ │ ├── leon_instructions_big_endian_leon3.txt.yaml
│ │ │ ├── leon_instructions_big_endian_leon4.txt.yaml
│ │ │ ├── leon_instructions_big_endian_ut699.txt.yaml
│ │ │ ├── leon_pwrpsr_instruction_big_endian_gr740.txt.yaml
│ │ │ ├── sparc-alu-instructions.s.yaml
│ │ │ ├── sparc-atomic-instructions.s.yaml
│ │ │ ├── sparc-ctrl-instructions.s.yaml
│ │ │ ├── sparc-fp-instructions.s.yaml
│ │ │ ├── sparc-mem-instructions.s.yaml
│ │ │ ├── sparc-vis.s.yaml
│ │ │ ├── sparc64-alu-instructions.s.yaml
│ │ │ ├── sparc64-ctrl-instructions.s.yaml
│ │ │ ├── sparc64_alu_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc64_ctrl_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_alu_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_alu_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_assembly_exprs_big_endian.txt.yaml
│ │ │ ├── sparc_atomic_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_atomic_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_atomics_v9_big_endian.txt.yaml
│ │ │ ├── sparc_big_endian.txt.yaml
│ │ │ ├── sparc_coproc_big_endian.txt.yaml
│ │ │ ├── sparc_ctrl_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_ctrl_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_fp_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_fp_v9_big_endian.txt.yaml
│ │ │ ├── sparc_little_endian_sparcel_linux_gnu_big_endian.txt.yaml
│ │ │ ├── sparc_mem_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_mem_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_mem_v9_big_endian.txt.yaml
│ │ │ ├── sparc_mem_v9_v9_big_endian.txt.yaml
│ │ │ ├── sparc_misc_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_misc_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_special_registers_big_endian.txt.yaml
│ │ │ ├── sparc_special_registers_v9_big_endian.txt.yaml
│ │ │ ├── sparc_synthetic_instructions_big_endian.txt.yaml
│ │ │ ├── sparc_synthetic_instructions_v9_big_endian.txt.yaml
│ │ │ ├── sparc_traps_big_endian.txt.yaml
│ │ │ ├── sparc_v9_asi_v9_big_endian.txt.yaml
│ │ │ ├── sparc_v9_traps_v9_big_endian.txt.yaml
│ │ │ ├── sparc_v9_v9_big_endian.txt.yaml
│ │ │ ├── sparc_vis_v9_niagara_big_endian.txt.yaml
│ │ │ ├── sparcv8-instructions.s.yaml
│ │ │ ├── sparcv8_instructions_big_endian.txt.yaml
│ │ │ ├── sparcv9_asi_names_v9_big_endian.txt.yaml
│ │ │ └── sparcv9_atomic_instructions_v9_big_endian.txt.yaml
│ │ ├── SystemZ/
│ │ │ ├── insns-z13.txt.yaml
│ │ │ ├── insns-z14.txt.yaml
│ │ │ ├── insns-z15.txt.yaml
│ │ │ ├── insns-z16.txt.yaml
│ │ │ └── insns.txt.yaml
│ │ ├── TriCore/
│ │ │ ├── ADC_Background_Scan_1_KIT_TC275_LK.s.yaml
│ │ │ ├── ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
│ │ │ ├── J_Call_Loop.s.yaml
│ │ │ ├── LoadStore.s.yaml
│ │ │ ├── csfr.s.yaml
│ │ │ ├── debug.s.yaml
│ │ │ ├── extr_u.s.yaml
│ │ │ ├── handwrite.s.yaml
│ │ │ ├── iLLD_TC375_ADS_Bluetooth_RFCOMM.s.yaml
│ │ │ ├── ldst_br_circ.s.yaml
│ │ │ ├── rr_insn.s.yaml
│ │ │ ├── tc110.s.yaml
│ │ │ ├── tc120.s.yaml
│ │ │ ├── tc130.s.yaml
│ │ │ ├── tc131.s.yaml
│ │ │ ├── tc160.s.yaml
│ │ │ ├── tc161.s.yaml
│ │ │ ├── tc162.s.yaml
│ │ │ └── tc180.s.yaml
│ │ ├── X86/
│ │ │ ├── 3DNow.s.yaml
│ │ │ ├── address-size.s.yaml
│ │ │ ├── avx512-encodings.s.yaml
│ │ │ ├── intel-syntax-encoding.s.yaml
│ │ │ ├── x86-32-avx.s.yaml
│ │ │ ├── x86-32-fma3.s.yaml
│ │ │ ├── x86-32-ms-inline-asm.s.yaml
│ │ │ ├── x86_64-avx-clmul-encoding.s.yaml
│ │ │ ├── x86_64-avx-encoding.s.yaml
│ │ │ ├── x86_64-bmi-encoding.s.yaml
│ │ │ ├── x86_64-encoding.s.yaml
│ │ │ ├── x86_64-fma3-encoding.s.yaml
│ │ │ ├── x86_64-fma4-encoding.s.yaml
│ │ │ ├── x86_64-imm-widths.s.yaml
│ │ │ ├── x86_64-rand-encoding.s.yaml
│ │ │ ├── x86_64-rtm-encoding.s.yaml
│ │ │ ├── x86_64-tbm-encoding.s.yaml
│ │ │ └── x86_64-xop-encoding.s.yaml
│ │ └── Xtensa/
│ │ ├── arith.s.yaml
│ │ ├── branch.s.yaml
│ │ ├── call-jump.s.yaml
│ │ ├── l32r.yaml
│ │ ├── mac16.s.yaml
│ │ ├── memorder.s.yaml
│ │ ├── memory.s.yaml
│ │ ├── move.s.yaml
│ │ ├── processor-control.s.yaml
│ │ └── shift.s.yaml
│ ├── README.md
│ ├── details/
│ │ ├── README.md
│ │ ├── aarch64.yaml
│ │ ├── alpha.yaml
│ │ ├── arc.yaml
│ │ ├── arm.yaml
│ │ ├── bpf.yaml
│ │ ├── cs_common_details.yaml
│ │ ├── evm.yaml
│ │ ├── hppa.yaml
│ │ ├── loongarch.yaml
│ │ ├── m680x.yaml
│ │ ├── m68k.yaml
│ │ ├── mips.yaml
│ │ ├── mos65xx.yaml
│ │ ├── ppc.yaml
│ │ ├── riscv.yaml
│ │ ├── sh.yaml
│ │ ├── sparc.yaml
│ │ ├── systemz.yaml
│ │ ├── tms320c64x.yaml
│ │ ├── tricore.yaml
│ │ ├── wasm.yaml
│ │ ├── x86.yaml
│ │ ├── xcore.yaml
│ │ └── xtensa.yaml
│ ├── features/
│ │ └── skipdata.yaml
│ ├── integration/
│ │ ├── CMakeLists.txt
│ │ ├── README.md
│ │ ├── compat_header/
│ │ │ ├── README.md
│ │ │ ├── include/
│ │ │ │ └── compat.h
│ │ │ └── src/
│ │ │ ├── main.c
│ │ │ ├── test_arm64_compatibility_header.c
│ │ │ └── test_sysz_compatibility_header.c
│ │ ├── test_assert_macros.c
│ │ ├── test_customized_mnem.c
│ │ ├── test_iter.c
│ │ ├── test_litbase.c
│ │ ├── test_poc.c
│ │ ├── test_skipdata.c
│ │ └── test_winkernel.cpp
│ ├── issues/
│ │ ├── fuzzing.yaml
│ │ ├── issues.yaml
│ │ ├── x86-mandatory-prefixes.yaml
│ │ └── x86-prefixes.yaml
│ ├── negative/
│ │ ├── should_fail_I.yaml
│ │ ├── should_fail_II.yaml
│ │ ├── should_fail_III.yaml
│ │ ├── should_fail_IV.yaml
│ │ ├── should_fail_V.yaml
│ │ └── should_fail_VI.yaml
│ └── unit/
│ ├── CMakeLists.txt
│ ├── README.md
│ ├── include/
│ │ └── unit_test.h
│ ├── sstream.c
│ └── utils.c
├── utils.c
├── utils.h
├── windows/
│ ├── README.md
│ ├── winkernel_mm.c
│ └── winkernel_mm.h
├── windowsce/
│ ├── .gitignore
│ ├── COMPILE.md
│ ├── make_windowsce7-armv7.bat
│ └── make_windowsce8-armv7.bat
└── xcode/
├── Capstone.xcodeproj/
│ ├── project.pbxproj
│ ├── project.xcworkspace/
│ │ └── contents.xcworkspacedata
│ └── xcshareddata/
│ └── xcschemes/
│ ├── Dynamic Library.xcscheme
│ ├── Framework.xcscheme
│ ├── Static Library.xcscheme
│ └── Tests.xcscheme
├── CapstoneFramework/
│ ├── Info.plist
│ └── module.modulemap
└── README.md
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SYMBOL INDEX (4915 symbols across 468 files)
FILE: LEB128.h
function decodeULEB128 (line 24) | static inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n)
FILE: MCAsmInfo.h
type MCAsmInfoAssemblerDialect (line 10) | typedef enum {
type MCAsmInfo (line 15) | typedef struct {
FILE: MCDisassembler.h
type DecodeStatus (line 7) | typedef enum DecodeStatus {
FILE: MCFixedLenDisassembler.h
type DecoderOps (line 19) | enum DecoderOps {
FILE: MCInst.c
function MCInst_Init (line 19) | void MCInst_Init(MCInst *inst, cs_arch arch)
function MCInst_clear (line 52) | void MCInst_clear(MCInst *inst)
function MCInst_insert0 (line 58) | void MCInst_insert0(MCInst *inst, int index, MCOperand *Op)
function MCInst_setOpcode (line 71) | void MCInst_setOpcode(MCInst *inst, unsigned Op)
function MCInst_setOpcodePub (line 76) | void MCInst_setOpcodePub(MCInst *inst, unsigned Op)
function MCInst_getOpcode (line 81) | unsigned MCInst_getOpcode(const MCInst *inst)
function MCInst_getOpcodePub (line 86) | unsigned MCInst_getOpcodePub(const MCInst *inst)
function MCOperand (line 91) | MCOperand *MCInst_getOperand(MCInst *inst, unsigned i)
function MCInst_getNumOperands (line 97) | unsigned MCInst_getNumOperands(const MCInst *inst)
function MCInst_addOperand2 (line 103) | void MCInst_addOperand2(MCInst *inst, MCOperand *Op)
function MCOperand_isValid (line 111) | bool MCOperand_isValid(const MCOperand *op)
function MCOperand_isReg (line 116) | bool MCOperand_isReg(const MCOperand *op)
function MCOperand_isImm (line 121) | bool MCOperand_isImm(const MCOperand *op)
function MCOperand_isFPImm (line 126) | bool MCOperand_isFPImm(const MCOperand *op)
function MCOperand_isDFPImm (line 131) | bool MCOperand_isDFPImm(const MCOperand *op)
function MCOperand_isExpr (line 136) | bool MCOperand_isExpr(const MCOperand *op)
function MCOperand_isInst (line 141) | bool MCOperand_isInst(const MCOperand *op)
function MCOperand_getReg (line 147) | unsigned MCOperand_getReg(const MCOperand *op)
function MCOperand_setReg (line 153) | void MCOperand_setReg(MCOperand *op, unsigned Reg)
function MCOperand_getImm (line 158) | int64_t MCOperand_getImm(const MCOperand *op)
function MCOperand_getExpr (line 163) | int64_t MCOperand_getExpr(const MCOperand *op)
function MCOperand_setImm (line 168) | void MCOperand_setImm(MCOperand *op, int64_t Val)
function MCOperand_getFPImm (line 173) | double MCOperand_getFPImm(const MCOperand *op)
function MCOperand_setFPImm (line 178) | void MCOperand_setFPImm(MCOperand *op, double Val)
function MCOperand (line 183) | MCOperand *MCOperand_CreateReg1(MCInst *mcInst, unsigned Reg)
function MCOperand_CreateReg0 (line 194) | void MCOperand_CreateReg0(MCInst *mcInst, unsigned Reg)
function MCOperand (line 204) | MCOperand *MCOperand_CreateImm1(MCInst *mcInst, int64_t Val)
function MCOperand_CreateImm0 (line 215) | void MCOperand_CreateImm0(MCInst *mcInst, int64_t Val)
function MCInst_isPredicable (line 227) | bool MCInst_isPredicable(const MCInstrDesc *MIDesc)
function MCInst_handleWriteback (line 242) | void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDescTable,
function MCInst_opIsTied (line 275) | bool MCInst_opIsTied(const MCInst *MI, unsigned OpNum)
function MCInst_opIsTying (line 287) | bool MCInst_opIsTying(const MCInst *MI, unsigned OpNum)
function MCInst_getOpVal (line 294) | uint64_t MCInst_getOpVal(MCInst *MI, unsigned OpNum)
function MCInst_setIsAlias (line 307) | void MCInst_setIsAlias(MCInst *MI, bool Flag)
function MCInst_updateWithTmpMI (line 318) | void MCInst_updateWithTmpMI(MCInst *MI, MCInst *TmpMI)
function MCInst_setSoftFail (line 332) | void MCInst_setSoftFail(MCInst *MI)
FILE: MCInst.h
type MCInst (line 27) | typedef struct MCInst MCInst;
type cs_struct (line 28) | typedef struct cs_struct cs_struct;
type MCOperand (line 29) | typedef struct MCOperand MCOperand;
type MCExpr (line 30) | typedef void MCExpr;
type MCOperand (line 34) | struct MCOperand {
type MCInst (line 103) | struct MCInst {
function MCInst_isAlias (line 177) | static inline bool MCInst_isAlias(const MCInst *MI)
FILE: MCInstPrinter.c
function testFeatureBits (line 16) | static bool testFeatureBits(const MCInst *MI, uint32_t Value)
function matchAliasCondition (line 54) | static bool matchAliasCondition(MCInst *MI, const MCRegisterInfo *MRI,
function validOpToPatter (line 129) | static inline bool validOpToPatter(const PatternsForOpcode *P)
function getUseMarkup (line 196) | bool getUseMarkup(void)
function binsearch_IndexTypeEncoding (line 213) | unsigned int binsearch_IndexTypeEncoding(const struct IndexType *index,
function binsearch_IndexTypeStrEncoding (line 250) | unsigned int binsearch_IndexTypeStrEncoding(const struct IndexTypeStr *i...
FILE: MCInstPrinter.h
type MnemonicBitsInfo (line 12) | typedef struct {
type PatternsForOpcode (line 18) | typedef struct {
type AliasPattern (line 26) | typedef struct {
type AliasPatternCond_CondKind (line 33) | typedef enum {
type AliasPatternCond (line 49) | typedef struct {
type AliasMatchingData (line 58) | typedef struct {
type IndexType (line 70) | struct IndexType {
type IndexTypeStr (line 75) | struct IndexTypeStr {
type IndexType (line 82) | struct IndexType
type IndexTypeStr (line 84) | struct IndexTypeStr
FILE: MCInstrDesc.c
function MCOperandInfo_isPredicate (line 8) | bool MCOperandInfo_isPredicate(const MCOperandInfo *m)
function MCOperandInfo_isOptionalDef (line 15) | bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m)
function MCOperandInfo_isTiedToOp (line 21) | bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m)
function MCOperandInfo_getOperandConstraint (line 30) | int MCOperandInfo_getOperandConstraint(const MCInstrDesc *InstrDesc,
function MCInstrDesc (line 46) | const MCInstrDesc *MCInstrDesc_get(unsigned opcode, const MCInstrDesc *t...
FILE: MCInstrDesc.h
type MCOI_OperandConstraint (line 32) | typedef enum {
type MCOI_OperandFlags (line 46) | enum MCOI_OperandFlags {
type MCOI_OperandType (line 53) | enum MCOI_OperandType {
type MCOperandInfo (line 79) | typedef struct MCOperandInfo {
type MCInstrDesc (line 149) | typedef struct MCInstrDesc {
FILE: MCRegisterInfo.c
type DiffListIterator (line 23) | typedef struct DiffListIterator {
function MCRegisterInfo_InitMCRegisterInfo (line 28) | void MCRegisterInfo_InitMCRegisterInfo(MCRegisterInfo *RI,
function DiffListIterator_init (line 52) | static void DiffListIterator_init(DiffListIterator *d, MCPhysReg InitVal,
function DiffListIterator_getVal (line 59) | static uint16_t DiffListIterator_getVal(DiffListIterator *d)
function DiffListIterator_next (line 64) | static bool DiffListIterator_next(DiffListIterator *d)
function DiffListIterator_isValid (line 81) | static bool DiffListIterator_isValid(DiffListIterator *d)
function MCRegisterInfo_getMatchingSuperReg (line 86) | unsigned MCRegisterInfo_getMatchingSuperReg(const MCRegisterInfo *RI,
function MCRegisterInfo_getSubReg (line 112) | unsigned MCRegisterInfo_getSubReg(const MCRegisterInfo *RI, unsigned Reg,
function MCRegisterClass (line 132) | const MCRegisterClass *MCRegisterInfo_getRegClass(const MCRegisterInfo *RI,
function MCRegisterClass_contains (line 141) | bool MCRegisterClass_contains(const MCRegisterClass *c, unsigned Reg)
function MCRegisterClass_getRegister (line 160) | unsigned MCRegisterClass_getRegister(const MCRegisterClass *c, unsigned ...
FILE: MCRegisterInfo.h
type MCPhysReg (line 27) | typedef int16_t MCPhysReg;
type MCPhysReg (line 28) | typedef const MCPhysReg *iterator;
type MCRegister (line 29) | typedef uint16_t MCRegister;
type MCRegisterClass2 (line 31) | typedef struct MCRegisterClass2 {
type MCRegisterClass (line 38) | typedef struct MCRegisterClass {
type MCRegisterDesc (line 49) | typedef struct MCRegisterDesc {
type MCRegisterInfo (line 78) | typedef struct MCRegisterInfo {
FILE: Mapping.c
function cs_err (line 12) | cs_err populate_insn_map_cache(cs_struct *handle)
function insn_map (line 42) | const insn_map *lookup_insn_map(cs_struct *handle, unsigned short id)
function name2id (line 61) | int name2id(const name_map *map, int max, const char *name)
function map_add_implicit_write (line 97) | void map_add_implicit_write(MCInst *MI, uint32_t Reg)
function map_add_implicit_read (line 116) | void map_add_implicit_read(MCInst *MI, uint32_t Reg)
function map_remove_implicit_write (line 134) | void map_remove_implicit_write(MCInst *MI, uint32_t Reg)
function map_implicit_reads (line 159) | void map_implicit_reads(MCInst *MI, const insn_map *imap)
function map_implicit_writes (line 187) | void map_implicit_writes(MCInst *MI, const insn_map *imap)
function add_group (line 215) | void add_group(MCInst *MI, unsigned /* arch_group */ group)
function map_groups (line 237) | void map_groups(MCInst *MI, const insn_map *imap)
function find_cs_id (line 275) | unsigned int find_cs_id(unsigned MC_Opcode, const insn_map *imap,
function map_cs_id (line 307) | void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size)
function cs_op_type (line 322) | const cs_op_type mapping_get_op_type(MCInst *MI, unsigned OpNum,
function cs_ac_type (line 337) | const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
function map_use_alias_details (line 413) | bool map_use_alias_details(const MCInst *MI)
function map_set_fill_detail_ops (line 422) | void map_set_fill_detail_ops(MCInst *MI, bool Val)
function map_set_is_alias_insn (line 434) | void map_set_is_alias_insn(MCInst *MI, bool Val, uint64_t Alias)
function char_ends_mnem (line 442) | static inline bool char_ends_mnem(const char c, cs_arch arch)
function map_set_alias_id (line 457) | void map_set_alias_id(MCInst *MI, const SStream *O,
function enum_map_bin_search (line 490) | uint64_t enum_map_bin_search(const cs_enum_id_map *map, size_t map_len,
FILE: Mapping.h
type mapping_op (line 35) | typedef struct {
type map_insn_ops (line 45) | typedef struct {
type name_map (line 84) | typedef struct name_map {
function doing_mem (line 193) | static inline bool doing_mem(const MCInst *MI)
function set_doing_mem (line 199) | static inline void set_doing_mem(const MCInst *MI, bool status)
function detail_is_set (line 248) | static inline bool detail_is_set(const MCInst *MI)
function cs_detail (line 254) | static inline cs_detail *get_detail(const MCInst *MI)
function map_fill_detail_ops (line 269) | static inline bool map_fill_detail_ops(MCInst *MI)
type cs_enum_id_map (line 297) | typedef struct {
FILE: MathExtras.h
function Hi_32 (line 39) | static inline uint32_t Hi_32(uint64_t Value)
function Lo_32 (line 45) | static inline uint32_t Lo_32(uint64_t Value)
function isUIntN (line 52) | static inline bool isUIntN(unsigned N, uint64_t x)
function isIntN (line 59) | static inline bool isIntN(unsigned N, int64_t x)
function isShiftedIntN (line 66) | static inline bool isShiftedIntN(unsigned N, unsigned S, int64_t x)
function isShiftedUIntN (line 71) | static inline bool isShiftedUIntN(unsigned N, unsigned S, uint64_t x)
function isMask_32 (line 79) | static inline bool isMask_32(uint32_t Value)
function isMask_64 (line 87) | static inline bool isMask_64(uint64_t Value)
function isShiftedMask_32 (line 95) | static inline bool isShiftedMask_32(uint32_t Value)
function isShiftedMask_64 (line 102) | static inline bool isShiftedMask_64(uint64_t Value)
function isPowerOf2_32 (line 109) | static inline bool isPowerOf2_32(uint32_t Value)
function CountLeadingZeros_32 (line 118) | static inline unsigned CountLeadingZeros_32(uint32_t Value)
function CountLeadingOnes_32 (line 150) | static inline unsigned CountLeadingOnes_32(uint32_t Value)
function CountLeadingZeros_64 (line 159) | static inline unsigned CountLeadingZeros_64(uint64_t Value)
function CountLeadingOnes_64 (line 210) | static inline unsigned CountLeadingOnes_64(uint64_t Value)
function CountTrailingZeros_32 (line 219) | static inline unsigned CountTrailingZeros_32(uint32_t Value)
function CountTrailingZeros_8 (line 238) | static inline unsigned CountTrailingZeros_8(uint8_t Value)
function CountTrailingOnes_32 (line 257) | static inline unsigned CountTrailingOnes_32(uint32_t Value)
function CountTrailingZeros_64 (line 266) | static inline unsigned CountTrailingZeros_64(uint64_t Value)
function CountTrailingOnes_64 (line 289) | static inline unsigned CountTrailingOnes_64(uint64_t Value)
function CountPopulation_32 (line 297) | static inline unsigned CountPopulation_32(uint32_t Value)
function CountPopulation_64 (line 310) | static inline unsigned CountPopulation_64(uint64_t Value)
function Log2_32 (line 325) | static inline unsigned Log2_32(uint32_t Value)
function Log2_64 (line 335) | static inline unsigned Log2_64(uint64_t Value)
function Log2_32_Ceil (line 346) | static inline unsigned Log2_32_Ceil(uint32_t Value)
function Log2_64_Ceil (line 353) | static inline unsigned Log2_64_Ceil(uint64_t Value)
function GreatestCommonDivisor64 (line 360) | static inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B)
function BitsToDouble (line 372) | static inline double BitsToDouble(uint64_t Bits)
function BitsToFloat (line 384) | static inline float BitsToFloat(uint32_t Bits)
function DoubleToBits (line 398) | static inline uint64_t DoubleToBits(double Double)
function FloatToBits (line 412) | static inline uint32_t FloatToBits(float Float)
function MinAlign (line 424) | static inline uint64_t MinAlign(uint64_t A, uint64_t B)
function NextPowerOf2 (line 436) | static inline uint64_t NextPowerOf2(uint64_t A)
function RoundUpToAlignment (line 456) | static inline uint64_t RoundUpToAlignment(uint64_t Value, uint64_t Align)
function OffsetToAlignment (line 464) | static inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align)
function abs64 (line 472) | static inline int64_t abs64(int64_t x)
function SignExtend32 (line 481) | static inline int32_t SignExtend32(uint32_t X, unsigned B)
function SignExtend64 (line 490) | static inline int64_t SignExtend64(uint64_t X, unsigned B)
function LowSignExtend64 (line 497) | static inline int64_t LowSignExtend64(uint64_t x, unsigned len)
function OneExtend32 (line 504) | static inline int32_t OneExtend32(uint32_t X, unsigned B)
function OneExtend64 (line 511) | static inline int64_t OneExtend64(uint64_t X, unsigned B)
function countLeadingZeros (line 523) | static inline unsigned int countLeadingZeros(int x)
function get_insn_field (line 544) | static inline uint32_t get_insn_field(uint32_t insn, uint8_t from, uint8...
function get_insn_field_r (line 551) | static inline uint32_t get_insn_field_r(uint32_t insn, uint8_t from, uin...
function get_insn_bit (line 557) | static inline uint32_t get_insn_bit(uint32_t insn, uint8_t bit)
function maskTrailingOnes32 (line 564) | static inline uint32_t maskTrailingOnes32(uint32_t N)
FILE: SStream.c
function SStream_Init (line 21) | void SStream_Init(SStream *ss)
function SStream_opt_unum (line 32) | void SStream_opt_unum(SStream *ss, bool print_unsigned_numbers)
function SStream_replc_str (line 65) | void SStream_replc_str(SStream *ss, char chr, const char *rstr)
function SStream_trimls (line 84) | void SStream_trimls(SStream *ss)
function SStream_extract_mnem_opstr (line 102) | void SStream_extract_mnem_opstr(const SStream *ss, char *mnem_buf,
function SStream_Flush (line 143) | void SStream_Flush(SStream *ss, FILE *file)
function SStream_Open (line 155) | void SStream_Open(SStream *ss)
function SStream_Close (line 164) | void SStream_Close(SStream *ss)
function SStream_concat0 (line 173) | void SStream_concat0(SStream *ss, const char *s)
function SStream_concat1 (line 201) | void SStream_concat1(SStream *ss, const char c)
function SStream_concat (line 227) | void SStream_concat(SStream *ss, const char *fmt, ...)
function printInt64Bang (line 255) | void printInt64Bang(SStream *ss, int64_t val)
function printUInt64Bang (line 267) | void printUInt64Bang(SStream *ss, uint64_t val)
function printInt64 (line 276) | void printInt64(SStream *ss, int64_t val)
function printUInt64 (line 302) | void printUInt64(SStream *ss, uint64_t val)
function printInt32BangDec (line 313) | void printInt32BangDec(SStream *ss, int32_t val)
function printInt32Bang (line 327) | void printInt32Bang(SStream *ss, int32_t val)
function printUInt8 (line 339) | void printUInt8(SStream *ss, uint8_t val)
function printUInt16 (line 348) | void printUInt16(SStream *ss, uint16_t val)
function printInt8 (line 357) | void printInt8(SStream *ss, int8_t val)
function printInt16 (line 382) | void printInt16(SStream *ss, int16_t val)
function printInt16HexOffset (line 408) | void printInt16HexOffset(SStream *ss, int16_t val)
function printInt32 (line 427) | void printInt32(SStream *ss, int32_t val)
function printInt32HexOffset (line 454) | void printInt32HexOffset(SStream *ss, int32_t val)
function printInt32Hex (line 473) | void printInt32Hex(SStream *ss, int32_t val)
function printUInt32Bang (line 488) | void printUInt32Bang(SStream *ss, uint32_t val)
function printUInt32 (line 496) | void printUInt32(SStream *ss, uint32_t val)
function printFloat (line 506) | void printFloat(SStream *ss, float val)
function printfFloat (line 513) | void printfFloat(SStream *ss, const char *fmt, float val)
function printFloatBang (line 520) | void printFloatBang(SStream *ss, float val)
function printExpr (line 527) | void printExpr(SStream *ss, uint64_t val)
function SStream (line 534) | SStream *markup_OS(SStream *OS, SStreamMarkup style)
FILE: SStream.h
type SStreamMarkup (line 10) | typedef enum {
type SStream (line 19) | typedef struct SStream {
FILE: arch/AArch64/AArch64AddressingModes.h
type AArch64_AM_ShiftExtendType (line 48) | typedef enum ShiftExtendType {
function AArch64_AM_ShiftExtendType (line 105) | static inline AArch64_AM_ShiftExtendType AArch64_AM_getShiftType(unsigne...
function AArch64_AM_getShiftValue (line 124) | static inline unsigned AArch64_AM_getShiftValue(unsigned Imm)
function AArch64_AM_getShifterImm (line 138) | static inline unsigned AArch64_AM_getShifterImm(AArch64_AM_ShiftExtendTy...
function AArch64_AM_getArithShiftValue (line 168) | static inline unsigned AArch64_AM_getArithShiftValue(unsigned Imm)
function AArch64_AM_ShiftExtendType (line 174) | static inline AArch64_AM_ShiftExtendType AArch64_AM_getExtendType(unsign...
function AArch64_AM_ShiftExtendType (line 198) | static inline AArch64_AM_ShiftExtendType
function AArch64_AM_getExtendEncoding (line 213) | static inline unsigned
function AArch64_AM_getArithExtendImm (line 251) | static inline unsigned
function AArch64_AM_getMemDoShift (line 259) | static inline bool AArch64_AM_getMemDoShift(unsigned Imm)
function AArch64_AM_ShiftExtendType (line 266) | static inline AArch64_AM_ShiftExtendType
function AArch64_AM_getMemExtendImm (line 284) | static inline unsigned AArch64_AM_getMemExtendImm(AArch64_AM_ShiftExtend...
function AArch64_AM_ror (line 290) | static inline uint64_t AArch64_AM_ror(uint64_t elt, unsigned size)
function AArch64_AM_processLogicalImmediate (line 299) | static inline bool AArch64_AM_processLogicalImmediate(uint64_t Imm,
function AArch64_AM_isLogicalImmediate (line 363) | static inline bool AArch64_AM_isLogicalImmediate(uint64_t imm, unsigned ...
function AArch64_AM_encodeLogicalImmediate (line 371) | static inline uint64_t AArch64_AM_encodeLogicalImmediate(uint64_t imm,
function AArch64_AM_decodeLogicalImmediate (line 384) | static inline uint64_t AArch64_AM_decodeLogicalImmediate(uint64_t val,
function AArch64_AM_isValidDecodeLogicalImmediate (line 417) | static inline bool AArch64_AM_isValidDecodeLogicalImmediate(uint64_t val,
function AArch64_AM_getFPImmFloat (line 440) | static inline float AArch64_AM_getFPImmFloat(unsigned Imm)
function AArch64_AM_isAdvSIMDModImmType1 (line 466) | static inline bool AArch64_AM_isAdvSIMDModImmType1(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType1 (line 472) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType1(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType1 (line 477) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType1(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType2 (line 484) | static inline bool AArch64_AM_isAdvSIMDModImmType2(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType2 (line 490) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType2(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType2 (line 495) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType2(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType3 (line 502) | static inline bool AArch64_AM_isAdvSIMDModImmType3(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType3 (line 508) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType3(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType3 (line 513) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType3(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType4 (line 520) | static inline bool AArch64_AM_isAdvSIMDModImmType4(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType4 (line 526) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType4(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType4 (line 531) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType4(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType5 (line 538) | static inline bool AArch64_AM_isAdvSIMDModImmType5(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType5 (line 545) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType5(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType5 (line 550) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType5(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType6 (line 557) | static inline bool AArch64_AM_isAdvSIMDModImmType6(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType6 (line 564) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType6(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType6 (line 569) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType6(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType7 (line 576) | static inline bool AArch64_AM_isAdvSIMDModImmType7(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType7 (line 582) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType7(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType7 (line 587) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType7(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType8 (line 594) | static inline bool AArch64_AM_isAdvSIMDModImmType8(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType8 (line 600) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType8(uint8_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType8 (line 606) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType8(uint64_t Imm)
function AArch64_AM_isAdvSIMDModImmType9 (line 612) | static inline bool AArch64_AM_isAdvSIMDModImmType9(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType9 (line 619) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType9(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType9 (line 624) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType9(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType10 (line 635) | static inline bool AArch64_AM_isAdvSIMDModImmType10(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType10 (line 682) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType10(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType10 (line 711) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType10(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType11 (line 734) | static inline bool AArch64_AM_isAdvSIMDModImmType11(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType11 (line 742) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType11(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType11 (line 771) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType11(uint8_t Imm)
function AArch64_AM_isAdvSIMDModImmType12 (line 796) | static inline bool AArch64_AM_isAdvSIMDModImmType12(uint64_t Imm)
function AArch64_AM_encodeAdvSIMDModImmType12 (line 803) | static inline uint8_t AArch64_AM_encodeAdvSIMDModImmType12(uint64_t Imm)
function AArch64_AM_decodeAdvSIMDModImmType12 (line 832) | static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType12(uint8_t Imm)
function isSVECpyImm8 (line 878) | static inline bool isSVECpyImm8(int64_t Imm)
function isSVECpyImm16 (line 885) | static inline bool isSVECpyImm16(int64_t Imm)
function isSVECpyImm32 (line 893) | static inline bool isSVECpyImm32(int64_t Imm)
function isSVECpyImm64 (line 901) | static inline bool isSVECpyImm64(int64_t Imm)
function AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate (line 910) | static inline bool
function AArch64_AM_isAnyMOVZMovAlias (line 947) | inline static bool AArch64_AM_isAnyMOVZMovAlias(uint64_t Value, int RegW...
function AArch64_AM_isMOVZMovAlias (line 956) | inline static bool AArch64_AM_isMOVZMovAlias(uint64_t Value, int Shift,
function AArch64_AM_isMOVNMovAlias (line 969) | inline static bool AArch64_AM_isMOVNMovAlias(uint64_t Value, int Shift,
function AArch64_AM_isAnyMOVWMovAlias (line 983) | inline static bool AArch64_AM_isAnyMOVWMovAlias(uint64_t Value, int RegW...
FILE: arch/AArch64/AArch64BaseInfo.c
function utostr (line 123) | static void utostr(uint64_t X, bool isNeg, char *result)
function AArch64SysReg_genericRegisterString (line 145) | void AArch64SysReg_genericRegisterString(uint32_t Bits, char *result)
FILE: arch/AArch64/AArch64BaseInfo.h
function getWRegFromXReg (line 58) | static inline unsigned getWRegFromXReg(unsigned Reg)
function getXRegFromWReg (line 132) | static inline unsigned getXRegFromWReg(unsigned Reg)
function getXRegFromXRegTuple (line 206) | static inline unsigned getXRegFromXRegTuple(unsigned RegTuple)
function getBRegFromDReg (line 238) | static inline unsigned getBRegFromDReg(unsigned Reg)
function getDRegFromBReg (line 310) | static inline unsigned getDRegFromBReg(unsigned Reg)
function atomicBarrierDroppedOnZero (line 382) | static inline bool atomicBarrierDroppedOnZero(unsigned Opcode)
type SysAlias (line 467) | typedef struct SysAlias {
type SysAliasReg (line 474) | typedef struct SysAliasReg {
type SysAliasImm (line 482) | typedef struct SysAliasImm {
type AArch64SVEPredPattern_SVEPREDPAT (line 602) | typedef struct SVEPREDPAT {
type AArch64SVEVecLenSpecifier_SVEVECLENSPECIFIER (line 616) | typedef struct SVEVECLENSPECIFIER {
function getNumElementsFromSVEPredPattern (line 632) | static inline unsigned getNumElementsFromSVEPredPattern(unsigned Pattern)
function getSVEPredPatternFromNumElements (line 660) | static inline unsigned getSVEPredPatternFromNumElements(unsigned MinNumE...
type AArch64ExactFPImm_ExactFPImm (line 689) | typedef struct ExactFPImm {
type AArch64SE_ShiftExtSpecifiers (line 747) | typedef enum ShiftExtSpecifiers {
type AArch64SysReg_SysReg (line 778) | typedef struct SysReg {
type AArch64II_TOF (line 824) | typedef enum TOF {
type AArch64PACKey_ID (line 922) | typedef enum ID {
function AArch64PACKey_ID (line 954) | static inline AArch64PACKey_ID AArch64StringToPACKeyID(const char *Name)
FILE: arch/AArch64/AArch64Disassembler.c
function DecodeStatus (line 334) | static DecodeStatus getInstruction(csh handle, const uint8_t *Bytes,
function DecodeStatus (line 410) | DecodeStatus AArch64_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
function suggestBytesToSkip (line 423) | uint64_t suggestBytesToSkip(const uint8_t *Bytes, uint64_t Address)
function DecodeStatus (line 431) | static DecodeStatus DecodeFPR128RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 444) | static DecodeStatus DecodeFPR128_loRegisterClass(MCInst *Inst, unsigned ...
function DecodeStatus (line 453) | static DecodeStatus DecodeFPR128_0to7RegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 462) | static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 474) | static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 486) | static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 498) | static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 510) | static DecodeStatus DecodeGPR64commonRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 524) | static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 536) | static DecodeStatus DecodeGPR64x8ClassRegisterClass(MCInst *Inst,
function DecodeStatus (line 553) | static DecodeStatus DecodeGPR64spRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 565) | static DecodeStatus
function DecodeStatus (line 579) | static DecodeStatus
function DecodeStatus (line 593) | static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 605) | static DecodeStatus DecodeGPR32spRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 618) | static DecodeStatus DecodeZPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 631) | static DecodeStatus DecodeZPR_4bRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 640) | static DecodeStatus DecodeZPR_3bRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 649) | static DecodeStatus DecodeZPR2RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 661) | static DecodeStatus DecodeZPR3RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 673) | static DecodeStatus DecodeZPR4RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 685) | static DecodeStatus DecodeZPR2Mul2RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 697) | static DecodeStatus DecodeZPR4Mul4RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 709) | static DecodeStatus DecodeZPR2StridedRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 722) | static DecodeStatus DecodeZPR4StridedRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 735) | static DecodeStatus DecodeMatrixTileListRegisterClass(MCInst *Inst,
function DecodeStatus (line 776) | static DecodeStatus DecodePPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 788) | static DecodeStatus DecodePNRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 800) | static DecodeStatus DecodePPR_3bRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 811) | static DecodeStatus DecodePNR_p8to15RegisterClass(MCInst *Inst, unsigned...
function DecodeStatus (line 822) | static DecodeStatus DecodePPR2RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 835) | static DecodeStatus DecodePPR2Mul2RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 847) | static DecodeStatus DecodeQQRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 858) | static DecodeStatus DecodeQQQRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 869) | static DecodeStatus DecodeQQQQRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 880) | static DecodeStatus DecodeDDRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 891) | static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 902) | static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 913) | static DecodeStatus DecodeFixedPointScaleImm32(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 923) | static DecodeStatus DecodeFixedPointScaleImm64(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 931) | static DecodeStatus DecodePCRelLabel16(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 943) | static DecodeStatus DecodePCRelLabel19(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 960) | static DecodeStatus DecodeMemExtend(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 968) | static DecodeStatus DecodeMRSSystemRegister(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 980) | static DecodeStatus DecodeMSRSystemRegister(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 989) | static DecodeStatus DecodeFMOVLaneInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 1013) | static DecodeStatus DecodeVecShiftRImm(MCInst *Inst, unsigned Imm, unsig...
function DecodeStatus (line 1019) | static DecodeStatus DecodeVecShiftLImm(MCInst *Inst, unsigned Imm, unsig...
function DecodeStatus (line 1025) | static DecodeStatus DecodeVecShiftR64Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1031) | static DecodeStatus DecodeVecShiftR64ImmNarrow(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1038) | static DecodeStatus DecodeVecShiftR32Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1044) | static DecodeStatus DecodeVecShiftR32ImmNarrow(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1051) | static DecodeStatus DecodeVecShiftR16Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1057) | static DecodeStatus DecodeVecShiftR16ImmNarrow(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1064) | static DecodeStatus DecodeVecShiftR8Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1070) | static DecodeStatus DecodeVecShiftL64Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1076) | static DecodeStatus DecodeVecShiftL32Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1082) | static DecodeStatus DecodeVecShiftL16Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1088) | static DecodeStatus DecodeVecShiftL8Imm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 1094) | static DecodeStatus DecodeThreeAddrSRegInstruction(MCInst *Inst, uint32_...
function DecodeStatus (line 1157) | static DecodeStatus DecodeMoveImmInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1190) | static DecodeStatus DecodeUnsignedLdStInstruction(MCInst *Inst, uint32_t...
function DecodeStatus (line 1251) | static DecodeStatus DecodeSignedLdStInstruction(MCInst *Inst, uint32_t i...
function DecodeStatus (line 1450) | static DecodeStatus DecodeExclusiveLdStInstruction(MCInst *Inst, uint32_...
function DecodeStatus (line 1534) | static DecodeStatus DecodePairLdStInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1670) | static DecodeStatus DecodeAuthLoadInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1704) | static DecodeStatus DecodeAddSubERegInstruction(MCInst *Inst, uint32_t i...
function DecodeStatus (line 1762) | static DecodeStatus DecodeLogicalImmInstruction(MCInst *Inst, uint32_t i...
function DecodeStatus (line 1794) | static DecodeStatus DecodeModImmInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1833) | static DecodeStatus DecodeModImmTiedInstruction(MCInst *Inst, uint32_t i...
function DecodeStatus (line 1852) | static DecodeStatus DecodeAdrInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1871) | static DecodeStatus DecodeAddSubImmShift(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 1907) | static DecodeStatus DecodeUnconditionalBranch(MCInst *Inst, uint32_t insn,
function isInvalidPState (line 1924) | static bool isInvalidPState(uint64_t Op1, uint64_t Op2)
function DecodeStatus (line 1931) | static DecodeStatus DecodeSystemPStateImm0_15Instruction(MCInst *Inst,
function DecodeStatus (line 1955) | static DecodeStatus DecodeSystemPStateImm0_1Instruction(MCInst *Inst,
function DecodeStatus (line 1980) | static DecodeStatus DecodeTestAndBranch(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 2004) | static DecodeStatus DecodeGPRSeqPairsClassRegisterClass(MCInst *Inst,
function DecodeStatus (line 2020) | static DecodeStatus DecodeWSeqPairsClassRegisterClass(MCInst *Inst,
function DecodeStatus (line 2029) | static DecodeStatus DecodeXSeqPairsClassRegisterClass(MCInst *Inst,
function DecodeStatus (line 2038) | static DecodeStatus DecodeSyspXzrInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 2058) | static DecodeStatus DecodeSVELogicalImmInstruction(MCInst *Inst, uint32_...
function DecodeStatus (line 2117) | static DecodeStatus DecodeSVEIncDecImm(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 2124) | static DecodeStatus DecodeSVCROp(MCInst *Inst, unsigned Imm, uint64_t Ad...
function DecodeStatus (line 2134) | static DecodeStatus DecodeCPYMemOpInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 2160) | static DecodeStatus DecodeSETMemOpInstruction(MCInst *Inst, uint32_t insn,
function DecodeStatus (line 2185) | static DecodeStatus DecodePRFMRegInstruction(MCInst *Inst, uint32_t insn,
FILE: arch/AArch64/AArch64DisassemblerExtension.c
function AArch64_getFeatureBits (line 8) | bool AArch64_getFeatureBits(unsigned int mode, unsigned int feature)
function AArch64_testFeatureList (line 19) | bool AArch64_testFeatureList(unsigned int mode, const unsigned int *feat...
FILE: arch/AArch64/AArch64InstPrinter.c
function printRegName (line 79) | void printRegName(SStream *OS, unsigned Reg)
function printRegNameAlt (line 86) | void printRegNameAlt(SStream *OS, unsigned Reg, unsigned AltIdx)
function printInst (line 98) | void printInst(MCInst *MI, uint64_t Address, const char *Annot, SStream *O)
function printRangePrefetchAlias (line 607) | bool printRangePrefetchAlias(MCInst *MI, SStream *O, const char *Annot)
function printSysAlias (line 656) | bool printSysAlias(MCInst *MI, SStream *O)
function printSyspAlias (line 834) | bool printSyspAlias(MCInst *MI, SStream *O)
function printMatrixTile (line 974) | void printMatrixTile(MCInst *MI, unsigned OpNum, SStream *O)
function printSVCROp (line 982) | void printSVCROp(MCInst *MI, unsigned OpNum, SStream *O)
function printOperand (line 993) | void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printImm (line 1010) | void printImm(MCInst *MI, unsigned OpNo, SStream *O)
function printImmHex (line 1019) | void printImmHex(MCInst *MI, unsigned OpNo, SStream *O)
function printPostIncOperand (line 1051) | void printPostIncOperand(MCInst *MI, unsigned OpNo, unsigned Imm, SStrea...
function printVRegOperand (line 1067) | void printVRegOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printSysCROperand (line 1076) | void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O)
function printAddSubImm (line 1086) | void printAddSubImm(MCInst *MI, unsigned OpNum, SStream *O)
function printShifter (line 1125) | void printShifter(MCInst *MI, unsigned OpNum, SStream *O)
function printShiftedRegister (line 1140) | void printShiftedRegister(MCInst *MI, unsigned OpNum, SStream *O)
function printExtendedRegister (line 1147) | void printExtendedRegister(MCInst *MI, unsigned OpNum, SStream *O)
function printArithExtend (line 1154) | void printArithExtend(MCInst *MI, unsigned OpNum, SStream *O)
function printMemExtendImpl (line 1188) | static void printMemExtendImpl(bool SignExtend, bool DoShift, unsigned W...
function printMemExtend (line 1211) | void printMemExtend(MCInst *MI, unsigned OpNum, SStream *O, char SrcRegK...
function printCondCode (line 1323) | void printCondCode(MCInst *MI, unsigned OpNum, SStream *O)
function printInverseCondCode (line 1331) | void printInverseCondCode(MCInst *MI, unsigned OpNum, SStream *O)
function printAMNoIndex (line 1340) | void printAMNoIndex(MCInst *MI, unsigned OpNum, SStream *O)
function printUImm12Offset (line 1388) | void printUImm12Offset(MCInst *MI, unsigned OpNum, unsigned Scale, SStre...
function printAMIndexedWB (line 1400) | void printAMIndexedWB(MCInst *MI, unsigned OpNum, unsigned Scale, SStrea...
function printRPRFMOperand (line 1416) | void printRPRFMOperand(MCInst *MI, unsigned OpNum, SStream *O)
function printPSBHintOp (line 1466) | void printPSBHintOp(MCInst *MI, unsigned OpNum, SStream *O)
function printBTIHintOp (line 1482) | void printBTIHintOp(MCInst *MI, unsigned OpNum, SStream *O)
function printFPImmOperand (line 1498) | static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
function getNextVectorRegister (line 1512) | static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride /* =...
function printMatrixTileList (line 1808) | void printMatrixTileList(MCInst *MI, unsigned OpNum, SStream *O)
function printVectorList (line 1833) | void printVectorList(MCInst *MI, unsigned OpNum, SStream *O,
function printImplicitlyTypedVectorList (line 1967) | void printImplicitlyTypedVectorList(MCInst *MI, unsigned OpNum, SStream *O)
function printAlignedLabel (line 2028) | void printAlignedLabel(MCInst *MI, uint64_t Address, unsigned OpNum, SSt...
function printAdrLabel (line 2050) | void printAdrLabel(MCInst *MI, uint64_t Address, unsigned OpNum, SStream...
function printAdrpLabel (line 2072) | void printAdrpLabel(MCInst *MI, uint64_t Address, unsigned OpNum, SStrea...
function printAdrAdrpLabel (line 2094) | void printAdrAdrpLabel(MCInst *MI, uint64_t Address, unsigned OpNum, SSt...
function printAppleSysBarrierOption (line 2123) | void printAppleSysBarrierOption(MCInst *MI, unsigned OpNo, SStream *O)
function printBarrierOption (line 2147) | void printBarrierOption(MCInst *MI, unsigned OpNo, SStream *O)
function printBarriernXSOption (line 2173) | void printBarriernXSOption(MCInst *MI, unsigned OpNo, SStream *O)
function isValidSysReg (line 2190) | static bool isValidSysReg(const AArch64SysReg_SysReg *Reg, bool Read,
function AArch64SysReg_SysReg (line 2203) | static const AArch64SysReg_SysReg *lookupSysReg(unsigned Val, bool Read,
function printMRSSystemRegister (line 2215) | void printMRSSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
function printMSRSystemRegister (line 2246) | void printMSRSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
function printSystemPStateField (line 2277) | void printSystemPStateField(MCInst *MI, unsigned OpNo, SStream *O)
function printSIMDType10Operand (line 2300) | void printSIMDType10Operand(MCInst *MI, unsigned OpNo, SStream *O)
function printSVEPattern (line 2329) | void printSVEPattern(MCInst *MI, unsigned OpNum, SStream *O)
function printSVEVecLenSpecifier (line 2341) | void printSVEVecLenSpecifier(MCInst *MI, unsigned OpNum, SStream *O)
function printGPR64as32 (line 2565) | void printGPR64as32(MCInst *MI, unsigned OpNum, SStream *O)
function printGPR64x8 (line 2572) | void printGPR64x8(MCInst *MI, unsigned OpNum, SStream *O)
function printSyspXzrPair (line 2580) | void printSyspXzrPair(MCInst *MI, unsigned OpNum, SStream *O)
function AArch64_LLVM_printInstruction (line 2595) | void AArch64_LLVM_printInstruction(MCInst *MI, SStream *O,
FILE: arch/AArch64/AArch64Mapping.c
function aarch64_exact_fp_to_fp (line 24) | static float aarch64_exact_fp_to_fp(aarch64_exactfpimm exact)
function AArch64Layout_VectorLayout (line 53) | static AArch64Layout_VectorLayout sme_reg_to_vas(aarch64_reg reg)
function AArch64_init_mri (line 99) | void AArch64_init_mri(MCRegisterInfo *MRI)
function setup_sme_operand (line 109) | static void setup_sme_operand(MCInst *MI)
function setup_pred_operand (line 126) | static void setup_pred_operand(MCInst *MI)
function AArch64_add_vas (line 176) | void AArch64_add_vas(MCInst *MI, const SStream *OS)
function AArch64_setup_op (line 284) | void AArch64_setup_op(cs_aarch64_op *op)
function AArch64_init_cs_detail (line 291) | void AArch64_init_cs_detail(MCInst *MI)
function AArch64_check_post_index_am (line 312) | static bool AArch64_check_post_index_am(const MCInst *MI, const SStream ...
function AArch64_check_updates_flags (line 340) | static void AArch64_check_updates_flags(MCInst *MI)
function aarch64_shifter (line 382) | static aarch64_shifter id_to_shifter(unsigned Opcode)
function add_non_alias_details (line 402) | static void add_non_alias_details(MCInst *MI)
function AArch64_add_not_defined_ops (line 618) | static void AArch64_add_not_defined_ops(MCInst *MI, const SStream *OS)
function AArch64_set_instr_map_data (line 823) | void AArch64_set_instr_map_data(MCInst *MI)
function AArch64_getInstruction (line 831) | bool AArch64_getInstruction(csh handle, const uint8_t *code, size_t code...
function patch_cs_reg_alias (line 848) | static void patch_cs_reg_alias(char *asm_str)
function AArch64_add_cs_groups (line 879) | static void AArch64_add_cs_groups(MCInst *MI)
function AArch64_correct_mem_access (line 901) | static void AArch64_correct_mem_access(MCInst *MI)
function AArch64_printer (line 920) | void AArch64_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* *...
function AArch64_get_insn_id (line 949) | void AArch64_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function aarch64_insn (line 1009) | aarch64_insn AArch64_map_insn(const char *name)
function AArch64_reg_access (line 1028) | void AArch64_reg_access(const cs_insn *insn, cs_regs regs_read,
function AArch64Layout_VectorLayout (line 1152) | static AArch64Layout_VectorLayout get_vl_by_suffix(const char suffix)
function get_vec_list_num_regs (line 1175) | static unsigned get_vec_list_num_regs(MCInst *MI, unsigned Reg)
function get_vec_list_stride (line 1230) | static unsigned get_vec_list_stride(MCInst *MI, unsigned Reg)
function get_vec_list_first_reg (line 1246) | static unsigned get_vec_list_first_reg(MCInst *MI, unsigned RegL)
function is_vector_reg (line 1272) | static bool is_vector_reg(unsigned Reg)
function getNextVectorRegister (line 1283) | static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride /* =...
function aarch64_extender (line 1306) | static aarch64_extender llvm_to_cs_ext(AArch64_AM_ShiftExtendType ExtType)
function aarch64_shifter (line 1330) | static aarch64_shifter llvm_to_cs_shift(AArch64_AM_ShiftExtendType Shift...
function AArch64_set_mem_access (line 1351) | void AArch64_set_mem_access(MCInst *MI, bool status)
function add_cs_detail_begin (line 1385) | static bool add_cs_detail_begin(MCInst *MI, unsigned op_num)
function AArch64_add_cs_detail_0 (line 1403) | void AArch64_add_cs_detail_0(MCInst *MI, aarch64_op_group op_group,
function AArch64_add_cs_detail_1 (line 1859) | void AArch64_add_cs_detail_1(MCInst *MI, aarch64_op_group op_group,
function AArch64_add_cs_detail_2 (line 2193) | void AArch64_add_cs_detail_2(MCInst *MI, aarch64_op_group op_group,
function AArch64_add_cs_detail_4 (line 2381) | void AArch64_add_cs_detail_4(MCInst *MI, aarch64_op_group op_group,
function AArch64_set_detail_op_reg (line 2450) | void AArch64_set_detail_op_reg(MCInst *MI, unsigned OpNum, aarch64_reg Reg)
function prev_is_membase_wb (line 2501) | static bool prev_is_membase_wb(MCInst *MI)
function AArch64_set_detail_op_imm (line 2511) | void AArch64_set_detail_op_imm(MCInst *MI, unsigned OpNum,
function AArch64_set_detail_op_imm_range (line 2548) | void AArch64_set_detail_op_imm_range(MCInst *MI, unsigned OpNum,
function AArch64_set_detail_op_mem (line 2584) | void AArch64_set_detail_op_mem(MCInst *MI, unsigned OpNum, uint64_t Val)
function AArch64_set_detail_shift_ext (line 2630) | void AArch64_set_detail_shift_ext(MCInst *MI, unsigned OpNum, bool SignE...
function AArch64_set_detail_op_float (line 2667) | void AArch64_set_detail_op_float(MCInst *MI, unsigned OpNum, float Val)
function AArch64_set_detail_op_sys (line 2681) | void AArch64_set_detail_op_sys(MCInst *MI, unsigned OpNum, aarch64_sysop...
function AArch64_set_detail_op_pred (line 2697) | void AArch64_set_detail_op_pred(MCInst *MI, unsigned OpNum)
function AArch64_set_detail_op_sme (line 2724) | void AArch64_set_detail_op_sme(MCInst *MI, unsigned OpNum,
function insert_op (line 2799) | static void insert_op(MCInst *MI, unsigned index, cs_aarch64_op op)
function AArch64_insert_detail_op_float_at (line 2823) | void AArch64_insert_detail_op_float_at(MCInst *MI, unsigned index, doubl...
function AArch64_insert_detail_op_reg_at (line 2843) | void AArch64_insert_detail_op_reg_at(MCInst *MI, unsigned index,
function AArch64_insert_detail_op_imm_at (line 2863) | void AArch64_insert_detail_op_imm_at(MCInst *MI, unsigned index, int64_t...
function AArch64_insert_detail_op_sys (line 2878) | void AArch64_insert_detail_op_sys(MCInst *MI, unsigned index,
function AArch64_insert_detail_op_sme (line 2895) | void AArch64_insert_detail_op_sme(MCInst *MI, unsigned index,
FILE: arch/AArch64/AArch64Mapping.h
type aarch64_op_group (line 11) | typedef enum {
type aarch64_sme_op_part (line 17) | typedef enum {
FILE: arch/AArch64/AArch64Module.c
function cs_err (line 12) | cs_err AArch64_global_init(cs_struct *ud)
function cs_err (line 36) | cs_err AArch64_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/ARC/ARCDisassembler.c
function readInstruction32 (line 53) | static bool readInstruction32(const uint8_t *Bytes, size_t BytesLen,
function readInstruction64 (line 63) | static bool readInstruction64(const uint8_t *Bytes, size_t BytesLen,
function readInstruction48 (line 74) | static bool readInstruction48(const uint8_t *Bytes, size_t BytesLen,
function readInstruction16 (line 84) | static bool readInstruction16(const uint8_t *Bytes, size_t BytesLen,
function DecodeStatus (line 153) | static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 167) | static DecodeStatus DecodeGBR32ShortRegister(MCInst *Inst, unsigned RegNo,
function decodeCField (line 180) | static unsigned decodeCField(unsigned Insn)
function decodeBField (line 185) | static unsigned decodeBField(unsigned Insn)
function decodeAField (line 191) | static unsigned decodeAField(unsigned Insn)
function DecodeStatus (line 196) | static DecodeStatus DecodeMEMrs9(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeSymbolicOperandOff (line 210) | static void DecodeSymbolicOperandOff(MCInst *Inst, uint64_t Address,
function DecodeStatus (line 263) | static DecodeStatus DecodeStLImmInstruction(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 283) | static DecodeStatus DecodeLdLImmInstruction(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 305) | static DecodeStatus DecodeLdRLImmInstruction(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 329) | static DecodeStatus DecodeRegisterOrImm(MCInst *Inst, uint64_t Address,
function DecodeStatus (line 340) | static DecodeStatus DecodeMoveHRegInstruction(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 358) | static DecodeStatus DecodeCCRU6Instruction(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 377) | static DecodeStatus DecodeSOPwithRU6(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 391) | static DecodeStatus DecodeSOPwithRS12(MCInst *Inst, uint64_t Insn,
function DecodeStatus (line 408) | static DecodeStatus getInstruction(MCInst *Instr, uint64_t *Size,
function DecodeStatus (line 473) | DecodeStatus ARC_LLVM_getInstruction(MCInst *MI, uint64_t *Size,
FILE: arch/ARC/ARCInfo.h
type ARCCC_CondCode (line 36) | typedef enum ARCCondCode {
type ARCCC_BRCondCode (line 57) | typedef enum BRCondCode {
FILE: arch/ARC/ARCInstPrinter.c
function printRegName (line 114) | static void printRegName(SStream *OS, MCRegister Reg)
function printInst (line 119) | static void printInst(MCInst *MI, uint64_t Address, const char *Annot,
function printOperand (line 125) | static void printOperand(MCInst *MI, unsigned OpNum, SStream *O)
function printOperandAddr (line 138) | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum,
function printMemOperandRI (line 144) | static void printMemOperandRI(MCInst *MI, unsigned OpNum, SStream *O)
function printPredicateOperand (line 156) | static void printPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O)
function printBRCCPredicateOperand (line 166) | static void printBRCCPredicateOperand(MCInst *MI, unsigned OpNum, SStrea...
function printCCOperand (line 175) | static void printCCOperand(MCInst *MI, int OpNum, SStream *O)
function printU6ShiftedBy (line 182) | static void printU6ShiftedBy(unsigned ShiftBy, MCInst *MI, int OpNum,
function printU6 (line 196) | static void printU6(MCInst *MI, int OpNum, SStream *O)
function ARC_LLVM_printInst (line 202) | void ARC_LLVM_printInst(MCInst *MI, uint64_t Address, const char *Annot,
FILE: arch/ARC/ARCMapping.c
function ARC_init_mri (line 27) | void ARC_init_mri(MCRegisterInfo *MRI)
function ARC_get_insn_id (line 41) | void ARC_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function ARC_reg_access (line 83) | void ARC_reg_access(const cs_insn *insn, cs_regs regs_read,
function ARC_set_instr_map_data (line 129) | void ARC_set_instr_map_data(MCInst *MI)
function ARC_getInstruction (line 137) | bool ARC_getInstruction(csh handle, const uint8_t *code, size_t code_len,
function ARC_printer (line 153) | void ARC_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
function ARC_setup_op (line 161) | void ARC_setup_op(cs_arc_op *op)
function ARC_init_cs_detail (line 167) | void ARC_init_cs_detail(MCInst *MI)
function ARC_set_detail_op_imm (line 184) | void ARC_set_detail_op_imm(MCInst *MI, unsigned OpNum, arc_op_type ImmType,
function ARC_set_detail_op_reg (line 199) | void ARC_set_detail_op_reg(MCInst *MI, unsigned OpNum, arc_reg Reg)
function ARC_add_cs_detail_0 (line 212) | void ARC_add_cs_detail_0(MCInst *MI, int op_group, size_t OpNum)
FILE: arch/ARC/ARCMapping.h
type arc_op_group (line 11) | typedef enum {
FILE: arch/ARC/ARCModule.c
function cs_err (line 13) | cs_err ARC_global_init(cs_struct *ud)
function cs_err (line 38) | cs_err ARC_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/ARM/ARMAddressingModes.h
type ARM_AM_ShiftOpc (line 42) | typedef enum ShiftOpc {
type ARM_AM_AddrOpc (line 52) | typedef enum AddrOpc { ARM_AM_sub = 0, ARM_AM_add } ARM_AM_AddrOpc;
function ARM_AM_getShiftOpcEncoding (line 79) | static inline unsigned ARM_AM_getShiftOpcEncoding(ARM_AM_ShiftOpc Op)
type ARM_AM_SubMode (line 95) | typedef enum AMSubMode {
function ARM_AM_rotr32 (line 132) | static inline unsigned ARM_AM_rotr32(unsigned Val, unsigned Amt)
function ARM_AM_rotl32 (line 143) | static inline unsigned ARM_AM_rotl32(unsigned Val, unsigned Amt)
function ARM_AM_getSORegOpc (line 148) | static inline unsigned ARM_AM_getSORegOpc(ARM_AM_ShiftOpc ShOp, unsigned...
function ARM_AM_getSORegOffset (line 153) | static inline unsigned ARM_AM_getSORegOffset(unsigned Op)
function ARM_AM_ShiftOpc (line 158) | static inline ARM_AM_ShiftOpc ARM_AM_getSORegShOp(unsigned Op)
function ARM_AM_getSOImmValImm (line 165) | static inline unsigned ARM_AM_getSOImmValImm(unsigned Imm)
function ARM_AM_getSOImmValRot (line 172) | static inline unsigned ARM_AM_getSOImmValRot(unsigned Imm)
function ARM_AM_getSOImmValRotate (line 181) | static inline unsigned ARM_AM_getSOImmValRotate(unsigned Imm)
function ARM_AM_getSOImmVal (line 218) | static inline int ARM_AM_getSOImmVal(unsigned Arg)
function ARM_AM_isSOImmTwoPartVal (line 237) | static inline bool ARM_AM_isSOImmTwoPartVal(unsigned V)
function ARM_AM_getSOImmTwoPartFirst (line 251) | static inline unsigned ARM_AM_getSOImmTwoPartFirst(unsigned V)
function ARM_AM_getSOImmTwoPartSecond (line 258) | static inline unsigned ARM_AM_getSOImmTwoPartSecond(unsigned V)
function ARM_AM_isSOImmTwoPartValNeg (line 272) | static inline bool ARM_AM_isSOImmTwoPartValNeg(unsigned V)
function ARM_AM_getThumbImmValShift (line 285) | static inline unsigned ARM_AM_getThumbImmValShift(unsigned Imm)
function ARM_AM_isThumbImmShiftedVal (line 298) | static inline bool ARM_AM_isThumbImmShiftedVal(unsigned V)
function ARM_AM_getThumbImm16ValShift (line 307) | static inline unsigned ARM_AM_getThumbImm16ValShift(unsigned Imm)
function ARM_AM_isThumbImm16ShiftedVal (line 320) | static inline bool ARM_AM_isThumbImm16ShiftedVal(unsigned V)
function ARM_AM_getThumbImmNonShiftedVal (line 329) | static inline unsigned ARM_AM_getThumbImmNonShiftedVal(unsigned V)
function ARM_AM_getT2SOImmValSplatVal (line 343) | static inline int ARM_AM_getT2SOImmValSplatVal(unsigned V)
function ARM_AM_getT2SOImmValRotateVal (line 372) | static inline int ARM_AM_getT2SOImmValRotateVal(unsigned V)
function ARM_AM_getT2SOImmVal (line 390) | static inline int ARM_AM_getT2SOImmVal(unsigned Arg)
function ARM_AM_getT2SOImmValRotate (line 405) | static inline unsigned ARM_AM_getT2SOImmValRotate(unsigned V)
function ARM_AM_isT2SOImmTwoPartVal (line 414) | static inline bool ARM_AM_isT2SOImmTwoPartVal(unsigned Imm)
function ARM_AM_getT2SOImmTwoPartFirst (line 444) | static inline unsigned ARM_AM_getT2SOImmTwoPartFirst(unsigned Imm)
function ARM_AM_getT2SOImmTwoPartSecond (line 463) | static inline unsigned ARM_AM_getT2SOImmTwoPartSecond(unsigned Imm)
function ARM_AM_getAM2Opc (line 491) | static inline unsigned ARM_AM_getAM2Opc(ARM_AM_AddrOpc Opc, unsigned Imm12,
function ARM_AM_getAM2Offset (line 499) | static inline unsigned ARM_AM_getAM2Offset(unsigned AM2Opc)
function ARM_AM_AddrOpc (line 504) | static inline ARM_AM_AddrOpc ARM_AM_getAM2Op(unsigned AM2Opc)
function ARM_AM_ShiftOpc (line 509) | static inline ARM_AM_ShiftOpc ARM_AM_getAM2ShiftOpc(unsigned AM2Opc)
function ARM_AM_getAM2IdxMode (line 514) | static inline unsigned ARM_AM_getAM2IdxMode(unsigned AM2Opc)
function ARM_AM_getAM3Opc (line 533) | static inline unsigned ARM_AM_getAM3Opc(ARM_AM_AddrOpc Opc,
function ARM_AM_getAM3Offset (line 540) | static inline unsigned char ARM_AM_getAM3Offset(unsigned AM3Opc)
function ARM_AM_AddrOpc (line 545) | static inline ARM_AM_AddrOpc ARM_AM_getAM3Op(unsigned AM3Opc)
function ARM_AM_getAM3IdxMode (line 550) | static inline unsigned ARM_AM_getAM3IdxMode(unsigned AM3Opc)
function ARM_AM_SubMode (line 569) | static inline ARM_AM_SubMode ARM_AM_getAM4SubMode(unsigned Mode)
function ARM_AM_getAM4ModeImm (line 574) | static inline unsigned ARM_AM_getAM4ModeImm(ARM_AM_SubMode SubMode)
function ARM_AM_getAM5Opc (line 590) | static inline unsigned ARM_AM_getAM5Opc(ARM_AM_AddrOpc Opc,
function ARM_AM_getAM5Offset (line 597) | static inline unsigned char ARM_AM_getAM5Offset(unsigned AM5Opc)
function ARM_AM_AddrOpc (line 602) | static inline ARM_AM_AddrOpc ARM_AM_getAM5Op(unsigned AM5Opc)
function ARM_AM_getAM5FP16Opc (line 618) | static inline unsigned ARM_AM_getAM5FP16Opc(ARM_AM_AddrOpc Opc,
function ARM_AM_getAM5FP16Offset (line 625) | static inline unsigned char ARM_AM_getAM5FP16Offset(unsigned AM5Opc)
function ARM_AM_AddrOpc (line 630) | static inline ARM_AM_AddrOpc ARM_AM_getAM5FP16Op(unsigned AM5Opc)
function ARM_AM_createVMOVModImm (line 658) | static inline unsigned ARM_AM_createVMOVModImm(unsigned OpCmode, unsigne...
function ARM_AM_getVMOVModImmOpCmode (line 663) | static inline unsigned ARM_AM_getVMOVModImmOpCmode(unsigned ModImm)
function ARM_AM_getVMOVModImmVal (line 668) | static inline unsigned ARM_AM_getVMOVModImmVal(unsigned ModImm)
function ARM_AM_decodeVMOVModImm (line 676) | static inline uint64_t ARM_AM_decodeVMOVModImm(unsigned ModImm,
function ARM_AM_isNEONBytesplat (line 716) | static inline bool ARM_AM_isNEONBytesplat(unsigned Value, unsigned Size)
function ARM_AM_isNEONi16splat (line 729) | static inline bool ARM_AM_isNEONi16splat(unsigned Value)
function ARM_AM_encodeNEONi16splat (line 738) | static inline unsigned ARM_AM_encodeNEONi16splat(unsigned Value)
function ARM_AM_isNEONi32splat (line 749) | static inline bool ARM_AM_isNEONi32splat(unsigned Value)
function ARM_AM_encodeNEONi32splat (line 756) | static inline unsigned ARM_AM_encodeNEONi32splat(unsigned Value)
function ARM_AM_getFPImmFloat (line 771) | static inline float ARM_AM_getFPImmFloat(unsigned Imm)
FILE: arch/ARM/ARMBaseInfo.c
function ARMSysReg_MClassSysReg (line 80) | const ARMSysReg_MClassSysReg *
function ARMSysReg_MClassSysReg (line 88) | const ARMSysReg_MClassSysReg *
function ARMSysReg_MClassSysReg (line 96) | const ARMSysReg_MClassSysReg *
FILE: arch/ARM/ARMBaseInfo.h
type ARMSysReg_MClassSysReg (line 32) | typedef struct MClassSysReg {
function hasRequiredFeatures (line 42) | static inline bool hasRequiredFeatures(const ARMSysReg_MClassSysReg *The...
function MClassSysReg_isInRequiredFeatures (line 50) | static inline bool
type ARMBankedReg_BankedReg (line 75) | typedef struct BankedReg {
type ARM_PROC_IMod (line 85) | typedef enum IMod { ARM_PROC_IE = 2, ARM_PROC_ID = 3 } ARM_PROC_IMod;
type ARM_PROC_IFlags (line 87) | typedef enum IFlags {
type ARM_TSB_TraceSyncBOpt (line 159) | typedef enum TraceSyncBOpt { ARM_TSB_CSYNC = 0 } ARM_TSB_TraceSyncBOpt;
type ARM_ISB_InstSyncBOpt (line 173) | typedef enum InstSyncBOpt {
function isARMLowRegister (line 237) | static inline bool isARMLowRegister(unsigned Reg)
type ARMII_IndexMode (line 258) | typedef enum IndexMode {
type ARMII_AddrMode (line 266) | typedef enum AddrMode {
type ARMII_TOF (line 348) | typedef enum TOF {
FILE: arch/ARM/ARMDisassembler.c
type DecodeStatus (line 579) | typedef DecodeStatus OperandDecoder(MCInst *Inst, unsigned Val,
function DecodeStatus (line 609) | static DecodeStatus checkDecodedInstruction(MCInst *MI, uint32_t Insn,
function DecodeStatus (line 640) | static DecodeStatus getARMInstruction(csh ud, const uint8_t *Bytes,
function tryAddingSymbolicOperand (line 715) | static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value,
function tryAddingPcLoadReferenceComment (line 735) | static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value,
function AddThumb1SBit (line 745) | static void AddThumb1SBit(MCInst *MI, bool InITBlock)
function isVectorPredicable (line 771) | static bool isVectorPredicable(unsigned Opcode)
function DecodeStatus (line 788) | DecodeStatus AddThumbPredicate(MCInst *MI)
function UpdateThumbVFPPredicate (line 920) | static void UpdateThumbVFPPredicate(DecodeStatus S, MCInst *MI)
function DecodeStatus (line 955) | static DecodeStatus getThumbInstruction(csh ud, const uint8_t *Bytes,
function DecodeStatus (line 1155) | static DecodeStatus getInstruction(csh ud, const uint8_t *Bytes,
function DecodeStatus (line 1180) | static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1192) | static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1207) | static DecodeStatus DecodeGPRnopcRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1221) | static DecodeStatus DecodeGPRnospRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1235) | static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 1250) | static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst *Inst, unsigned ...
function DecodeStatus (line 1268) | static DecodeStatus DecodeGPRwithZRnospRegisterClass(MCInst *Inst,
function DecodeStatus (line 1280) | static DecodeStatus DecodetGPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1294) | static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1313) | static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 1328) | static DecodeStatus DecodeGPRspRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1340) | static DecodeStatus DecodetcGPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1372) | static DecodeStatus DecoderGPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1394) | static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1406) | static DecodeStatus DecodeHPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1420) | static DecodeStatus DecodeDPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1434) | static DecodeStatus DecodeDPR_8RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1443) | static DecodeStatus DecodeSPR_8RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1452) | static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 1466) | static DecodeStatus DecodeQPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1488) | static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1509) | static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 1521) | static DecodeStatus DecodePredicateOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1546) | static DecodeStatus DecodeCCOutOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1556) | static DecodeStatus DecodeSORegImmOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1594) | static DecodeStatus DecodeSORegRegOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1630) | static DecodeStatus DecodeRegListOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1687) | static DecodeStatus DecodeSPRRegListOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1714) | static DecodeStatus DecodeDPRRegListOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1742) | static DecodeStatus DecodeBitfieldMaskOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 1772) | static DecodeStatus DecodeCopMemInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 1952) | static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned...
function DecodeStatus (line 2062) | static DecodeStatus DecodeSORegMemOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2106) | static DecodeStatus DecodeTSBInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2120) | static DecodeStatus DecodeAddrMode3Instruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2318) | static DecodeStatus DecodeRFEInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2348) | static DecodeStatus DecodeQADDInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2372) | static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst *Inst,
function DecodeStatus (line 2466) | static DecodeStatus DecodeHINTInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2488) | static DecodeStatus DecodeCPSInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2539) | static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2587) | static DecodeStatus DecodeT2HintSpaceInstruction(MCInst *Inst, unsigned ...
function DecodeStatus (line 2613) | static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2640) | static DecodeStatus DecodeArmMOVTWInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2670) | static DecodeStatus DecodeSMLAInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2699) | static DecodeStatus DecodeTSTInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2721) | static DecodeStatus DecodeSETPANInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2748) | static DecodeStatus DecodeAddrModeImm12Operand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2773) | static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2795) | static DecodeStatus DecodeAddrMode5FP16Operand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2819) | static DecodeStatus DecodeAddrMode7Operand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2826) | static DecodeStatus DecodeT2BInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2854) | static DecodeStatus DecodeBranchImmInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 2888) | static DecodeStatus DecodeAddrMode6Operand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 2907) | static DecodeStatus DecodeVLDInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3207) | static DecodeStatus DecodeVLDST1Instruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3225) | static DecodeStatus DecodeVLDST2Instruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3245) | static DecodeStatus DecodeVLDST3Instruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3262) | static DecodeStatus DecodeVLDST4Instruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3275) | static DecodeStatus DecodeVSTInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3557) | static DecodeStatus DecodeVLD1DupInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3614) | static DecodeStatus DecodeVLD2DupInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3678) | static DecodeStatus DecodeVLD3DupInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3719) | static DecodeStatus DecodeVLD4DupInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3778) | static DecodeStatus DecodeVMOVModImmInstruction(MCInst *Inst, unsigned I...
function DecodeStatus (line 3829) | static DecodeStatus DecodeMVEModImmInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3859) | static DecodeStatus DecodeMVEVADCInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3887) | static DecodeStatus DecodeVSHLMaxInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3908) | static DecodeStatus DecodeShiftRight8Imm(MCInst *Inst, unsigned Val,
function DecodeStatus (line 3915) | static DecodeStatus DecodeShiftRight16Imm(MCInst *Inst, unsigned Val,
function DecodeStatus (line 3922) | static DecodeStatus DecodeShiftRight32Imm(MCInst *Inst, unsigned Val,
function DecodeStatus (line 3929) | static DecodeStatus DecodeShiftRight64Imm(MCInst *Inst, unsigned Val,
function DecodeStatus (line 3936) | static DecodeStatus DecodeTBLInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 3976) | static DecodeStatus DecodeThumbAddSpecialReg(MCInst *Inst, uint16_t Insn,
function DecodeStatus (line 4002) | static DecodeStatus DecodeThumbBROperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4012) | static DecodeStatus DecodeT2BROperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4022) | static DecodeStatus DecodeThumbCmpBROperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4032) | static DecodeStatus DecodeThumbAddrModeRR(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4048) | static DecodeStatus DecodeThumbAddrModeIS(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4063) | static DecodeStatus DecodeThumbAddrModePC(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4075) | static DecodeStatus DecodeThumbAddrModeSP(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4084) | static DecodeStatus DecodeT2AddrModeSOReg(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4114) | static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4196) | static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4279) | static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4358) | static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn, uint64_t ...
function DecodeStatus (line 4398) | static DecodeStatus DecodeT2LoadLabel(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4450) | static DecodeStatus DecodeT2Imm8S4(MCInst *Inst, unsigned Val, uint64_t ...
function DecodeStatus (line 4466) | static DecodeStatus DecodeT2Imm7S4(MCInst *Inst, unsigned Val, uint64_t ...
function DecodeStatus (line 4482) | static DecodeStatus DecodeT2AddrModeImm8s4(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4499) | static DecodeStatus DecodeT2AddrModeImm7s4(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4516) | static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4533) | static DecodeStatus DecodeT2Imm8(MCInst *Inst, unsigned Val, uint64_t Ad...
function DecodeStatus (line 4567) | static DecodeStatus DecodeT2AddrModeImm8(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4666) | static DecodeStatus DecodeT2LdStPre(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4730) | static DecodeStatus DecodeT2AddrModeImm12(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4757) | static DecodeStatus DecodeThumbAddSPImm(MCInst *Inst, uint16_t Insn,
function DecodeStatus (line 4769) | static DecodeStatus DecodeThumbAddSPReg(MCInst *Inst, uint16_t Insn,
function DecodeStatus (line 4798) | static DecodeStatus DecodeThumbCPS(MCInst *Inst, uint16_t Insn,
function DecodeStatus (line 4810) | static DecodeStatus DecodePostIdxReg(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4824) | static DecodeStatus DecodeMveAddrModeRQ(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4867) | static DecodeStatus DecodeThumbBLXOffset(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4891) | static DecodeStatus DecodeCoprocessor(MCInst *Inst, unsigned Val,
function DecodeStatus (line 4904) | static DecodeStatus DecodeThumbTableBranch(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4922) | static DecodeStatus DecodeThumb2BCCInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 4966) | static DecodeStatus DecodeT2SOImm(MCInst *Inst, unsigned Val, uint64_t A...
function DecodeStatus (line 4998) | static DecodeStatus DecodeThumbBCCTargetOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 5009) | static DecodeStatus DecodeThumbBLTargetOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 5034) | static DecodeStatus DecodeMemBarrierOption(MCInst *Inst, unsigned Val,
function DecodeStatus (line 5045) | static DecodeStatus DecodeInstSyncBarrierOption(MCInst *Inst, unsigned Val,
function DecodeStatus (line 5056) | static DecodeStatus DecodeMSRMask(MCInst *Inst, unsigned Val, uint64_t A...
function DecodeStatus (line 5164) | static DecodeStatus DecodeBankedReg(MCInst *Inst, unsigned Val,
function DecodeStatus (line 5180) | static DecodeStatus DecodeDoubleRegLoad(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5202) | static DecodeStatus DecodeDoubleRegStore(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5228) | static DecodeStatus DecodeLDRPreImm(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5255) | static DecodeStatus DecodeLDRPreReg(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5285) | static DecodeStatus DecodeSTRPreImm(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5312) | static DecodeStatus DecodeSTRPreReg(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 5339) | static DecodeStatus DecodeVLD1LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5411) | static DecodeStatus DecodeVST1LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5481) | static DecodeStatus DecodeVLD2LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5553) | static DecodeStatus DecodeVST2LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5620) | static DecodeStatus DecodeVLD3LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5697) | static DecodeStatus DecodeVST3LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5765) | static DecodeStatus DecodeVLD4LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5857) | static DecodeStatus DecodeVST4LN(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 5937) | static DecodeStatus DecodeVMOVSRR(MCInst *Inst, unsigned Insn, uint64_t ...
function DecodeStatus (line 5964) | static DecodeStatus DecodeVMOVRRS(MCInst *Inst, unsigned Insn, uint64_t ...
function DecodeStatus (line 5991) | static DecodeStatus DecodeIT(MCInst *Inst, unsigned Insn, uint64_t Address,
function DecodeStatus (line 6021) | static DecodeStatus DecodeT2LDRDPreInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 6059) | static DecodeStatus DecodeT2STRDPreInstruction(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 6095) | static DecodeStatus DecodeT2Adr(MCInst *Inst, uint32_t Insn, uint64_t Ad...
function DecodeStatus (line 6124) | static DecodeStatus DecodeT2ShifterImmOperand(MCInst *Inst, uint32_t Val,
function DecodeStatus (line 6137) | static DecodeStatus DecodeSwap(MCInst *Inst, unsigned Insn, uint64_t Add...
function DecodeStatus (line 6165) | static DecodeStatus DecodeVCVTD(MCInst *Inst, unsigned Insn, uint64_t Ad...
function DecodeStatus (line 6227) | static DecodeStatus DecodeVCVTQ(MCInst *Inst, unsigned Insn, uint64_t Ad...
function DecodeStatus (line 6289) | static DecodeStatus DecodeNEONComplexLane64Instruction(MCInst *Inst,
function DecodeStatus (line 6328) | static DecodeStatus DecodeLDR(MCInst *Inst, unsigned Val, uint64_t Address,
function DecodeStatus (line 6356) | static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6407) | static DecodeStatus DecodeForVMRSandVMSR(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6490) | static DecodeStatus DecodeBFAfterTargetOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6502) | static DecodeStatus DecodePredNoALOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6511) | static DecodeStatus DecodeLOLoop(MCInst *Inst, unsigned Insn, uint64_t A...
function DecodeStatus (line 6585) | static DecodeStatus DecodeLongShiftOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6599) | static DecodeStatus DecodetGPROddRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 6611) | static DecodeStatus DecodetGPREvenRegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 6623) | static DecodeStatus DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst *Inst,
function DecodeStatus (line 6642) | static DecodeStatus DecodeVSCCLRM(MCInst *Inst, unsigned Insn, uint64_t ...
function DecodeStatus (line 6671) | static DecodeStatus DecodeMQPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 6687) | static DecodeStatus DecodeMQQPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 6703) | static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 6715) | static DecodeStatus DecodeVPTMaskOperand(MCInst *Inst, unsigned Val,
function DecodeStatus (line 6746) | static DecodeStatus DecodeVpredROperand(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 6759) | static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst *Inst,
function DecodeStatus (line 6768) | static DecodeStatus DecodeRestrictedSPredicateOperand(MCInst *Inst,
function DecodeStatus (line 6792) | static DecodeStatus DecodeRestrictedUPredicateOperand(MCInst *Inst,
function DecodeStatus (line 6801) | static DecodeStatus DecodeRestrictedFPPredicateOperand(MCInst *Inst,
function DecodeStatus (line 6834) | static DecodeStatus DecodeVCVTImmOperand(MCInst *Inst, unsigned Val,
function FixedRegForVSTRVLDR_SYSREG (line 6863) | static unsigned FixedRegForVSTRVLDR_SYSREG(unsigned Opcode)
function DecodeStatus (line 6931) | static inline DecodeStatus DecodeMVE_MEM_pre(MCInst *Inst, unsigned Val,
function DecodeStatus (line 7024) | static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 7050) | static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 7078) | static DecodeStatus DecodeMVEOverlappingLongShift(MCInst *Inst, unsigned...
function DecodeStatus (line 7167) | static DecodeStatus DecodeMVEVCVTt1fp(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 7240) | static DecodeStatus DecodeMveVCTP(MCInst *Inst, unsigned Insn, uint64_t ...
function DecodeStatus (line 7251) | static DecodeStatus DecodeMVEVPNOT(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 7260) | static DecodeStatus DecodeT2AddSubSPImm(MCInst *Inst, unsigned Insn,
function DecodeStatus (line 7299) | DecodeStatus ARM_LLVM_getInstruction(csh handle, const uint8_t *code,
FILE: arch/ARM/ARMDisassemblerExtension.c
function ITBlock_push_back (line 8) | bool ITBlock_push_back(ARM_ITBlock *it, char v)
function ITBlock_instrInITBlock (line 21) | bool ITBlock_instrInITBlock(ARM_ITBlock *it)
function ITBlock_instrLastInITBlock (line 27) | bool ITBlock_instrLastInITBlock(ARM_ITBlock *it)
function ITBlock_getITCC (line 33) | unsigned ITBlock_getITCC(ARM_ITBlock *it)
function ITBlock_advanceITState (line 44) | void ITBlock_advanceITState(ARM_ITBlock *it)
function ITBlock_setITState (line 52) | void ITBlock_setITState(ARM_ITBlock *it, char Firstcond, char Mask)
function VPTBlock_push_back (line 66) | bool VPTBlock_push_back(ARM_VPTBlock *it, char v)
function VPTBlock_instrInVPTBlock (line 78) | bool VPTBlock_instrInVPTBlock(ARM_VPTBlock *VPT)
function VPTBlock_getVPTPred (line 83) | unsigned VPTBlock_getVPTPred(ARM_VPTBlock *VPT)
function VPTBlock_advanceVPTState (line 91) | void VPTBlock_advanceVPTState(ARM_VPTBlock *VPT)
function VPTBlock_setVPTState (line 96) | void VPTBlock_setVPTState(ARM_VPTBlock *VPT, char Mask)
function isValidCoprocessorNumber (line 117) | bool isValidCoprocessorNumber(MCInst *Inst, unsigned Num)
function ARM_isVpred (line 139) | bool ARM_isVpred(arm_op_type op)
function isVPTOpcode (line 149) | bool isVPTOpcode(int Opc)
function ARM_isCDECoproc (line 166) | bool ARM_isCDECoproc(size_t Coproc, const MCInst *MI)
function ARM_getFeatureBits (line 178) | bool ARM_getFeatureBits(unsigned int mode, unsigned int feature)
FILE: arch/ARM/ARMInstPrinter.c
function translateShiftImm (line 64) | unsigned translateShiftImm(unsigned imm)
function printRegImmShift (line 75) | static inline void printRegImmShift(MCInst *MI, SStream *O,
function printPredicateOperand (line 97) | static void printPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O)
function printRegName (line 109) | static void printRegName(SStream *OS, unsigned RegNo)
function printOperand (line 116) | static inline void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printRegisterList (line 133) | static inline void printRegisterList(MCInst *MI, unsigned OpNum, SStream...
function printSBitModifierOperand (line 148) | static inline void printSBitModifierOperand(MCInst *MI, unsigned OpNum,
function printOperandAddr (line 157) | static inline void printOperandAddr(MCInst *MI, uint64_t Address,
function printThumbLdrLabelOperand (line 187) | static inline void printThumbLdrLabelOperand(MCInst *MI, unsigned OpNum,
function printSORegRegOperand (line 217) | static inline void printSORegRegOperand(MCInst *MI, unsigned OpNum, SStr...
function printSORegImmOperand (line 238) | static inline void printSORegImmOperand(MCInst *MI, unsigned OpNum, SStr...
function printAM2PreOrOffsetIndexOp (line 256) | static inline void printAM2PreOrOffsetIndexOp(MCInst *MI, unsigned Op,
function printAddrModeTBB (line 294) | static inline void printAddrModeTBB(MCInst *MI, unsigned Op, SStream *O)
function printAddrModeTBH (line 308) | static inline void printAddrModeTBH(MCInst *MI, unsigned Op, SStream *O)
function printAddrMode2Operand (line 323) | static inline void printAddrMode2Operand(MCInst *MI, unsigned Op, SStrea...
function printAddrMode2OffsetOperand (line 337) | static inline void printAddrMode2OffsetOperand(MCInst *MI, unsigned OpNum,
function printAM3PreOrOffsetIndexOp (line 369) | static inline void printAM3PreOrOffsetIndexOp(MCInst *MI, unsigned Op,
function printAddrMode3OffsetOperand (line 424) | static inline void printAddrMode3OffsetOperand(MCInst *MI, unsigned OpNum,
function printPostIdxImm8Operand (line 448) | static inline void printPostIdxImm8Operand(MCInst *MI, unsigned OpNum,
function printPostIdxRegOperand (line 461) | static inline void printPostIdxRegOperand(MCInst *MI, unsigned OpNum,
function printPostIdxImm8s4Operand (line 472) | static inline void printPostIdxImm8s4Operand(MCInst *MI, unsigned OpNum,
function printAddrMode6Operand (line 578) | static inline void printAddrMode6Operand(MCInst *MI, unsigned OpNum, SSt...
function printAddrMode7Operand (line 595) | static inline void printAddrMode7Operand(MCInst *MI, unsigned OpNum, SSt...
function printAddrMode6OffsetOperand (line 606) | static inline void printAddrMode6OffsetOperand(MCInst *MI, unsigned OpNum,
function printBitfieldInvMaskImmOperand (line 619) | static inline void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned O...
function printMemBOption (line 636) | static inline void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O)
function printInstSyncBOption (line 645) | static inline void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStr...
function printTraceSyncBOption (line 652) | static inline void printTraceSyncBOption(MCInst *MI, unsigned OpNum, SSt...
function printShiftImmOperand (line 659) | static inline void printShiftImmOperand(MCInst *MI, unsigned OpNum, SStr...
function printPKHLSLShiftImm (line 676) | static inline void printPKHLSLShiftImm(MCInst *MI, unsigned OpNum, SStre...
function printPKHASRShiftImm (line 688) | static inline void printPKHASRShiftImm(MCInst *MI, unsigned OpNum, SStre...
function printGPRPairOperand (line 701) | static inline void printGPRPairOperand(MCInst *MI, unsigned OpNum, SStre...
function printSetendOperand (line 710) | static inline void printSetendOperand(MCInst *MI, unsigned OpNum, SStrea...
function printCPSIMod (line 720) | static inline void printCPSIMod(MCInst *MI, unsigned OpNum, SStream *O)
function printCPSIFlag (line 727) | static inline void printCPSIFlag(MCInst *MI, unsigned OpNum, SStream *O)
function printMSRMaskOperand (line 740) | static inline void printMSRMaskOperand(MCInst *MI, unsigned OpNum, SStre...
function printBankedRegOperand (line 834) | static inline void printBankedRegOperand(MCInst *MI, unsigned OpNum, SSt...
function printMandatoryPredicateOperand (line 849) | static inline void printMandatoryPredicateOperand(MCInst *MI, unsigned O...
function printMandatoryRestrictedPredicateOperand (line 858) | static inline void
function printMandatoryInvertedPredicateOperand (line 870) | static inline void
function printNoHashImmediate (line 880) | static inline void printNoHashImmediate(MCInst *MI, unsigned OpNum, SStr...
function printPImmediate (line 886) | static inline void printPImmediate(MCInst *MI, unsigned OpNum, SStream *O)
function printCImmediate (line 894) | static inline void printCImmediate(MCInst *MI, unsigned OpNum, SStream *O)
function printCoprocOptionImm (line 902) | static inline void printCoprocOptionImm(MCInst *MI, unsigned OpNum, SStr...
function printThumbS4ImmOperand (line 946) | static inline void printThumbS4ImmOperand(MCInst *MI, unsigned OpNum,
function printThumbSRImm (line 955) | static inline void printThumbSRImm(MCInst *MI, unsigned OpNum, SStream *O)
function printThumbITMask (line 964) | static inline void printThumbITMask(MCInst *MI, unsigned OpNum, SStream *O)
function printThumbAddrModeRROperand (line 980) | static inline void printThumbAddrModeRROperand(MCInst *MI, unsigned Op,
function printThumbAddrModeImm5SOperand (line 1005) | static inline void printThumbAddrModeImm5SOperand(MCInst *MI, unsigned Op,
function printThumbAddrModeImm5S1Operand (line 1030) | static inline void printThumbAddrModeImm5S1Operand(MCInst *MI, unsigned Op,
function printThumbAddrModeImm5S2Operand (line 1037) | static inline void printThumbAddrModeImm5S2Operand(MCInst *MI, unsigned Op,
function printThumbAddrModeImm5S4Operand (line 1044) | static inline void printThumbAddrModeImm5S4Operand(MCInst *MI, unsigned Op,
function printThumbAddrModeSPOperand (line 1051) | static inline void printThumbAddrModeSPOperand(MCInst *MI, unsigned Op,
function printT2SOOperand (line 1062) | static inline void printT2SOOperand(MCInst *MI, unsigned OpNum, SStream *O)
function printT2AddrModeImm0_1020s4Operand (line 1197) | static inline void printT2AddrModeImm0_1020s4Operand(MCInst *MI, unsigne...
function printT2AddrModeImm8OffsetOperand (line 1217) | static inline void printT2AddrModeImm8OffsetOperand(MCInst *MI, unsigned...
function printT2AddrModeImm8s4OffsetOperand (line 1236) | static inline void
function printT2AddrModeSoRegOperand (line 1256) | static inline void printT2AddrModeSoRegOperand(MCInst *MI, unsigned OpNum,
function printFPImmOperand (line 1281) | static inline void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream...
function printVMOVModImmOperand (line 1290) | static inline void printVMOVModImmOperand(MCInst *MI, unsigned OpNum,
function printImmPlusOneOperand (line 1302) | static inline void printImmPlusOneOperand(MCInst *MI, unsigned OpNum,
function printRotImmOperand (line 1312) | static inline void printRotImmOperand(MCInst *MI, unsigned OpNum, SStrea...
function printModImmOperand (line 1323) | static inline void printModImmOperand(MCInst *MI, unsigned OpNum, SStrea...
function printFBits16 (line 1370) | static inline void printFBits16(MCInst *MI, unsigned OpNum, SStream *O)
function printFBits32 (line 1380) | static inline void printFBits32(MCInst *MI, unsigned OpNum, SStream *O)
function printVectorIndex (line 1388) | static inline void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O)
function printVectorListOne (line 1397) | static inline void printVectorListOne(MCInst *MI, unsigned OpNum, SStrea...
function printVectorListTwo (line 1405) | static inline void printVectorListTwo(MCInst *MI, unsigned OpNum, SStrea...
function printVectorListTwoSpaced (line 1418) | static inline void printVectorListTwoSpaced(MCInst *MI, unsigned OpNum,
function printVectorListThree (line 1432) | static inline void printVectorListThree(MCInst *MI, unsigned OpNum, SStr...
function printVectorListFour (line 1447) | static inline void printVectorListFour(MCInst *MI, unsigned OpNum, SStre...
function printVectorListOneAllLanes (line 1464) | static inline void printVectorListOneAllLanes(MCInst *MI, unsigned OpNum,
function printVectorListTwoAllLanes (line 1473) | static inline void printVectorListTwoAllLanes(MCInst *MI, unsigned OpNum,
function printVectorListThreeAllLanes (line 1487) | static inline void printVectorListThreeAllLanes(MCInst *MI, unsigned OpNum,
function printVectorListFourAllLanes (line 1503) | static inline void printVectorListFourAllLanes(MCInst *MI, unsigned OpNum,
function printVectorListTwoSpacedAllLanes (line 1521) | static inline void printVectorListTwoSpacedAllLanes(MCInst *MI, unsigned...
function printVectorListThreeSpacedAllLanes (line 1536) | static inline void
function printVectorListFourSpacedAllLanes (line 1553) | static inline void printVectorListFourSpacedAllLanes(MCInst *MI, unsigne...
function printVectorListThreeSpaced (line 1572) | static inline void printVectorListThreeSpaced(MCInst *MI, unsigned OpNum,
function printVectorListFourSpaced (line 1588) | static inline void printVectorListFourSpaced(MCInst *MI, unsigned OpNum,
function printVPTPredicateOperand (line 1645) | static inline void printVPTPredicateOperand(MCInst *MI,
function printVPTMask (line 1656) | static inline void printVPTMask(MCInst *MI, unsigned OpNum, SStream *O)
function printMveSaturateOp (line 1673) | static inline void printMveSaturateOp(MCInst *MI, unsigned OpNum, SStrea...
function printInst (line 1684) | static void printInst(MCInst *MI, SStream *O, void *info)
function ARM_LLVM_printInstruction (line 2016) | void ARM_LLVM_printInstruction(MCInst *MI, SStream *O,
FILE: arch/ARM/ARMMapping.c
function ARM_get_insn_id (line 89) | void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function patch_cs_reg_alias (line 97) | static void patch_cs_reg_alias(char *asm_str)
function check_pop_return (line 157) | static void check_pop_return(MCInst *MI)
function check_writes_to_pc (line 176) | static void check_writes_to_pc(MCInst *MI)
function ARM_add_cs_groups (line 191) | static void ARM_add_cs_groups(MCInst *MI)
function add_alias_details (line 218) | static void add_alias_details(MCInst *MI)
function ARM_add_not_defined_ops (line 300) | static void ARM_add_not_defined_ops(MCInst *MI)
function ARM_add_vector_data (line 595) | void ARM_add_vector_data(MCInst *MI, arm_vectordata_type data_type)
function ARM_add_vector_size (line 605) | void ARM_add_vector_size(MCInst *MI, unsigned size)
function ARM_post_index_detection (line 620) | static void ARM_post_index_detection(MCInst *MI)
function ARM_check_mem_access_validity (line 652) | void ARM_check_mem_access_validity(MCInst *MI)
function ARM_printer (line 675) | void ARM_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
function ARM_rel_branch (line 770) | bool ARM_rel_branch(cs_struct *h, unsigned int id)
function ARM_blx_to_arm_mode (line 784) | bool ARM_blx_to_arm_mode(cs_struct *h, unsigned int id)
function ARM_check_updates_flags (line 796) | void ARM_check_updates_flags(MCInst *MI)
function ARM_set_instr_map_data (line 815) | void ARM_set_instr_map_data(MCInst *MI)
function ARM_getInstruction (line 824) | bool ARM_getInstruction(csh handle, const uint8_t *code, size_t code_len,
function ARM_init_mri (line 841) | void ARM_init_mri(MCRegisterInfo *MRI)
function ARM_reg_access (line 855) | void ARM_reg_access(const cs_insn *insn, cs_regs regs_read,
function ARM_setup_op (line 917) | void ARM_setup_op(cs_arm_op *op)
function ARM_init_cs_detail (line 925) | void ARM_init_cs_detail(MCInst *MI)
function t_add_pc (line 940) | static uint64_t t_add_pc(MCInst *MI, uint64_t v)
function t_qpr_to_dpr_list (line 966) | static uint64_t t_qpr_to_dpr_list(MCInst *MI, unsigned OpNum, uint8_t of...
function t_mod_imm_rotate (line 974) | static uint64_t t_mod_imm_rotate(uint64_t v)
function t_mod_imm_bits (line 982) | inline static uint64_t t_mod_imm_bits(uint64_t v)
function t_mod_imm_rot (line 988) | inline static uint64_t t_mod_imm_rot(uint64_t v)
function t_vmov_mod_imm (line 994) | static uint64_t t_vmov_mod_imm(uint64_t v)
function ARM_set_mem_access (line 1004) | static void ARM_set_mem_access(MCInst *MI, bool status)
function add_cs_detail_RegImmShift (line 1029) | static void add_cs_detail_RegImmShift(MCInst *MI, ARM_AM_ShiftOpc ShOpc,
function add_cs_detail_general (line 1056) | static void add_cs_detail_general(MCInst *MI, arm_op_group op_group,
function add_cs_detail_template_1 (line 1796) | static void add_cs_detail_template_1(MCInst *MI, arm_op_group op_group,
function add_cs_detail_template_2 (line 1944) | static void add_cs_detail_template_2(MCInst *MI, arm_op_group op_group,
function ARM_add_cs_detail (line 1969) | static void ARM_add_cs_detail(MCInst *MI, int /* arm_op_group */ op_group,
function ARM_add_cs_detail_0 (line 2014) | void ARM_add_cs_detail_0(MCInst *MI, int /* arm_op_group */ op_group,
function ARM_add_cs_detail_1 (line 2020) | void ARM_add_cs_detail_1(MCInst *MI, int /* arm_op_group */ op_group,
function ARM_add_cs_detail_2 (line 2026) | void ARM_add_cs_detail_2(MCInst *MI, int /* arm_op_group */ op_group,
function insert_op (line 2033) | static void insert_op(MCInst *MI, unsigned index, cs_arm_op op)
function ARM_insert_detail_op_reg_at (line 2057) | void ARM_insert_detail_op_reg_at(MCInst *MI, unsigned index, arm_reg Reg,
function ARM_insert_detail_op_imm_at (line 2074) | void ARM_insert_detail_op_imm_at(MCInst *MI, unsigned index, int64_t Val,
function ARM_set_detail_op_reg (line 2092) | void ARM_set_detail_op_reg(MCInst *MI, unsigned OpNum, arm_reg Reg)
function ARM_set_detail_op_imm (line 2108) | void ARM_set_detail_op_imm(MCInst *MI, unsigned OpNum, arm_op_type ImmType,
function ARM_set_detail_op_mem_offset (line 2126) | void ARM_set_detail_op_mem_offset(MCInst *MI, unsigned OpNum, uint64_t Val,
function ARM_set_detail_op_mem (line 2152) | void ARM_set_detail_op_mem(MCInst *MI, unsigned OpNum, bool is_index_reg,
function ARM_set_detail_op_neon_lane (line 2207) | void ARM_set_detail_op_neon_lane(MCInst *MI, unsigned OpNum)
function ARM_set_detail_op_sysop (line 2220) | void ARM_set_detail_op_sysop(MCInst *MI, int Val, arm_op_type type,
function ARM_set_detail_op_float (line 2256) | void ARM_set_detail_op_float(MCInst *MI, unsigned OpNum, uint64_t Imm)
FILE: arch/ARM/ARMMapping.h
type arm_op_group (line 12) | typedef enum {
FILE: arch/ARM/ARMModule.c
function cs_err (line 13) | cs_err ARM_global_init(cs_struct *ud)
function cs_err (line 38) | cs_err ARM_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/Alpha/AlphaDisassembler.c
function DecodeStatus (line 37) | static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 49) | static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 61) | static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 77) | DecodeStatus Alpha_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
function Alpha_init (line 105) | void Alpha_init(MCRegisterInfo *MRI)
FILE: arch/Alpha/AlphaInstPrinter.c
function printOperand (line 33) | static void printOperand(MCInst *MI, int OpNum, SStream *O)
function printOperandAddr (line 61) | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum,
function Alpha_LLVM_printInstruction (line 86) | void Alpha_LLVM_printInstruction(MCInst *MI, SStream *O, void *Info)
FILE: arch/Alpha/AlphaMapping.c
function Alpha_init_cs_detail (line 33) | void Alpha_init_cs_detail(MCInst *MI)
function Alpha_add_cs_detail (line 41) | void Alpha_add_cs_detail(MCInst *MI, unsigned OpNum)
function Alpha_set_detail_op_imm (line 56) | void Alpha_set_detail_op_imm(MCInst *MI, unsigned OpNum, alpha_op_type I...
function Alpha_set_detail_op_reg (line 71) | void Alpha_set_detail_op_reg(MCInst *MI, unsigned OpNum, alpha_op_type Reg)
function Alpha_get_insn_id (line 85) | void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function Alpha_printInst (line 161) | void Alpha_printInst(MCInst *MI, SStream *O, void *Info)
function Alpha_set_instr_map_data (line 166) | void Alpha_set_instr_map_data(MCInst *MI)
function Alpha_getInstruction (line 174) | bool Alpha_getInstruction(csh handle, const uint8_t *code, size_t code_len,
function Alpha_reg_access (line 189) | void Alpha_reg_access(const cs_insn *insn, cs_regs regs_read,
FILE: arch/Alpha/AlphaModule.c
function cs_err (line 12) | cs_err ALPHA_global_init(cs_struct *ud)
function cs_err (line 40) | cs_err ALPHA_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/BPF/BPFDisassembler.c
function bpf_internal (line 19) | static bpf_internal *alloc_bpf_internal(const size_t code_len)
function bpf_internal (line 34) | static bpf_internal *fetch_cbpf(MCInst *instr, const uint8_t *code,
function bpf_internal (line 51) | static bpf_internal *fetch_ebpf(MCInst *instr, const uint8_t *code,
function decodeLoad (line 105) | static bool decodeLoad(MCInst *MI, bpf_internal *bpf)
function decodeStore (line 204) | static bool decodeStore(MCInst *MI, bpf_internal *bpf)
function decodeALU (line 247) | static bool decodeALU(MCInst *MI, bpf_internal *bpf)
function decodeJump (line 304) | static bool decodeJump(MCInst *MI, bpf_internal *bpf)
function decodeReturn (line 367) | static bool decodeReturn(MCInst *MI, bpf_internal *bpf)
function decodeMISC (line 384) | static bool decodeMISC(MCInst *MI, bpf_internal *bpf)
function getInstruction (line 393) | static bool getInstruction(MCInst *MI, bpf_internal *bpf)
function bpf_insn (line 441) | static bpf_insn op2insn_ld_cbpf(unsigned opcode)
function bpf_insn (line 464) | static bpf_insn op2insn_ld_ebpf(unsigned opcode)
function bpf_insn (line 509) | static bpf_insn op2insn_st(unsigned opcode, const uint32_t imm)
function bpf_insn (line 558) | static bpf_insn op2insn_alu(unsigned opcode, const uint16_t off,
function bpf_insn (line 656) | static bpf_insn op2insn_jmp(unsigned opcode)
function update_regs_access (line 691) | static void update_regs_access(MCInst *MI, cs_detail *detail, bpf_insn i...
function setFinalOpcode (line 761) | static bool setFinalOpcode(MCInst *MI, const bpf_internal *bpf)
function BPF_getInstruction (line 843) | bool BPF_getInstruction(csh ud, const uint8_t *code, size_t code_len,
FILE: arch/BPF/BPFDisassembler.h
type bpf_internal (line 9) | typedef struct bpf_internal {
FILE: arch/BPF/BPFInstPrinter.c
function cs_bpf_op (line 13) | static cs_bpf_op *expand_bpf_operands(cs_bpf *bpf)
function push_op_reg (line 19) | static void push_op_reg(cs_bpf *bpf, bpf_op_type val, uint8_t ac_mode)
function push_op_imm (line 28) | static void push_op_imm(cs_bpf *bpf, uint64_t val, const bool is_signed)
function push_op_off (line 37) | static void push_op_off(cs_bpf *bpf, uint32_t val, const bool is_signed)
function push_op_mem (line 46) | static void push_op_mem(cs_bpf *bpf, bpf_reg reg, uint32_t val,
function push_op_mmem (line 58) | static void push_op_mmem(cs_bpf *bpf, uint32_t val)
function push_op_msh (line 66) | static void push_op_msh(cs_bpf *bpf, uint32_t val)
function push_op_ext (line 74) | static void push_op_ext(cs_bpf *bpf, bpf_ext_type val)
function convert_operands (line 82) | static void convert_operands(MCInst *MI, cs_bpf *bpf)
function print_operand (line 264) | static void print_operand(MCInst *MI, struct SStream *O, const cs_bpf_op...
function BPF_printInst (line 351) | void BPF_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo)
FILE: arch/BPF/BPFInstPrinter.h
type SStream (line 12) | struct SStream
type SStream (line 14) | struct SStream
FILE: arch/BPF/BPFMapping.c
function BPF_getFeature (line 110) | bool BPF_getFeature(const cs_mode mode, const cs_mode feature)
function BPF_get_insn_id (line 163) | void BPF_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function sort_and_uniq (line 168) | static void sort_and_uniq(cs_regs arr, uint8_t n, uint8_t *new_n)
function BPF_reg_access (line 195) | void BPF_reg_access(const cs_insn *insn, cs_regs regs_read,
FILE: arch/BPF/BPFModule.c
function cs_err (line 11) | cs_err BPF_global_init(cs_struct *ud)
function cs_err (line 26) | cs_err BPF_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/EVM/EVMDisassembler.c
function EVM_getInstruction (line 270) | bool EVM_getInstruction(csh ud, const uint8_t *code, size_t code_len,
FILE: arch/EVM/EVMInstPrinter.c
function EVM_printInst (line 7) | void EVM_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo)
FILE: arch/EVM/EVMInstPrinter.h
type SStream (line 12) | struct SStream
type SStream (line 14) | struct SStream
FILE: arch/EVM/EVMMapping.c
function evm_insn_find (line 22) | static int evm_insn_find(const cs_evm *insns, unsigned int max, unsigned...
function EVM_get_insn_id (line 36) | void EVM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
FILE: arch/EVM/EVMModule.c
function cs_err (line 12) | cs_err EVM_global_init(cs_struct *ud)
function cs_err (line 28) | cs_err EVM_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/HPPA/HPPADisassembler.c
function create_float_reg_spec (line 91) | static void create_float_reg_spec(MCInst *MI, uint32_t reg, uint32_t fpe...
function extract_3 (line 113) | static int extract_3(unsigned word)
function extract_5_load (line 118) | static int extract_5_load(unsigned word)
function extract_5_store (line 125) | static int extract_5_store(unsigned word)
function extract_11 (line 132) | static int extract_11(unsigned word)
function extract_14 (line 139) | static int extract_14(unsigned word)
function extract_16 (line 146) | static int extract_16(unsigned word, bool wide)
function extract_21 (line 165) | static int32_t extract_21(unsigned word)
function extract_12 (line 185) | static int32_t extract_12(unsigned word)
function extract_17 (line 198) | static int32_t extract_17(unsigned word)
function extract_22 (line 209) | static int32_t extract_22(unsigned word)
function push_str_modifier (line 221) | static void push_str_modifier(hppa_ext *hppa, const char *modifier)
function push_int_modifier (line 232) | static void push_int_modifier(hppa_ext *hppa, uint64_t modifier)
function fill_sysop_insn_name (line 240) | static void fill_sysop_insn_name(MCInst *MI, uint32_t insn)
function decode_sysop (line 313) | static bool decode_sysop(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_memmgmt_insn_name (line 394) | static void fill_memmgmt_insn_name(MCInst *MI, uint32_t insn)
function fill_memmgmt_mods (line 502) | static void fill_memmgmt_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mode...
function decode_memmgmt (line 539) | static bool decode_memmgmt(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_alu_insn_name (line 637) | static void fill_alu_insn_name(MCInst *MI, uint32_t insn)
function fill_alu_mods (line 802) | static void fill_alu_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mode mode)
function decode_alu (line 958) | static bool decode_alu(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_idxmem_insn_name (line 1045) | static void fill_idxmem_insn_name(MCInst *MI, uint32_t insn)
function fill_idxmem_mods (line 1166) | static void fill_idxmem_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mode ...
function decode_idxmem (line 1265) | static bool decode_idxmem(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_ldst_dw_insn_name (line 1383) | static void fill_ldst_dw_insn_name(MCInst *MI, uint32_t insn)
function fill_ldst_dw_mods (line 1402) | static void fill_ldst_dw_mods(uint32_t insn, hppa_ext *hppa_ext, uint32_...
function decode_ldst_dw (line 1412) | static bool decode_ldst_dw(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_ldst_w_insn_name (line 1444) | static void fill_ldst_w_insn_name(MCInst *MI, uint32_t insn)
function fill_ldst_w_mods (line 1463) | static void fill_ldst_w_mods(uint32_t insn, hppa_ext *hppa_ext, int32_t im)
function decode_ldst_w (line 1472) | static bool decode_ldst_w(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_arith_imm_insn_name (line 1506) | static void fill_arith_imm_insn_name(MCInst *MI, uint32_t insn)
function fill_arith_imm_insn_mods (line 1553) | static void fill_arith_imm_insn_mods(uint32_t insn, hppa_ext *hppa_ext,
function decode_arith_imm (line 1581) | static bool decode_arith_imm(const cs_struct *ud, MCInst *MI, uint32_t i...
function fill_shexdep0_insn_name (line 1590) | static void fill_shexdep0_insn_name(MCInst *MI, uint32_t insn)
function fill_shexdep0_mods (line 1650) | static void fill_shexdep0_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mod...
function decode_shexdep0 (line 1680) | static bool decode_shexdep0(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_shexdep1_insn_name (line 1752) | static void fill_shexdep1_insn_name(MCInst *MI, uint32_t insn)
function fill_shexdep1_mods (line 1817) | static void fill_shexdep1_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mod...
function decode_shexdep1 (line 1840) | static bool decode_shexdep1(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_shexdep2_mods (line 1913) | static void fill_shexdep2_mods(uint32_t insn, hppa_ext *hppa_ext)
function decode_shexdep2 (line 1921) | static bool decode_shexdep2(MCInst *MI, uint32_t insn)
function fill_shexdep3_mods (line 1936) | static void fill_shexdep3_mods(uint32_t insn, hppa_ext *hppa_ext)
function decode_shexdep3 (line 1946) | static bool decode_shexdep3(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_multmed_insn_name (line 1972) | static void fill_multmed_insn_name(MCInst *MI, uint32_t insn)
function fill_multmed_mods (line 2002) | static void fill_multmed_mods(uint32_t insn, hppa_ext *hppa_ext)
function decode_multmed (line 2041) | static bool decode_multmed(MCInst *MI, uint32_t insn)
function fill_branch_insn_name (line 2083) | static void fill_branch_insn_name(MCInst *MI, uint32_t insn)
function fill_branch_mods (line 2153) | static void fill_branch_mods(uint32_t insn, hppa_ext *hppa_ext, cs_mode ...
function decode_branch (line 2199) | static bool decode_branch(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_corpdw_insn_name (line 2280) | static void fill_corpdw_insn_name(MCInst *MI, uint32_t insn)
function coprdw_has_uid_mod (line 2368) | static inline bool coprdw_has_uid_mod(uint32_t opcode, uint32_t uid)
function fill_corpdw_mods (line 2374) | static void fill_corpdw_mods(uint32_t insn, uint32_t im, hppa_ext *hppa_...
function decode_corpdw (line 2416) | static bool decode_corpdw(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_spop_insn_name (line 2464) | static void fill_spop_insn_name(MCInst *MI, uint32_t insn)
function fill_spop_mods (line 2485) | static void fill_spop_mods(uint32_t insn, uint32_t ext, hppa_ext *hppa_ext)
function decode_spop (line 2517) | static bool decode_spop(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_copr_insn_name (line 2543) | static void fill_copr_insn_name(MCInst *MI, uint32_t insn)
function fill_copr_mods (line 2669) | static void fill_copr_mods(uint32_t insn, uint32_t uid, uint32_t class,
function decode_copr (line 2793) | static bool decode_copr(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_float_insn_name (line 2926) | static void fill_float_insn_name(MCInst *MI, uint32_t insn)
function fill_float_mods (line 3024) | static void fill_float_mods(uint32_t insn, uint32_t class, hppa_ext *hpp...
function decode_float (line 3094) | static bool decode_float(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_fpfused_insn_name (line 3189) | static void fill_fpfused_insn_name(MCInst *MI, uint32_t insn)
function fill_fpfused_mods (line 3199) | static void fill_fpfused_mods(uint32_t insn, hppa_ext *hppa_ext)
function decode_fpfused (line 3205) | static bool decode_fpfused(const cs_struct *ud, MCInst *MI, uint32_t insn)
function fill_action_and_branch_insn_name (line 3224) | static void fill_action_and_branch_insn_name(MCInst *MI, uint32_t opcode)
function fill_action_and_branch_mods (line 3296) | static void fill_action_and_branch_mods(uint32_t insn, uint32_t opcode,
function fill_action_and_branch (line 3395) | static bool fill_action_and_branch(const cs_struct *ud, MCInst *MI,
function fill_load_insn_name (line 3456) | static void fill_load_insn_name(MCInst *MI, uint32_t opcode)
function fill_store_insn_name (line 3480) | static void fill_store_insn_name(MCInst *MI, uint32_t opcode)
function decode_cmpclr (line 3504) | static bool decode_cmpclr(const cs_struct *ud, MCInst *MI, uint32_t insn)
function decode_be (line 3529) | static bool decode_be(const cs_struct *ud, MCInst *MI, uint32_t insn)
function decode_float_ldst (line 3559) | static bool decode_float_ldst(const cs_struct *ud, MCInst *MI, uint32_t ...
function decode_fmpy (line 3588) | static bool decode_fmpy(const cs_struct *ud, MCInst *MI, uint32_t insn)
function decode_load (line 3623) | static bool decode_load(const cs_struct *ud, MCInst *MI, uint32_t insn)
function decode_store (line 3645) | static bool decode_store(const cs_struct *ud, MCInst *MI, uint32_t insn)
function getInstruction (line 3667) | static bool getInstruction(const cs_struct *ud, const uint8_t *code,
function init_details (line 3818) | void init_details(MCInst *MI)
function HPPA_getInstruction (line 3826) | bool HPPA_getInstruction(csh ud, const uint8_t *code, size_t code_len,
FILE: arch/HPPA/HPPAInstPrinter.c
type pa_insn (line 13) | struct pa_insn
function set_op_imm (line 265) | static void set_op_imm(cs_hppa *hppa, uint64_t val)
function set_op_reg (line 272) | static void set_op_reg(cs_hppa *hppa, uint64_t val, cs_ac_type access)
function set_op_idx_reg (line 280) | static void set_op_idx_reg(cs_hppa *hppa, uint64_t reg)
function set_op_disp (line 288) | static void set_op_disp(cs_hppa *hppa, uint64_t val)
function set_op_target (line 295) | static void set_op_target(cs_hppa *hppa, uint64_t val)
function set_op_mem (line 302) | static void set_op_mem(cs_hppa *hppa, uint32_t base, uint32_t space,
type pa_insn_fmt (line 322) | struct pa_insn_fmt
function print_operand (line 592) | static void print_operand(MCInst *MI, SStream *O, const cs_hppa_op *op)
function fill_operands (line 629) | static void fill_operands(MCInst *MI, cs_hppa *hppa)
function print_modifiers (line 740) | static void print_modifiers(MCInst *MI, SStream *O)
function add_groups (line 752) | static void add_groups(MCInst *MI)
function update_regs_access (line 764) | static void update_regs_access(MCInst *MI, unsigned int opcode)
function HPPA_printInst (line 809) | void HPPA_printInst(MCInst *MI, SStream *O, void *Info)
FILE: arch/HPPA/HPPAInstPrinter.h
type pa_insn (line 12) | struct pa_insn {
type pa_insn_fmt (line 17) | struct pa_insn_fmt {
FILE: arch/HPPA/HPPAMapping.c
function HPPA_get_insn_id (line 368) | void HPPA_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int opcode)
function sort_and_uniq (line 373) | static void sort_and_uniq(cs_regs arr, uint8_t n, uint8_t *new_n)
function HPPA_reg_access (line 403) | void HPPA_reg_access(const cs_insn *insn, cs_regs regs_read,
FILE: arch/HPPA/HPPAModule.c
function cs_err (line 11) | cs_err HPPA_global_init(cs_struct *ud)
function cs_err (line 26) | cs_err HPPA_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/LoongArch/LoongArchDisassembler.c
function DecodeStatus (line 53) | static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 63) | static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 73) | static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 83) | static DecodeStatus DecodeCFRRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 93) | static DecodeStatus DecodeFCSRRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 103) | static DecodeStatus DecodeLSX128RegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 113) | static DecodeStatus DecodeLASX256RegisterClass(MCInst *Inst, uint64_t Re...
function DecodeStatus (line 123) | static DecodeStatus DecodeSCRRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 171) | static DecodeStatus getInstruction(MCInst *MI, uint64_t *Size,
function DecodeStatus (line 193) | DecodeStatus LoongArch_LLVM_getInstruction(MCInst *MI, uint64_t *Size,
FILE: arch/LoongArch/LoongArchDisassemblerExtension.c
function LoongArch_getFeatureBits (line 14) | bool LoongArch_getFeatureBits(unsigned int mode, unsigned int feature)
FILE: arch/LoongArch/LoongArchInstPrinter.c
function printInst (line 53) | static void printInst(MCInst *MI, uint64_t Address, const char *Annot,
function LoongArch_LLVM_printInst (line 72) | void LoongArch_LLVM_printInst(MCInst *MI, uint64_t Address, const char *...
function printRegName (line 83) | static void printRegName(MCInst *MI, SStream *O, MCRegister Reg)
function printOperand (line 92) | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printAtomicMemOp (line 135) | static void printAtomicMemOp(MCInst *MI, unsigned OpNo, SStream *O)
FILE: arch/LoongArch/LoongArchMapping.c
function LoongArch_init_mri (line 28) | void LoongArch_init_mri(MCRegisterInfo *MRI)
function LoongArch_get_insn_id (line 50) | void LoongArch_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function LoongArch_reg_access (line 115) | void LoongArch_reg_access(const cs_insn *insn, cs_regs regs_read,
function LoongArch_rewrite_memory_operand (line 175) | void LoongArch_rewrite_memory_operand(MCInst *MI)
function LoongArch_rewrite_address_operand (line 327) | void LoongArch_rewrite_address_operand(MCInst *MI)
function LoongArch_set_instr_map_data (line 370) | void LoongArch_set_instr_map_data(MCInst *MI)
function LoongArch_getInstruction (line 383) | bool LoongArch_getInstruction(csh handle, const uint8_t *code, size_t co...
function LoongArch_add_cs_groups (line 400) | static void LoongArch_add_cs_groups(MCInst *MI)
function LoongArch_printer (line 471) | void LoongArch_printer(MCInst *MI, SStream *O,
function LoongArch_setup_op (line 488) | void LoongArch_setup_op(cs_loongarch_op *op)
function LoongArch_init_cs_detail (line 494) | void LoongArch_init_cs_detail(MCInst *MI)
function LoongArch_set_detail_op_imm (line 513) | void LoongArch_set_detail_op_imm(MCInst *MI, unsigned OpNum,
function LoongArch_set_detail_op_reg (line 527) | void LoongArch_set_detail_op_reg(MCInst *MI, unsigned OpNum, loongarch_r...
function LoongArch_add_cs_detail_0 (line 539) | void LoongArch_add_cs_detail_0(MCInst *MI,
FILE: arch/LoongArch/LoongArchMapping.h
type loongarch_op_group (line 12) | typedef enum {
FILE: arch/LoongArch/LoongArchModule.c
function cs_err (line 14) | cs_err LoongArch_global_init(cs_struct *ud)
function cs_err (line 39) | cs_err LoongArch_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/M680X/M680XDisassembler.c
type insn_hdlr_id (line 40) | typedef enum insn_hdlr_id {
type e_access_mode (line 89) | typedef enum e_access_mode {
type cs_ac_type (line 110) | typedef cs_ac_type e_access;
type inst_page1 (line 117) | typedef struct inst_page1 {
type inst_pageX (line 124) | typedef struct inst_pageX {
type insn_props (line 131) | typedef struct insn_props {
function read_byte (line 159) | static bool read_byte(const m680x_info *info, uint8_t *byte, uint16_t ad...
function read_byte_sign_extended (line 171) | static bool read_byte_sign_extended(const m680x_info *info, int16_t *word,
function read_word (line 187) | static bool read_word(const m680x_info *info, uint16_t *word, uint16_t a...
function read_sdword (line 200) | static bool read_sdword(const m680x_info *info, int32_t *sdword,
function binary_search (line 220) | static int binary_search(const inst_pageX *const inst_pageX_table,
function M680X_get_insn_id (line 246) | void M680X_get_insn_id(cs_struct *handle, cs_insn *insn, unsigned int id)
function add_insn_group (line 297) | static void add_insn_group(cs_detail *detail, m680x_group_type group)
function exists_reg_list (line 304) | static bool exists_reg_list(uint16_t *regs, uint8_t count, m680x_reg reg)
function add_reg_to_rw_list (line 316) | static void add_reg_to_rw_list(MCInst *MI, m680x_reg reg, e_access access)
function update_am_reg_list (line 354) | static void update_am_reg_list(MCInst *MI, m680x_info *info, cs_m680x_op...
function e_access (line 461) | static e_access get_access(int operator_index, e_access_mode access_mode)
function build_regs_read_write_counts (line 468) | static void build_regs_read_write_counts(MCInst *MI, m680x_info *info,
function add_operators_access (line 483) | static void add_operators_access(MCInst *MI, m680x_info *info,
type insn_to_changed_regs (line 507) | typedef struct insn_to_changed_regs {
function set_changed_regs_read_write_counts (line 513) | static void set_changed_regs_read_write_counts(MCInst *MI, m680x_info *i...
type insn_desc (line 649) | typedef struct insn_desc {
function get_indexed09_post_byte_size (line 659) | static int get_indexed09_post_byte_size(const m680x_info *info,
function get_indexed12_post_byte_size (line 713) | static int get_indexed12_post_byte_size(const m680x_info *info,
function is_tfr09_reg_valid (line 758) | static bool is_tfr09_reg_valid(const m680x_info *info, uint8_t reg_nibble)
function is_exg_tfr12_post_byte_valid (line 767) | static bool is_exg_tfr12_post_byte_valid(const m680x_info *info,
function is_tfm_reg_valid (line 773) | static bool is_tfm_reg_valid(const m680x_info *info, uint8_t reg_nibble)
function get_loop_post_byte_size (line 782) | static int get_loop_post_byte_size(const m680x_info *info, uint16_t addr...
function get_bitmv_post_byte_size (line 805) | static int get_bitmv_post_byte_size(const m680x_info *info, uint16_t add...
function is_sufficient_code_size (line 823) | static bool is_sufficient_code_size(const m680x_info *info, uint16_t add...
function decode_insn (line 982) | static bool decode_insn(const m680x_info *info, uint16_t address,
function illegal_hdlr (line 1068) | static void illegal_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function inherent_hdlr (line 1080) | static void inherent_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function add_reg_operand (line 1085) | static void add_reg_operand(m680x_info *info, m680x_reg reg)
function set_operand_size (line 1095) | static void set_operand_size(m680x_info *info, cs_m680x_op *op,
function reg_bits_hdlr (line 1128) | static void reg_bits_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function reg_reg09_hdlr (line 1184) | static void reg_reg09_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function reg_reg12_hdlr (line 1199) | static void reg_reg12_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function add_rel_operand (line 1224) | static void add_rel_operand(m680x_info *info, int16_t offset, uint16_t a...
function relative8_hdlr (line 1235) | static void relative8_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function relative16_hdlr (line 1248) | static void relative16_hdlr(MCInst *MI, m680x_info *info, uint16_t *addr...
function add_indexed_operand (line 1269) | static void add_indexed_operand(m680x_info *info, m680x_reg base_reg,
function indexedX_hdlr (line 1296) | static void indexedX_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexedY_hdlr (line 1306) | static void indexedY_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexed09_hdlr (line 1317) | static void indexed09_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexed12_hdlr (line 1453) | static void indexed12_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function index_hdlr (line 1544) | static void index_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function direct_hdlr (line 1553) | static void direct_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function extended_hdlr (line 1563) | static void extended_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function immediate_hdlr (line 1574) | static void immediate_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function bit_move_hdlr (line 1608) | static void bit_move_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function tfm_hdlr (line 1641) | static void tfm_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function opidx_hdlr (line 1668) | static void opidx_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function opidx_dir_rel_hdlr (line 1681) | static void opidx_dir_rel_hdlr(MCInst *MI, m680x_info *info, uint16_t *a...
function indexedX0_hdlr (line 1695) | static void indexedX0_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexedX16_hdlr (line 1701) | static void indexedX16_hdlr(MCInst *MI, m680x_info *info, uint16_t *addr...
function imm_rel_hdlr (line 1711) | static void imm_rel_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexedS_hdlr (line 1717) | static void indexedS_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function indexedS16_hdlr (line 1727) | static void indexedS16_hdlr(MCInst *MI, m680x_info *info, uint16_t *addr...
function indexedX0p_hdlr (line 1738) | static void indexedX0p_hdlr(MCInst *MI, m680x_info *info, uint16_t *addr...
function indexedXp_hdlr (line 1744) | static void indexedXp_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function imm_idx12_x_hdlr (line 1754) | static void imm_idx12_x_hdlr(MCInst *MI, m680x_info *info, uint16_t *add...
function ext_idx12_x_hdlr (line 1779) | static void ext_idx12_x_hdlr(MCInst *MI, m680x_info *info, uint16_t *add...
function loop_hdlr (line 1794) | static void loop_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function tny_hdlr (line 1834) | static void tny_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function srt_hdlr (line 1846) | static void srt_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function dirdir_hdlr (line 1856) | static void dirdir_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function immdir_hdlr (line 1862) | static void immdir_hdlr(MCInst *MI, m680x_info *info, uint16_t *address)
function m680x_disassemble (line 1885) | static unsigned int m680x_disassemble(MCInst *MI, m680x_info *info,
function m680x_setup_internals (line 2162) | static bool m680x_setup_internals(m680x_info *info, e_cpu_type cpu_type,
function M680X_getInstruction (line 2180) | bool M680X_getInstruction(csh ud, const uint8_t *code, size_t code_len,
function cs_err (line 2244) | cs_err M680X_disassembler_init(cs_struct *ud)
function M680X_reg_access (line 2323) | void M680X_reg_access(const cs_insn *insn, cs_regs regs_read,
FILE: arch/M680X/M680XDisassemblerInternals.h
type e_cpu_type (line 10) | typedef enum e_cpu_type {
type inst_page1 (line 27) | struct inst_page1
type inst_pageX (line 28) | struct inst_pageX
type cpu_tables (line 30) | typedef struct {
type m680x_info (line 43) | typedef struct m680x_info {
FILE: arch/M680X/M680XInstPrinter.c
function printRegName (line 88) | static void printRegName(cs_struct *handle, SStream *OS, unsigned int reg)
function printInstructionName (line 95) | static void printInstructionName(cs_struct *handle, SStream *OS,
function get_unsigned (line 103) | static uint32_t get_unsigned(int32_t value, int byte_size)
function printIncDec (line 118) | static void printIncDec(bool isPost, SStream *O, m680x_info *info,
function printOperand (line 140) | static void printOperand(MCInst *MI, SStream *O, m680x_info *info,
function M680X_printInst (line 243) | void M680X_printInst(MCInst *MI, SStream *O, void *PrinterInfo)
function cs_err (line 319) | cs_err M680X_instprinter_init(cs_struct *ud)
FILE: arch/M680X/M680XInstPrinter.h
type SStream (line 11) | struct SStream
type SStream (line 15) | struct SStream
FILE: arch/M680X/M680XModule.c
function cs_err (line 13) | cs_err M680X_global_init(cs_struct *ud)
function cs_err (line 70) | cs_err M680X_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/M68K/M68KDisassembler.c
function m68k_read_disassembler_16 (line 149) | static unsigned int m68k_read_disassembler_16(const m68k_info *info,
function m68k_read_disassembler_32 (line 157) | static unsigned int m68k_read_disassembler_32(const m68k_info *info,
function m68k_read_disassembler_64 (line 167) | static uint64_t m68k_read_disassembler_64(const m68k_info *info,
function m68k_read_safe_16 (line 182) | static unsigned int m68k_read_safe_16(const m68k_info *info,
function m68k_read_safe_32 (line 193) | static unsigned int m68k_read_safe_32(const m68k_info *info,
function m68k_read_safe_64 (line 204) | static uint64_t m68k_read_safe_64(const m68k_info *info, const uint64_t ...
type instruction_struct (line 226) | typedef struct {
function peek_imm_8 (line 286) | static unsigned int peek_imm_8(const m68k_info *info)
function peek_imm_16 (line 290) | static unsigned int peek_imm_16(const m68k_info *info)
function peek_imm_32 (line 294) | static unsigned int peek_imm_32(const m68k_info *info)
function peek_imm_64 (line 298) | static unsigned long long peek_imm_64(const m68k_info *info)
function read_imm_8 (line 303) | static unsigned int read_imm_8(m68k_info *info)
function read_imm_16 (line 309) | static unsigned int read_imm_16(m68k_info *info)
function read_imm_32 (line 315) | static unsigned int read_imm_32(m68k_info *info)
function read_imm_64 (line 321) | static unsigned long long read_imm_64(m68k_info *info)
function make_int_8 (line 342) | static int make_int_8(int value)
function make_int_16 (line 347) | static int make_int_16(int value)
function get_with_index_address_mode (line 352) | static void get_with_index_address_mode(m68k_info *info, cs_m68k_op *op,
function get_ea_mode_op (line 469) | static void get_ea_mode_op(m68k_info *info, cs_m68k_op *op,
function set_insn_group (line 615) | static void set_insn_group(m68k_info *info, m68k_group_type group)
function cs_m68k (line 620) | static cs_m68k *build_init_op(m68k_info *info, int opcode, int count, in...
function build_re_gen_1 (line 635) | static void build_re_gen_1(m68k_info *info, bool isDreg, int opcode,
function build_re_1 (line 656) | static void build_re_1(m68k_info *info, int opcode, uint8_t size)
function build_er_gen_1 (line 661) | static void build_er_gen_1(m68k_info *info, bool isDreg, int opcode,
function build_rr (line 682) | static void build_rr(m68k_info *info, int opcode, uint8_t size, int imm)
function build_r (line 707) | static void build_r(m68k_info *info, int opcode, uint8_t size)
function build_imm_ea (line 723) | static void build_imm_ea(m68k_info *info, int opcode, uint8_t size, int ...
function build_3bit_d (line 739) | static void build_3bit_d(m68k_info *info, int opcode, int size)
function build_3bit_ea (line 756) | static void build_3bit_ea(m68k_info *info, int opcode, int size)
function build_mm (line 772) | static void build_mm(m68k_info *info, int opcode, uint8_t size, int imm)
function build_ea (line 797) | static void build_ea(m68k_info *info, int opcode, uint8_t size)
function build_ea_a (line 803) | static void build_ea_a(m68k_info *info, int opcode, uint8_t size)
function build_ea_ea (line 818) | static void build_ea_ea(m68k_info *info, int opcode, int size)
function build_pi_pi (line 833) | static void build_pi_pi(m68k_info *info, int opcode, int size)
function build_imm_special_reg (line 849) | static void build_imm_special_reg(m68k_info *info, int opcode, int imm,
function build_relative_branch (line 867) | static void build_relative_branch(m68k_info *info, int opcode, int size,
function build_absolute_jump_with_immediate (line 884) | static void build_absolute_jump_with_immediate(m68k_info *info, int opcode,
function build_bcc (line 899) | static void build_bcc(m68k_info *info, int size, int displacement)
function build_trap (line 905) | static void build_trap(m68k_info *info, int size, int immediate)
function build_dbxx (line 911) | static void build_dbxx(m68k_info *info, int opcode, int size, int displa...
function build_dbcc (line 932) | static void build_dbcc(m68k_info *info, int size, int displacement)
function build_d_d_ea (line 937) | static void build_d_d_ea(m68k_info *info, int opcode, int size)
function build_bitfield_ins (line 958) | static void build_bitfield_ins(m68k_info *info, int opcode, int has_d_arg)
function build_d (line 993) | static void build_d(m68k_info *info, int opcode, int size)
function reverse_bits (line 1004) | static uint16_t reverse_bits(uint32_t v)
function reverse_bits_8 (line 1019) | static uint8_t reverse_bits_8(uint32_t v)
function build_movem_re (line 1034) | static void build_movem_re(m68k_info *info, int opcode, int size)
function build_movem_er (line 1052) | static void build_movem_er(m68k_info *info, int opcode, int size)
function build_imm (line 1067) | static void build_imm(m68k_info *info, int opcode, int data)
function build_illegal (line 1081) | static void build_illegal(m68k_info *info, int data)
function build_invalid (line 1086) | static void build_invalid(m68k_info *info, int data)
function build_cas2 (line 1091) | static void build_cas2(m68k_info *info, int size)
function build_chk2_cmp2 (line 1131) | static void build_chk2_cmp2(m68k_info *info, int size)
function build_move16 (line 1155) | static void build_move16(m68k_info *info, int data[2], int modes[2])
function build_link (line 1178) | static void build_link(m68k_info *info, int disp, int size)
function build_cpush_cinv (line 1195) | static void build_cpush_cinv(m68k_info *info, int op_offset)
function build_movep_re (line 1233) | static void build_movep_re(m68k_info *info, int size)
function build_movep_er (line 1250) | static void build_movep_er(m68k_info *info, int size)
function build_moves (line 1267) | static void build_moves(m68k_info *info, int size)
function build_er_1 (line 1288) | static void build_er_1(m68k_info *info, int opcode, uint8_t size)
function d68000_invalid (line 1331) | static void d68000_invalid(m68k_info *info)
function d68000_illegal (line 1336) | static void d68000_illegal(m68k_info *info)
function d68000_1010 (line 1341) | static void d68000_1010(m68k_info *info)
function d68000_1111 (line 1346) | static void d68000_1111(m68k_info *info)
function d68000_abcd_rr (line 1351) | static void d68000_abcd_rr(m68k_info *info)
function d68000_abcd_mm (line 1356) | static void d68000_abcd_mm(m68k_info *info)
function d68000_add_er_8 (line 1361) | static void d68000_add_er_8(m68k_info *info)
function d68000_add_er_16 (line 1366) | static void d68000_add_er_16(m68k_info *info)
function d68000_add_er_32 (line 1371) | static void d68000_add_er_32(m68k_info *info)
function d68000_add_re_8 (line 1376) | static void d68000_add_re_8(m68k_info *info)
function d68000_add_re_16 (line 1381) | static void d68000_add_re_16(m68k_info *info)
function d68000_add_re_32 (line 1386) | static void d68000_add_re_32(m68k_info *info)
function d68000_adda_16 (line 1391) | static void d68000_adda_16(m68k_info *info)
function d68000_adda_32 (line 1396) | static void d68000_adda_32(m68k_info *info)
function d68000_addi_8 (line 1401) | static void d68000_addi_8(m68k_info *info)
function d68000_addi_16 (line 1406) | static void d68000_addi_16(m68k_info *info)
function d68000_addi_32 (line 1411) | static void d68000_addi_32(m68k_info *info)
function d68000_addq_8 (line 1416) | static void d68000_addq_8(m68k_info *info)
function d68000_addq_16 (line 1421) | static void d68000_addq_16(m68k_info *info)
function d68000_addq_32 (line 1426) | static void d68000_addq_32(m68k_info *info)
function d68000_addx_rr_8 (line 1431) | static void d68000_addx_rr_8(m68k_info *info)
function d68000_addx_rr_16 (line 1436) | static void d68000_addx_rr_16(m68k_info *info)
function d68000_addx_rr_32 (line 1441) | static void d68000_addx_rr_32(m68k_info *info)
function d68000_addx_mm_8 (line 1446) | static void d68000_addx_mm_8(m68k_info *info)
function d68000_addx_mm_16 (line 1451) | static void d68000_addx_mm_16(m68k_info *info)
function d68000_addx_mm_32 (line 1456) | static void d68000_addx_mm_32(m68k_info *info)
function d68000_and_er_8 (line 1461) | static void d68000_and_er_8(m68k_info *info)
function d68000_and_er_16 (line 1466) | static void d68000_and_er_16(m68k_info *info)
function d68000_and_er_32 (line 1471) | static void d68000_and_er_32(m68k_info *info)
function d68000_and_re_8 (line 1476) | static void d68000_and_re_8(m68k_info *info)
function d68000_and_re_16 (line 1481) | static void d68000_and_re_16(m68k_info *info)
function d68000_and_re_32 (line 1486) | static void d68000_and_re_32(m68k_info *info)
function d68000_andi_8 (line 1491) | static void d68000_andi_8(m68k_info *info)
function d68000_andi_16 (line 1496) | static void d68000_andi_16(m68k_info *info)
function d68000_andi_32 (line 1501) | static void d68000_andi_32(m68k_info *info)
function d68000_andi_to_ccr (line 1506) | static void d68000_andi_to_ccr(m68k_info *info)
function d68000_andi_to_sr (line 1512) | static void d68000_andi_to_sr(m68k_info *info)
function d68000_asr_s_8 (line 1518) | static void d68000_asr_s_8(m68k_info *info)
function d68000_asr_s_16 (line 1523) | static void d68000_asr_s_16(m68k_info *info)
function d68000_asr_s_32 (line 1528) | static void d68000_asr_s_32(m68k_info *info)
function d68000_asr_r_8 (line 1533) | static void d68000_asr_r_8(m68k_info *info)
function d68000_asr_r_16 (line 1538) | static void d68000_asr_r_16(m68k_info *info)
function d68000_asr_r_32 (line 1543) | static void d68000_asr_r_32(m68k_info *info)
function d68000_asr_ea (line 1548) | static void d68000_asr_ea(m68k_info *info)
function d68000_asl_s_8 (line 1553) | static void d68000_asl_s_8(m68k_info *info)
function d68000_asl_s_16 (line 1558) | static void d68000_asl_s_16(m68k_info *info)
function d68000_asl_s_32 (line 1563) | static void d68000_asl_s_32(m68k_info *info)
function d68000_asl_r_8 (line 1568) | static void d68000_asl_r_8(m68k_info *info)
function d68000_asl_r_16 (line 1573) | static void d68000_asl_r_16(m68k_info *info)
function d68000_asl_r_32 (line 1578) | static void d68000_asl_r_32(m68k_info *info)
function d68000_asl_ea (line 1583) | static void d68000_asl_ea(m68k_info *info)
function d68000_bcc_8 (line 1588) | static void d68000_bcc_8(m68k_info *info)
function d68000_bcc_16 (line 1593) | static void d68000_bcc_16(m68k_info *info)
function d68020_bcc_32 (line 1598) | static void d68020_bcc_32(m68k_info *info)
function d68000_bchg_r (line 1604) | static void d68000_bchg_r(m68k_info *info)
function d68000_bchg_s (line 1609) | static void d68000_bchg_s(m68k_info *info)
function d68000_bclr_r (line 1614) | static void d68000_bclr_r(m68k_info *info)
function d68000_bclr_s (line 1619) | static void d68000_bclr_s(m68k_info *info)
function d68010_bkpt (line 1624) | static void d68010_bkpt(m68k_info *info)
function d68020_bfchg (line 1631) | static void d68020_bfchg(m68k_info *info)
function d68020_bfclr (line 1637) | static void d68020_bfclr(m68k_info *info)
function d68020_bfexts (line 1643) | static void d68020_bfexts(m68k_info *info)
function d68020_bfextu (line 1649) | static void d68020_bfextu(m68k_info *info)
function d68020_bfffo (line 1655) | static void d68020_bfffo(m68k_info *info)
function d68020_bfins (line 1661) | static void d68020_bfins(m68k_info *info)
function d68020_bfset (line 1676) | static void d68020_bfset(m68k_info *info)
function d68020_bftst (line 1682) | static void d68020_bftst(m68k_info *info)
function d68000_bra_8 (line 1687) | static void d68000_bra_8(m68k_info *info)
function d68000_bra_16 (line 1692) | static void d68000_bra_16(m68k_info *info)
function d68020_bra_32 (line 1698) | static void d68020_bra_32(m68k_info *info)
function d68000_bset_r (line 1704) | static void d68000_bset_r(m68k_info *info)
function d68000_bset_s (line 1709) | static void d68000_bset_s(m68k_info *info)
function d68000_bsr_8 (line 1714) | static void d68000_bsr_8(m68k_info *info)
function d68000_bsr_16 (line 1719) | static void d68000_bsr_16(m68k_info *info)
function d68020_bsr_32 (line 1725) | static void d68020_bsr_32(m68k_info *info)
function d68000_btst_r (line 1731) | static void d68000_btst_r(m68k_info *info)
function d68000_btst_s (line 1736) | static void d68000_btst_s(m68k_info *info)
function d68020_callm (line 1741) | static void d68020_callm(m68k_info *info)
function d68020_cas_8 (line 1747) | static void d68020_cas_8(m68k_info *info)
function d68020_cas_16 (line 1753) | static void d68020_cas_16(m68k_info *info)
function d68020_cas_32 (line 1759) | static void d68020_cas_32(m68k_info *info)
function d68020_cas2_16 (line 1765) | static void d68020_cas2_16(m68k_info *info)
function d68020_cas2_32 (line 1770) | static void d68020_cas2_32(m68k_info *info)
function d68000_chk_16 (line 1775) | static void d68000_chk_16(m68k_info *info)
function d68020_chk_32 (line 1780) | static void d68020_chk_32(m68k_info *info)
function d68020_chk2_cmp2_8 (line 1786) | static void d68020_chk2_cmp2_8(m68k_info *info)
function d68020_chk2_cmp2_16 (line 1792) | static void d68020_chk2_cmp2_16(m68k_info *info)
function d68020_chk2_cmp2_32 (line 1798) | static void d68020_chk2_cmp2_32(m68k_info *info)
function d68040_cinv (line 1804) | static void d68040_cinv(m68k_info *info)
function d68000_clr_8 (line 1810) | static void d68000_clr_8(m68k_info *info)
function d68000_clr_16 (line 1815) | static void d68000_clr_16(m68k_info *info)
function d68000_clr_32 (line 1820) | static void d68000_clr_32(m68k_info *info)
function d68000_cmp_8 (line 1825) | static void d68000_cmp_8(m68k_info *info)
function d68000_cmp_16 (line 1830) | static void d68000_cmp_16(m68k_info *info)
function d68000_cmp_32 (line 1835) | static void d68000_cmp_32(m68k_info *info)
function d68000_cmpa_16 (line 1840) | static void d68000_cmpa_16(m68k_info *info)
function d68000_cmpa_32 (line 1845) | static void d68000_cmpa_32(m68k_info *info)
function d68000_cmpi_8 (line 1850) | static void d68000_cmpi_8(m68k_info *info)
function d68020_cmpi_pcdi_8 (line 1855) | static void d68020_cmpi_pcdi_8(m68k_info *info)
function d68020_cmpi_pcix_8 (line 1861) | static void d68020_cmpi_pcix_8(m68k_info *info)
function d68000_cmpi_16 (line 1867) | static void d68000_cmpi_16(m68k_info *info)
function d68020_cmpi_pcdi_16 (line 1872) | static void d68020_cmpi_pcdi_16(m68k_info *info)
function d68020_cmpi_pcix_16 (line 1878) | static void d68020_cmpi_pcix_16(m68k_info *info)
function d68000_cmpi_32 (line 1884) | static void d68000_cmpi_32(m68k_info *info)
function d68020_cmpi_pcdi_32 (line 1889) | static void d68020_cmpi_pcdi_32(m68k_info *info)
function d68020_cmpi_pcix_32 (line 1895) | static void d68020_cmpi_pcix_32(m68k_info *info)
function d68000_cmpm_8 (line 1901) | static void d68000_cmpm_8(m68k_info *info)
function d68000_cmpm_16 (line 1906) | static void d68000_cmpm_16(m68k_info *info)
function d68000_cmpm_32 (line 1911) | static void d68000_cmpm_32(m68k_info *info)
function make_cpbcc_operand (line 1916) | static void make_cpbcc_operand(cs_m68k_op *op, int size, int displacement)
function d68020_cpbcc_16 (line 1924) | static void d68020_cpbcc_16(m68k_info *info)
function d68020_cpbcc_32 (line 1950) | static void d68020_cpbcc_32(m68k_info *info)
function d68020_cpdbcc (line 1969) | static void d68020_cpdbcc(m68k_info *info)
function fmove_fpcr (line 1997) | static void fmove_fpcr(m68k_info *info, uint32_t extension)
function fmovem (line 2026) | static void fmovem(m68k_info *info, uint32_t extension)
function d68020_cpgen (line 2068) | static void d68020_cpgen(m68k_info *info)
function d68020_cprestore (line 2328) | static void d68020_cprestore(m68k_info *info)
function d68020_cpsave (line 2337) | static void d68020_cpsave(m68k_info *info)
function d68020_cpscc (line 2347) | static void d68020_cpscc(m68k_info *info)
function d68020_cptrapcc_0 (line 2360) | static void d68020_cptrapcc_0(m68k_info *info)
function d68020_cptrapcc_16 (line 2373) | static void d68020_cptrapcc_16(m68k_info *info)
function d68020_cptrapcc_32 (line 2396) | static void d68020_cptrapcc_32(m68k_info *info)
function d68040_cpush (line 2419) | static void d68040_cpush(m68k_info *info)
function d68000_dbra (line 2425) | static void d68000_dbra(m68k_info *info)
function d68000_dbcc (line 2430) | static void d68000_dbcc(m68k_info *info)
function d68000_divs (line 2435) | static void d68000_divs(m68k_info *info)
function d68000_divu (line 2440) | static void d68000_divu(m68k_info *info)
function d68020_divl (line 2445) | static void d68020_divl(m68k_info *info)
function d68000_eor_8 (line 2483) | static void d68000_eor_8(m68k_info *info)
function d68000_eor_16 (line 2488) | static void d68000_eor_16(m68k_info *info)
function d68000_eor_32 (line 2493) | static void d68000_eor_32(m68k_info *info)
function d68000_eori_8 (line 2498) | static void d68000_eori_8(m68k_info *info)
function d68000_eori_16 (line 2503) | static void d68000_eori_16(m68k_info *info)
function d68000_eori_32 (line 2508) | static void d68000_eori_32(m68k_info *info)
function d68000_eori_to_ccr (line 2513) | static void d68000_eori_to_ccr(m68k_info *info)
function d68000_eori_to_sr (line 2519) | static void d68000_eori_to_sr(m68k_info *info)
function d68000_exg_dd (line 2525) | static void d68000_exg_dd(m68k_info *info)
function d68000_exg_aa (line 2530) | static void d68000_exg_aa(m68k_info *info)
function d68000_exg_da (line 2546) | static void d68000_exg_da(m68k_info *info)
function d68000_ext_16 (line 2562) | static void d68000_ext_16(m68k_info *info)
function d68000_ext_32 (line 2567) | static void d68000_ext_32(m68k_info *info)
function d68020_extb_32 (line 2572) | static void d68020_extb_32(m68k_info *info)
function d68000_jmp (line 2578) | static void d68000_jmp(m68k_info *info)
function d68000_jsr (line 2585) | static void d68000_jsr(m68k_info *info)
function d68000_lea (line 2592) | static void d68000_lea(m68k_info *info)
function d68000_link_16 (line 2597) | static void d68000_link_16(m68k_info *info)
function d68020_link_32 (line 2602) | static void d68020_link_32(m68k_info *info)
function d68000_lsr_s_8 (line 2608) | static void d68000_lsr_s_8(m68k_info *info)
function d68000_lsr_s_16 (line 2613) | static void d68000_lsr_s_16(m68k_info *info)
function d68000_lsr_s_32 (line 2618) | static void d68000_lsr_s_32(m68k_info *info)
function d68000_lsr_r_8 (line 2623) | static void d68000_lsr_r_8(m68k_info *info)
function d68000_lsr_r_16 (line 2628) | static void d68000_lsr_r_16(m68k_info *info)
function d68000_lsr_r_32 (line 2633) | static void d68000_lsr_r_32(m68k_info *info)
function d68000_lsr_ea (line 2638) | static void d68000_lsr_ea(m68k_info *info)
function d68000_lsl_s_8 (line 2643) | static void d68000_lsl_s_8(m68k_info *info)
function d68000_lsl_s_16 (line 2648) | static void d68000_lsl_s_16(m68k_info *info)
function d68000_lsl_s_32 (line 2653) | static void d68000_lsl_s_32(m68k_info *info)
function d68000_lsl_r_8 (line 2658) | static void d68000_lsl_r_8(m68k_info *info)
function d68000_lsl_r_16 (line 2663) | static void d68000_lsl_r_16(m68k_info *info)
function d68000_lsl_r_32 (line 2668) | static void d68000_lsl_r_32(m68k_info *info)
function d68000_lsl_ea (line 2673) | static void d68000_lsl_ea(m68k_info *info)
function d68000_move_8 (line 2678) | static void d68000_move_8(m68k_info *info)
function d68000_move_16 (line 2683) | static void d68000_move_16(m68k_info *info)
function d68000_move_32 (line 2688) | static void d68000_move_32(m68k_info *info)
function d68000_movea_16 (line 2693) | static void d68000_movea_16(m68k_info *info)
function d68000_movea_32 (line 2698) | static void d68000_movea_32(m68k_info *info)
function d68000_move_to_ccr (line 2703) | static void d68000_move_to_ccr(m68k_info *info)
function d68010_move_fr_ccr (line 2718) | static void d68010_move_fr_ccr(m68k_info *info)
function d68000_move_fr_sr (line 2737) | static void d68000_move_fr_sr(m68k_info *info)
function d68000_move_to_sr (line 2752) | static void d68000_move_to_sr(m68k_info *info)
function d68000_move_fr_usp (line 2767) | static void d68000_move_fr_usp(m68k_info *info)
function d68000_move_to_usp (line 2783) | static void d68000_move_to_usp(m68k_info *info)
function d68010_movec (line 2799) | static void d68010_movec(m68k_info *info)
function d68000_movem_pd_16 (line 2879) | static void d68000_movem_pd_16(m68k_info *info)
function d68000_movem_pd_32 (line 2884) | static void d68000_movem_pd_32(m68k_info *info)
function d68000_movem_er_16 (line 2889) | static void d68000_movem_er_16(m68k_info *info)
function d68000_movem_er_32 (line 2894) | static void d68000_movem_er_32(m68k_info *info)
function d68000_movem_re_16 (line 2899) | static void d68000_movem_re_16(m68k_info *info)
function d68000_movem_re_32 (line 2904) | static void d68000_movem_re_32(m68k_info *info)
function d68000_movep_re_16 (line 2909) | static void d68000_movep_re_16(m68k_info *info)
function d68000_movep_re_32 (line 2914) | static void d68000_movep_re_32(m68k_info *info)
function d68000_movep_er_16 (line 2919) | static void d68000_movep_er_16(m68k_info *info)
function d68000_movep_er_32 (line 2924) | static void d68000_movep_er_32(m68k_info *info)
function d68010_moves_8 (line 2929) | static void d68010_moves_8(m68k_info *info)
function d68010_moves_16 (line 2935) | static void d68010_moves_16(m68k_info *info)
function d68010_moves_32 (line 2942) | static void d68010_moves_32(m68k_info *info)
function d68000_moveq (line 2948) | static void d68000_moveq(m68k_info *info)
function d68040_move16_pi_pi (line 2966) | static void d68040_move16_pi_pi(m68k_info *info)
function d68040_move16_pi_al (line 2977) | static void d68040_move16_pi_al(m68k_info *info)
function d68040_move16_al_pi (line 2988) | static void d68040_move16_al_pi(m68k_info *info)
function d68040_move16_ai_al (line 2999) | static void d68040_move16_ai_al(m68k_info *info)
function d68040_move16_al_ai (line 3009) | static void d68040_move16_al_ai(m68k_info *info)
function d68000_muls (line 3019) | static void d68000_muls(m68k_info *info)
function d68000_mulu (line 3024) | static void d68000_mulu(m68k_info *info)
function d68020_mull (line 3029) | static void d68020_mull(m68k_info *info)
function d68000_nbcd (line 3067) | static void d68000_nbcd(m68k_info *info)
function d68000_neg_8 (line 3072) | static void d68000_neg_8(m68k_info *info)
function d68000_neg_16 (line 3077) | static void d68000_neg_16(m68k_info *info)
function d68000_neg_32 (line 3082) | static void d68000_neg_32(m68k_info *info)
function d68000_negx_8 (line 3087) | static void d68000_negx_8(m68k_info *info)
function d68000_negx_16 (line 3092) | static void d68000_negx_16(m68k_info *info)
function d68000_negx_32 (line 3097) | static void d68000_negx_32(m68k_info *info)
function d68000_nop (line 3102) | static void d68000_nop(m68k_info *info)
function d68000_not_8 (line 3107) | static void d68000_not_8(m68k_info *info)
function d68000_not_16 (line 3112) | static void d68000_not_16(m68k_info *info)
function d68000_not_32 (line 3117) | static void d68000_not_32(m68k_info *info)
function d68000_or_er_8 (line 3122) | static void d68000_or_er_8(m68k_info *info)
function d68000_or_er_16 (line 3127) | static void d68000_or_er_16(m68k_info *info)
function d68000_or_er_32 (line 3132) | static void d68000_or_er_32(m68k_info *info)
function d68000_or_re_8 (line 3137) | static void d68000_or_re_8(m68k_info *info)
function d68000_or_re_16 (line 3142) | static void d68000_or_re_16(m68k_info *info)
function d68000_or_re_32 (line 3147) | static void d68000_or_re_32(m68k_info *info)
function d68000_ori_8 (line 3152) | static void d68000_ori_8(m68k_info *info)
function d68000_ori_16 (line 3157) | static void d68000_ori_16(m68k_info *info)
function d68000_ori_32 (line 3162) | static void d68000_ori_32(m68k_info *info)
function d68000_ori_to_ccr (line 3167) | static void d68000_ori_to_ccr(m68k_info *info)
function d68000_ori_to_sr (line 3173) | static void d68000_ori_to_sr(m68k_info *info)
function d68020_pack_rr (line 3179) | static void d68020_pack_rr(m68k_info *info)
function d68020_pack_mm (line 3185) | static void d68020_pack_mm(m68k_info *info)
function d68000_pea (line 3191) | static void d68000_pea(m68k_info *info)
function d68000_reset (line 3196) | static void d68000_reset(m68k_info *info)
function d68000_ror_s_8 (line 3201) | static void d68000_ror_s_8(m68k_info *info)
function d68000_ror_s_16 (line 3206) | static void d68000_ror_s_16(m68k_info *info)
function d68000_ror_s_32 (line 3211) | static void d68000_ror_s_32(m68k_info *info)
function d68000_ror_r_8 (line 3216) | static void d68000_ror_r_8(m68k_info *info)
function d68000_ror_r_16 (line 3221) | static void d68000_ror_r_16(m68k_info *info)
function d68000_ror_r_32 (line 3226) | static void d68000_ror_r_32(m68k_info *info)
function d68000_ror_ea (line 3231) | static void d68000_ror_ea(m68k_info *info)
function d68000_rol_s_8 (line 3236) | static void d68000_rol_s_8(m68k_info *info)
function d68000_rol_s_16 (line 3241) | static void d68000_rol_s_16(m68k_info *info)
function d68000_rol_s_32 (line 3246) | static void d68000_rol_s_32(m68k_info *info)
function d68000_rol_r_8 (line 3251) | static void d68000_rol_r_8(m68k_info *info)
function d68000_rol_r_16 (line 3256) | static void d68000_rol_r_16(m68k_info *info)
function d68000_rol_r_32 (line 3261) | static void d68000_rol_r_32(m68k_info *info)
function d68000_rol_ea (line 3266) | static void d68000_rol_ea(m68k_info *info)
function d68000_roxr_s_8 (line 3271) | static void d68000_roxr_s_8(m68k_info *info)
function d68000_roxr_s_16 (line 3276) | static void d68000_roxr_s_16(m68k_info *info)
function d68000_roxr_s_32 (line 3281) | static void d68000_roxr_s_32(m68k_info *info)
function d68000_roxr_r_8 (line 3286) | static void d68000_roxr_r_8(m68k_info *info)
function d68000_roxr_r_16 (line 3291) | static void d68000_roxr_r_16(m68k_info *info)
function d68000_roxr_r_32 (line 3296) | static void d68000_roxr_r_32(m68k_info *info)
function d68000_roxr_ea (line 3301) | static void d68000_roxr_ea(m68k_info *info)
function d68000_roxl_s_8 (line 3306) | static void d68000_roxl_s_8(m68k_info *info)
function d68000_roxl_s_16 (line 3311) | static void d68000_roxl_s_16(m68k_info *info)
function d68000_roxl_s_32 (line 3316) | static void d68000_roxl_s_32(m68k_info *info)
function d68000_roxl_r_8 (line 3321) | static void d68000_roxl_r_8(m68k_info *info)
function d68000_roxl_r_16 (line 3326) | static void d68000_roxl_r_16(m68k_info *info)
function d68000_roxl_r_32 (line 3331) | static void d68000_roxl_r_32(m68k_info *info)
function d68000_roxl_ea (line 3336) | static void d68000_roxl_ea(m68k_info *info)
function d68010_rtd (line 3341) | static void d68010_rtd(m68k_info *info)
function d68000_rte (line 3349) | static void d68000_rte(m68k_info *info)
function d68020_rtm (line 3355) | static void d68020_rtm(m68k_info *info)
function d68000_rtr (line 3379) | static void d68000_rtr(m68k_info *info)
function d68000_rts (line 3385) | static void d68000_rts(m68k_info *info)
function d68000_sbcd_rr (line 3391) | static void d68000_sbcd_rr(m68k_info *info)
function d68000_sbcd_mm (line 3396) | static void d68000_sbcd_mm(m68k_info *info)
function d68000_scc (line 3401) | static void d68000_scc(m68k_info *info)
function d68000_stop (line 3408) | static void d68000_stop(m68k_info *info)
function d68000_sub_er_8 (line 3414) | static void d68000_sub_er_8(m68k_info *info)
function d68000_sub_er_16 (line 3419) | static void d68000_sub_er_16(m68k_info *info)
function d68000_sub_er_32 (line 3424) | static void d68000_sub_er_32(m68k_info *info)
function d68000_sub_re_8 (line 3429) | static void d68000_sub_re_8(m68k_info *info)
function d68000_sub_re_16 (line 3434) | static void d68000_sub_re_16(m68k_info *info)
function d68000_sub_re_32 (line 3439) | static void d68000_sub_re_32(m68k_info *info)
function d68000_suba_16 (line 3444) | static void d68000_suba_16(m68k_info *info)
function d68000_suba_32 (line 3449) | static void d68000_suba_32(m68k_info *info)
function d68000_subi_8 (line 3454) | static void d68000_subi_8(m68k_info *info)
function d68000_subi_16 (line 3459) | static void d68000_subi_16(m68k_info *info)
function d68000_subi_32 (line 3464) | static void d68000_subi_32(m68k_info *info)
function d68000_subq_8 (line 3469) | static void d68000_subq_8(m68k_info *info)
function d68000_subq_16 (line 3474) | static void d68000_subq_16(m68k_info *info)
function d68000_subq_32 (line 3479) | static void d68000_subq_32(m68k_info *info)
function d68000_subx_rr_8 (line 3484) | static void d68000_subx_rr_8(m68k_info *info)
function d68000_subx_rr_16 (line 3489) | static void d68000_subx_rr_16(m68k_info *info)
function d68000_subx_rr_32 (line 3494) | static void d68000_subx_rr_32(m68k_info *info)
function d68000_subx_mm_8 (line 3499) | static void d68000_subx_mm_8(m68k_info *info)
function d68000_subx_mm_16 (line 3504) | static void d68000_subx_mm_16(m68k_info *info)
function d68000_subx_mm_32 (line 3509) | static void d68000_subx_mm_32(m68k_info *info)
function d68000_swap (line 3514) | static void d68000_swap(m68k_info *info)
function d68000_tas (line 3519) | static void d68000_tas(m68k_info *info)
function d68000_trap (line 3524) | static void d68000_trap(m68k_info *info)
function d68020_trapcc_0 (line 3530) | static void d68020_trapcc_0(m68k_info *info)
function d68020_trapcc_16 (line 3538) | static void d68020_trapcc_16(m68k_info *info)
function d68020_trapcc_32 (line 3544) | static void d68020_trapcc_32(m68k_info *info)
function d68000_trapv (line 3550) | static void d68000_trapv(m68k_info *info)
function d68000_tst_8 (line 3555) | static void d68000_tst_8(m68k_info *info)
function d68020_tst_pcdi_8 (line 3560) | static void d68020_tst_pcdi_8(m68k_info *info)
function d68020_tst_pcix_8 (line 3566) | static void d68020_tst_pcix_8(m68k_info *info)
function d68020_tst_i_8 (line 3572) | static void d68020_tst_i_8(m68k_info *info)
function d68000_tst_16 (line 3578) | static void d68000_tst_16(m68k_info *info)
function d68020_tst_a_16 (line 3583) | static void d68020_tst_a_16(m68k_info *info)
function d68020_tst_pcdi_16 (line 3589) | static void d68020_tst_pcdi_16(m68k_info *info)
function d68020_tst_pcix_16 (line 3595) | static void d68020_tst_pcix_16(m68k_info *info)
function d68020_tst_i_16 (line 3601) | static void d68020_tst_i_16(m68k_info *info)
function d68000_tst_32 (line 3607) | static void d68000_tst_32(m68k_info *info)
function d68020_tst_a_32 (line 3612) | static void d68020_tst_a_32(m68k_info *info)
function d68020_tst_pcdi_32 (line 3618) | static void d68020_tst_pcdi_32(m68k_info *info)
function d68020_tst_pcix_32 (line 3624) | static void d68020_tst_pcix_32(m68k_info *info)
function d68020_tst_i_32 (line 3630) | static void d68020_tst_i_32(m68k_info *info)
function d68000_unlk (line 3636) | static void d68000_unlk(m68k_info *info)
function d68020_unpk_rr (line 3647) | static void d68020_unpk_rr(m68k_info *info)
function d68020_unpk_mm (line 3653) | static void d68020_unpk_mm(m68k_info *info)
function instruction_is_valid (line 3662) | static int instruction_is_valid(m68k_info *info, const unsigned int word...
function exists_reg_list (line 3677) | static int exists_reg_list(uint16_t *regs, uint8_t count, m68k_reg reg)
function add_reg_to_rw_list (line 3689) | static void add_reg_to_rw_list(m68k_info *info, m68k_reg reg, int write)
function update_am_reg_list (line 3711) | static void update_am_reg_list(m68k_info *info, cs_m68k_op *op, int write)
function update_bits_range (line 3747) | static void update_bits_range(m68k_info *info, m68k_reg reg_start, uint8...
function update_reg_list_regbits (line 3759) | static void update_reg_list_regbits(m68k_info *info, cs_m68k_op *op, int...
function update_op_reg_list (line 3767) | static void update_op_reg_list(m68k_info *info, cs_m68k_op *op, int write)
function build_regs_read_write_counts (line 3789) | static void build_regs_read_write_counts(m68k_info *info)
function m68k_setup_internals (line 3809) | static void m68k_setup_internals(m68k_info *info, MCInst *inst, unsigned...
function m68k_disassemble (line 3854) | static unsigned int m68k_disassemble(m68k_info *info, uint64_t pc)
function M68K_getInstruction (line 3881) | bool M68K_getInstruction(csh ud, const uint8_t *code, size_t code_len,
FILE: arch/M68K/M68KDisassembler.h
type m68k_info (line 10) | typedef struct m68k_info {
FILE: arch/M68K/M68KInstPrinter.c
function printRegbitsRange (line 107) | static void printRegbitsRange(char *buffer, size_t buf_len, uint32_t data,
function registerBits (line 137) | static void registerBits(SStream *O, const cs_m68k_op *op)
function registerPair (line 156) | static void registerPair(SStream *O, const cs_m68k_op *op)
function printAddressingMode (line 162) | static void printAddressingMode(SStream *O, unsigned int pc,
function M68K_printInst (line 347) | void M68K_printInst(MCInst *MI, SStream *O, void *PrinterInfo)
function M68K_get_insn_id (line 466) | void M68K_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function M68K_reg_access (line 500) | void M68K_reg_access(const cs_insn *insn, cs_regs regs_read,
FILE: arch/M68K/M68KInstPrinter.h
type SStream (line 11) | struct SStream
type SStream (line 14) | struct SStream
FILE: arch/M68K/M68KModule.c
function cs_err (line 12) | cs_err M68K_global_init(cs_struct *ud)
function cs_err (line 39) | cs_err M68K_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/MOS65XX/MOS65XXDisassembler.c
type OpInfo (line 8) | typedef struct OpInfo {
type OpInfo (line 14) | struct OpInfo
type InstructionInfo (line 31) | typedef struct InstructionInfo {
type InstructionInfo (line 38) | struct InstructionInfo
function fillDetails (line 46) | static void fillDetails(MCInst *MI, struct OpInfo opinfo, int cpu_type)
function MOS65XX_printInst (line 270) | void MOS65XX_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo)
function MOS65XX_getInstruction (line 422) | bool MOS65XX_getInstruction(csh ud, const uint8_t *code, size_t code_len,
function MOS65XX_get_insn_id (line 558) | void MOS65XX_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
FILE: arch/MOS65XX/MOS65XXDisassembler.h
type SStream (line 9) | struct SStream
FILE: arch/MOS65XX/MOS65XXDisassemblerInternals.h
type mos65xx_info (line 13) | typedef struct mos65xx_info {
FILE: arch/MOS65XX/MOS65XXModule.c
function cs_err (line 12) | cs_err MOS65XX_global_init(cs_struct *ud)
function cs_err (line 40) | cs_err MOS65XX_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/Mips/MipsCP0RegisterMap.h
type CP0SelRegister_t (line 7) | struct CP0SelRegister_t {
type CP0SelRegister_t (line 14) | struct CP0SelRegister_t
function COP0Map_getEncIndexMap (line 178) | inline static int COP0Map_getEncIndexMap(int RegNo)
FILE: arch/Mips/MipsDisassembler.c
function Mips_getFeatureBits (line 54) | bool Mips_getFeatureBits(unsigned int mode, unsigned int feature)
function getReg (line 767) | static unsigned getReg(const MCInst *Inst, unsigned RC, unsigned RegNo)
type DecodeStatus (line 773) | typedef DecodeStatus (*DecodeFN)(MCInst *Inst, uint32_t Insn, uint64_t A...
function DecodeStatus (line 776) | static DecodeStatus DecodeINSVE_DF(MCInst *MI, uint32_t insn, uint64_t A...
function DecodeStatus (line 835) | static DecodeStatus DecodeDAHIDATI(MCInst *MI, uint32_t insn, uint64_t A...
function DecodeStatus (line 847) | static DecodeStatus DecodeAddiGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 885) | static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 925) | static DecodeStatus DecodeDaddiGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 964) | static DecodeStatus DecodePOP37GroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1004) | static DecodeStatus DecodePOP65GroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1043) | static DecodeStatus DecodePOP75GroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1082) | static DecodeStatus DecodeBlezlGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1125) | static DecodeStatus DecodeBgtzlGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1169) | static DecodeStatus DecodeBgtzGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1218) | static DecodeStatus DecodeBlezGroupBranch(MCInst *MI, uint32_t insn,
function DecodeStatus (line 1261) | static DecodeStatus DecodeDEXT(MCInst *MI, uint32_t Insn, uint64_t Address,
function DecodeStatus (line 1303) | static DecodeStatus DecodeDINS(MCInst *MI, uint32_t Insn, uint64_t Address,
function DecodeStatus (line 1345) | static DecodeStatus DecodeCRC(MCInst *MI, uint32_t Insn, uint64_t Address,
function DecodeStatus (line 1358) | static DecodeStatus readInstruction16(const uint8_t *Bytes, size_t Bytes...
function DecodeStatus (line 1379) | static DecodeStatus readInstruction32(const uint8_t *Bytes, size_t Bytes...
function DecodeStatus (line 1417) | static DecodeStatus readInstruction48(const uint8_t *Bytes, size_t Bytes...
function DecodeStatus (line 1441) | static DecodeStatus getInstruction(MCInst *Instr, uint64_t *Size,
function DecodeStatus (line 1731) | static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst *Inst, unsigned ...
function DecodeStatus (line 1746) | static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1758) | static DecodeStatus DecodeGPRMM16RegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1769) | static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst *Inst, unsigne...
function DecodeStatus (line 1780) | static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst *Inst,
function DecodeStatus (line 1792) | static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1803) | static DecodeStatus DecodeGPRNM3RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1815) | static DecodeStatus DecodeGPRNMRARegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1823) | static DecodeStatus DecodeGPRNM3ZRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1836) | static DecodeStatus DecodeGPRNM4RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1849) | static DecodeStatus DecodeGPRNM4ZRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1865) | static DecodeStatus DecodeGPRNM32NZRegisterClass(MCInst *Inst, unsigned ...
function DecodeStatus (line 1876) | static DecodeStatus DecodeGPRNM32RegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 1887) | static DecodeStatus DecodeGPRNM2R1RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 1900) | static DecodeStatus DecodeGPRNM1R1RegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 1912) | static DecodeStatus DecodePtrRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1922) | static DecodeStatus DecodeDSPRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1929) | static DecodeStatus DecodeFGR64RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1941) | static DecodeStatus DecodeFGR32RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1953) | static DecodeStatus DecodeCCRRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1964) | static DecodeStatus DecodeFCCRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1975) | static DecodeStatus DecodeFGRCCRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 1987) | static DecodeStatus DecodeMem(MCInst *Inst, uint32_t Insn, uint64_t Addr...
function DecodeStatus (line 2051) | static DecodeStatus DecodeMemZeroNM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2082) | static DecodeStatus DecodeMemNM4x4(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2097) | static DecodeStatus DecodeMemEVA(MCInst *Inst, uint32_t Insn, uint64_t A...
function DecodeStatus (line 2119) | static DecodeStatus DecodeCOP0SelRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2155) | static DecodeStatus DecodeLoadByte15(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2172) | static DecodeStatus DecodeCacheOp(MCInst *Inst, uint32_t Insn, uint64_t ...
function DecodeStatus (line 2188) | static DecodeStatus DecodeCacheOpMM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2204) | static DecodeStatus DecodePrefeOpMM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2220) | static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2237) | static DecodeStatus DecodeSyncI(MCInst *Inst, uint32_t Insn, uint64_t Ad...
function DecodeStatus (line 2251) | static DecodeStatus DecodeSyncI_MM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2265) | static DecodeStatus DecodeSynciR6(MCInst *Inst, uint32_t Insn, uint64_t ...
function DecodeStatus (line 2279) | static DecodeStatus DecodeMSA128Mem(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2325) | static DecodeStatus DecodeMemMMImm4(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2382) | static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2397) | static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2412) | static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2437) | static DecodeStatus DecodeMemMMImm9(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2458) | static DecodeStatus DecodeMemMMImm12(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2493) | static DecodeStatus DecodeMemMMImm16(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2510) | static DecodeStatus DecodeFMem(MCInst *Inst, uint32_t Insn, uint64_t Add...
function DecodeStatus (line 2527) | static DecodeStatus DecodeFMemMMR2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2546) | static DecodeStatus DecodeFMem2(MCInst *Inst, uint32_t Insn, uint64_t Ad...
function DecodeStatus (line 2563) | static DecodeStatus DecodeFMem3(MCInst *Inst, uint32_t Insn, uint64_t Ad...
function DecodeStatus (line 2580) | static DecodeStatus DecodeFMemCop2R6(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2597) | static DecodeStatus DecodeFMemCop2MMR6(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2614) | static DecodeStatus DecodeSpecial3LlSc(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2636) | static DecodeStatus DecodeHWRegsRegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 2647) | static DecodeStatus DecodeAFGR64RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 2659) | static DecodeStatus DecodeACC64DSPRegisterClass(MCInst *Inst, unsigned R...
function DecodeStatus (line 2671) | static DecodeStatus DecodeHI32DSPRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2683) | static DecodeStatus DecodeLO32DSPRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2695) | static DecodeStatus DecodeMSA128BRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2707) | static DecodeStatus DecodeMSA128HRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2719) | static DecodeStatus DecodeMSA128WRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2731) | static DecodeStatus DecodeMSA128DRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2743) | static DecodeStatus DecodeMSACtrlRegisterClass(MCInst *Inst, unsigned Re...
function DecodeStatus (line 2755) | static DecodeStatus DecodeCOP0RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 2767) | static DecodeStatus DecodeCOP2RegisterClass(MCInst *Inst, unsigned RegNo,
function DecodeStatus (line 2779) | static DecodeStatus DecodeBranchTarget(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2787) | static DecodeStatus DecodeBranchTarget1SImm16(MCInst *Inst, unsigned Off...
function DecodeStatus (line 2796) | static DecodeStatus DecodeJumpTarget(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2804) | static DecodeStatus DecodeBranchTarget21(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2813) | static DecodeStatus DecodeBranchTarget21MM(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2823) | static DecodeStatus DecodeBranchTarget26(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2832) | static DecodeStatus DecodeBranchTarget7MM(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2840) | static DecodeStatus DecodeBranchTarget10MM(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2849) | static DecodeStatus DecodeBranchTargetMM(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2857) | static DecodeStatus DecodeBranchTarget26MM(MCInst *Inst, unsigned Offset,
function DecodeStatus (line 2867) | static DecodeStatus DecodeJumpTargetMM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2895) | static DecodeStatus DecodeJumpTargetXMM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2903) | static DecodeStatus DecodeAddiur2Simm7(MCInst *Inst, unsigned Value,
function DecodeStatus (line 2915) | static DecodeStatus DecodeLi16Imm(MCInst *Inst, unsigned Value,
function DecodeStatus (line 2925) | static DecodeStatus DecodePOOL16BEncodedField(MCInst *Inst, unsigned Value,
function DecodeStatus (line 2974) | static DecodeStatus DecodeInsSize(MCInst *Inst, uint32_t Insn, uint64_t ...
function DecodeStatus (line 2986) | static DecodeStatus DecodeSimm19Lsl2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 2993) | static DecodeStatus DecodeSimm18Lsl3(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3000) | static DecodeStatus DecodeSimm9SP(MCInst *Inst, uint32_t Insn, uint64_t ...
function DecodeStatus (line 3025) | static DecodeStatus DecodeANDI16Imm(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3036) | static DecodeStatus DecodeRegListOperand(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3064) | static DecodeStatus DecodeRegListOperand16(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3089) | static DecodeStatus DecodeMovePOperands(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3115) | static DecodeStatus DecodeMovePRegPair(MCInst *Inst, unsigned RegPair,
function DecodeStatus (line 3158) | static DecodeStatus DecodeSimm23Lsl2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3165) | static DecodeStatus DecodeBgtzGroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 3218) | static DecodeStatus DecodeBlezGroupBranchMMR6(MCInst *MI, uint32_t insn,
function DecodeStatus (line 3267) | static DecodeStatus DecodeFIXMEInstruction(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3274) | static DecodeStatus DecodeImmM1To126(MCInst *Inst, unsigned Value,
function DecodeStatus (line 3284) | static DecodeStatus DecodeUImm4Mask(MCInst *Inst, unsigned Value,
function DecodeStatus (line 3296) | static DecodeStatus DecodeUImm3Shift(MCInst *Inst, unsigned Value,
function DecodeStatus (line 3306) | static DecodeStatus DecodeNMRegListOperand(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3331) | static DecodeStatus DecodeNMRegList16Operand(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3343) | static DecodeStatus DecodeNegImm12(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3382) | static DecodeStatus DecodeSImm32s12(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3405) | static DecodeStatus DecodeBranchConflictNM(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 3426) | DecodeStatus Mips_LLVM_getInstruction(MCInst *Instr, uint64_t *Size,
FILE: arch/Mips/MipsInstPrinter.c
function isReg (line 52) | static bool isReg(const MCInst *MI, unsigned OpNo, unsigned R)
function printRegName (line 115) | static void printRegName(MCInst *MI, SStream *OS, MCRegister Reg)
function patch_cs_printer (line 125) | static void patch_cs_printer(MCInst *MI, SStream *O)
function patch_cs_detail_operand_reg (line 142) | static void patch_cs_detail_operand_reg(cs_mips_op *op, unsigned reg,
function patch_cs_details (line 151) | static void patch_cs_details(MCInst *MI)
function Mips_LLVM_printInst (line 233) | void Mips_LLVM_printInst(MCInst *MI, uint64_t Address, SStream *O)
function printOperand (line 257) | void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printJumpOperand (line 311) | static void printJumpOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printBranchOperand (line 324) | static void printBranchOperand(MCInst *MI, uint64_t Address, unsigned OpNo,
function printMemOperand (line 396) | static void printMemOperand(MCInst *MI, int opNum, SStream *O)
function printMemOperandEA (line 458) | static void printMemOperandEA(MCInst *MI, int opNum, SStream *O)
function printFCCOperand (line 467) | static void printFCCOperand(MCInst *MI, int opNum, SStream *O)
function printAlias (line 474) | static bool printAlias(const char *Str, const MCInst *MI, uint64_t Address,
function printAlias2 (line 486) | static bool printAlias2(const char *Str, const MCInst *MI, uint64_t Addr...
function printAlias3 (line 499) | static bool printAlias3(const char *Str, const MCInst *MI, uint64_t Addr...
function printAlias4 (line 511) | static bool printAlias4(const MCInst *MI, uint64_t Address, SStream *OS)
function printRegisterList (line 603) | static void printRegisterList(MCInst *MI, int opNum, SStream *O)
function printNanoMipsRegisterList (line 616) | static void printNanoMipsRegisterList(MCInst *MI, int OpNum, SStream *O)
function printHi20 (line 626) | static void printHi20(MCInst *MI, int OpNum, SStream *O)
function printHi20PCRel (line 638) | static void printHi20PCRel(MCInst *MI, uint64_t Address, int OpNum, SStr...
function printPCRel (line 650) | static void printPCRel(MCInst *MI, uint64_t Address, int OpNum, SStream *O)
FILE: arch/Mips/MipsInstPrinter.h
type Mips_FPBranchCode (line 47) | typedef enum MipsFPBranchCode {
type Mips_CondCode (line 56) | typedef enum MipsCondCode {
FILE: arch/Mips/MipsMapping.c
function Mips_init_mri (line 28) | void Mips_init_mri(MCRegisterInfo *MRI)
function Mips_get_insn_id (line 45) | void Mips_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function Mips_reg_access (line 116) | void Mips_reg_access(const cs_insn *insn, cs_regs regs_read,
function Mips_set_instr_map_data (line 172) | void Mips_set_instr_map_data(MCInst *MI)
function Mips_getInstruction (line 191) | bool Mips_getInstruction(csh handle, const uint8_t *code, size_t code_len,
function Mips_printer (line 212) | void Mips_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ i...
function Mips_setup_op (line 224) | static void Mips_setup_op(cs_mips_op *op)
function Mips_init_cs_detail (line 230) | void Mips_init_cs_detail(MCInst *MI)
function Mips_set_detail_op_mem_reg (line 247) | static void Mips_set_detail_op_mem_reg(MCInst *MI, unsigned OpNum, mips_...
function Mips_set_detail_op_mem_disp (line 254) | static void Mips_set_detail_op_mem_disp(MCInst *MI, unsigned OpNum, int6...
function Mips_set_detail_op_imm (line 261) | static void Mips_set_detail_op_imm(MCInst *MI, unsigned OpNum, int64_t Imm)
function Mips_set_detail_op_uimm (line 277) | static void Mips_set_detail_op_uimm(MCInst *MI, unsigned OpNum, uint64_t...
function Mips_set_detail_op_reg (line 294) | static void Mips_set_detail_op_reg(MCInst *MI, unsigned OpNum, mips_reg ...
function Mips_set_detail_op_operand (line 314) | static void Mips_set_detail_op_operand(MCInst *MI, unsigned OpNum)
function Mips_set_detail_op_jump (line 337) | static void Mips_set_detail_op_jump(MCInst *MI, unsigned OpNum)
function Mips_set_detail_op_branch (line 351) | static void Mips_set_detail_op_branch(MCInst *MI, unsigned OpNum)
function Mips_set_detail_op_unsigned (line 364) | static void Mips_set_detail_op_unsigned(MCInst *MI, unsigned OpNum)
function Mips_set_detail_op_unsigned_offset (line 369) | static void Mips_set_detail_op_unsigned_offset(MCInst *MI, unsigned OpNum,
function Mips_set_detail_op_mem_nanomips (line 379) | static void Mips_set_detail_op_mem_nanomips(MCInst *MI, unsigned OpNum)
function Mips_set_detail_op_reglist (line 390) | static void Mips_set_detail_op_reglist(MCInst *MI, unsigned OpNum,
function Mips_set_detail_op_unsigned_address (line 408) | static void Mips_set_detail_op_unsigned_address(MCInst *MI, unsigned OpNum)
function Mips_add_cs_detail_0 (line 414) | void Mips_add_cs_detail_0(MCInst *MI, mips_op_group op_group, size_t OpNum)
function Mips_set_mem_access (line 487) | void Mips_set_mem_access(MCInst *MI, bool status)
FILE: arch/Mips/MipsMapping.h
type mips_op_group (line 11) | typedef enum {
function set_mem_access (line 44) | static inline void set_mem_access(MCInst *MI, bool status)
FILE: arch/Mips/MipsModule.c
function cs_err (line 13) | cs_err Mips_global_init(cs_struct *ud)
function cs_err (line 38) | cs_err Mips_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/PowerPC/PPCDisassembler.c
function DecodeStatus (line 54) | static DecodeStatus decodeCondBrTarget(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 61) | static DecodeStatus decodeDirectBrTarget(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 72) | static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 79) | static DecodeStatus DecodeCRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 86) | static DecodeStatus DecodeCRBITRCRegisterClass(MCInst *Inst, uint64_t Re...
function DecodeStatus (line 93) | static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 100) | static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 107) | static DecodeStatus DecodeFpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 116) | static DecodeStatus DecodeVFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 123) | static DecodeStatus DecodeVRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 130) | static DecodeStatus DecodeVSRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 137) | static DecodeStatus DecodeVSFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 144) | static DecodeStatus DecodeVSSRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 151) | static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 158) | static DecodeStatus DecodeGPRC_NOR0RegisterClass(MCInst *Inst, uint64_t ...
function DecodeStatus (line 165) | static DecodeStatus DecodeG8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 172) | static DecodeStatus DecodeG8pRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 179) | static DecodeStatus DecodeG8RC_NOX0RegisterClass(MCInst *Inst, uint64_t ...
function DecodeStatus (line 189) | static DecodeStatus DecodeSPERCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 196) | static DecodeStatus DecodeACCRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 203) | static DecodeStatus DecodeWACCRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 210) | static DecodeStatus DecodeWACC_HIRCRegisterClass(MCInst *Inst, uint64_t ...
function DecodeStatus (line 219) | DecodeStatus DecodeDMRROWRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 225) | static DecodeStatus DecodeDMRROWpRCRegisterClass(MCInst *Inst, uint64_t ...
function DecodeStatus (line 232) | static DecodeStatus DecodeDMRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 241) | DecodeStatus DecodeDMRpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 247) | static DecodeStatus DecodeVSRpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 257) | static DecodeStatus DecodeQFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 300) | static DecodeStatus decodeImmZeroOperand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 309) | static DecodeStatus decodeVSRpEvenOperands(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 319) | static DecodeStatus decodeDispSPE8Operand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 330) | static DecodeStatus decodeDispSPE4Operand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 341) | static DecodeStatus decodeDispSPE2Operand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 351) | static DecodeStatus decodeDispRIXOperand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 359) | static DecodeStatus decodeDispRIX16Operand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 367) | static DecodeStatus decodeDispRIHashOperand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 381) | static DecodeStatus decodeCRBitMOperand(MCInst *Inst, uint64_t Imm,
function DecodeStatus (line 396) | DecodeStatus getInstruction(csh ud, const uint8_t *Bytes, size_t BytesLen,
function DecodeStatus (line 452) | DecodeStatus PPC_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
FILE: arch/PowerPC/PPCInstPrinter.c
function showRegistersWithPercentPrefix (line 65) | static inline bool showRegistersWithPercentPrefix(const MCInst *MI,
function showRegistersWithPrefix (line 109) | static inline bool showRegistersWithPrefix(const MCInst *MI)
function printOperand (line 114) | static inline void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printPredicateOperand (line 147) | static inline void printPredicateOperand(MCInst *MI, unsigned OpNo, SStr...
function printATBitsAsHint (line 247) | static inline void printATBitsAsHint(MCInst *MI, unsigned OpNo, SStream *O)
function printU1ImmOperand (line 257) | static inline void printU1ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU2ImmOperand (line 265) | static inline void printU2ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU3ImmOperand (line 273) | static inline void printU3ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU4ImmOperand (line 281) | static inline void printU4ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printS5ImmOperand (line 289) | static inline void printS5ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printImmZeroOperand (line 297) | static inline void printImmZeroOperand(MCInst *MI, unsigned OpNo, SStrea...
function printU5ImmOperand (line 305) | static inline void printU5ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU6ImmOperand (line 313) | static inline void printU6ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU7ImmOperand (line 321) | static inline void printU7ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU8ImmOperand (line 332) | static inline void printU8ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
function printU10ImmOperand (line 340) | static inline void printU10ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printU12ImmOperand (line 348) | static inline void printU12ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printS12ImmOperand (line 356) | static inline void printS12ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printMemRegImmPS (line 367) | static inline void printMemRegImmPS(MCInst *MI, unsigned OpNo, SStream *O)
function printS16ImmOperand (line 379) | static inline void printS16ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printS34ImmOperand (line 389) | static inline void printS34ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printU16ImmOperand (line 401) | static inline void printU16ImmOperand(MCInst *MI, unsigned OpNo, SStream...
function printBranchOperand (line 411) | static inline void printBranchOperand(MCInst *MI, uint64_t Address,
function printAbsBranchOperand (line 443) | static inline void printAbsBranchOperand(MCInst *MI, unsigned OpNo, SStr...
function printcrbitm (line 456) | static inline void printcrbitm(MCInst *MI, unsigned OpNo, SStream *O)
function printMemRegImm (line 492) | static inline void printMemRegImm(MCInst *MI, unsigned OpNo, SStream *O)
function printMemRegImmHash (line 507) | static inline void printMemRegImmHash(MCInst *MI, unsigned OpNo, SStream...
function printMemRegImm34PCRel (line 519) | static inline void printMemRegImm34PCRel(MCInst *MI, unsigned OpNo, SStr...
function printMemRegImm34 (line 531) | static inline void printMemRegImm34(MCInst *MI, unsigned OpNo, SStream *O)
function printMemRegReg (line 543) | static inline void printMemRegReg(MCInst *MI, unsigned OpNo, SStream *O)
function printTLSCall (line 559) | static inline void printTLSCall(MCInst *MI, unsigned OpNo, SStream *O)
function printInst (line 576) | static void printInst(MCInst *MI, uint64_t Address, const char *Annot,
function PPC_LLVM_printInst (line 756) | void PPC_LLVM_printInst(MCInst *MI, uint64_t Address, const char *Annot,
FILE: arch/PowerPC/PPCInstrInfo.h
function isVFRegister (line 9) | static bool isVFRegister(unsigned Reg)
function isVRRegister (line 13) | static bool isVRRegister(unsigned Reg)
function PPCInstrInfo_getRegNumForOperand (line 26) | static unsigned PPCInstrInfo_getRegNumForOperand(const MCInstrDesc *Desc,
FILE: arch/PowerPC/PPCMCTargetDesc.h
function isRunOfOnes (line 52) | static inline bool isRunOfOnes(unsigned Val, unsigned *MB, unsigned *ME)
function isRunOfOnes64 (line 77) | static inline bool isRunOfOnes64(uint64_t Val, unsigned *MB, unsigned *ME)
FILE: arch/PowerPC/PPCMapping.c
function is_feature_of (line 98) | static inline bool is_feature_of(int feature, int **feature_set, int set...
function PPC_init_mri (line 115) | void PPC_init_mri(MCRegisterInfo *MRI)
function PPC_get_insn_id (line 133) | void PPC_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
function PPC_check_updates_cr0 (line 202) | void PPC_check_updates_cr0(MCInst *MI)
function PPC_add_branch_predicates (line 220) | static void PPC_add_branch_predicates(MCInst *MI, const uint8_t *Bytes,
function PPC_set_instr_map_data (line 287) | void PPC_set_instr_map_data(MCInst *MI, const uint8_t *Bytes, size_t Byt...
function PPC_init_cs_detail (line 302) | void PPC_init_cs_detail(MCInst *MI)
function PPC_printer (line 317) | void PPC_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
function PPC_getInstruction (line 329) | bool PPC_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
function PPC_getFeatureBits (line 340) | bool PPC_getFeatureBits(unsigned int mode, unsigned int feature)
function handle_memory_operand (line 396) | static void handle_memory_operand(MCInst *MI, unsigned OpNum)
function add_cs_detail_general (line 411) | static void add_cs_detail_general(MCInst *MI, ppc_op_group op_group,
function PPC_add_cs_detail_1 (line 582) | void PPC_add_cs_detail_1(MCInst *MI, ppc_op_group op_group, unsigned OpNum,
function PPC_add_cs_detail_0 (line 616) | void PPC_add_cs_detail_0(MCInst *MI, ppc_op_group op_group, unsigned OpNo)
function PPC_set_detail_op_mem (line 658) | void PPC_set_detail_op_mem(MCInst *MI, unsigned OpNum, uint64_t Val,
function PPC_set_detail_op_reg (line 696) | void PPC_set_detail_op_reg(MCInst *MI, unsigned OpNum, ppc_reg Reg)
function PPC_set_detail_op_imm (line 712) | void PPC_set_detail_op_imm(MCInst *MI, unsigned OpNum, int64_t Imm)
function PPC_set_mem_access (line 726) | void PPC_set_mem_access(MCInst *MI, bool status)
function PPC_setup_op (line 752) | void PPC_setup_op(cs_ppc_op *op)
function PPC_insert_detail_op_imm_at (line 760) | void PPC_insert_detail_op_imm_at(MCInst *MI, unsigned index, int64_t Val,
FILE: arch/PowerPC/PPCMapping.h
type ppc_op_group (line 11) | typedef enum {
type ppc_alias_id (line 33) | typedef struct {
function set_mem_access (line 39) | static inline void set_mem_access(MCInst *MI, bool status)
FILE: arch/PowerPC/PPCModule.c
function cs_err (line 11) | cs_err PPC_global_init(cs_struct *ud)
function cs_err (line 33) | cs_err PPC_option(cs_struct *handle, cs_opt_type type, size_t value)
FILE: arch/PowerPC/PPCPredicates.h
type ppc_pred (line 39) | typedef ppc_pred PPC_Predicate;
function PPC_getPredicateCondition (line 47) | static inline unsigned PPC_getPredicateCondition(PPC_Predicate Opcode)
function PPC_getPredicateHint (line 53) | static inline unsigned PPC_getPredicateHint(PPC_Predicate Opcode)
function PPC_Predicate (line 59) | static inline PPC_Predicate PPC_getPredicate(unsigned Condition, unsigne...
FILE: arch/RISCV/RISCVBaseInfo.c
type VLMULDecodeResult (line 38) | typedef struct {
function VLMULDecodeResult (line 42) | VLMULDecodeResult decodeVLMUL(RISCVII_VLMUL VLMUL)
function printVType (line 66) | void printVType(unsigned VType, SStream *OS)
type LoadFP32ImmArrElement (line 95) | typedef struct {
function getFPImm (line 112) | float getFPImm(unsigned Imm)
function RISCVZC_printSpimm (line 134) | void RISCVZC_printSpimm(int64_t Spimm, SStream *OS)
FILE: arch/RISCV/RISCVBaseInfo.h
type RISCVOp_OperandType (line 69) | typedef enum OperandType {
type RISCVFenceField_FenceField (line 114) | typedef enum FenceField {
type RISCVFPRndMode_RoundingMode (line 123) | typedef enum RoundingMode {
function RISCVFPRndMode_isValidRoundingMode (line 133) | inline static bool RISCVFPRndMode_isValidRoundingMode(unsigned Mode)
function RISCVVType_isTailAgnostic (line 168) | inline static bool RISCVVType_isTailAgnostic(unsigned VType)
function RISCVVType_isMaskAgnostic (line 173) | inline static bool RISCVVType_isMaskAgnostic(unsigned VType)
type RISCVZC_RLISTENCODE (line 178) | typedef enum RLISTENCODE {
function RISCVZC_getStackAdjBase (line 195) | inline static unsigned RISCVZC_getStackAdjBase(unsigned RlistVal, bool I...
type RISCVII_VLMUL (line 248) | typedef enum VLMUL {
function RISCVII_VLMUL (line 259) | inline static RISCVII_VLMUL RISCVVType_getVLMUL(unsigned VType)
function RISCVVType_decodeVSEW (line 265) | inline static unsigned RISCVVType_decodeVSEW(unsigned VSEW)
function RISCVVType_getSEW (line 271) | inline static unsigned RISCVVType_getSEW(unsigned VType)
type RegVal (line 277) | typedef struct {
type RISCV_SysReg (line 281) | typedef struct SysReg {
FILE: arch/RISCV/RISCVDisassembler.c
function DecodeStatus (line 64) | static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 78) | static DecodeStatus DecodeGPRX1X5RegisterClass(MCInst *Inst, uint32_t Re...
function DecodeStatus (line 90) | static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 102) | static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 114) | static DecodeStatus DecodeFPR32CRegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 126) | static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 138) | static DecodeStatus DecodeFPR64CRegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 150) | static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst *Inst, uint32_t Re...
function DecodeStatus (line 161) | static DecodeStatus DecodeGPRNoX0X2RegisterClass(MCInst *Inst, uint64_t ...
function DecodeStatus (line 172) | static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 184) | static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, uint32_t Re...
function DecodeStatus (line 196) | static DecodeStatus DecodeSR07RegisterClass(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 209) | static DecodeStatus DecodeVRRegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 220) | static DecodeStatus DecodeVRM2RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 235) | static DecodeStatus DecodeVRM4RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 250) | static DecodeStatus DecodeVRM8RegisterClass(MCInst *Inst, uint32_t RegNo,
function DecodeStatus (line 265) | static DecodeStatus decodeVMaskReg(MCInst *Inst, uint64_t RegNo,
function DecodeStatus (line 355) | static DecodeStatus decodeCLUIImmOperand(MCInst *Inst, uint32_t Imm,
function DecodeStatus (line 366) | static DecodeStatus decodeFRMArg(MCInst *Inst, uint32_t Imm, int64_t Add...
function DecodeStatus (line 410) | static DecodeStatus decodeUImmLog2XLenOperand(MCInst *Inst, uint32_t Imm,
function DecodeStatus (line 424) | static DecodeStatus decodeUImmLog2XLenNonZeroOperand(MCInst *Inst, uint3...
function DecodeStatus (line 435) | static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 449) | static DecodeStatus decodeCSSPushPopchk(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 460) | static DecodeStatus decodeRVCInstrRdSImm(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 473) | static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 488) | static DecodeStatus decodeRVCInstrRdRs2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 498) | static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 510) | static DecodeStatus decodeXTHeadMemPair(MCInst *Inst, uint32_t Insn,
function DecodeStatus (line 537) | static DecodeStatus decodeZcmpRlist(MCInst *Inst, unsigned Imm,
function DecodeStatus (line 546) | static DecodeStatus decodeRegReg(MCInst *Inst, uint32_t Insn, uint64_t A...
function DecodeStatus (line 556) | static DecodeStatus decodeZcmpSpimm(MCInst *Inst, unsigned Imm,
function addSPOperands (line 565) | void addSPOperands(MCInst *MI)
function DecodeStatus (line 579) | DecodeStatus RISCV_getInstruction(MCInst *MI, uint16_t *Size,
function RISCV_LLVM_getInstruction (line 744) | bool RISCV_LLVM_getInstruction(csh handle, const uint8_t *Bytes, size_t ...
FILE: arch/RISCV/RISCVDisassemblerExtension.c
function RISCV_getFeatureBits (line 6) | bool RISCV_getFeatureBits(unsigned int mode, unsigned int feature)
FILE: arch/RISCV/RISCVInstPrinter.c
function printRegName (line 77) | static inline
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[
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"preview": "---\nname: Bug report - Incorrect disassembly\nabout: Create a report about incorrect disassembly.\n---\n\n<!-- This template"
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"chars": 451,
"preview": "---\nname: Feature request\nabout: Suggest an idea for this project\n\n---\n\n### Feature\n\n- [ ] New architecture module\n- [ ]"
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"chars": 914,
"preview": " <!-- Filling this template is mandatory -->\n\n**Your checklist for this pull request**\n- [ ] I've documented or updated "
},
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"chars": 3727,
"preview": "Auto-Sync-files:\n - suite/auto-sync/**\n\nLLVM-core-files:\n - MC*.[ch]\n\nLLVM-generated-files:\n - arch/*/*.inc\n\nDocument"
},
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"path": ".github/workflows/CITest.yml",
"chars": 8979,
"preview": "name: Run Test\non:\n push:\n paths-ignore:\n - \".gitignore\"\n - \"docs/**\"\n - \"ChangeLog\"\n - \"CREDITS"
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"chars": 5976,
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"preview": "Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/\nUpstream-Name: CapstoneEngine\nSource: https:/"
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{
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}
]
// ... and 3754 more files (download for full content)
About this extraction
This page contains the full source code of the capstone-engine/capstone GitHub repository, extracted and formatted as plain text for AI agents and large language models (LLMs). The extraction includes 3954 files (94.1 MB), approximately 24.9M tokens, and a symbol index with 4915 extracted functions, classes, methods, constants, and types. Use this with OpenClaw, Claude, ChatGPT, Cursor, Windsurf, or any other AI tool that accepts text input. You can copy the full output to your clipboard or download it as a .txt file.
Extracted by GitExtract — free GitHub repo to text converter for AI. Built by Nikandr Surkov.