Repository: dkorunic/iSMC Branch: master Commit: 241fa80697e2 Files: 90 Total size: 753.5 KB Directory structure: gitextract_zre7wo39/ ├── .github/ │ ├── dependabot.yml │ └── workflows/ │ └── camo-purge.yml ├── .gitignore ├── .golangci.yml ├── .goreleaser.yml ├── AGENTS.md ├── CLAUDE.md ├── LICENSE ├── README.md ├── Taskfile.yml ├── cmd/ │ ├── all.go │ ├── batt.go │ ├── curr.go │ ├── fans.go │ ├── guess.go │ ├── guess_test.go │ ├── hw.go │ ├── power.go │ ├── raw.go │ ├── root.go │ ├── temp.go │ ├── version.go │ └── volt.go ├── go.mod ├── go.sum ├── gosmc/ │ ├── .clang-format │ ├── LICENSE │ ├── README.md │ ├── go.mod │ ├── gosmc.go │ ├── smc.c │ ├── smc.h │ └── values.go ├── hid/ │ ├── get.go │ └── hid.go ├── main.go ├── output/ │ ├── influxoutput.go │ ├── influxoutput_test.go │ ├── jsonoutput.go │ ├── jsonoutput_test.go │ ├── output.go │ ├── output_test.go │ ├── outputfactory.go │ ├── outputfactory_test.go │ ├── tableoutput.go │ └── tableoutput_test.go ├── platform/ │ ├── get.go │ ├── mapping.go │ └── mapping_test.go ├── reports/ │ ├── report-a18.txt │ ├── report-intel-t2.txt │ ├── report-m1-max.txt │ ├── report-m1-pro-2.txt │ ├── report-m1-pro.txt │ ├── report-m1-ultra.txt │ ├── report-m2.txt │ ├── report-m3-max-2.txt │ ├── report-m3-max.txt │ ├── report-m3-pro-2.txt │ ├── report-m3-pro-3.txt │ ├── report-m3-pro.txt │ ├── report-m4-2.txt │ ├── report-m4-3.txt │ ├── report-m4-4.txt │ ├── report-m4-max.txt │ ├── report-m4-pro-2.txt │ ├── report-m4-pro.txt │ ├── report-m4.txt │ ├── report-m5-max-2.txt │ ├── report-m5-max.txt │ ├── report-m5-pro.txt │ ├── reports.go │ └── reports_test.go ├── smc/ │ ├── conv.go │ ├── conv_test.go │ ├── gen-sensors.sh │ ├── get.go │ ├── mapping_test.go │ ├── raw.go │ ├── rawtemp.go │ ├── rawtemp_test.go │ ├── sensors.go │ ├── smc.go │ └── smc_test.go ├── src/ │ ├── current.txt │ ├── fans.txt │ ├── power.txt │ ├── temp.txt │ └── voltage.txt └── stress/ └── stress_darwin.go ================================================ FILE CONTENTS ================================================ ================================================ FILE: .github/dependabot.yml ================================================ version: 2 updates: - package-ecosystem: "github-actions" directory: "/" schedule: interval: "weekly" day: "sunday" time: "22:00" open-pull-requests-limit: 10 ================================================ FILE: .github/workflows/camo-purge.yml ================================================ name: Purge camo cache on: workflow_dispatch: push: tags: - "*" schedule: - cron: "0 7 * * *" jobs: purge-camo-cache: runs-on: ubuntu-latest steps: - name: Purge camo cache uses: kevincobain2000/action-camo-purge@v1 ================================================ FILE: .gitignore ================================================ ### Go ### # Binaries for programs and plugins *.exe *.exe~ *.dll *.so *.dylib iSMC dist/ vendor/ # Test binary, build with `go test -c` *.test # Output of the go coverage tool, specifically when used with LiteIDE *.out # Unit tests and coverage reports profile.cov report.xml ### Intellij ### # User-specific stuff: .idea/ # CMake cmake-build-debug/ ## File-based project format: *.iws # IntelliJ /out/ ### VisualStudioCode ### .vscode/ ## Usual macOS cruft ### .DS_Store ## Claude Code .claude docs/ ================================================ FILE: .golangci.yml ================================================ version: "2" linters: default: all disable: - cyclop - depguard - dupl - exhaustruct - forbidigo - funlen - gochecknoglobals - gocognit - lll - mnd - varnamelen - wrapcheck exclusions: generated: lax presets: - comments - common-false-positives - legacy - std-error-handling paths: - third_party$ - builtin$ - examples$ formatters: enable: - gci - gofmt - gofumpt - goimports exclusions: generated: lax paths: - third_party$ - builtin$ - examples$ ================================================ FILE: .goreleaser.yml ================================================ before: hooks: - go mod tidy builds: - flags: - -trimpath env: - CGO_ENABLED=1 ldflags: | -s -w -X "github.com/dkorunic/iSMC/cmd.GitTag={{.Tag}}" -X "github.com/dkorunic/iSMC/cmd.GitCommit={{.ShortCommit}}" -X "github.com/dkorunic/iSMC/cmd.GitDirty= " -X "github.com/dkorunic/iSMC/cmd.BuildTime={{.Date}}" goos: - darwin goarch: - amd64 - arm64 universal_binaries: - replace: true changelog: sort: asc archives: - name_template: >- {{ .ProjectName }}_ {{- title .Os }}_ {{- if eq .Arch "amd64" }}x86_64 {{- else if eq .Arch "386" }}i386 {{- else }}{{ .Arch }}{{ end }} {{- if .Arm }}v{{ .Arm }}{{ end }} format_overrides: - goos: windows format: zip files: - README.md - LICENSE - src: dist/CHANGELOG.md dst: "" strip_parent: true checksum: name_template: "checksums.txt" snapshot: name_template: "{{ .Tag }}-next" brews: - name: ismc repository: owner: dkorunic name: homebrew-tap homepage: https://github.com/dkorunic/iSMC description: Apple SMC CLI tool that can decode and display temperature, fans, battery, power, voltage and current information license: GPL-3.0 test: | system "#{bin}/iSMC", "help" install: | bin.install "iSMC" ================================================ FILE: AGENTS.md ================================================ # AGENTS.md This repository already contains `CLAUDE.md` with detailed build, architecture, and workflow guidance. ## Non-obvious constraints - **Darwin-only:** Every source file has `//go:build darwin`. Builds/tests fail on Linux/Windows regardless of `CGO_ENABLED=1`. The C source (`smc.h`, `smc.c`) and IOKit/HID dependencies are macOS-only. - **Two Go modules:** Root (`github.com/dkorunic/iSMC`) and nested (`github.com/dkorunic/iSMC/gosmc`). When updating gosmc dependencies, `cd` into that directory first. - **`smc/sensors.go` is code-generated.** Do not edit it manually — run `task generate` (reads data from `src/{temp,fans,power,voltage,current}.txt`). - **`task build` has a fixed order:** generate → fmt → build. Breaking this order produces stale sensor data. ================================================ FILE: CLAUDE.md ================================================ # CLAUDE.md This file provides guidance to Claude Code (claude.ai/code) when working with code in this repository. ## Build & Development Commands This project uses [Task](https://taskfile.dev) (`task` CLI) as the build runner. `CGO_ENABLED=1` is required for all builds since the code wraps Apple IOKit via CGo. ```sh task build # generate sensors, format, build optimized binary (PGO enabled) task build-debug # update deps, format, build with race detector + no optimizations task lint # format + golangci-lint task fmt # go mod tidy, gci, gofumpt, betteralign task generate # regenerate smc/sensors.go from src/*.txt data files task update # go get -u && go mod tidy task check # gomajor list — check for available major version upgrades task release # goreleaser release (requires git tag + GITHUB_TOKEN) ``` To build manually without Task: ```sh CGO_ENABLED=1 go build -trimpath -pgo=auto -o iSMC ``` To run tests: ```sh CGO_ENABLED=1 go test ./... # Run a single test package: CGO_ENABLED=1 go test ./output/... ``` ## Architecture ### Hardware Abstraction The tool supports two distinct hardware paths that are merged at the output layer: - **`gosmc/`** — nested Go module (`github.com/dkorunic/iSMC/gosmc`). CGo bindings to Apple IOKit's SMC interface via `smc.h`. Handles Intel/PPC Macs. Contains IOKit constants (`values.go`) and wrapper functions for `SMCOpen`/`SMCClose`/`SMCReadKey`/`SMCCall`/`SMCWriteKey`. - **`smc/`** — uses `gosmc` to query named SMC keys. `sensors.go` is **code-generated** (do not edit directly) — regenerate with `task generate` or `go generate ./smc`. The generator reads colon-delimited data from `../src/{temp,fans,power,voltage,current}.txt`. Supports wildcard keys (`%`) expanded to indices 0–9. - **`hid/`** — Apple Silicon (M-series) sensor support via the HID sensor hub. Uses embedded C (`get.go` has CGo). Reads temperature, current, voltage from IOKit HID services. ### Data Flow ``` cmd/ (Cobra subcommands) → output.Factory(OutputFlag) [selects output format] → output.Output interface methods (All, Temperature, Fans, etc.) → merge(smc.Get*(), hid.Get*()) → gosmc.SMCOpen/ReadKey (Intel) → CGo HID calls (Apple Silicon) ``` All sensor data is returned as `map[string]any` where each entry contains `"key"`, `"value"`, and `"type"` fields. ### Output System `output/` implements the `Output` interface with four backends selected via `-o` flag: - `table` — pretty table (default, uses `go-pretty`) - `ascii` — plain ASCII table - `json` — JSON - `influx` — InfluxDB line protocol `output/outputfactory.go` is the factory. The `GetAll`, `GetTemperature`, etc. vars in `output/output.go` are function variables to enable monkey-patching in tests. ### Module Structure This repo contains **two Go modules**: - Root: `github.com/dkorunic/iSMC` (`go.mod` at root) - Nested: `github.com/dkorunic/iSMC/gosmc` (`gosmc/go.mod`) When updating dependencies in `gosmc/`, cd into that directory first. ## Code Style & Linting All files have a `//go:build darwin` constraint — this is macOS-only code. The linter config is in `.golangci.yml` (golangci-lint v2, `default: all` with specific linters disabled). Formatters used: `gci`, `gofmt`, `gofumpt`, `goimports`. Run `task fmt` before committing. ================================================ FILE: LICENSE ================================================ GNU GENERAL PUBLIC LICENSE Version 3, 29 June 2007 Copyright (C) 2007 Free Software Foundation, Inc. Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. 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But first, please read . ================================================ FILE: README.md ================================================ # iSMC [![GitHub license](https://img.shields.io/github/license/dkorunic/iSMC.svg)](https://github.com/dkorunic/iSMC/blob/master/LICENSE) [![GitHub release](https://img.shields.io/github/release/dkorunic/iSMC.svg)](https://github.com/dkorunic/iSMC/releases/latest) ## About `iSMC` is a macOS command-line tool for querying the Apple System Management Controller (SMC). It reads a broad set of well-known SMC keys, determines their type and value, and classifies the results into temperature, power, current, voltage, fan, and battery readings. Each key is accompanied by a human-readable description. In addition to standard SMC support for Intel Mac hardware, `iSMC` supports Apple Silicon (M1–M5 and later, including the Neo family), where temperature, voltage, current, and power sensors are exposed through a HID sensor hub rather than the SMC directly. ![Demo](demo.gif) ## Installation `iSMC` runs on macOS only. ### Homebrew You can install iSMC using [Homebrew](https://brew.sh/) by adding the `homebrew-tap` tap and installing the `ismc` package: ```shell brew tap dkorunic/tap brew install ismc ``` ### Manual Download the appropriate iSMC binary for your platform from [the releases page](https://github.com/dkorunic/iSMC/releases/latest) and install it manually. ### Using go install You can also install iSMC using the `go install` command: ```shell CGO_ENABLED=1 go install github.com/dkorunic/iSMC@latest ``` ## Usage ```shell Apple SMC CLI tool that can decode and display temperature, fans, battery, power, voltage and current information for various hardware in your Apple Mac hardware. Usage: iSMC [flags] iSMC [command] Available Commands: all Display all known sensors, fans and battery status batt Display battery status completion Generate the autocompletion script for the specified shell curr Display current sensors fans Display fans status guess Map SMC temperature sensors to CPU cores by thermal correlation help Help about any command hw Display hardware information power Display power sensors raw Display all raw SMC keys and their byte values temp Display temperature sensors version Print the version number of iSMC volt Display voltage sensors Flags: -h, --help help for iSMC -o, --output string Output format (ascii, table, json, influx) (default "table") Use "iSMC [command] --help" for more information about a command. ``` Each command also accepts short and long aliases: `bat`/`batt`/`battery`, `cur`/`curr`/`current`, `fan`/`fans`, `pow`/`power`, `tmp`/`temp`/`temperature`, `vol`/`volt`/`voltage`, `everything`/`all`. ### Output formats | Format | Description | | -------- | --------------------------------- | | `table` | Coloured terminal table (default) | | `ascii` | Plain ASCII table | | `json` | JSON | | `influx` | InfluxDB line protocol | ## Related work This tool was inspired by several Apple SMC-related projects: - **SMCKit** — Apple SMC library and tool in Swift: [github.com/beltex/SMCKit](https://github.com/beltex/SMCKit) - **libsmc** — SMC API in pure C: [github.com/beltex/libsmc](https://github.com/beltex/libsmc) - **iStats** — Ruby gem for Mac stats: [github.com/Chris911/iStats](https://github.com/Chris911/iStats) - **smcFanControl** — Fan control tool in Objective-C, includes `smc-command` for raw SMC key queries: [github.com/hholtmann/smcFanControl](https://github.com/hholtmann/smcFanControl) - **FakeSMC** — Hackintosh kext: [github.com/RehabMan/OS-X-FakeSMC-kozlek](https://github.com/RehabMan/OS-X-FakeSMC-kozlek) - **VirtualSMC** — Hackintosh kext: [github.com/acidanthera/VirtualSMC](https://github.com/acidanthera/VirtualSMC) - **osx-cpu-temp** — CPU temperature display in pure C: [github.com/lavoiesl/osx-cpu-temp](https://github.com/lavoiesl/osx-cpu-temp) - **applesmc.c** — Linux kernel Apple SMC driver: [github.com/torvalds/linux](https://github.com/torvalds/linux/blob/master/drivers/hwmon/applesmc.c) - **gosmc** — Low-level Go SMC bindings: [github.com/panotza/gosmc](https://github.com/panotza/gosmc) - **sensors** — Koan-Sin Tan's M1 IOKit demo: [github.com/freedomtan/sensors](https://github.com/freedomtan/sensors) - **Stats** — Serhiy Mytrovtsiy's macOS Stats app: [github.com/exelban/stats](https://github.com/exelban/stats) ## Todo Planned features: - fetch and decode SMC key descriptions from the SMC itself, - generate and probe random SMC keys, - persist discovered SMC keys to a configuration file, - add support for missing data types (`si*`, `hex_`, `pwm`, etc.). ## Bugs, feature requests, etc. Please open an issue or submit a pull request. ## Star history [![Star History Chart](https://api.star-history.com/svg?repos=dkorunic/iSMC&type=Date)](https://star-history.com/#dkorunic/iSMC&Date) ================================================ FILE: Taskfile.yml ================================================ version: "3" vars: TARGET: iSMC GIT_LAST_TAG: sh: git describe --abbrev=0 --tags 2>/dev/null || echo latest GIT_HEAD_COMMIT: sh: git rev-parse --short HEAD 2>/dev/null || echo unknown GIT_TAG_COMMIT: sh: git rev-parse --short {{.GIT_LAST_TAG}} 2>/dev/null || echo unknown GIT_MODIFIED1: sh: git diff {{.GIT_HEAD_COMMIT}} {{.GIT_TAG_COMMIT}} --quiet 2>/dev/null || echo .dev GIT_MODIFIED2: sh: git diff --quiet 2>/dev/null || echo .dirty GIT_MODIFIED: sh: echo "{{.GIT_MODIFIED1}}{{.GIT_MODIFIED2}}" BUILD_DATE: sh: date -u '+%Y-%m-%dT%H:%M:%SZ' env: CGO_ENABLED: 1 tasks: default: cmds: - task: update - task: build update: cmds: - go get -u - go mod tidy check: cmds: - gomajor list fmt: cmds: - go mod tidy - gci write . - gofumpt -l -w . - betteralign -apply ./... generate: cmds: - go generate ./smc build: cmds: - task: generate - task: fmt - go build -trimpath -pgo=auto -ldflags="-s -w -X github.com/dkorunic/iSMC/cmd.GitTag={{.GIT_LAST_TAG}} -X github.com/dkorunic/iSMC/cmd.GitCommit={{.GIT_HEAD_COMMIT}} -X github.com/dkorunic/iSMC/cmd.GitDirty={{.GIT_MODIFIED}} -X github.com/dkorunic/iSMC/cmd.BuildTime={{.BUILD_DATE}}" -o {{.TARGET}} build-debug: env: CGO_ENABLED: 1 cmds: - task: update - task: fmt - go build -ldflags="-X cmd.GitTag={{.GIT_LAST_TAG}} -X cmd.GitCommit={{.GIT_HEAD_COMMIT}} -X cmd.GitDirty={{.GIT_MODIFIED}} -X cmd.BuildTime={{.BUILD_DATE}}" -race -o {{.TARGET}} lint: cmds: - task: fmt - golangci-lint run --timeout 5m test: cmds: - go test ./... release: cmds: - goreleaser release --clean -p 4 ================================================ FILE: cmd/all.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents all commands. var allCmd = &cobra.Command{ Use: "all", Aliases: []string{"everything", "*"}, Short: "Display all known sensors, fans and battery status", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).All() }, } // init registers the all subcommand with the root command. func init() { rootCmd.AddCommand(allCmd) } ================================================ FILE: cmd/batt.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents batt command. var battCmd = &cobra.Command{ Use: "batt", Aliases: []string{"battery", "bat"}, Short: "Display battery status", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Battery() }, } // init registers the batt subcommand with the root command. func init() { rootCmd.AddCommand(battCmd) } ================================================ FILE: cmd/curr.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents curr command. var currCmd = &cobra.Command{ Use: "curr", Aliases: []string{"current", "cur"}, Short: "Display current sensors", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Current() }, } // init registers the curr subcommand with the root command. func init() { rootCmd.AddCommand(currCmd) } ================================================ FILE: cmd/fans.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents fans command. var fansCmd = &cobra.Command{ Use: "fans", Aliases: []string{"fan"}, Short: "Display fans status", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Fans() }, } // init registers the fans subcommand with the root command. func init() { rootCmd.AddCommand(fansCmd) } ================================================ FILE: cmd/guess.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "fmt" "math" "runtime" "sort" "strconv" "strings" "time" "github.com/dkorunic/iSMC/platform" "github.com/dkorunic/iSMC/reports" "github.com/dkorunic/iSMC/smc" "github.com/dkorunic/iSMC/stress" "github.com/spf13/cobra" ) const ( guessStressDuration = 8 * time.Second guessCoolDuration = 12 * time.Second guessSampleCount = 3 guessSampleInterval = 500 * time.Millisecond // 25 °C sits in the gap between disconnected probes (≤12) and real idle sensors (≥26). guessTempMin = float32(25.0) guessTempMax = float32(150.0) // ≈10 σ above sp78 noise floor (~0.25 °C). guessOutputThreshold = float32(1.5) // Sensor is cluster-level if min/max phase delta ≥ (1 − this). guessClusterRatio = float32(0.20) ) var guessCmd = &cobra.Command{ Use: "guess", Short: "Map SMC temperature sensors to CPU cores by thermal correlation", Long: `guess stresses all logical CPU cores simultaneously — in two or three phases depending on the chip's pair signature — and correlates the resulting temperature rise in T-prefixed SMC sensors to produce a sensor mapping list in the format used by src/temp.txt. Phase labels and QoS hints are driven by the SKU's pair signature (from the validate-temp-mappings family roster): - P+E (M1–M4 family, A18 Pro): Performance + Efficiency - S+E (M5 base): Super + Efficiency - S+P (M5 Pro / M5 Max): Super + Performance - 3-level perflevel hierarchy: Super + Performance + Efficiency QOS_CLASS_USER_INTERACTIVE biases the kernel toward Super cores, USER_INITIATED toward Performance cores, and BACKGROUND toward Efficiency cores. Within each phase, per-core labels are derived from SMC key naming patterns: keys sharing the same non-numeric structure (e.g. TC*c) form a series, then stride/gap analysis within each series groups sensors that belong to the same physical core into a single sub-group. The detected per-type counts are cross-checked against the SKU's expected layout (e.g. M5 Pro: 5–6 Super + 10–12 Performance), and deviations are flagged inline so the operator knows which lines need manual review before pasting into src/temp.txt. The process takes roughly 34 seconds on 2-phase chips, or ~55 seconds on 3-phase chips. Run on an otherwise-idle machine for best results.`, Run: runGuess, } func init() { rootCmd.AddCommand(guessCmd) } // rawTemps reads every T-prefixed SMC key and returns a map of key → °C for all // sensors that report a plausible temperature value. func rawTemps() map[string]float32 { out := make(map[string]float32) for _, k := range smc.GetRaw() { if len(k.Key) == 0 || k.Key[0] != 'T' { continue } v, ok := smc.RawKeyToFloat32(k) if !ok || v < guessTempMin || v > guessTempMax { continue } out[k.Key] = v } return out } // avgRawTemps returns per-key averages over n samples taken sampleInterval apart. func avgRawTemps(n int, interval time.Duration) map[string]float32 { sums := make(map[string]float64) counts := make(map[string]int) for i := range n { if i > 0 { time.Sleep(interval) } for k, v := range rawTemps() { sums[k] += float64(v) counts[k]++ } } result := make(map[string]float32, len(sums)) for k, s := range sums { result[k] = float32(s / float64(counts[k])) } return result } // deltaTemps returns sensors in hot that exceed the corresponding baseline value // by at least guessOutputThreshold. func deltaTemps(base, hot map[string]float32) map[string]float32 { d := make(map[string]float32) for k, b := range base { if h, ok := hot[k]; ok { if delta := h - b; delta >= guessOutputThreshold { d[k] = delta } } } return d } // seriesKey returns the SMC key with every decimal digit and hex digit (A-F) // in the numeric index replaced by '*'. Keys sharing a series key differ only // in their numeric index and belong to the same per-core sensor series // (e.g. "TC0c", "TC3c" → "TC*c", "Tp0A", "Tp0C" → "Tp**"). func seriesKey(key string) string { b := []byte(key) indexStarted := false for i, c := range b { switch { case c >= '0' && c <= '9': indexStarted = true b[i] = '*' case indexStarted && c >= 'A' && c <= 'F': b[i] = '*' case indexStarted && (c < 'A' || c > 'F'): indexStarted = false } } return string(b) } // numericValue extracts the numeric index from an SMC key. The index starts at // the first digit and includes all subsequent digits and uppercase hex digits (A-F). // Lowercase letters are treated as series-key components and excluded. If any // uppercase hex digits (A-F) are found in the index, parses as hexadecimal; // otherwise parses as decimal. Returns 0 for keys with no digits. // "TC3c" → 3, "Tp09" → 9, "Te12" → 12, "Tp0A" → 10, "TcXX" → 0. func numericValue(key string) int { var digits []byte hasHexDigit := false indexStarted := false for _, c := range []byte(key) { if c >= '0' && c <= '9' { indexStarted = true digits = append(digits, c) } else if indexStarted { if c >= 'A' && c <= 'F' { digits = append(digits, c) hasHexDigit = true } else { break } } } if len(digits) == 0 { return 0 } if hasHexDigit { v, _ := strconv.ParseInt(string(digits), 16, 64) return int(v) } v, _ := strconv.Atoi(string(digits)) return v } // groupBySeries groups SMC sensor keys by series key (non-numeric pattern). // Within each group the keys are sorted ascending by numericValue so that // sorted position 0 maps to Core 1, position 1 maps to Core 2, etc. func groupBySeries(keys []string) map[string][]string { groups := make(map[string][]string) for _, k := range keys { sk := seriesKey(k) groups[sk] = append(groups[sk], k) } for sk := range groups { sort.Slice(groups[sk], func(a, b int) bool { return numericValue(groups[sk][a]) < numericValue(groups[sk][b]) }) } return groups } // sortedSeriesKeys returns the keys of a series group map sorted lexicographically. func sortedSeriesKeys(groups map[string][]string) []string { keys := make([]string, 0, len(groups)) for k := range groups { keys = append(keys, k) } sort.Strings(keys) return keys } // groupByStrideWithinSeries splits a series' sorted sensor list into sub-groups // based on gaps between consecutive numericValues. // // Rules: // - If all consecutive differences are equal (uniform stride): each sensor is // its own group. This covers M5-style single-sensor-per-core series: // Tp00/04/08 (stride 4) → [[Tp00],[Tp04],[Tp08]] → 3 cores. // - Otherwise (non-uniform gaps): split whenever the gap exceeds minDiff. // This covers M1/M3 triplets: diffs [1,1,2,1,1,2,...] → minDiff=1, // split at every 2 → [[Tp00,Tp01,Tp02],[Tp04,Tp05,Tp06],...] → N cores × 3. // - A single-element slice is returned as one group. func groupByStrideWithinSeries(sensors []string) [][]string { if len(sensors) <= 1 { result := make([][]string, len(sensors)) for i, s := range sensors { result[i] = []string{s} } return result } diffs := make([]int, len(sensors)-1) for i := 1; i < len(sensors); i++ { d := numericValue(sensors[i]) - numericValue(sensors[i-1]) if d < 0 { d = -d } diffs[i-1] = d } uniform := true for _, d := range diffs[1:] { if d != diffs[0] { uniform = false break } } if uniform { groups := make([][]string, len(sensors)) for i, s := range sensors { groups[i] = []string{s} } return groups } minDiff := diffs[0] for _, d := range diffs[1:] { if d < minDiff { minDiff = d } } var groups [][]string current := []string{sensors[0]} for i, d := range diffs { if d > minDiff { groups = append(groups, current) current = []string{sensors[i+1]} } else { current = append(current, sensors[i+1]) } } return append(groups, current) } // Phase label prefixes; must match descriptions emitted in src/temp.txt. const ( labelSuperCore = "CPU Super Core" labelPerformanceCore = "CPU Performance Core" labelEfficiencyCore = "CPU Efficiency Core" ) // phaseSpec describes one stress phase: its label prefix, QoS class, and expected // physical core count from platform topology data. type phaseSpec struct { label string qos int cores int // 0 if unknown. } // phaseResult pairs a phase specification with the sensor deltas it produced. type phaseResult struct { deltas map[string]float32 spec phaseSpec } // phaseMidWord returns the middle word of a phase label for use in progress messages. // "CPU Super Core" → "Super", "CPU Performance Core" → "Performance", // "CPU Efficiency Core" → "Efficiency". func phaseMidWord(label string) string { parts := strings.Fields(label) if len(parts) >= 2 { return parts[1] } return label } // qosName returns a short human-readable name for the given macOS QoS class constant. func qosName(qos int) string { switch qos { case stress.QoSUserInteractive: return "UserInteractive" case stress.QoSUserInitiated: return "UserInitiated" case stress.QoSBackground: return "Background" default: return fmt.Sprintf("0x%02X", qos) } } // buildPhases constructs the ordered list of stress phases from live topology data // and the SKU's pair signature. // // 3-level perflevel hierarchy: Super → Performance → Efficiency (e.g. a future // M-series chip exposing all three tiers as distinct OS perflevels). // // 2-level hierarchy: top + bottom labels are driven by layout.PairSignature so the // same Tp* prefix is named correctly for the SKU. Mapping is: // - P+E (M1–M4, A18 across all variants): Performance + Efficiency // - S+E (M5 base): Super + Efficiency — the OS may name perflevel0 "Performance" // but the family-roster pair signature is authoritative; per the skill, // low-stride Tp0? slots on M5 base are Super cores, not Performance cores. // - S+P (M5 Pro / M5 Max): Super + Performance — no E-cores on these SKUs // // nil/empty perflevels falls back to P+E with zero core counts (legacy behaviour // for hardware where the perflevel sysctls are unavailable). // // The SKU's preferred top-tier QoS class (UserInteractive for Super, UserInitiated // for Performance) biases the kernel scheduler toward the right tier. func buildPhases(perfLevels []platform.PerfLevel, layout platform.SKULayout) []phaseSpec { if len(perfLevels) == 3 { return []phaseSpec{ {label: labelSuperCore, qos: stress.QoSUserInteractive, cores: perfLevels[0].PhysicalCPU}, {label: labelPerformanceCore, qos: stress.QoSUserInitiated, cores: perfLevels[1].PhysicalCPU}, {label: labelEfficiencyCore, qos: stress.QoSBackground, cores: perfLevels[2].PhysicalCPU}, } } topLabel, bottomLabel := labelPerformanceCore, labelEfficiencyCore topQoS := stress.QoSUserInitiated switch layout.PairSignature { case platform.PairSignatureSE: topLabel = labelSuperCore topQoS = stress.QoSUserInteractive case platform.PairSignatureSP: topLabel, bottomLabel = labelSuperCore, labelPerformanceCore topQoS = stress.QoSUserInteractive } topCores, bottomCores := 0, 0 if len(perfLevels) == 2 { topCores = perfLevels[0].PhysicalCPU bottomCores = perfLevels[1].PhysicalCPU } bottomQoS := stress.QoSBackground if layout.PairSignature == platform.PairSignatureSP { // S+P has no E-tier; route bottom phase to Performance cores. bottomQoS = stress.QoSUserInitiated } return []phaseSpec{ {label: topLabel, qos: topQoS, cores: topCores}, {label: bottomLabel, qos: bottomQoS, cores: bottomCores}, } } // spinCore locks the goroutine to an OS thread, sets the QoS class to bias the OS // scheduler toward the desired core type, sets a macOS thread-affinity tag to prefer // a specific hardware thread within that type, then burns CPU until done is closed. func spinCore(affinityTag int, qosClass int, done <-chan struct{}) { runtime.LockOSThread() defer runtime.UnlockOSThread() // QoS before affinity so placement sees the class. stress.SetQoS(qosClass) stress.SetAffinityTag(affinityTag) // Four FMA+sqrt chains saturate all FP ports. a, b, c, d := 1.0001, 1.0003, 1.0007, 1.0013 for { for range 2_500 { a = math.Sqrt(math.FMA(a, a, math.Pi)) b = math.Sqrt(math.FMA(b, b, math.E)) c = math.Sqrt(math.FMA(c, c, math.Sqrt2)) d = math.Sqrt(math.FMA(d, d, math.Phi)) } // Overflow guard outside hot loop. if a > 1e15 { a = 1.0001 } if b > 1e15 { b = 1.0003 } if c > 1e15 { c = 1.0007 } if d > 1e15 { d = 1.0013 } select { case <-done: return default: } } } // runAllCoresPhase launches numCPU spinCore goroutines simultaneously under the // given QoS class, stresses for guessStressDuration, samples temperatures at // peak load, then returns the delta map relative to baseline. func runAllCoresPhase(numCPU int, qosClass int, baseline map[string]float32) map[string]float32 { done := make(chan struct{}) for i := range numCPU { go spinCore(i+1, qosClass, done) } time.Sleep(guessStressDuration) hot := avgRawTemps(guessSampleCount, guessSampleInterval) close(done) deltas := deltaTemps(baseline, hot) fmt.Printf(" → %d sensor(s) responded\n", len(deltas)) return deltas } // runGuess implements the guess subcommand. func runGuess(_ *cobra.Command, _ []string) { numCPU := runtime.NumCPU() family := platform.GetFamily() if family == "" || family == "Unknown" { switch runtime.GOARCH { case "arm64": family = "Apple" default: family = "Intel" } fmt.Printf("Warning: chip family not detected; using %q as platform tag.\n\n", family) } product, _ := platform.GetProduct() layout, layoutOK := platform.GetSKULayout() perfLevels := platform.GetPerfLevels() phases := buildPhases(perfLevels, layout) fmt.Printf("Platform : %s\n", family) if product.CPU != "" { fmt.Printf("Model : %s (%s)\n", product.Name, product.CPU) } if layoutOK { fmt.Printf("SKU : %s, %d die(s)\n", layout.PairSignature, layout.Dies) fmt.Printf("Expected : %s\n", layoutSummary(layout)) } fmt.Printf("CPUs : %d logical\n", numCPU) fmt.Printf("Per-phase: %v stress (×%d phases, all %d cores simultaneously)\n\n", guessStressDuration, len(phases), numCPU) if len(perfLevels) > 0 { fmt.Printf("Topology : %d perf level(s)\n", len(perfLevels)) for i, pl := range perfLevels { fmt.Printf(" perflevel%d: %d phys-CPU %q\n", i, pl.PhysicalCPU, pl.Name) } fmt.Println() } fmt.Print("Sampling baseline... ") baseline := avgRawTemps(guessSampleCount, guessSampleInterval) fmt.Printf("%d sensors visible.\n\n", len(baseline)) results := make([]phaseResult, 0, len(phases)) for i, phase := range phases { fmt.Printf("── Phase %d: %s sweep (%s QoS) ──\n", i+1, phaseMidWord(phase.label), qosName(phase.qos)) fmt.Printf(" Stressing all %d cores...", numCPU) deltas := runAllCoresPhase(numCPU, phase.qos, baseline) results = append(results, phaseResult{spec: phase, deltas: deltas}) if i < len(phases)-1 { fmt.Printf("\n Inter-phase cooldown (%v)...\n\n", guessCoolDuration) time.Sleep(guessCoolDuration) baseline = avgRawTemps(guessSampleCount, guessSampleInterval) } } printMapping(family, numCPU, perfLevels, layout, layoutOK, product, results) } // layoutSummary returns a one-line human-readable description of the SKU's // expected core composition, e.g. "8–10P + 4E, 16–20 GPU cores" or // "5–6S + 10–12P, 16–20 GPU cores". A single value (e.g. "4P") is shown when // the min and max bounds match. Used in the guess command's preamble. func layoutSummary(l platform.SKULayout) string { parts := make([]string, 0, 4) if l.SCoresMax > 0 { parts = append(parts, formatRange(l.SCoresMin, l.SCoresMax)+"S") } if l.PCoresMax > 0 { parts = append(parts, formatRange(l.PCoresMin, l.PCoresMax)+"P") } if l.ECoresMax > 0 { parts = append(parts, formatRange(l.ECoresMin, l.ECoresMax)+"E") } cpu := strings.Join(parts, " + ") if l.GPUCoresMax > 0 { return fmt.Sprintf("%s, %s GPU cores", cpu, formatRange(l.GPUCoresMin, l.GPUCoresMax)) } return cpu } // formatRange returns "n" if min == max, else "min–max" using an en-dash. func formatRange(minN, maxN int) string { if minN == maxN { return strconv.Itoa(minN) } return fmt.Sprintf("%d–%d", minN, maxN) } // expectedCores returns the SKU-expected (min, max) core count for a phase label. // Returns (0, 0) when the phase's core type is absent on this SKU (legitimate // case for S+E and S+P pair signatures), letting the caller skip range checks. func expectedCores(l platform.SKULayout, phaseLabel string) (int, int) { switch phaseLabel { case labelSuperCore: return l.SCoresMin, l.SCoresMax case labelPerformanceCore: return l.PCoresMin, l.PCoresMax case labelEfficiencyCore: return l.ECoresMin, l.ECoresMax default: return 0, 0 } } // printPhase emits the comment header, per-series mapping rows, and SKU-aware // validation footer for one phase of guess output. Extracted from printMapping to // keep that function's cyclomatic complexity below the project lint threshold. func printPhase(family string, i int, r phaseResult, keys []string, layout platform.SKULayout, layoutOK bool, ) { groups := groupBySeries(keys) seriesKeys := sortedSeriesKeys(groups) if len(seriesKeys) == 0 { fmt.Printf("// WARNING: Phase %d (%s) produced no sensor responses above threshold.\n", i+1, phaseMidWord(r.spec.label)) fmt.Println("// Run on an idle machine or increase stress duration.") if layoutOK { if expMin, expMax := expectedCores(layout, r.spec.label); expMax > 0 { fmt.Printf("// SKU expects %s for this phase; verify the chip's actual layout.\n", formatRange(expMin, expMax)) } } return } coreIdx := 1 for _, sk := range seriesKeys { coreIdx = printSeries(family, r.spec.label, sk, groups[sk], coreIdx) } detected := coreIdx - 1 if layoutOK { printDetectionVerdict(layout, r.spec.label, detected) } } // printSeries emits one series block (header comment + per-core sensor lines) and // returns the next coreIdx. Pulled out of printPhase to flatten nesting. Each // line is annotated with the canonical description from src/temp.txt (via // smc.LookupTempDesc) so the operator can see at a glance whether the guessed // label matches the existing mapping or proposes a new/conflicting one. func printSeries(family, label, sk string, sensors []string, coreIdx int) int { subGroups := groupByStrideWithinSeries(sensors) fmt.Printf("// Series %-6s → %d sensor(s) in %d group(s) → %s %d..%d\n", sk, len(sensors), len(subGroups), label, coreIdx, coreIdx+len(subGroups)-1) if len(subGroups) == 1 && len(subGroups[0]) > 3 { fmt.Printf("// NOTE: %d-sensor group; manual review recommended (check src/temp.txt)\n", len(subGroups[0])) } for _, sg := range subGroups { for _, k := range sg { line := fmt.Sprintf("%s %d:%s:%s", label, coreIdx, k, family) fmt.Println(annotateLine(line, label, k, family, coreIdx)) } coreIdx++ } return coreIdx } // annotateLine appends a comment to a temp.txt-style mapping line indicating // whether the key already has a canonical description in the AppleTemp table: // // ✓ when src/temp.txt's description matches the guessed label exactly // ⚠ when the key is mapped but to a different description (likely mis-label) // ★ when the key is not yet mapped for this family // // The fixed alignment column (45) keeps annotations readable even with // 16-core SKUs whose lines reach ~36 characters. func annotateLine(line, label, key, family string, coreIdx int) string { const annotationCol = 45 guessed := fmt.Sprintf("%s %d", label, coreIdx) existing, ok := smc.LookupTempDesc(key, family) switch { case !ok: return fmt.Sprintf("%-*s // ★ NEW for %s — not yet in src/temp.txt", annotationCol, line, family) case existing == guessed: return fmt.Sprintf("%-*s // ✓ matches src/temp.txt", annotationCol, line) default: return fmt.Sprintf("%-*s // ⚠ src/temp.txt has %q", annotationCol, line, existing) } } // printDetectionVerdict compares the count of detected core groups against the // SKU's expected range and emits a one-line OK / WARNING comment. Skips silently // when the SKU has no cores of this label's type (the absence is handled by // warnAbsentTypes after the per-phase loop completes). func printDetectionVerdict(layout platform.SKULayout, label string, detected int) { expMin, expMax := expectedCores(layout, label) if expMax == 0 { return } mid := phaseMidWord(label) expectedStr := formatRange(expMin, expMax) switch { case detected < expMin: fmt.Printf("// WARNING: detected %d %s group(s) but SKU expects %s — "+ "some cores may have failed to heat up; rerun on an idle machine.\n", detected, mid, expectedStr) case detected > expMax: fmt.Printf("// WARNING: detected %d %s group(s) but SKU expects %s — "+ "likely a cluster-aggregate sensor mis-classified as a per-core; review.\n", detected, mid, expectedStr) default: fmt.Printf("// OK: detected %d %s group(s), within SKU expectation %s.\n", detected, mid, expectedStr) } } // warnAbsentTypes emits a warning whenever the resolved per-phase results contain // core groupings for a type the SKU is not supposed to have (e.g. P-cores reported // on an M5 base, which is S+E only). Mirrors the validate-temp-mappings skill's // Phase 4a pair-signature validation. func warnAbsentTypes(l platform.SKULayout, results []phaseResult) { for _, r := range results { if len(r.deltas) == 0 { continue } _, expMax := expectedCores(l, r.spec.label) if expMax > 0 { continue } // Sensors heated for a core type the SKU lacks; kernel routed elsewhere. fmt.Printf("// WARNING: phase %q produced sensors but SKU pair signature %s "+ "has no cores of this type — relabel before pasting into src/temp.txt.\n", r.spec.label, l.PairSignature) } } // printMapping analyses N-phase delta results and emits a src/temp.txt-style mapping. // Sensors are classified by dominant phase, then grouped by SMC key series and // further split by stride/gap analysis to assign correct per-core indices. // // When layoutOK is true, the SKU's per-type expected counts (S/P/E) are checked // against the detected per-phase core groups; deviations are emitted as inline // warnings so the operator knows to inspect the output before copy-pasting it // into src/temp.txt. func printMapping(family string, numCPU int, perfLevels []platform.PerfLevel, layout platform.SKULayout, layoutOK bool, product platform.Product, results []phaseResult, ) { allKeys := make(map[string]struct{}) for _, r := range results { for k := range r.deltas { allKeys[k] = struct{}{} } } phaseKeys := make([][]string, len(results)) var clusterKeys []string for key := range allKeys { dominantIdx := -1 dominantDelta := float32(0) for i, r := range results { d := r.deltas[key] if d >= guessOutputThreshold && d > dominantDelta { dominantDelta = d dominantIdx = i } } if dominantIdx < 0 { continue } secondDelta := float32(0) for i, r := range results { if i == dominantIdx { continue } d := r.deltas[key] if d >= guessOutputThreshold && d > secondDelta { secondDelta = d } } if secondDelta > 0 { lo, hi := secondDelta, dominantDelta if lo > hi { lo, hi = hi, lo } if lo/hi >= (1 - guessClusterRatio) { clusterKeys = append(clusterKeys, key) continue } } phaseKeys[dominantIdx] = append(phaseKeys[dominantIdx], key) } sort.Strings(clusterKeys) // Header. fmt.Println() fmt.Printf("// %s (%d logical CPUs) – guessed sensor mappings\n", family, numCPU) if product.CPU != "" { fmt.Printf("// SKU: %s (%s)\n", product.CPU, product.Name) } if layoutOK { fmt.Printf("// Pair signature: %s | dies: %d | expected: %s\n", layout.PairSignature, layout.Dies, layoutSummary(layout)) } if len(perfLevels) > 0 { fmt.Printf("// Topology: %d perf level(s)", len(perfLevels)) for i, pl := range perfLevels { if i == 0 { fmt.Printf(" | perflevel%d %d phys-CPU %q\n", i, pl.PhysicalCPU, pl.Name) } else { fmt.Printf("// %s| perflevel%d %d phys-CPU %q\n", strings.Repeat(" ", 10), i, pl.PhysicalCPU, pl.Name) } } } fmt.Println("// WARNING: automated correlation is approximate; always verify on real hardware.") fmt.Printf("// %s\n", strings.Repeat("─", 72)) // Per-phase sensor sections. for i, r := range results { printPhase(family, i, r, phaseKeys[i], layout, layoutOK) } if layoutOK { warnAbsentTypes(layout, results) } // Cluster / package sensors. if len(clusterKeys) > 0 { fmt.Println() fmt.Printf("// %s\n", strings.Repeat("─", 72)) fmt.Printf("// Cluster/package sensors (top two phases within %.0f%% of each other):\n", guessClusterRatio*100) for _, k := range clusterKeys { parts := make([]string, 0, len(results)) for _, r := range results { if d := r.deltas[k]; d > 0 { parts = append(parts, fmt.Sprintf("%s +%.1f°C", phaseMidWord(r.spec.label), d)) } } line := fmt.Sprintf("// %-6s %s", k, strings.Join(parts, " ")) if existing, ok := smc.LookupTempDesc(k, family); ok { fmt.Printf("%-50s ← src/temp.txt: %q\n", line, existing) } else { fmt.Println(line) } } } detected := allDetectedKeys(results, clusterKeys) printTempTxtCrosscheck(family, detected) printReportsCrosscheck(family, detected) } // allDetectedKeys returns the union of detected sensor keys across every phase // plus the cluster/package keys. Used by the temp.txt and reports/ cross-checks // to compute matched / novel / silent sets without re-walking the per-phase // data structures. func allDetectedKeys(results []phaseResult, clusterKeys []string) map[string]struct{} { all := make(map[string]struct{}) for _, r := range results { for k := range r.deltas { all[k] = struct{}{} } } for _, k := range clusterKeys { all[k] = struct{}{} } return all } // printTempTxtCrosscheck emits a summary of the diff between detected SMC keys // and the set of keys already mapped in src/temp.txt for the family. The // summary line reports four cardinalities: // // matched: in temp.txt AND detected this run // novel: detected this run but NOT in temp.txt → candidates to add // silent: in temp.txt but NOT detected this run → mapping may be stale, // OR sensor failed to heat under stress // // When silent keys exist, the first few are listed with their canonical // descriptions so the operator can spot-check whether they belong to a // no-longer-present sensor or simply did not fire in this run. func printTempTxtCrosscheck(family string, detected map[string]struct{}) { mapped := smc.MappedTempKeys(family) if len(mapped) == 0 { return } matched := 0 for k := range detected { if _, ok := mapped[k]; ok { matched++ } } novel := len(detected) - matched silent := make([]string, 0) for k := range mapped { if _, ok := detected[k]; !ok { silent = append(silent, k) } } sort.Strings(silent) fmt.Println() fmt.Printf("// %s\n", strings.Repeat("─", 72)) fmt.Printf("// Cross-check vs src/temp.txt for %q:\n", family) fmt.Printf("// detected: %d | mapped: %d | matched: %d | novel: %d | silent: %d\n", len(detected), len(mapped), matched, novel, len(silent)) if len(silent) == 0 { return } const maxSilent = 25 shown := min(len(silent), maxSilent) fmt.Printf("// Mapped in src/temp.txt but silent in this run (showing %d of %d):\n", shown, len(silent)) for _, k := range silent[:shown] { fmt.Printf("// %-6s %s\n", k, mapped[k]) } } // printReportsCrosscheck compares the detected keys against the union of keys // observed in reports/ for the same family. The reports represent ground-truth // sensor presence captured from real machines, so missing detections often // reflect runtime conditions (e.g. GPU/SSD sensors that don't heat from a // CPU stress phase) rather than mapping bugs. Truly novel keys (detected this // run but absent from every prior dump) are worth investigating — they may be // new firmware additions or evidence the chip is a sub-variant we haven't // captured in the reports/ set yet. func printReportsCrosscheck(family string, detected map[string]struct{}) { observed := reports.Keys(family) if len(observed) == 0 { return } matched := 0 for k := range detected { if _, ok := observed[k]; ok { matched++ } } silent := make([]string, 0) for k := range observed { if _, ok := detected[k]; !ok { silent = append(silent, k) } } sort.Strings(silent) novel := make([]string, 0) for k := range detected { if _, ok := observed[k]; !ok { novel = append(novel, k) } } sort.Strings(novel) fmt.Println() fmt.Printf("// %s\n", strings.Repeat("─", 72)) fmt.Printf("// Cross-check vs reports/ observations for %q:\n", family) fmt.Printf("// detected: %d | observed: %d | matched: %d | novel: %d | silent: %d\n", len(detected), len(observed), matched, len(novel), len(silent)) if len(novel) > 0 { const maxNovel = 20 shown := min(len(novel), maxNovel) fmt.Printf("// Detected but never seen in any %s report (showing %d of %d):\n", family, shown, len(novel)) for _, k := range novel[:shown] { fmt.Printf("// %s\n", k) } } } ================================================ FILE: cmd/guess_test.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "strings" "testing" "github.com/dkorunic/iSMC/platform" "github.com/dkorunic/iSMC/stress" ) func TestSeriesKey(t *testing.T) { t.Parallel() tests := []struct { key string want string }{ {"TC0c", "TC*c"}, {"TC3c", "TC*c"}, {"TC9c", "TC*c"}, {"Te0T", "Te*T"}, {"Te1T", "Te*T"}, {"Tp01", "Tp**"}, {"Tp09", "Tp**"}, {"Tf0c", "Tf*c"}, {"TcXX", "TcXX"}, {"Tp0A", "Tp**"}, {"Tp0C", "Tp**"}, } for _, tt := range tests { t.Run(tt.key, func(t *testing.T) { t.Parallel() got := seriesKey(tt.key) if got != tt.want { t.Errorf("seriesKey(%q) = %q, want %q", tt.key, got, tt.want) } }) } } func TestNumericValue(t *testing.T) { t.Parallel() tests := []struct { key string want int }{ {"TC0c", 0}, {"TC3c", 3}, {"TC9c", 9}, {"Tp01", 1}, {"Tp09", 9}, {"Te12", 12}, {"TcXX", 0}, {"Tp0A", 10}, {"Tp0C", 12}, } for _, tt := range tests { t.Run(tt.key, func(t *testing.T) { t.Parallel() got := numericValue(tt.key) if got != tt.want { t.Errorf("numericValue(%q) = %d, want %d", tt.key, got, tt.want) } }) } } func TestGroupBySeries(t *testing.T) { t.Parallel() keys := []string{"TC2c", "TC0c", "Te1T", "TC1c", "Te0T"} got := groupBySeries(keys) if len(got) != 2 { t.Fatalf("groupBySeries: got %d series, want 2", len(got)) } tcSeries, ok := got["TC*c"] if !ok { t.Fatal("groupBySeries: missing series TC*c") } wantTC := []string{"TC0c", "TC1c", "TC2c"} if len(tcSeries) != len(wantTC) { t.Fatalf("TC*c len: got %d, want %d; keys: %v", len(tcSeries), len(wantTC), tcSeries) } for i, k := range wantTC { if tcSeries[i] != k { t.Errorf("TC*c[%d] = %q, want %q", i, tcSeries[i], k) } } teSeries, ok := got["Te*T"] if !ok { t.Fatal("groupBySeries: missing series Te*T") } wantTe := []string{"Te0T", "Te1T"} if len(teSeries) != len(wantTe) { t.Fatalf("Te*T len: got %d, want %d; keys: %v", len(teSeries), len(wantTe), teSeries) } for i, k := range wantTe { if teSeries[i] != k { t.Errorf("Te*T[%d] = %q, want %q", i, teSeries[i], k) } } } func TestGroupByStrideWithinSeries(t *testing.T) { t.Parallel() tests := []struct { name string sensors []string want [][]string }{ { name: "single sensor", sensors: []string{"Tp00"}, want: [][]string{{"Tp00"}}, }, { name: "two sensors uniform stride", sensors: []string{"Tp00", "Tp04"}, want: [][]string{{"Tp00"}, {"Tp04"}}, }, { name: "M1 triplets stride-4 gap", sensors: []string{"Tp00", "Tp01", "Tp02", "Tp04", "Tp05", "Tp06", "Tp08", "Tp09", "Tp0A"}, want: [][]string{ {"Tp00", "Tp01", "Tp02"}, {"Tp04", "Tp05", "Tp06"}, {"Tp08", "Tp09", "Tp0A"}, }, }, { name: "M5 uniform stride-4", sensors: []string{"Tp00", "Tp04", "Tp08"}, want: [][]string{{"Tp00"}, {"Tp04"}, {"Tp08"}}, }, { name: "M4 irregular large gap", sensors: []string{"Tp00", "Tp01", "Tp02", "Tp04", "Tp05", "Tp06", "Tp08", "Tp09", "Tp21"}, want: [][]string{ {"Tp00", "Tp01", "Tp02"}, {"Tp04", "Tp05", "Tp06"}, {"Tp08", "Tp09"}, {"Tp21"}, }, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := groupByStrideWithinSeries(tt.sensors) if len(got) != len(tt.want) { t.Fatalf("groupByStrideWithinSeries(%v): got %d groups, want %d; got=%v", tt.sensors, len(got), len(tt.want), got) } for i, wantGroup := range tt.want { if len(got[i]) != len(wantGroup) { t.Errorf("group[%d]: got %v (len %d), want %v (len %d)", i, got[i], len(got[i]), wantGroup, len(wantGroup)) continue } for j, wantKey := range wantGroup { if got[i][j] != wantKey { t.Errorf("group[%d][%d] = %q, want %q", i, j, got[i][j], wantKey) } } } }) } } func TestDeltaTemps(t *testing.T) { t.Parallel() tests := []struct { name string base map[string]float32 hot map[string]float32 want map[string]float32 }{ { name: "one above one below threshold", base: map[string]float32{"TC0c": 30.0, "TC1c": 35.0}, hot: map[string]float32{"TC0c": 45.0, "TC1c": 36.0}, want: map[string]float32{"TC0c": 15.0}, }, { name: "exactly at threshold", base: map[string]float32{"TC0c": 30.0}, hot: map[string]float32{"TC0c": 31.5}, want: map[string]float32{"TC0c": 1.5}, }, { name: "key missing from hot", base: map[string]float32{"TC0c": 30.0}, hot: map[string]float32{}, want: map[string]float32{}, }, { name: "key missing from base", base: map[string]float32{}, hot: map[string]float32{"TC0c": 45.0}, want: map[string]float32{}, }, { name: "empty inputs", base: map[string]float32{}, hot: map[string]float32{}, want: map[string]float32{}, }, { name: "multiple sensors all above threshold", base: map[string]float32{"TC0c": 30.0, "TC1c": 32.0, "TC2c": 28.0}, hot: map[string]float32{"TC0c": 50.0, "TC1c": 45.0, "TC2c": 35.0}, want: map[string]float32{"TC0c": 20.0, "TC1c": 13.0, "TC2c": 7.0}, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := deltaTemps(tt.base, tt.hot) if len(got) != len(tt.want) { t.Errorf("deltaTemps: got %d entries %v, want %d entries %v", len(got), got, len(tt.want), tt.want) return } for k, wantV := range tt.want { gotV, ok := got[k] if !ok { t.Errorf("deltaTemps: missing key %q in result", k) continue } if gotV != wantV { t.Errorf("deltaTemps[%q] = %g, want %g", k, gotV, wantV) } } }) } } func TestPhaseMidWord(t *testing.T) { t.Parallel() tests := []struct { label string want string }{ {"CPU Super Core", "Super"}, {"CPU Performance Core", "Performance"}, {"CPU Efficiency Core", "Efficiency"}, {"Single", "Single"}, {"", ""}, {"Two Words", "Words"}, } for _, tt := range tests { t.Run(tt.label, func(t *testing.T) { t.Parallel() got := phaseMidWord(tt.label) if got != tt.want { t.Errorf("phaseMidWord(%q) = %q, want %q", tt.label, got, tt.want) } }) } } // TestBuildPhases verifies the phase specification construction across the chip // topologies the validate-temp-mappings family roster covers: // - nil / empty perfLevels → 2 phases with zero core counts (legacy fallback) // - 2-level P+E (M1–M4) → Performance + Efficiency, UserInitiated + Background QoS // - 2-level S+E (M5 base) → Super + Efficiency, UserInteractive + Background QoS // - 2-level S+P (M5 Pro/Max) → Super + Performance, UserInteractive + UserInitiated QoS // - 3-level → Super + Performance + Efficiency (hypothetical future tri-tier chip) func TestBuildPhases(t *testing.T) { t.Parallel() twoLevelPE := []platform.PerfLevel{ {Name: "Performance", PhysicalCPU: 10, LogicalCPU: 10}, {Name: "Efficiency", PhysicalCPU: 4, LogicalCPU: 4}, } twoLevelSE := []platform.PerfLevel{ {Name: "Performance", PhysicalCPU: 4, LogicalCPU: 4}, {Name: "Efficiency", PhysicalCPU: 6, LogicalCPU: 6}, } twoLevelSP := []platform.PerfLevel{ {Name: "Performance", PhysicalCPU: 6, LogicalCPU: 6}, {Name: "Performance", PhysicalCPU: 12, LogicalCPU: 12}, } threeLevel := []platform.PerfLevel{ {Name: "Super", PhysicalCPU: 4, LogicalCPU: 4}, {Name: "Performance", PhysicalCPU: 8, LogicalCPU: 8}, {Name: "Efficiency", PhysicalCPU: 4, LogicalCPU: 4}, } m4Pro, _ := platform.LookupSKULayout("M4 Pro") m5Base, _ := platform.LookupSKULayout("M5") m5Pro, _ := platform.LookupSKULayout("M5 Pro") tests := []struct { name string levels []platform.PerfLevel layout platform.SKULayout wantLabels []string wantCores []int wantQoS []int }{ { name: "nil levels → 2 phases with zero cores", levels: nil, layout: platform.SKULayout{}, wantLabels: []string{"CPU Performance Core", "CPU Efficiency Core"}, wantCores: []int{0, 0}, wantQoS: []int{stress.QoSUserInitiated, stress.QoSBackground}, }, { name: "2-level P+E (M4 Pro)", levels: twoLevelPE, layout: m4Pro, wantLabels: []string{"CPU Performance Core", "CPU Efficiency Core"}, wantCores: []int{10, 4}, wantQoS: []int{stress.QoSUserInitiated, stress.QoSBackground}, }, { name: "2-level S+E (M5 base) — top label is Super, not Performance", levels: twoLevelSE, layout: m5Base, wantLabels: []string{"CPU Super Core", "CPU Efficiency Core"}, wantCores: []int{4, 6}, wantQoS: []int{stress.QoSUserInteractive, stress.QoSBackground}, }, { name: "2-level S+P (M5 Pro) — Super + Performance, no Efficiency", levels: twoLevelSP, layout: m5Pro, wantLabels: []string{"CPU Super Core", "CPU Performance Core"}, wantCores: []int{6, 12}, wantQoS: []int{stress.QoSUserInteractive, stress.QoSUserInitiated}, }, { name: "3-level chip (hypothetical Super+Performance+Efficiency)", levels: threeLevel, layout: platform.SKULayout{}, wantLabels: []string{"CPU Super Core", "CPU Performance Core", "CPU Efficiency Core"}, wantCores: []int{4, 8, 4}, wantQoS: []int{stress.QoSUserInteractive, stress.QoSUserInitiated, stress.QoSBackground}, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := buildPhases(tt.levels, tt.layout) if len(got) != len(tt.wantLabels) { t.Fatalf("buildPhases: got %d phases, want %d; phases=%v", len(got), len(tt.wantLabels), got) } for i, phase := range got { if phase.label != tt.wantLabels[i] { t.Errorf("buildPhases[%d].label = %q, want %q", i, phase.label, tt.wantLabels[i]) } if phase.cores != tt.wantCores[i] { t.Errorf("buildPhases[%d].cores = %d, want %d", i, phase.cores, tt.wantCores[i]) } if phase.qos != tt.wantQoS[i] { t.Errorf("buildPhases[%d].qos = %d, want %d", i, phase.qos, tt.wantQoS[i]) } } }) } } func TestFormatRange(t *testing.T) { t.Parallel() tests := []struct { name string min int max int want string }{ {"equal bounds collapse", 8, 8, "8"}, {"distinct bounds use en-dash", 8, 10, "8–10"}, {"zero is a valid singleton", 0, 0, "0"}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := formatRange(tt.min, tt.max) if got != tt.want { t.Errorf("formatRange(%d, %d) = %q, want %q", tt.min, tt.max, got, tt.want) } }) } } // TestExpectedCores covers the per-phase-label lookup for SKU expectations, // including the "absent core type" case that the Phase 4a pair-signature // validation depends on (returning 0,0 to mean "skip range check"). func TestExpectedCores(t *testing.T) { t.Parallel() m4Pro, _ := platform.LookupSKULayout("M4 Pro") m5Pro, _ := platform.LookupSKULayout("M5 Pro") m5Base, _ := platform.LookupSKULayout("M5") tests := []struct { name string layout platform.SKULayout label string wantMin, wantMax int }{ {"M4 Pro Performance: 8–10P", m4Pro, labelPerformanceCore, 8, 10}, {"M4 Pro Efficiency: 4E", m4Pro, labelEfficiencyCore, 4, 4}, {"M4 Pro has no Super tier → 0,0", m4Pro, labelSuperCore, 0, 0}, {"M5 Pro Super: 5–6S", m5Pro, labelSuperCore, 5, 6}, {"M5 Pro Performance: 10–12P", m5Pro, labelPerformanceCore, 10, 12}, {"M5 Pro has no Efficiency tier → 0,0", m5Pro, labelEfficiencyCore, 0, 0}, {"M5 base has no Performance tier → 0,0", m5Base, labelPerformanceCore, 0, 0}, {"unknown label → 0,0", m4Pro, "CPU Bogus Core", 0, 0}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() gotMin, gotMax := expectedCores(tt.layout, tt.label) if gotMin != tt.wantMin || gotMax != tt.wantMax { t.Errorf("expectedCores(%q): got (%d, %d), want (%d, %d)", tt.label, gotMin, gotMax, tt.wantMin, tt.wantMax) } }) } } // TestLayoutSummary verifies the human-readable preamble line, including the // "S + P" composition (no Efficiency on M5 Pro/Max) and the "S + E" composition // (no Performance on M5 base) which are the cases the existing buildPhases // could otherwise mis-label. func TestLayoutSummary(t *testing.T) { t.Parallel() tests := []struct { cpu string want string }{ {"M1", "4P + 4E, 7–8 GPU cores"}, {"M4 Pro", "8–10P + 4E, 16–20 GPU cores"}, {"M5", "3–4S + 6E, 8–10 GPU cores"}, {"M5 Pro", "5–6S + 10–12P, 16–20 GPU cores"}, {"M5 Max", "6S + 12P, 32–40 GPU cores"}, {"A18 Pro", "2P + 4E, 6 GPU cores"}, } for _, tt := range tests { t.Run(tt.cpu, func(t *testing.T) { t.Parallel() layout, ok := platform.LookupSKULayout(tt.cpu) if !ok { t.Fatalf("LookupSKULayout(%q) returned !ok", tt.cpu) } got := layoutSummary(layout) if got != tt.want { t.Errorf("layoutSummary(%q) = %q, want %q", tt.cpu, got, tt.want) } }) } } func TestSortedSeriesKeys(t *testing.T) { t.Parallel() tests := []struct { name string groups map[string][]string want []string }{ { name: "three series sorted lexicographically", groups: map[string][]string{ "Tp**": {"Tp00", "Tp01"}, "TC*c": {"TC0c", "TC1c"}, "Te*T": {"Te0T"}, }, want: []string{"TC*c", "Te*T", "Tp**"}, }, { name: "empty map", groups: map[string][]string{}, want: []string{}, }, { name: "single entry", groups: map[string][]string{ "TC*c": {"TC0c"}, }, want: []string{"TC*c"}, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := sortedSeriesKeys(tt.groups) if len(got) != len(tt.want) { t.Fatalf("sortedSeriesKeys: got %v (len %d), want %v (len %d)", got, len(got), tt.want, len(tt.want)) } for i, k := range tt.want { if got[i] != k { t.Errorf("sortedSeriesKeys[%d] = %q, want %q", i, got[i], k) } } }) } } // TestAnnotateLine covers the three branches of the per-line annotator: // canonical match (✓), key mapped under a different description (⚠), and // not-yet-mapped key (★). Uses real AppleTemp entries so the test would catch // a regression in the smc.LookupTempDesc filter logic too. func TestAnnotateLine(t *testing.T) { t.Parallel() tests := []struct { name string line string label string key string family string coreIdx int contains string }{ { name: "M5 Tp00 matches Super Core 1 exactly", line: "CPU Super Core 1:Tp00:M5", label: "CPU Super Core", key: "Tp00", family: "M5", coreIdx: 1, contains: "✓ matches src/temp.txt", }, { name: "M5 Tp00 mis-labelled as Performance shows mismatch", line: "CPU Performance Core 1:Tp00:M5", label: "CPU Performance Core", key: "Tp00", family: "M5", coreIdx: 1, contains: `⚠ src/temp.txt has "CPU Super Core 1"`, }, { name: "Unknown key flagged as NEW", line: "CPU Performance Core 1:TZZZ:M5", label: "CPU Performance Core", key: "TZZZ", family: "M5", coreIdx: 1, contains: "★ NEW for M5", }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := annotateLine(tt.line, tt.label, tt.key, tt.family, tt.coreIdx) if !strings.Contains(got, tt.contains) { t.Errorf("annotateLine(...) = %q\n must contain %q", got, tt.contains) } if !strings.Contains(got, tt.line) { t.Errorf("annotateLine(...) = %q\n must contain original line %q", got, tt.line) } }) } } // TestAllDetectedKeys verifies the union semantics: keys appear regardless of // which phase produced them, and cluster keys are merged in. Duplicate keys // across phases are de-duplicated. func TestAllDetectedKeys(t *testing.T) { t.Parallel() results := []phaseResult{ { spec: phaseSpec{label: labelPerformanceCore}, deltas: map[string]float32{"Tp00": 5.0, "Tp01": 4.5}, }, { // Tp01 cross-phase; must dedup. spec: phaseSpec{label: labelEfficiencyCore}, deltas: map[string]float32{"Tp01": 2.0, "Te04": 7.0}, }, } cluster := []string{"Tex0", "Tpx0"} got := allDetectedKeys(results, cluster) want := []string{"Tp00", "Tp01", "Te04", "Tex0", "Tpx0"} if len(got) != len(want) { t.Fatalf("allDetectedKeys returned %d keys, want %d: %v", len(got), len(want), got) } for _, k := range want { if _, ok := got[k]; !ok { t.Errorf("allDetectedKeys missing %q (got %v)", k, got) } } } ================================================ FILE: cmd/hw.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // hwCmd represents the hw command. var hwCmd = &cobra.Command{ Use: "hw", Aliases: []string{"hardware", "info"}, Short: "Display hardware information", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Hardware() }, } // init registers the hw subcommand with the root command. func init() { rootCmd.AddCommand(hwCmd) } ================================================ FILE: cmd/power.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents power command. var powerCmd = &cobra.Command{ Use: "power", Aliases: []string{"pow"}, Short: "Display power sensors", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Power() }, } // init registers the power subcommand with the root command. func init() { rootCmd.AddCommand(powerCmd) } ================================================ FILE: cmd/raw.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "fmt" "strings" "github.com/dkorunic/iSMC/smc" "github.com/spf13/cobra" ) // Hex alphabet indexed by nibble; avoids per-byte fmt.Sprintf. const hexDigits = "0123456789abcdef" // formatBytesHex renders size bytes from b as space-separated lowercase // two-digit hex pairs (e.g. "01 0a ff"). func formatBytesHex(b [32]byte, size uint32) string { if size == 0 { return "" } if size > 32 { size = 32 } var sb strings.Builder sb.Grow(int(size)*3 - 1) for i := uint32(0); i < size; i++ { if i > 0 { sb.WriteByte(' ') } sb.WriteByte(hexDigits[b[i]>>4]) sb.WriteByte(hexDigits[b[i]&0x0f]) } return sb.String() } // rawCmd dumps every SMC key with its raw type and bytes in the same format used by report files. var rawCmd = &cobra.Command{ Use: "raw", Short: "Display all raw SMC keys and their byte values", Run: func(_ *cobra.Command, _ []string) { for _, k := range smc.GetRaw() { byteStr := formatBytesHex([32]byte(k.Bytes), k.DataSize) decoded := smc.DecodeValue(k.DataType, k.Bytes, k.DataSize) if decoded != "" { fmt.Printf(" %s [%-4s] %s (bytes %s)\n", k.Key, k.DataType, decoded, byteStr) } else { fmt.Printf(" %s [%-4s] (bytes %s)\n", k.Key, k.DataType, byteStr) } } }, } // init registers the raw subcommand with the root command. func init() { rootCmd.AddCommand(rawCmd) } ================================================ FILE: cmd/root.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "fmt" "os" "github.com/spf13/cobra" ) var OutputFlag string // rootCmd represents the base command when called without any subcommands var rootCmd = &cobra.Command{ Use: "iSMC", Short: "Apple SMC information tool", Long: `Apple SMC CLI tool that can decode and display temperature, fans, battery, power, voltage and current information for various hardware in your Apple Mac hardware.`, Run: func(cmd *cobra.Command, args []string) { allCmd.Run(cmd, args) }, } // Execute runs the root Cobra command and exits with a non-zero status on error. func Execute() { if err := rootCmd.Execute(); err != nil { fmt.Fprintln(os.Stderr, err) os.Exit(1) } } // init registers the persistent --output flag on the root command. func init() { rootCmd.PersistentFlags().StringVarP(&OutputFlag, "output", "o", "table", "Output format (ascii, table, json, influx)") } ================================================ FILE: cmd/temp.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents temp command. var tempCmd = &cobra.Command{ Use: "temp", Aliases: []string{"temperature", "tmp"}, Short: "Display temperature sensors", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Temperature() }, } // init registers the temp subcommand with the root command. func init() { rootCmd.AddCommand(tempCmd) } ================================================ FILE: cmd/version.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "fmt" "runtime" "strings" "github.com/spf13/cobra" ) var ( GitTag = "" GitCommit = "" GitDirty = "" BuildTime = "" ) var versionCmd = &cobra.Command{ Use: "version", Short: "Print the version number of iSMC", Run: func(cmd *cobra.Command, args []string) { fmt.Printf("iSMC %v %v%v, built on %v, with %v\n", GitTag, GitCommit, GitDirty, BuildTime, runtime.Version()) }, } func init() { GitTag = strings.TrimSpace(GitTag) GitCommit = strings.TrimSpace(GitCommit) GitDirty = strings.TrimSpace(GitDirty) BuildTime = strings.TrimSpace(BuildTime) rootCmd.AddCommand(versionCmd) } ================================================ FILE: cmd/volt.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package cmd import ( "github.com/dkorunic/iSMC/output" "github.com/spf13/cobra" ) // rootCmd represents volt command. var voltCmd = &cobra.Command{ Use: "volt", Aliases: []string{"voltage", "vol"}, Short: "Display voltage sensors", Run: func(_ *cobra.Command, args []string) { output.Factory(OutputFlag).Voltage() }, } // init registers the volt subcommand with the root command. func init() { rootCmd.AddCommand(voltCmd) } ================================================ FILE: go.mod ================================================ module github.com/dkorunic/iSMC go 1.26 replace github.com/dkorunic/iSMC/gosmc => ./gosmc require ( github.com/dkorunic/iSMC/gosmc v0.0.0-20260413130435-fb3be841d2e6 github.com/fvbommel/sortorder v1.1.0 github.com/spf13/cobra v1.10.2 ) require ( github.com/clipperhouse/uax29/v2 v2.7.0 // indirect github.com/davecgh/go-spew v1.1.1 // indirect github.com/pmezard/go-difflib v1.0.0 // indirect golang.org/x/text v0.37.0 // indirect gopkg.in/yaml.v3 v3.0.1 // indirect ) require ( github.com/inconshreveable/mousetrap v1.1.0 // indirect github.com/jedib0t/go-pretty/v6 v6.7.10 github.com/mattn/go-runewidth v0.0.23 // indirect github.com/spf13/pflag v1.0.10 // indirect github.com/stretchr/testify v1.11.1 golang.org/x/sys v0.44.0 // indirect ) ================================================ FILE: go.sum ================================================ github.com/clipperhouse/uax29/v2 v2.7.0 h1:+gs4oBZ2gPfVrKPthwbMzWZDaAFPGYK72F0NJv2v7Vk= github.com/clipperhouse/uax29/v2 v2.7.0/go.mod h1:EFJ2TJMRUaplDxHKj1qAEhCtQPW2tJSwu5BF98AuoVM= github.com/cpuguy83/go-md2man/v2 v2.0.6/go.mod h1:oOW0eioCTA6cOiMLiUPZOpcVxMig6NIQQ7OS05n1F4g= github.com/davecgh/go-spew v1.1.1 h1:vj9j/u1bqnvCEfJOwUhtlOARqs3+rkHYY13jYWTU97c= github.com/davecgh/go-spew v1.1.1/go.mod h1:J7Y8YcW2NihsgmVo/mv3lAwl/skON4iLHjSsI+c5H38= github.com/fvbommel/sortorder v1.1.0 h1:fUmoe+HLsBTctBDoaBwpQo5N+nrCp8g/BjKb/6ZQmYw= github.com/fvbommel/sortorder v1.1.0/go.mod h1:uk88iVf1ovNn1iLfgUVU2F9o5eO30ui720w+kxuqRs0= github.com/inconshreveable/mousetrap v1.1.0 h1:wN+x4NVGpMsO7ErUn/mUI3vEoE6Jt13X2s0bqwp9tc8= github.com/inconshreveable/mousetrap v1.1.0/go.mod h1:vpF70FUmC8bwa3OWnCshd2FqLfsEA9PFc4w1p2J65bw= github.com/jedib0t/go-pretty/v6 v6.7.10 h1:B/2qW2Bkv2L6n14PP8o1kx75kWzHOQ3YTluWzg9icac= github.com/jedib0t/go-pretty/v6 v6.7.10/go.mod h1:YwC5CE4fJ1HFUDeivSV1r//AmANFHyqczZk+U6BDALU= github.com/mattn/go-runewidth v0.0.23 h1:7ykA0T0jkPpzSvMS5i9uoNn2Xy3R383f9HDx3RybWcw= github.com/mattn/go-runewidth v0.0.23/go.mod h1:XBkDxAl56ILZc9knddidhrOlY5R/pDhgLpndooCuJAs= github.com/pmezard/go-difflib v1.0.0 h1:4DBwDE0NGyQoBHbLQYPwSUPoCMWR5BEzIk/f1lZbAQM= github.com/pmezard/go-difflib v1.0.0/go.mod h1:iKH77koFhYxTK1pcRnkKkqfTogsbg7gZNVY4sRDYZ/4= github.com/russross/blackfriday/v2 v2.1.0/go.mod h1:+Rmxgy9KzJVeS9/2gXHxylqXiyQDYRxCVz55jmeOWTM= github.com/spf13/cobra v1.10.2 h1:DMTTonx5m65Ic0GOoRY2c16WCbHxOOw6xxezuLaBpcU= github.com/spf13/cobra v1.10.2/go.mod h1:7C1pvHqHw5A4vrJfjNwvOdzYu0Gml16OCs2GRiTUUS4= github.com/spf13/pflag v1.0.9/go.mod h1:McXfInJRrz4CZXVZOBLb0bTZqETkiAhM9Iw0y3An2Bg= github.com/spf13/pflag v1.0.10 h1:4EBh2KAYBwaONj6b2Ye1GiHfwjqyROoF4RwYO+vPwFk= github.com/spf13/pflag v1.0.10/go.mod h1:McXfInJRrz4CZXVZOBLb0bTZqETkiAhM9Iw0y3An2Bg= github.com/stretchr/testify v1.11.1 h1:7s2iGBzp5EwR7/aIZr8ao5+dra3wiQyKjjFuvgVKu7U= github.com/stretchr/testify v1.11.1/go.mod h1:wZwfW3scLgRK+23gO65QZefKpKQRnfz6sD981Nm4B6U= go.yaml.in/yaml/v3 v3.0.4/go.mod h1:DhzuOOF2ATzADvBadXxruRBLzYTpT36CKvDb3+aBEFg= golang.org/x/sys v0.44.0 h1:ildZl3J4uzeKP07r2F++Op7E9B29JRUy+a27EibtBTQ= golang.org/x/sys v0.44.0/go.mod h1:4GL1E5IUh+htKOUEOaiffhrAeqysfVGipDYzABqnCmw= golang.org/x/text v0.37.0 h1:Cqjiwd9eSg8e0QAkyCaQTNHFIIzWtidPahFWR83rTrc= golang.org/x/text v0.37.0/go.mod h1:a5sjxXGs9hsn/AJVwuElvCAo9v8QYLzvavO5z2PiM38= gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405 h1:yhCVgyC4o1eVCa2tZl7eS0r+SDo693bJlVdllGtEeKM= gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405/go.mod h1:Co6ibVJAznAaIkqp8huTwlJQCZ016jof/cbN4VW5Yz0= gopkg.in/yaml.v3 v3.0.1 h1:fxVm/GzAzEWqLHuvctI91KS9hhNmmWOoWu0XTYJS7CA= gopkg.in/yaml.v3 v3.0.1/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM= ================================================ FILE: gosmc/.clang-format ================================================ --- Language: Cpp AccessModifierOffset: -2 AlignAfterOpenBracket: Align AlignArrayOfStructures: None AlignConsecutiveAssignments: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: true AlignConsecutiveBitFields: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignConsecutiveDeclarations: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignConsecutiveMacros: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignConsecutiveShortCaseStatements: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCaseArrows: false AlignCaseColons: false AlignConsecutiveTableGenBreakingDAGArgColons: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignConsecutiveTableGenCondOperatorColons: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignConsecutiveTableGenDefinitionColons: Enabled: false AcrossEmptyLines: false AcrossComments: false AlignCompound: false AlignFunctionPointers: false PadOperators: false AlignEscapedNewlines: Right AlignOperands: Align AlignTrailingComments: Kind: Always OverEmptyLines: 0 AllowAllArgumentsOnNextLine: true AllowAllParametersOfDeclarationOnNextLine: true AllowBreakBeforeNoexceptSpecifier: Never AllowShortBlocksOnASingleLine: Never AllowShortCaseExpressionOnASingleLine: true AllowShortCaseLabelsOnASingleLine: false AllowShortCompoundRequirementOnASingleLine: true AllowShortEnumsOnASingleLine: true AllowShortFunctionsOnASingleLine: All AllowShortIfStatementsOnASingleLine: Never AllowShortLambdasOnASingleLine: All AllowShortLoopsOnASingleLine: false AlwaysBreakAfterDefinitionReturnType: None AlwaysBreakBeforeMultilineStrings: false AttributeMacros: - __capability BinPackArguments: true BinPackParameters: true BitFieldColonSpacing: Both BraceWrapping: AfterCaseLabel: false AfterClass: false AfterControlStatement: Never AfterEnum: false AfterExternBlock: false AfterFunction: false AfterNamespace: false AfterObjCDeclaration: false AfterStruct: false AfterUnion: false BeforeCatch: false BeforeElse: false BeforeLambdaBody: false BeforeWhile: false IndentBraces: false SplitEmptyFunction: true SplitEmptyRecord: true SplitEmptyNamespace: true BreakAdjacentStringLiterals: true BreakAfterAttributes: Leave BreakAfterJavaFieldAnnotations: false BreakAfterReturnType: None BreakArrays: true BreakBeforeBinaryOperators: None BreakBeforeConceptDeclarations: Always BreakBeforeBraces: Attach BreakBeforeInlineASMColon: OnlyMultiline BreakBeforeTernaryOperators: true BreakConstructorInitializers: BeforeColon BreakFunctionDefinitionParameters: false BreakInheritanceList: BeforeColon BreakStringLiterals: true BreakTemplateDeclarations: MultiLine ColumnLimit: 80 CommentPragmas: '^ IWYU pragma:' CompactNamespaces: false ConstructorInitializerIndentWidth: 4 ContinuationIndentWidth: 4 Cpp11BracedListStyle: true DerivePointerAlignment: false DisableFormat: false EmptyLineAfterAccessModifier: Never EmptyLineBeforeAccessModifier: LogicalBlock ExperimentalAutoDetectBinPacking: false FixNamespaceComments: true ForEachMacros: - foreach - Q_FOREACH - BOOST_FOREACH IfMacros: - KJ_IF_MAYBE IncludeBlocks: Preserve IncludeCategories: - Regex: '^"(llvm|llvm-c|clang|clang-c)/' Priority: 2 SortPriority: 0 CaseSensitive: false - Regex: '^(<|"(gtest|gmock|isl|json)/)' Priority: 3 SortPriority: 0 CaseSensitive: false - Regex: '.*' Priority: 1 SortPriority: 0 CaseSensitive: false IncludeIsMainRegex: '(Test)?$' IncludeIsMainSourceRegex: '' IndentAccessModifiers: false IndentCaseBlocks: false IndentCaseLabels: false IndentExternBlock: AfterExternBlock IndentGotoLabels: true IndentPPDirectives: None IndentRequiresClause: true IndentWidth: 2 IndentWrappedFunctionNames: false InsertBraces: false InsertNewlineAtEOF: false InsertTrailingCommas: None IntegerLiteralSeparator: Binary: 0 BinaryMinDigits: 0 Decimal: 0 DecimalMinDigits: 0 Hex: 0 HexMinDigits: 0 JavaScriptQuotes: Leave JavaScriptWrapImports: true KeepEmptyLines: AtEndOfFile: false AtStartOfBlock: true AtStartOfFile: true LambdaBodyIndentation: Signature LineEnding: DeriveLF MacroBlockBegin: '' MacroBlockEnd: '' MainIncludeChar: Quote MaxEmptyLinesToKeep: 1 NamespaceIndentation: None ObjCBinPackProtocolList: Auto ObjCBlockIndentWidth: 2 ObjCBreakBeforeNestedBlockParam: true ObjCSpaceAfterProperty: false ObjCSpaceBeforeProtocolList: true PackConstructorInitializers: BinPack PenaltyBreakAssignment: 2 PenaltyBreakBeforeFirstCallParameter: 19 PenaltyBreakComment: 300 PenaltyBreakFirstLessLess: 120 PenaltyBreakOpenParenthesis: 0 PenaltyBreakScopeResolution: 500 PenaltyBreakString: 1000 PenaltyBreakTemplateDeclaration: 10 PenaltyExcessCharacter: 1000000 PenaltyIndentedWhitespace: 0 PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Right PPIndentWidth: -1 QualifierAlignment: Leave ReferenceAlignment: Pointer ReflowComments: true RemoveBracesLLVM: false RemoveParentheses: Leave RemoveSemicolon: false RequiresClausePosition: OwnLine RequiresExpressionIndentation: OuterScope SeparateDefinitionBlocks: Leave ShortNamespaceLines: 1 SkipMacroDefinitionBody: false SortIncludes: CaseSensitive SortJavaStaticImport: Before SortUsingDeclarations: LexicographicNumeric SpaceAfterCStyleCast: false SpaceAfterLogicalNot: false SpaceAfterTemplateKeyword: true SpaceAroundPointerQualifiers: Default SpaceBeforeAssignmentOperators: true SpaceBeforeCaseColon: false SpaceBeforeCpp11BracedList: false SpaceBeforeCtorInitializerColon: true SpaceBeforeInheritanceColon: true SpaceBeforeJsonColon: false SpaceBeforeParens: ControlStatements SpaceBeforeParensOptions: AfterControlStatements: true AfterForeachMacros: true AfterFunctionDefinitionName: false AfterFunctionDeclarationName: false AfterIfMacros: true AfterOverloadedOperator: false AfterPlacementOperator: true AfterRequiresInClause: false AfterRequiresInExpression: false BeforeNonEmptyParentheses: false SpaceBeforeRangeBasedForLoopColon: true SpaceBeforeSquareBrackets: false SpaceInEmptyBlock: false SpacesBeforeTrailingComments: 1 SpacesInAngles: Never SpacesInContainerLiterals: true SpacesInLineCommentPrefix: Minimum: 1 Maximum: -1 SpacesInParens: Never SpacesInParensOptions: ExceptDoubleParentheses: false InCStyleCasts: false InConditionalStatements: false InEmptyParentheses: false Other: false SpacesInSquareBrackets: false Standard: Latest StatementAttributeLikeMacros: - Q_EMIT StatementMacros: - Q_UNUSED - QT_REQUIRE_VERSION TableGenBreakInsideDAGArg: DontBreak TabWidth: 8 UseTab: Never VerilogBreakBetweenInstancePorts: true WhitespaceSensitiveMacros: - BOOST_PP_STRINGIZE - CF_SWIFT_NAME - NS_SWIFT_NAME - PP_STRINGIZE - STRINGIZE ... ================================================ FILE: gosmc/LICENSE ================================================ GNU GENERAL PUBLIC LICENSE Version 3, 29 June 2007 Copyright (C) 2007 Free Software Foundation, Inc. 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But first, please read . ================================================ FILE: gosmc/README.md ================================================ # gosmc A Go package providing CGo bindings to the Apple System Management Controller (SMC) via macOS IOKit. It wraps the C-level SMC interface — open/close, key-info lookup, key read, and key write — into idiomatic Go types. **macOS only.** All source files carry `//go:build darwin`. The package is a nested Go module (`github.com/dkorunic/iSMC/gosmc`) and requires `CGO_ENABLED=1`. ## API ### Connection management ```go // Open a connection to the named IOKit service (typically "AppleSMC"). // Returns (connection handle, IOReturn result code). connection, result := gosmc.SMCOpen("AppleSMC") if result != gosmc.IOReturnSuccess { // handle error } defer gosmc.SMCClose(connection) ``` ### Reading a key ```go val, result := gosmc.SMCReadKey(connection, "TC0P") if result != gosmc.IOReturnSuccess { // handle error } fmt.Printf("key=%s type=%s size=%d bytes=%v\n", val.Key.ToString(), val.DataType.ToString(), val.DataSize, val.Bytes[:val.DataSize]) ``` `SMCReadKey` internally uses a process-wide sorted-array cache (up to 2048 entries, binary-searched) so that key-info lookups hit IOKit only on first access. Subsequent reads for the same key avoid the blocking `SMCGetKeyInfo` round-trip entirely. Keys confirmed to be absent or restricted are negatively cached, so repeated lookups for unavailable keys also skip IOKit. ### Low-level call ```go input := &gosmc.SMCKeyData{ Data8: gosmc.CMDReadIndex, Data32: index, } output, result := gosmc.SMCCall(connection, gosmc.KernelIndexSMC, input) ``` `SMCCall` maps directly to `IOConnectCallStructMethod`. After a successful transport call it validates that the driver wrote enough bytes to cover at least the SMC result field; if the response is truncated it returns `kIOReturnUnderrun`. Use it when you need raw index-based enumeration (e.g. iterating all keys via `CMDReadIndex`). ### Writing a key ```go val := &gosmc.SMCVal{DataSize: 1} val.Key[0], val.Key[1], val.Key[2], val.Key[3] = 'F', '0', 'T', 'g' val.DataType[0], val.DataType[1], val.DataType[2], val.DataType[3] = 'f', 'p', '2', 'e' val.Bytes[0], val.Bytes[1] = 0x0C, 0x00 result := gosmc.SMCWriteKey(connection, val) // validates DataSize against current value result = gosmc.SMCWriteKeyUnsafe(connection, val) // skips the pre-read size check ``` `SMCWriteKey` performs a pre-read to verify that `val.DataSize` matches the key's current size before writing. `SMCWriteKeyUnsafe` skips that check. ## Types | Go type | Description | |---------|-------------| | `SMCVal` | Key name, data type, data size, and raw bytes for one SMC key | | `SMCKeyData` | Full IOKit `SMCKeyData_t` struct used by `SMCCall` | | `SMCBytes` | `[32]byte` — capped at the kernel's `SMC_MAX_DATA_SIZE` per-read limit | | `UInt32Char` | `[5]byte` — null-terminated 4-character ASCII key or type name | | `KeyInfo` | Data size, data type, and attributes for one key (cache entry value) | | `DataVers` | SMC firmware version struct | | `PLimitData` | SMC power-limit struct | ## Constants ### IOReturn result codes (`values.go`) ```go gosmc.IOReturnSuccess // 0x000 — operation succeeded gosmc.IOReturnError // 0x2bc — general error gosmc.IOReturnNoDevice // 0x2c0 — SMC not found gosmc.IOReturnBusy // 0x2d5 — device busy gosmc.IOReturnTimeout // 0x2d6 — I/O timeout // … full list in values.go ``` ### SMC command codes ```go gosmc.CMDReadBytes // 5 — read key value bytes gosmc.CMDWriteBytes // 6 — write key value bytes gosmc.CMDReadIndex // 8 — read key at numeric index gosmc.CMDReadKeyinfo // 9 — read key metadata gosmc.CMDReadPlimit // 11 — read power-limit data gosmc.CMDReadVers // 12 — read SMC firmware version ``` ### SMC data types ```go gosmc.TypeSP78 // "sp78" — signed 7.8 fixed-point (most temperature sensors) gosmc.TypeFLT // "flt" — 32-bit IEEE 754 float gosmc.TypeUI8 // "ui8" — unsigned 8-bit integer gosmc.TypeUI16 // "ui16" — unsigned 16-bit integer gosmc.TypeUI32 // "ui32" — unsigned 32-bit integer gosmc.TypeFLAG // "flag" — single boolean byte // … full list in values.go ``` ## Internal implementation notes - **`smc.c`** — the C layer. Key functions: `SMCOpen`, `SMCClose`, `SMCCall`, `SMCReadKey`, `SMCWriteKey`, `SMCGetKeyInfo`. Internal static helpers `smcPackKeyBytes` (4-char key string → big-endian `UInt32`) and `smcUnpackKeyBytes` (`UInt32` → 4-char null-terminated string) are not part of the public API. `SMCOpen` returns `kIOReturnNoMemory` if `IOServiceMatching` fails before any IOKit call is made. - **Key-info cache** — `SMCGetKeyInfo` maintains a process-global sorted array of up to 2048 `SMCKeyInfoCacheEntry_t` structs. Each entry carries a `negative` flag: positive entries store the key's metadata; negative entries record that the key is known to be absent or restricted, preventing repeated IOKit round-trips for unavailable keys. Lookups use binary search (O(log N)) and return +1 (hit), -1 (negative hit — skip IOKit), or 0 (miss). Inserts use binary search to find the insertion point and `memmove` to shift existing entries, keeping the array sorted at all times. A full cache blocks new insertions but never blocks in-place upgrades of negative entries to positive — the upgrade check runs before the capacity guard. `SMCClose` acquires the lock and flushes the cache before closing the port, preventing Mach port number recycling from causing a new connection to receive stale cached key-info from the old one. The `os_unfair_lock` is held only for the short cache-lookup and cache-insert sections; the blocking `SMCCall` for a cache miss runs outside the lock. After re-acquiring the lock to insert a result, the code re-checks that `g_cachedConn == conn` to discard results that belong to a connection that was switched by another thread while `SMCCall` was in progress. - **`gosmc.go`** — the Go layer. Converts between Go structs and their `C.*` equivalents for each API call. - **`values.go`** — IOReturn codes, SMC command codes, SMC type name constants, and SMC type size constants. ## Building ```sh CGO_ENABLED=1 go build ./... ``` The package links against `-framework IOKit` (declared via `#cgo LDFLAGS` in `gosmc.go`). ## References - [Apple IOKit documentation](https://developer.apple.com/documentation/iokit) - [OS-X-FakeSMC-kozlek](https://github.com/RehabMan/OS-X-FakeSMC-kozlek) — original C SMC library this package wraps - [osx-cpu-temp](https://github.com/lavoiesl/osx-cpu-temp) — reference implementation ================================================ FILE: gosmc/go.mod ================================================ module github.com/dkorunic/iSMC/gosmc go 1.26 ================================================ FILE: gosmc/gosmc.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package gosmc // #cgo CFLAGS: -O2 -Wall // #cgo LDFLAGS: -framework IOKit // #include // #include "smc.h" import "C" import ( "unsafe" ) // DataVers is IOKit DataVers struct type DataVers struct { Major uint8 Minor uint8 Build uint8 Reserved [1]uint8 Release uint16 } // PLimitData is IOKit PLimitData struct type PLimitData struct { Version uint16 Length uint16 CPUPLimit uint32 GPUPLimit uint32 MemPLimit uint32 } // KeyInfo is IOKit KeyInfo struct type KeyInfo struct { DataSize uint32 DataType uint32 DataAttributes uint8 } // SMCKeyData is IOKit SMCKeyData struct type SMCKeyData struct { Key uint32 Vers DataVers PLimitData PLimitData KeyInfo KeyInfo Result uint8 Status uint8 Data8 uint8 Data32 uint32 Bytes SMCBytes } // SMCVal is IOKit SMCVal struct type SMCVal struct { Key UInt32Char DataSize uint32 DataType UInt32Char Bytes SMCBytes } // UInt32Char is IOKit UInt32Char type type UInt32Char [5]byte // toC converts a Go UInt32Char to the equivalent C UInt32Char_t representation. // Layout-compatible reinterpret avoids a per-byte copy loop. func (bs UInt32Char) toC() C.UInt32Char_t { return *(*C.UInt32Char_t)(unsafe.Pointer(&bs)) } // ToString returns the UInt32Char as a Go string. func (bs UInt32Char) ToString() string { return string(bs[:]) } // uint32CharFromC is the inverse of toC; same layout-compatible reinterpret. func uint32CharFromC(xs C.UInt32Char_t) UInt32Char { return *(*UInt32Char)(unsafe.Pointer(&xs)) } // SMCBytes is IOKit UInt32Char SMCBytes (capped at the kernel's SMC_MAX_DATA_SIZE per-read limit). type SMCBytes [32]byte // toC converts a Go SMCBytes to the equivalent C SMCBytes_t array; see UInt32Char.toC. func (bs SMCBytes) toC() C.SMCBytes_t { return *(*C.SMCBytes_t)(unsafe.Pointer(&bs)) } // smcBytesFromC is the inverse of SMCBytes.toC. func smcBytesFromC(xs C.SMCBytes_t) SMCBytes { return *(*SMCBytes)(unsafe.Pointer(&xs)) } // SMCOpen wrapper for Apple IOKit SMCOpen func SMCOpen(service string) (connection uint, result int) { svc := C.CString(service) defer C.free(unsafe.Pointer(svc)) var conn C.uint result = int(C.SMCOpen(svc, &conn)) connection = uint(conn) return connection, result } // SMCClose wrapper for Apple IOKit SMCClose func SMCClose(connection uint) int { return int(C.SMCClose(C.uint(connection))) } // SMCReadKey wrapper for Apple IOKit SMCReadKey func SMCReadKey(connection uint, key string) (*SMCVal, int) { k := C.CString(key) defer C.free(unsafe.Pointer(k)) v := C.SMCVal_t{} result := C.SMCReadKey(C.uint(connection), k, &v) return &SMCVal{ Key: uint32CharFromC(v.key), DataSize: uint32(v.dataSize), DataType: uint32CharFromC(v.dataType), Bytes: smcBytesFromC(v.bytes), }, int(result) } // SMCCall wrapper for Apple IOKit SMCCall func SMCCall(connection uint, index uint, inputStruct *SMCKeyData) (*SMCKeyData, int) { in := C.SMCKeyData_t{ key: C.uint(inputStruct.Key), vers: C.SMCKeyData_vers_t{ major: C.uchar(inputStruct.Vers.Major), minor: C.uchar(inputStruct.Vers.Minor), build: C.uchar(inputStruct.Vers.Build), reserved: [1]C.uchar{C.uchar(inputStruct.Vers.Reserved[0])}, release: C.ushort(inputStruct.Vers.Release), }, pLimitData: C.SMCKeyData_pLimitData_t{ version: C.ushort(inputStruct.PLimitData.Version), length: C.ushort(inputStruct.PLimitData.Length), cpuPLimit: C.uint(inputStruct.PLimitData.CPUPLimit), gpuPLimit: C.uint(inputStruct.PLimitData.GPUPLimit), memPLimit: C.uint(inputStruct.PLimitData.MemPLimit), }, keyInfo: C.SMCKeyData_keyInfo_t{ dataSize: C.uint(inputStruct.KeyInfo.DataSize), dataType: C.uint(inputStruct.KeyInfo.DataType), dataAttributes: C.uchar(inputStruct.KeyInfo.DataAttributes), }, result: C.uchar(inputStruct.Result), status: C.uchar(inputStruct.Status), data8: C.uchar(inputStruct.Data8), data32: C.uint(inputStruct.Data32), bytes: inputStruct.Bytes.toC(), } out := C.SMCKeyData_t{} result := C.SMCCall(C.uint(connection), C.uint(index), &in, &out) return &SMCKeyData{ Key: uint32(out.key), Vers: DataVers{ Major: uint8(out.vers.major), Minor: uint8(out.vers.minor), Build: uint8(out.vers.build), Reserved: [1]uint8{uint8(out.vers.reserved[0])}, Release: uint16(out.vers.release), }, PLimitData: PLimitData{ Version: uint16(out.pLimitData.version), Length: uint16(out.pLimitData.length), CPUPLimit: uint32(out.pLimitData.cpuPLimit), GPUPLimit: uint32(out.pLimitData.gpuPLimit), MemPLimit: uint32(out.pLimitData.memPLimit), }, KeyInfo: KeyInfo{ DataSize: uint32(out.keyInfo.dataSize), DataType: uint32(out.keyInfo.dataType), DataAttributes: uint8(out.keyInfo.dataAttributes), }, Result: uint8(out.result), Status: uint8(out.status), Data8: uint8(out.data8), Data32: uint32(out.data32), Bytes: smcBytesFromC(out.bytes), }, int(result) } // SMCWriteKey wrapper for Apple IOKit SMCWriteKey func SMCWriteKey(connection uint, val *SMCVal) int { result := C.SMCWriteKey(C.uint(connection), &C.SMCVal_t{ key: val.Key.toC(), dataSize: C.uint(val.DataSize), dataType: val.DataType.toC(), bytes: val.Bytes.toC(), }) return int(result) } // SMCWriteKeyUnsafe wrapper for Apple IOKit SMCWriteKeyUnsafe func SMCWriteKeyUnsafe(connection uint, val *SMCVal) int { result := C.SMCWriteKeyUnsafe(C.uint(connection), &C.SMCVal_t{ key: val.Key.toC(), dataSize: C.uint(val.DataSize), dataType: val.DataType.toC(), bytes: val.Bytes.toC(), }) return int(result) } ================================================ FILE: gosmc/smc.c ================================================ /* * Apple System Management Control (SMC) Tool * Copyright (C) 2006 devnull * Copyright (C) 2026 Dinko Korunic * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ /* cc ./smc.c -o smcutil -framework IOKit -framework CoreFoundation -Wno-four-char-constants -Wall -g -arch arm64 -arch x86_64 */ #include #include #include #include #include #include "smc.h" // Cache SMC key info to reduce IOKit round-trips. // 2048 entries covers all keys on current and near-future Apple Silicon Macs // (M4/M5 report ~1800 keys). #define KEY_INFO_CACHE_SIZE 2048 typedef struct { UInt32 key; int negative; // 1 = negative cache entry (key absent/restricted), 0 = valid SMCKeyData_keyInfo_t keyInfo; // only meaningful when negative == 0 } SMCKeyInfoCacheEntry_t; // All cache globals are static — they are internal implementation details not // exported to other TUs. static SMCKeyInfoCacheEntry_t g_keyInfoCache[KEY_INFO_CACHE_SIZE]; static UInt32 g_keyInfoCacheCount = 0; static io_connect_t g_cachedConn = IO_OBJECT_NULL; static os_unfair_lock g_keyInfoSpinLock = OS_UNFAIR_LOCK_INIT; // smcPackKeyBytes packs a 4-character SMC key string into a big-endian UInt32. // size is clamped to [0, 4] to prevent shift UB (C99 §6.5.7: shifting ≥32 bits // is undefined). static UInt32 smcPackKeyBytes(const char *str, int size) { UInt32 total = 0; if (size < 0) size = 0; if (size > 4) size = 4; for (int i = 0; i < size; i++) total |= (UInt32)(unsigned char)str[i] << ((size - 1 - i) * 8); return total; } // smcUnpackKeyBytes converts a big-endian UInt32 key code back to a 4-character // null-terminated string. static void smcUnpackKeyBytes(char *str, UInt32 val) { snprintf(str, 5, "%c%c%c%c", (val >> 24) & 0xFF, (val >> 16) & 0xFF, (val >> 8) & 0xFF, val & 0xFF); } kern_return_t SMCOpen(const char *serviceName, io_connect_t *conn) { kern_return_t result; io_iterator_t iterator; io_object_t device; CFMutableDictionaryRef matchingDictionary = IOServiceMatching(serviceName); if (!matchingDictionary) return kIOReturnNoMemory; result = IOServiceGetMatchingServices(kIOMainPortDefault, matchingDictionary, &iterator); if (result != kIOReturnSuccess) return result; device = IOIteratorNext(iterator); IOObjectRelease(iterator); if (device == IO_OBJECT_NULL) return kIOReturnNoDevice; result = IOServiceOpen(device, mach_task_self(), 0, conn); IOObjectRelease(device); if (result != kIOReturnSuccess) return result; return result; } // SMCClose closes the IOKit connection and flushes the key-info cache if it was // built for this connection, preventing a future SMCOpen from reusing a stale // cache via Mach port recycling. kern_return_t SMCClose(io_connect_t conn) { os_unfair_lock_lock(&g_keyInfoSpinLock); if (g_cachedConn == conn) { g_keyInfoCacheCount = 0; g_cachedConn = IO_OBJECT_NULL; } os_unfair_lock_unlock(&g_keyInfoSpinLock); return IOServiceClose(conn); } kern_return_t SMCCall(io_connect_t conn, UInt32 index, const SMCKeyData_t *inputStructure, SMCKeyData_t *outputStructure) { const size_t structureInputSize = sizeof(SMCKeyData_t); size_t structureOutputSize = sizeof(SMCKeyData_t); kern_return_t result = IOConnectCallStructMethod(conn, index, inputStructure, structureInputSize, outputStructure, &structureOutputSize); if (result != kIOReturnSuccess) return result; // Guard against a truncated response: the driver must write at least enough // bytes to cover the SMC result code. A short write would leave // outputStructure.result at 0 (from the caller's memset), silently masking a // bad response from the driver. if (structureOutputSize < offsetof(SMCKeyData_t, result) + sizeof(UInt8)) return kIOReturnUnderrun; return kIOReturnSuccess; } // keyInfoCacheFind performs a binary search on the always-sorted cache using a // half-open interval [lo, hi) — safe for UInt32 indices since hi never // underflows when count is 0. Returns 1 on positive hit (valid keyInfo written // to *keyInfo when non-NULL), // -1 on negative hit (key is known to be absent/restricted — do not call // IOKit), // 0 on miss (key not yet seen). // Must be called with g_keyInfoSpinLock held. static int keyInfoCacheFind(UInt32 key, SMCKeyData_keyInfo_t *keyInfo) { UInt32 lo = 0, hi = g_keyInfoCacheCount; while (lo < hi) { UInt32 mid = lo + (hi - lo) / 2; if (g_keyInfoCache[mid].key == key) { if (g_keyInfoCache[mid].negative) return -1; if (keyInfo) *keyInfo = g_keyInfoCache[mid].keyInfo; return 1; } if (g_keyInfoCache[mid].key < key) lo = mid + 1; else hi = mid; } return 0; } // keyInfoCacheInsert inserts a new entry in sorted order via binary search + // memmove, keeping the array always sorted so binary-search lookups never need // a preceding sort step. // // Pass keyInfo=NULL to insert a negative cache entry (key known to be absent or // restricted). If the key already exists: // - positive entry: skipped (SMC key metadata is stable at runtime). // - negative entry + non-NULL keyInfo: upgraded in place to positive (key // became available). // - negative entry + NULL keyInfo: skipped (already negatively cached). // // When the cache is full, the key falls through to an IOKit round-trip on every // subsequent lookup. Must be called with g_keyInfoSpinLock held. static void keyInfoCacheInsert(UInt32 key, const SMCKeyData_keyInfo_t *keyInfo) { // Binary search for the insertion point (half-open interval [lo, hi)). UInt32 lo = 0, hi = g_keyInfoCacheCount; while (lo < hi) { UInt32 mid = lo + (hi - lo) / 2; if (g_keyInfoCache[mid].key < key) lo = mid + 1; else hi = mid; } // The binary search lands on the leftmost position where cache[lo].key >= // key. if (lo < g_keyInfoCacheCount && g_keyInfoCache[lo].key == key) { // Key exists in cache. Upgrade a negative entry to positive if we now have // valid data. This in-place upgrade does not require a free slot, so it // runs regardless of capacity. if (keyInfo != NULL && g_keyInfoCache[lo].negative) { g_keyInfoCache[lo].keyInfo = *keyInfo; g_keyInfoCache[lo].negative = 0; } return; } // Only genuinely new entries need a free slot. if (g_keyInfoCacheCount >= KEY_INFO_CACHE_SIZE) return; // Shift elements right to make room, then write at lo. memmove(&g_keyInfoCache[lo + 1], &g_keyInfoCache[lo], (size_t)(g_keyInfoCacheCount - lo) * sizeof(SMCKeyInfoCacheEntry_t)); g_keyInfoCache[lo].key = key; g_keyInfoCache[lo].negative = (keyInfo == NULL) ? 1 : 0; if (keyInfo != NULL) g_keyInfoCache[lo].keyInfo = *keyInfo; else memset(&g_keyInfoCache[lo].keyInfo, 0, sizeof(SMCKeyData_keyInfo_t)); ++g_keyInfoCacheCount; } // SMCGetKeyInfo returns key metadata, using a sorted cache to reduce IOKit // round-trips. The lock is held only for short cache operations; the blocking // SMCCall runs lock-free. If conn differs from the connection that populated // the cache, the cache is flushed to prevent stale key-info from a different // SMC service being served to the new connection. On re-insertion, the conn is // re-validated under lock: if another thread switched connections while SMCCall // was in progress, our result belongs to a different service and is discarded. // Negative results (key absent or restricted) are cached to avoid repeated // IOKit round-trips. static kern_return_t SMCGetKeyInfo(io_connect_t conn, UInt32 key, SMCKeyData_keyInfo_t *keyInfo) { SMCKeyData_t inputStructure; SMCKeyData_t outputStructure; kern_return_t result; // Fast path: binary-search the sorted cache under the lock (no blocking I/O). // Flush the cache when a different connection handle is presented. os_unfair_lock_lock(&g_keyInfoSpinLock); if (g_cachedConn != conn) { g_keyInfoCacheCount = 0; g_cachedConn = conn; } int found = keyInfoCacheFind(key, keyInfo); os_unfair_lock_unlock(&g_keyInfoSpinLock); if (found > 0) return kIOReturnSuccess; if (found < 0) return kIOReturnError; // negative cache: key is known absent/restricted // Cache miss: call SMCCall outside the lock — it is a blocking IOKit call and // must not be held across it (os_unfair_lock is not designed for blocking // sections). memset(&inputStructure, 0, sizeof(inputStructure)); memset(&outputStructure, 0, sizeof(outputStructure)); inputStructure.key = key; inputStructure.data8 = SMC_CMD_READ_KEYINFO; result = SMCCall(conn, KERNEL_INDEX_SMC, &inputStructure, &outputStructure); if (result != kIOReturnSuccess) return result; // Check the SMC-layer response code — distinct from the IOKit transport // status. Cache the negative result so subsequent lookups for this key skip // the IOKit round-trip. if (outputStructure.result != 0) { os_unfair_lock_lock(&g_keyInfoSpinLock); if (g_cachedConn == conn) keyInfoCacheInsert(key, NULL); os_unfair_lock_unlock(&g_keyInfoSpinLock); return kIOReturnError; } *keyInfo = outputStructure.keyInfo; // Re-acquire to insert into the sorted cache. keyInfoCacheInsert handles // duplicates internally, so no separate find is needed. Guard against conn // switching: if another thread changed g_cachedConn while we were in SMCCall, // our result is for the wrong service and must not be cached under the new // connection. os_unfair_lock_lock(&g_keyInfoSpinLock); if (g_cachedConn == conn) keyInfoCacheInsert(key, &outputStructure.keyInfo); os_unfair_lock_unlock(&g_keyInfoSpinLock); return kIOReturnSuccess; } kern_return_t SMCReadKey(io_connect_t conn, const UInt32Char_t key, SMCVal_t *val) { kern_return_t result; SMCKeyData_t inputStructure; SMCKeyData_t outputStructure; memset(&inputStructure, 0, sizeof(SMCKeyData_t)); memset(&outputStructure, 0, sizeof(SMCKeyData_t)); memset(val, 0, sizeof(SMCVal_t)); inputStructure.key = smcPackKeyBytes(key, 4); memcpy(val->key, key, sizeof(val->key)); result = SMCGetKeyInfo(conn, inputStructure.key, &outputStructure.keyInfo); if (result != kIOReturnSuccess) return result; val->dataSize = outputStructure.keyInfo.dataSize; smcUnpackKeyBytes(val->dataType, outputStructure.keyInfo.dataType); // Cap read size to the kernel SMC driver's hard per-read limit. // Requesting more than SMC_MAX_DATA_SIZE bytes returns kIOReturnBadArgument. UInt32 readSize = (val->dataSize > SMC_MAX_DATA_SIZE) ? SMC_MAX_DATA_SIZE : val->dataSize; inputStructure.keyInfo.dataSize = readSize; inputStructure.data8 = SMC_CMD_READ_BYTES; result = SMCCall(conn, KERNEL_INDEX_SMC, &inputStructure, &outputStructure); if (result != kIOReturnSuccess) return result; // Check the SMC-layer response code — a non-zero value means the read was // rejected by the SMC even though the IOKit transport call succeeded. if (outputStructure.result != 0) return kIOReturnError; memcpy(val->bytes, outputStructure.bytes, readSize); val->dataSize = readSize; return kIOReturnSuccess; } kern_return_t SMCWriteKey(io_connect_t conn, const SMCVal_t *val) { SMCVal_t readVal; kern_return_t result = SMCReadKey(conn, val->key, &readVal); if (result != kIOReturnSuccess) return result; if (readVal.dataSize != val->dataSize) return kIOReturnError; return SMCWriteKeyUnsafe(conn, val); } kern_return_t SMCWriteKeyUnsafe(io_connect_t conn, const SMCVal_t *val) { SMCKeyData_t inputStructure; SMCKeyData_t outputStructure; kern_return_t result; memset(&inputStructure, 0, sizeof(SMCKeyData_t)); memset(&outputStructure, 0, sizeof(SMCKeyData_t)); inputStructure.key = smcPackKeyBytes(val->key, 4); inputStructure.data8 = SMC_CMD_WRITE_BYTES; // Cap write size to SMC_MAX_DATA_SIZE to keep keyInfo.dataSize consistent // with the data actually present in the struct; the zeroed remainder is // ignored by the driver. UInt32 writeSize = (val->dataSize > SMC_MAX_DATA_SIZE) ? SMC_MAX_DATA_SIZE : val->dataSize; inputStructure.keyInfo.dataSize = writeSize; memcpy(inputStructure.bytes, val->bytes, writeSize); result = SMCCall(conn, KERNEL_INDEX_SMC, &inputStructure, &outputStructure); if (result != kIOReturnSuccess) return result; // Check the SMC-layer response code — a non-zero value means the write was // rejected by the SMC even though the IOKit transport call succeeded. return outputStructure.result != 0 ? kIOReturnError : kIOReturnSuccess; } ================================================ FILE: gosmc/smc.h ================================================ /* * Apple System Management Control (SMC) Tool * Copyright (C) 2006 devnull * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #ifndef __SMC_H__ #define __SMC_H__ #ifndef kIOMainPortDefault // kIOMainPortDefault was introduced in macOS 12; define it for older SDKs. #define kIOMainPortDefault MACH_PORT_NULL #endif #define VERSION "1.0" #define OP_NONE 0 #define OP_LIST 1 #define OP_READ 2 #define OP_READ_FAN 3 #define OP_WRITE 4 #define OP_BRUTEFORCE 5 #define KERNEL_INDEX_SMC 2 #define SMC_CMD_READ_BYTES 5 #define SMC_CMD_WRITE_BYTES 6 #define SMC_CMD_READ_INDEX 8 #define SMC_CMD_READ_KEYINFO 9 #define SMC_CMD_READ_PLIMIT 11 #define SMC_CMD_READ_VERS 12 #define SMC_TYPE_FPE2 "fpe2" #define SMC_TYPE_FP2E "fp2e" #define SMC_TYPE_FP4C "fp4c" #define SMC_TYPE_CH8 "ch8*" #define SMC_TYPE_SP78 "sp78" #define SMC_TYPE_SP4B "sp4b" #define SMC_TYPE_FP5B "fp5b" #define SMC_TYPE_FP88 "fp88" #define SMC_TYPE_UI8 "ui8" #define SMC_TYPE_UI16 "ui16" #define SMC_TYPE_UI32 "ui32" #define SMC_TYPE_SI8 "si8" #define SMC_TYPE_SI16 "si16" #define SMC_TYPE_SI32 "si32" #define SMC_TYPE_FLAG "flag" #define SMC_TYPE_FDS "{fds" #define SMC_TYPE_FLT "flt" #define SMC_TYPE_FPXX_SIZE 2 #define SMC_TYPE_SPXX_SIZE 2 #define SMC_TYPE_UI8_SIZE 1 #define SMC_TYPE_UI16_SIZE 2 #define SMC_TYPE_UI32_SIZE 4 #define SMC_TYPE_SI8_SIZE 1 #define SMC_TYPE_SI16_SIZE 2 #define SMC_TYPE_SI32_SIZE 4 #define SMC_TYPE_FLAG_SIZE 1 typedef struct { UInt8 major; UInt8 minor; UInt8 build; UInt8 reserved[1]; UInt16 release; } SMCKeyData_vers_t; typedef struct { UInt16 version; UInt16 length; UInt32 cpuPLimit; UInt32 gpuPLimit; UInt32 memPLimit; } SMCKeyData_pLimitData_t; typedef struct { UInt32 dataSize; UInt32 dataType; UInt8 dataAttributes; } SMCKeyData_keyInfo_t; // SMC_MAX_DATA_SIZE is the kernel SMC driver's hard per-read byte limit. // Requesting more bytes returns kIOReturnBadArgument regardless of buffer size. #define SMC_MAX_DATA_SIZE 32 typedef UInt8 SMCBytes_t[SMC_MAX_DATA_SIZE]; typedef struct { UInt32 key; SMCKeyData_vers_t vers; SMCKeyData_pLimitData_t pLimitData; SMCKeyData_keyInfo_t keyInfo; UInt8 result; UInt8 status; UInt8 data8; UInt32 data32; SMCBytes_t bytes; } SMCKeyData_t; typedef char UInt32Char_t[5]; typedef struct { UInt32Char_t key; UInt32 dataSize; UInt32Char_t dataType; SMCBytes_t bytes; } SMCVal_t; kern_return_t SMCOpen(const char *serviceName, io_connect_t *conn); kern_return_t SMCClose(io_connect_t conn); kern_return_t SMCCall(io_connect_t conn, UInt32 index, const SMCKeyData_t *inputStructure, SMCKeyData_t *outputStructure); kern_return_t SMCReadKey(io_connect_t conn, const UInt32Char_t key, SMCVal_t *val); kern_return_t SMCWriteKey(io_connect_t conn, const SMCVal_t *val); kern_return_t SMCWriteKeyUnsafe(io_connect_t conn, const SMCVal_t *val); #endif ================================================ FILE: gosmc/values.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only package gosmc // IOReturn values const ( IOReturnSuccess = 0x0 // OK IOReturnError = 0x2bc // general error IOReturnNoMemory = 0x2bd // can't allocate memory IOReturnNoResources = 0x2be // resource shortage IOReturnIPCError = 0x2bf // error during IPC IOReturnNoDevice = 0x2c0 // no such device IOReturnNotPrivileged = 0x2c1 // privilege violation IOReturnBadArgument = 0x2c2 // invalid argument IOReturnLockedRead = 0x2c3 // device read locked IOReturnLockedWrite = 0x2c4 // device write locked IOReturnExclusiveAccess = 0x2c5 // exclusive access and // device already open IOReturnBadMessageID = 0x2c6 // sent/received messages // had different msg_id IOReturnUnsupported = 0x2c7 // unsupported function IOReturnVMError = 0x2c8 // misc. VM failure IOReturnInternalError = 0x2c9 // internal error IOReturnIOError = 0x2ca // General I/O error IOReturnCannotLock = 0x2cc // can't acquire lock IOReturnNotOpen = 0x2cd // device not open IOReturnNotReadable = 0x2ce // read not supported IOReturnNotWritable = 0x2cf // write not supported IOReturnNotAligned = 0x2d0 // alignment error IOReturnBadMedia = 0x2d1 // Media Error IOReturnStillOpen = 0x2d2 // device(s) still open IOReturnRLDError = 0x2d3 // rld failure IOReturnDMAError = 0x2d4 // DMA failure IOReturnBusy = 0x2d5 // Device Busy IOReturnTimeout = 0x2d6 // I/O Timeout IOReturnOffline = 0x2d7 // device offline IOReturnNotReady = 0x2d8 // not ready IOReturnNotAttached = 0x2d9 // device not attached IOReturnNoChannels = 0x2da // no DMA channels left IOReturnNoSpace = 0x2db // no space for data IOReturnPortExists = 0x2dd // port already exists IOReturnCannotWire = 0x2de // can't wire down // physical memory IOReturnNoInterrupt = 0x2df // no interrupt attached IOReturnNoFrames = 0x2e0 // no DMA frames enqueued IOReturnMessageTooLarge = 0x2e1 // oversized msg received // on interrupt port IOReturnNotPermitted = 0x2e2 // not permitted IOReturnNoPower = 0x2e3 // no power to device IOReturnNoMedia = 0x2e4 // media not present IOReturnUnformattedMedia = 0x2e5 // media not formatted IOReturnUnsupportedMode = 0x2e6 // no such mode IOReturnUnderrun = 0x2e7 // data underrun IOReturnOverrun = 0x2e8 // data overrun IOReturnDeviceError = 0x2e9 // the device is not working properly! IOReturnNoCompletion = 0x2ea // a completion routine is required IOReturnAborted = 0x2eb // operation aborted IOReturnNoBandwidth = 0x2ec // bus bandwidth would be exceeded IOReturnNotResponding = 0x2ed // device not responding IOReturnIsoTooOld = 0x2ee // isochronous I/O request for distant past! IOReturnIsoTooNew = 0x2ef // isochronous I/O request for distant future IOReturnNotFound = 0x2f0 // data was not found IOReturnInvalid = 0x1 // should never be seen ) // OP Values const ( OPNone = iota OPList OPRead OPReadFan OPWrite OPBruteForce ) // Kernel values const ( KernelIndexSMC = 2 ) // SMC CMD values const ( CMDReadBytes = 5 CMDWriteBytes = 6 CMDReadIndex = 8 CMDReadKeyinfo = 9 CMDReadPlimit = 11 CMDReadVers = 12 ) // SMC Type values const ( TypeFPE2 = "fpe2" TypeFP2E = "fp2e" TypeFP4C = "fp4c" TypeCH8 = "ch8*" TypeSP78 = "sp78" TypeSP4B = "sp4b" TypeFP5B = "fp5b" TypeFP88 = "fp88" TypeUI8 = "ui8" TypeUI16 = "ui16" TypeUI32 = "ui32" TypeSI8 = "si8" TypeSI16 = "si16" TypeSI32 = "si32" TypeFLAG = "flag" TypeFDS = "{fds" TypeFLT = "flt" ) // SMC Size values const ( TypeFPXXSize = 2 TypeSPXXSize = 2 TypeUI8Size = 1 TypeUI16Size = 2 TypeUI32Size = 4 TypeSI8Size = 1 TypeSI16Size = 2 TypeSI32Size = 4 TypeFLAGSize = 1 ) ================================================ FILE: hid/get.go ================================================ // Copyright (C) 2022 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package hid /* #cgo CFLAGS: -x objective-c #cgo LDFLAGS: -framework Foundation -framework IOKit #import #import #include typedef struct __IOHIDEvent *IOHIDEventRef; typedef struct __IOHIDServiceClient *IOHIDServiceClientRef; typedef double IOHIDFloat; IOHIDEventSystemClientRef IOHIDEventSystemClientCreate(CFAllocatorRef allocator); int IOHIDEventSystemClientSetMatching(IOHIDEventSystemClientRef client, CFDictionaryRef match); IOHIDEventRef IOHIDServiceClientCopyEvent(IOHIDServiceClientRef, int64_t, int32_t, int64_t); CFStringRef IOHIDServiceClientCopyProperty(IOHIDServiceClientRef service, CFStringRef property); IOHIDFloat IOHIDEventGetFloatValue(IOHIDEventRef event, int32_t field); #define IOHIDEventFieldBase(type) (type << 16) #define kIOHIDEventTypeTemperature 15 #define kIOHIDEventTypePower 25 NSDictionary *matching(int page, int usage) { NSDictionary *dict = @{ @"PrimaryUsagePage" : [NSNumber numberWithInt:page], @"PrimaryUsage" : [NSNumber numberWithInt:usage], }; return dict; } // getNamesFromServices extracts the "Product" property from each service in srvRef. // The caller is responsible for releasing the returned NSArray. static NSArray *getNamesFromServices(CFArrayRef srvRef) { NSArray *srvs = (__bridge NSArray *)srvRef; long count = [srvs count]; NSMutableArray *array = [[NSMutableArray alloc] init]; for (int i = 0; i < count; i++) { IOHIDServiceClientRef sc = (IOHIDServiceClientRef)srvs[i]; NSString *name = (NSString *)IOHIDServiceClientCopyProperty(sc, (__bridge CFStringRef)@"Product"); if (name) { [array addObject:name]; [name release]; } else { [array addObject:@"noname"]; } } return array; } // getPowerValuesFromServices reads the power event float value from each service in srvRef. // The caller is responsible for releasing the returned NSArray. static NSArray *getPowerValuesFromServices(CFArrayRef srvRef) { NSArray *srvs = (__bridge NSArray *)srvRef; long count = [srvs count]; NSMutableArray *array = [[NSMutableArray alloc] init]; for (int i = 0; i < count; i++) { IOHIDServiceClientRef sc = (IOHIDServiceClientRef)srvs[i]; IOHIDEventRef event = IOHIDServiceClientCopyEvent(sc, kIOHIDEventTypePower, 0, 0); double temp = 0.0; if (event != 0) { temp = IOHIDEventGetFloatValue(event, IOHIDEventFieldBase(kIOHIDEventTypePower)) / 1000.0; CFRelease(event); } [array addObject:[NSNumber numberWithDouble:temp]]; } return array; } // getThermalValuesFromServices reads the temperature event float value from each service in srvRef. // The caller is responsible for releasing the returned NSArray. static NSArray *getThermalValuesFromServices(CFArrayRef srvRef) { NSArray *srvs = (__bridge NSArray *)srvRef; long count = [srvs count]; NSMutableArray *array = [[NSMutableArray alloc] init]; for (int i = 0; i < count; i++) { IOHIDServiceClientRef sc = (IOHIDServiceClientRef)srvs[i]; IOHIDEventRef event = IOHIDServiceClientCopyEvent(sc, kIOHIDEventTypeTemperature, 0, 0); double temp = 0.0; if (event != 0) { temp = IOHIDEventGetFloatValue(event, IOHIDEventFieldBase(kIOHIDEventTypeTemperature)); CFRelease(event); } [array addObject:[NSNumber numberWithDouble:temp]]; } return array; } static NSString *dumpNamesValues(NSArray *kvsN, NSArray *kvsV) { NSMutableString *valueString = [[NSMutableString alloc] init]; int count = (int)MIN([kvsN count], [kvsV count]); for (int i = 0; i < count; i++) { @autoreleasepool { NSString *name = kvsN[i]; double value = [kvsV[i] doubleValue]; if (value <= 0.0) continue; NSString *output = [NSString stringWithFormat:@"%s:%lf\n", [name UTF8String], value]; [valueString appendString:output]; } } return valueString; } // Above 130 °C (junction limit) the tdev reading must be raw sp78, not converted °C. #define kSP78RawThreshold 130.0 // dumpThermalNamesValues formats thermal sensor names and values, applying sp78 conversion // for specific HID thermal sensors that use the sp78 fixed-point format (e.g., PMU tdev sensors) static NSString *dumpThermalNamesValues(NSArray *kvsN, NSArray *kvsV) { NSMutableString *valueString = [[NSMutableString alloc] init]; int count = (int)MIN([kvsN count], [kvsV count]); for (int i = 0; i < count; i++) { @autoreleasepool { NSString *name = kvsN[i]; double value = [kvsV[i] doubleValue]; if (value <= 0.0) continue; // PMU tdevN sensors encode values as sp78; convert when raw. NSRange range = [name rangeOfString:@"tdev"]; if (range.location != NSNotFound) { if (range.location + 4 < [name length]) { unichar nextChar = [name characterAtIndex:range.location + 4]; if (value > kSP78RawThreshold && nextChar >= '1' && nextChar <= '9') { value = value / 256.0; } } } NSString *output = [NSString stringWithFormat:@"%s:%lf\n", [name UTF8String], value]; [valueString appendString:output]; } } return valueString; } // queryHIDPowerSensors queries IOHIDEventSystem for power sensors matching the given // HID page and usage, returning a "name:value\n" formatted string. The caller must free it. static char *queryHIDPowerSensors(int page, int usage) { char *finalStr = strdup(""); @autoreleasepool { IOHIDEventSystemClientRef system = IOHIDEventSystemClientCreate(kCFAllocatorDefault); if (system) { NSDictionary *sensors = matching(page, usage); IOHIDEventSystemClientSetMatching(system, (__bridge CFDictionaryRef)sensors); CFArrayRef srvRef = IOHIDEventSystemClientCopyServices(system); if (srvRef) { NSArray *names = getNamesFromServices(srvRef); NSArray *values = getPowerValuesFromServices(srvRef); NSString *result = dumpNamesValues(names, values); CFRelease(srvRef); const char *utf8 = result ? [result UTF8String] : ""; free(finalStr); finalStr = strdup(utf8 ? utf8 : ""); CFRelease(names); CFRelease(values); CFRelease(result); } CFRelease(system); } } return finalStr; } char *getCurrents() { return queryHIDPowerSensors(0xff08, 2); } char *getVoltages() { return queryHIDPowerSensors(0xff08, 3); } char *getThermals() { char *finalStr = strdup(""); @autoreleasepool { IOHIDEventSystemClientRef system = IOHIDEventSystemClientCreate(kCFAllocatorDefault); if (system) { NSDictionary *sensors = matching(0xff00, 5); IOHIDEventSystemClientSetMatching(system, (__bridge CFDictionaryRef)sensors); CFArrayRef srvRef = IOHIDEventSystemClientCopyServices(system); if (srvRef) { NSArray *names = getNamesFromServices(srvRef); NSArray *values = getThermalValuesFromServices(srvRef); NSString *result = dumpThermalNamesValues(names, values); CFRelease(srvRef); const char *utf8 = result ? [result UTF8String] : ""; free(finalStr); finalStr = strdup(utf8 ? utf8 : ""); CFRelease(names); CFRelease(values); CFRelease(result); } CFRelease(system); } } return finalStr; } // HIDSensorData holds strdup'd C strings for all three sensor types. The caller // must free each non-NULL field. typedef struct { char *currents; char *voltages; char *thermals; } HIDSensorData; // getAllHIDSensors opens a single HID event system client, queries all three // sensor types by updating the matching criteria between queries, and returns // their formatted output strings. Each field is always a valid strdup'd string // (never NULL) that the caller must free. HIDSensorData getAllHIDSensors(void) { HIDSensorData result = { strdup(""), strdup(""), strdup("") }; @autoreleasepool { IOHIDEventSystemClientRef system = IOHIDEventSystemClientCreate(kCFAllocatorDefault); if (system) { // Currents (page 0xff08, usage 2) { NSDictionary *sensors = matching(0xff08, 2); IOHIDEventSystemClientSetMatching(system, (__bridge CFDictionaryRef)sensors); CFArrayRef srvRef = IOHIDEventSystemClientCopyServices(system); if (srvRef) { NSArray *names = getNamesFromServices(srvRef); NSArray *values = getPowerValuesFromServices(srvRef); NSString *str = dumpNamesValues(names, values); const char *utf8 = str ? [str UTF8String] : ""; free(result.currents); result.currents = strdup(utf8 ? utf8 : ""); CFRelease(names); CFRelease(values); CFRelease(str); CFRelease(srvRef); } } // Voltages (page 0xff08, usage 3) { NSDictionary *sensors = matching(0xff08, 3); IOHIDEventSystemClientSetMatching(system, (__bridge CFDictionaryRef)sensors); CFArrayRef srvRef = IOHIDEventSystemClientCopyServices(system); if (srvRef) { NSArray *names = getNamesFromServices(srvRef); NSArray *values = getPowerValuesFromServices(srvRef); NSString *str = dumpNamesValues(names, values); const char *utf8 = str ? [str UTF8String] : ""; free(result.voltages); result.voltages = strdup(utf8 ? utf8 : ""); CFRelease(names); CFRelease(values); CFRelease(str); CFRelease(srvRef); } } // Thermals (page 0xff00, usage 5) { NSDictionary *sensors = matching(0xff00, 5); IOHIDEventSystemClientSetMatching(system, (__bridge CFDictionaryRef)sensors); CFArrayRef srvRef = IOHIDEventSystemClientCopyServices(system); if (srvRef) { NSArray *names = getNamesFromServices(srvRef); NSArray *values = getThermalValuesFromServices(srvRef); NSString *str = dumpThermalNamesValues(names, values); const char *utf8 = str ? [str UTF8String] : ""; free(result.thermals); result.thermals = strdup(utf8 ? utf8 : ""); CFRelease(names); CFRelease(values); CFRelease(str); CFRelease(srvRef); } } CFRelease(system); } } return result; } */ import "C" import ( "unsafe" ) // GetAll returns all detected HID sensor results using a single HID client session. func GetAll() map[string]any { data := C.getAllHIDSensors() sensors := make(map[string]any) sensors["Current"] = hidGet(data.currents, "A") sensors["Temperature"] = hidGet(data.thermals, "°C") sensors["Voltage"] = hidGet(data.voltages, "V") return sensors } // hidGet converts a C string returned by an HID sensor function into a sensor map, // freeing the C string before returning. Returns an empty map when cStr is nil. func hidGet(cStr *C.char, unit string) map[string]any { if cStr == nil { return map[string]any{} } defer C.free(unsafe.Pointer(cStr)) //nolint:wsl,nlreturn return getGeneric(unit, cStr) } // GetCurrent returns detected HID current sensor results. func GetCurrent() map[string]any { return hidGet(C.getCurrents(), "A") } // GetVoltage returns detected HID voltage sensor results. func GetVoltage() map[string]any { return hidGet(C.getVoltages(), "V") } // GetTemperature returns detected HID temperature sensor results. func GetTemperature() map[string]any { return hidGet(C.getThermals(), "°C") } ================================================ FILE: hid/hid.go ================================================ // Copyright (C) 2022 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package hid import "C" import ( "bufio" "fmt" "strconv" "strings" ) const ( SensorSeparator = ":" SensorType = "hid" ) // getGeneric returns a map of HID sensor stats. func getGeneric(unit string, cStr *C.char) map[string]any { goStr := C.GoString(cStr) generic := make(map[string]any) scanner := bufio.NewScanner(strings.NewReader(goStr)) for scanner.Scan() { split := strings.SplitN(scanner.Text(), SensorSeparator, 2) if len(split) != 2 { continue } val, err := strconv.ParseFloat(split[1], 32) if err != nil { continue } // Match smc.isValidReading near-zero threshold. if val < 0.005 { continue } name := split[0] key := "" if i := strings.LastIndexByte(name, ' '); i >= 0 { key = name[i+1:] } generic[name] = map[string]any{ "key": key, "value": fmt.Sprintf("%g %s", float32(val), unit), "type": SensorType, } } return generic } ================================================ FILE: main.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package main import ( "github.com/dkorunic/iSMC/cmd" ) // main initializes Cobra. func main() { cmd.Execute() } ================================================ FILE: output/influxoutput.go ================================================ // Copyright (C) 2023 Seaburr // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "fmt" "io" "os" "strings" "time" ) type InfluxOutput struct { writer io.Writer } // NewInfluxOutput returns an InfluxOutput that writes to stdout. func NewInfluxOutput() Output { o := InfluxOutput{} o.writer = io.Writer(os.Stdout) return o } func (io InfluxOutput) All() { all := GetAll() for _, key := range sortedKeys(all) { value := all[key] if smcdata, ok := value.(map[string]any); ok { io.print(key, smcdata) } } } func (io InfluxOutput) Battery() { io.print("Battery", GetBattery()) } func (io InfluxOutput) Current() { io.print("Current", GetCurrent()) } func (io InfluxOutput) Fans() { io.print("Fans", GetFans()) } func (io InfluxOutput) Hardware() { io.print("Hardware", GetHardware()) } func (io InfluxOutput) Power() { io.print("Power", GetPower()) } func (io InfluxOutput) Temperature() { io.print("Temperature", GetTemperature()) } func (io InfluxOutput) Voltage() { io.print("Voltage", GetVoltage()) } // influxStringConvert returns s converted to lowercase with spaces replaced by underscores, // suitable for use as an InfluxDB measurement or tag value. func influxStringConvert(s string) string { s = strings.ReplaceAll(s, " ", "_") s = strings.ToLower(s) return s } // influxEscape backslash-escapes Influx line-protocol specials (comma, equals, space). // Guards against future sensor descriptions sneaking in delimiters. func influxEscape(s string) string { if !strings.ContainsAny(s, ",= ") { return s } var b strings.Builder b.Grow(len(s) + 4) for i := 0; i < len(s); i++ { c := s[i] if c == ',' || c == '=' || c == ' ' { b.WriteByte('\\') } b.WriteByte(c) } return b.String() } // influxGetValue returns the numeric part of a "value unit" formatted sensor string. func influxGetValue(s string) string { val, _, _ := strings.Cut(s, " ") return val } // influxGetUnit returns the unit portion of a "value= " sensor string, // stripped of any degree symbol and lowercased. Returns "none" when no unit is present. func influxGetUnit(s string) string { s = strings.TrimPrefix(s, "value=") _, unit, found := strings.Cut(s, " ") if !found { return "none" } unit = strings.ReplaceAll(unit, "°", "") return strings.ToLower(unit) } // print writes smcdata to stdout in InfluxDB line protocol format, tagged with the sensor type name. // It is a no-op when smcdata is empty. func (io InfluxOutput) print(name string, smcdata map[string]any) { if len(smcdata) != 0 { ct := time.Now().UnixNano() for _, k := range sortedKeys(smcdata) { v := smcdata[k] if sensorMap, ok := v.(map[string]any); ok { // Escape only the user value, not the "=" separator. var key string if keyStr, ok := sensorMap["key"].(string); ok && keyStr != "" { key = ",key=" + influxEscape(influxStringConvert(keyStr)) } value := fmt.Sprintf("value=%v", sensorMap["value"]) unit := influxGetUnit(value) fmt.Fprintf(io.writer, "%v,sensortype=%s,unit=%s%s %s %d\n", influxEscape(influxStringConvert(k)), influxEscape(influxStringConvert(name)), influxEscape(unit), key, influxGetValue(value), ct) } } } } ================================================ FILE: output/influxoutput_test.go ================================================ // Copyright (C) 2023 Seaburr // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "bytes" "io" "strings" "testing" "github.com/stretchr/testify/assert" ) // stripTimestamp removes the trailing nanosecond timestamp from an InfluxDB line // protocol line, leaving only the measurement+tags and field set portions. func stripTimestamp(line string) string { line = strings.TrimRight(line, "\n") idx := strings.LastIndex(line, " ") if idx < 0 { return line } return line[:idx] } func Test_influxStringConvert(t *testing.T) { tests := []struct { name string input string expected string }{ {"spaces to underscores", "CPU Temperature", "cpu_temperature"}, {"already lowercase", "fan", "fan"}, {"uppercase", "BATTERY", "battery"}, {"multiple spaces", "GPU Core 1", "gpu_core_1"}, {"empty", "", ""}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { assert.Equal(t, tt.expected, influxStringConvert(tt.input)) }) } } func Test_influxGetValue(t *testing.T) { tests := []struct { name string input string expected string }{ {"value with unit", "25.5 °C", "25.5"}, {"value only", "42", "42"}, {"value=prefix form", "value=25.5 °C", "value=25.5"}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { assert.Equal(t, tt.expected, influxGetValue(tt.input)) }) } } func Test_influxGetUnit(t *testing.T) { tests := []struct { name string input string expected string }{ {"temperature unit", "value=25.5 °C", "c"}, {"ampere unit", "value=1.2 A", "a"}, {"volt unit", "value=5.0 V", "v"}, {"no unit", "value=42", "none"}, {"degree stripped", "value=30.0 °C", "c"}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { assert.Equal(t, tt.expected, influxGetUnit(tt.input)) }) } } func TestInfluxOutput_methods(t *testing.T) { sensor := map[string]any{ "sensor": map[string]any{ "key": "TC0H", "value": "25.000000 °C", "type": "sp78", }, } tests := []struct { name string monkeyPatch func() method func(io InfluxOutput) wantPrefix string }{ { "Battery", func() { GetBattery = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Battery() }, "sensor,sensortype=battery,unit=c,key=tc0h value=25.000000", }, { "Current", func() { GetCurrent = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Current() }, "sensor,sensortype=current,unit=c,key=tc0h value=25.000000", }, { "Fans", func() { GetFans = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Fans() }, "sensor,sensortype=fans,unit=c,key=tc0h value=25.000000", }, { "Power", func() { GetPower = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Power() }, "sensor,sensortype=power,unit=c,key=tc0h value=25.000000", }, { "Temperature", func() { GetTemperature = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Temperature() }, "sensor,sensortype=temperature,unit=c,key=tc0h value=25.000000", }, { "Voltage", func() { GetVoltage = func() map[string]any { return sensor } }, func(io InfluxOutput) { io.Voltage() }, "sensor,sensortype=voltage,unit=c,key=tc0h value=25.000000", }, } for _, tt := range tests { var out bytes.Buffer t.Run(tt.name, func(t *testing.T) { tt.monkeyPatch() o := InfluxOutput{writer: io.Writer(&out)} tt.method(o) line := stripTimestamp(out.String()) assert.Equal(t, tt.wantPrefix, line) }) } } func TestInfluxOutput_All(t *testing.T) { var out bytes.Buffer GetAll = func() map[string]any { return map[string]any{ "Temperature": map[string]any{ "CPU": map[string]any{ "key": "TC0H", "value": "50.000000 °C", "type": "sp78", }, }, } } o := InfluxOutput{writer: io.Writer(&out)} o.All() line := stripTimestamp(out.String()) assert.Equal(t, "cpu,sensortype=temperature,unit=c,key=tc0h value=50.000000", line) } // TestInfluxOutput_emptyKey verifies TC-18: sensors whose "key" field is an empty // string must not emit a ",key=" fragment in the InfluxDB line protocol tag set. // A malformed ",key=" tag is invalid InfluxDB syntax and would be rejected at ingest. func TestInfluxOutput_emptyKey(t *testing.T) { var out bytes.Buffer GetTemperature = func() map[string]any { return map[string]any{ "CPU Temperature": map[string]any{ "key": "", "value": "50.000000 °C", "type": "hid", }, } } o := InfluxOutput{writer: io.Writer(&out)} o.Temperature() line := out.String() assert.NotContains(t, line, ",key=", "empty sensor key must not produce a ,key= fragment in InfluxDB output") assert.Contains(t, line, "cpu_temperature,sensortype=temperature", "measurement and sensortype tag must still be present") } // TestInfluxOutput_unitExtraction verifies TC-16: the unit tag must contain the // unit symbol (e.g. "c" for Celsius), NOT the numeric value. The bug under test // uses Split(...)[0] instead of [1], producing unit=50.000000 instead of unit=c. func TestInfluxOutput_unitExtraction(t *testing.T) { var out bytes.Buffer GetTemperature = func() map[string]any { return map[string]any{ "CPU Temp": map[string]any{ "key": "TC0H", "value": "50.000000 °C", "type": "sp78", }, } } o := InfluxOutput{writer: io.Writer(&out)} o.Temperature() line := out.String() assert.Contains(t, line, "unit=c", "unit tag must be the unit symbol 'c', not the numeric value") assert.NotContains(t, line, "unit=50", "unit tag must NOT contain the numeric sensor value") } func TestInfluxOutput_empty(t *testing.T) { var out bytes.Buffer GetBattery = func() map[string]any { return map[string]any{} } o := InfluxOutput{writer: io.Writer(&out)} o.Battery() assert.Empty(t, out.String(), "empty sensor map should produce no output") } ================================================ FILE: output/jsonoutput.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "encoding/json" "errors" "fmt" "io" "os" "strconv" "strings" ) type JSONOutput struct { writer io.Writer } // NewJSONOutput returns a JSONOutput that writes to stdout. func NewJSONOutput() Output { o := JSONOutput{} o.writer = io.Writer(os.Stdout) return o } type newstruct struct { Key string `json:"key"` Type string `json:"type"` Value any `json:"value"` Quantity any `json:"quantity"` Unit string `json:"unit"` } // format parses "value unit" entries into separate Quantity/Unit fields. // Errors only if d is not a map. Unparseable entries are skipped, not fatal. // Mutates the input map; callers must not pass shared or cached maps. func format(d any) (any, error) { v, ok := d.(map[string]any) if !ok { return v, errors.New("not a map") } for key, entry := range v { sensorMap, ok := entry.(map[string]any) if !ok { continue } valStr, ok := sensorMap["value"].(string) if !ok || !strings.Contains(valStr, " ") { continue } smcKey, _ := sensorMap["key"].(string) typ, _ := sensorMap["type"].(string) buf := newstruct{ Key: smcKey, Type: typ, Value: valStr, } if isFloatType(typ) { numStr, unit, _ := strings.Cut(valStr, " ") f, err := strconv.ParseFloat(numStr, 64) if err != nil { continue } buf.Quantity = f buf.Unit = unit } v[key] = buf } return v, nil } func (jo JSONOutput) All() { data := GetAll() for key, d := range data { enriched, err := format(d) if err != nil { fmt.Fprintf(os.Stderr, "could not format data: %v\n", err) return } data[key] = enriched } out, err := json.Marshal(data) if err != nil { fmt.Fprintf(jo.writer, "could not marshal data: %v\n", err) return } fmt.Fprintln(jo.writer, string(out)) } func (jo JSONOutput) Battery() { jo.print(GetBattery()) } func (jo JSONOutput) Current() { jo.print(GetCurrent()) } func (jo JSONOutput) Fans() { jo.print(GetFans()) } func (jo JSONOutput) Hardware() { jo.print(GetHardware()) } func (jo JSONOutput) Power() { jo.print(GetPower()) } func (jo JSONOutput) Temperature() { jo.print(GetTemperature()) } func (jo JSONOutput) Voltage() { jo.print(GetVoltage()) } // print formats v via format and writes the resulting JSON to the writer. // Formatting and marshaling errors are reported to stderr; the writer receives no output on error. func (jo JSONOutput) print(v any) { data, err := format(v) if err != nil { fmt.Fprintf(os.Stderr, "could not format data: %v\n", err) return } out, err := json.Marshal(data) if err != nil { fmt.Fprintf(os.Stderr, "could not marshal data: %v\n", err) return } fmt.Fprintln(jo.writer, string(out)) } ================================================ FILE: output/jsonoutput_test.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "bytes" "encoding/json" "io" "testing" "github.com/stretchr/testify/assert" ) // Test_format_sp78 verifies TC-19: sensors of type "sp78" must be enriched with // numeric "quantity" and string "unit" fields by the format function. If "sp78" were // absent from the switch-case list, those fields would be silently omitted. func Test_format_sp78(t *testing.T) { input := map[string]any{ "CPU Temp": map[string]any{ "key": "TC0H", "value": "25.5 °C", "type": "sp78", }, } result, err := format(input) assert.NoError(t, err) resultMap, ok := result.(map[string]any) assert.True(t, ok) // JSON-round-trip the entry to get a plain map for field inspection raw, _ := json.Marshal(resultMap["CPU Temp"]) var entry map[string]any assert.NoError(t, json.Unmarshal(raw, &entry)) assert.Equal(t, 25.5, entry["quantity"], "sp78 sensor must have a numeric 'quantity' field after format()") assert.Equal(t, "°C", entry["unit"], "sp78 sensor must have a 'unit' field after format()") } // Test_format_nonStringValue verifies TC-21: sensors whose "value" field is not a // string (e.g. bool for flag/battery sensors, uint32 for counts) must not cause // format() to return an error. The default branch must skip such entries silently. func Test_format_nonStringValue(t *testing.T) { tests := []struct { name string value any typ string }{ {"bool flag", true, "flag"}, {"uint battery count", uint32(1), "ui8"}, {"int zero", 0, "ui8"}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { input := map[string]any{ "Battery Power": map[string]any{ "key": "BATP", "value": tt.value, "type": tt.typ, }, } _, err := format(input) assert.NoError(t, err, "format() must not fail for non-string value type %T", tt.value) }) } } func TestJSONOutput(t *testing.T) { tests := []struct { name string monkeyPatch func() method func(jo JSONOutput) expected string }{ { "All sensors", func() { GetAll = func() map[string]any { return map[string]any{ "sensor-1": map[string]any{ "key": "key", "value": "string", "type": "type", }, "sensor-2": map[string]any{ "key": "key", "value": true, "type": "type", }, "sensor-3": map[string]any{ "key": "key", "value": 99, "type": "type", }, } } }, func(jo JSONOutput) { jo.All() }, `{"sensor-1":{"key":"key","value":"string","type":"type"},"sensor-2":{"key":"key","value":true,"type":"type"},"sensor-3":{"key":"key","value":99,"type":"type"}}`, }, { "Battery sensor", func() { GetBattery = func() map[string]any { return getMapForSensor("battery") } }, func(jo JSONOutput) { jo.Battery() }, `{"battery":{"key":"key","value":"value","type":"type"}}`, }, { "Current sensor", func() { GetCurrent = func() map[string]any { return getMapForSensor("current") } }, func(jo JSONOutput) { jo.Current() }, `{"current":{"key":"key","value":"value","type":"type"}}`, }, { "Fans sensor", func() { GetFans = func() map[string]any { return getMapForSensor("fans") } }, func(jo JSONOutput) { jo.Fans() }, `{"fans":{"key":"key","value":"value","type":"type"}}`, }, { "Power sensor", func() { GetPower = func() map[string]any { return getMapForSensor("power") } }, func(jo JSONOutput) { jo.Power() }, `{"power":{"key":"key","value":"value","type":"type"}}`, }, { "Temperature sensor", func() { GetTemperature = func() map[string]any { return getMapForSensor("temperature") } }, func(jo JSONOutput) { jo.Temperature() }, `{"temperature":{"key":"key","value":"value","type":"type"}}`, }, { "Voltage sensor", func() { GetVoltage = func() map[string]any { return getMapForSensor("voltage") } }, func(jo JSONOutput) { jo.Voltage() }, `{"voltage":{"key":"key","value":"value","type":"type"}}`, }, } for _, tt := range tests { var out bytes.Buffer t.Run(tt.name, func(t *testing.T) { tt.monkeyPatch() jo := JSONOutput{writer: io.Writer(&out)} tt.method(jo) actual := out.String() assert.JSONEq(t, tt.expected, actual) }) } } ================================================ FILE: output/output.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "fmt" "sort" "strconv" "github.com/dkorunic/iSMC/hid" "github.com/dkorunic/iSMC/platform" "github.com/dkorunic/iSMC/smc" "github.com/fvbommel/sortorder" ) // Monkey-patching hooks for tests. Tests mutate these; never call t.Parallel() in output tests. var ( GetAll = getAll GetTemperature = getTemperature GetFans = getFans GetBattery = getBattery GetPower = getPower GetVoltage = getVoltage GetCurrent = getCurrent GetHardware = getHardware ) type Output interface { // All prints all the detected sensors results All() // Battery prints the detected battery sensor results Battery() // Current prints the current sensor results Current() // Fans prints the detected fan sensor results Fans() // Hardware prints the detected hardware information Hardware() // Temperature prints detected temperature sensor results Temperature() // Power prints detected power sensor results Power() // Voltage prints detected voltage sensor results Voltage() } // getAll returns all sensor data by merging SMC and HID results. func getAll() map[string]any { return merge(smc.GetAll(), hid.GetAll()) } // getBattery returns battery sensor data from SMC. func getBattery() map[string]any { return smc.GetBattery() } // getCurrent returns current sensor data merged from SMC and HID sources. func getCurrent() map[string]any { return merge(smc.GetCurrent(), hid.GetCurrent()) } // getFans returns fan sensor data from SMC. func getFans() map[string]any { return smc.GetFans() } // getTemperature returns temperature sensor data merged from SMC and HID sources. func getTemperature() map[string]any { return merge(smc.GetTemperature(), hid.GetTemperature()) } // getPower returns power sensor data from SMC. func getPower() map[string]any { return smc.GetPower() } // getVoltage returns voltage sensor data merged from SMC and HID sources. func getVoltage() map[string]any { return merge(smc.GetVoltage(), hid.GetVoltage()) } // sortedKeys returns the keys of m sorted in natural order. func sortedKeys(m map[string]any) []string { keys := make([]string, 0, len(m)) for k := range m { keys = append(keys, k) } sort.Sort(sortorder.Natural(keys)) return keys } // getHardware returns hardware information gathered from platform detection and sysctls, // including model name, CPU family, CPU model, year, and per-cluster core counts. func getHardware() map[string]any { result := make(map[string]any) modelID := platform.GetModelID() if modelID != "" { result["Model Identifier"] = map[string]any{ "key": "hw.model", "value": modelID, "type": "sysctl", } } product, ok := platform.GetProduct() if ok { result["Mac Model"] = map[string]any{ "key": "hw.model", "value": product.Name, "type": "platform", } result["Platform Family"] = map[string]any{ "key": "hw.family", "value": product.Family, "type": "platform", } result["CPU"] = map[string]any{ "key": "hw.cpu", "value": product.CPU, "type": "platform", } result["Year"] = map[string]any{ "key": "hw.year", "value": strconv.Itoa(product.Year), "type": "platform", } } totalPhysical, totalLogical := platform.GetTotalCPU() if totalPhysical > 0 { result["CPU Physical Cores"] = map[string]any{ "key": "hw.physicalcpu", "value": strconv.Itoa(totalPhysical), "type": "sysctl", } } if totalLogical > 0 { result["CPU Logical Cores"] = map[string]any{ "key": "hw.logicalcpu", "value": strconv.Itoa(totalLogical), "type": "sysctl", } } for i, level := range platform.GetPerfLevels() { result[fmt.Sprintf("%s CPU Cores", level.Name)] = map[string]any{ "key": fmt.Sprintf("hw.perflevel%d.physicalcpu", i), "value": strconv.Itoa(level.PhysicalCPU), "type": "sysctl", } } return result } // deepCopy recursively clones nested maps; preserves Go types (no float64 narrowing). func deepCopy(dest, src map[string]any) { for k, v := range src { if vm, ok := v.(map[string]any); ok { inner := make(map[string]any, len(vm)) deepCopy(inner, vm) dest[k] = inner } else { dest[k] = v } } } // isFloatType reports whether typ has a "quantity unit" string form that format() should split. func isFloatType(typ string) bool { switch typ { case "flt", "ioft", hid.SensorType: return true } _, ok := smc.AppleFPConv[typ] return ok } // merge returns a new map containing entries from a and b; b wins on conflicts. // TODO: replace with a utility-package variant. func merge(a, b map[string]any) map[string]any { out := make(map[string]any) deepCopy(out, a) for k, bVal := range b { if bMap, ok := bVal.(map[string]any); ok { if outVal, ok := out[k]; ok { if outMap, ok := outVal.(map[string]any); ok { out[k] = merge(outMap, bMap) continue } } } out[k] = bVal } return out } ================================================ FILE: output/output_test.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "encoding/json" "reflect" "testing" "github.com/stretchr/testify/assert" ) func Test_deepCopy(t *testing.T) { type args struct { dest map[string]any src map[string]any } tests := []struct { name string args args expected string }{ { "Verify dest", args{ dest: map[string]any{ "key-1": "value-1", }, src: map[string]any{ "key-2": map[string]any{ "key-2-1": "value-2-1", }, "key-3": map[string]any{ "key-3-1": map[string]any{ "key-3-1-1": "value-3-1-1", }, }, }, }, `{"key-1":"value-1","key-2":{"key-2-1":"value-2-1"},"key-3":{"key-3-1":{"key-3-1-1":"value-3-1-1"}}}`, }, { "Verify empty dest", args{ dest: map[string]any{}, src: map[string]any{ "key-1": "value-1", "key-2": map[string]any{ "key-2-1": "value-2-1", }, }, }, `{"key-1":"value-1","key-2":{"key-2-1":"value-2-1"}}`, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { deepCopy(tt.args.dest, tt.args.src) actual := toJSON(tt.args.dest) assert.JSONEq(t, tt.expected, actual) }) } } func Test_merge(t *testing.T) { type args struct { a map[string]any b map[string]any } tests := []struct { name string args args expected map[string]any }{ { "Verify merge", args{ map[string]any{ "key-1": "value-1-a", "key-3": map[string]any{ "key-3-2": map[string]any{ "key-3-2-1": "value-3-2-1-a", }, }, }, map[string]any{ "key-1": "value-2-b", "key-2": "value-2-b", "key-3": map[string]any{ "key-3-1": "value-3-1-b", "key-3-2": map[string]any{ "key-3-2-1": "value-3-2-1-b", }, }, }, }, map[string]any{ "key-1": "value-2-b", "key-2": "value-2-b", "key-3": map[string]any{ "key-3-1": "value-3-1-b", "key-3-2": map[string]any{ "key-3-2-1": "value-3-2-1-b", }, }, }, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { actual := merge(tt.args.a, tt.args.b) assert.True( t, reflect.DeepEqual(actual, tt.expected), "Expected %v but was %v", tt.expected, actual, ) }) } } // Test_deepCopy_isolation verifies that deepCopy produces a true deep clone: mutating // a nested map in dest must not affect the original src (TC-14). A shallow copy // (for k, v := range src { dest[k] = v }) would fail this because both dest and src // would share the same nested map pointer. func Test_deepCopy_isolation(t *testing.T) { src := map[string]any{ "sensor": map[string]any{ "key": "TC0H", "value": "25.0 °C", }, } dest := make(map[string]any) deepCopy(dest, src) // Mutate the nested map in dest if nested, ok := dest["sensor"].(map[string]any); ok { nested["value"] = "999.0 °C" } // src must be unaffected — a shallow copy would expose the same nested map if nestedSrc, ok := src["sensor"].(map[string]any); ok { assert.Equal(t, "25.0 °C", nestedSrc["value"], "deepCopy must produce a deep clone; mutating dest must not affect src") } } // Test_merge_bOverridesA verifies that merge gives precedence to b when both maps // contain the same flat key (TC-13 supporting test). func Test_merge_bOverridesA(t *testing.T) { a := map[string]any{"CPU Temp": "25.0 °C", "GPU Temp": "40.0 °C"} b := map[string]any{"CPU Temp": "30.0 °C"} // b overrides CPU Temp result := merge(a, b) assert.Equal(t, "30.0 °C", result["CPU Temp"], "merge must give b precedence over a for flat keys") assert.Equal(t, "40.0 °C", result["GPU Temp"], "merge must preserve a keys absent from b") } // Test_merge_nestedBOverridesA verifies TC-15: that merge recurses into nested maps // rather than replacing a's whole sub-map with b's. If merge did NOT recurse, // only b's Temperature entries would appear and a's would be silently dropped. func Test_merge_nestedBOverridesA(t *testing.T) { a := map[string]any{ "Temperature": map[string]any{ "CPU Temp": map[string]any{"key": "TC0H", "value": "25.0 °C", "type": "sp78"}, "GPU Temp": map[string]any{"key": "TG0H", "value": "40.0 °C", "type": "sp78"}, }, } b := map[string]any{ "Temperature": map[string]any{ // HID override for CPU Temp; GPU Temp is absent from b "CPU Temp": map[string]any{"key": "TC0H", "value": "27.0 °C", "type": "hid"}, }, } result := merge(a, b) temps, ok := result["Temperature"].(map[string]any) assert.True(t, ok, "Temperature category must survive the merge") cpuTemp, ok := temps["CPU Temp"].(map[string]any) assert.True(t, ok, "CPU Temp must be present after merge") assert.Equal(t, "27.0 °C", cpuTemp["value"], "b's CPU Temp value must override a's") _, gpuOk := temps["GPU Temp"] assert.True(t, gpuOk, "GPU Temp from a must NOT be lost when b only partially covers Temperature") } // toJSON marshals src to a JSON string for use in test assertions. func toJSON(src map[string]any) string { jsonStr, _ := json.Marshal(src) return string(jsonStr) } // getMapForSensor returns a minimal sensor map keyed by sensorName for use in table-driven tests. func getMapForSensor(sensorName string) map[string]any { return map[string]any{ sensorName: map[string]any{ "key": "key", "value": "value", "type": "type", }, } } ================================================ FILE: output/outputfactory.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output // Factory returns the Output implementation for the given format name. // Recognised values are "table", "json", and "influx"; anything else falls back to ASCII table output. func Factory(outputType string) Output { switch outputType { case "table": return NewTableOutput(false) case "ascii": return NewTableOutput(true) case "json": return NewJSONOutput() case "influx": return NewInfluxOutput() default: return NewTableOutput(true) } } ================================================ FILE: output/outputfactory_test.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "reflect" "testing" ) func TestFactory(t *testing.T) { type args struct { outputType string } tests := []struct { name string args args want Output }{ { "Returns TableOutput(ASCII) for ascii output type", args{outputType: "ascii"}, NewTableOutput(true), }, { "Returns TableOutput for table output type", args{outputType: "table"}, NewTableOutput(false), }, { "Returns JSONOutput for json output type", args{outputType: "json"}, NewJSONOutput(), }, { // TC-22 guard: influx must return InfluxOutput, not TableOutput "Returns InfluxOutput for influx output type", args{outputType: "influx"}, NewInfluxOutput(), }, { "Returns TableOutput for unknown output type", args{outputType: ""}, NewTableOutput(false), }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { if got := Factory(tt.args.outputType); reflect.TypeOf(got) != reflect.TypeOf(tt.want) { t.Errorf("Factory() = %v, want %v", reflect.TypeOf(got), reflect.TypeOf(tt.want)) } }) } } ================================================ FILE: output/tableoutput.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "fmt" "io" "os" "github.com/jedib0t/go-pretty/v6/table" "github.com/jedib0t/go-pretty/v6/text" ) type TableOutput struct { writer io.Writer isASCII bool } // NewTableOutput returns a TableOutput that writes to stdout. When isASCII is true // the output uses plain ASCII borders; otherwise a coloured style is applied. func NewTableOutput(isASCII bool) Output { o := TableOutput{} o.isASCII = isASCII o.writer = io.Writer(os.Stdout) return o } func (to TableOutput) All() { all := GetAll() for _, key := range sortedKeys(all) { value := all[key] if smcdata, ok := value.(map[string]any); ok { to.print(key, smcdata) } } } func (to TableOutput) Battery() { to.print("Battery", GetBattery()) } func (to TableOutput) Current() { to.print("Current", GetCurrent()) } func (to TableOutput) Fans() { to.print("Fans", GetFans()) } func (to TableOutput) Hardware() { to.print("Hardware", GetHardware()) } func (to TableOutput) Power() { to.print("Power", GetPower()) } func (to TableOutput) Temperature() { to.print("Temperature", GetTemperature()) } func (to TableOutput) Voltage() { to.print("Voltage", GetVoltage()) } // print renders smcdata as a formatted table with the given title, sorted by natural key order. // It is a no-op when smcdata is empty. func (to TableOutput) print(name string, smcdata map[string]any) { if len(smcdata) != 0 { t := table.NewWriter() t.SetOutputMirror(to.writer) if !to.isASCII { t.SetStyle(table.StyleColoredBright) } t.SetTitle(name) t.Style().Title.Align = text.AlignCenter t.AppendHeader(table.Row{"Description", "Key", "Value", "Type"}) for _, k := range sortedKeys(smcdata) { v := smcdata[k] if value, ok := v.(map[string]any); ok { t.AppendRow([]any{ k, value["key"], fmt.Sprintf("%8v", value["value"]), value["type"], }) } } t.Render() fmt.Fprintln(to.writer) } } ================================================ FILE: output/tableoutput_test.go ================================================ // Copyright (C) 2022 Roland Schaer // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package output import ( "bytes" "fmt" "io" "strings" "testing" "github.com/stretchr/testify/assert" ) var asciiTpl = `+-------------------------------------+ |%s| +-------------+-----+----------+------+ | DESCRIPTION | KEY | VALUE | TYPE | +-------------+-----+----------+------+ | sensor | key | value | type | +-------------+-----+----------+------+ ` //lint:ignore ST1018 stick to unicode characters for test output var tableTpl = `%s  DESCRIPTION  KEY  VALUE  TYPE   sensor  key  value  type  ` //nolint:stylecheck func TestTableOutput_ASCII(t *testing.T) { tests := []struct { name string monkeyPatch func() method func(to TableOutput) expected string }{ { "All sensors", func() { GetAll = func() map[string]any { return map[string]any{ "battery": map[string]any{ "sensor": map[string]any{ "key": "key", "value": "value", "type": "type", }, }, "fans": map[string]any{ "sensor": map[string]any{ "key": "key", "value": "value", "type": "type", }, }, "temperature": map[string]any{ "sensor": map[string]any{ "key": "key", "value": "value", "type": "type", }, }, } } }, func(to TableOutput) { to.All() }, getASCIITpl("battery", "fans", "temperature"), }, { "Battery sensor", func() { GetBattery = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Battery() }, getASCIITpl("Battery"), }, { "Current sensor", func() { GetCurrent = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Current() }, getASCIITpl("Current"), }, { "Fans sensor", func() { GetFans = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Fans() }, getASCIITpl("Fans"), }, { "Power sensor", func() { GetPower = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Power() }, getASCIITpl("Power"), }, { "Temperature sensor", func() { GetTemperature = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Temperature() }, getASCIITpl("Temperature"), }, { "Voltage sensor", func() { GetVoltage = func() map[string]any { return getMapForSensor("sensor") } }, func(to TableOutput) { to.Voltage() }, getASCIITpl("Voltage"), }, } for _, tt := range tests { var out bytes.Buffer t.Run(tt.name, func(t *testing.T) { tt.monkeyPatch() to := TableOutput{isASCII: true, writer: io.Writer(&out)} tt.method(to) actual := out.String() assert.Equal(t, tt.expected, actual) }) } } func TestTableOutput_Table(t *testing.T) { tests := []struct { name string monkeyPatch func() method func(to TableOutput) expected string }{ { "All sensors", func() { GetAll = func() map[string]any { return map[string]any{ "battery": map[string]any{ "sensor": map[string]any{ "key": "key", "value": "value", "type": "type", }, }, "fans": map[string]any{ "sensor": map[string]any{ "key": "key", "value": "value", "type": "type", }, }, } } }, func(to TableOutput) { to.All() }, getTableTpl("battery", "fans"), }, } for _, tt := range tests { var out bytes.Buffer t.Run(tt.name, func(t *testing.T) { tt.monkeyPatch() to := TableOutput{isASCII: false, writer: io.Writer(&out)} tt.method(to) actual := out.String() assert.Equal(t, tt.expected, actual) }) } } // getASCIITpl returns the expected ASCII table output string for the given section titles, // used to build golden strings in table-driven tests. func getASCIITpl(title ...string) string { var out strings.Builder for _, t := range title { // center title width := 37 even := 0 if len(t)%2 == 0 { even = 1 } centeredTitle := fmt.Sprintf("%*s", -width, fmt.Sprintf("%*s", (width+len(t)+even)/2, t)) out.WriteString(fmt.Sprintf(asciiTpl, centeredTitle)) } return out.String() } // getTableTpl returns the expected coloured table output string for the given section titles, // used to build golden strings in table-driven tests. func getTableTpl(title ...string) string { var out strings.Builder for _, t := range title { // center title width := 35 centeredTitle := fmt.Sprintf("%*s", -width+1, fmt.Sprintf("%*s", (width+len(t))/2, t)) out.WriteString(fmt.Sprintf(tableTpl, centeredTitle)) } return out.String() } ================================================ FILE: platform/get.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package platform /* #include #include static int32_t sysctl_int32(const char *name) { int32_t val = 0; size_t size = sizeof(val); sysctlbyname(name, &val, &size, NULL, 0); return val; } */ import "C" import ( "fmt" "sync" "unsafe" ) // PerfLevel describes one CPU performance tier as reported by the macOS sysctl // hw.perflevel{N}.* hierarchy. type PerfLevel struct { Name string PhysicalCPU int LogicalCPU int } var ( modelOnce sync.Once cachedModel string ) // getModel returns the hardware model identifier (e.g. "Mac16,1") via the hw.model sysctl, // or an empty string if the sysctl call fails. The result is cached after the first call. func getModel() string { modelOnce.Do(func() { name := C.CString("hw.model") defer C.free(unsafe.Pointer(name)) var size C.size_t if ret := C.sysctlbyname(name, nil, &size, nil, 0); ret < 0 || size == 0 { return } buf := C.malloc(size) defer C.free(buf) if ret := C.sysctlbyname(name, buf, &size, nil, 0); ret < 0 { return } cachedModel = C.GoString((*C.char)(buf)) }) return cachedModel } // GetFamily returns the CPU platform family name (e.g. "M4", "Intel") for the current hardware, // or "Unknown" when the model identifier is not in the products map. func GetFamily() string { p, ok := products[getModel()] if !ok { return "Unknown" } return p.Family } // GetModelID returns the raw hardware model identifier (e.g. "Mac16,1") as reported by the // hw.model sysctl, or an empty string if the sysctl call fails. func GetModelID() string { return getModel() } // GetProduct returns the full Product metadata for the current hardware. // The boolean reports whether the model was found in the products map. func GetProduct() (Product, bool) { p, ok := products[getModel()] return p, ok } // GetSKULayout returns the validated core composition for the current machine's // SKU (looked up by Product.CPU). Returns the zero SKULayout and false when the // model is unknown or the SKU has no roster entry — callers should treat that // as "no validation possible" rather than as an error. func GetSKULayout() (SKULayout, bool) { p, ok := products[getModel()] if !ok { return SKULayout{}, false } layout, ok := skuLayouts[p.CPU] return layout, ok } // LookupSKULayout returns the roster entry for the given Product.CPU string. // Exposed for testing and for callers that already hold a Product struct. func LookupSKULayout(cpu string) (SKULayout, bool) { layout, ok := skuLayouts[cpu] return layout, ok } // GetTotalCPU returns the total physical and logical CPU counts via the // hw.physicalcpu and hw.logicalcpu sysctls. func GetTotalCPU() (physical, logical int) { pcpuKey := C.CString("hw.physicalcpu") defer C.free(unsafe.Pointer(pcpuKey)) lcpuKey := C.CString("hw.logicalcpu") defer C.free(unsafe.Pointer(lcpuKey)) physical = int(C.sysctl_int32(pcpuKey)) logical = int(C.sysctl_int32(lcpuKey)) return physical, logical } // GetPerfLevels returns the CPU performance levels for the current machine, // ordered from highest to lowest performance (perflevel0 first). // Returns nil if hw.nperflevels is unavailable or zero. func GetPerfLevels() []PerfLevel { nKey := C.CString("hw.nperflevels") n := int(C.sysctl_int32(nKey)) C.free(unsafe.Pointer(nKey)) if n <= 0 { return nil } levels := make([]PerfLevel, 0, n) for i := range n { nameKey := C.CString(fmt.Sprintf("hw.perflevel%d.name", i)) var size C.size_t if ret := C.sysctlbyname(nameKey, nil, &size, nil, 0); ret < 0 || size == 0 { C.free(unsafe.Pointer(nameKey)) continue } buf := C.malloc(size) if ret := C.sysctlbyname(nameKey, buf, &size, nil, 0); ret < 0 { C.free(buf) C.free(unsafe.Pointer(nameKey)) continue } levelName := C.GoString((*C.char)(buf)) C.free(buf) C.free(unsafe.Pointer(nameKey)) pcpuKey := C.CString(fmt.Sprintf("hw.perflevel%d.physicalcpu", i)) lcpuKey := C.CString(fmt.Sprintf("hw.perflevel%d.logicalcpu", i)) pcpu := int(C.sysctl_int32(pcpuKey)) lcpu := int(C.sysctl_int32(lcpuKey)) C.free(unsafe.Pointer(pcpuKey)) C.free(unsafe.Pointer(lcpuKey)) levels = append(levels, PerfLevel{ Name: levelName, PhysicalCPU: pcpu, LogicalCPU: lcpu, }) } if len(levels) == 0 { return nil } return levels } ================================================ FILE: platform/mapping.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package platform type Product struct { Name string Family string CPU string Year int } // Pair signatures: which two core types coexist on the SKU. Tp* prefix maps to // different physical cores depending on signature, so per-core consumers must consult it. const ( PairSignaturePE = "P+E" // M1–M4, A18. PairSignatureSE = "S+E" // M5 base. PairSignatureSP = "S+P" // M5 Pro / M5 Max. ) // SKULayout describes per-SKU core/GPU composition for an Apple Silicon variant. // {Min,Max} ranges span every observed variant; zero means the type is absent. // Dies = 2 for UltraFusion (M1/M2/M3 Ultra). type SKULayout struct { PairSignature string PCoresMin, PCoresMax int ECoresMin, ECoresMax int SCoresMin, SCoresMax int GPUCoresMin, GPUCoresMax int Dies int } // skuLayouts maps Product.CPU to known core composition. Authoritative source // for cmd/guess.go phase labelling and count validation. var skuLayouts = map[string]SKULayout{ // M1 family — P+E "M1": {PCoresMin: 4, PCoresMax: 4, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 7, GPUCoresMax: 8, PairSignature: PairSignaturePE, Dies: 1}, "M1 Pro": {PCoresMin: 6, PCoresMax: 8, ECoresMin: 2, ECoresMax: 2, GPUCoresMin: 14, GPUCoresMax: 16, PairSignature: PairSignaturePE, Dies: 1}, "M1 Max": {PCoresMin: 8, PCoresMax: 8, ECoresMin: 2, ECoresMax: 2, GPUCoresMin: 24, GPUCoresMax: 32, PairSignature: PairSignaturePE, Dies: 1}, "M1 Ultra": {PCoresMin: 16, PCoresMax: 16, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 48, GPUCoresMax: 64, PairSignature: PairSignaturePE, Dies: 2}, // M2 family — P+E "M2": {PCoresMin: 4, PCoresMax: 4, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 8, GPUCoresMax: 10, PairSignature: PairSignaturePE, Dies: 1}, "M2 Pro": {PCoresMin: 6, PCoresMax: 8, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 16, GPUCoresMax: 19, PairSignature: PairSignaturePE, Dies: 1}, "M2 Max": {PCoresMin: 8, PCoresMax: 8, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 30, GPUCoresMax: 38, PairSignature: PairSignaturePE, Dies: 1}, "M2 Ultra": {PCoresMin: 16, PCoresMax: 16, ECoresMin: 8, ECoresMax: 8, GPUCoresMin: 60, GPUCoresMax: 76, PairSignature: PairSignaturePE, Dies: 2}, // M3 family — P+E "M3": {PCoresMin: 4, PCoresMax: 4, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 8, GPUCoresMax: 10, PairSignature: PairSignaturePE, Dies: 1}, "M3 Pro": {PCoresMin: 5, PCoresMax: 6, ECoresMin: 6, ECoresMax: 6, GPUCoresMin: 14, GPUCoresMax: 18, PairSignature: PairSignaturePE, Dies: 1}, "M3 Max": {PCoresMin: 10, PCoresMax: 12, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 30, GPUCoresMax: 40, PairSignature: PairSignaturePE, Dies: 1}, "M3 Ultra": {PCoresMin: 20, PCoresMax: 24, ECoresMin: 8, ECoresMax: 8, GPUCoresMin: 60, GPUCoresMax: 80, PairSignature: PairSignaturePE, Dies: 2}, // M4 family — P+E "M4": {PCoresMin: 3, PCoresMax: 4, ECoresMin: 4, ECoresMax: 6, GPUCoresMin: 8, GPUCoresMax: 10, PairSignature: PairSignaturePE, Dies: 1}, "M4 Pro": {PCoresMin: 8, PCoresMax: 10, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 16, GPUCoresMax: 20, PairSignature: PairSignaturePE, Dies: 1}, "M4 Max": {PCoresMin: 10, PCoresMax: 12, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 32, GPUCoresMax: 40, PairSignature: PairSignaturePE, Dies: 1}, // M5: base = S+E, Pro/Max = S+P. Don't collapse without splitting temp.txt. "M5": {SCoresMin: 3, SCoresMax: 4, ECoresMin: 6, ECoresMax: 6, GPUCoresMin: 8, GPUCoresMax: 10, PairSignature: PairSignatureSE, Dies: 1}, "M5 Pro": {SCoresMin: 5, SCoresMax: 6, PCoresMin: 10, PCoresMax: 12, GPUCoresMin: 16, GPUCoresMax: 20, PairSignature: PairSignatureSP, Dies: 1}, "M5 Max": {SCoresMin: 6, SCoresMax: 6, PCoresMin: 12, PCoresMax: 12, GPUCoresMin: 32, GPUCoresMax: 40, PairSignature: PairSignatureSP, Dies: 1}, // A-series "A18 Pro": {PCoresMin: 2, PCoresMax: 2, ECoresMin: 4, ECoresMax: 4, GPUCoresMin: 6, GPUCoresMax: 6, PairSignature: PairSignaturePE, Dies: 1}, } // https://en.wikipedia.org/wiki/List_of_Mac_models // https://github.com/exelban/stats/blob/master/Kit/plugins/SystemKit.swift var products = map[string]Product{ // Mac Mini "Macmini1,1": {Name: "Mac mini", Year: 2006, Family: "Intel", CPU: "Core Duo T2300"}, "Macmini2,1": {Name: "Mac mini", Year: 2007, Family: "Intel", CPU: "Core 2 Duo T5600"}, "Macmini3,1": {Name: "Mac mini", Year: 2009, Family: "Intel", CPU: "Core 2 Duo P7350"}, "Macmini4,1": {Name: "Mac mini", Year: 2010, Family: "Intel", CPU: "Core 2 Duo P8600"}, "Macmini5,1": {Name: "Mac mini", Year: 2011, Family: "Intel", CPU: "Core i5-2415M"}, "Macmini5,2": {Name: "Mac mini", Year: 2011, Family: "Intel", CPU: "Core i5-2520M"}, "Macmini5,3": {Name: "Mac mini", Year: 2011, Family: "Intel", CPU: "Core i7-2635QM"}, "Macmini6,1": {Name: "Mac mini", Year: 2012, Family: "Intel", CPU: "Core i5-3210M"}, "Macmini6,2": {Name: "Mac mini", Year: 2012, Family: "Intel", CPU: "Core i7-3615QM"}, "Macmini7,1": {Name: "Mac mini", Year: 2014, Family: "Intel", CPU: "Core i5-4260U"}, "Macmini8,1": {Name: "Mac mini", Year: 2018, Family: "Intel", CPU: "Core i3-8100B"}, "Macmini9,1": {Name: "Mac mini (M1)", Year: 2020, Family: "M1", CPU: "M1"}, "Mac14,3": {Name: "Mac mini (M2)", Year: 2023, Family: "M2", CPU: "M2"}, "Mac14,12": {Name: "Mac mini (M2 Pro)", Year: 2023, Family: "M2", CPU: "M2 Pro"}, "Mac16,10": {Name: "Mac mini (M4)", Year: 2024, Family: "M4", CPU: "M4"}, "Mac16,11": {Name: "Mac mini (M4 Pro)", Year: 2024, Family: "M4", CPU: "M4 Pro"}, // Mac Studio "Mac13,1": {Name: "Mac Studio (M1 Max)", Year: 2022, Family: "M1", CPU: "M1 Max"}, "Mac13,2": {Name: "Mac Studio (M1 Ultra)", Year: 2022, Family: "M1", CPU: "M1 Ultra"}, "Mac14,13": {Name: "Mac Studio (M2 Max)", Year: 2023, Family: "M2", CPU: "M2 Max"}, "Mac14,14": {Name: "Mac Studio (M2 Ultra)", Year: 2023, Family: "M2", CPU: "M2 Ultra"}, "Mac15,14": {Name: "Mac Studio (M3 Ultra)", Year: 2025, Family: "M3", CPU: "M3 Ultra"}, "Mac16,9": {Name: "Mac Studio (M4 Max)", Year: 2025, Family: "M4", CPU: "M4 Max"}, // Mac Pro "MacPro1,1": {Name: "Mac Pro", Year: 2006, Family: "Intel", CPU: "Xeon 5130"}, "MacPro2,1": {Name: "Mac Pro", Year: 2007, Family: "Intel", CPU: "Xeon X5365"}, "MacPro3,1": {Name: "Mac Pro", Year: 2008, Family: "Intel", CPU: "Xeon E5462"}, "MacPro4,1": {Name: "Mac Pro", Year: 2009, Family: "Intel", CPU: "Xeon W3520"}, "MacPro5,1": {Name: "Mac Pro", Year: 2010, Family: "Intel", CPU: "Xeon W3530"}, "MacPro6,1": {Name: "Mac Pro", Year: 2016, Family: "Intel", CPU: "Xeon E5-1620v2"}, "MacPro7,1": {Name: "Mac Pro", Year: 2019, Family: "Intel", CPU: "Xeon W-3223"}, "Mac14,8": {Name: "Mac Pro (M2 Ultra)", Year: 2023, Family: "M2", CPU: "M2 Ultra"}, // iMac "iMac10,1": {Name: "iMac 21.5-Inch", Year: 2009, Family: "Intel", CPU: "Core 2 Duo E7600"}, "iMac11,2": {Name: "iMac 21.5-Inch", Year: 2010, Family: "Intel", CPU: "Core i3-540"}, "iMac11,3": {Name: "iMac 27-Inch", Year: 2010, Family: "Intel", CPU: "Core i3-550"}, "iMac12,1": {Name: "iMac 21.5-Inch", Year: 2011, Family: "Intel", CPU: "Core i5-2400S"}, "iMac12,2": {Name: "iMac 27-Inch", Year: 2011, Family: "Intel", CPU: "Core i5-2500S"}, "iMac13,1": {Name: "iMac 21.5-Inch", Year: 2012, Family: "Intel", CPU: "Core i5-3330S"}, "iMac13,2": {Name: "iMac 27-Inch", Year: 2012, Family: "Intel", CPU: "Core i5-3470S"}, "iMac14,1": {Name: "iMac 21.5-Inch", Year: 2013, Family: "Intel", CPU: "Core i5-4570R"}, "iMac14,2": {Name: "iMac 27-Inch", Year: 2013, Family: "Intel", CPU: "Core i5-4570"}, "iMac14,3": {Name: "iMac 21.5-Inch", Year: 2013, Family: "Intel", CPU: "Core i5-4570S"}, "iMac14,4": {Name: "iMac 21.5-Inch", Year: 2014, Family: "Intel", CPU: "Core i5-4260U"}, "iMac15,1": {Name: "iMac 27-Inch", Year: 2014, Family: "Intel", CPU: "Core i5-4590"}, "iMac16,1": {Name: "iMac 21.5-Inch", Year: 2015, Family: "Intel", CPU: "Core i5-5250U"}, "iMac16,2": {Name: "iMac 21.5-Inch", Year: 2015, Family: "Intel", CPU: "Core i5-5575R"}, "iMac17,1": {Name: "iMac 27-Inch", Year: 2015, Family: "Intel", CPU: "Core i5-6500"}, "iMac18,1": {Name: "iMac 21.5-Inch", Year: 2017, Family: "Intel", CPU: "Core i5-7360U"}, "iMac18,2": {Name: "iMac 21.5-Inch", Year: 2017, Family: "Intel", CPU: "Core i5-7400"}, "iMac18,3": {Name: "iMac 27-Inch", Year: 2017, Family: "Intel", CPU: "Core i5-7500"}, "iMac19,1": {Name: "iMac 27-Inch", Year: 2019, Family: "Intel", CPU: "Core i5-8500"}, "iMac19,2": {Name: "iMac 21.5-Inch", Year: 2019, Family: "Intel", CPU: "Core i3-8100"}, "iMac20,1": {Name: "iMac 27-Inch", Year: 2020, Family: "Intel", CPU: "Core i5-10500"}, "iMac20,2": {Name: "iMac 27-Inch", Year: 2020, Family: "Intel", CPU: "Core i7-10700K"}, "iMac21,1": {Name: "iMac 24-Inch (M1)", Year: 2021, Family: "M1", CPU: "M1"}, "iMac21,2": {Name: "iMac 24-Inch (M1)", Year: 2021, Family: "M1", CPU: "M1"}, "Mac15,4": {Name: "iMac 24-Inch (M3, 8 CPU/8 GPU)", Year: 2023, Family: "M3", CPU: "M3"}, "Mac15,5": {Name: "iMac 24-Inch (M3, 8 CPU/10 GPU)", Year: 2023, Family: "M3", CPU: "M3"}, "Mac16,2": {Name: "iMac 24-Inch (M4, 8 CPU/8 GPU)", Year: 2024, Family: "M4", CPU: "M4"}, "Mac16,3": {Name: "iMac 24-Inch (M4, 10 CPU/10 GPU)", Year: 2024, Family: "M4", CPU: "M4"}, // iMac Pro "iMacPro1,1": {Name: "iMac Pro", Year: 2017, Family: "Intel", CPU: "Xeon W-2140B"}, // MacBook "MacBook8,1": {Name: "MacBook", Year: 2015, Family: "Intel", CPU: "Core M-5Y31"}, "MacBook9,1": {Name: "MacBook", Year: 2016, Family: "Intel", CPU: "Core m3-6Y30"}, "MacBook10,1": {Name: "MacBook", Year: 2017, Family: "Intel", CPU: "Core m3-7Y32"}, // MacBook Neo "Mac17,5": {Name: "MacBook Neo", Year: 2026, Family: "A18", CPU: "A18 Pro"}, // MacBook Air "MacBookAir1,1": {Name: "MacBook Air 13", Year: 2008, Family: "Intel", CPU: "Core 2 Duo P7500"}, "MacBookAir2,1": {Name: "MacBook Air 13", Year: 2009, Family: "Intel", CPU: "Core 2 Duo SL9300"}, "MacBookAir3,1": {Name: "MacBook Air 11", Year: 2010, Family: "Intel", CPU: "Core 2 Duo SU9400"}, "MacBookAir3,2": {Name: "MacBook Air 13", Year: 2010, Family: "Intel", CPU: "Core 2 Duo SL9400"}, "MacBookAir4,1": {Name: "MacBook Air 11", Year: 2011, Family: "Intel", CPU: "Core i5-2467M"}, "MacBookAir4,2": {Name: "MacBook Air 13", Year: 2011, Family: "Intel", CPU: "Core i5-2467M"}, "MacBookAir5,1": {Name: "MacBook Air 11", Year: 2012, Family: "Intel", CPU: "Core i5-3317U"}, "MacBookAir5,2": {Name: "MacBook Air 13", Year: 2012, Family: "Intel", CPU: "Core i5-3317U"}, "MacBookAir6,1": {Name: "MacBook Air 11", Year: 2014, Family: "Intel", CPU: "Core i5-4250U"}, "MacBookAir6,2": {Name: "MacBook Air 13", Year: 2014, Family: "Intel", CPU: "Core i5-4250U"}, "MacBookAir7,1": {Name: "MacBook Air 11", Year: 2015, Family: "Intel", CPU: "Core i5-5250U"}, "MacBookAir7,2": {Name: "MacBook Air 13", Year: 2015, Family: "Intel", CPU: "Core i5-5250U"}, "MacBookAir8,1": {Name: "MacBook Air 13", Year: 2018, Family: "Intel", CPU: "Core i5-8210Y"}, "MacBookAir8,2": {Name: "MacBook Air 13", Year: 2019, Family: "Intel", CPU: "Core i5-8210Y"}, "MacBookAir9,1": {Name: "MacBook Air 13", Year: 2020, Family: "Intel", CPU: "Core i3-1000NG4"}, "MacBookAir10,1": {Name: "MacBook Air 13 (M1)", Year: 2020, Family: "M1", CPU: "M1"}, "Mac14,2": {Name: "MacBook Air 13 (M2)", Year: 2022, Family: "M2", CPU: "M2"}, "Mac14,15": {Name: "MacBook Air 15 (M2)", Year: 2023, Family: "M2", CPU: "M2"}, "Mac15,12": {Name: "MacBook Air 13 (M3)", Year: 2024, Family: "M3", CPU: "M3"}, "Mac15,13": {Name: "MacBook Air 15 (M3)", Year: 2024, Family: "M3", CPU: "M3"}, "Mac16,12": {Name: "MacBook Air 13 (M4)", Year: 2025, Family: "M4", CPU: "M4"}, "Mac16,13": {Name: "MacBook Air 15 (M4)", Year: 2025, Family: "M4", CPU: "M4"}, "Mac17,3": {Name: "MacBook Air 13 (M5)", Year: 2026, Family: "M5", CPU: "M5"}, "Mac17,4": {Name: "MacBook Air 15 (M5)", Year: 2026, Family: "M5", CPU: "M5"}, // MacBook Pro "MacBookPro1,1": {Name: "MacBook Pro 15", Year: 2006, Family: "Intel", CPU: "Core Duo L2400"}, "MacBookPro1,2": {Name: "MacBook Pro 17", Year: 2006, Family: "Intel", CPU: "Core Duo T2600"}, "MacBookPro2,1": {Name: "MacBook Pro 17", Year: 2006, Family: "Intel", CPU: "Core 2 Duo T7600"}, "MacBookPro2,2": {Name: "MacBook Pro 15", Year: 2006, Family: "Intel", CPU: "Core 2 Duo T7400"}, "MacBookPro3,1": {Name: "MacBook Pro", Year: 2007, Family: "Intel", CPU: "Core 2 Duo T7500"}, "MacBookPro4,1": {Name: "MacBook Pro", Year: 2008, Family: "Intel", CPU: "Core 2 Duo T8300"}, "MacBookPro5,1": {Name: "MacBook Pro 15", Year: 2008, Family: "Intel", CPU: "Core 2 Duo P8600"}, "MacBookPro5,2": {Name: "MacBook Pro 17", Year: 2009, Family: "Intel", CPU: "Core 2 Duo T9550"}, "MacBookPro5,3": {Name: "MacBook Pro 15", Year: 2009, Family: "Intel", CPU: "Core 2 Duo P8800"}, "MacBookPro5,4": {Name: "MacBook Pro 15", Year: 2009, Family: "Intel", CPU: "Core 2 Duo P8700"}, "MacBookPro5,5": {Name: "MacBook Pro 13", Year: 2009, Family: "Intel", CPU: "Core 2 Duo P7550"}, "MacBookPro6,1": {Name: "MacBook Pro 17", Year: 2010, Family: "Intel", CPU: "Core i5-540M"}, "MacBookPro6,2": {Name: "MacBook Pro 15", Year: 2010, Family: "Intel", CPU: "Core i5-520M"}, "MacBookPro7,1": {Name: "MacBook Pro 13", Year: 2010, Family: "Intel", CPU: "Core 2 Duo P8600"}, "MacBookPro8,1": {Name: "MacBook Pro 13", Year: 2011, Family: "Intel", CPU: "Core i5-2415M"}, "MacBookPro8,2": {Name: "MacBook Pro 15", Year: 2011, Family: "Intel", CPU: "Core i7-2635QM"}, "MacBookPro8,3": {Name: "MacBook Pro 17", Year: 2011, Family: "Intel", CPU: "Core i7-2720QM"}, "MacBookPro9,1": {Name: "MacBook Pro 15", Year: 2012, Family: "Intel", CPU: "Core i7-3615QM"}, "MacBookPro9,2": {Name: "MacBook Pro 13", Year: 2012, Family: "Intel", CPU: "Core i5-3210M"}, "MacBookPro10,1": {Name: "MacBook Pro 15", Year: 2012, Family: "Intel", CPU: "Core i7-3615QM"}, "MacBookPro10,2": {Name: "MacBook Pro 13", Year: 2012, Family: "Intel", CPU: "Core i5-3210M"}, "MacBookPro11,1": {Name: "MacBook Pro 13", Year: 2014, Family: "Intel", CPU: "Core i5-4258U"}, "MacBookPro11,2": {Name: "MacBook Pro 15", Year: 2014, Family: "Intel", CPU: "Core i7-4750HQ"}, "MacBookPro11,3": {Name: "MacBook Pro 15", Year: 2014, Family: "Intel", CPU: "Core i7-4850HQ"}, "MacBookPro11,4": {Name: "MacBook Pro 15", Year: 2015, Family: "Intel", CPU: "Core i7-4770HQ"}, "MacBookPro11,5": {Name: "MacBook Pro 15", Year: 2015, Family: "Intel", CPU: "Core i7-4870HQ"}, "MacBookPro12,1": {Name: "MacBook Pro 13", Year: 2015, Family: "Intel", CPU: "Core i5-5257U"}, "MacBookPro13,1": {Name: "MacBook Pro 13", Year: 2016, Family: "Intel", CPU: "Core i5-6360U"}, "MacBookPro13,2": {Name: "MacBook Pro 13", Year: 2016, Family: "Intel", CPU: "Core i5-6267U"}, "MacBookPro13,3": {Name: "MacBook Pro 15", Year: 2016, Family: "Intel", CPU: "Core i7-6700HQ"}, "MacBookPro14,1": {Name: "MacBook Pro 13", Year: 2017, Family: "Intel", CPU: "Core i5-7360U"}, "MacBookPro14,2": {Name: "MacBook Pro 13", Year: 2017, Family: "Intel", CPU: "Core i5-7267U"}, "MacBookPro14,3": {Name: "MacBook Pro 15", Year: 2017, Family: "Intel", CPU: "Core i7-7700HQ"}, "MacBookPro15,1": {Name: "MacBook Pro 15", Year: 2018, Family: "Intel", CPU: "Core i7-8750H"}, "MacBookPro15,2": {Name: "MacBook Pro 13", Year: 2019, Family: "Intel", CPU: "Core i5-8259U"}, "MacBookPro15,3": {Name: "MacBook Pro 15", Year: 2019, Family: "Intel", CPU: "Core i7-8850H"}, "MacBookPro15,4": {Name: "MacBook Pro 13", Year: 2019, Family: "Intel", CPU: "Core i5-8257U"}, "MacBookPro16,1": {Name: "MacBook Pro 16", Year: 2019, Family: "Intel", CPU: "Core i7-9750H"}, "MacBookPro16,2": {Name: "MacBook Pro 13", Year: 2019, Family: "Intel", CPU: "Core i5-1038NG7"}, "MacBookPro16,3": {Name: "MacBook Pro 13", Year: 2020, Family: "Intel", CPU: "Core i5-8257U"}, "MacBookPro16,4": {Name: "MacBook Pro 16", Year: 2019, Family: "Intel", CPU: "Core i7-9750H"}, "MacBookPro17,1": {Name: "MacBook Pro 13 (M1)", Year: 2020, Family: "M1", CPU: "M1"}, "MacBookPro18,1": {Name: "MacBook Pro 16 (M1 Pro)", Year: 2021, Family: "M1", CPU: "M1 Pro"}, "MacBookPro18,2": {Name: "MacBook Pro 16 (M1 Max)", Year: 2021, Family: "M1", CPU: "M1 Max"}, "MacBookPro18,3": {Name: "MacBook Pro 14 (M1 Pro)", Year: 2021, Family: "M1", CPU: "M1 Pro"}, "MacBookPro18,4": {Name: "MacBook Pro 14 (M1 Max)", Year: 2021, Family: "M1", CPU: "M1 Max"}, "Mac14,7": {Name: "MacBook Pro 13 (M2)", Year: 2022, Family: "M2", CPU: "M2"}, "Mac14,5": {Name: "MacBook Pro 14 (M2 Max)", Year: 2023, Family: "M2", CPU: "M2 Max"}, "Mac14,6": {Name: "MacBook Pro 16 (M2 Max)", Year: 2023, Family: "M2", CPU: "M2 Max"}, "Mac14,9": {Name: "MacBook Pro 14 (M2 Pro)", Year: 2023, Family: "M2", CPU: "M2 Pro"}, "Mac14,10": {Name: "MacBook Pro 16 (M2 Pro)", Year: 2023, Family: "M2", CPU: "M2 Pro"}, "Mac15,3": {Name: "MacBook Pro 14 (M3)", Year: 2023, Family: "M3", CPU: "M3"}, "Mac15,6": {Name: "MacBook Pro 14 (M3 Pro)", Year: 2023, Family: "M3", CPU: "M3 Pro"}, "Mac15,7": {Name: "MacBook Pro 16 (M3 Pro)", Year: 2023, Family: "M3", CPU: "M3 Pro"}, "Mac15,8": {Name: "MacBook Pro 14 (M3 Max)", Year: 2023, Family: "M3", CPU: "M3 Max"}, "Mac15,9": {Name: "MacBook Pro 16 (M3 Max)", Year: 2023, Family: "M3", CPU: "M3 Max"}, "Mac15,10": {Name: "MacBook Pro 14 (M3 Max)", Year: 2023, Family: "M3", CPU: "M3 Max"}, "Mac16,1": {Name: "MacBook Pro 14 (M4)", Year: 2024, Family: "M4", CPU: "M4"}, "Mac16,5": {Name: "MacBook Pro 16 (M4 Max)", Year: 2024, Family: "M4", CPU: "M4 Max"}, "Mac16,6": {Name: "MacBook Pro 14 (M4 Max)", Year: 2024, Family: "M4", CPU: "M4 Max"}, "Mac16,7": {Name: "MacBook Pro 16 (M4 Pro)", Year: 2024, Family: "M4", CPU: "M4 Pro"}, "Mac16,8": {Name: "MacBook Pro 14 (M4 Pro)", Year: 2024, Family: "M4", CPU: "M4 Pro"}, "Mac17,2": {Name: "MacBook Pro 14 (M5)", Year: 2025, Family: "M5", CPU: "M5"}, "Mac17,6": {Name: "MacBook Pro 16 (M5 Max)", Year: 2026, Family: "M5", CPU: "M5 Max"}, "Mac17,7": {Name: "MacBook Pro 14 (M5 Max)", Year: 2026, Family: "M5", CPU: "M5 Max"}, "Mac17,8": {Name: "MacBook Pro 16 (M5 Pro)", Year: 2026, Family: "M5", CPU: "M5 Pro"}, "Mac17,9": {Name: "MacBook Pro 14 (M5 Pro)", Year: 2026, Family: "M5", CPU: "M5 Pro"}, } ================================================ FILE: platform/mapping_test.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package platform import ( "strings" "testing" "github.com/stretchr/testify/assert" ) // Test_productsIntegrity validates every entry in the products lookup table for common // transcription errors: missing fields, implausible years, and mis-tagged families. // // Family consistency rules enforced: // - Models whose CPU string contains "Core" or "Xeon" must have Family == "Intel". // - Models whose CPU starts with "M" (e.g. "M1", "M4 Pro") must have Family starting with "M". // - Models whose CPU starts with "A" (e.g. "A18 Pro") must have Family starting with "A". func Test_productsIntegrity(t *testing.T) { t.Parallel() for modelID, p := range products { t.Run(modelID, func(t *testing.T) { t.Parallel() assert.NotEmpty(t, p.Name, "model %q: Name must not be empty", modelID) assert.NotEmpty(t, p.Family, "model %q: Family must not be empty", modelID) assert.NotEmpty(t, p.CPU, "model %q: CPU must not be empty", modelID) assert.GreaterOrEqual(t, p.Year, 2006, "model %q: Year %d is before the first Intel Mac (2006)", modelID, p.Year) assert.LessOrEqual(t, p.Year, 2030, "model %q: Year %d looks implausibly far in the future", modelID, p.Year) // Family/CPU consistency cpuIsIntel := strings.Contains(p.CPU, "Core") || strings.Contains(p.CPU, "Xeon") if cpuIsIntel { assert.Equal(t, "Intel", p.Family, "model %q: CPU %q implies Intel family but Family=%q", modelID, p.CPU, p.Family) } if strings.HasPrefix(p.CPU, "M") { assert.True(t, strings.HasPrefix(p.Family, "M"), "model %q: CPU %q implies M-family but Family=%q", modelID, p.CPU, p.Family) } if strings.HasPrefix(p.CPU, "A") { assert.True(t, strings.HasPrefix(p.Family, "A"), "model %q: CPU %q implies A-family but Family=%q", modelID, p.CPU, p.Family) } }) } } // Test_productsKnownEntries verifies a representative set of well-known model identifiers // to catch column-swap errors (e.g. Name vs CPU) or wrong year assignments. func Test_productsKnownEntries(t *testing.T) { t.Parallel() tests := []struct { modelID string want Product }{ // First-generation Apple Silicon Mac mini {"Macmini9,1", Product{Name: "Mac mini (M1)", Year: 2020, Family: "M1", CPU: "M1"}}, // M4 Mac mini (2024) {"Mac16,10", Product{Name: "Mac mini (M4)", Year: 2024, Family: "M4", CPU: "M4"}}, // Last Intel Mac mini {"Macmini8,1", Product{Name: "Mac mini", Year: 2018, Family: "Intel", CPU: "Core i3-8100B"}}, // First M1 MacBook Pro {"MacBookPro17,1", Product{Name: "MacBook Pro 13 (M1)", Year: 2020, Family: "M1", CPU: "M1"}}, // First M1 MacBook Air {"MacBookAir10,1", Product{Name: "MacBook Air 13 (M1)", Year: 2020, Family: "M1", CPU: "M1"}}, // M1 iMac {"iMac21,1", Product{Name: "iMac 24-Inch (M1)", Year: 2021, Family: "M1", CPU: "M1"}}, // Intel iMac Pro {"iMacPro1,1", Product{Name: "iMac Pro", Year: 2017, Family: "Intel", CPU: "Xeon W-2140B"}}, // M2 Mac Pro {"Mac14,8", Product{Name: "Mac Pro (M2 Ultra)", Year: 2023, Family: "M2", CPU: "M2 Ultra"}}, } for _, tt := range tests { t.Run(tt.modelID, func(t *testing.T) { t.Parallel() got, ok := products[tt.modelID] assert.True(t, ok, "model %q must be present in products map", tt.modelID) assert.Equal(t, tt.want, got, "model %q data mismatch", tt.modelID) }) } } // Test_GetProduct_consistency verifies that GetProduct() and GetModelID() return // mutually consistent results: the product returned by GetProduct() must be identical // to the entry at products[GetModelID()]. // // The test is skipped when hw.model returns an empty string (e.g. in a sandbox that // blocks sysctl) and gracefully passes when the model is not in the products map. func Test_GetProduct_consistency(t *testing.T) { modelID := GetModelID() if modelID == "" { t.Skip("hw.model sysctl returned empty string; skipping consistency check") } gotProduct, gotOK := GetProduct() wantProduct, wantOK := products[modelID] assert.Equal(t, wantOK, gotOK, "GetProduct() found=%v but products[%q] found=%v", gotOK, modelID, wantOK) if gotOK { assert.Equal(t, wantProduct, gotProduct, "GetProduct() must return the same data as products[%q]", modelID) } } // Test_GetFamily_consistency verifies that GetFamily() returns a value consistent with // the products map entry for the current machine's model identifier. func Test_GetFamily_consistency(t *testing.T) { modelID := GetModelID() if modelID == "" { t.Skip("hw.model sysctl returned empty string; skipping GetFamily consistency check") } family := GetFamily() p, inMap := products[modelID] if !inMap { // Model not yet in the table; GetFamily returns "Unknown" — just verify that. assert.Equal(t, "Unknown", family, "GetFamily must return 'Unknown' for unrecognised model %q", modelID) return } assert.Equal(t, p.Family, family, "GetFamily() must match products[%q].Family", modelID) } // Test_skuLayoutsIntegrity walks the SKU roster and verifies every entry honours // the invariants the validate-temp-mappings skill encodes: // - Min ≤ Max for every {S,P,E,GPU}Cores pair. // - PairSignature is one of P+E / S+E / S+P. // - The "absent" core type for the pair signature has zero Min/Max // (e.g. M5 Pro is S+P → ECoresMax must be zero; M5 base is S+E → PCoresMax // must be zero). // - Dies is 1 (monolithic) or 2 (UltraFusion). // - GPUCoresMax is positive (every shipped Apple Silicon SKU has GPU cores). func Test_skuLayoutsIntegrity(t *testing.T) { t.Parallel() for sku, layout := range skuLayouts { t.Run(sku, func(t *testing.T) { t.Parallel() assert.LessOrEqual(t, layout.SCoresMin, layout.SCoresMax, "%s: SCoresMin > SCoresMax", sku) assert.LessOrEqual(t, layout.PCoresMin, layout.PCoresMax, "%s: PCoresMin > PCoresMax", sku) assert.LessOrEqual(t, layout.ECoresMin, layout.ECoresMax, "%s: ECoresMin > ECoresMax", sku) assert.LessOrEqual(t, layout.GPUCoresMin, layout.GPUCoresMax, "%s: GPUCoresMin > GPUCoresMax", sku) assert.Contains(t, []string{PairSignaturePE, PairSignatureSE, PairSignatureSP}, layout.PairSignature, "%s: PairSignature %q is not one of the known constants", sku, layout.PairSignature) switch layout.PairSignature { case PairSignaturePE: assert.Zero(t, layout.SCoresMax, "%s: P+E SKU must have no S-cores", sku) assert.Positive(t, layout.PCoresMax, "%s: P+E SKU must have P-cores", sku) assert.Positive(t, layout.ECoresMax, "%s: P+E SKU must have E-cores", sku) case PairSignatureSE: assert.Zero(t, layout.PCoresMax, "%s: S+E SKU must have no P-cores", sku) assert.Positive(t, layout.SCoresMax, "%s: S+E SKU must have S-cores", sku) assert.Positive(t, layout.ECoresMax, "%s: S+E SKU must have E-cores", sku) case PairSignatureSP: assert.Zero(t, layout.ECoresMax, "%s: S+P SKU must have no E-cores", sku) assert.Positive(t, layout.SCoresMax, "%s: S+P SKU must have S-cores", sku) assert.Positive(t, layout.PCoresMax, "%s: S+P SKU must have P-cores", sku) } assert.Contains(t, []int{1, 2}, layout.Dies, "%s: Dies %d not in {1, 2}", sku, layout.Dies) assert.Positive(t, layout.GPUCoresMax, "%s: GPUCoresMax must be > 0", sku) }) } } // Test_skuLayouts_coverage verifies that every Apple Silicon SKU referenced from // the products map has a corresponding entry in skuLayouts. Intel SKUs are // excluded — they have no per-core SMC convention worth modelling here. func Test_skuLayouts_coverage(t *testing.T) { t.Parallel() for modelID, p := range products { if p.Family == "Intel" { continue } _, ok := skuLayouts[p.CPU] assert.True(t, ok, "model %q (CPU %q, family %q) has no entry in skuLayouts; add it to the family roster", modelID, p.CPU, p.Family) } } // Test_LookupSKULayout_known verifies lookup of a few well-known SKUs returns // the expected pair signature and core counts. Catches column-swap regressions. func Test_LookupSKULayout_known(t *testing.T) { t.Parallel() tests := []struct { cpu string wantPairSig string wantPMin, wantPMax int wantEMin, wantEMax int wantSMin, wantSMax int wantDies int wantGPUMin, wantGPUMax int }{ // Base M1: 4P+4E, monolithic, 7 or 8 GPU cores. {"M1", PairSignaturePE, 4, 4, 4, 4, 0, 0, 1, 7, 8}, // M1 Ultra: dual-die fused 16P+4E. {"M1 Ultra", PairSignaturePE, 16, 16, 4, 4, 0, 0, 2, 48, 64}, // M3 Pro: variable P-count (5 or 6), 6E baseline. {"M3 Pro", PairSignaturePE, 5, 6, 6, 6, 0, 0, 1, 14, 18}, // M5 base: S+E, no P-cores. {"M5", PairSignatureSE, 0, 0, 6, 6, 3, 4, 1, 8, 10}, // M5 Pro: S+P, no E-cores. {"M5 Pro", PairSignatureSP, 10, 12, 0, 0, 5, 6, 1, 16, 20}, // A18 Pro: P+E. {"A18 Pro", PairSignaturePE, 2, 2, 4, 4, 0, 0, 1, 6, 6}, } for _, tt := range tests { t.Run(tt.cpu, func(t *testing.T) { t.Parallel() got, ok := LookupSKULayout(tt.cpu) assert.True(t, ok, "%s: must be present", tt.cpu) assert.Equal(t, tt.wantPairSig, got.PairSignature, "%s: PairSignature", tt.cpu) assert.Equal(t, tt.wantPMin, got.PCoresMin, "%s: PCoresMin", tt.cpu) assert.Equal(t, tt.wantPMax, got.PCoresMax, "%s: PCoresMax", tt.cpu) assert.Equal(t, tt.wantEMin, got.ECoresMin, "%s: ECoresMin", tt.cpu) assert.Equal(t, tt.wantEMax, got.ECoresMax, "%s: ECoresMax", tt.cpu) assert.Equal(t, tt.wantSMin, got.SCoresMin, "%s: SCoresMin", tt.cpu) assert.Equal(t, tt.wantSMax, got.SCoresMax, "%s: SCoresMax", tt.cpu) assert.Equal(t, tt.wantDies, got.Dies, "%s: Dies", tt.cpu) assert.Equal(t, tt.wantGPUMin, got.GPUCoresMin, "%s: GPUCoresMin", tt.cpu) assert.Equal(t, tt.wantGPUMax, got.GPUCoresMax, "%s: GPUCoresMax", tt.cpu) }) } } // Test_LookupSKULayout_unknown verifies that an unknown SKU string returns the // zero SKULayout and false, so callers can use the boolean to skip validation. func Test_LookupSKULayout_unknown(t *testing.T) { t.Parallel() got, ok := LookupSKULayout("M99 Imaginary") assert.False(t, ok) assert.Equal(t, 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BLRS [ui16] 256 (bytes 01 00) BLRW [ui16] 0 (bytes 00 00) BLSC [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) BLSD [ui32] 1006632960 (bytes 3c 00 00 00) BLSE [ui16] 0 (bytes 00 00) BLSF [ui16] 0 (bytes 00 00) BLSG [ui16] 0 (bytes 00 00) BLSH [ui16] 65535 (bytes ff ff) BLTA [si16] 5632 (bytes 16 00) BLTM [si16] 21504 (bytes 54 00) BLTO [ui32] 2281701376 (bytes 88 00 00 00) BLTS [si32] -1099299072 (bytes be 7a 07 00) BLTW [ui16] 0 (bytes 00 00) BLTX [si16] -30207 (bytes 8a 01) BLTY [si16] -21247 (bytes ad 01) BLTZ [ui16] 0 (bytes 00 00) BMCD [ui16] 0 (bytes 00 00) BMDA [ch8*] (bytes 46 38 59 48 50 59 30 30 31 32 4c 30 30 30 30 52 44 47 00 00 00 00 00 00 00 00 00 00 00 00 00 00) BMDB [ch8*] (bytes 37 34 31 2d 30 31 37 31 33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) BMDN [ch8*] (bytes 53 4e 37 30 33 38 00 00 00 00) BMDT [ch8*] (bytes 39 30 30 36 31 38 00) BMFL [ui16] 0 (bytes 00 00) BMSC [ui8 ] 100 (bytes 64) BMSN [ch8*] (bytes 46 51 31 48 52 57 30 31 34 4d 47 30 30 30 30 58 42 46 00 00 00) BMW1 [ch8*] (bytes 48 50 38 00) BMW2 [ch8*] (bytes 00 00 00 00) BNCB [si8 ] 1 (bytes 01) BNSC [ui8 ] 89 (bytes 59) BOCV [ui8 ] 0 (bytes 00) BOSD [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) BOSW [hex_] 1 (bytes 01) BPCC [hex_] 257 (bytes 01 01) BPEX [hex_] 0 (bytes 00) BPRS [hex_] 0 (bytes 00 00 00 00 55 ce ac e0 a3 ee 5c 7f ff 20 45 6e 90 84 6c 4a 37 e2 23 c0 a4 f4 a4 93 55 55 55 55) BQCC [si16] 3588 (bytes 0e 04) BQD1 [ui16] 50432 (bytes c5 00) BQX1 [ui16] 42279 (bytes a5 27) BR00 [ui16] 5888 (bytes 17 00) BR01 [ui16] 5888 (bytes 17 00) BR02 [ui16] 6144 (bytes 18 00) BR03 [ui16] 7424 (bytes 1d 00) BR04 [ui16] 6912 (bytes 1b 00) BR05 [ui16] 5376 (bytes 15 00) BR06 [ui16] 6656 (bytes 1a 00) BR07 [ui16] 5120 (bytes 14 00) BR08 [ui16] 5120 (bytes 14 00) BR09 [ui16] 5120 (bytes 14 00) BR0C [ui16] 6400 (bytes 19 00) BR0W [ui16] 6400 (bytes 19 00) BR10 [ui16] 5632 (bytes 16 00) BR11 [ui16] 5376 (bytes 15 00) BR12 [ui16] 6400 (bytes 19 00) BR13 [ui16] 23552 (bytes 5c 00) BR14 [ui16] 22276 (bytes 57 04) BR1W [ui16] 6400 (bytes 19 00) BRC0 [ui32] 0 (bytes 00 00 00 00) BRC1 [ui32] 0 (bytes 00 00 00 00) BROS [ui32] 838860800 (bytes 32 00 00 00) BRSC [ui8 ] 89 (bytes 59) BRSS [si16] 5376 (bytes 15 00) BSFC [flag] false (bytes 00) BT0C [flag] false (bytes 00) BT0L [flag] false (bytes 00) BT0V [flag] false (bytes 00) BTHC [ui8 ] 0 (bytes 00) BTHW [ui8 ] 0 (bytes 00) BTIL [ui32] 0 (bytes 00 00 00 00) BTRA [hex_] 235802126 (bytes 0e 0e 0e 0e 0e 0e 14 14 14 14 0e 46 28 28 14 0e 46 46 32 23) BTRO [ui8 ] 0 (bytes 00) BTRS [ui8 ] 100 (bytes 64) BTRT [flt ] 0 (bytes 00 00 00 00) BTSI [ui32] 0 (bytes 00 00 00 00) BTSV [ui32] 0 (bytes 00 00 00 00) BTTA [hex_] 201330432 (bytes 0c 00 0f 00 14 00 2d 00) BTTC [ui8 ] 4 (bytes 04) BTTI [ui8 ] 255 (bytes ff) BTTS [flag] false (bytes 00) BTVA [hex_] 3087742480 (bytes b8 0b 36 10 68 10 cc 10 62 11) BTVC [ui8 ] 5 (bytes 05) BTVI [ui8 ] 255 (bytes ff) BTVL [ui32] 0 (bytes 00 00 00 00) BUIC [ui8 ] 94 (bytes 5e) BUPT [hex_] 3104505856 (bytes b9 0b 00 00 00 00 00 00) BVCA [hex_] 1677760000 (bytes 64 00 96 00 c8 00 fa 00 40 06 ff ff) BVHA [hex_] 537039874 (bytes 20 02 94 02 08 03 7c 03 f0 03 ff ff) BVVA [hex_] 1645303825 (bytes 62 11 58 11 44 11 30 11 26 11 f4 10) BVVC [hex_] 184553216 (bytes 0b 00 0f 00 1b 00 2b 00 52 00 0a 00 0d 00 15 00 25 00 3c 00) BVVI [ui8 ] 0 (bytes 00) BVVL [ui16] 25105 (bytes 62 11) BVVM [ui16] 25105 (bytes 62 11) BVVN [ui16] 25105 (bytes 62 11) BVVO [ui16] 25105 (bytes 62 11) BVVP [ui16] 25105 (bytes 62 11) BVVQ [ui16] 0 (bytes 00 00) BVVR [ui16] 25105 (bytes 62 11) BfDC [ui32] 2693529600 (bytes a0 8c 00 00) BfRM [ui32] 813957120 (bytes 30 84 00 00) BfSC [ui8 ] 93 (bytes 5d) BnDC [ui32] 2693529600 (bytes a0 8c 00 00) CBCL [ui32] 4294967295 (bytes ff ff ff ff) CBSC [ui32] 0 (bytes 00 00 00 00) CBSV [ui32] 0 (bytes 00 00 00 00) CBTC [ui8 ] 0 (bytes 00) CH0D [hex_] 4294967295 (bytes ff ff ff ff) CH0E [hex_] 0 (bytes 00 00 00 00 00 00 00 00) CH0H [ui64] (bytes 00 00 00 00 00 00 00 00) CH0R [hex_] 0 (bytes 00 00 00 00) CH0V [ui32] 2601517056 (bytes 9b 10 00 00) CHA1 [ui32] 3389521920 (bytes ca 08 00 00) CHA2 [ui32] 0 (bytes 00 00 00 00) CHAI [ui32] 0 (bytes 00 00 00 00) CHAS [ui32] 0 (bytes 00 00 00 00) CHBI [ui32] 0 (bytes 00 00 00 00) CHBV [ui32] 1997602816 (bytes 77 11 00 00) CHCC [ui8 ] 0 (bytes 00) CHCE [ui8 ] 0 (bytes 00) CHCF [hex_] 0 (bytes 00) CHCR [ui8 ] 0 (bytes 00) CHDB [hex_] 0 (bytes 00 00) CHFS [ui32] 16777216 (bytes 01 00 00 00) CHHC [ui16] 0 (bytes 00 00) CHI1 [ui32] 0 (bytes 00 00 00 00) CHI2 [ui32] 4294967295 (bytes ff ff ff ff) CHIB [ui8 ] 0 (bytes 00) CHIC [ui8 ] 0 (bytes 00) CHIE [hex_] 0 (bytes 00) CHIF [ui32] 0 (bytes 00 00 00 00) CHIL [flag] false (bytes 00) CHIM [ui32] 2282946560 (bytes 88 13 00 00) CHIO [flag] false (bytes 00) CHIS [ui32] 0 (bytes 00 00 00 00) CHLT [hex_] 0 (bytes 00 00 00) CHM2 [hex_] 4294967295 (bytes ff ff ff ff 00 00 00 00 00 00 00 00) CHNC [hex_] 2147483648 (bytes 80 00 00 00 00 00 00 00) CHNI [si32] 0 (bytes 00 00 00 00) CHOC [ui32] 0 (bytes 00 00 00 00) CHPS [ui32] 0 (bytes 00 00 00 00) CHQi [ioft] 0 (bytes 00 00 00 00 00 00 00 00) CHQv [ioft] 0 (bytes 00 00 00 00 00 00 00 00) CHQw [ioft] 0 (bytes 00 00 00 00 00 00 00 00) CHRC [hex_] 3288924160 (bytes c4 09 00 00) CHRT [ui8 ] 0 (bytes 00) CHSC [ui8 ] 0 (bytes 00) CHSE [ui8 ] 0 (bytes 00) CHST [ui8 ] 0 (bytes 00) CHSW [hex_] 0 (bytes 00 00 00 00 00 00 00 00) CHTC [ui32] 0 (bytes 00 00 00 00) CHTE [ui32] 0 (bytes 00 00 00 00) CHTL [ui32] 269352960 (bytes 10 0e 00 00) CHTM [ui32] 0 (bytes 00 00 00 00) CHTU [ui32] 68157440 (bytes 04 10 00 00) CLBT [ui64] (bytes 4c 1c 72 8d 02 00 00 00) CLKM [hex_] 1314527683 (bytes 4e 5a 19 c3 03 00) CLKU [ui64] (bytes b1 35 73 cf 72 00 00 00) CLKo [hex_] 53832902 (bytes 03 35 6c c6 f0 34) CLSD [ui64] (bytes ad c7 17 85 0d 00 00 00) CLSP [ui64] (bytes 00 00 00 00 00 00 00 00) CLWK [ui64] (bytes 69 ca 8a 1c 72 00 00 00) D1Ac [hex_] 0 (bytes 00 00 00 00) D1Au [ui8 ] 0 (bytes 00) D1BD [ui32] 0 (bytes 00 00 00 00) D1BI [ui16] 0 (bytes 00 00) D1CA [ui16] 0 (bytes 00 00) D1CD [ui16] 0 (bytes 00 00) D1CF [ui16] 0 (bytes 00 00) D1CR [ui16] 0 (bytes 00 00) D1CS [ui8 ] 0 (bytes 00) D1CT [ui8 ] 0 (bytes 00) D1CU [ui8 ] 0 (bytes 00) D1CX [ui8 ] 0 (bytes 00) D1CY [ui8 ] 0 (bytes 00) D1CZ [ui8 ] 0 (bytes 00) D1Cb [ui8 ] 0 (bytes 00) D1Cc [ui16] 0 (bytes 00 00) D1Cf [ui16] 0 (bytes 00 00) D1Ci [ui16] 0 (bytes 00 00) D1Cm [ui16] 0 (bytes 00 00) D1Cn [ui16] 0 (bytes 00 00) D1Cr [ui16] 0 (bytes 00 00) D1Cs [ui16] 0 (bytes 00 00) D1Ct [ui16] 0 (bytes 00 00) D1Cv [ui16] 0 (bytes 00 00) D1Cw [ui16] 0 (bytes 00 00) D1DA [hex_] 13 (bytes 00 0d) D1DE [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1DI [ui8 ] 7 (bytes 07) D1DP [hex_] 0 (bytes 00 00 00 00 00 00 00 00) D1DR [flag] true (bytes 01) D1Dp [flag] false (bytes 00) D1EC [ui8 ] 0 (bytes 00) D1EF [hex_] 0 (bytes 00 00 00 00) D1Ep [flag] false (bytes 00) D1FC [ui32] 0 (bytes 00 00 00 00) D1FS [hex_] 0 (bytes 00) D1FV [hex_] 3211776 (bytes 00 31 02 00) D1IC [ui16] 65535 (bytes ff ff) D1IR [ui16] 0 (bytes 00 00) D1JA [ui32] 1276968960 (bytes 4c 1d 00 00) D1JB [ui32] 1276968960 (bytes 4c 1d 00 00) D1JD [{jst] (bytes 00 00 00 00 00 00 00 00 4c 1d 4c 1d 00 00 00 00 4c 1d 00 00 00) D1JE [ui32] 0 (bytes 00 00 00 00) D1JF [ui32] 0 (bytes 00 00 00 00) D1JG [ui32] 0 (bytes 00 00 00 00) D1JI [flt ] 0 (bytes 00 00 00 00) D1JM [ui16] 19485 (bytes 4c 1d) D1JN [ui16] 19485 (bytes 4c 1d) D1JP [ui8 ] 0 (bytes 00) D1JQ [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1JR [si32] 1276968960 (bytes 4c 1d 00 00) D1JS [si32] 1276968960 (bytes 4c 1d 00 00) D1JV [flt ] 0 (bytes 00 00 00 00) D1LC [ui8 ] 0 (bytes 00) D1LI [ui8 ] 0 (bytes 00) D1LR [ui8 ] 1 (bytes 01) D1MI [ui16] 0 (bytes 00 00) D1MP [ui32] 0 (bytes 00 00 00 00) D1MV [ui16] 0 (bytes 00 00) D1PI [si8 ] 0 (bytes 00) D1PM [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1PR [ui8 ] 0 (bytes 00) D1PS [ui8 ] 255 (bytes ff) D1PT [ui8 ] 0 (bytes 00) D1Pd [hex_] 0 (bytes 00 00) D1Pe [hex_] 0 (bytes 00 00) D1Pi [ui16] 0 (bytes 00 00) D1Ps [ui8 ] 255 (bytes ff) D1Pt [ui8 ] 0 (bytes 00) D1Rc [ui16] 0 (bytes 00 00) D1Rp [ui16] 0 (bytes 00 00) D1ST [ui8 ] 0 (bytes 00) D1SW [ui8 ] 100 (bytes 64) D1St [hex_] 0 (bytes 00 00) D1UI [hex_] 3029670194 (bytes b4 95 19 32 ce 04 e6 3a ef c9 94 5b 9a 2b 19 29) D1VC [ui16] 0 (bytes 00 00) D1VD [flt ] 0 (bytes 00 00 00 00) D1VM [ui16] 0 (bytes 00 00) D1VR [ui16] 0 (bytes 00 00) D1VX [ui16] 0 (bytes 00 00) D1Vb [ui8 ] 0 (bytes 00) D1Vd [hex_] 0 (bytes 00 00) D1Ve [hex_] 0 (bytes 00 00) D1Vm [ui8 ] 0 (bytes 00) D1Vn [ui8 ] 0 (bytes 00) D1WS [flag] false (bytes 00) D1if [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00) D1ih [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00) D1ii [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1im [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1in [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1is [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1lg [hex_] 436452256 (bytes 1a 03 bb a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D1li [ui8 ] 4 (bytes 04) D1pd [flag] false (bytes 00) D1pi [flag] false (bytes 00) D1pr [ui8 ] 0 (bytes 00) D1pt [ui8 ] 0 (bytes 00) D2Ac [hex_] 1132700905 (bytes 43 83 a4 e9) D2Au [ui8 ] 0 (bytes 00) D2BD [ui8 ] 10 (bytes 0a) D2BI [ui16] 0 (bytes 00 00) D2CA [ui16] 256 (bytes 01 00) D2CD [ui16] 256 (bytes 01 00) D2CF [ui16] 0 (bytes 00 00) D2CR [ui16] 1 (bytes 00 01) D2CS [ui8 ] 0 (bytes 00) D2CT [ui8 ] 0 (bytes 00) D2CU [ui8 ] 0 (bytes 00) D2CX [ui8 ] 0 (bytes 00) D2CY [ui8 ] 0 (bytes 00) D2CZ [ui8 ] 0 (bytes 00) D2Cb [ui8 ] 0 (bytes 00) D2Cc [ui16] 0 (bytes 00 00) D2Cf [ui16] 0 (bytes 00 00) D2Ci [ui16] 0 (bytes 00 00) D2Cm [ui16] 0 (bytes 00 00) D2Cn [ui16] 0 (bytes 00 00) D2Cr [ui16] 0 (bytes 00 00) D2Cs [ui16] 0 (bytes 00 00) D2Ct [ui16] 0 (bytes 00 00) D2Cv [ui16] 0 (bytes 00 00) D2Cw [ui16] 0 (bytes 00 00) D2DA [hex_] 11 (bytes 00 0b) D2DE [ch8*] (bytes 70 64 20 63 68 61 72 67 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2DI [ui8 ] 7 (bytes 07) D2DP [hex_] 0 (bytes 00 00 00 00 00 00 00 00) D2DR [flag] true (bytes 01) D2Dp [flag] false (bytes 00) D2EC [ui8 ] 0 (bytes 00) D2EF [hex_] 0 (bytes 00 00 00 00) D2Ep [flag] true (bytes 01) D2FC [ui32] 0 (bytes 00 00 00 00) D2FS [hex_] 0 (bytes 00) D2FV [hex_] 3211776 (bytes 00 31 02 00) D2IC [ui16] 65535 (bytes ff ff) D2IR [ui16] 0 (bytes 00 00) D2JA [ui32] 2282946560 (bytes 88 13 00 00) D2JB [ui32] 2282946560 (bytes 88 13 00 00) D2JD [{jst] (bytes 88 13 00 00 88 13 00 00 88 13 88 13 00 00 00 00 88 13 00 00 00) D2JE [ui32] 0 (bytes 00 00 00 00) D2JF [ui32] 0 (bytes 00 00 00 00) D2JG [ui32] 0 (bytes 00 00 00 00) D2JI [flt ] 0 (bytes 00 00 00 00) D2JM [ui16] 19485 (bytes 4c 1d) D2JN [ui16] 34835 (bytes 88 13) D2JP [ui8 ] 0 (bytes 00) D2JQ [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2JR [si32] -2012020736 (bytes 88 13 00 00) D2JS [si32] -2012020736 (bytes 88 13 00 00) D2JV [flt ] 0 (bytes 00 00 00 00) D2LC [ui8 ] 0 (bytes 00) D2LI [ui8 ] 32 (bytes 20) D2LR [ui8 ] 1 (bytes 01) D2MI [ui16] 0 (bytes 00 00) D2MP [ui32] 0 (bytes 00 00 00 00) D2MV [ui16] 0 (bytes 00 00) D2PI [si8 ] -1 (bytes ff) D2PM [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2PR [ui8 ] 0 (bytes 00) D2PS [ui8 ] 255 (bytes ff) D2PT [ui8 ] 0 (bytes 00) D2Pd [hex_] 0 (bytes 00 00) D2Pe [hex_] 0 (bytes 00 00) D2Pi [ui16] 0 (bytes 00 00) D2Ps [ui8 ] 255 (bytes ff) D2Pt [ui8 ] 0 (bytes 00) D2Rc [ui16] 0 (bytes 00 00) D2Rp [ui16] 47115 (bytes b8 0b) D2ST [ui8 ] 0 (bytes 00) D2St [hex_] 0 (bytes 00 00) D2UI [hex_] 2728139058 (bytes a2 9c 19 32 78 2f 3d 08 46 c2 25 7a a4 07 3d 5a) D2VC [ui16] 0 (bytes 00 00) D2VD [flt ] 0 (bytes 00 00 00 00) D2VM [ui16] 0 (bytes 00 00) D2VR [ui16] 0 (bytes 00 00) D2VX [ui16] 0 (bytes 00 00) D2Vb [ui8 ] 0 (bytes 00) D2Vd [hex_] 0 (bytes 00 00) D2Ve [hex_] 0 (bytes 00 00) D2Vm [ui8 ] 0 (bytes 00) D2Vn [ui8 ] 0 (bytes 00) D2WS [flag] false (bytes 00) D2if [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00) D2ih [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00) D2ii [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2im [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2in [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2is [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2lg [hex_] 436452256 (bytes 1a 03 bb a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) D2li [ui8 ] 4 (bytes 04) D2pd [flag] false (bytes 00) D2pi [flag] false (bytes 00) D2pr [ui8 ] 0 (bytes 00) D2pt [ui8 ] 0 (bytes 00) DBCF [ui8 ] 134 (bytes 86) DBTE [ui8 ] 1 (bytes 01) DPBS [ui32] 2553937920 (bytes 98 3a 00 00) DPBW [ui32] 2553937920 (bytes 98 3a 00 00) EVPF [hex_] 524288 (bytes 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00) IBat [flt ] 1.5796088 (bytes 9f 30 ca 3f) IBws [flt ] 1.7736454 (bytes d0 06 e3 3f) ID0R [flt ] 0.0057670567 (bytes 94 f9 bc 3b) IP0b [flt ] 6.596985 (bytes 80 1a d3 40) IP1b [flt ] 0 (bytes 00 00 00 00) IP1l [flt ] 0.0023651123 (bytes 00 00 1b 3b) IP2b [flt ] 0.27719116 (bytes 00 ec 8d 3e) IP3b [flt ] 0.07569885 (bytes 00 08 9b 3d) IP3l [flt ] 0.04814148 (bytes 00 30 45 3d) IP4b [flt ] 0 (bytes 00 00 00 00) IP4l [flt ] 0.015106201 (bytes 00 80 77 3c) IP5b [flt ] 0 (bytes 00 00 00 00) IP5l [flt ] 0.06573486 (bytes 00 a0 86 3d) IP6b [flt ] 0 (bytes 00 00 00 00) IP6l [flt ] 0.00030517578 (bytes 00 00 a0 39) IP7b [flt ] 0 (bytes 00 00 00 00) IP8b [flt ] 0 (bytes 00 00 00 00) IP9l [flt ] 3.0517578e-05 (bytes 00 00 00 38) IPMC [flt ] 1.1598825 (bytes 08 77 94 3f) IPab [flt ] 0.86408997 (bytes 00 35 5d 3f) IPbb [flt ] 1.2899628 (bytes 80 1d a5 3f) IPbl [flt ] 0.0496521 (bytes 00 60 4b 3d) IPcb [flt ] 0.16444397 (bytes 00 64 28 3e) IPcl [flt ] 0.06793213 (bytes 00 20 8b 3d) IPdb [flt ] 0 (bytes 00 00 00 00) IPgl [flt ] 0.0063171387 (bytes 00 00 cf 3b) IPhl [flt ] 0.10321045 (bytes 00 60 d3 3d) IPil [flt ] 0.008224487 (bytes 00 c0 06 3c) IQ0B [ioft] 0 (bytes 00 00 00 00 00 00 00 00) IQ0u [ioft] 0 (bytes 00 00 00 00 00 00 00 00) IR1l [flt ] 4.5776367e-05 (bytes 00 00 40 38) IR2l [flt ] 4.5776367e-05 (bytes 00 00 40 38) IRil [flt ] 0.0014038086 (bytes 00 00 b8 3a) Ib0f [flt ] 1.5796088 (bytes 9f 30 ca 3f) Ib1f [flt ] 1.4977103 (bytes f9 b4 bf 3f) KDBG [ui8 ] 1 (bytes 01) KDD0 [hex_] 4131023809 (bytes f6 3a 6b c1 dc 98 d9 09 c5 3d 20 ec 2e 89 a5 6b ce 50 e5 65 22 ad 4b d0 04 99 33 6d 00 00 63 08) KDD1 [hex_] 2754082780 (bytes a4 27 f7 dc 0b 1c 1d 8d 59 d9 72 6b 84 cd 66 c8 4c 0c a8 f8 00 00 00 00 08 eb 57 17 64 97 00 00) KDTP [ui8 ] 1 (bytes 01) KINC [ui16] 8809 (bytes 22 69) KINV [ch8*] (bytes 54 56 41 4c) KINX [hex_] 1414938956 (bytes 54 56 41 4c) KSRC [flag] true (bytes 01) LCAD [ui8 ] 13 (bytes 0d) LCAE [ui8 ] 0 (bytes 00) LDKN [ui8 ] 3 (bytes 03) LGDA [ui64] (bytes 00 30 e7 0d 03 00 00 00) LGDS [ui64] (bytes 00 04 00 00 00 00 00 00) MBSE [hex_] 4261412864 (bytes fe 00 00 00) MBSW [hex_] 0 (bytes 00 00 00 00 00 00 00 00) MBSe [hex_] 0 (bytes 00 00 00 00 00 00 00 00) MBSw [hex_] 0 (bytes 00 00 00 00 00 00 00 00) MDSV [hex_] 65288 (bytes 00 00 ff 08 01 04 00 10 00) MEKV [ui16] 44 (bytes 00 2c) MEPS [hex_] 262145 (bytes 00 04 00 01 02 01) MESS [ui8 ] 42 (bytes 2a) MEST [hex_] 399011356 (bytes 17 c8 6e 1c 72 00 00 00) MEWE [ui8 ] 1 (bytes 01) MFIC [hex_] 0 (bytes 00 00 00 00) MFIX [flag] false (bytes 00) MPPR [ui32] 2 (bytes 00 00 00 02) MSAL [hex_] 8 (bytes 08) MSAM [ui8 ] 1 (bytes 01) MSAN [ui16] 3000 (bytes 0b b8) MSAO [ui16] 3001 (bytes 0b b9) MSAR [ui8 ] 0 (bytes 00) MSAS [ui8 ] 3 (bytes 03) MSAT [ui8 ] 3 (bytes 03) MSAU [ui8 ] 0 (bytes 00) MSAV [ui8 ] 0 (bytes 00) MSFL [ch8*] (bytes 00 00 00 00) MSFN [ui8 ] 0 (bytes 00) MSKT [ui32] 0 (bytes 00 00 00 00) MSLD [ui8 ] 0 (bytes 00) MSLc [ui8 ] 0 (bytes 00) MSLo [ui8 ] 0 (bytes 00) MSMR [ui8 ] 0 (bytes 00) MSMV [flt ] 14 (bytes 00 00 60 41) MSMW [flt ] 3 (bytes 00 00 40 40) MSOC [si32] 41 (bytes 00 00 00 29) MSOP [si32] 12 (bytes 00 00 00 0c) MSSC [flag] false (bytes 00) MSSK [flag] false (bytes 00) MSSM [ui8 ] 0 (bytes 00) MST3 [ui32] 0 (bytes 00 00 00 00) MST6 [ui64] (bytes 00 00 00 00 00 00 00 00) MSTC [ui16] 0 (bytes 00 00) MSTD [ui16] 0 (bytes 00 00) MSX0 [ui16] 12422 (bytes 30 86) MSX2 [ui8 ] 12 (bytes 0c) MSX9 [ui8 ] 48 (bytes 30) MSXA [ch8*] (bytes 54 43 4d 7a) MSXC [ui32] 0 (bytes 00 00 00 00) MSXD [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) MSXH [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) MSXK [ch8*] (bytes 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80) MSXL [ch8*] (bytes 28 6b 6e 4e 28 6b 6e 4e 28 6b 6e 4e 28 6b 6e 4e) MSXN [ui8 ] 135 (bytes 87) MSXP [ui32] 0 (bytes 00 00 00 00) MSXS [ch8*] (bytes 01 02 03 04) MSXT [ui32] 4294967295 (bytes ff ff ff ff) MSXU [hex_] 0 (bytes 00 00) MSXZ [flt ] 0 (bytes 00 00 00 00) MSXb [ui8 ] 0 (bytes 00) MSXc [ui32] 0 (bytes 00 00 00 00) MSXd [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) MSXh [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) MSXk [ch8*] (bytes 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20) MSXl [ch8*] (bytes 28 6b 6e 4e 28 6b 6e 4e 28 6b 6e 4e 28 6b 6e 4e) MSXm [ui16] 8 (bytes 00 08) MSXn [ui8 ] 32 (bytes 20) MSXs [ui32] 16909060 (bytes 01 02 03 04) MSXt [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) MSxb [hex_] 794 (bytes 03 1a) MSxd [hex_] 52035584 (bytes 03 1a 00 00 a6 0b 00 00 00 00 00 a0 ec 99 6a 40 00 00 00 43 24 4d b5 40 00 00 62 76 b2 54 78 40) MSxs [hex_] 52232192 (bytes 03 1d 00 00 b9 0b 00 00 00 00 00 c0 2e 7d 6b 40) NTAP [flag] true (bytes 01) PBat [flt ] 6.696225 (bytes 7a 47 d6 40) PBwo [flt ] 0.56770235 (bytes f1 54 11 3f) PDCP [flt ] 0.605 (bytes 48 e1 1a 3f) PDTP [flt ] 1.1727023 (bytes 1c 1b 96 3f) PDTR [flt ] 0.00012608714 (bytes 42 36 04 39) PP0b [flt ] 5.976102 (bytes 3a 3c bf 40) PP1b [flt ] 0 (bytes 00 00 00 00) PP1l [flt ] 0.007844035 (bytes 44 84 00 3c) PP2b [flt ] 0.2321882 (bytes be c2 6d 3e) PP3b [flt ] 0.13820678 (bytes 14 86 0d 3e) PP3l [flt ] 0.05781003 (bytes 36 ca 6c 3d) PP4b [flt ] 0 (bytes 00 00 00 00) PP4l [flt ] 0.009522513 (bytes 50 04 1c 3c) PP5b [flt ] 0 (bytes 00 00 00 00) PP5l [flt ] 0.8579724 (bytes 14 a4 5b 3f) PP6b [flt ] 0 (bytes 00 00 00 00) PP6l [flt ] 2.7914532e-05 (bytes 00 2a ea 37) PP7b [flt ] 0 (bytes 00 00 00 00) PP8b [flt ] 0 (bytes 00 00 00 00) PP9l [flt ] 5.4859556e-05 (bytes 00 19 66 38) PPBR [flt ] 6.6574516 (bytes d8 09 d5 40) PPMC [flt ] 4.868784 (bytes 14 cd 9b 40) PPSM [flt ] 3.8808434 (bytes bd 5f 78 40) PPab [flt ] 0.8645514 (bytes 3e 53 5d 3f) PPbb [flt ] 1.1093885 (bytes 71 00 8e 3f) PPbl [flt ] 0.013588151 (bytes d6 a0 5e 3c) PPcb [flt ] 0.15355146 (bytes 98 3c 1d 3e) PPcl [flt ] 0.026725363 (bytes 26 ef da 3c) PPdb [flt ] 0 (bytes 00 00 00 00) PPgl [flt ] 0.014761477 (bytes 1f da 71 3c) PPhl [flt ] 0.00794632 (bytes 48 31 02 3c) PPil [flt ] 0.015225697 (bytes 34 75 79 3c) PR1l [flt ] 8.255476e-05 (bytes 40 21 ad 38) PR2l [flt ] 0.0001394623 (bytes a0 3c 12 39) PRil [flt ] 0.0026773182 (bytes f2 75 2f 3b) PSTR [flt ] 5.472772 (bytes f3 20 af 40) PZC0 [flt ] 3.0722558 (bytes d7 9f 44 40) PZC1 [flt ] 2.7468398 (bytes 39 cc 2f 40) PZCB [flt ] 0.021950386 (bytes 4c d1 b3 3c) PZCU [flt ] 1.1669127 (bytes 65 5d 95 3f) PZD1 [flt ] 0.18209046 (bytes ec 75 3a 3e) PZT0 [flt ] 33.564022 (bytes 8f 41 06 42) Pb0f [flt ] 6.696225 (bytes 7a 47 d6 40) Pb1f [flt ] 6.3511105 (bytes 4c 3c cb 40) Pb2f [flt ] 5.7147403 (bytes 27 df b6 40) PwrB [ui32] 2553937920 (bytes 98 3a 00 00) QA0u [ui16] 0 (bytes 00 00) QQ0u [ioft] 0 (bytes 00 00 00 00 00 00 00 00) RBID [ui32] 100 (bytes 00 00 00 64) RBRV [ui32] 10 (bytes 00 00 00 0a) RCID [ui32] 33088 (bytes 00 00 81 40) RCRV [ui32] 17 (bytes 00 00 00 11) RECI [ui64] (bytes 00 12 11 a6 02 88 80 1c) RESV [ch8*] (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) RGEN [ui8 ] 4 (bytes 04) RP00 [flt ] 0.25585938 (bytes 00 00 83 3e) RP01 [flt ] 0.17062378 (bytes 00 b8 2e 3e) RP02 [flt ] 0.07702637 (bytes 00 c0 9d 3d) RP03 [flt ] 1.6677246 (bytes 00 78 d5 3f) RP04 [flt ] 0.74438477 (bytes 00 90 3e 3f) RP05 [flt ] 0.1628418 (bytes 00 c0 26 3e) RPF0 [ui8 ] 0 (bytes 00) RPlt [ch8*] (bytes 6a 37 30 30 00 00 00 00) RcPD [si32] 0 (bytes 00 00 00 00) Rcpm [si32] 0 (bytes 00 00 00 00) SBAA [flt ] 0 (bytes 00 00 00 00) SBAC [flt ] 1.153 (bytes 81 95 93 3f) SBAP [flt ] 4.901403 (bytes 4b d8 9c 40) SBAR [flt ] 8569 (bytes 00 e4 05 46) SBAS [flt ] 89 (bytes 00 00 b2 42) SBAT [flt ] 1 (bytes 00 00 80 3f) SBAV [flt ] 4.251 (bytes 31 08 88 40) SDDS [flt ] 0 (bytes 00 00 00 00) SDM0 [flt ] 7 (bytes 00 00 e0 40) SDMX [flt ] 7 (bytes 00 00 e0 40) SDMd [flt ] 16 (bytes 00 00 80 41) SDMn [flt ] 16 (bytes 00 00 80 41) SDMs [flt ] 32 (bytes 00 00 00 42) SDMv [flt ] 255 (bytes 00 00 7f 43) SDTI [flt ] 0.0017736454 (bytes aa 79 e8 3a) SDTo [flt ] 0 (bytes 00 00 00 00) SDm0 [flt ] 7 (bytes 00 00 e0 40) SEB0 [hex_] 0 (bytes 00 00 00 00) SEB1 [hex_] 0 (bytes 00 00 00 00) SEB2 [hex_] 0 (bytes 00 00 00 00) SEB3 [hex_] 0 (bytes 00 00 00 00) SEB4 [hex_] 0 (bytes 00 00 00 00) SEB5 [hex_] 0 (bytes 00 00 00 00) SEB6 [hex_] 0 (bytes 00 00 00 00) SEC0 [hex_] 0 (bytes 00 00 00 00) SEF0 [hex_] 0 (bytes 00 00 00 00) SES0 [hex_] 0 (bytes 00 00 00 00) SES1 [hex_] 0 (bytes 00 00 00 00) SES2 [hex_] 0 (bytes 00 00 00 00) SES3 [hex_] 0 (bytes 00 00 00 00) SES4 [hex_] 0 (bytes 00 00 00 00) SES5 [hex_] 0 (bytes 00 00 00 00) SES6 [hex_] 0 (bytes 00 00 00 00) SEb0 [hex_] 0 (bytes 00 00 00 00) SEb1 [hex_] 0 (bytes 00 00 00 00) SEb2 [hex_] 0 (bytes 00 00 00 00) SEb3 [hex_] 0 (bytes 00 00 00 00) SEb4 [hex_] 0 (bytes 00 00 00 00) SEb5 [hex_] 0 (bytes 00 00 00 00) SEb6 [hex_] 0 (bytes 00 00 00 00) SEc0 [hex_] 0 (bytes 00 00 00 00) SEf0 [hex_] 0 (bytes 00 00 00 00) SEs0 [hex_] 0 (bytes 00 00 00 00) SEs1 [hex_] 0 (bytes 00 00 00 00) SEs2 [hex_] 0 (bytes 00 00 00 00) SEs3 [hex_] 0 (bytes 00 00 00 00) SEs4 [hex_] 0 (bytes 00 00 00 00) SEs5 [hex_] 0 (bytes 00 00 00 00) SEs6 [hex_] 0 (bytes 00 00 00 00) SFBN [hex_] 0 (bytes 00 00 00 00) SFBS [hex_] 0 (bytes 00 00 00 00) SFF0 [hex_] 0 (bytes 00 00 00 00) SFF1 [hex_] 0 (bytes 00 00 00 00) SFF2 [hex_] 0 (bytes 00 00 00 00) SFF3 [hex_] 0 (bytes 00 00 00 00) SFF4 [hex_] 0 (bytes 00 00 00 00) SFF5 [hex_] 0 (bytes 00 00 00 00) SFF6 [hex_] 0 (bytes 00 00 00 00) SFF7 [hex_] 0 (bytes 00 00 00 00) SFF8 [hex_] 0 (bytes 00 00 00 00) SFF9 [hex_] 0 (bytes 00 00 00 00) SFFA [hex_] 0 (bytes 00 00 00 00) SFFB [hex_] 0 (bytes 00 00 00 00) SFI0 [hex_] 0 (bytes 00 00 00 00) SFI1 [hex_] 0 (bytes 00 00 00 00) SFI2 [hex_] 0 (bytes 00 00 00 00) SMB0 [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) SMB1 [hex_] 3049324800 (bytes b5 c1 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) SMB2 [hex_] 3019898880 (bytes b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) SMBC [hex_] 134357248 (bytes 08 02 21 00 00 20) SMBS [hex_] 0 (bytes 00 00) SMBW [hex_] 1308622848 (bytes 4e 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) TB0T [flt ] 28.5 (bytes 00 00 e4 41) TBLp [flt ] 33.44162 (bytes 38 c4 05 42) TCMb [flt ] 96.101906 (bytes 2d 34 c0 42) TCMz [flt ] 111.90625 (bytes 00 d0 df 42) TG0A [ioft] 28.5 (bytes 00 80 1c 00 00 00 00 00) TG0B [ioft] 28.5 (bytes 00 80 1c 00 00 00 00 00) TG0C [ioft] 28.399994 (bytes 66 66 1c 00 00 00 00 00) TG0H [ioft] 28.399994 (bytes 66 66 1c 00 00 00 00 00) TG0V [ioft] 28.399994 (bytes 66 66 1c 00 00 00 00 00) TH0p [flt ] 38.076584 (bytes 6c 4e 18 42) TPD0 [flt ] 61.705124 (bytes 0c d2 76 42) TPD1 [flt ] 58.4552 (bytes 20 d2 69 42) TPD2 [flt ] 58.563522 (bytes 0c 41 6a 42) TPD3 [flt ] 57.263565 (bytes e4 0d 65 42) TPD4 [flt ] 59.32184 (bytes 90 49 6d 42) TPD5 [flt ] 59.10518 (bytes b4 6b 6c 42) TPD6 [flt ] 58.130203 (bytes 54 85 68 42) TPDX [flt ] 0 (bytes 00 00 00 00) TQ0d [ioft] 43.608704 (bytes d4 9b 2b 00 00 00 00 00) TQ0j [ioft] 42 (bytes 00 00 2a 00 00 00 00 00) TR0Z [ioft] 51.820007 (bytes ec d1 33 00 00 00 00 00) TR1d [ioft] 25.733734 (bytes d6 bb 19 00 00 00 00 00) TR2d [ioft] 33.113144 (bytes f7 1c 21 00 00 00 00 00) TR5p [flt ] 46.506668 (bytes d4 06 3a 42) TRD0 [flt ] 34.06299 (bytes 80 40 08 42) TRD1 [flt ] 33.414993 (bytes f4 a8 05 42) TRD2 [flt ] 33.414993 (bytes f4 a8 05 42) TRD3 [flt ] 34.17099 (bytes 18 af 08 42) TRDX [flt ] 0 (bytes 00 00 00 00) TS0p [flt ] 54.604843 (bytes 5c 6b 5a 42) TS1p [flt ] 59.980774 (bytes 50 ec 6f 42) TTSp [flt ] 26.082855 (bytes b0 a9 d0 41) TUCp [flt ] 34.857666 (bytes 40 6e 0b 42) TVA0 [flt ] 20.22112 (bytes db c4 a1 41) TVA1 [flt ] 21.787788 (bytes 64 4d ae 41) TVD0 [flt ] 96.101906 (bytes 2d 34 c0 42) TVDi [si32] 83886080 (bytes 05 00 00 00) TVMD [flt ] 1 (bytes 00 00 80 3f) TVMR [flt ] 64.25298 (bytes 87 81 80 42) TVS0 [flt ] 31.172697 (bytes af 61 f9 41) TVS1 [flt ] 31.886295 (bytes 22 17 ff 41) TVS3 [flt ] 32.129635 (bytes bf 84 00 42) TVS4 [flt ] 33.311043 (bytes 82 3e 05 42) TVV0 [flt ] 0 (bytes 00 00 00 00) TVVi [si32] 0 (bytes 00 00 00 00) TVmS [flt ] 64.25298 (bytes 87 81 80 42) TW0p [flt ] 41.94023 (bytes cc c2 27 42) Ta00 [flt ] 0 (bytes 00 00 00 00) Ta01 [flt ] 6.525 (bytes cd cc d0 40) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] 7.325 (bytes 66 66 ea 40) Ta0C [flt ] 0 (bytes 00 00 00 00) Ta0D [flt ] 6.725 (bytes 33 33 d7 40) Ta0O [flt ] 0 (bytes 00 00 00 00) Ta0P [flt ] 7.725 (bytes 33 33 f7 40) Ta0R [flt ] 0 (bytes 00 00 00 00) Ta0S [flt ] 7.725 (bytes 33 33 f7 40) Ta0U [flt ] 0 (bytes 00 00 00 00) Ta0V [flt ] 7.025 (bytes cd cc e0 40) TaTp [flt ] 32.75183 (bytes e0 01 03 42) Te04 [flt ] 77.69375 (bytes 33 63 9b 42) Te05 [flt ] 82.61875 (bytes cd 3c a5 42) Te06 [flt ] 88.640625 (bytes 00 48 b1 42) Te0R [flt ] 69.31753 (bytes 93 a2 8a 42) Te0S [flt ] 73.74253 (bytes 2d 7c 93 42) Te0T [flt ] 77.375 (bytes 00 c0 9a 42) Tex0 [flt ] 81.809494 (bytes 76 9e a3 42) Tex1 [flt ] 88.640625 (bytes 00 48 b1 42) Tex2 [flt ] 73.38319 (bytes 31 c4 92 42) Tex3 [flt ] 77.375 (bytes 00 c0 9a 42) Tg04 [flt ] 62.688957 (bytes 7e c1 7a 42) Tg05 [flt ] 66.413956 (bytes f2 d3 84 42) Tg0C [flt ] 63.862648 (bytes 5a 73 7f 42) Tg0D [flt ] 68.08765 (bytes e0 2c 88 42) Tg0K [flt ] 62.33503 (bytes 12 57 79 42) Tg0L [flt ] 66.56003 (bytes bc 1e 85 42) Tg0d [flt ] 63.28016 (bytes e2 1e 7d 42) Tg0e [flt ] 67.30516 (bytes 3e 9c 86 42) Tp00 [flt ] 85.63325 (bytes 39 44 ab 42) Tp01 [flt ] 92.75825 (bytes 39 84 b9 42) Tp02 [flt ] 106.296875 (bytes 00 98 d4 42) Tp04 [flt ] 87.35511 (bytes d1 b5 ae 42) Tp05 [flt ] 94.28011 (bytes 6b 8f bc 42) Tp06 [flt ] 110.5625 (bytes 00 20 dd 42) Tp08 [flt ] 86.0098 (bytes 05 05 ac 42) Tp09 [flt ] 91.43481 (bytes 9f de b6 42) Tp0A [flt ] 106.234375 (bytes 00 78 d4 42) Tp0C [flt ] 88.1769 (bytes 93 5a b0 42) Tp0D [flt ] 96.101906 (bytes 2d 34 c0 42) Tp0E [flt ] 111.90625 (bytes 00 d0 df 42) Tp0l [flt ] 75.68425 (bytes 56 5e 97 42) Tp0m [flt ] 80.00925 (bytes bc 04 a0 42) Tp0n [flt ] 88.34375 (bytes 00 b0 b0 42) Tp0o [flt ] 74.83265 (bytes 51 aa 95 42) Tp0q [flt ] 81.157646 (bytes b7 50 a2 42) Tp0t [flt ] 93.515625 (bytes 00 08 bb 42) Tpx0 [flt ] 92.37475 (bytes df bf b8 42) Tpx1 [flt ] 111.90625 (bytes 00 d0 df 42) Tpx2 [flt ] 79.76834 (bytes 64 89 9f 42) Tpx3 [flt ] 93.515625 (bytes 00 08 bb 42) Ts00 [flt ] 66.147606 (bytes 93 4b 84 42) Ts01 [flt ] 66.147606 (bytes 93 4b 84 42) Ts02 [flt ] 72.828125 (bytes 00 a8 91 42) Ts04 [flt ] 67.31417 (bytes db a0 86 42) Ts05 [flt ] 67.31417 (bytes db a0 86 42) Ts06 [flt ] 74.265625 (bytes 00 88 94 42) Ts08 [flt ] 63.65429 (bytes fe 9d 7e 42) Ts09 [flt ] 63.65429 (bytes fe 9d 7e 42) Ts0A [flt ] 68.8125 (bytes 00 a0 89 42) Ts0C [flt ] 63.816048 (bytes a2 43 7f 42) Ts0D [flt ] 63.816048 (bytes a2 43 7f 42) Ts0E [flt ] 69.109375 (bytes 00 38 8a 42) Ts0G [flt ] 74.8205 (bytes 19 a4 95 42) Ts0H [flt ] 74.8205 (bytes 19 a4 95 42) Ts0I [flt ] 84.5 (bytes 00 00 a9 42) Ts0K [flt ] 72.43232 (bytes 59 dd 90 42) Ts0L [flt ] 72.43232 (bytes 59 dd 90 42) Ts0M [flt ] 81.296875 (bytes 00 98 a2 42) Tsx0 [flt ] 78.85631 (bytes 6e b6 9d 42) Tsx1 [flt ] 84.5 (bytes 00 00 a9 42) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) U1B0 [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00) U1D0 [ui16] 0 (bytes 00 00) U1N0 [ui32] 0 (bytes 00 00 00 00) U1R0 [ui16] 0 (bytes 00 00) U1S0 [ui8 ] 0 (bytes 00) U1bs [ui8 ] 0 (bytes 00) U2B0 [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00) U2D0 [ui16] 0 (bytes 00 00) U2N0 [ui32] 0 (bytes 00 00 00 00) U2R0 [ui16] 0 (bytes 00 00) U2S0 [ui8 ] 0 (bytes 00) U2bs [ui8 ] 0 (bytes 00) UB0T [ui64] (bytes 00 00 00 00 00 00 00 00) UBAC [si16] 0 (bytes 00 00) UBAT [si16] 0 (bytes 00 00) UBAV [ui16] 0 (bytes 00 00) UBCR [hex_] 1 (bytes 01) UBD0 [ui16] 0 (bytes 00 00) UBDD [si16] 0 (bytes 00 00) UBFC [ui16] 0 (bytes 00 00) UBHR [hex_] 1 (bytes 01) UBID [si16] 0 (bytes 00 00) UBIS [si16] 0 (bytes 00 00) UBLP [ui16] 0 (bytes 00 00) UBNC [ui16] 0 (bytes 00 00) UBPC [si16] 0 (bytes 00 00) UBPF [ui16] 0 (bytes 00 00) UBPI [si16] 0 (bytes 00 00) UBPN [ui16] 0 (bytes 00 00) UBPR [si16] 0 (bytes 00 00) UBPV [ui16] 0 (bytes 00 00) UBRA [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) UBRM [si16] 0 (bytes 00 00) UBRS [si16] 0 (bytes 00 00) UBSS [ui16] 0 (bytes 00 00) UBUI [ui8 ] 0 (bytes 00) UCFG [hex_] 1044 (bytes 04 14) UPOC [ui16] 0 (bytes 00 00) UPOF [hex_] 0 (bytes 00) UPOR [flag] false (bytes 00) UPOS [ui8 ] 0 (bytes 00) UPOT [ui8 ] 0 (bytes 00) VBUS [ui32] 0 (bytes 00 00 00 00) VBat [flt ] 4.241502 (bytes 62 ba 87 40) VD0R [flt ] 0.019882623 (bytes e2 e0 a2 3c) VP0R [flt ] 4.206817 (bytes 3f 9e 86 40) VP0b [flt ] 0.9058838 (bytes 00 e8 67 3f) VP0s [flt ] 1.8306274 (bytes 00 52 ea 3f) VP1b [flt ] 0.0034179688 (bytes 00 00 60 3b) VP1l [flt ] 3.3165588 (bytes 80 42 54 40) VP1s [flt ] 1.8257446 (bytes 00 b2 e9 3f) VP2b [flt ] 0.8376465 (bytes 00 70 56 3f) VP3b [flt ] 1.8257446 (bytes 00 b2 e9 3f) VP3l [flt ] 1.2008362 (bytes 00 b5 99 3f) VP3s [flt ] 1.2477417 (bytes 00 b6 9f 3f) VP4b [flt ] 0.96751404 (bytes 00 af 77 3f) VP4l [flt ] 0.6303711 (bytes 00 60 21 3f) VP4s [flt ] 1.2477417 (bytes 00 b6 9f 3f) VP5b [flt ] 0.006713867 (bytes 00 00 dc 3b) VP5l [flt ] 2.6285858 (bytes c0 3a 28 40) VP5s [flt ] 1.2440796 (bytes 00 3e 9f 3f) VP6b [flt ] 1.2492523 (bytes 80 e7 9f 3f) VP6l [flt ] 1.8294067 (bytes 00 2a ea 3f) VP7b [flt ] 0.7697754 (bytes 00 10 45 3f) VP8b [flt ] 0.60139465 (bytes 00 f5 19 3f) VP9l [flt ] 1.7976379 (bytes 00 19 e6 3f) VPBR [flt ] 4.2189336 (bytes 81 01 87 40) VPab [flt ] 1.000534 (bytes 80 11 80 3f) VPbb [flt ] 0.86001587 (bytes 00 2a 5c 3f) VPbl [flt ] 0.5144501 (bytes 00 b3 03 3f) VPcb [flt ] 0.9337616 (bytes 00 0b 6f 3f) VPcl [flt ] 0.8108673 (bytes 00 95 4f 3f) VPdb [flt ] 0.8845978 (bytes 00 75 62 3f) VPgl [flt ] 1.1248932 (bytes 80 fc 8f 3f) VPhl [flt ] 0.8413086 (bytes 00 60 57 3f) VPil [flt ] 1.4982452 (bytes 80 c6 bf 3f) VQ0l [ioft] 3.9249878 (bytes cc ec 03 00 00 00 00 00) VQ0u [ioft] 0 (bytes 00 00 00 00 00 00 00 00) VQ1u [ioft] 0.07499695 (bytes 33 13 00 00 00 00 00 00) VQDD [ioft] 4.269989 (bytes 1e 45 04 00 00 00 00 00) VR1l [flt ] 1.8034363 (bytes 00 d7 e6 3f) VR2l [flt ] 3.0466003 (bytes 80 fb 42 40) VR5c [flt ] 4.992462 (bytes 40 c2 9f 40) VRbi [flt ] 4.2226562 (bytes 00 20 87 40) VRil [flt ] 1.4996643 (bytes 00 f5 bf 3f) VRmi [flt ] 4.2165527 (bytes 00 ee 86 40) VRwo [flt ] 21.327438 (bytes 98 9e aa 41) Vb1f [flt ] 4.241502 (bytes 62 ba 87 40) Vb3f [flt ] 4.242703 (bytes 39 c4 87 40) WA0u [ui16] 0 (bytes 00 00) aBID [ui32] 0 (bytes 00 00 00 00) aDC# [ui32] 805306368 (bytes 30 00 00 00) aP00 [ui32] 0 (bytes 00 00 00 00) aP01 [ui32] 2030698496 (bytes 79 0a 00 00) aP02 [ui32] 201326592 (bytes 0c 00 00 00) aP58 [ui32] 939917312 (bytes 38 06 00 00) aP5a [ui32] 2450063360 (bytes 92 09 00 00) aP5b [ui32] 3959422976 (bytes ec 00 00 00) aP5c [ui32] 419430400 (bytes 19 00 00 00) aP5d [ui32] 50331648 (bytes 03 00 00 00) aP5e [ui32] 520159232 (bytes 1f 01 00 00) aP70 [ui32] 3456892928 (bytes ce 0c 00 00) aP71 [ui32] 3104178176 (bytes b9 06 00 00) aP72 [ui32] 1745354752 (bytes 68 08 00 00) aP73 [ui32] 3657760768 (bytes da 05 00 00) aP74 [ui32] 50331648 (bytes 03 00 00 00) aP75 [ui32] 33554432 (bytes 02 00 00 00) aP76 [ui32] 3221553152 (bytes c0 05 00 00) aP77 [ui32] 50331648 (bytes 03 00 00 00) aP78 [ui32] 2030370816 (bytes 79 05 00 00) aP79 [ui32] 2785542144 (bytes a6 08 00 00) aP7a [ui32] 50331648 (bytes 03 00 00 00) aP7b [ui32] 33554432 (bytes 02 00 00 00) aP7c [ui32] 50331648 (bytes 03 00 00 00) aP7d [ui32] 786432 (bytes 00 0c 00 00) aP7e [ui32] 4094164992 (bytes f4 08 00 00) bFRC [ui8 ] 0 (bytes 00) bFRS [ui8 ] 0 (bytes 00) bHLD [ui32] 0 (bytes 00 00 00 00) bPHD [flag] false (bytes 00) bfD0 [hex_] 0 (bytes 00 00) blr0 [ui16] 512 (bytes 02 00) bvt0 [ui8 ] 0 (bytes 00) ceAa [flt ] 0 (bytes 00 00 00 00) ceAb [flt ] 74.23089 (bytes 37 76 94 42) ceHa [flt ] 0 (bytes 00 00 00 00) ceHb [flt ] 74.23089 (bytes 37 76 94 42) ceHc [flt ] 0 (bytes 00 00 00 00) ceP0 [flt ] 0 (bytes 00 00 00 00) ceP1 [flt ] 0 (bytes 00 00 00 00) ceP3 [flt ] 0 (bytes 00 00 00 00) cePC [flt ] 0 (bytes 00 00 00 00) cePD [flt ] 0 (bytes 00 00 00 00) cePT [flt ] 0 (bytes 00 00 00 00) cePa [flt ] 0 (bytes 00 00 00 00) cePm [flt ] 0 (bytes 00 00 00 00) cePz [flt ] 0 (bytes 00 00 00 00) ceTa [flt ] 0 (bytes 00 00 00 00) ceTb [flt ] 45 (bytes 00 00 34 42) ceU0 [flt ] 0 (bytes 00 00 00 00) ceU1 [flt ] 0 (bytes 00 00 00 00) ceU3 [flt ] 0 (bytes 00 00 00 00) ceUa [flt ] 0 (bytes 00 00 00 00) ceUb [flt ] 74.23089 (bytes 37 76 94 42) cepm [flt ] 0 (bytes 00 00 00 00) cmDH [flt ] 0 (bytes 00 00 00 00) cmDM [flt ] 0 (bytes 00 00 00 00) cmDS [flt ] 0 (bytes 00 00 00 00) cmDU [flt ] 0 (bytes 00 00 00 00) cmDc [flt ] -10000 (bytes 00 40 1c c6) cmDd [flt ] -100 (bytes 00 00 c8 c2) cmDx [flt ] 0 (bytes 00 00 00 00) cmPC [flt ] 0 (bytes 00 00 00 00) cmPS [flt ] 65 (bytes 00 00 82 42) cmPz [flt ] 65 (bytes 00 00 82 42) cmRL [flt ] 0 (bytes 00 00 00 00) cmRT [flt ] 0 (bytes 00 00 00 00) cmTm [flt ] 1 (bytes 00 00 80 3f) cmTz [flt ] 0 (bytes 00 00 00 00) cmrx [flt ] 0 (bytes 00 00 00 00) csHa [flt ] 0 (bytes 00 00 00 00) csHb [flt ] 0 (bytes 00 00 00 00) csHc [flt ] 0 (bytes 00 00 00 00) csP0 [flt ] 0 (bytes 00 00 00 00) csP1 [flt ] 0 (bytes 00 00 00 00) csP3 [flt ] 0 (bytes 00 00 00 00) csPC [flt ] 0 (bytes 00 00 00 00) csPD [flt ] 0 (bytes 00 00 00 00) csPT [flt ] 0 (bytes 00 00 00 00) csPz [flt ] 0 (bytes 00 00 00 00) csSW [flt ] 1 (bytes 00 00 80 3f) csU0 [flt ] 0 (bytes 00 00 00 00) csU1 [flt ] 0 (bytes 00 00 00 00) csU3 [flt ] 0 (bytes 00 00 00 00) dDRM [flt ] 0 (bytes 00 00 00 00) dDT1 [flt ] 68.59011 (bytes 23 2e 89 42) dDT2 [flt ] 67.91805 (bytes 0b d6 87 42) dMTF [flt ] 0 (bytes 00 00 00 00) ddPm [flt ] 0 (bytes 00 00 00 00) dePm [flt ] 0 (bytes 00 00 00 00) eeHa [flt ] -100 (bytes 00 00 c8 c2) eeHb [flt ] -8.743256 (bytes 60 e4 0b c1) eeHc [flt ] -30.342987 (bytes 70 be f2 c1) eeMV [flt ] 0 (bytes 00 00 00 00) eeP0 [flt ] -15.827303 (bytes a2 3c 7d c1) eeP1 [flt ] -13.113705 (bytes bc d1 51 c1) eeP3 [flt ] -14.870365 (bytes 04 ed 6d c1) eePC [flt ] -89.00041 (bytes 36 00 b2 c2) eePD [flt ] -29.199308 (bytes 2f 98 e9 c1) eePT [flt ] -26.528185 (bytes b9 39 d4 c1) eePm [flt ] -24.6875 (bytes 00 80 c5 c1) eePz [flt ] -62.25316 (bytes 3c 03 79 c2) eeU0 [flt ] -6.827303 (bytes 44 79 da c0) eeU1 [flt ] -6.1137047 (bytes 78 a3 c3 c0) eeU3 [flt ] -5.870365 (bytes 08 da bb c0) eemV [flt ] 0 (bytes 00 00 00 00) eepm [flt ] -5.5000014 (bytes 03 00 b0 c0) f000 [flt ] 32.75183 (bytes e0 01 03 42) f002 [flt ] 28.5 (bytes 00 00 e4 41) f003 [flt ] 41.94023 (bytes cc c2 27 42) f004 [flt ] 46.506668 (bytes d4 06 3a 42) f006 [flt ] 26.082855 (bytes b0 a9 d0 41) f007 [flt ] 38.076584 (bytes 6c 4e 18 42) fcB0 [flt ] 89.00041 (bytes 36 00 b2 42) fcB1 [flt ] 89.00041 (bytes 36 00 b2 42) fdA0 [flt ] 0.027369808 (bytes a6 36 e0 3c) fdA1 [flt ] 0.023522569 (bytes 67 b2 c0 3c) fdA2 [flt ] 0.0340744 (bytes 99 91 0b 3d) fdS0 [flt ] 2.8748531 (bytes 98 fd 37 40) fdS1 [flt ] 4.1350493 (bytes 53 52 84 40) fdS2 [flt ] 3.8526597 (bytes fa 91 76 40) fdSm [flt ] 4.1350493 (bytes 53 52 84 40) fdSz [flt ] 4.1022863 (bytes ee 45 83 40) fdU0 [flt ] 1.2743485 (bytes da 1d a3 3f) fdU1 [flt ] 1.1892164 (bytes 3e 38 98 3f) fdU2 [flt ] 0.9080223 (bytes 26 74 68 3f) fiB0 [flt ] 1.8006917 (bytes 11 7d e6 3f) fpC0 [flt ] 0.00010986459 (bytes 1a 67 e6 38) ft00 [flt ] 32.58298 (bytes f9 54 02 42) ft01 [flt ] 57.196106 (bytes d0 c8 64 42) ft02 [flt ] 28.443562 (bytes 6a 8c e3 41) ft03 [flt ] 42.226917 (bytes 5d e8 28 42) ft04 [flt ] 45.23147 (bytes 06 ed 34 42) ft05 [flt ] 52.04728 (bytes 6a 30 50 42) ft06 [flt ] 25.863695 (bytes d9 e8 ce 41) ft07 [flt ] 37.77127 (bytes c8 15 17 42) ftA0 [flt ] 6.525 (bytes cd cc d0 40) ftA1 [flt ] 7.325 (bytes 66 66 ea 40) ftA2 [flt ] 6.725 (bytes 33 33 d7 40) ftA3 [flt ] 7.725 (bytes 33 33 f7 40) ftA4 [flt ] 7.725 (bytes 33 33 f7 40) ftA5 [flt ] 7.025 (bytes cd cc e0 40) ftB0 [flt ] 28.471815 (bytes 47 c6 e3 41) ftD0 [flt ] 88.32836 (bytes 1f a8 b0 42) ftD1 [flt ] 82.90614 (bytes f2 cf a5 42) ftD2 [flt ] 89.65701 (bytes 64 50 b3 42) ftDu [flt ] 91.256744 (bytes 74 83 b6 42) ftE0 [flt ] 82.61875 (bytes cd 3c a5 42) ftE1 [flt ] 73.74253 (bytes 2d 7c 93 42) ftG0 [flt ] 66.413956 (bytes f2 d3 84 42) ftG1 [flt ] 68.08765 (bytes e0 2c 88 42) ftG2 [flt ] 66.56003 (bytes bc 1e 85 42) ftG3 [flt ] 67.30516 (bytes 3e 9c 86 42) ftNn [flt ] 37.824497 (bytes 49 4c 17 42) ftP0 [flt ] 92.75825 (bytes 39 84 b9 42) ftP1 [flt ] 94.28011 (bytes 6b 8f bc 42) ftP2 [flt ] 91.43481 (bytes 9f de b6 42) ftP3 [flt ] 96.101906 (bytes 2d 34 c0 42) ftP4 [flt ] 80.00925 (bytes bc 04 a0 42) ftP5 [flt ] 81.157646 (bytes b7 50 a2 42) ftRp [flt ] 68.3125 (bytes 00 a0 88 42) ftTA [flt ] 45 (bytes 00 00 34 42) ftVV [flt ] 0 (bytes 00 00 00 00) ftrx [flt ] 7.9999986 (bytes fd ff ff 40) fuHb [flt ] 100 (bytes 00 00 c8 42) fuU0 [flt ] 38 (bytes 00 00 18 42) fuU1 [flt ] 38 (bytes 00 00 18 42) fuU3 [flt ] 38 (bytes 00 00 18 42) gP00 [ui32] 0 (bytes 00 00 00 00) gP01 [ui32] 0 (bytes 00 00 00 00) gP02 [ui32] 0 (bytes 00 00 00 00) gP03 [ui32] 0 (bytes 00 00 00 00) gP04 [ui32] 0 (bytes 00 00 00 00) gP05 [ui32] 0 (bytes 00 00 00 00) gP06 [ui32] 0 (bytes 00 00 00 00) gP07 [ui32] 0 (bytes 00 00 00 00) gP08 [ui32] 0 (bytes 00 00 00 00) gP09 [ui32] 0 (bytes 00 00 00 00) gP0a [ui32] 0 (bytes 00 00 00 00) gP0b [ui32] 0 (bytes 00 00 00 00) gP0c [ui32] 0 (bytes 00 00 00 00) gP0d [ui32] 0 (bytes 00 00 00 00) gP0e [ui32] 0 (bytes 00 00 00 00) gP0f [ui32] 0 (bytes 00 00 00 00) gP10 [ui32] 0 (bytes 00 00 00 00) gP11 [ui32] 0 (bytes 00 00 00 00) gP12 [ui32] 0 (bytes 00 00 00 00) gP13 [ui32] 0 (bytes 00 00 00 00) gP14 [ui32] 0 (bytes 00 00 00 00) gP15 [ui32] 0 (bytes 00 00 00 00) gP16 [ui32] 0 (bytes 00 00 00 00) gP17 [ui32] 0 (bytes 00 00 00 00) gP18 [ui32] 0 (bytes 00 00 00 00) gP19 [ui32] 0 (bytes 00 00 00 00) iaCR [flt ] -64.25298 (bytes 87 81 80 c2) iaDC [flt ] 0 (bytes 00 00 00 00) iaDD [flt ] 0 (bytes 00 00 00 00) iaMR [flt ] 0 (bytes 00 00 00 00) iaOR [flt ] 0 (bytes 00 00 00 00) iaPA [flt ] 65535 (bytes 00 ff 7f 47) iaRR [flt ] 0 (bytes 00 00 00 00) iaRT [flt ] 0 (bytes 00 00 00 00) iaw0 [flt ] 0.1705 (bytes 8d 97 2e 3e) iaw1 [flt ] 0.1641 (bytes d5 09 28 3e) iaw2 [flt ] 0.3532 (bytes a1 d6 b4 3e) iaw3 [flt ] 0.2978 (bytes 3e 79 98 3e) iaw4 [flt ] 0.3151 (bytes ca 54 a1 3e) iaw5 [flt ] -0.577 (bytes 46 b6 13 bf) iaw6 [flt ] -1.9678 (bytes df e0 fb bf) iaw7 [flt ] 0.7194 (bytes 99 2a 38 3f) iaw8 [flt ] -0.341 (bytes 8d 97 ae be) iaw9 [flt ] -0.6353 (bytes 05 a3 22 bf) isHa [flt ] 0 (bytes 00 00 00 00) isHb [flt ] 89.96875 (bytes 00 f0 b3 42) isHc [flt ] 0 (bytes 00 00 00 00) isP0 [flt ] 0 (bytes 00 00 00 00) isP1 [flt ] 0 (bytes 00 00 00 00) isP3 [flt ] 0 (bytes 00 00 00 00) isPC [flt ] 0 (bytes 00 00 00 00) isPD [flt ] 0 (bytes 00 00 00 00) isPT [flt ] 0 (bytes 00 00 00 00) isPm [flt ] 0 (bytes 00 00 00 00) isPz [flt ] 0 (bytes 00 00 00 00) isU0 [flt ] 0 (bytes 00 00 00 00) isU1 [flt ] 0 (bytes 00 00 00 00) isU3 [flt ] 0 (bytes 00 00 00 00) ispm [flt ] 0 (bytes 00 00 00 00) lMTT [flt ] 0 (bytes 00 00 00 00) lTTH [flt ] 0 (bytes 00 00 00 00) lTTM [flt ] 0 (bytes 00 00 00 00) lTTS [flt ] 0 (bytes 00 00 00 00) mMTF [si32] 0 (bytes 00 00 00 00) mRRS [flt ] 0 (bytes 00 00 00 00) mTLL [si32] 50331648 (bytes 03 00 00 00) mTPL [si32] 16777216 (bytes 01 00 00 00) maHa [si32] 0 (bytes 00 00 00 00) maHb [si32] 0 (bytes 00 00 00 00) maHc [si32] 0 (bytes 00 00 00 00) maLR [flt ] 0 (bytes 00 00 00 00) maP0 [si32] 0 (bytes 00 00 00 00) maP1 [si32] 0 (bytes 00 00 00 00) maP3 [si32] 0 (bytes 00 00 00 00) maPC [si32] 0 (bytes 00 00 00 00) maPD [si32] 0 (bytes 00 00 00 00) maPT [si32] 0 (bytes 00 00 00 00) maPm [si32] 0 (bytes 00 00 00 00) maPz [si32] 0 (bytes 00 00 00 00) maSR [flt ] 0 (bytes 00 00 00 00) maU0 [si32] 0 (bytes 00 00 00 00) maU1 [si32] 0 (bytes 00 00 00 00) maU3 [si32] 0 (bytes 00 00 00 00) mdPm [flt ] 0 (bytes 00 00 00 00) meHa [flt ] -100 (bytes 00 00 c8 c2) meHb [flt ] -8.743256 (bytes 60 e4 0b c1) meHc [flt ] -30.342987 (bytes 70 be f2 c1) meHi [flt ] -22.999998 (bytes ff ff b7 c1) meHp [flt ] -22.999998 (bytes ff ff b7 c1) meMi [flt ] -22.999998 (bytes ff ff b7 c1) meMp [flt ] -22.999998 (bytes ff ff b7 c1) meP0 [flt ] -29.936792 (bytes 8d 7e ef c1) meP1 [flt ] -13.1137085 (bytes c0 d1 51 c1) meP3 [flt ] -100 (bytes 00 00 c8 c2) mePC [flt ] -89.00041 (bytes 36 00 b2 c2) mePD [flt ] -29.19931 (bytes 30 98 e9 c1) mePT [flt ] -100 (bytes 00 00 c8 c2) mePi [flt ] -22.999998 (bytes ff ff b7 c1) mePp [flt ] -22.999998 (bytes ff ff b7 c1) mePz [flt ] -116.537544 (bytes 39 13 e9 c2) meSi [flt ] -22.999998 (bytes ff ff b7 c1) meSp [flt ] -24.6875 (bytes 00 80 c5 c1) meU0 [flt ] -6.827301 (bytes 40 79 da c0) meU1 [flt ] -6.1137085 (bytes 80 a3 c3 c0) meU3 [flt ] -5.8703613 (bytes 00 da bb c0) mepH [flt ] -100 (bytes 00 00 c8 c2) mepM [flt ] -100 (bytes 00 00 c8 c2) mepS [flt ] -100 (bytes 00 00 c8 c2) mepm [flt ] -100 (bytes 00 00 c8 c2) midv [flt ] 3 (bytes 00 00 40 40) mlMH [flt ] 56 (bytes 00 00 60 42) mlMM [flt ] 66 (bytes 00 00 84 42) mlMS [flt ] 65 (bytes 00 00 82 42) mlMV [flt ] 66 (bytes 00 00 84 42) mlPC [flt ] 31 (bytes 00 00 f8 41) mlmH [flt ] 51 (bytes 00 00 4c 42) mlmM [flt ] 61 (bytes 00 00 74 42) mlmS [flt ] 61 (bytes 00 00 74 42) mlmV [flt ] 61 (bytes 00 00 74 42) mlmx [flt ] 100 (bytes 00 00 c8 42) mlpH [flt ] 0 (bytes 00 00 00 00) mlpM [flt ] 0 (bytes 00 00 00 00) mlpS [flt ] 0 (bytes 00 00 00 00) mlpm [flt ] 0 (bytes 00 00 00 00) mm00 [si32] 0 (bytes 00 00 00 00) mm02 [flt ] 0 (bytes 00 00 00 00) mmHb [si32] 83886080 (bytes 05 00 00 00) mmMD [si32] 16777216 (bytes 01 00 00 00) mmPN [si32] 0 (bytes 00 00 00 00) mmPm [si32] 0 (bytes 00 00 00 00) mmRS [si32] 0 (bytes 00 00 00 00) mmTL [si32] 50331648 (bytes 03 00 00 00) mmTP [si32] 16777216 (bytes 01 00 00 00) mmTT [si32] 0 (bytes 00 00 00 00) mmTa [si32] 0 (bytes 00 00 00 00) mmV1 [si32] 0 (bytes 00 00 00 00) mmV2 [si32] 0 (bytes 00 00 00 00) mmV3 [si32] 0 (bytes 00 00 00 00) mmV4 [si32] 0 (bytes 00 00 00 00) mmdv [si32] 50331648 (bytes 03 00 00 00) mmpj [flt ] 0 (bytes 00 00 00 00) mmta [si32] 16777216 (bytes 01 00 00 00) msA1 [flt ] 100 (bytes 00 00 c8 42) msHb [flt ] 5 (bytes 00 00 a0 40) msN1 [flt ] 100 (bytes 00 00 c8 42) msP0 [flt ] 68.33529 (bytes ab ab 88 42) msP1 [flt ] 51.532677 (bytes 76 21 4e 42) msP2 [flt ] 55.29787 (bytes 05 31 5d 42) msPm [flt ] 51.532677 (bytes 76 21 4e 42) msU1 [flt ] 90.81045 (bytes f3 9e b5 42) msU2 [flt ] 94.5597 (bytes 91 1e bd 42) msUd [flt ] 90.81045 (bytes f3 9e b5 42) msa1 [flt ] 100 (bytes 00 00 c8 42) msa2 [flt ] 100 (bytes 00 00 c8 42) msn0 [flt ] 4.4695296 (bytes 63 06 8f 40) msn1 [flt ] 0 (bytes 00 00 00 00) msn2 [flt ] 0 (bytes 00 00 00 00) msnm [flt ] 0 (bytes 00 00 00 00) msp0 [flt ] 68.33529 (bytes ab ab 88 42) msp1 [flt ] 51.532677 (bytes 76 21 4e 42) msp2 [flt ] 55.29787 (bytes 05 31 5d 42) mspm [flt ] 51.532677 (bytes 76 21 4e 42) msu0 [flt ] 90.81045 (bytes f3 9e b5 42) msu1 [flt ] 64.670845 (bytes 79 57 81 42) msu2 [flt ] 94.5597 (bytes 91 1e bd 42) msu3 [flt ] 74.713486 (bytes 4e 6d 95 42) msu4 [flt ] 90.81045 (bytes f3 9e b5 42) mxS0 [flt ] 31.172697 (bytes af 61 f9 41) mxS1 [flt ] 31.886295 (bytes 22 17 ff 41) mxS3 [flt ] 32.129635 (bytes bf 84 00 42) mxS4 [flt ] 33.311043 (bytes 82 3e 05 42) mxTa [flt ] 0 (bytes 00 00 00 00) oBD0 [flt ] 0 (bytes 00 00 00 00) oBD1 [flt ] 20 (bytes 00 00 a0 41) oBD2 [flt ] 40 (bytes 00 00 20 42) oBD3 [flt ] 60 (bytes 00 00 70 42) oBD4 [flt ] 80 (bytes 00 00 a0 42) oBD5 [flt ] 100 (bytes 00 00 c8 42) oF18 [flt ] 65 (bytes 00 00 82 42) oF19 [flt ] 8 (bytes 00 00 00 41) oF20 [flt ] 0.5 (bytes 00 00 00 3f) oF21 [flt ] 3 (bytes 00 00 40 40) oF22 [flt ] 3 (bytes 00 00 40 40) oF23 [flt ] 0.2 (bytes cd cc 4c 3e) oF24 [flt ] 65 (bytes 00 00 82 42) oF25 [flt ] 8 (bytes 00 00 00 41) oF26 [flt ] 65 (bytes 00 00 82 42) oF27 [flt ] 8 (bytes 00 00 00 41) oF28 [flt ] 0.5 (bytes 00 00 00 3f) oF29 [flt ] 3 (bytes 00 00 40 40) oF30 [flt ] 3 (bytes 00 00 40 40) oF31 [flt ] 0.2 (bytes cd cc 4c 3e) oF32 [flt ] 65 (bytes 00 00 82 42) oF33 [flt ] 8 (bytes 00 00 00 41) oF34 [flt ] 65 (bytes 00 00 82 42) oF35 [flt ] 8 (bytes 00 00 00 41) oF36 [flt ] 0.5 (bytes 00 00 00 3f) oF37 [flt ] 3 (bytes 00 00 40 40) oF38 [flt ] 3 (bytes 00 00 40 40) oF39 [flt ] 0.2 (bytes cd cc 4c 3e) oF40 [flt ] 65 (bytes 00 00 82 42) oF41 [flt ] 8 (bytes 00 00 00 41) oF45 [flt ] 0.4 (bytes cd cc cc 3e) oF46 [flt ] 0.4 (bytes cd cc cc 3e) oF47 [flt ] 0.2 (bytes cd cc 4c 3e) oF48 [flt ] 0.4 (bytes cd cc cc 3e) oF49 [flt ] 0.4 (bytes cd cc cc 3e) oF50 [flt ] 0.2 (bytes cd cc 4c 3e) oF51 [flt ] 0.4 (bytes cd cc cc 3e) oF52 [flt ] 0.4 (bytes cd cc cc 3e) oF53 [flt ] 0.2 (bytes cd cc 4c 3e) oF54 [flt ] 0.5 (bytes 00 00 00 3f) oF55 [flt ] 0.5 (bytes 00 00 00 3f) oFT0 [flt ] 5 (bytes 00 00 a0 40) oFT1 [flt ] 5 (bytes 00 00 a0 40) oFT2 [flt ] 20 (bytes 00 00 a0 41) oFT3 [flt ] 20 (bytes 00 00 a0 41) oFT4 [flt ] 1 (bytes 00 00 80 3f) oFT5 [flt ] 1 (bytes 00 00 80 3f) oFUA [flt ] 7e-45 (bytes 05 00 00 00) oFUa [flt ] 5 (bytes 00 00 a0 40) oKd0 [flt ] 0 (bytes 00 00 00 00) oKd1 [flt ] 0 (bytes 00 00 00 00) oKd2 [flt ] 0 (bytes 00 00 00 00) oKi0 [flt ] 0.05 (bytes cd cc 4c 3d) oKi1 [flt ] 0.15 (bytes 9a 99 19 3e) oKi2 [flt ] 0.1 (bytes cd cc cc 3d) oKp0 [flt ] 1 (bytes 00 00 80 3f) oKp1 [flt ] 1.5 (bytes 00 00 c0 3f) oKp2 [flt ] 1.2 (bytes 9a 99 99 3f) oRL0 [flt ] 0.99 (bytes a4 70 7d 3f) oRL1 [flt ] 0.4 (bytes cd cc cc 3e) oRP0 [flt ] 1.00001 (bytes 54 00 80 3f) oRP1 [flt ] 1.00001 (bytes 54 00 80 3f) oRP2 [flt ] 1.00001 (bytes 54 00 80 3f) oRP3 [flt ] 1.00001 (bytes 54 00 80 3f) oRP4 [flt ] 1.00001 (bytes 54 00 80 3f) oRP5 [flt ] 1.00001 (bytes 54 00 80 3f) oRP6 [flt ] 1.00001 (bytes 54 00 80 3f) oRP7 [flt ] 1.00001 (bytes 54 00 80 3f) oRP8 [flt ] 1.00001 (bytes 54 00 80 3f) oRP9 [flt ] 1.00001 (bytes 54 00 80 3f) oRW0 [flt ] 0.1705 (bytes 8d 97 2e 3e) oRW1 [flt ] 0.1641 (bytes d5 09 28 3e) oRW2 [flt ] 0.3532 (bytes a1 d6 b4 3e) oRW3 [flt ] 0.2978 (bytes 3e 79 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] 0.5 (bytes 00 00 00 3f) ost4 [flt ] 2 (bytes 00 00 00 40) ostb [flt ] 0 (bytes 00 00 00 00) osu0 [flt ] 0 (bytes 00 00 00 00) osu1 [flt ] 20 (bytes 00 00 a0 41) osu2 [flt ] 40 (bytes 00 00 20 42) osu3 [flt ] 60 (bytes 00 00 70 42) osu4 [flt ] 80 (bytes 00 00 a0 42) osu5 [flt ] 100 (bytes 00 00 c8 42) osz0 [flt ] 100 (bytes 00 00 c8 42) osz1 [flt ] 0 (bytes 00 00 00 00) osz2 [flt ] 0 (bytes 00 00 00 00) osz3 [flt ] 100 (bytes 00 00 c8 42) osz4 [flt ] 0 (bytes 00 00 00 00) osz5 [flt ] 0 (bytes 00 00 00 00) ott0 [flt ] 0 (bytes 00 00 00 00) ott1 [flt ] 20 (bytes 00 00 a0 41) ott2 [flt ] 80 (bytes 00 00 a0 42) ott3 [flt ] 90 (bytes 00 00 b4 42) ott4 [flt ] 95 (bytes 00 00 be 42) ott5 [flt ] 100 (bytes 00 00 c8 42) ouH0 [flt ] 40 (bytes 00 00 20 42) ouH1 [flt ] 40 (bytes 00 00 20 42) ouZ0 [flt ] 40 (bytes 00 00 20 42) ouZ1 [flt ] 40 (bytes 00 00 20 42) oua0 [flt ] -100 (bytes 00 00 c8 c2) oua1 [flt ] -1 (bytes 00 00 80 bf) oua2 [flt ] 0 (bytes 00 00 00 00) oua3 [flt ] 1 (bytes 00 00 80 3f) oua4 [flt ] 100 (bytes 00 00 c8 42) oua5 [flt ] -100 (bytes 00 00 c8 c2) oua6 [flt ] -1 (bytes 00 00 80 bf) oua7 [flt ] 0 (bytes 00 00 00 00) oua8 [flt ] 1 (bytes 00 00 80 3f) oua9 [flt ] 100 (bytes 00 00 c8 42) oud0 [flt ] 100 (bytes 00 00 c8 42) oud1 [flt ] 100 (bytes 00 00 c8 42) oud2 [flt ] 200 (bytes 00 00 48 43) oud3 [flt ] 100 (bytes 00 00 c8 42) ouf0 [flt ] 120 (bytes 00 00 f0 42) ouf1 [flt ] 120 (bytes 00 00 f0 42) ouf2 [flt ] 120 (bytes 00 00 f0 42) ouf3 [flt ] 120 (bytes 00 00 f0 42) oum0 [flt ] -100 (bytes 00 00 c8 c2) oum1 [flt ] -1 (bytes 00 00 80 bf) oum2 [flt ] 0 (bytes 00 00 00 00) oum3 [flt ] 1 (bytes 00 00 80 3f) oum4 [flt ] 100 (bytes 00 00 c8 42) oum5 [flt ] -100 (bytes 00 00 c8 c2) oum6 [flt ] -1 (bytes 00 00 80 bf) oum7 [flt ] 0 (bytes 00 00 00 00) oum8 [flt ] 1 (bytes 00 00 80 3f) oum9 [flt ] 100 (bytes 00 00 c8 42) oun0 [flt ] -100 (bytes 00 00 c8 c2) oun1 [flt ] -1 (bytes 00 00 80 bf) oun2 [flt ] 0 (bytes 00 00 00 00) oun3 [flt ] 1 (bytes 00 00 80 3f) oun4 [flt ] 100 (bytes 00 00 c8 42) oun5 [flt ] -100 (bytes 00 00 c8 c2) oun6 [flt ] -1 (bytes 00 00 80 bf) oun7 [flt ] 0 (bytes 00 00 00 00) oun8 [flt ] 1 (bytes 00 00 80 3f) oun9 [flt ] 100 (bytes 00 00 c8 42) oup0 [flt ] 0 (bytes 00 00 00 00) oup1 [flt ] 20 (bytes 00 00 a0 41) oup2 [flt ] 40 (bytes 00 00 20 42) oup3 [flt ] 45 (bytes 00 00 34 42) oup4 [flt ] 45 (bytes 00 00 34 42) oup5 [flt ] 45 (bytes 00 00 34 42) ov00 [flt ] -0.35 (bytes 33 33 b3 be) ov01 [flt ] 0.05 (bytes cd cc 4c 3d) ov02 [flt ] 0.09 (bytes ec 51 b8 3d) ov03 [flt ] 0.87 (bytes 52 b8 5e 3f) ov10 [flt ] -0.3 (bytes 9a 99 99 be) ov11 [flt ] 0.07 (bytes 29 5c 8f 3d) ov12 [flt ] 0.71 (bytes 8f c2 35 3f) ov13 [flt ] 0.08 (bytes 0a d7 a3 3d) ov14 [flt ] 0.14 (bytes 29 5c 0f 3e) ov20 [flt ] -1.35 (bytes cd cc ac bf) ov21 [flt ] 0.43 (bytes f6 28 dc 3e) ov22 [flt ] 0.41 (bytes 85 eb d1 3e) ov23 [flt ] 0.15 (bytes 9a 99 19 3e) ov30 [flt ] -0.57 (bytes 85 eb 11 bf) ov31 [flt ] 0.66 (bytes c3 f5 28 3f) ov32 [flt ] 0.09 (bytes ec 51 b8 3d) ov33 [flt ] 0.25 (bytes 00 00 80 3e) ov40 [flt ] -3.48 (bytes 52 b8 5e c0) ov41 [flt ] 0.4 (bytes cd cc cc 3e) ov42 [flt ] -1.7 (bytes 9a 99 d9 bf) ov43 [flt ] -0.06 (bytes 8f c2 75 bd) ov44 [flt ] 2.38 (bytes ec 51 18 40) ov50 [flt ] -0.69 (bytes d7 a3 30 bf) ov51 [flt ] 2.65 (bytes 9a 99 29 40) ov52 [flt ] 0.12 (bytes 8f c2 f5 3d) ov53 [flt ] -4.48 (bytes 29 5c 8f c0) ov54 [flt ] 3.93 (bytes 1f 85 7b 40) ov55 [flt ] -1.19 (bytes ec 51 98 bf) ovD3 [flt ] 2 (bytes 00 00 00 40) ovD4 [flt ] 50 (bytes 00 00 48 42) ovD5 [flt ] 33 (bytes 00 00 04 42) ovDa [flt ] 10 (bytes 00 00 20 41) ovDd [flt ] 2 (bytes 00 00 00 40) ovDe [flt ] 50 (bytes 00 00 48 42) ovH0 [flt ] -50 (bytes 00 00 48 c2) ovH1 [flt ] -5 (bytes 00 00 a0 c0) ovH2 [flt ] 0 (bytes 00 00 00 00) ovH3 [flt ] 2.5 (bytes 00 00 20 40) ovH4 [flt ] 5 (bytes 00 00 a0 40) ovH5 [flt ] 50 (bytes 00 00 48 42) ovH6 [flt ] -50 (bytes 00 00 48 c2) ovH7 [flt ] -2 (bytes 00 00 00 c0) ovH8 [flt ] 0 (bytes 00 00 00 00) ovH9 [flt ] 2.5 (bytes 00 00 20 40) ovHa [flt ] 5 (bytes 00 00 a0 40) ovHb [flt ] 50 (bytes 00 00 48 42) ovHe [flt ] -50 (bytes 00 00 48 c2) ovHf [flt ] -5 (bytes 00 00 a0 c0) ovHg [flt ] 0 (bytes 00 00 00 00) ovHh [flt ] 2.5 (bytes 00 00 20 40) ovHi [flt ] 5 (bytes 00 00 a0 40) ovHj [flt ] 50 (bytes 00 00 48 42) ovHk [flt ] -50 (bytes 00 00 48 c2) ovHl [flt ] -2 (bytes 00 00 00 c0) ovHm [flt ] 0 (bytes 00 00 00 00) ovHn [flt ] 2.5 (bytes 00 00 20 40) ovHo [flt ] 5 (bytes 00 00 a0 40) ovHp [flt ] 50 (bytes 00 00 48 42) ovM0 [flt ] -50 (bytes 00 00 48 c2) ovM1 [flt ] -5 (bytes 00 00 a0 c0) ovM2 [flt ] 0 (bytes 00 00 00 00) ovM3 [flt ] 3 (bytes 00 00 40 40) ovM4 [flt ] 6 (bytes 00 00 c0 40) ovM5 [flt ] 50 (bytes 00 00 48 42) ovM6 [flt ] -50 (bytes 00 00 48 c2) ovM7 [flt ] -2 (bytes 00 00 00 c0) ovM8 [flt ] 0 (bytes 00 00 00 00) ovM9 [flt ] 3 (bytes 00 00 40 40) ovMa [flt ] 6 (bytes 00 00 c0 40) ovMb [flt ] 50 (bytes 00 00 48 42) ovMe [flt ] -50 (bytes 00 00 48 c2) ovMf [flt ] -5 (bytes 00 00 a0 c0) ovMg [flt ] 0 (bytes 00 00 00 00) ovMh [flt ] 2.5 (bytes 00 00 20 40) ovMi [flt ] 5 (bytes 00 00 a0 40) ovMj [flt ] 50 (bytes 00 00 48 42) ovMk [flt ] -50 (bytes 00 00 48 c2) ovMl [flt ] -2 (bytes 00 00 00 c0) ovMm [flt ] 0 (bytes 00 00 00 00) ovMn [flt ] 2.5 (bytes 00 00 20 40) ovMo [flt ] 5 (bytes 00 00 a0 40) ovMp [flt ] 50 (bytes 00 00 48 42) ovRT [flt ] 13.5 (bytes 00 00 58 41) ovS0 [flt ] -50 (bytes 00 00 48 c2) ovS1 [flt ] -2 (bytes 00 00 00 c0) ovS2 [flt ] 0 (bytes 00 00 00 00) ovS3 [flt ] 3 (bytes 00 00 40 40) ovS4 [flt ] 6 (bytes 00 00 c0 40) ovS5 [flt ] 50 (bytes 00 00 48 42) ovS6 [flt ] -50 (bytes 00 00 48 c2) ovS7 [flt ] -2 (bytes 00 00 00 c0) ovS8 [flt ] 0 (bytes 00 00 00 00) ovS9 [flt ] 3 (bytes 00 00 40 40) ovSa [flt ] 6 (bytes 00 00 c0 40) ovSb [flt ] 50 (bytes 00 00 48 42) ovSe [flt ] -50 (bytes 00 00 48 c2) ovSf [flt ] -5 (bytes 00 00 a0 c0) ovSg [flt ] 0 (bytes 00 00 00 00) ovSh [flt ] 2.5 (bytes 00 00 20 40) ovSi [flt ] 5 (bytes 00 00 a0 40) ovSj [flt ] 50 (bytes 00 00 48 42) ovSk [flt ] -50 (bytes 00 00 48 c2) ovSl [flt ] -2 (bytes 00 00 00 c0) ovSm [flt ] 0 (bytes 00 00 00 00) ovSn [flt ] 2.5 (bytes 00 00 20 40) ovSo [flt ] 5 (bytes 00 00 a0 40) ovSp [flt ] 50 (bytes 00 00 48 42) ovT0 [flt ] -100 (bytes 00 00 c8 c2) ovT1 [flt ] 0 (bytes 00 00 00 00) ovT2 [flt ] 200 (bytes 00 00 48 43) ovU0 [flt ] 93 (bytes 00 00 ba 42) ovU1 [flt ] 93 (bytes 00 00 ba 42) ovU2 [flt ] 93 (bytes 00 00 ba 42) ovUM [flt ] 0.999 (bytes 77 be 7f 3f) ovd5 [flt ] 33 (bytes 00 00 04 42) ovf0 [flt ] 2 (bytes 00 00 00 40) ovf1 [flt ] 5 (bytes 00 00 a0 40) ovma [flt ] 1 (bytes 00 00 80 3f) ovmb [flt ] 2 (bytes 00 00 00 40) ovmc [flt ] 3 (bytes 00 00 40 40) ovta [flt ] 1 (bytes 00 00 80 3f) ovtb [flt ] 0 (bytes 00 00 00 00) ovtc [flt ] 1 (bytes 00 00 80 3f) pcIO [hex_] 0 (bytes 00 00 00 00 00 00 00 00) pcRT [hex_] 0 (bytes 00 00 00 00 00 00 00 00) pmDB [ui32] 16711680 (bytes 00 ff 00 00) pmFC [hex_] 0 (bytes 00 00) pmFL [hex_] 256 (bytes 01 00) pmHC [ui8 ] 3 (bytes 03) ptdE [hex_] 675604493 (bytes 28 44 e8 0d 03 00 00 00 c0 38 e8 0d 03 00 00 00 d8 25 e8 0d 03 00 00 00 0b 00 05 00 01 00 00 00) rCPU [ui32] 3808624640 (bytes e3 03 00 00) rCTL [ui32] 0 (bytes 00 00 00 00) rLOW [ui32] 1895956480 (bytes 71 02 00 00) rRAM [ui32] 4244766720 (bytes fd 02 00 00) rSOC [ui32] 1208156160 (bytes 48 03 00 00) rVD2 [ui32] 3221422080 (bytes c0 03 00 00) rVDF [ui32] 620953600 (bytes 25 03 00 00) rtrx [flt ] 0 (bytes 00 00 00 00) sALD [ui8 ] 0 (bytes 00) sDBI [hex_] 0 (bytes 00 00 00 00 00 00 00) sEOC [ui16] 512 (bytes 02 00) sPST [ui32] 3819916802 (bytes e3 af 4e 02) saB0 [flt ] 89 (bytes 00 00 b2 42) saBc [flt ] 1 (bytes 00 00 80 3f) saLR [flt ] 0 (bytes 00 00 00 00) saSR [flt ] 0 (bytes 00 00 00 00) siB0 [flt ] 1.153 (bytes 81 95 93 3f) smPm [flt ] 0 (bytes 00 00 00 00) smS0 [si32] 0 (bytes 00 00 00 00) smS1 [si32] 0 (bytes 00 00 00 00) smS3 [si32] 0 (bytes 00 00 00 00) smSa [si32] 16777216 (bytes 01 00 00 00) smT0 [flt ] 0 (bytes 00 00 00 00) smT1 [flt ] 0 (bytes 00 00 00 00) smT3 [flt ] 0 (bytes 00 00 00 00) smTa [flt ] 1 (bytes 00 00 80 3f) smTs [flt ] 0 (bytes 00 00 00 00) smW0 [si32] 16777216 (bytes 01 00 00 00) smW2 [si32] 16777216 (bytes 01 00 00 00) sms0 [si32] 0 (bytes 00 00 00 00) sms1 [si32] 0 (bytes 00 00 00 00) sms3 [si32] 0 (bytes 00 00 00 00) smsa [si32] 33554432 (bytes 02 00 00 00) smss [si32] 0 (bytes 00 00 00 00) smt0 [flt ] 0 (bytes 00 00 00 00) smt1 [flt ] 0 (bytes 00 00 00 00) smt3 [flt ] 0 (bytes 00 00 00 00) smta [flt ] 3 (bytes 00 00 40 40) smts [flt ] 0 (bytes 00 00 00 00) smu0 [flt ] 0 (bytes 00 00 00 00) smu1 [flt ] 0 (bytes 00 00 00 00) smu3 [flt ] 0 (bytes 00 00 00 00) smua [si32] 0 (bytes 00 00 00 00) smub [si32] 0 (bytes 00 00 00 00) smuc [si32] 0 (bytes 00 00 00 00) smw0 [flt ] 0 (bytes 00 00 00 00) smw2 [flt ] 0 (bytes 00 00 00 00) spAd [flt ] 0.021950386 (bytes 4c d1 b3 3c) spC0 [flt ] 0.00012608714 (bytes 42 36 04 39) spP0 [flt ] 0.25585938 (bytes 00 00 83 3e) spP1 [flt ] 0.17062378 (bytes 00 b8 2e 3e) spP2 [flt ] 0.07702637 (bytes 00 c0 9d 3d) spP3 [flt ] 1.6677246 (bytes 00 78 d5 3f) spP4 [flt ] 0.74438477 (bytes 00 90 3e 3f) spP5 [flt ] 0.1628418 (bytes 00 c0 26 3e) spRX [flt ] 0.24765015 (bytes 00 98 7d 3e) spSd [flt ] 2.7468398 (bytes 39 cc 2f 40) spT0 [flt ] 33.564022 (bytes 8f 41 06 42) spUd [flt ] 1.1669127 (bytes 65 5d 95 3f) spsX [flt ] 2.8308105 (bytes 00 2c 35 40) stB0 [flt ] 28.5 (bytes 00 00 e4 41) stM0 [flt ] 54.604843 (bytes 5c 6b 5a 42) stM1 [flt ] 59.980774 (bytes 50 ec 6f 42) stNx [flt ] 38.076584 (bytes 6c 4e 18 42) stRX [flt ] 7 (bytes 00 00 e0 40) stS0 [flt ] 71.147606 (bytes 93 4b 8e 42) stS2 [flt ] 68.65429 (bytes ff 4e 89 42) stS3 [flt ] 68.81605 (bytes d1 a1 89 42) stS4 [flt ] 79.8205 (bytes 19 a4 9f 42) ste1 [flt ] 0 (bytes 00 00 00 00) ste2 [flt ] 0 (bytes 00 00 00 00) ste3 [flt ] 0 (bytes 00 00 00 00) ste4 [flt ] 0 (bytes 00 00 00 00) stp0 [flt ] 0 (bytes 00 00 00 00) stp1 [flt ] 0 (bytes 00 00 00 00) str0 [flt ] 8 (bytes 00 00 00 41) stri [si32] 0 (bytes 00 00 00 00) strx [flt ] 8 (bytes 00 00 00 41) suRv [flt ] 255 (bytes 00 00 7f 43) uMTT [flt ] 10 (bytes 00 00 20 41) uSPm [flt ] 0 (bytes 00 00 00 00) uu00 [flt ] 0 (bytes 00 00 00 00) uu01 [flt ] 1 (bytes 00 00 80 3f) uuC0 [flt ] 7 (bytes 00 00 e0 40) uuHa [flt ] 200 (bytes 00 00 48 43) uuHb [flt ] 100 (bytes 00 00 c8 42) uuHc [flt ] 120 (bytes 00 00 f0 42) uuP0 [flt ] 47 (bytes 00 00 3c 42) uuP1 [flt ] 45 (bytes 00 00 34 42) uuP3 [flt ] 47 (bytes 00 00 3c 42) uuPN [flt ] 0 (bytes 00 00 00 00) uuPT [flt ] 55 (bytes 00 00 5c 42) uuPm [flt ] 93 (bytes 00 00 ba 42) uuPz [flt ] 65 (bytes 00 00 82 42) uuU0 [flt ] 38 (bytes 00 00 18 42) uuU1 [flt ] 38 (bytes 00 00 18 42) uuU3 [flt ] 38 (bytes 00 00 18 42) uuUT [flt ] 13 (bytes 00 00 50 41) uuV1 [flt ] 0 (bytes 00 00 00 00) uuV2 [flt ] 0 (bytes 00 00 00 00) uuV3 [flt ] 0 (bytes 00 00 00 00) uuV4 [flt ] 0 (bytes 00 00 00 00) uuha [flt ] 105 (bytes 00 00 d2 42) uupm [flt ] 13.5 (bytes 00 00 58 41) uurt [flt ] 12.5 (bytes 00 00 48 41) uuta [flt ] 1 (bytes 00 00 80 3f) vDRC [flt ] 10 (bytes 00 00 20 41) vDRD [flt ] 10 (bytes 00 00 20 41) vRTM [flt ] 10 (bytes 00 00 20 41) vTSp [si32] -1199177472 (bytes b8 86 01 00) vePm [flt ] 0 (bytes 00 00 00 00) voA0 [flt ] 0.25153828 (bytes a0 c9 80 3e) voA1 [flt ] 0.25153828 (bytes a0 c9 80 3e) voA2 [flt ] 0.25153828 (bytes a0 c9 80 3e) voAp [flt ] 0.25153828 (bytes a0 c9 80 3e) voD0 [flt ] 65 (bytes 00 00 82 42) voD1 [flt ] 3 (bytes 00 00 40 40) voD2 [flt ] 65 (bytes 00 00 82 42) voP0 [flt ] 65 (bytes 00 00 82 42) voP1 [flt ] 3 (bytes 00 00 40 40) voP2 [flt ] 65 (bytes 00 00 82 42) voPM [flt ] 65 (bytes 00 00 82 42) voPi [si32] 0 (bytes 00 00 00 00) voPp [flt ] 65 (bytes 00 00 82 42) voSU [flt ] 0 (bytes 00 00 00 00) voSi [si32] 0 (bytes 00 00 00 00) voTA [flt ] 45 (bytes 00 00 34 42) voTL [flt ] 3 (bytes 00 00 40 40) voTP [flt ] 1 (bytes 00 00 80 3f) voTi [si32] 83886080 (bytes 05 00 00 00) voTj [si32] 83886080 (bytes 05 00 00 00) voU0 [flt ] 2.4326851 (bytes 1d b1 1b 40) voU1 [flt ] 0.9215359 (bytes c7 e9 6b 3f) voU2 [flt ] 2.4326851 (bytes 1d b1 1b 40) voUT [flt ] 0 (bytes 00 00 00 00) voUi [si32] 0 (bytes 00 00 00 00) voUp [flt ] 2.4326851 (bytes 1d b1 1b 40) voa0 [flt ] 74.23089 (bytes 37 76 94 42) voai [si32] 16777216 (bytes 01 00 00 00) vop0 [flt ] 0 (bytes 00 00 00 00) vop1 [flt ] 0 (bytes 00 00 00 00) vopi [si32] 0 (bytes 00 00 00 00) vopj [si32] 0 (bytes 00 00 00 00) vopp [flt ] 65 (bytes 00 00 82 42) vou0 [flt ] 74.23089 (bytes 37 76 94 42) voui [si32] 67108864 (bytes 04 00 00 00) vouj [si32] 0 (bytes 00 00 00 00) vout [flt ] 0 (bytes 00 00 00 00) w000 [si32] 0 (bytes 00 00 00 00) w002 [si32] 0 (bytes 00 00 00 00) w00m [si32] 16777216 (bytes 01 00 00 00) wd00 [si32] 0 (bytes 00 00 00 00) wd02 [si32] 0 (bytes 00 00 00 00) wdPm [flt ] 0 (bytes 00 00 00 00) wdpm [flt ] 0 (bytes 00 00 00 00) wiPm [flt ] 0.1 (bytes cd cc cc 3d) wipm [flt ] 12.5 (bytes 00 00 48 41) wpPm [flt ] 1.2 (bytes 9a 99 99 3f) wppm [flt ] 20 (bytes 00 00 a0 41) xBPT [flt ] 0.25153828 (bytes a0 c9 80 3e) xDPE [flt ] 5.5061674 (bytes 86 32 b0 40) xDPs [flt ] 65 (bytes 00 00 82 42) xLPM [flt ] 65 (bytes 00 00 82 42) xPPT [flt ] 65 (bytes 00 00 82 42) xUPT [flt ] 2.4326851 (bytes 1d b1 1b 40) xdps [flt ] 0 (bytes 00 00 00 00) yuha [flt ] 105 (bytes 00 00 d2 42) zEDC [hex_] 16898816 (bytes 01 01 db 00 aa 79 e8 3a 00 00 80 ff 00 00 80 ff 00 00 80 ff 00 00 80 ff 00 00 80 ff 00 00 80 ff) zES0 [hex_] 0 (bytes 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) zSAa [ui64] (bytes 44 fb ff ff 70 00 00 00) zSAc [ui32] 3087007744 (bytes b8 00 00 00) zSAi [ui32] 0 (bytes 00 00 00 00) zSBa [ui64] (bytes 00 00 00 00 00 00 00 00) zSBc [ui32] 0 (bytes 00 00 00 00) zSBi [si32] -1596063745 (bytes a0 dd ff ff) zSDa [si64] (bytes 92 01 18 ff ff ff ff ff) zSDc [ui32] 1376387072 (bytes 52 0a 00 00) zSEi [ui64] (bytes a0 71 07 00 00 00 00 00) zSEj [ui32] 0 (bytes 00 00 00 00) zSEm [ch8*] (bytes 39 6a 34 35 78 62 74 7a 77 35 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00) zSEs [ui32] 0 (bytes 00 00 00 00) zSEw [ui64] (bytes e4 6c 07 00 00 00 00 00) zSLa [si64] (bytes db cb 02 01 00 00 00 00) zSLc [ui32] 185270272 (bytes 0b 0b 00 00) zSLi [si32] 1612840960 (bytes 60 22 00 00) zSPa [ui64] (bytes 6d cd 1a 00 00 00 00 00) zSPc [ui32] 3103784960 (bytes b9 00 00 00) zSPe [ui32] 0 (bytes 00 00 00 00) zSPi [ui32] 0 (bytes 00 00 00 00) zSPm [ui32] 0 (bytes 00 00 00 00) zSPn [ui32] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-intel-t2.txt ================================================ TB0T [flt ] 19 (bytes 98 99 99 41) TB1T [flt ] 19 (bytes 98 99 99 41) TB2T [flt ] 19 (bytes c8 cc 98 41) TCHP [flt ] 21 (bytes 88 b6 a7 41) TCMb [flt ] 36 (bytes 6a 6f 0e 42) TCMz [flt ] 51 (bytes 00 70 4b 42) TG0B [ioft] (bytes 33 33 13 00 00 00 00 00) TG0C [ioft] (bytes 00 00 13 00 00 00 00 00) TG0H [ioft] (bytes 00 00 13 00 00 00 00 00) TG0V [ioft] (bytes 33 33 13 00 00 00 00 00) TG1B [ioft] (bytes 33 33 13 00 00 00 00 00) TG2B [ioft] (bytes 99 19 13 00 00 00 00 00) TH0B [flt ] 20 (bytes c0 19 a3 41) TH0T [flt ] 22 (bytes e8 f9 b0 41) TH0x [flt ] 22 (bytes e8 f9 b0 41) TIOP [flt ] 20 (bytes 00 00 9c 41) TMVR [flt ] 21 (bytes d0 d8 ab 41) TPMP [flt ] 24 (bytes 68 e1 bc 41) TPSP [flt ] 22 (bytes f8 4b b2 41) TR0Z [ioft] (bytes 9a d9 33 00 00 00 00 00) TR1d [ioft] (bytes 3d 1f 16 00 00 00 00 00) TR2d [ioft] (bytes 67 6c 15 00 00 00 00 00) TR3d [ioft] (bytes ef 2d 16 00 00 00 00 00) TR4d [ioft] (bytes 35 45 14 00 00 00 00 00) TR5d [ioft] (bytes 82 cc 13 00 00 00 00 00) TSCD [flt ] 25 (bytes b8 e1 cb 41) TSDD [flt ] 24 (bytes f0 de c2 41) TT0D [flt ] 19 (bytes 00 80 95 41) TT1D [flt ] 18 (bytes 00 80 93 41) TVA0 [flt ] 16 (bytes b6 24 82 41) TVD0 [flt ] 38 (bytes 18 24 18 42) TVS0 [flt ] 21 (bytes e4 7b a9 41) TVS1 [flt ] 19 (bytes 43 a6 9b 41) TVSx [flt ] 21 (bytes e4 7b a9 41) TW0P [flt ] 23 (bytes 50 22 b4 41) Ta1a [flt ] 0 (bytes 00 00 00 00) Ta1b [flt ] 10 (bytes 66 66 26 41) Ta1x [flt ] 0 (bytes 00 00 00 00) Ta1z [flt ] 16 (bytes 00 00 80 41) TaMP [flt ] 21 (bytes 38 63 ab 41) Tarc [flt ] 0 (bytes 00 00 00 00) Tc0a [flt ] 27 (bytes 48 39 da 41) Tc0b [flt ] 27 (bytes 48 39 da 41) Tc0x [flt ] 30 (bytes 00 00 ee 41) Tc0z [flt ] 30 (bytes 00 00 ee 41) Tc1a [flt ] 0 (bytes 00 00 00 00) Tc1b [flt ] 0 (bytes 00 00 00 00) Tc1x [flt ] 0 (bytes 00 00 00 00) Tc1z [flt ] 0 (bytes 00 00 00 00) Tc2a [flt ] 0 (bytes 00 00 00 00) Tc2b [flt ] 0 (bytes 00 00 00 00) Tc2x [flt ] 0 (bytes 00 00 00 00) Tc2z [flt ] 0 (bytes 00 00 00 00) Tc3a [flt ] 0 (bytes 00 00 00 00) Tc3b [flt ] 0 (bytes 00 00 00 00) Tc3x [flt ] 0 (bytes 00 00 00 00) Tc3z [flt ] 0 (bytes 00 00 00 00) Tc4a [flt ] 0 (bytes 00 00 00 00) Tc4b [flt ] 0 (bytes 00 00 00 00) Tc4x [flt ] 0 (bytes 00 00 00 00) Tc4z [flt ] 0 (bytes 00 00 00 00) Tc5a [flt ] 0 (bytes 00 00 00 00) Tc5b [flt ] 0 (bytes 00 00 00 00) Tc5x [flt ] 0 (bytes 00 00 00 00) Tc5z [flt ] 0 (bytes 00 00 00 00) Tc6a [flt ] 0 (bytes 00 00 00 00) Tc6b [flt ] 0 (bytes 00 00 00 00) Tc6x [flt ] 0 (bytes 00 00 00 00) Tc6z [flt ] 0 (bytes 00 00 00 00) Tc7a [flt ] 23 (bytes cd 74 b6 41) Tc7b [flt ] 23 (bytes cd 74 b6 41) Tc7x [flt ] 25 (bytes 00 60 ca 41) Tc7z [flt ] 25 (bytes 00 60 ca 41) Tc8a [flt ] 27 (bytes bc 48 d8 41) Tc8b [flt ] 27 (bytes bc 48 d8 41) Tc8x [flt ] 37 (bytes 00 50 12 42) Tc8z [flt ] 37 (bytes 00 50 12 42) Tc9a [flt ] 21 (bytes eb 65 a6 41) Tc9b [flt ] 21 (bytes eb 65 a6 41) Tc9x [flt ] 23 (bytes 00 80 ba 41) Tc9z [flt ] 23 (bytes 00 80 ba 41) Tcaa [flt ] 25 (bytes a0 b2 c6 41) Tcab [flt ] 25 (bytes a0 b2 c6 41) Tcax [flt ] 30 (bytes 00 40 ec 41) Tcaz [flt ] 30 (bytes 00 40 ec 41) Te0a [flt ] 21 (bytes 33 b3 a8 41) Te0b [flt ] 21 (bytes 33 b3 a8 41) Te0x [flt ] 23 (bytes 00 80 bb 41) Te0z [flt ] 23 (bytes 00 80 bb 41) Te3a [flt ] 23 (bytes 0a 77 b5 41) Te3b [flt ] 31 (bytes a4 10 fb 41) Te3x [flt ] 25 (bytes 00 60 ca 41) Te3z [flt ] 45 (bytes 00 30 35 42) Tg1b [flt ] 0 (bytes 00 00 00 00) Tg4b [flt ] 0 (bytes 00 00 00 00) Th0a [flt ] 25 (bytes 3d 10 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70 a3 0b 42) TpDg [flt ] (bytes 80 48 0b 42) TpDh [flt ] (bytes 80 48 0b 42) TpDi [flt ] (bytes 4c 59 0c 42) TpDj [flt ] (bytes 80 48 0b 42) TrD0 [flt ] (bytes 28 0f 0d 42) TrD1 [flt ] (bytes 44 60 07 42) TrD2 [flt ] (bytes c8 dc 09 42) TrD3 [flt ] (bytes fc cb 08 42) TrD4 [flt ] (bytes 10 71 08 42) TrD5 [flt ] (bytes 20 16 08 42) TrD6 [flt ] (bytes 44 60 07 42) TrD7 [flt ] (bytes 10 71 08 42) TrD8 [flt ] (bytes 10 71 08 42) TrD9 [flt ] (bytes 20 16 08 42) TrDX [flt ] (bytes 28 0f 0d 42) TrDa [flt ] (bytes 10 71 08 42) TrDb [flt ] (bytes 68 aa 06 42) TrDc [flt ] (bytes 20 16 08 42) TrDd [flt ] (bytes 54 05 07 42) TrDe [flt ] (bytes 44 60 07 42) TrDf [flt ] (bytes 44 60 07 42) TrDg [flt ] (bytes 44 60 07 42) TrDh [flt ] (bytes 44 60 07 42) TrDi [flt ] (bytes b8 37 0a 42) TrDj [flt ] (bytes 20 16 08 42) Ts00 [flt ] (bytes 38 31 09 42) Ts01 [flt ] (bytes 38 31 09 42) Ts02 [flt ] (bytes 00 a0 0f 42) Ts04 [flt ] (bytes d4 5d 06 42) Ts05 [flt ] (bytes d4 5d 06 42) Ts06 [flt ] (bytes 00 80 0a 42) Ts20 [flt ] (bytes be 92 05 42) Ts21 [flt ] (bytes be 92 05 42) Ts22 [flt ] (bytes 00 90 0c 42) Ts24 [flt ] (bytes 5d 9a ef 41) Ts25 [flt ] (bytes 5d 9a ef 41) Ts26 [flt ] (bytes 00 20 fa 41) Tz11 [flt ] (bytes 00 00 00 00) Tz12 [flt ] (bytes 00 00 00 00) Tz13 [flt ] (bytes 00 00 00 00) Tz14 [flt ] (bytes 00 00 00 00) Tz15 [flt ] (bytes 00 00 00 00) Tz16 [flt ] (bytes 00 00 00 00) Tz17 [flt ] (bytes 00 00 00 00) Tz18 [flt ] (bytes 00 00 00 00) Tz1j [flt ] (bytes 00 00 00 00) ================================================ FILE: reports/report-m2.txt ================================================ TAOL [flt ] 0 (bytes 00 00 00 00) TB0T [flt ] 28.699997 (bytes 98 99 e5 41) TB1T [flt ] 28.699997 (bytes 98 99 e5 41) TB2T [flt ] 28.199997 (bytes 98 99 e1 41) TCHP [flt ] 35.725235 (bytes a4 e6 0e 42) TCMb [flt ] 37.92153 (bytes a6 af 17 42) TCMz [flt ] 40.415627 (bytes 9a a9 21 42) TG0B [ioft] 28.699997 (bytes 33 b3 1c 00 00 00 00 00) TG0C [ioft] 28 (bytes 00 00 1c 00 00 00 00 00) TG0H [ioft] 28 (bytes 00 00 1c 00 00 00 00 00) TG0V [ioft] 28.699997 (bytes 33 b3 1c 00 00 00 00 00) TG1B [ioft] 28.699997 (bytes 33 b3 1c 00 00 00 00 00) TG2B [ioft] 28.199997 (bytes 33 33 1c 00 00 00 00 00) TH0a [flt ] 32.164246 (bytes 30 a8 00 42) TH0b [flt ] 31.244537 (bytes d0 f4 f9 41) TH0x [flt ] 32.164246 (bytes 30 a8 00 42) TIOP [flt ] 34.437958 (bytes 78 c0 09 42) TMVR [flt ] 33.711685 (bytes c4 d8 06 42) TPD0 [flt ] 40.363983 (bytes b8 74 21 42) TPD1 [flt ] 39.172348 (bytes 7c b0 1c 42) TPD2 [flt ] 40.90564 (bytes 60 9f 23 42) TPD3 [flt ] 39.822327 (bytes 10 4a 1f 42) TPD4 [flt ] 40.363983 (bytes b8 74 21 42) TPD5 [flt ] 40.147324 (bytes dc 96 20 42) TPD6 [flt ] 41.23062 (bytes 28 ec 24 42) TPD7 [flt ] 40.147324 (bytes dc 96 20 42) TPDX [flt ] 41.23062 (bytes 28 ec 24 42) TPMP [flt ] 33.84308 (bytes 50 5f 07 42) TPSP [flt ] 32.562057 (bytes 8c 3f 02 42) TR0Z [ioft] 51.850006 (bytes 9a d9 33 00 00 00 00 00) TR1d [ioft] 32.562057 (bytes e3 8f 20 00 00 00 00 00) TR2d [ioft] 30.427017 (bytes 51 6d 1e 00 00 00 00 00) TR3d [ioft] 32.138687 (bytes 81 23 20 00 00 00 00 00) TR4d [ioft] 31.164246 (bytes 0c 2a 1f 00 00 00 00 00) TR5d [ioft] 30.478104 (bytes 65 7a 1e 00 00 00 00 00) TRD0 [flt ] 39.605667 (bytes 34 6c 1e 42) TRD1 [flt ] 38.52237 (bytes e8 16 1a 42) TRD2 [flt ] 38.95569 (bytes a0 d2 1b 42) TRD3 [flt ] 39.714005 (bytes 24 db 1e 42) TRD4 [flt ] 38.52237 (bytes e8 16 1a 42) TRD5 [flt ] 39.172348 (bytes 7c b0 1c 42) TRD6 [flt ] 39.497345 (bytes 48 fd 1d 42) TRD7 [flt ] 38.73903 (bytes c4 f4 1a 42) TRDX [flt ] 39.714005 (bytes 24 db 1e 42) TSCD [flt ] 32.92337 (bytes 88 b1 03 42) TVA0 [flt ] 24.489336 (bytes 29 ea c3 41) TVD0 [flt ] 37.92153 (bytes a6 af 17 42) TVM0 [flt ] 32.667667 (bytes b1 ab 02 42) TVM1 [flt ] 12.448381 (bytes 92 2c 47 41) TVM2 [flt ] 13.2943 (bytes 74 b5 54 41) TVM3 [flt ] 0 (bytes 00 00 00 00) TVS0 [flt ] 29.722425 (bytes 87 c7 ed 41) TVS1 [flt ] 28.453539 (bytes d9 a0 e3 41) TVSx [flt ] 29.722425 (bytes 87 c7 ed 41) TW0P [flt ] 32.78833 (bytes 40 27 03 42) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] 7.791 (bytes df 4f f9 40) Ta0C [flt ] 0 (bytes 00 00 00 00) Ta0D [flt ] 7.791 (bytes df 4f f9 40) TaMP [flt ] 30.448914 (bytes 60 97 f3 41) Te04 [flt ] 31.497454 (bytes c9 fa fb 41) Te05 [flt ] 36.947453 (bytes 31 ca 13 42) Te06 [flt ] 38.51875 (bytes 33 13 1a 42) Tg0e [flt ] 31.15997 (bytes 9e 47 f9 41) Tg0f [flt ] 35.767967 (bytes 66 12 0f 42) Tg0m [flt ] 31.263393 (bytes 6e 1b fa 41) Tg0n [flt ] 35.87139 (bytes 4e 7c 0f 42) Tg0q [flt ] 31.873512 (bytes f4 fc fe 41) Tg0r [flt ] 36.481514 (bytes 12 ed 11 42) Th04 [flt ] 31.070332 (bytes 0a 90 f8 41) Th05 [flt ] 31.070332 (bytes 0a 90 f8 41) Th06 [flt ] 31.328125 (bytes 00 a0 fa 41) Th08 [flt ] 30.869596 (bytes ef f4 f6 41) Th09 [flt ] 36.8696 (bytes 78 7a 13 42) Th0A [flt ] 38.109375 (bytes 00 70 18 42) Th0C [flt ] 30.807447 (bytes a7 75 f6 41) Th0D [flt ] 30.807447 (bytes a7 75 f6 41) Th0E [flt ] 31.046875 (bytes 00 60 f8 41) Th0G [flt ] 31.270012 (bytes fc 28 fa 41) Th0H [flt ] 31.270012 (bytes fc 28 fa 41) Th0I [flt ] 31.6875 (bytes 00 80 fd 41) Th0K [flt ] 30.99246 (bytes 8f f0 f7 41) Th0L [flt ] 30.99246 (bytes 8f f0 f7 41) Th0M [flt ] 31.359375 (bytes 00 e0 fa 41) Th1H [flt ] 30.397812 (bytes b8 2e f3 41) Tp00 [flt ] 31.821533 (bytes 80 92 fe 41) Tp01 [flt ] 37.92153 (bytes a6 af 17 42) Tp02 [flt ] 40.415627 (bytes 9a a9 21 42) Tp04 [flt ] 31.96039 (bytes e1 ae ff 41) Tp05 [flt ] 37.04739 (bytes 87 30 14 42) Tp06 [flt ] 38.72475 (bytes 25 e6 1a 42) Tp08 [flt ] 31.56863 (bytes 8e 8c fc 41) Tp09 [flt ] 37.66863 (bytes ad ac 16 42) Tp0A [flt ] 39.99375 (bytes 9a f9 1f 42) Tp0C [flt ] 31.724152 (bytes 10 cb fd 41) Tp0D [flt ] 36.81115 (bytes 9e 3e 13 42) Tp0E [flt ] 38.302876 (bytes 25 36 19 42) Tp0a [flt ] 31.569178 (bytes ad 8d fc 41) Tp0b [flt ] 37.019176 (bytes a3 13 14 42) Tp0c [flt ] 35.765625 (bytes 00 10 0f 42) Tp0e [flt ] 31.713661 (bytes 94 b5 fd 41) Tp0f [flt ] 37.81366 (bytes 30 41 17 42) Tp0g [flt ] 39.853127 (bytes 9a 69 1f 42) Tp0i [flt ] 31.820509 (bytes 67 90 fe 41) Tp0j [flt ] 36.90751 (bytes 4a a1 13 42) Tp0k [flt ] 38.521626 (bytes 25 16 1a 42) Tp0m [flt ] 30.874327 (bytes 9f fe f6 41) Tp0n [flt ] 36.974327 (bytes b6 e5 13 42) Tp0o [flt ] 38.7125 (bytes 9a d9 1a 42) Tp0q [flt ] 31.240982 (bytes 88 ed f9 41) Tp0r [flt ] 36.32798 (bytes da 4f 11 42) Tp0s [flt ] 38.09975 (bytes 25 66 18 42) Ts0K [flt ] 31.30121 (bytes e1 68 fa 41) Ts0L [flt ] 31.30121 (bytes e1 68 fa 41) Ts0M [flt ] 31.921875 (bytes 00 60 ff 41) Ts0O [flt ] 30.718437 (bytes 5c bf f5 41) Ts0P [flt ] 30.718437 (bytes 5c bf f5 41) Ts0Q [flt ] 31.171875 (bytes 00 60 f9 41) Ts0S [flt ] 31.572407 (bytes 4a 94 fc 41) Ts0T [flt ] 31.572407 (bytes 4a 94 fc 41) Ts0U [flt ] 31.8125 (bytes 00 80 fe 41) Ts0W [flt ] 31.525024 (bytes 40 33 fc 41) Ts0X [flt ] 36.975025 (bytes 6d e6 13 42) Ts0Y [flt ] 38.409374 (bytes 33 a3 19 42) Ts0a [flt ] 31.75509 (bytes 6d 0a fe 41) Ts0b [flt ] 31.75509 (bytes 6d 0a fe 41) Ts0c [flt ] 32.328125 (bytes 00 50 01 42) Ts1P [flt ] 26.125 (bytes 00 00 d1 41) TsOP [flt ] 27.375 (bytes 00 00 db 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m3-max-2.txt ================================================ TAOL [flt ] 23.375 (bytes 00 00 bb 41) TB0T [flt ] 24 (bytes 00 00 c0 41) TB1T [flt ] 23.899994 (bytes 30 33 bf 41) TB2T [flt ] 24 (bytes 00 00 c0 41) TCDX [flt ] 26.545626 (bytes 71 5d d4 41) TCHP [flt ] 24.107666 (bytes 80 dc c0 41) TCMb [flt ] 40 (bytes 00 00 20 42) TCMz [flt ] 40 (bytes 00 00 20 42) TD00 [flt ] 25.211418 (bytes fc b0 c9 41) TD01 [flt ] 24.849092 (bytes f1 ca c6 41) TD02 [flt ] 24.718544 (bytes 94 bf c5 41) TD03 [flt ] 24.15287 (bytes 14 39 c1 41) TD04 [flt ] 24.341797 (bytes 00 bc c2 41) TD10 [flt ] 24.731 (bytes 17 d9 c5 41) TD11 [flt ] 25.974241 (bytes 3f cb cf 41) TD12 [flt ] 25.136707 (bytes fa 17 c9 41) TD13 [flt ] 25.635303 (bytes 1a 15 cd 41) TD14 [flt ] 24.415144 (bytes 37 52 c3 41) TD20 [flt ] 25.814617 (bytes 56 84 ce 41) TD21 [flt ] 27.348637 (bytes 02 ca da 41) TD22 [flt ] 26.539427 (bytes bf 50 d4 41) TD23 [flt ] 27.607887 (bytes f4 dc dc 41) TD24 [flt ] 25.629814 (bytes dc 09 cd 41) TDBP [flt ] 23.4375 (bytes 00 80 bb 41) TDCR [flt ] 23.8125 (bytes 00 80 be 41) TDEC [flt ] 24 (bytes 00 00 c0 41) TDEL [flt ] 24.125 (bytes 00 00 c1 41) TDER [flt ] 23.875 (bytes 00 00 bf 41) TDTP [flt ] 23.8125 (bytes 00 80 be 41) TDVx [flt ] 27.607887 (bytes f4 dc dc 41) TDeL [flt ] 24 (bytes 00 00 c0 41) TDeR [flt ] 23.9375 (bytes 00 80 bf 41) TG0B [ioft] 24 (bytes 00 00 18 00 00 00 00 00) TG0C [ioft] 23 (bytes 00 00 17 00 00 00 00 00) TG0H [ioft] 24 (bytes 00 00 18 00 00 00 00 00) TG0V [ioft] 24 (bytes 00 00 18 00 00 00 00 00) TG1B [ioft] 23.899994 (bytes 66 e6 17 00 00 00 00 00) TG2B [ioft] 24 (bytes 00 00 18 00 00 00 00 00) TH0a [flt ] 23.5625 (bytes 00 80 bc 41) TH0b [flt ] 23.601562 (bytes 00 d0 bc 41) TH0x [flt ] 23.601562 (bytes 00 d0 bc 41) TH1a [flt ] 23.234375 (bytes 00 e0 b9 41) TH1b [flt ] 23.234375 (bytes 00 e0 b9 41) TMVR [flt ] 24.3134 (bytes d8 81 c2 41) TPD0 [flt ] 28.494781 (bytes 50 f5 e3 41) TPD1 [flt ] 28.494781 (bytes 50 f5 e3 41) TPD2 [flt ] 28.280212 (bytes e0 3d e2 41) TPD3 [flt ] 29.245789 (bytes 60 f7 e9 41) TPD4 [flt ] 28.81665 (bytes 80 88 e6 41) TPD5 [flt ] 29.138504 (bytes a8 1b e9 41) TPD6 [flt ] 29.03122 (bytes f0 3f e8 41) TPD7 [flt ] 29.138504 (bytes a8 1b e9 41) TPD8 [flt ] 29.138504 (bytes a8 1b e9 41) TPD9 [flt ] 29.138504 (bytes a8 1b e9 41) TPDX [flt ] 30.104065 (bytes 20 d5 f0 41) TPDa [flt ] 29.03122 (bytes f0 3f e8 41) TPDb [flt ] 28.280212 (bytes e0 3d e2 41) TPDc [flt ] 29.138504 (bytes a8 1b e9 41) TPDd [flt ] 30.104065 (bytes 20 d5 f0 41) TPDe [flt ] 30.104065 (bytes 20 d5 f0 41) TPDf [flt ] 28.81665 (bytes 80 88 e6 41) TPMP [flt ] 24.14116 (bytes 18 21 c1 41) TPSP [flt ] 24.222488 (bytes a8 c7 c1 41) TR0Z [ioft] 51.850006 (bytes 9a d9 33 00 00 00 00 00) TR1d [ioft] 23.916275 (bytes 91 ea 17 00 00 00 00 00) TR2d [ioft] 24.143555 (bytes c0 24 18 00 00 00 00 00) TRD0 [flt ] 28.81665 (bytes 80 88 e6 41) TRD1 [flt ] 28.709366 (bytes c8 ac e5 41) TRD2 [flt ] 28.709366 (bytes c8 ac e5 41) TRD3 [flt ] 29.138504 (bytes a8 1b e9 41) TRD4 [flt ] 29.138504 (bytes a8 1b e9 41) TRD5 [flt ] 29.567642 (bytes 88 8a ec 41) TRD6 [flt ] 29.138504 (bytes a8 1b e9 41) TRD7 [flt ] 29.138504 (bytes a8 1b e9 41) TRD8 [flt ] 29.889496 (bytes b0 1d ef 41) TRD9 [flt ] 29.138504 (bytes a8 1b e9 41) TRDX [flt ] 30.425919 (bytes 48 68 f3 41) TRDa [flt ] 29.567642 (bytes 88 8a ec 41) TRDb [flt ] 28.709366 (bytes c8 ac e5 41) TRDc [flt ] 29.99678 (bytes 68 f9 ef 41) TRDd [flt ] 30.104065 (bytes 20 d5 f0 41) TRDe [flt ] 30.425919 (bytes 48 68 f3 41) TRDf [flt ] 28.065643 (bytes 70 86 e0 41) TS0P [flt ] 24.002396 (bytes e8 04 c0 41) TSVR [flt ] 23.961731 (bytes a0 b1 bf 41) TSWR [flt ] 24.153122 (bytes 98 39 c1 41) TSXR [flt ] 23.928238 (bytes 08 6d bf 41) TV0h [flt ] 33.91134 (bytes 36 a5 07 42) TV0m [flt ] 33.994865 (bytes be fa 07 42) TV0s [flt ] 32.547894 (bytes 0b 31 02 42) TV1h [flt ] 33.91134 (bytes 36 a5 07 42) TV1m [flt ] 40 (bytes 00 00 20 42) TV1s [flt ] 32.547894 (bytes 0b 31 02 42) TV2S [flt ] -12.42364 (bytes 3b c7 46 c1) TV3S [flt ] -4.180915 (bytes 0e ca 85 c0) TVA0 [flt ] 23.204176 (bytes 27 a2 b9 41) TVD0 [flt ] 40 (bytes 00 00 20 42) TVFh [flt ] 33.947872 (bytes 9f ca 07 42) TVFm [flt ] 40 (bytes 00 00 20 42) TVH2 [flt ] -7.603959 (bytes a2 53 f3 c0) TVH3 [flt ] 39.97804 (bytes 83 e9 1f 42) TVHC [flt ] 21.947773 (bytes 0a 95 af 41) TVHO [flt ] 11.963564 (bytes c2 6a 3f 41) TVM2 [flt ] -12.769275 (bytes f3 4e 4c c1) TVM3 [flt ] 3.199686 (bytes a8 c7 4c 40) TVMC [flt ] 27.72698 (bytes db d0 dd 41) TVMD [flt ] 0 (bytes 00 00 00 00) TVMO [flt ] 6.2678857 (bytes 85 92 c8 40) TVS0 [flt ] 25.596512 (bytes a8 c5 cc 41) TVS1 [flt ] 23.603844 (bytes ac d4 bc 41) TVS2 [flt ] 24.099087 (bytes ee ca c0 41) TVSC [flt ] 25.371841 (bytes 88 f9 ca 41) TVSO [flt ] 7.176051 (bytes 36 a2 e5 40) TVV0 [flt ] 26.772326 (bytes b9 2d d6 41) TVh0 [flt ] 33.91134 (bytes 36 a5 07 42) TVm0 [flt ] 40 (bytes 00 00 20 42) TVsa [flt ] 33.379677 (bytes ca 84 05 42) TVss [flt ] 32.547894 (bytes 0b 31 02 42) TW0P [flt ] 24.10048 (bytes c8 cd c0 41) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] -2.7 (bytes cd cc 2c c0) Ta0G [flt ] 0 (bytes 00 00 00 00) Ta0H [flt ] -2.7 (bytes cd cc 2c c0) Ta0K [flt ] 0 (bytes 00 00 00 00) Ta0L [flt ] -2.7 (bytes cd cc 2c c0) Ta0O [flt ] 0 (bytes 00 00 00 00) Ta0P [flt ] -2.7 (bytes cd cc 2c c0) TaLP [flt ] 24.16986 (bytes e0 5b c1 41) TaLT [flt ] 24.485657 (bytes a0 e2 c3 41) TaLW [flt ] 24.279907 (bytes 40 3d c2 41) TaRF [flt ] 23.944977 (bytes 50 8f bf 41) TaRT [flt ] 23.502396 (bytes e8 04 bc 41) TaRW [flt ] 23.93303 (bytes d8 76 bf 41) TaTP [flt ] 24.188995 (bytes 10 83 c1 41) Te04 [flt ] 24.349766 (bytes 52 cc c2 41) Te05 [flt ] 29.449766 (bytes 1f 99 eb 41) Te06 [flt ] 33.0625 (bytes 00 40 04 42) Te0K [flt ] 24.46918 (bytes e1 c0 c3 41) Te0L [flt ] 29.26918 (bytes 48 27 ea 41) Te0M [flt ] 32.421875 (bytes 00 b0 01 42) Te0P [flt ] 30.850977 (bytes cd ce f6 41) Te0Q [flt ] 33.0625 (bytes 00 40 04 42) Te0S [flt ] 30.470425 (bytes 6e c3 f3 41) Te0T [flt ] 32.421875 (bytes 00 b0 01 42) Tf00 [flt ] 0 (bytes 00 00 00 00) Tf01 [flt ] 7.109375 (bytes 00 80 e3 40) Tf02 [flt ] -6.84375 (bytes 00 00 db c0) Tf04 [flt ] 25.33 (bytes d7 a3 ca 41) Tf05 [flt ] 22.234375 (bytes 00 e0 b1 41) Tf06 [flt ] 52.671875 (bytes 00 b0 52 42) Tf08 [flt ] 24.479376 (bytes c3 d5 c3 41) Tf09 [flt ] 24.946875 (bytes 33 93 c7 41) Tf0A [flt ] 25.061562 (bytes 14 7e c8 41) Tf0B [flt ] 24.9525 (bytes b8 9e c7 41) Tf0C [flt ] 1 (bytes 00 00 80 3f) Tf0D [flt ] 25.33 (bytes d7 a3 ca 41) Tf0E [flt ] 25.33 (bytes d7 a3 ca 41) Tf10 [flt ] 0 (bytes 00 00 00 00) Tf11 [flt ] 8.546875 (bytes 00 c0 08 41) Tf12 [flt ] -8.546875 (bytes 00 c0 08 c1) Tf14 [flt ] 24.580313 (bytes 7b a4 c4 41) Tf15 [flt ] 21.375 (bytes 00 00 ab 41) Tf16 [flt ] 41 (bytes 00 00 24 42) Tf18 [flt ] 23.365313 (bytes 29 ec ba 41) Tf19 [flt ] 24.202187 (bytes 14 9e c1 41) Tf1A [flt ] 24.47875 (bytes 7b d4 c3 41) Tf1B [flt ] 24.17875 (bytes 14 6e c1 41) Tf1C [flt ] 1 (bytes 00 00 80 3f) Tf1D [flt ] 24.580313 (bytes 7b a4 c4 41) Tf1E [flt ] 24.580313 (bytes 7b a4 c4 41) Tf20 [flt ] -0.01125 (bytes ec 51 38 bc) Tf21 [flt ] 9.109375 (bytes 00 c0 11 41) Tf22 [flt ] -8.25 (bytes 00 00 04 c1) Tf24 [flt ] 24.885 (bytes 7b 14 c7 41) Tf25 [flt ] 21.9375 (bytes 00 80 af 41) Tf26 [flt ] 39.875 (bytes 00 80 1f 42) Tf28 [flt ] 24.054375 (bytes 5c 6f c0 41) Tf29 [flt ] 24.400312 (bytes d7 33 c3 41) Tf2A [flt ] 24.383438 (bytes 48 11 c3 41) Tf2B [flt ] 24.759687 (bytes d7 13 c6 41) Tf2D [flt ] 24.885 (bytes 7b 14 c7 41) Tf2E [flt ] 24.885 (bytes 7b 14 c7 41) Tf30 [flt ] 0.02875 (bytes 1f 85 eb 3c) Tf31 [flt ] 11.375 (bytes 00 00 36 41) Tf32 [flt ] -11.390625 (bytes 00 40 36 c1) Tf34 [flt ] 26.545626 (bytes 71 5d d4 41) Tf35 [flt ] 23.65625 (bytes 00 40 bd 41) Tf36 [flt ] 44.140625 (bytes 00 90 30 42) Tf38 [flt ] 24.90125 (bytes c3 35 c7 41) Tf39 [flt ] 26.476875 (bytes a4 d0 d3 41) Tf3A [flt ] 26.083437 (bytes e1 aa d0 41) Tf3B [flt ] 25.731562 (bytes 3d da cd 41) Tf3C [flt ] 1 (bytes 00 00 80 3f) Tf3D [flt ] 26.545626 (bytes 71 5d d4 41) Tf3E [flt ] 26.545626 (bytes 71 5d d4 41) Tf40 [flt ] 0.0171875 (bytes cd cc 8c 3c) Tf41 [flt ] 7.6875 (bytes 00 00 f6 40) Tf42 [flt ] -7.6875 (bytes 00 00 f6 c0) Tf44 [flt ] 24.951876 (bytes 71 9d c7 41) Tf45 [flt ] 21.65625 (bytes 00 40 ad 41) Tf46 [flt ] 50.390625 (bytes 00 90 49 42) Tf48 [flt ] 24.213125 (bytes 7b b4 c1 41) Tf49 [flt ] 24.780937 (bytes 5c 3f c6 41) Tf4A [flt ] 24.599062 (bytes e1 ca c4 41) Tf4B [flt ] 24.275625 (bytes 7b 34 c2 41) Tf4C [flt ] 1 (bytes 00 00 80 3f) Tf4D [flt ] 24.951876 (bytes 71 9d c7 41) Tf4E [flt ] 24.951876 (bytes 71 9d c7 41) Tf9F [flt ] 29.138504 (bytes a8 1b e9 41) TfA0 [flt ] 29.138504 (bytes a8 1b e9 41) Tg00 [flt ] 0 (bytes 00 00 00 00) Tg01 [flt ] -0.5 (bytes 00 00 00 bf) Tg04 [flt ] 0 (bytes 00 00 00 00) Tg05 [flt ] -2.75 (bytes 00 00 30 c0) Tg0C [flt ] 0 (bytes 00 00 00 00) Tg0D [flt ] -8.75 (bytes 00 00 0c c1) Tg0K [flt ] 0 (bytes 00 00 00 00) Tg0L [flt ] -8.75 (bytes 00 00 0c c1) Tg0y [flt ] 0 (bytes 00 00 00 00) Tg0z [flt ] -2.75 (bytes 00 00 30 c0) Tg16 [flt ] 0 (bytes 00 00 00 00) Tg17 [flt ] -8.75 (bytes 00 00 0c c1) Tg1E [flt ] 0 (bytes 00 00 00 00) Tg1F [flt ] -8.75 (bytes 00 00 0c c1) Tg1s [flt ] 0 (bytes 00 00 00 00) Tg1t [flt ] -8.75 (bytes 00 00 0c c1) Tg1x [flt ] 0 (bytes 00 00 00 00) Tg1y [flt ] -9 (bytes 00 00 10 c1) Tg21 [flt ] 0 (bytes 00 00 00 00) Tg22 [flt ] -2.75 (bytes 00 00 30 c0) Tg29 [flt ] 0 (bytes 00 00 00 00) Tg2A [flt ] -8.75 (bytes 00 00 0c c1) Tg2H [flt ] 0 (bytes 00 00 00 00) Tg2I [flt ] -2.75 (bytes 00 00 30 c0) Tg33 [flt ] 0 (bytes 00 00 00 00) Tg34 [flt ] -2.75 (bytes 00 00 30 c0) Tg3B [flt ] 0 (bytes 00 00 00 00) Tg3C [flt ] -8.75 (bytes 00 00 0c c1) Tg3J [flt ] 0 (bytes 00 00 00 00) Tg3K [flt ] -2.75 (bytes 00 00 30 c0) Tg3x [flt ] 0 (bytes 00 00 00 00) Tg3y [flt ] -2.75 (bytes 00 00 30 c0) Th00 [flt ] 24.135988 (bytes 81 16 c1 41) Th01 [flt ] 24.135988 (bytes 81 16 c1 41) Th02 [flt ] 24.328125 (bytes 00 a0 c2 41) Th04 [flt ] 24.72623 (bytes 52 cf c5 41) Th05 [flt ] 24.72623 (bytes 52 cf c5 41) Th06 [flt ] 25.109375 (bytes 00 e0 c8 41) Th08 [flt ] 24.131897 (bytes 20 0e c1 41) Th09 [flt ] 24.131897 (bytes 20 0e c1 41) Th0A [flt ] 24.453125 (bytes 00 a0 c3 41) Th0C [flt ] 24.08506 (bytes 34 ae c0 41) Th0D [flt ] 24.08506 (bytes 34 ae c0 41) Th0E [flt ] 24.3125 (bytes 00 80 c2 41) Tp04 [flt ] 26.607248 (bytes a5 db d4 41) Tp05 [flt ] 32.507248 (bytes 6c 07 02 42) Tp06 [flt ] 32.046875 (bytes 00 30 00 42) Tp0C [flt ] 26.160198 (bytes 16 48 d1 41) Tp0D [flt ] 32.0602 (bytes a5 3d 00 42) Tp0E [flt ] 31.4375 (bytes 00 80 fb 41) Tp0K [flt ] 26.644995 (bytes f3 28 d5 41) Tp0L [flt ] 32.544994 (bytes 13 2e 02 42) Tp0M [flt ] 31.90625 (bytes 00 40 ff 41) Tp0R [flt ] 25.760284 (bytes 10 15 ce 41) Tp0S [flt ] 31.660284 (bytes 43 48 fd 41) Tp0T [flt ] 31.046875 (bytes 00 60 f8 41) Tp0U [flt ] 27.415146 (bytes 38 52 db 41) Tp0V [flt ] 34.415146 (bytes 1c a9 09 42) Tp0W [flt ] 31.6875 (bytes 00 80 fd 41) Tp0a [flt ] 26.971962 (bytes 94 c6 d7 41) Tp0b [flt ] 33.971962 (bytes 4a e3 07 42) Tp0c [flt ] 31.140625 (bytes 00 20 f9 41) Tp0g [flt ] 27.714083 (bytes 71 b6 dd 41) Tp0h [flt ] 34.71408 (bytes 38 db 0a 42) Tp0i [flt ] 32.234375 (bytes 00 f0 00 42) Tp0m [flt ] 26.841782 (bytes f8 bb d6 41) Tp0n [flt ] 33.84178 (bytes fc 5d 07 42) Tp0o [flt ] 31.21875 (bytes 00 c0 f9 41) Tp0u [flt ] 30.37799 (bytes 20 06 f3 41) Tp0v [flt ] 39.277992 (bytes aa 1c 1d 42) Tp0w [flt ] 34.515625 (bytes 00 10 0a 42) Tp0y [flt ] 29.920837 (bytes e0 5d ef 41) Tp0z [flt ] 38.82084 (bytes 8a 48 1b 42) Tp10 [flt ] 34.359375 (bytes 00 70 09 42) Tp16 [flt ] 26.63526 (bytes 03 15 d5 41) Tp17 [flt ] 32.53526 (bytes 1b 24 02 42) Tp18 [flt ] 31.9375 (bytes 00 80 ff 41) Tp1E [flt ] 26.686625 (bytes 35 7e d5 41) Tp1F [flt ] 32.586624 (bytes b4 58 02 42) Tp1G [flt ] 32.015625 (bytes 00 10 00 42) Tp1I [flt ] 27.867878 (bytes 6a f1 de 41) Tp1J [flt ] 34.867878 (bytes b5 78 0b 42) Tp1K [flt ] 32.109375 (bytes 00 70 00 42) Tp1Q [flt ] 27.403 (bytes 58 39 db 41) Tp1R [flt ] 34.403 (bytes ac 9c 09 42) Tp1S [flt ] 31.65625 (bytes 00 40 fd 41) Tp1g [flt ] 40 (bytes 00 00 20 42) Tp1h [flt ] 40 (bytes 00 00 20 42) Tp1i [flt ] 40 (bytes 00 00 20 42) Tp1o [flt ] 40 (bytes 00 00 20 42) Tp1p [flt ] 40 (bytes 00 00 20 42) Tp1q [flt ] 40 (bytes 00 00 20 42) Tp1x [flt ] 40 (bytes 00 00 20 42) Tp1y [flt ] 40 (bytes 00 00 20 42) Tp1z [flt ] 40 (bytes 00 00 20 42) Tp25 [flt ] 40 (bytes 00 00 20 42) Tp26 [flt ] 40 (bytes 00 00 20 42) Tp27 [flt ] 40 (bytes 00 00 20 42) Tp29 [flt ] 40 (bytes 00 00 20 42) Tp2A [flt ] 40 (bytes 00 00 20 42) Tp2B [flt ] 40 (bytes 00 00 20 42) Tp2H [flt ] 40 (bytes 00 00 20 42) Tp2I [flt ] 40 (bytes 00 00 20 42) Tp2J [flt ] 40 (bytes 00 00 20 42) Tp2P [flt ] 40 (bytes 00 00 20 42) Tp2Q [flt ] 40 (bytes 00 00 20 42) Tp2R [flt ] 40 (bytes 00 00 20 42) Tp2X [flt ] 40 (bytes 00 00 20 42) Tp2Y [flt ] 40 (bytes 00 00 20 42) Tp2Z [flt ] 40 (bytes 00 00 20 42) Tp2f [flt ] 40 (bytes 00 00 20 42) Tp2g [flt ] 40 (bytes 00 00 20 42) Tp2h [flt ] 40 (bytes 00 00 20 42) Tp2j [flt ] 40 (bytes 00 00 20 42) Tp2k [flt ] 40 (bytes 00 00 20 42) Tp2l [flt ] 40 (bytes 00 00 20 42) Tp2r [flt ] 40 (bytes 00 00 20 42) Tp2s [flt ] 40 (bytes 00 00 20 42) Tp2t [flt ] 40 (bytes 00 00 20 42) Tp2z [flt ] 40 (bytes 00 00 20 42) Tp30 [flt ] 40 (bytes 00 00 20 42) Tp31 [flt ] 40 (bytes 00 00 20 42) Tp33 [flt ] 40 (bytes 00 00 20 42) Tp34 [flt ] 40 (bytes 00 00 20 42) Tp35 [flt ] 40 (bytes 00 00 20 42) Tp3B [flt ] 40 (bytes 00 00 20 42) Tp3C [flt ] 40 (bytes 00 00 20 42) Tp3D [flt ] 40 (bytes 00 00 20 42) Tp3O [flt ] 31.7156 (bytes 8c b9 fd 41) Tp3P [flt ] 32.234375 (bytes 00 f0 00 42) Tp3S [flt ] 34.378433 (bytes 84 83 09 42) Tp3T [flt ] 34.515625 (bytes 00 10 0a 42) Tp3W [flt ] 31.867878 (bytes 6a f1 fe 41) Tp3X [flt ] 32.109375 (bytes 00 70 00 42) Tp3a [flt ] 40 (bytes 00 00 20 42) Tp3b [flt ] 40 (bytes 00 00 20 42) Tp3e [flt ] 40 (bytes 00 00 20 42) Tp3f [flt ] 40 (bytes 00 00 20 42) Tp3i [flt ] 40 (bytes 00 00 20 42) Tp3j [flt ] 40 (bytes 00 00 20 42) Ts04 [flt ] 24.017265 (bytes 5c 23 c0 41) Ts05 [flt ] 24.017265 (bytes 5c 23 c0 41) Ts06 [flt ] 24.421875 (bytes 00 60 c3 41) Ts0C [flt ] 23.921875 (bytes 00 60 bf 41) Ts0D [flt ] 23.921875 (bytes 00 60 bf 41) Ts0E [flt ] 23.921875 (bytes 00 60 bf 41) Ts0P [flt ] 23.375 (bytes 00 00 bb 41) Ts0R [flt ] 23.921057 (bytes 53 5e bf 41) Ts0S [flt ] 23.921057 (bytes 53 5e bf 41) Ts0T [flt ] 24.40625 (bytes 00 40 c3 41) Ts0U [flt ] 24.008026 (bytes 70 10 c0 41) Ts0V [flt ] 24.008026 (bytes 70 10 c0 41) Ts0W [flt ] 24.1875 (bytes 00 80 c1 41) Ts0h [flt ] 24.113945 (bytes 5c e9 c0 41) Ts0i [flt ] 24.515625 (bytes 00 20 c4 41) Ts1P [flt ] 22.1875 (bytes 00 80 b1 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m3-max.txt ================================================ TAOL [flt ] 24 (bytes 00 80 be 41) TB0T [flt ] 23 (bytes 98 99 b5 41) TB1T [flt ] 23 (bytes 98 99 b5 41) TB2T [flt ] 22 (bytes 00 00 b0 41) TCDX [flt ] 40 (bytes d7 f3 20 42) TCHP [flt ] 28 (bytes 68 c0 dd 41) TCMb [flt ] 53 (bytes 14 de 55 42) TCMz [flt ] 73 (bytes 00 90 91 42) TD00 [flt ] 24 (bytes 2f c2 bf 41) TD01 [flt ] 24 (bytes d9 c2 bc 41) TD02 [flt ] 24 (bytes c7 00 bc 41) TD03 [flt ] 23 (bytes e3 c3 b7 41) TD04 [flt ] 23 (bytes 0d d7 b7 41) TD10 [flt ] 24 (bytes a8 b3 bc 41) TD11 [flt ] 25 (bytes b9 65 c6 41) TD12 [flt ] 24 (bytes e8 5f c3 41) TD13 [flt ] 25 (bytes ef 89 c6 41) TD14 [flt ] 23 (bytes 5b 79 ba 41) TD20 [flt ] 25 (bytes b4 4c c6 41) TD21 [flt ] 27 (bytes 25 d3 d5 41) TD22 [flt ] 26 (bytes 2d 8a cf 41) TD23 [flt ] 27 (bytes 70 07 d8 41) TD24 [flt ] 25 (bytes e0 d9 c6 41) TDBP [flt ] 27 (bytes 00 80 d7 41) TDCR [flt ] 28 (bytes 00 80 e2 41) TDEC [flt ] 27 (bytes 00 80 db 41) TDEL [flt ] 26 (bytes 00 00 d3 41) TDER [flt ] 27 (bytes 00 80 d6 41) TDTP [flt ] 29 (bytes 00 80 e5 41) TDVx [flt ] 27 (bytes 70 07 d8 41) TDeL [flt ] 26 (bytes 00 80 cf 41) TDeR [flt ] 26 (bytes 00 80 d2 41) TG0B [ioft] (bytes 33 b3 16 00 00 00 00 00) TG0C [ioft] (bytes 00 00 16 00 00 00 00 00) TG0H [ioft] (bytes 00 00 16 00 00 00 00 00) TG0V [ioft] (bytes 33 b3 16 00 00 00 00 00) TG1B [ioft] (bytes 33 b3 16 00 00 00 00 00) TG2B [ioft] (bytes 00 00 16 00 00 00 00 00) TH0a [flt ] 23 (bytes 00 40 b6 41) TH0b [flt ] 23 (bytes 00 a0 b5 41) TH0x [flt ] 23 (bytes 00 40 b6 41) TH1a [flt ] 0 (bytes 00 00 00 00) TH1b [flt ] 0 (bytes 00 00 00 00) TMVR [flt ] 29 (bytes 48 82 e6 41) TPD0 [flt ] 34 (bytes f0 94 09 42) TPD1 [flt ] 35 (bytes 84 de 0a 42) TPD2 [flt ] 34 (bytes 38 b9 08 42) TPD3 [flt ] 35 (bytes 18 28 0c 42) TPD4 [flt ] 34 (bytes 38 b9 08 42) TPD5 [flt ] 35 (bytes 3c ba 0b 42) TPD6 [flt ] 35 (bytes cc 02 0a 42) TPD7 [flt ] 35 (bytes 60 4c 0b 42) TPD8 [flt ] 34 (bytes f0 94 09 42) TPD9 [flt ] 35 (bytes ac 71 0d 42) TPDX [flt ] 35 (bytes ac 71 0d 42) TPDa [flt ] 35 (bytes 84 de 0a 42) TPDb [flt ] 34 (bytes 38 b9 08 42) TPDc [flt ] 35 (bytes f4 95 0c 42) TPDd [flt ] 35 (bytes d0 03 0d 42) TPDe [flt ] 35 (bytes ac 71 0d 42) TPDf [flt ] 35 (bytes cc 02 0a 42) TPMP [flt ] 30 (bytes 80 30 ec 41) TPSP [flt ] 32 (bytes d0 f4 fd 41) TR0Z [ioft] (bytes 9a d9 33 00 00 00 00 00) TR1d [ioft] (bytes ae cb 1e 00 00 00 00 00) TR2d [ioft] (bytes 81 a3 20 00 00 00 00 00) TRD0 [flt ] 40 (bytes e8 09 1f 42) TRD1 [flt ] 38 (bytes b8 74 16 42) TRD2 [flt ] 39 (bytes 50 bf 1a 42) TRD3 [flt ] 38 (bytes 28 2c 18 42) TRD4 [flt ] 39 (bytes 50 bf 1a 42) TRD5 [flt ] 38 (bytes 94 e2 16 42) TRD6 [flt ] 38 (bytes 04 9a 18 42) TRD7 [flt ] 38 (bytes 04 9a 18 42) TRD8 [flt ] 39 (bytes 54 c0 1d 42) TRD9 [flt ] 39 (bytes 74 51 1a 42) TRDX [flt ] 40 (bytes e8 09 1f 42) TRDa [flt ] 38 (bytes 04 9a 18 42) TRDb [flt ] 37 (bytes 24 2b 15 42) TRDc [flt ] 39 (bytes 50 bf 1a 42) TRDd [flt ] 39 (bytes 08 9b 1b 42) TRDe [flt ] 38 (bytes e0 07 19 42) TRDf [flt ] 37 (bytes 00 99 15 42) TS0P [flt ] 30 (bytes c8 19 ef 41) TSVR [flt ] 31 (bytes 38 36 fb 41) TSWR [flt ] 31 (bytes 08 1c f5 41) TSXR [flt ] 31 (bytes 00 b9 f5 41) TV0h [flt ] 35 (bytes 3c 91 0a 42) TV0m [flt ] 38 (bytes 74 d4 19 42) TV0s [flt ] 38 (bytes e4 f8 17 42) TV1h [flt ] 35 (bytes 3c 91 0a 42) TV1m [flt ] 40 (bytes 00 00 20 42) TV1s [flt ] 38 (bytes e4 f8 17 42) TV2S [flt ] -15 (bytes 5e 84 77 c1) TV3S [flt ] -4 (bytes 7c 1c 85 c0) TVA0 [flt ] 19 (bytes 10 75 96 41) TVD0 [flt ] 53 (bytes 14 de 55 42) TVFh [flt ] 35 (bytes 3d ba 0a 42) TVFm [flt ] 40 (bytes 00 00 20 42) TVH2 [flt ] -9 (bytes 84 7e 17 c1) TVH3 [flt ] 49 (bytes 38 45 44 42) TVHC [flt ] 27 (bytes ca 70 d5 41) TVHO [flt ] 8 (bytes b9 c6 fe 40) TVM2 [flt ] -16 (bytes 35 67 7e c1) TVM3 [flt ] 4 (bytes d6 1b 81 40) TVMC [flt ] 34 (bytes 9a f4 08 42) TVMD [flt ] 0 (bytes 00 00 00 00) TVMO [flt ] 4 (bytes cd fe 86 40) TVS0 [flt ] 27 (bytes 84 11 d8 41) TVS1 [flt ] 26 (bytes d7 a1 cc 41) TVS2 [flt ] 26 (bytes 94 51 ce 41) TVSC [flt ] 33 (bytes 16 16 02 42) TVSO [flt ] 5 (bytes 6e 16 af 40) TVV0 [flt ] 38 (bytes 61 33 18 42) TVh0 [flt ] 35 (bytes 3c 91 0a 42) TVm0 [flt ] 40 (bytes 00 00 20 42) TVsa [flt ] 38 (bytes e4 f8 17 42) TVss [flt ] 38 (bytes e4 f8 17 42) TW0P [flt ] 31 (bytes a8 da fb 41) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] -3 (bytes cd cc 2c c0) Ta0G [flt ] 0 (bytes 00 00 00 00) Ta0H [flt ] -3 (bytes cd cc 2c c0) Ta0K [flt ] 0 (bytes 00 00 00 00) Ta0L [flt ] -3 (bytes cd cc 2c c0) Ta0O [flt ] 0 (bytes 00 00 00 00) Ta0P [flt ] -3 (bytes cd cc 2c c0) TaLP [flt ] 30 (bytes 80 07 f0 41) TaLT [flt ] 23 (bytes 20 68 b7 41) TaLW [flt ] 24 (bytes c0 86 c2 41) TaRF [flt ] 32 (bytes 68 fa 00 42) TaRT [flt ] 23 (bytes d8 e3 ba 41) TaRW [flt ] 24 (bytes 10 b4 c1 41) TaTP [flt ] 33 (bytes b4 59 02 42) Te04 [flt ] 37 (bytes 14 45 15 42) Te05 [flt ] 42 (bytes 7a ab 29 42) Te06 [flt ] 47 (bytes 00 40 3d 42) Te0K [flt ] 37 (bytes ec bc 12 42) Te0L [flt ] 41 (bytes 1f f0 25 42) Te0M [flt ] 45 (bytes 00 f0 32 42) Te0P [flt ] 44 (bytes 48 46 2f 42) Te0Q [flt ] 47 (bytes 00 40 3d 42) Te0S [flt ] 43 (bytes f4 bd 2a 42) Te0T [flt ] 45 (bytes 00 f0 32 42) Tf00 [flt ] -0 (bytes ec 51 b8 bc) Tf01 [flt ] 7 (bytes 00 80 e3 40) Tf02 [flt ] -7 (bytes 00 80 e3 c0) Tf04 [flt ] 40 (bytes cd dc 20 42) Tf05 [flt ] 17 (bytes 00 e0 88 41) Tf06 [flt ] 69 (bytes 00 38 89 42) Tf08 [flt ] 35 (bytes cd 7c 0d 42) Tf09 [flt ] 38 (bytes 48 71 17 42) Tf0A [flt ] 36 (bytes 14 56 10 42) Tf0B [flt ] 40 (bytes cd dc 20 42) Tf0C [flt ] 1 (bytes 00 00 80 3f) Tf0D [flt ] 40 (bytes cd dc 20 42) Tf0E [flt ] 40 (bytes cd dc 20 42) Tf10 [flt ] 0 (bytes 48 e1 ba 3c) Tf11 [flt ] 9 (bytes 00 40 0d 41) Tf12 [flt ] -9 (bytes 00 c0 11 c1) Tf14 [flt ] 36 (bytes a4 70 0e 42) Tf15 [flt ] 18 (bytes 00 00 92 41) Tf16 [flt ] 60 (bytes 00 00 6e 42) Tf18 [flt ] 35 (bytes e1 42 0a 42) Tf19 [flt ] 35 (bytes 00 60 0c 42) Tf1A [flt ] 35 (bytes 14 8e 0d 42) Tf1B [flt ] 35 (bytes 00 e0 0b 42) Tf1C [flt ] 1 (bytes 00 00 80 3f) Tf1D [flt ] 36 (bytes a4 70 0e 42) Tf1E [flt ] 36 (bytes a4 70 0e 42) Tf20 [flt ] -0 (bytes 48 e1 ba bc) Tf21 [flt ] 10 (bytes 00 c0 1a 41) Tf22 [flt ] -11 (bytes 00 00 2d c1) Tf24 [flt ] 36 (bytes 5c 4f 0e 42) Tf25 [flt ] 19 (bytes 00 40 94 41) Tf26 [flt ] 56 (bytes 00 60 60 42) Tf28 [flt ] 35 (bytes 5c df 0a 42) Tf29 [flt ] 35 (bytes 48 b1 0c 42) Tf2A [flt ] 35 (bytes b8 66 0d 42) Tf2B [flt ] 35 (bytes 5c 5f 0b 42) Tf2D [flt ] 36 (bytes 5c 4f 0e 42) Tf2E [flt ] 36 (bytes 5c 4f 0e 42) Tf30 [flt ] -0 (bytes cd cc 8c bc) Tf31 [flt ] 10 (bytes 00 00 24 41) Tf32 [flt ] -11 (bytes 00 80 31 c1) Tf34 [flt ] 38 (bytes ec 51 16 42) Tf35 [flt ] 19 (bytes 00 80 96 41) Tf36 [flt ] 59 (bytes 00 c0 6b 42) Tf38 [flt ] 36 (bytes 00 f8 0f 42) Tf39 [flt ] 37 (bytes 7b 84 14 42) Tf3A [flt ] 37 (bytes 00 10 13 42) Tf3B [flt ] 37 (bytes 48 39 15 42) Tf3C [flt ] 1 (bytes 00 00 80 3f) Tf3D [flt ] 38 (bytes ec 51 16 42) Tf3E [flt ] 38 (bytes ec 51 16 42) Tf40 [flt ] 0 (bytes ec 51 b8 3b) Tf41 [flt ] 9 (bytes 00 40 0d 41) Tf42 [flt ] -8 (bytes 00 00 ff c0) Tf44 [flt ] 36 (bytes cd 2c 10 42) Tf45 [flt ] 18 (bytes 00 a0 8f 41) Tf46 [flt ] 66 (bytes 00 a8 84 42) Tf48 [flt ] 35 (bytes f6 30 0d 42) Tf49 [flt ] 36 (bytes f6 20 0e 42) Tf4A [flt ] 35 (bytes 52 60 0d 42) Tf4B [flt ] 36 (bytes 9a b1 0e 42) Tf4C [flt ] 1 (bytes 00 00 80 3f) Tf4D [flt ] 36 (bytes cd 2c 10 42) Tf4E [flt ] 36 (bytes cd 2c 10 42) Tf9F [flt ] 37 (bytes 6c 4f 14 42) TfA0 [flt ] 38 (bytes b8 74 16 42) Tg00 [flt ] 35 (bytes ae b2 0b 42) Tg01 [flt ] 43 (bytes ae b2 2d 42) Tg04 [flt ] 35 (bytes 01 87 0c 42) Tg05 [flt ] 41 (bytes 01 87 24 42) Tg0C [flt ] 35 (bytes 00 44 0c 42) Tg0D [flt ] 35 (bytes 00 44 0c 42) Tg0K [flt ] 35 (bytes 3c 93 0d 42) Tg0L [flt ] 35 (bytes 3c 93 0d 42) Tg0y [flt ] 35 (bytes 38 43 0d 42) Tg0z [flt ] 41 (bytes 38 43 25 42) Tg16 [flt ] 35 (bytes 92 a6 0d 42) Tg17 [flt ] 35 (bytes 92 a6 0d 42) Tg1E [flt ] 35 (bytes d2 56 0d 42) Tg1F [flt ] 35 (bytes d2 56 0d 42) Tg1s [flt ] 35 (bytes b5 f3 0d 42) Tg1t [flt ] 35 (bytes b5 f3 0d 42) Tg1x [flt ] 35 (bytes cd e9 0b 42) Tg1y [flt ] 35 (bytes cd e9 0b 42) Tg21 [flt ] 35 (bytes e3 a9 0d 42) Tg22 [flt ] 41 (bytes e3 a9 25 42) Tg29 [flt ] 35 (bytes 40 aa 0a 42) Tg2A [flt ] 35 (bytes 40 aa 0a 42) Tg2H [flt ] 35 (bytes 95 1b 0b 42) Tg2I [flt ] 41 (bytes 95 1b 23 42) Tg33 [flt ] 35 (bytes 40 1f 0c 42) Tg34 [flt ] 41 (bytes 40 1f 24 42) Tg3B [flt ] 34 (bytes 80 fb 09 42) Tg3C [flt ] 34 (bytes 80 fb 09 42) Tg3J [flt ] 34 (bytes aa 90 09 42) Tg3K [flt ] 40 (bytes aa 90 21 42) Tg3x [flt ] 34 (bytes b4 c8 09 42) Tg3y [flt ] 40 (bytes b4 c8 21 42) Th00 [flt ] 36 (bytes eb e8 0f 42) Th01 [flt ] 36 (bytes eb e8 0f 42) Th02 [flt ] 36 (bytes 00 90 11 42) Th04 [flt ] 37 (bytes 56 9f 14 42) Th05 [flt ] 37 (bytes 56 9f 14 42) Th06 [flt ] 38 (bytes 00 b0 19 42) Th08 [flt ] 37 (bytes 50 ca 13 42) Th09 [flt ] 37 (bytes 50 ca 13 42) Th0A [flt ] 38 (bytes 00 20 18 42) Th0C [flt ] 36 (bytes 40 c1 10 42) Th0D [flt ] 36 (bytes 40 c1 10 42) Th0E [flt ] 37 (bytes 00 30 12 42) Tp04 [flt ] 42 (bytes 6f 2b 27 42) Tp05 [flt ] 48 (bytes 09 c5 3e 42) Tp06 [flt ] 56 (bytes 00 10 60 42) Tp0C [flt ] 42 (bytes 1e b7 27 42) Tp0D [flt ] 48 (bytes b8 50 3f 42) Tp0E [flt ] 58 (bytes 00 70 69 42) Tp0K [flt ] 41 (bytes 32 54 22 42) Tp0L [flt ] 46 (bytes cc ed 39 42) Tp0M [flt ] 54 (bytes 00 90 56 42) Tp0R [flt ] 41 (bytes 7e 25 24 42) Tp0S [flt ] 47 (bytes 18 bf 3b 42) Tp0T [flt ] 57 (bytes 00 70 64 42) Tp0U [flt ] 44 (bytes 09 2c 30 42) Tp0V [flt ] 51 (bytes 09 2c 4c 42) Tp0W [flt ] 65 (bytes 00 10 82 42) Tp0a [flt ] 44 (bytes 0c 98 30 42) Tp0b [flt ] 51 (bytes 0c 98 4c 42) Tp0c [flt ] 67 (bytes 00 c8 86 42) Tp0g [flt ] 41 (bytes fd a5 25 42) Tp0h [flt ] 48 (bytes fd a5 41 42) Tp0i [flt ] 60 (bytes 00 00 71 42) Tp0m [flt ] 43 (bytes 17 ef 2a 42) Tp0n [flt ] 50 (bytes 17 ef 46 42) Tp0o [flt ] 64 (bytes 00 20 80 42) Tp0u [flt ] 44 (bytes 22 e2 2e 42) Tp0v [flt ] 53 (bytes bc 7b 52 42) Tp0w [flt ] 50 (bytes 00 60 47 42) Tp0y [flt ] 44 (bytes c5 00 2f 42) Tp0z [flt ] 53 (bytes 5e 9a 52 42) Tp10 [flt ] 50 (bytes 00 b0 47 42) Tp16 [flt ] 44 (bytes 07 35 2f 42) Tp17 [flt ] 50 (bytes a1 ce 46 42) Tp18 [flt ] 58 (bytes 00 00 6a 42) Tp1E [flt ] 42 (bytes c7 b8 29 42) Tp1F [flt ] 48 (bytes 61 52 41 42) Tp1G [flt ] 57 (bytes 00 20 63 42) Tp1I [flt ] 47 (bytes ad 7f 3b 42) Tp1J [flt ] 54 (bytes ad 7f 57 42) Tp1K [flt ] 69 (bytes 00 30 8a 42) Tp1Q [flt ] 45 (bytes 83 4c 32 42) Tp1R [flt ] 52 (bytes 83 4c 4e 42) Tp1S [flt ] 67 (bytes 00 90 85 42) Tp1g [flt ] 40 (bytes 00 00 20 42) Tp1h [flt ] 40 (bytes 00 00 20 42) Tp1i [flt ] 40 (bytes 00 00 20 42) Tp1o [flt ] 40 (bytes 00 00 20 42) Tp1p [flt ] 40 (bytes 00 00 20 42) Tp1q [flt ] 40 (bytes 00 00 20 42) Tp1x [flt ] 40 (bytes 00 00 20 42) Tp1y [flt ] 40 (bytes 00 00 20 42) Tp1z [flt ] 40 (bytes 00 00 20 42) Tp25 [flt ] 40 (bytes 00 00 20 42) Tp26 [flt ] 40 (bytes 00 00 20 42) Tp27 [flt ] 40 (bytes 00 00 20 42) Tp29 [flt ] 40 (bytes 00 00 20 42) Tp2A [flt ] 40 (bytes 00 00 20 42) Tp2B [flt ] 40 (bytes 00 00 20 42) Tp2H [flt ] 40 (bytes 00 00 20 42) Tp2I [flt ] 40 (bytes 00 00 20 42) Tp2J [flt ] 40 (bytes 00 00 20 42) Tp2P [flt ] 40 (bytes 00 00 20 42) Tp2Q [flt ] 40 (bytes 00 00 20 42) Tp2R [flt ] 40 (bytes 00 00 20 42) Tp2X [flt ] 40 (bytes 00 00 20 42) Tp2Y [flt ] 40 (bytes 00 00 20 42) Tp2Z [flt ] 40 (bytes 00 00 20 42) Tp2f [flt ] 40 (bytes 00 00 20 42) Tp2g [flt ] 40 (bytes 00 00 20 42) Tp2h [flt ] 40 (bytes 00 00 20 42) Tp2j [flt ] 40 (bytes 00 00 20 42) Tp2k [flt ] 40 (bytes 00 00 20 42) Tp2l [flt ] 40 (bytes 00 00 20 42) Tp2r [flt ] 40 (bytes 00 00 20 42) Tp2s [flt ] 40 (bytes 00 00 20 42) Tp2t [flt ] 40 (bytes 00 00 20 42) Tp2z [flt ] 40 (bytes 00 00 20 42) Tp30 [flt ] 40 (bytes 00 00 20 42) Tp31 [flt ] 40 (bytes 00 00 20 42) Tp33 [flt ] 40 (bytes 00 00 20 42) Tp34 [flt ] 40 (bytes 00 00 20 42) Tp35 [flt ] 40 (bytes 00 00 20 42) Tp3B [flt ] 40 (bytes 00 00 20 42) Tp3C [flt ] 40 (bytes 00 00 20 42) Tp3D [flt ] 40 (bytes 00 00 20 42) Tp3O [flt ] 48 (bytes 9e cd 3f 42) Tp3P [flt ] 67 (bytes 00 c8 86 42) Tp3S [flt ] 48 (bytes fd d4 3e 42) Tp3T [flt ] 50 (bytes 00 b0 47 42) Tp3W [flt ] 51 (bytes a5 03 4b 42) Tp3X [flt ] 69 (bytes 00 30 8a 42) Tp3a [flt ] 40 (bytes 00 00 20 42) Tp3b [flt ] 40 (bytes 00 00 20 42) Tp3e [flt ] 40 (bytes 00 00 20 42) Tp3f [flt ] 40 (bytes 00 00 20 42) Tp3i [flt ] 40 (bytes 00 00 20 42) Tp3j [flt ] 40 (bytes 00 00 20 42) Ts04 [flt ] 37 (bytes 35 4d 12 42) Ts05 [flt ] 37 (bytes 35 4d 12 42) Ts06 [flt ] 38 (bytes 00 30 18 42) Ts0C [flt ] 36 (bytes a5 96 11 42) Ts0D [flt ] 36 (bytes a5 96 11 42) Ts0E [flt ] 37 (bytes 00 70 14 42) Ts0P [flt ] 22 (bytes 00 00 b3 41) Ts0R [flt ] 37 (bytes 6d 15 13 42) Ts0S [flt ] 37 (bytes 6d 15 13 42) Ts0T [flt ] 38 (bytes 00 50 17 42) Ts0U [flt ] 36 (bytes 82 b7 0f 42) Ts0V [flt ] 36 (bytes 82 b7 0f 42) Ts0W [flt ] 36 (bytes 00 50 11 42) Ts0h [flt ] 37 (bytes dd 07 13 42) Ts0i [flt ] 38 (bytes 00 30 18 42) Ts1P [flt ] 21 (bytes 00 00 a5 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m3-pro-2.txt ================================================ TAOL [flt ] (bytes 00 80 8d 41) TB0T [flt ] (bytes 00 00 98 41) TB1T [flt ] (bytes 00 00 98 41) TB2T [flt ] (bytes 30 33 97 41) TCDX [flt ] (bytes 00 50 ff 41) TCHP [flt ] (bytes f0 0f c7 41) TCMb [flt ] (bytes 91 95 2a 42) TCMz [flt ] (bytes 00 10 3f 42) TD00 [flt ] (bytes 09 49 88 41) TD01 [flt ] (bytes c0 16 88 41) TD02 [flt ] (bytes a4 cc 8e 41) TD03 [flt ] (bytes 1b d7 88 41) TD04 [flt ] (bytes a5 8e 89 41) TD10 [flt ] (bytes eb 99 8e 41) TD11 [flt ] (bytes 32 e4 8f 41) TD12 [flt ] (bytes 00 86 94 41) TD13 [flt ] (bytes c0 aa 91 41) TD14 [flt ] (bytes a1 3b 8f 41) TD20 [flt ] (bytes c2 cf 90 41) TD21 [flt ] (bytes 9c 60 99 41) TD22 [flt ] (bytes a6 2e a1 41) TD23 [flt ] (bytes 35 47 a6 41) TD24 [flt ] (bytes 2f cd 9c 41) TDBP [flt ] (bytes 00 80 a4 41) TDEL [flt ] (bytes 00 80 a0 41) TDER [flt ] (bytes 00 00 a5 41) TDTC [flt ] (bytes 00 80 b8 41) TDTP [flt ] (bytes 00 00 b5 41) TDVx [flt ] (bytes 35 47 a6 41) TDeL [flt ] (bytes 00 00 9a 41) TDeR [flt ] (bytes 00 80 a3 41) TED0 [flt ] (bytes 58 6c ff 41) TED1 [flt ] (bytes e4 91 00 42) TFD0 [flt ] (bytes 20 d5 f0 41) TFD1 [flt ] (bytes 28 d7 f6 41) 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41) Th04 [flt ] (bytes d2 08 f4 41) Th05 [flt ] (bytes d2 08 f4 41) Th06 [flt ] (bytes 00 a0 f6 41) Th08 [flt ] (bytes b8 3a fe 41) Th09 [flt ] (bytes b8 3a fe 41) Th0A [flt ] (bytes 00 d0 05 42) Th0C [flt ] (bytes a4 14 fc 41) Th0D [flt ] (bytes a4 14 fc 41) Th0E [flt ] (bytes 00 70 02 42) Tp04 [flt ] (bytes 9f 89 11 42) Tp05 [flt ] (bytes 05 f0 29 42) Tp06 [flt ] (bytes 00 30 50 42) Tp0C [flt ] (bytes e5 8e 19 42) Tp0D [flt ] (bytes 4b f5 31 42) Tp0E [flt ] (bytes 00 60 47 42) Tp0K [flt ] (bytes b6 5f 0f 42) Tp0L [flt ] (bytes 1c c6 27 42) Tp0M [flt ] (bytes 00 60 39 42) Tp0R [flt ] (bytes 79 e5 10 42) Tp0S [flt ] (bytes df 4b 29 42) Tp0T [flt ] (bytes 00 e0 29 42) Tp0U [flt ] (bytes 1a 1f 1c 42) Tp0V [flt ] (bytes 4d 52 39 42) Tp0W [flt ] (bytes 00 80 78 42) Tp0a [flt ] (bytes 87 5d 24 42) Tp0b [flt ] (bytes ba 90 41 42) Tp0c [flt ] (bytes 00 e0 6d 42) Tp0g [flt ] (bytes 0e 0f 13 42) Tp0h [flt ] (bytes 41 42 30 42) Tp0i [flt ] (bytes 00 80 41 42) Tp0m [flt ] (bytes 4c 1b 15 42) Tp0n [flt ] (bytes 7f 4e 32 42) Tp0o [flt ] (bytes 00 20 26 42) Tp0u [flt ] (bytes 03 02 19 42) Tp0v [flt ] (bytes 36 35 3e 42) Tp0w [flt ] (bytes 00 90 33 42) Tp0y [flt ] (bytes 1b b0 18 42) Tp0z [flt ] (bytes 4e e3 3d 42) Tp10 [flt ] (bytes 00 e0 30 42) Tp16 [flt ] (bytes 5b fd 17 42) Tp17 [flt ] (bytes c1 63 30 42) Tp18 [flt ] (bytes 00 50 3b 42) Tp1E [flt ] (bytes a0 e2 19 42) Tp1F [flt ] (bytes 06 49 32 42) Tp1G [flt ] (bytes 00 d0 55 42) Tp1I [flt ] (bytes 20 44 1e 42) Tp1J [flt ] (bytes 53 77 3b 42) Tp1K [flt ] (bytes 00 e0 60 42) Tp1Q [flt ] (bytes af 52 24 42) Tp1R [flt ] (bytes e2 85 41 42) Tp1S [flt ] (bytes 00 70 8b 42) Tp3O [flt ] (bytes 43 5f 34 42) Tp3P [flt ] (bytes 00 80 78 42) Tp3S [flt ] (bytes d2 fc 28 42) Tp3T [flt ] (bytes 00 a0 32 42) Tp3W [flt ] (bytes 04 4c 34 42) Tp3X [flt ] (bytes 00 70 8b 42) Ts00 [flt ] (bytes 19 57 00 42) Ts01 [flt ] (bytes 19 57 00 42) Ts02 [flt ] (bytes 00 d0 07 42) Ts0C [flt ] (bytes 41 c6 f5 41) Ts0D [flt ] (bytes 41 c6 f5 41) Ts0E [flt ] (bytes 00 60 f9 41) Ts0K [flt ] (bytes d4 ea f4 41) Ts0L [flt ] (bytes d4 ea f4 41) Ts0M [flt ] (bytes 00 40 f9 41) Ts0P [flt ] (bytes 00 80 b9 41) Ts0Y [flt ] (bytes 06 b9 fd 41) Ts0Z [flt ] (bytes 06 b9 fd 41) Ts0a [flt ] (bytes 00 c0 02 42) Ts0h [flt ] (bytes c4 52 00 42) Ts0i [flt ] (bytes 00 d0 07 42) Ts1P [flt ] (bytes 00 80 ad 41) Tz11 [flt ] (bytes 00 00 00 00) Tz12 [flt ] (bytes 00 00 00 00) Tz13 [flt ] (bytes 00 00 00 00) Tz14 [flt ] (bytes 00 00 00 00) Tz15 [flt ] (bytes 00 00 00 00) Tz16 [flt ] (bytes 00 00 00 00) Tz17 [flt ] (bytes 00 00 00 00) Tz18 [flt ] (bytes 00 00 00 00) Tz1j [flt ] (bytes 00 00 00 00) ================================================ FILE: reports/report-m4-2.txt ================================================ TAOL [flt ] 27 (bytes 00 c0 d4 41) TB0T [flt ] 27 (bytes 30 33 d7 41) TB1T [flt ] 27 (bytes 30 33 d7 41) TB2T [flt ] 26 (bytes 60 66 d2 41) TCHP [flt ] 28 (bytes 60 f2 e0 41) TCMb [flt ] 47 (bytes 3b 3a 3d 42) TCMz [flt ] 66 (bytes 00 60 83 42) TD00 [flt ] 27 (bytes 8c 07 d4 41) TD01 [flt ] 27 (bytes e3 62 d4 41) TD02 [flt ] 28 (bytes 72 7a dd 41) TD03 [flt ] 27 (bytes 96 19 d6 41) TD04 [flt ] 27 (bytes 8e 4f d6 41) TD10 [flt ] 26 (bytes 0e d3 d3 41) TD11 [flt ] 27 (bytes 42 d1 d7 41) TD12 [flt ] 27 (bytes 29 54 d9 41) TD13 [flt ] 28 (bytes 9f 2d df 41) TD14 [flt ] 27 (bytes 37 16 db 41) TD20 [flt ] 26 (bytes 1d c6 d2 41) TD21 [flt ] 26 (bytes 9d eb d1 41) TD22 [flt ] 28 (bytes 88 a6 dd 41) TD23 [flt ] 29 (bytes a6 92 e6 41) TD24 [flt ] 27 (bytes 33 ed d8 41) TDBP [flt ] 28 (bytes 00 80 e0 41) TDEL [flt ] 27 (bytes 00 00 d9 41) TDER [flt ] 28 (bytes 00 00 dc 41) TDTC [flt ] 29 (bytes 00 80 eb 41) TDTP [flt ] 29 (bytes 00 00 e6 41) TDVx [flt ] 29 (bytes a6 92 e6 41) TDeL [flt ] 27 (bytes 00 80 d4 41) TDeR [flt ] 27 (bytes 00 00 da 41) TG0B [ioft] (bytes 66 e6 1a 00 00 00 00 00) TG0C [ioft] (bytes 00 00 1a 00 00 00 00 00) TG0H [ioft] (bytes 00 00 1a 00 00 00 00 00) TG0V [ioft] (bytes 66 e6 1a 00 00 00 00 00) TG1B [ioft] (bytes 66 e6 1a 00 00 00 00 00) TG2B [ioft] (bytes cc 4c 1a 00 00 00 00 00) TH0A [flt ] 29 (bytes e8 8c e7 41) TH0B [flt ] 28 (bytes 90 9d e0 41) TH0x [flt ] 29 (bytes e8 8c e7 41) TIOP [flt ] 27 (bytes e8 8f d9 41) TMVR [flt ] 29 (bytes a8 a6 e6 41) TPD0 [flt ] 35 (bytes b0 66 0b 42) TPD1 [flt ] 32 (bytes 68 22 ff 41) TPD2 [flt ] 32 (bytes a8 7e fe 41) TPD3 [flt ] 31 (bytes 98 60 f9 41) TPD4 [flt ] 32 (bytes 20 37 fd 41) TPD5 [flt ] 34 (bytes 88 29 09 42) TPD6 [flt ] 32 (bytes 58 ce 01 42) TPD7 [flt ] 35 (bytes 90 b8 0b 42) TPD8 [flt ] 31 (bytes 20 a8 fa 41) TPD9 [flt ] 32 (bytes e8 da fd 41) TPDA [flt ] 31 (bytes d0 2d f6 41) TPDB [flt ] 32 (bytes 60 93 fc 41) TPDC [flt ] 32 (bytes a8 7e fe 41) TPDD [flt ] 32 (bytes b8 d8 00 42) TPDE [flt ] 32 (bytes 68 22 ff 41) TPDF [flt ] 32 (bytes 20 37 fd 41) TPDX [flt ] 35 (bytes 90 b8 0b 42) TPMP [flt ] 31 (bytes 50 d1 f8 41) TPSP [flt ] 29 (bytes 10 6a ea 41) TR0Z [ioft] (bytes ec d1 33 00 00 00 00 00) TR1d [ioft] (bytes 93 87 1d 00 00 00 00 00) TR2d [ioft] (bytes a4 74 1b 00 00 00 00 00) TR3d [ioft] (bytes 9d f1 1c 00 00 00 00 00) TR4d [ioft] (bytes b2 13 1c 00 00 00 00 00) TR5d [ioft] (bytes 3f ff 1a 00 00 00 00 00) TRD0 [flt ] 29 (bytes c0 f1 eb 41) TRD1 [flt ] 30 (bytes 48 c8 ef 41) TRD2 [flt ] 29 (bytes 70 77 e7 41) TRD3 [flt ] 28 (bytes e0 11 e1 41) TRD4 [flt ] 29 (bytes 70 e8 e4 41) TRD5 [flt ] 29 (bytes 70 77 e7 41) TRD6 [flt ] 28 (bytes e8 a0 e3 41) TRD7 [flt ] 29 (bytes f8 be e8 41) TRD8 [flt ] 29 (bytes 30 8c e5 41) TRDX [flt ] 30 (bytes 48 c8 ef 41) TSCD [flt ] 34 (bytes 3c 99 06 42) TVA0 [flt ] 21 (bytes 28 8f ab 41) TVD0 [flt ] 47 (bytes 3b 3a 3d 42) TVDi [si32] (bytes 08 00 00 00) TVM0 [flt ] 0 (bytes 00 00 00 00) TVMD [flt ] 0 (bytes 00 00 00 00) TVMS [flt ] 63 (bytes 63 c2 7d 42) TVMh [flt ] 36 (bytes 0a 89 11 42) TVMm [flt ] 0 (bytes 00 00 00 00) TVMs [flt ] 0 (bytes 00 00 00 00) TVS0 [flt ] 29 (bytes e4 96 e4 41) TVS1 [flt ] 28 (bytes 81 2c dc 41) TVV0 [flt ] 32 (bytes 78 7c 01 42) TVVi [si32] (bytes 00 00 00 00) TVm0 [flt ] 0 (bytes 00 00 00 00) TVm1 [flt ] 35 (bytes fa 03 0a 42) TVm2 [flt ] 0 (bytes 00 00 00 00) TVmS [flt ] 40 (bytes 00 00 20 42) TVmd [flt ] 0 (bytes 00 00 00 00) TW0P [flt ] 30 (bytes 08 1c f1 41) Ta00 [flt ] 0 (bytes 00 00 00 00) Ta01 [flt ] 6 (bytes 66 66 c6 40) Ta04 [flt ] 0 (bytes 00 00 00 00) Ta05 [flt ] 6 (bytes 66 66 c6 40) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] 6 (bytes 66 66 c6 40) Ta0K [flt ] 0 (bytes 00 00 00 00) Ta0L [flt ] 6 (bytes 66 66 c6 40) Ta0O [flt ] 0 (bytes 00 00 00 00) Ta0P [flt ] 6 (bytes 66 66 c6 40) Ta0R [flt ] 0 (bytes 00 00 00 00) Ta0S [flt ] 6 (bytes 66 66 c6 40) TaLR [flt ] 27 (bytes d8 22 d9 41) TaLW [flt ] 27 (bytes f8 f9 d7 41) Te04 [flt ] 35 (bytes 0a d3 0b 42) Te05 [flt ] 42 (bytes d7 9f 28 42) Te06 [flt ] 47 (bytes 00 40 3d 42) Te08 [flt ] 35 (bytes d1 6c 0b 42) Te09 [flt ] 42 (bytes 9e 39 28 42) Te0A [flt ] 47 (bytes 00 e0 3b 42) Te0G [flt ] 34 (bytes 2e 7c 09 42) Te0H [flt ] 42 (bytes fb 48 26 42) Te0I [flt ] 46 (bytes 00 60 37 42) Te0R [flt ] 34 (bytes 49 ff 08 42) Te0S [flt ] 41 (bytes 16 cc 25 42) Te0T [flt ] 46 (bytes 00 90 38 42) Te0U [flt ] 39 (bytes db f5 1d 42) Te0V [flt ] 47 (bytes 00 40 3d 42) Te0W [flt ] 39 (bytes 41 1a 1b 42) Te0X [flt ] 46 (bytes 00 90 39 42) TfC0 [flt ] 31 (bytes cd fc f9 41) TfC1 [flt ] 31 (bytes 48 41 fb 41) Tg0C [flt ] 35 (bytes 81 13 0a 42) Tg0D [flt ] 40 (bytes b4 46 1f 42) Tg0G [flt ] 35 (bytes 28 e0 0a 42) Tg0H [flt ] 40 (bytes 5b 13 20 42) Tg0K [flt ] 35 (bytes 28 b8 0a 42) Tg0L [flt ] 40 (bytes 5b eb 1f 42) Tg0O [flt ] 34 (bytes 0d 20 09 42) Tg0P [flt ] 40 (bytes 40 53 1e 42) Tg0U [flt ] 36 (bytes 3b f5 11 42) Tg0V [flt ] 42 (bytes 6e 28 27 42) Tg0X [flt ] 36 (bytes 70 a5 0e 42) Tg0Y [flt ] 41 (bytes a3 d8 23 42) Tg0d [flt ] 35 (bytes 4f 81 0c 42) Tg0e [flt ] 40 (bytes 82 b4 21 42) Tg0j [flt ] 35 (bytes 2e 09 0c 42) Tg0k [flt ] 40 (bytes 61 3c 21 42) Tg0m [flt ] 34 (bytes 6b d0 08 42) Tg0n [flt ] 40 (bytes 9e 03 1e 42) Tp00 [flt ] 37 (bytes 22 b9 13 42) Tp01 [flt ] 46 (bytes 55 ec 36 42) Tp02 [flt ] 57 (bytes 00 20 64 42) Tp04 [flt ] 37 (bytes 83 f9 13 42) Tp05 [flt ] 46 (bytes b6 2c 37 42) Tp06 [flt ] 59 (bytes 00 30 6d 42) Tp08 [flt ] 37 (bytes d0 38 14 42) Tp09 [flt ] 46 (bytes 03 6c 37 42) Tp0A [flt ] 59 (bytes 00 80 6a 42) Tp0C [flt ] 36 (bytes 61 33 11 42) Tp0D [flt ] 45 (bytes 94 66 34 42) Tp0E [flt ] 57 (bytes 00 10 62 42) Tp0U [flt ] 38 (bytes f6 e5 16 42) Tp0V [flt ] 47 (bytes 29 19 3a 42) Tp0W [flt ] 66 (bytes 00 60 83 42) Tp0X [flt ] 37 (bytes 0a 61 12 42) Tp0Y [flt ] 45 (bytes 3d 94 35 42) Tp0Z [flt ] 61 (bytes 00 90 74 42) Tp0a [flt ] 38 (bytes 64 12 16 42) Tp0b [flt ] 46 (bytes 97 45 39 42) Tp0c [flt ] 64 (bytes 00 c0 80 42) Tp0d [flt ] 37 (bytes dc 82 12 42) Tp0e [flt ] 45 (bytes 0f b6 35 42) Tp0f [flt ] 61 (bytes 00 e0 72 42) Tp1A [flt ] 36 (bytes 08 07 0e 42) Tp1B [flt ] 47 (bytes 3b 3a 3d 42) Tp1C [flt ] 56 (bytes 00 00 5f 42) Tp1E [flt ] 35 (bytes 5f 1a 0d 42) Tp1F [flt ] 47 (bytes 92 4d 3c 42) Tp1G [flt ] 56 (bytes 00 70 5e 42) Tp1Q [flt ] 35 (bytes a4 4b 0d 42) Tp1R [flt ] 47 (bytes d7 7e 3c 42) Tp1S [flt ] 54 (bytes 00 a0 59 42) Tp3O [flt ] 42 (bytes eb 4a 29 42) Tp3P [flt ] 66 (bytes 00 60 83 42) Tp3S [flt ] 40 (bytes 16 3d 20 42) Tp3T [flt ] 56 (bytes 00 00 5f 42) Tp3W [flt ] 42 (bytes 8e 56 28 42) Tp3X [flt ] 64 (bytes 00 c0 80 42) Ts00 [flt ] 34 (bytes 78 13 07 42) Ts01 [flt ] 34 (bytes 78 13 07 42) Ts02 [flt ] 34 (bytes 00 50 09 42) Ts04 [flt ] 34 (bytes f6 f1 07 42) Ts05 [flt ] 34 (bytes f6 f1 07 42) Ts06 [flt ] 35 (bytes 00 20 0a 42) Ts08 [flt ] 34 (bytes c4 83 08 42) Ts09 [flt ] 34 (bytes c4 83 08 42) Ts0A [flt ] 35 (bytes 00 c0 0c 42) Ts0C [flt ] 34 (bytes ec fb 08 42) Ts0D [flt ] 34 (bytes ec fb 08 42) Ts0E [flt ] 36 (bytes 00 60 0e 42) Ts0G [flt ] 35 (bytes cc d1 0a 42) Ts0H [flt ] 35 (bytes cc d1 0a 42) Ts0I [flt ] 38 (bytes 00 00 18 42) Ts0K [flt ] 36 (bytes 19 3c 0e 42) Ts0L [flt ] 36 (bytes 19 3c 0e 42) Ts0M [flt ] 39 (bytes 00 20 1a 42) Ts0O [flt ] 34 (bytes 6e 36 09 42) Ts0Q [flt ] 34 (bytes 6e 36 09 42) Ts0R [flt ] 36 (bytes 00 c0 0f 42) Ts0S [flt ] 35 (bytes 0b 03 0c 42) Ts0T [flt ] 35 (bytes 0b 03 0c 42) Ts0U [flt ] 39 (bytes 00 10 1a 42) Ts0h [flt ] 36 (bytes d6 56 0e 42) Ts0i [flt ] 39 (bytes 00 20 1a 42) Ts1P [flt ] 25 (bytes 00 80 ca 41) TsOP [flt ] 26 (bytes 00 80 d3 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m4-3.txt ================================================ TCMb [flt ] 48 (bytes 31 7c 41 42) TCMz [flt ] 75 (bytes 00 c0 96 42) TH0a [flt ] 31 (bytes 00 c0 f9 41) TH0b [flt ] 31 (bytes 00 d0 f8 41) TH0p [flt ] 31 (bytes a8 af f6 41) TH0x [flt ] 31 (bytes 00 c0 f9 41) TIED [flt ] 33 (bytes 08 1c 03 42) TMVR [flt ] 35 (bytes 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34.395447 (bytes f0 94 09 42) TPDf [flt ] 32.678894 (bytes 30 b7 02 42) TPMp [flt ] 28.358002 (bytes 30 dd e2 41) TPSD [flt ] 27.58876 (bytes c8 b5 dc 41) TPSp [flt ] 29.627228 (bytes 90 04 ed 41) TR0Z [ioft] 51.850006 (bytes 9a d9 33 00 00 00 00 00) TR1d [ioft] 29.491135 (bytes bb 7d 1d 00 00 00 00 00) TR2d [ioft] 27.526642 (bytes d2 86 1b 00 00 00 00 00) TR5p [flt ] 30.24089 (bytes 58 ed f1 41) TRD0 [flt ] 35.039154 (bytes 18 28 0c 42) TRD1 [flt ] 34.824585 (bytes 60 4c 0b 42) TRD2 [flt ] 34.824585 (bytes 60 4c 0b 42) TRD3 [flt ] 35.361008 (bytes ac 71 0d 42) TRD4 [flt ] 35.039154 (bytes 18 28 0c 42) TRD5 [flt ] 35.14644 (bytes f4 95 0c 42) TRD6 [flt ] 35.14644 (bytes f4 95 0c 42) TRD7 [flt ] 35.253723 (bytes d0 03 0d 42) TRD8 [flt ] 35.039154 (bytes 18 28 0c 42) TRD9 [flt ] 35.253723 (bytes d0 03 0d 42) TRDX [flt ] 36.32657 (bytes 68 4e 11 42) TRDa [flt ] 34.824585 (bytes 60 4c 0b 42) TRDb [flt ] 34.50273 (bytes cc 02 0a 42) TRDc [flt ] 35.790146 (bytes 1c 29 0f 42) TRDd [flt ] 36.004715 (bytes d4 04 10 42) TRDe [flt ] 36.32657 (bytes 68 4e 11 42) TRDf [flt ] 34.288162 (bytes 14 27 09 42) TS0p [flt ] 29.213028 (bytes 48 b4 e9 41) TSDD [flt ] 29.047348 (bytes f8 60 e8 41) TSVL [flt ] 28.875748 (bytes 88 01 e7 41) TSVR [flt ] 29.491135 (bytes d8 ed eb 41) TVD0 [flt ] 40 (bytes 00 00 20 42) TVDi [si32] 33554432 (bytes 02 00 00 00) TVMD [flt ] 0 (bytes 00 00 00 00) TVS0 [flt ] 26.501144 (bytes 58 02 d4 41) TVS1 [flt ] 26.151281 (bytes d3 35 d1 41) TVV0 [flt ] 36.32657 (bytes 68 4e 11 42) TVVi [si32] 16777216 (bytes 01 00 00 00) TVmD [flt ] 0 (bytes 00 00 00 00) Ta00 [flt ] 0 (bytes 00 00 00 00) Ta01 [flt ] 9.4 (bytes 66 66 16 41) Ta04 [flt ] 0 (bytes 00 00 00 00) Ta05 [flt ] 9.4 (bytes 66 66 16 41) Ta08 [flt ] 0 (bytes 00 00 00 00) Ta09 [flt ] 9.4 (bytes 66 66 16 41) Ta0K [flt ] 0 (bytes 00 00 00 00) Ta0L [flt ] 9.4 (bytes 66 66 16 41) Ta0O [flt ] 0 (bytes 00 00 00 00) Ta0P [flt ] 9.4 (bytes 66 66 16 41) Ta0R [flt ] 0 (bytes 00 00 00 00) Ta0S [flt ] 9.4 (bytes 66 66 16 41) TaFL [flt ] 26.656815 (bytes 28 41 d5 41) TaFR [flt ] 26.565094 (bytes 50 85 d4 41) TaRL [flt ] 27.431961 (bytes a8 74 db 41) TaRR [flt ] 29.724854 (bytes 80 cc ed 41) Te04 [flt ] 28.407814 (bytes 34 43 e3 41) Te05 [flt ] 34.207813 (bytes cd d4 08 42) Te06 [flt ] 37.4375 (bytes 00 c0 15 42) Te0R [flt ] 28.947063 (bytes 96 93 e7 41) Te0S [flt ] 34.547062 (bytes 31 30 0a 42) Te0T [flt ] 37.609375 (bytes 00 70 16 42) Tex0 [flt ] 32.473675 (bytes 0b e5 01 42) Tex1 [flt ] 37.4375 (bytes 00 c0 15 42) Tex2 [flt ] 32.94991 (bytes b5 cc 03 42) Tex3 [flt ] 37.609375 (bytes 00 70 16 42) Tf04 [flt ] 30.22125 (bytes 1f c5 f1 41) Tf06 [flt ] 52.390625 (bytes 00 90 51 42) Tf08 [flt ] 29.269375 (bytes ae 27 ea 41) Tf09 [flt ] 29.540625 (bytes 33 53 ec 41) Tf0A [flt ] 30.154062 (bytes 85 3b f1 41) Tf0B [flt ] 29.964375 (bytes 0a b7 ef 41) Tf14 [flt ] 29.19625 (bytes ec 91 e9 41) Tf16 [flt ] 66.609375 (bytes 00 38 85 42) Tf18 [flt ] 28.525625 (bytes 7b 34 e4 41) Tf19 [flt ] 28.908438 (bytes 7b 44 e7 41) Tf1A [flt ] 28.416876 (bytes c3 55 e3 41) Tf1B [flt ] 29.050312 (bytes 0a 67 e8 41) Tf24 [flt ] 29.53125 (bytes 00 40 ec 41) Tf26 [flt ] 65.765625 (bytes 00 88 83 42) Tf28 [flt ] 28.920626 (bytes 71 5d e7 41) Tf29 [flt ] 29.0375 (bytes cd 4c e8 41) Tf2A [flt ] 29.2475 (bytes e1 fa e9 41) Tf2B [flt ] 29.32125 (bytes ec 91 ea 41) Tf34 [flt ] 28.863125 (bytes ae e7 e6 41) Tf36 [flt ] 50.6875 (bytes 00 c0 4a 42) Tf38 [flt ] 28.183437 (bytes ae 77 e1 41) Tf39 [flt ] 28.270624 (bytes 3d 2a e2 41) Tf3A [flt ] 28.820938 (bytes 48 91 e6 41) Tf3B [flt ] 28.315624 (bytes 66 86 e2 41) Tf44 [flt ] 30.051874 (bytes 3d 6a f0 41) Tf46 [flt ] 53.53125 (bytes 00 20 56 42) Tf48 [flt ] 29.237812 (bytes 0a e7 e9 41) Tf49 [flt ] 29.812813 (bytes a4 80 ee 41) Tf4A [flt ] 29.934376 (bytes 9a 79 ef 41) Tf4B [flt ] 29.930626 (bytes ec 71 ef 41) Tg04 [flt ] 32.466393 (bytes 96 dd 01 42) Tg05 [flt ] 36.666393 (bytes 63 aa 12 42) Tg0K [flt ] 32.462852 (bytes f6 d9 01 42) Tg0L [flt ] 28.462852 (bytes ec b3 e3 41) Tg0R [flt ] 32.474056 (bytes 6f e5 01 42) Tg0S [flt ] 34.274055 (bytes a2 18 09 42) Tg0X [flt ] 32.23467 (bytes 4d f0 00 42) Tg0Y [flt ] 36.43467 (bytes 1a bd 11 42) Tg0d [flt ] 32.1592 (bytes 05 a3 00 42) Tg0e [flt ] 28.159199 (bytes 0a 46 e1 41) Tg0j [flt ] 32.701355 (bytes 30 ce 02 42) Tg0k [flt ] 36.901356 (bytes fd 9a 13 42) Tg0y [flt ] 32.23644 (bytes 1d f2 00 42) Tg0z [flt ] 36.43644 (bytes ea be 11 42) Tg1E [flt ] 32.113503 (bytes 3a 74 00 42) Tg1F [flt ] 28.113503 (bytes 74 e8 e0 41) Tg1U [flt ] 32.22317 (bytes 87 e4 00 42) Tg1V [flt ] 36.423172 (bytes 54 b1 11 42) Tg1c [flt ] 32.158905 (bytes b8 a2 00 42) Tg1d [flt ] 28.158905 (bytes 70 45 e1 41) Tg1k [flt ] 32.34375 (bytes 00 60 01 42) Tg1l [flt ] 36.54375 (bytes cd 2c 12 42) Tg21 [flt ] 32.457844 (bytes d5 d4 01 42) Tg22 [flt ] 36.657845 (bytes a2 a1 12 42) Tg2H [flt ] 32.278893 (bytes 96 1d 01 42) Tg2I [flt ] 28.278893 (bytes 2c 3b e2 41) Tg2P [flt ] 32.32606 (bytes e3 4d 01 42) Tg2Q [flt ] 34.12606 (bytes 16 81 08 42) Tg2X [flt ] 32.146523 (bytes 0a 96 00 42) Tg2Y [flt ] 36.346523 (bytes d7 62 11 42) Tg2f [flt ] 32.402122 (bytes c6 9b 01 42) Tg2g [flt ] 36.602123 (bytes 93 68 12 42) Tg2n [flt ] 32.205482 (bytes 6a d2 00 42) Tg2o [flt ] 36.405483 (bytes 37 9f 11 42) Tg33 [flt ] 32.01356 (bytes e3 0d 00 42) Tg34 [flt ] 36.213562 (bytes b0 da 10 42) Tg3J [flt ] 32.38709 (bytes 61 8c 01 42) Tg3K [flt ] 28.387089 (bytes c2 18 e3 41) Tg3Z [flt ] 32.071934 (bytes a9 49 00 42) Tg3a [flt ] 36.271935 (bytes 76 16 11 42) Tg3h [flt ] 32.135612 (bytes de 8a 00 42) Tg3i [flt ] 36.335613 (bytes ab 57 11 42) Tg3p [flt ] 32.140034 (bytes 65 8f 00 42) Tg3q [flt ] 36.340034 (bytes 32 5c 11 42) Tp00 [flt ] 40 (bytes 00 00 20 42) Tp01 [flt ] 40 (bytes 00 00 20 42) Tp02 [flt ] 40 (bytes 00 00 20 42) Tp04 [flt ] 40 (bytes 00 00 20 42) Tp05 [flt ] 40 (bytes 00 00 20 42) Tp06 [flt ] 40 (bytes 00 00 20 42) Tp08 [flt ] 40 (bytes 00 00 20 42) Tp09 [flt ] 40 (bytes 00 00 20 42) Tp0A [flt ] 40 (bytes 00 00 20 42) Tp0C [flt ] 40 (bytes 00 00 20 42) Tp0D [flt ] 40 (bytes 00 00 20 42) Tp0E [flt ] 40 (bytes 00 00 20 42) Tp0G [flt ] 40 (bytes 00 00 20 42) Tp0H [flt ] 40 (bytes 00 00 20 42) Tp0I [flt ] 40 (bytes 00 00 20 42) Tp0K [flt ] 40 (bytes 00 00 20 42) Tp0L [flt ] 40 (bytes 00 00 20 42) Tp0M [flt ] 40 (bytes 00 00 20 42) Tp0O [flt ] 40 (bytes 00 00 20 42) Tp0P [flt ] 40 (bytes 00 00 20 42) Tp0Q [flt ] 40 (bytes 00 00 20 42) Tp0S [flt ] 40 (bytes 00 00 20 42) Tp0T [flt ] 40 (bytes 00 00 20 42) Tp0U [flt ] 40 (bytes 00 00 20 42) Tp0W [flt ] 40 (bytes 00 00 20 42) Tp0X [flt ] 40 (bytes 00 00 20 42) Tp0Y [flt ] 40 (bytes 00 00 20 42) Tp0a [flt ] 40 (bytes 00 00 20 42) Tp0b [flt ] 40 (bytes 00 00 20 42) Tp0c [flt ] 40 (bytes 00 00 20 42) Tp0d [flt ] 40 (bytes 00 00 20 42) Tp0e [flt ] 40 (bytes 00 00 20 42) Tp0f [flt ] 40 (bytes 00 00 20 42) Tp0g [flt ] 40 (bytes 00 00 20 42) Tp0i [flt ] 40 (bytes 00 00 20 42) Tp0k [flt ] 40 (bytes 00 00 20 42) Tp0l [flt ] 40 (bytes 00 00 20 42) Tp0m [flt ] 40 (bytes 00 00 20 42) Tp0n [flt ] 40 (bytes 00 00 20 42) Tp0o [flt ] 40 (bytes 00 00 20 42) Tp0q [flt ] 40 (bytes 00 00 20 42) Tp0t [flt ] 40 (bytes 00 00 20 42) Tp0u [flt ] 40 (bytes 00 00 20 42) Tp0v [flt ] 40 (bytes 00 00 20 42) Tp0w [flt ] 40 (bytes 00 00 20 42) Tp1i [flt ] -4 (bytes 00 00 80 c0) Tp1j [flt ] 4 (bytes 00 00 80 40) Tp1k [flt ] 0 (bytes 00 00 00 00) Tp1m [flt ] -4 (bytes 00 00 80 c0) Tp1n [flt ] 2.5 (bytes 00 00 20 40) Tp1o [flt ] 0 (bytes 00 00 00 00) Tp1q [flt ] -4 (bytes 00 00 80 c0) Tp1t [flt ] 4 (bytes 00 00 80 40) Tp1u [flt ] 0 (bytes 00 00 00 00) Tp1v [flt ] -4 (bytes 00 00 80 c0) Tp1w [flt ] 2.5 (bytes 00 00 20 40) Tp1x [flt ] 0 (bytes 00 00 00 00) Tp1y [flt ] -4 (bytes 00 00 80 c0) Tp1z [flt ] 4 (bytes 00 00 80 40) Tp20 [flt ] 0 (bytes 00 00 00 00) Tp21 [flt ] -4 (bytes 00 00 80 c0) Tp22 [flt ] 2.5 (bytes 00 00 20 40) Tp23 [flt ] 0 (bytes 00 00 00 00) Tp24 [flt ] -4 (bytes 00 00 80 c0) Tp25 [flt ] 4 (bytes 00 00 80 40) Tp26 [flt ] 0 (bytes 00 00 00 00) Tp27 [flt ] -4 (bytes 00 00 80 c0) Tp28 [flt ] 2.5 (bytes 00 00 20 40) Tp29 [flt ] 0 (bytes 00 00 00 00) Tp2A [flt ] -4 (bytes 00 00 80 c0) Tp2B [flt ] 4 (bytes 00 00 80 40) Tp2C [flt ] 0 (bytes 00 00 00 00) Tp2D [flt ] -4 (bytes 00 00 80 c0) Tp2E [flt ] 2.5 (bytes 00 00 20 40) Tp2G [flt ] 0 (bytes 00 00 00 00) Tp2I [flt ] -4 (bytes 00 00 80 c0) Tp2J [flt ] 4 (bytes 00 00 80 40) Tp2K [flt ] 0 (bytes 00 00 00 00) Tp2L [flt ] -4 (bytes 00 00 80 c0) Tp2M [flt ] 2.5 (bytes 00 00 20 40) Tp2N [flt ] 0 (bytes 00 00 00 00) Tp2O [flt ] -4 (bytes 00 00 80 c0) Tp2Q [flt ] 5.2 (bytes 66 66 a6 40) Tp2R [flt ] 0 (bytes 00 00 00 00) Tp2S [flt ] -4 (bytes 00 00 80 c0) Tp2T [flt ] 5.2 (bytes 66 66 a6 40) Tp2U [flt ] 0 (bytes 00 00 00 00) Tp2V [flt ] -4 (bytes 00 00 80 c0) Tp2W [flt ] 5.2 (bytes 66 66 a6 40) Tp2X [flt ] 0 (bytes 00 00 00 00) Tpx0 [flt ] 40 (bytes 00 00 20 42) Tpx1 [flt ] 40 (bytes 00 00 20 42) Tpx2 [flt ] 40 (bytes 00 00 20 42) Tpx3 [flt ] 40 (bytes 00 00 20 42) Tpx4 [flt ] 40 (bytes 00 00 20 42) Tpx5 [flt ] 40 (bytes 00 00 20 42) Tpx8 [flt ] 0 (bytes 00 00 00 00) Tpx9 [flt ] 0 (bytes 00 00 00 00) TpxA [flt ] 0 (bytes 00 00 00 00) TpxB [flt ] 0 (bytes 00 00 00 00) TpxC [flt ] 0 (bytes 00 00 00 00) TpxD [flt ] 0 (bytes 00 00 00 00) Ts00 [flt ] 28.105988 (bytes 10 d9 e0 41) Ts01 [flt ] 28.105988 (bytes 10 d9 e0 41) Ts02 [flt ] 28.375 (bytes 00 00 e3 41) Ts04 [flt ] 28.415178 (bytes 49 52 e3 41) Ts05 [flt ] 28.415178 (bytes 49 52 e3 41) Ts06 [flt ] 28.75 (bytes 00 00 e6 41) Ts08 [flt ] 28.639086 (bytes d9 1c e5 41) Ts09 [flt ] 28.639086 (bytes d9 1c e5 41) Ts0A [flt ] 28.953125 (bytes 00 a0 e7 41) Ts0C [flt ] 28.589901 (bytes 1e b8 e4 41) Ts0D [flt ] 28.589901 (bytes 1e b8 e4 41) Ts0E [flt ] 28.90625 (bytes 00 40 e7 41) Ts0G [flt ] 28.481142 (bytes 61 d9 e3 41) Ts0H [flt ] 28.481142 (bytes 61 d9 e3 41) Ts0I [flt ] 28.578125 (bytes 00 a0 e4 41) Ts0K [flt ] 28.669565 (bytes 45 5b e5 41) Ts0L [flt ] 28.669565 (bytes 45 5b e5 41) Ts0M [flt ] 28.90625 (bytes 00 40 e7 41) Ts0O [flt ] 28.292795 (bytes a5 57 e2 41) Ts0Q [flt ] 28.292795 (bytes a5 57 e2 41) Ts0R [flt ] 28.640625 (bytes 00 20 e5 41) Ts0T [flt ] 28.334667 (bytes 66 ad e2 41) Ts0U [flt ] 28.334667 (bytes 66 ad e2 41) Ts0W [flt ] 28.640625 (bytes 00 20 e5 41) Ts0d [flt ] 29.210745 (bytes 9b af e9 41) Ts0e [flt ] 29.210745 (bytes 9b af e9 41) Ts0f [flt ] 29.484375 (bytes 00 e0 eb 41) Ts0g [flt ] 28.71698 (bytes 60 bc e5 41) Ts0h [flt ] 28.71698 (bytes 60 bc e5 41) Ts0i [flt ] 28.9375 (bytes 00 80 e7 41) Tsx0 [flt ] 28.668428 (bytes f1 58 e5 41) Tsx1 [flt ] 28.953125 (bytes 00 a0 e7 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m4-pro-2.txt ================================================ TAOL [flt ] (bytes 00 90 d8 41) TB0T [flt ] (bytes 98 99 e5 41) TB1T [flt ] (bytes 98 99 e5 41) TB2T [flt ] (bytes c8 cc e4 41) TCHP [flt ] (bytes 24 45 05 42) TCMb [flt ] (bytes 86 ae 27 42) TCMz [flt ] (bytes 00 e0 35 42) TD00 [flt ] (bytes fd 59 d2 41) TD01 [flt ] (bytes 72 0b d3 41) TD02 [flt ] (bytes b6 66 d7 41) TD03 [flt ] (bytes a8 8f cf 41) TD04 [flt ] (bytes a5 4e cf 41) TD10 [flt ] (bytes 4f a0 d5 41) TD11 [flt ] (bytes cb 91 d8 41) TD12 [flt ] (bytes 35 3b d9 41) TD13 [flt ] (bytes bf 94 d6 41) TD14 [flt ] (bytes 66 e3 d3 41) TD20 [flt ] (bytes 82 50 d9 41) TD21 [flt ] (bytes c0 e1 dc 41) TD22 [flt ] (bytes f2 62 e6 41) TD23 [flt ] (bytes 6f cd e6 41) TD24 [flt ] (bytes cf 0d dd 41) TDBP [flt ] (bytes 00 00 ee 41) TDEL [flt ] (bytes 00 80 e4 41) TDER [flt ] (bytes 00 00 e4 41) TDTC [flt ] (bytes 00 80 f5 41) TDTP [flt ] (bytes 00 80 f5 41) TDVx [flt ] (bytes 6f cd e6 41) TDeL [flt ] (bytes 00 00 e3 41) TDeR [flt ] (bytes 00 00 df 41) TG0B [ioft] (bytes 33 b3 1c 00 00 00 00 00) TG0C [ioft] (bytes 00 00 1c 00 00 00 00 00) TG0H [ioft] (bytes 00 00 1c 00 00 00 00 00) TG0V [ioft] (bytes 33 b3 1c 00 00 00 00 00) TG1B [ioft] (bytes 33 b3 1c 00 00 00 00 00) TG2B [ioft] (bytes 33 b3 1c 00 00 00 00 00) TH0a [flt ] (bytes 00 2c 00 42) TH0b [flt ] (bytes 00 54 00 42) TH0x [flt ] (bytes 00 54 00 42) TMVR [flt ] (bytes 8c 3f 0a 42) TPD0 [flt ] (bytes a8 d7 08 42) TPD1 [flt ] (bytes 44 3e 07 42) TPD2 [flt ] (bytes 08 e2 07 42) TPD3 [flt ] (bytes 44 3e 07 42) TPD4 [flt ] (bytes 90 b8 0b 42) TPD5 [flt ] (bytes 2c 1f 0a 42) TPD6 [flt ] (bytes ec c2 0a 42) TPD7 [flt ] (bytes 50 5c 0c 42) TPD8 [flt ] (bytes c8 85 08 42) TPD9 [flt ] (bytes 64 ec 06 42) TPDX [flt ] (bytes 50 5c 0c 42) TPDa [flt ] (bytes c8 85 08 42) TPDb [flt ] (bytes 24 90 07 42) TPDc [flt ] (bytes 08 e2 07 42) TPDd [flt ] (bytes e8 33 08 42) TPDe [flt ] (bytes 4c cd 09 42) TPDf [flt ] (bytes 24 90 07 42) TPMP [flt ] (bytes 0c aa 0b 42) TPSP [flt ] (bytes b0 1b 0e 42) TR0Z [ioft] (bytes ec d1 33 00 00 00 00 00) TR1d [ioft] (bytes b0 92 21 00 00 00 00 00) TR2d [ioft] (bytes 00 80 23 00 00 00 00 00) TRD0 [flt ] (bytes 24 90 07 42) TRD1 [flt ] (bytes a8 d7 08 42) TRD2 [flt ] (bytes 0c 71 0a 42) TRD3 [flt ] (bytes a8 d7 08 42) TRD4 [flt ] (bytes 94 47 0e 42) TRD5 [flt ] (bytes 50 5c 0c 42) TRD6 [flt ] (bytes d4 a3 0d 42) TRD7 [flt ] (bytes 50 5c 0c 42) TRD8 [flt ] (bytes ec c2 0a 42) TRD9 [flt ] (bytes e8 33 08 42) TRDX [flt ] (bytes 18 8f 0f 42) TRDa [flt ] (bytes cc 14 0b 42) TRDb [flt ] (bytes 0c 71 0a 42) TRDc [flt ] (bytes 50 5c 0c 42) TRDd [flt ] (bytes 18 8f 0f 42) TRDe [flt ] (bytes 50 5c 0c 42) TRDf [flt ] (bytes ec c2 0a 42) TS0P [flt ] (bytes 4c d1 08 42) TSCP [flt ] (bytes 24 fe 06 42) TSG1 [flt ] (bytes 10 f1 0b 42) TSG2 [flt ] (bytes 74 a4 06 42) TUD0 [flt ] (bytes 00 53 05 42) TUD1 [flt ] (bytes 00 53 05 42) TUD2 [flt ] (bytes 3f af 04 42) TUD3 [flt ] (bytes 7c 0b 04 42) TUD4 [flt ] (bytes 64 ec 06 42) TUD5 [flt ] (bytes 88 29 09 42) TUD6 [flt ] (bytes 4c cd 09 42) TUD7 [flt ] (bytes c8 85 08 42) TUD8 [flt ] (bytes 20 01 05 42) TUD9 [flt ] (bytes 7c 0b 04 42) TUDX [flt ] (bytes 4c cd 09 42) TUDa [flt ] (bytes 20 01 05 42) TUDb [flt ] (bytes 20 01 05 42) TUDc [flt ] (bytes 20 01 05 42) TUDd [flt ] (bytes 44 3e 07 42) TUDe [flt ] (bytes 64 ec 06 42) TUDf [flt ] (bytes 64 ec 06 42) TVA0 [flt ] (bytes 68 3b aa 41) TVD0 [flt ] (bytes 86 ae 27 42) TVDi [si32] (bytes 26 00 00 00) TVMD [flt ] (bytes 00 00 00 00) TVMR [flt ] (bytes ce b4 62 42) TVMX [flt ] (bytes 00 00 38 42) TVMi [si32] (bytes 00 00 00 00) TVMr [flt ] (bytes 22 d7 62 42) TVMx [flt ] (bytes 00 00 38 42) TVS0 [flt ] (bytes e3 e7 fe 41) TVS1 [flt ] (bytes 03 97 fd 41) TVS2 [flt ] (bytes 78 b9 f7 41) TVS3 [flt ] (bytes 0f d2 f6 41) TVV0 [flt ] (bytes 18 8f 0f 42) TVVi [si32] (bytes 01 00 00 00) TVXX [flt ] (bytes 2e 6a 49 42) TVXh [flt ] (bytes 45 58 4a 42) TVXm [flt ] (bytes 2e 6a 49 42) TVXs [flt ] (bytes 00 00 00 00) TVh0 [flt ] (bytes 45 58 4a 42) TVh1 [flt ] (bytes c6 7e 44 42) TVmD [flt ] (bytes 00 00 00 00) TVmS [flt ] (bytes 00 00 38 42) TVms [flt ] (bytes 00 00 38 42) TVxx [flt ] (bytes 00 00 38 42) TW0P [flt ] (bytes 44 5c 0c 42) Ta00 [flt ] (bytes 00 00 00 00) Ta01 [flt ] (bytes cd cc 04 41) Ta04 [flt ] (bytes 00 00 00 00) Ta05 [flt ] (bytes cd cc 04 41) Ta08 [flt ] (bytes 00 00 00 00) Ta09 [flt ] (bytes cd cc 04 41) Ta0K [flt ] (bytes 00 00 00 00) Ta0L [flt ] (bytes cd cc 04 41) Ta0O [flt ] (bytes 00 00 00 00) Ta0P [flt ] (bytes cd cc 04 41) Ta0R [flt ] (bytes 00 00 00 00) Ta0S [flt ] (bytes cd cc 04 41) TaLP [flt ] (bytes f0 39 0b 42) TaLT [flt ] (bytes 14 88 0f 42) TaLW [flt ] (bytes a0 05 fd 41) TaRF [flt ] (bytes f0 39 0b 42) TaRT [flt ] (bytes 88 01 eb 41) TaRW [flt ] (bytes b0 de ed 41) TaTP [flt ] (bytes b0 1b 0e 42) Te04 [flt ] (bytes 66 8a 0e 42) Te05 [flt ] (bytes 99 bd 25 42) Te06 [flt ] (bytes 00 e0 35 42) Te0R [flt ] (bytes ce 9e 0d 42) Te0S [flt ] (bytes 34 05 24 42) Te0T [flt ] (bytes 00 b0 31 42) Tex0 [flt ] (bytes aa 8b 1e 42) Tex1 [flt ] (bytes 00 e0 35 42) Tex2 [flt ] (bytes 56 a4 1d 42) Tex3 [flt ] (bytes 00 b0 31 42) TfC0 [flt ] (bytes 00 88 0d 42) TfC1 [flt ] (bytes cd a4 0d 42) TfC2 [flt ] (bytes 00 98 0c 42) TfC3 [flt ] (bytes 9a e9 0a 42) TfC4 [flt ] (bytes cd ac 0a 42) Tg04 [flt ] (bytes 00 60 0d 42) Tg05 [flt ] (bytes 9a f9 26 42) Tg0K [flt ] (bytes ec 4c 0e 42) Tg0L [flt ] (bytes ec 4c 0e 42) Tg0R [flt ] (bytes 9e f8 0c 42) Tg0S [flt ] (bytes 6b c5 25 42) Tg0X [flt ] (bytes 9e 38 0c 42) Tg0Y [flt ] (bytes 38 d2 25 42) Tg0d [flt ] (bytes d9 81 0f 42) Tg0e [flt ] (bytes d9 81 0f 42) Tg0j [flt ] (bytes ec d4 0c 42) Tg0k [flt ] (bytes 86 6e 26 42) Tg0y [flt ] (bytes 62 7f 0d 42) Tg0z [flt ] (bytes fc 18 27 42) Tg1E [flt ] (bytes b1 43 0c 42) Tg1F [flt ] (bytes b1 43 0c 42) Tg1U [flt ] (bytes 27 26 0c 42) Tg1V [flt ] (bytes c1 bf 25 42) Tg1c [flt ] (bytes 62 7f 0c 42) Tg1d [flt ] (bytes 62 7f 0c 42) Tg1k [flt ] (bytes ec 14 0e 42) Tg1l [flt ] (bytes 86 ae 27 42) Tp00 [flt ] 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FILE: reports/report-m4.txt ================================================ TAOL [flt ] 20 (bytes 00 10 a1 41) TB0T [flt ] 19 (bytes c8 cc 98 41) TB1T [flt ] 19 (bytes c8 cc 98 41) TB2T [flt ] 19 (bytes 00 00 98 41) TCHP [flt ] 22 (bytes c0 e8 b2 41) TCMb [flt ] 39 (bytes 3c 5c 1b 42) TCMz [flt ] 56 (bytes 00 50 5f 42) TD00 [flt ] 20 (bytes d3 75 a0 41) TD01 [flt ] 20 (bytes 14 04 a0 41) TD02 [flt ] 21 (bytes de 75 aa 41) TD03 [flt ] 20 (bytes 19 25 a2 41) TD04 [flt ] 20 (bytes 57 f7 a2 41) TD10 [flt ] 20 (bytes 11 95 a0 41) TD11 [flt ] 21 (bytes 3b 2f a4 41) TD12 [flt ] 21 (bytes e9 1d a4 41) TD13 [flt ] 21 (bytes 4e 57 a7 41) TD14 [flt ] 21 (bytes fe 30 a7 41) TD20 [flt ] 20 (bytes 73 1a a1 41) TD21 [flt ] 18 (bytes 8d bb 92 41) TD22 [flt ] 21 (bytes 46 93 a8 41) TD23 [flt ] 24 (bytes b6 64 bc 41) TD24 [flt ] 21 (bytes 0d 4c a5 41) TDBP [flt ] 22 (bytes 00 00 ac 41) TDEL [flt ] 20 (bytes 00 80 a2 41) TDER [flt ] 21 (bytes 00 80 a6 41) TDTC [flt ] 23 (bytes 00 00 b8 41) TDTP [flt ] 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(bytes 00 b0 5e 42) Tp0d [flt ] 28 (bytes 00 9f df 41) Tp0e [flt ] 37 (bytes b3 02 13 42) Tp0f [flt ] 54 (bytes 00 e0 59 42) Tp1A [flt ] 26 (bytes 46 ea d3 41) Tp1B [flt ] 38 (bytes 56 28 19 42) Tp1C [flt ] 45 (bytes 00 f0 32 42) Tp1E [flt ] 27 (bytes 11 52 d8 41) Tp1F [flt ] 39 (bytes 3c 5c 1b 42) Tp1G [flt ] 45 (bytes 00 70 32 42) Tp1Q [flt ] 26 (bytes 29 c5 d2 41) Tp1R [flt ] 38 (bytes c8 95 18 42) Tp1S [flt ] 44 (bytes 00 80 2f 42) Tp3O [flt ] 33 (bytes d4 5c 02 42) Tp3P [flt ] 56 (bytes 00 50 5f 42) Tp3S [flt ] 32 (bytes c4 51 fc 41) Tp3T [flt ] 45 (bytes 00 f0 32 42) Tp3W [flt ] 33 (bytes 09 a9 04 42) Tp3X [flt ] 56 (bytes 00 b0 5e 42) Ts00 [flt ] 24 (bytes b1 62 c3 41) Ts01 [flt ] 24 (bytes b1 62 c3 41) Ts02 [flt ] 25 (bytes 00 a0 c6 41) Ts04 [flt ] 25 (bytes 42 ee c4 41) Ts05 [flt ] 25 (bytes 42 ee c4 41) Ts06 [flt ] 25 (bytes 00 c0 c8 41) Ts08 [flt ] 25 (bytes e2 0b ca 41) Ts09 [flt ] 25 (bytes e2 0b ca 41) Ts0A [flt ] 26 (bytes 00 c0 d0 41) Ts0C [flt ] 25 (bytes 89 62 c8 41) Ts0D [flt ] 25 (bytes 89 62 c8 41) Ts0E [flt ] 26 (bytes 00 00 d1 41) Ts0G [flt ] 26 (bytes 38 52 ce 41) Ts0H [flt ] 26 (bytes 38 52 ce 41) Ts0I [flt ] 28 (bytes 00 60 e1 41) Ts0K [flt ] 26 (bytes b4 a5 d1 41) Ts0L [flt ] 26 (bytes b4 a5 d1 41) Ts0M [flt ] 29 (bytes 00 c0 e6 41) Ts0O [flt ] 25 (bytes 1a 21 ca 41) Ts0Q [flt ] 25 (bytes 1a 21 ca 41) Ts0R [flt ] 27 (bytes 00 e0 d5 41) Ts0S [flt ] 26 (bytes 71 72 cd 41) Ts0T [flt ] 26 (bytes 71 72 cd 41) Ts0U [flt ] 28 (bytes 00 c0 e3 41) Ts0h [flt ] 26 (bytes 27 a3 d1 41) Ts0i [flt ] 29 (bytes 00 c0 e6 41) Ts1P [flt ] 19 (bytes 00 80 96 41) TsOP [flt ] 20 (bytes 00 00 9d 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m5-max-2.txt ================================================ TAOL [flt ] 19.757812 (bytes 00 10 9e 41) TB0T [flt ] 19.5 (bytes 00 00 9c 41) TB1T [flt ] 19.5 (bytes 00 00 9c 41) TB2T [flt ] 19.5 (bytes 00 00 9c 41) TCDX [flt ] 20.017187 (bytes 33 23 a0 41) TCHP [flt ] 20.212921 (bytes 10 b4 a1 41) TCMb [flt ] 29.478125 (bytes 33 d3 eb 41) TD00 [flt ] 18.335588 (bytes 49 af 92 41) TD01 [flt ] 17.155464 (bytes 64 3e 89 41) TD02 [flt ] 17.800238 (bytes e3 66 8e 41) TD03 [flt ] 16.739902 (bytes 52 eb 85 41) TD04 [flt ] 17.344608 (bytes c2 c1 8a 41) TD10 [flt ] 17.236162 (bytes a9 e3 89 41) TD11 [flt ] 18.02623 (bytes b8 35 90 41) TD12 [flt ] 17.774014 (bytes 2e 31 8e 41) TD13 [flt ] 17.745028 (bytes d1 f5 8d 41) TD14 [flt ] 16.70464 (bytes 1a a3 85 41) TD20 [flt ] 17.594452 (bytes 70 c1 8c 41) TD21 [flt ] 18.366945 (bytes 81 ef 92 41) TD22 [flt ] 18.49613 (bytes 13 f8 93 41) TD23 [flt ] 19.001154 (bytes 5d 02 98 41) TD24 [flt ] 17.844433 (bytes 66 c1 8e 41) TDBP [flt ] 19.75 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(bytes ce b6 9f 41) TV13 [flt ] 20.487494 (bytes 63 e6 a3 41) TV14 [flt ] 20.387827 (bytes 45 1a a3 41) TVA0 [flt ] 17.956709 (bytes 57 a7 8f 41) TVAi [si32] 0 (bytes 00 00 00 00) TVCi [si32] 0 (bytes 00 00 00 00) TVD0 [flt ] 29.49375 (bytes 33 f3 eb 41) TVDA [flt ] 28.446875 (bytes 33 93 e3 41) TVDG [flt ] 28.08125 (bytes 66 a6 e0 41) TVDM [flt ] 29.4875 (bytes 66 e6 eb 41) TVDP [flt ] 29.49375 (bytes 33 f3 eb 41) TVDc [flt ] 29.49375 (bytes 33 f3 eb 41) TVDi [si32] 33554432 (bytes 02 00 00 00) TVGi [si32] 1342177280 (bytes 50 00 00 00) TVMD [flt ] 1 (bytes 00 00 80 3f) TVMR [flt ] 17.707396 (bytes bf a8 8d 41) TVMX [flt ] 40 (bytes 00 00 20 42) TVMi [si32] 150994944 (bytes 09 00 00 00) TVMj [si32] 0 (bytes 00 00 00 00) TVMr [flt ] 20.498575 (bytes 15 fd a3 41) TVN1 [flt ] 19.97322 (bytes 28 c9 9f 41) TVN2 [flt ] 19.556421 (bytes 8d 73 9c 41) TVN3 [flt ] 19.79757 (bytes 6c 61 9e 41) TVN4 [flt ] 19.81211 (bytes 34 7f 9e 41) TVN5 [flt ] 20.412369 (bytes 88 4c a3 41) TVN6 [flt ] 20.287977 (bytes c7 4d a2 41) TVN7 [flt ] 22.698353 (bytes 3a 96 b5 41) TVN8 [flt ] 20.678102 (bytes c1 6c a5 41) TVNN [flt ] 22.698353 (bytes 3a 96 b5 41) TVPi [si32] 251658240 (bytes 0f 00 00 00) TVS0 [flt ] 20.400427 (bytes 13 34 a3 41) TVS1 [flt ] 25 (bytes 00 00 c8 41) TVS2 [flt ] 19.966644 (bytes b0 bb 9f 41) TVSx [flt ] 25 (bytes 00 00 c8 41) TVV0 [flt ] 20.377731 (bytes 98 05 a3 41) TVVi [si32] 16777216 (bytes 01 00 00 00) TVmS [flt ] 40 (bytes 00 00 20 42) TVms [flt ] 40 (bytes 00 00 20 42) TW0P [flt ] 20.559814 (bytes 80 7a a4 41) Ta00 [flt ] 19.546875 (bytes 00 60 9c 41) Ta04 [flt ] 19.546875 (bytes 00 60 9c 41) Ta08 [flt ] 19.546875 (bytes 00 60 9c 41) Ta0K [flt ] 19.546875 (bytes 00 60 9c 41) Ta0O [flt ] 19.546875 (bytes 00 60 9c 41) Ta0R [flt ] 19.546875 (bytes 00 60 9c 41) TaLP [flt ] 20.444977 (bytes 50 8f a3 41) TaLT [flt ] 20.327759 (bytes 40 9f a2 41) TaLW [flt ] 19.98468 (bytes a0 e0 9f 41) TaRF [flt ] 20.157898 (bytes 60 43 a1 41) TaRT [flt ] 21.253601 (bytes 60 07 aa 41) TaRW [flt ] 20.327759 (bytes 40 9f a2 41) TaTP [flt ] 20.272736 (bytes 90 2e a2 41) Tf04 [flt ] 20.017187 (bytes 33 23 a0 41) Tf06 [flt ] 51.8125 (bytes 00 40 4f 42) Tf08 [flt ] 19.78125 (bytes 00 40 9e 41) Tf09 [flt ] 19.49375 (bytes 33 f3 9b 41) Tf0A [flt ] 18.98125 (bytes 9a d9 97 41) Tf0B [flt ] 19.78125 (bytes 00 40 9e 41) Tf14 [flt ] 19.592188 (bytes cd bc 9c 41) Tf16 [flt ] 54.953125 (bytes 00 d0 5b 42) Tf18 [flt ] 19.267187 (bytes 33 23 9a 41) Tf19 [flt ] 19.2125 (bytes 33 b3 99 41) Tf1A [flt ] 19.009375 (bytes 33 13 98 41) Tf1B [flt ] 19.123438 (bytes cd fc 98 41) TfC1 [flt ] 19.985937 (bytes 33 e3 9f 41) TfC3 [flt ] 20.246876 (bytes 9a f9 a1 41) TfC5 [flt ] 20.125 (bytes 00 00 a1 41) TfC6 [flt ] 20.04375 (bytes 9a 59 a0 41) TfC7 [flt ] 19.903126 (bytes 9a 39 9f 41) TfC8 [flt ] 19.9125 (bytes cd 4c 9f 41) TfC9 [flt ] 19.9625 (bytes 33 b3 9f 41) TfCA [flt ] 20.004688 (bytes 9a 09 a0 41) TfCC [flt ] 0 (bytes 00 00 00 00) Tg08 [flt ] 19.875 (bytes 00 00 9f 41) Tg0C [flt ] 19.890625 (bytes 00 20 9f 41) Tg0O [flt ] 19.890625 (bytes 00 20 9f 41) Tg0R [flt ] 19.890625 (bytes 00 20 9f 41) Tg0U [flt ] 19.890625 (bytes 00 20 9f 41) Tg0X [flt ] 19.875 (bytes 00 00 9f 41) Tg0a [flt ] 19.890625 (bytes 00 20 9f 41) Tg0d [flt ] 19.875 (bytes 00 00 9f 41) Tg0g [flt ] 19.875 (bytes 00 00 9f 41) Tg0j [flt ] 19.890625 (bytes 00 20 9f 41) Tg12 [flt ] 19.890625 (bytes 00 20 9f 41) Tg16 [flt ] 19.875 (bytes 00 00 9f 41) Tg1I [flt ] 19.875 (bytes 00 00 9f 41) Tg1M [flt ] 19.875 (bytes 00 00 9f 41) Tg1Q [flt ] 19.875 (bytes 00 00 9f 41) Tg1U [flt ] 19.890625 (bytes 00 20 9f 41) Tg1Y [flt ] 19.875 (bytes 00 00 9f 41) Tg1c [flt ] 19.875 (bytes 00 00 9f 41) Tg1k [flt ] 19.875 (bytes 00 00 9f 41) Tg1o [flt ] 19.890625 (bytes 00 20 9f 41) Tg1x [flt ] 19.78125 (bytes 00 40 9e 41) Tg29 [flt ] 19.78125 (bytes 00 40 9e 41) Tg2D [flt ] 19.78125 (bytes 00 40 9e 41) Tg2P [flt ] 19.78125 (bytes 00 40 9e 41) Tg2T [flt ] 19.78125 (bytes 00 40 9e 41) Tg2X [flt ] 19.78125 (bytes 00 40 9e 41) Tg2b [flt ] 19.78125 (bytes 00 40 9e 41) Tg2f [flt ] 19.78125 (bytes 00 40 9e 41) Tg2j [flt ] 19.78125 (bytes 00 40 9e 41) Tg2n [flt ] 19.78125 (bytes 00 40 9e 41) Tg2r [flt ] 19.78125 (bytes 00 40 9e 41) Tg3B [flt ] 19.78125 (bytes 00 40 9e 41) Tg3F [flt ] 19.78125 (bytes 00 40 9e 41) Tg3R [flt ] 19.78125 (bytes 00 40 9e 41) Tg3V [flt ] 19.78125 (bytes 00 40 9e 41) Tg3Z [flt ] 19.78125 (bytes 00 40 9e 41) Tg3d [flt ] 19.78125 (bytes 00 40 9e 41) Tg3h [flt ] 19.78125 (bytes 00 40 9e 41) Tg3l [flt ] 19.78125 (bytes 00 40 9e 41) Tg3t [flt ] 19.78125 (bytes 00 40 9e 41) Tg3x [flt ] 19.78125 (bytes 00 40 9e 41) Tg43 [flt ] 19.78125 (bytes 00 40 9e 41) Tg4D [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4G [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4P [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4S [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4V [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4Y [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4b [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4e [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4h [flt ] 19.703125 (bytes 00 a0 9d 41) Tg4k [flt ] 19.703125 (bytes 00 a0 9d 41) Tg50 [flt ] 19.703125 (bytes 00 a0 9d 41) Tg53 [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5C [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5F [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5I [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5L [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5O [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5R [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5Y [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5b [flt ] 19.703125 (bytes 00 a0 9d 41) Tg5h [flt ] 19.78125 (bytes 00 40 9e 41) Tg5q [flt ] 19.375 (bytes 00 00 9b 41) Tg5t [flt ] 19.375 (bytes 00 00 9b 41) Tg63 [flt ] 19.375 (bytes 00 00 9b 41) Tg66 [flt ] 19.375 (bytes 00 00 9b 41) Tg69 [flt ] 19.375 (bytes 00 00 9b 41) Tg6C [flt ] 19.359375 (bytes 00 e0 9a 41) Tg6F [flt ] 19.375 (bytes 00 00 9b 41) Tg6I [flt ] 19.375 (bytes 00 00 9b 41) Tg6L [flt ] 19.375 (bytes 00 00 9b 41) Tg6O [flt ] 19.375 (bytes 00 00 9b 41) Tg6e [flt ] 19.375 (bytes 00 00 9b 41) Tg6h [flt ] 19.375 (bytes 00 00 9b 41) Tg6q [flt ] 19.375 (bytes 00 00 9b 41) Tg6t [flt ] 19.375 (bytes 00 00 9b 41) Tg6w [flt ] 19.375 (bytes 00 00 9b 41) Tg70 [flt ] 19.375 (bytes 00 00 9b 41) Tg73 [flt ] 19.375 (bytes 00 00 9b 41) Tg76 [flt ] 19.375 (bytes 00 00 9b 41) Tg7C [flt ] 19.375 (bytes 00 00 9b 41) Tg7F [flt ] 19.375 (bytes 00 00 9b 41) Tg7L [flt ] 19.78125 (bytes 00 40 9e 41) Tm00 [flt ] 20.6875 (bytes 00 80 a5 41) Tm04 [flt ] 20.6875 (bytes 00 80 a5 41) Tm08 [flt ] 20.6875 (bytes 00 80 a5 41) Tm0C [flt ] 20.6875 (bytes 00 80 a5 41) Tm0G [flt ] 20.6875 (bytes 00 80 a5 41) Tm0K [flt ] 20.6875 (bytes 00 80 a5 41) Tm0O [flt ] 20.6875 (bytes 00 80 a5 41) Tm0R [flt ] 20.6875 (bytes 00 80 a5 41) Tm0U [flt ] 20.6875 (bytes 00 80 a5 41) Tm0X [flt ] 20.6875 (bytes 00 80 a5 41) Tm0a [flt ] 20.6875 (bytes 00 80 a5 41) Tm0d [flt ] 20.6875 (bytes 00 80 a5 41) Tm0g [flt ] 20.6875 (bytes 00 80 a5 41) Tm0j [flt ] 20.6875 (bytes 00 80 a5 41) Tm0m [flt ] 20.6875 (bytes 00 80 a5 41) Tm0p [flt ] 20.6875 (bytes 00 80 a5 41) Tm0u [flt ] 20.6875 (bytes 00 80 a5 41) Tm0y [flt ] 19.5625 (bytes 00 80 9c 41) Tm1E [flt ] 20.6875 (bytes 00 80 a5 41) Tm1I [flt ] 20.6875 (bytes 00 80 a5 41) Tm1M [flt ] 19.265625 (bytes 00 20 9a 41) Tm1Q [flt ] 19.296875 (bytes 00 60 9a 41) Tm1U [flt ] 19.828125 (bytes 00 a0 9e 41) Tm1Y [flt ] 19.359375 (bytes 00 e0 9a 41) Tm1c [flt ] 19.15625 (bytes 00 40 99 41) Tm1g [flt ] 19.28125 (bytes 00 40 9a 41) Tm1k [flt ] 19.984375 (bytes 00 e0 9f 41) Tm1o [flt ] 19.328125 (bytes 00 a0 9a 41) Tm1s [flt ] 20.734375 (bytes 00 e0 a5 41) Tm1x [flt ] 18.859375 (bytes 00 e0 96 41) Tm21 [flt ] 19.203125 (bytes 00 a0 99 41) Tm25 [flt ] 20.40625 (bytes 00 40 a3 41) Tm29 [flt ] 19.390625 (bytes 00 20 9b 41) Tm2D [flt ] 19.109375 (bytes 00 e0 98 41) Tm2H [flt ] 19.84375 (bytes 00 c0 9e 41) Tm2L [flt ] 19.3125 (bytes 00 80 9a 41) Tm2P [flt ] 19.28125 (bytes 00 40 9a 41) Tm2T [flt ] 19.5625 (bytes 00 80 9c 41) Tm2j [flt ] 18.5625 (bytes 00 80 94 41) Tm2n [flt ] 18.390625 (bytes 00 20 93 41) Tp00 [flt ] 19.578125 (bytes 00 a0 9c 41) Tp04 [flt ] 19.578125 (bytes 00 a0 9c 41) Tp08 [flt ] 19.59375 (bytes 00 c0 9c 41) Tp0C [flt ] 19.59375 (bytes 00 c0 9c 41) Tp0G [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0K [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0O [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0R [flt ] 19.5625 (bytes 00 80 9c 41) Tp0U [flt ] 19.546875 (bytes 00 60 9c 41) Tp0X [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0a [flt ] 19.5625 (bytes 00 80 9c 41) Tp0d [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0g [flt ] 19.5625 (bytes 00 80 9c 41) Tp0j [flt ] 19.5625 (bytes 00 80 9c 41) Tp0m [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0p [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0u [flt ] 19.578125 (bytes 00 a0 9c 41) Tp0y [flt ] 19.59375 (bytes 00 c0 9c 41) Tp1E [flt ] 19.546875 (bytes 00 60 9c 41) Tp1I [flt ] 19.5625 (bytes 00 80 9c 41) Tp1Q [flt ] 19.546875 (bytes 00 60 9c 41) Tp1U [flt ] 19.59375 (bytes 00 c0 9c 41) Tp1g [flt ] 19.546875 (bytes 00 60 9c 41) Ts00 [flt ] 19.796875 (bytes 00 60 9e 41) Ts04 [flt ] 20.03125 (bytes 00 40 a0 41) Ts08 [flt ] 18.390625 (bytes 00 20 93 41) Ts0C [flt ] 18.75 (bytes 00 00 96 41) Ts0G [flt ] 19.546875 (bytes 00 60 9c 41) Ts0K [flt ] 20.703125 (bytes 00 a0 a5 41) Ts0O [flt ] 19.625 (bytes 00 00 9d 41) Ts0P [flt ] 19.1875 (bytes 00 80 99 41) Ts0R [flt ] 19.875 (bytes 00 00 9f 41) Ts0U [flt ] 19.78125 (bytes 00 40 9e 41) Ts0X [flt ] 19.8125 (bytes 00 80 9e 41) Ts0a [flt ] 19.890625 (bytes 00 20 9f 41) Ts0d [flt ] 19.375 (bytes 00 00 9b 41) Ts0g [flt ] 19.359375 (bytes 00 e0 9a 41) Ts1P [flt ] 18.125 (bytes 00 00 91 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/report-m5-max.txt ================================================ TAOL [flt ] (bytes 00 40 cc 41) TB0T [flt ] (bytes c8 cc c4 41) TB1T [flt ] (bytes c8 cc c4 41) TB2T [flt ] (bytes 30 33 c3 41) TCDX [flt ] (bytes 66 16 de 41) TCHP [flt ] (bytes 20 73 d0 41) TCMb [flt ] (bytes 9a 79 12 42) TD00 [flt ] (bytes e9 81 ce 41) TD01 [flt ] (bytes a7 f5 c5 41) TD02 [flt ] (bytes 05 bc ca 41) TD03 [flt ] (bytes fe 90 c3 41) TD04 [flt ] (bytes a5 8f c7 41) TD10 [flt ] (bytes 43 18 c5 41) TD11 [flt ] (bytes 66 57 cc 41) TD12 [flt ] (bytes fe 05 c8 41) TD13 [flt ] (bytes 30 39 cb 41) TD14 [flt ] (bytes 34 ed c2 41) TD20 [flt ] (bytes 80 40 ca 41) TD21 [flt ] (bytes 53 9d cb 41) TD22 [flt ] (bytes e4 c0 d2 41) TD23 [flt ] (bytes aa ee cb 41) TD24 [flt ] (bytes 53 4f cb 41) TDBP [flt ] (bytes 00 00 d2 41) TDCR [flt ] (bytes 00 80 d6 41) TDEC [flt ] (bytes 00 00 d3 41) TDEL [flt ] (bytes 00 00 cd 41) TDER [flt ] (bytes 00 00 d0 41) TDTP [flt ] (bytes 00 00 de 41) TDVx [flt ] (bytes e4 c0 d2 41) TDeL [flt ] (bytes 00 80 cb 41) TDeR [flt ] (bytes 00 00 cd 41) TG0B [ioft] (bytes 99 99 18 00 00 00 00 00) TG0C [ioft] (bytes 00 00 18 00 00 00 00 00) TG0H [ioft] (bytes 00 00 18 00 00 00 00 00) TG0V [ioft] (bytes 99 99 18 00 00 00 00 00) TG1B [ioft] (bytes 99 99 18 00 00 00 00 00) TG2B [ioft] (bytes 66 66 18 00 00 00 00 00) TH0a [flt ] (bytes 00 a8 c5 41) TH0b [flt ] (bytes 00 50 c6 41) TH0x [flt ] (bytes 00 50 c6 41) TH1a [flt ] (bytes 00 00 00 00) TH1b [flt ] (bytes 00 00 00 00) TMVR [flt ] (bytes 58 21 d6 41) TN00 [flt ] (bytes 00 00 cc 41) TN01 [flt ] (bytes 00 00 d2 41) TN02 [flt ] (bytes 00 00 d0 41) TN03 [flt ] (bytes 00 00 cc 41) TN04 [flt ] (bytes 00 00 00 00) TN05 [flt ] (bytes 00 00 00 00) TN06 [flt ] (bytes 00 00 00 00) TN07 [flt ] (bytes 00 00 00 00) TPD0 [flt ] (bytes c1 b7 d1 41) TPD1 [flt ] (bytes f8 84 ce 41) TPD2 [flt ] (bytes 3f 70 d0 41) TPD3 [flt ] (bytes 08 a3 d3 41) TPD4 [flt ] (bytes 08 32 d6 41) TPD5 [flt ] (bytes 50 1d d8 41) TPD6 [flt ] (bytes c1 b7 d1 41) TPD7 [flt ] (bytes 78 3d cd 41) TPD8 [flt ] (bytes 3f 70 d0 41) TPD9 [flt ] (bytes 08 a3 d3 41) TPDX [flt ] (bytes 50 1d d8 41) TPDa [flt ] (bytes 08 32 d6 41) TPDb [flt ] (bytes c8 46 d4 41) TPDc [flt ] (bytes 80 5b d2 41) TPDd [flt ] (bytes 48 ff d2 41) TPMP [flt ] (bytes e8 8f d9 41) TPSP [flt ] (bytes 80 97 dc 41) TR0Z [ioft] (bytes ec d1 33 00 00 00 00 00) TR1d [ioft] (bytes 17 89 1a 00 00 00 00 00) TR2d [ioft] (bytes 1d a5 1b 00 00 00 00 00) TRD0 [flt ] (bytes 08 a3 d3 41) TRD1 [flt ] (bytes 48 ff d2 41) TRD2 [flt ] (bytes 08 a3 d3 41) TRD3 [flt ] (bytes 80 cc cf 41) TRD4 [flt ] (bytes d0 64 d9 41) TRD5 [flt ] (bytes 20 df dd 41) TRD6 [flt ] (bytes d8 f3 db 41) TRD7 [flt ] (bytes 58 3b dd 41) TRD8 [flt ] (bytes 48 ff d2 41) TRD9 [flt ] (bytes 48 8e d5 41) TRDX [flt ] (bytes 20 df dd 41) TRDa [flt ] (bytes 08 32 d6 41) TRDb [flt ] (bytes 58 ac da 41) TRDc [flt ] (bytes 90 08 da 41) TRDd [flt ] (bytes 08 32 d6 41) TRDe [flt ] (bytes 90 79 d7 41) TS0P [flt ] (bytes 80 fe d8 41) TSVR [flt ] (bytes 38 ae d5 41) TSWR [flt ] (bytes 88 68 d7 41) TSXR [flt ] (bytes a0 3f d6 41) TTPD [flt ] (bytes 20 49 92 cd) TUD0 [flt ] (bytes b8 28 cf 41) TUD1 [flt ] (bytes 38 e1 cd 41) TUD2 [flt ] (bytes 38 e1 cd 41) TUD3 [flt ] (bytes 78 3d cd 41) TUD4 [flt ] (bytes 80 5b d2 41) TUD5 [flt ] (bytes 50 1d d8 41) TUD6 [flt ] (bytes 10 c1 d8 41) TUD7 [flt ] (bytes d0 d5 d6 41) TUD8 [flt ] (bytes b8 99 cc 41) TUD9 [flt ] (bytes c1 b7 d1 41) TUDX [flt ] (bytes 10 c1 d8 41) TUDa [flt ] (bytes 00 14 d1 41) TUDb [flt ] (bytes 80 5b d2 41) TUDc [flt ] (bytes 08 32 d6 41) TUDd [flt ] (bytes 80 cc cf 41) TUDe [flt ] (bytes 48 ff d2 41) TV01 [flt ] (bytes 95 86 c4 41) TV02 [flt ] (bytes 88 f7 c0 41) TV03 [flt ] (bytes c4 9b c0 41) TV04 [flt ] (bytes c0 d4 c1 41) TV05 [flt ] (bytes fe c1 d4 40) TV06 [flt ] (bytes aa 0e 1a 41) TV07 [flt ] (bytes d2 3a 12 41) TV08 [flt ] (bytes c7 d8 35 41) TV11 [flt ] (bytes c6 85 c0 41) TV12 [flt ] (bytes a6 6b be 41) TV13 [flt ] (bytes 63 fc be 41) TV14 [flt ] (bytes 9c af c3 41) TVA0 [flt ] (bytes 2a a7 b6 41) TVAi [si32] (bytes 00 00 00 00) TVCi [si32] (bytes 00 00 00 00) TVD0 [flt ] (bytes 9a b9 11 42) TVDA [flt ] (bytes 9a 09 10 42) TVDG [flt ] (bytes 33 c3 0e 42) TVDM [flt ] (bytes 33 73 11 42) TVDP [flt ] (bytes 9a b9 11 42) TVDc [flt ] (bytes 9a b9 11 42) TVDi [si32] (bytes 02 00 00 00) TVGi [si32] (bytes 50 00 00 00) TVMD [flt ] (bytes 00 00 80 3f) TVMR [flt ] (bytes a5 f4 c9 41) TVMX [flt ] (bytes 00 00 20 42) TVMi [si32] (bytes 1d 00 00 00) TVMj [si32] (bytes 00 00 00 00) TVMr [flt ] (bytes 8b 0a db 41) TVN1 [flt ] (bytes c6 85 c0 41) TVN2 [flt ] (bytes a6 6b be 41) TVN3 [flt ] (bytes 63 fc be 41) TVN4 [flt ] (bytes 9c af c3 41) TVN5 [flt ] (bytes 00 00 00 00) TVN6 [flt ] (bytes 00 00 00 00) TVN7 [flt ] (bytes 00 00 00 00) TVN8 [flt ] (bytes 00 00 00 00) TVNN [flt ] (bytes 9c af c3 41) TVPi [si32] (bytes 10 00 00 00) TVS0 [flt ] (bytes d1 59 cf 41) TVS1 [flt ] (bytes 00 00 c8 41) TVS2 [flt ] (bytes 49 5e ce 41) TVSx [flt ] (bytes d1 59 cf 41) TVV0 [flt ] (bytes 60 ca df 41) TVVi [si32] (bytes 01 00 00 00) TVmS [flt ] (bytes 00 00 20 42) TVms [flt ] (bytes 00 00 20 42) TW0P [flt ] (bytes 98 6e db 41) Ta00 [flt ] (bytes 00 e0 d8 41) Ta04 [flt ] (bytes 00 e0 d8 41) Ta08 [flt ] (bytes 00 e0 d8 41) Ta0K [flt ] (bytes 00 e0 d8 41) Ta0O [flt ] (bytes 00 e0 d8 41) Ta0R [flt ] (bytes 00 e0 d8 41) TaLP [flt ] (bytes a0 3f d6 41) TaLT [flt ] (bytes d8 76 c7 41) TaLW [flt ] (bytes a0 0a cd 41) TaRF [flt ] (bytes b8 7a df 41) TaRT [flt ] (bytes 68 ec c7 41) TaRW [flt ] (bytes a0 0a c9 41) TaTP [flt ] (bytes 80 97 dc 41) Tf04 [flt ] (bytes 66 16 de 41) Tf06 [flt ] (bytes 00 10 7f 42) Tf08 [flt ] (bytes 9a 59 da 41) Tf09 [flt ] (bytes cd ec db 41) Tf0A [flt ] (bytes cd 2c d4 41) Tf0B [flt ] (bytes 9a 29 dc 41) Tf14 [flt ] (bytes 33 63 d6 41) Tf16 [flt ] (bytes 00 20 80 42) Tf18 [flt ] (bytes 66 06 d3 41) Tf19 [flt ] (bytes 66 56 d5 41) Tf1A [flt ] (bytes cd ac d1 41) Tf1B [flt ] (bytes 33 73 d4 41) TfC1 [flt ] (bytes 33 73 dc 41) TfC3 [flt ] (bytes 9a 29 d5 41) TfC5 [flt ] (bytes 33 d3 d5 41) TfC6 [flt ] (bytes 00 a0 d6 41) TfC7 [flt ] (bytes 33 73 d4 41) TfC8 [flt ] (bytes 33 c3 d6 41) TfC9 [flt ] (bytes cd fc df 41) TfCA [flt ] (bytes 66 f6 df 41) TfCC [flt ] (bytes 00 00 00 00) Tg08 [flt ] (bytes 00 c0 da 41) Tg0C [flt ] (bytes 00 c0 da 41) Tg0O [flt ] (bytes 00 c0 da 41) Tg0R [flt ] (bytes 00 e0 da 41) Tg0U [flt ] (bytes 00 e0 da 41) Tg0X [flt ] (bytes 00 00 db 41) Tg0a [flt ] (bytes 00 c0 da 41) Tg0d [flt ] (bytes 00 c0 da 41) Tg0g [flt ] (bytes 00 c0 da 41) Tg0j [flt ] (bytes 00 c0 da 41) Tg12 [flt ] (bytes 00 80 da 41) Tg16 [flt ] (bytes 00 e0 da 41) Tg1I [flt ] (bytes 00 c0 da 41) Tg1M [flt ] (bytes 00 00 db 41) Tg1Q [flt ] (bytes 00 e0 da 41) Tg1U [flt ] (bytes 00 c0 da 41) Tg1Y [flt ] (bytes 00 c0 da 41) Tg1c [flt ] (bytes 00 00 db 41) Tg1k [flt ] (bytes 00 a0 da 41) Tg1o [flt ] (bytes 00 c0 da 41) Tg1x [flt ] (bytes 00 e0 da 41) Tg29 [flt ] (bytes 00 00 db 41) Tg2D [flt ] (bytes 00 40 db 41) Tg2P [flt ] (bytes 00 00 db 41) Tg2T [flt ] (bytes 00 40 db 41) Tg2X [flt ] (bytes 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41) Tg5L [flt ] (bytes 00 00 db 41) Tg5O [flt ] (bytes 00 c0 db 41) Tg5R [flt ] (bytes 00 c0 db 41) Tg5Y [flt ] (bytes 00 00 db 41) Tg5b [flt ] (bytes 00 60 db 41) Tg5h [flt ] (bytes 00 20 db 41) Tg5q [flt ] (bytes 00 80 dd 41) Tg5t [flt ] (bytes 00 a0 dd 41) Tg63 [flt ] (bytes 00 60 dd 41) Tg66 [flt ] (bytes 00 80 dd 41) Tg69 [flt ] (bytes 00 60 dd 41) Tg6C [flt ] (bytes 00 60 dd 41) Tg6F [flt ] (bytes 00 60 dd 41) Tg6I [flt ] (bytes 00 40 dd 41) Tg6L [flt ] (bytes 00 60 dd 41) Tg6O [flt ] (bytes 00 80 dd 41) Tg6e [flt ] (bytes 00 c0 dd 41) Tg6h [flt ] (bytes 00 80 dd 41) Tg6q [flt ] (bytes 00 c0 dd 41) Tg6t [flt ] (bytes 00 80 dd 41) Tg6w [flt ] (bytes 00 c0 dd 41) Tg70 [flt ] (bytes 00 a0 dd 41) Tg73 [flt ] (bytes 00 e0 dd 41) Tg76 [flt ] (bytes 00 60 dd 41) Tg7C [flt ] (bytes 00 60 dd 41) Tg7F [flt ] (bytes 00 60 dd 41) Tg7L [flt ] (bytes 00 20 db 41) Tm00 [flt ] (bytes 00 80 d2 41) Tm04 [flt ] (bytes 00 60 d6 41) Tm08 [flt ] (bytes 00 40 d8 41) Tm0C [flt ] (bytes 00 a0 d7 41) Tm0G [flt ] (bytes 00 80 d8 41) Tm0K [flt ] (bytes 00 80 da 41) Tm0O [flt ] (bytes 00 e0 d9 41) Tm0R [flt ] (bytes 00 e0 d4 41) Tm0U [flt ] (bytes 00 a0 d1 41) Tm0X [flt ] (bytes 00 a0 d4 41) Tm0a [flt ] (bytes 00 80 d7 41) Tm0d [flt ] (bytes 00 a0 d4 41) Tm0g [flt ] (bytes 00 00 d5 41) Tm0j [flt ] (bytes 00 a0 d4 41) Tm0m [flt ] (bytes 00 00 d4 41) Tm0p [flt ] (bytes 00 60 dd 41) Tm0u [flt ] (bytes 00 c0 d2 41) Tm0y [flt ] (bytes 00 00 d6 41) Tm1E [flt ] (bytes 00 40 d4 41) Tm1I [flt ] (bytes 00 c0 d5 41) Tm1M [flt ] (bytes 00 80 dc 41) Tm1Q [flt ] (bytes 00 80 dc 41) Tm1U [flt ] (bytes 00 80 dc 41) Tm1Y [flt ] (bytes 00 80 dc 41) Tm1c [flt ] (bytes 00 80 dc 41) Tm1g [flt ] (bytes 00 80 dc 41) Tm1k [flt ] (bytes 00 80 dc 41) Tm1o [flt ] (bytes 00 80 dc 41) Tm1s [flt ] (bytes 00 80 dc 41) Tm1x [flt ] (bytes 00 80 dc 41) Tm21 [flt ] (bytes 00 80 dc 41) Tm25 [flt ] (bytes 00 80 dc 41) Tm29 [flt ] (bytes 00 80 dc 41) Tm2D [flt ] (bytes 00 80 dc 41) Tm2H [flt ] (bytes 00 80 dc 41) Tm2L [flt ] (bytes 00 80 dc 41) Tm2P [flt ] (bytes 00 80 dc 41) Tm2T [flt ] (bytes 00 00 d6 41) Tm2j [flt ] (bytes 00 80 dc 41) Tm2n [flt ] (bytes 00 80 dc 41) Tp00 [flt ] (bytes 00 60 da 41) Tp04 [flt ] (bytes 00 40 da 41) Tp08 [flt ] (bytes 00 e0 d8 41) Tp0C [flt ] (bytes 00 40 dd 41) Tp0G [flt ] (bytes 00 40 d9 41) Tp0K [flt ] (bytes 00 00 db 41) Tp0O [flt ] (bytes 00 60 d7 41) Tp0R [flt ] (bytes 00 40 d5 41) Tp0U [flt ] (bytes 00 20 d1 41) Tp0X [flt ] (bytes 00 20 d8 41) Tp0a [flt ] (bytes 00 00 d6 41) Tp0d [flt ] (bytes 00 40 d2 41) Tp0g [flt ] (bytes 00 00 d7 41) Tp0j [flt ] (bytes 00 00 d7 41) Tp0m [flt ] (bytes 00 20 d9 41) Tp0p [flt ] (bytes 00 a0 d9 41) Tp0u [flt ] (bytes 00 a0 db 41) Tp0y [flt ] (bytes 00 20 d9 41) Tp1E [flt ] (bytes 00 60 d2 41) Tp1I [flt ] (bytes 00 20 d7 41) Tp1Q [flt ] (bytes 00 e0 d1 41) Tp1U [flt ] (bytes 00 c0 d3 41) Tp1g [flt ] (bytes 00 40 d4 41) Ts00 [flt ] (bytes 00 c0 d9 41) Ts04 [flt ] (bytes 00 e0 ce 41) Ts08 [flt ] (bytes 00 40 ce 41) Ts0C [flt ] (bytes 00 00 d3 41) Ts0G [flt ] (bytes 00 e0 d8 41) Ts0K [flt ] (bytes 00 80 dc 41) Ts0O [flt ] (bytes 00 a0 db 41) Ts0P [flt ] (bytes 00 00 c4 41) Ts0R [flt ] (bytes 00 20 d9 41) Ts0U [flt ] (bytes 00 20 db 41) Ts0X [flt ] (bytes 00 60 d8 41) Ts0a [flt ] (bytes 00 e0 da 41) Ts0d [flt ] (bytes 00 60 dd 41) Ts0g [flt ] (bytes 00 60 dd 41) Ts1P [flt ] (bytes 00 00 bb 41) Tz11 [flt ] (bytes 00 00 00 00) Tz12 [flt ] (bytes 00 00 00 00) Tz13 [flt ] (bytes 00 00 00 00) Tz14 [flt ] (bytes 00 00 00 00) Tz15 [flt ] (bytes 00 00 00 00) Tz16 [flt ] (bytes 00 00 00 00) Tz17 [flt ] (bytes 00 00 00 00) Tz18 [flt ] (bytes 00 00 00 00) Tz1j [flt ] (bytes 00 00 00 00) ================================================ FILE: reports/report-m5-pro.txt ================================================ TAOL [flt ] 23 (bytes 00 20 bb 41) TB0T [flt ] 26 (bytes 60 66 ce 41) TB1T [flt ] 26 (bytes 60 66 ce 41) TB2T [flt ] 26 (bytes c8 cc cc 41) TCHP [flt ] 31 (bytes 60 50 f5 41) TCMb [flt ] 63 (bytes cd 5c 7a 42) TD00 [flt ] 23 (bytes 72 90 b4 41) TD01 [flt ] 23 (bytes 41 ba b4 41) TD02 [flt ] 23 (bytes c9 39 bb 41) TD03 [flt ] 22 (bytes 15 ad b2 41) TD04 [flt ] 22 (bytes 51 7d b3 41) TD10 [flt ] 23 (bytes 46 d2 b6 41) TD11 [flt ] 23 (bytes d8 2b ba 41) TD12 [flt ] 23 (bytes f9 94 bb 41) TD13 [flt ] 23 (bytes d5 66 b9 41) TD14 [flt ] 23 (bytes 10 cb b7 41) TD20 [flt ] 23 (bytes 99 71 ba 41) TD21 [flt ] 24 (bytes 10 3d c2 41) TD22 [flt ] 25 (bytes 0e 23 c6 41) TD23 [flt ] 25 (bytes 81 19 c5 41) TD24 [flt ] 24 (bytes a2 61 bf 41) TDBP [flt ] 26 (bytes 00 80 cc 41) TDEL [flt ] 25 (bytes 00 80 c4 41) TDER [flt ] 25 (bytes 00 80 c6 41) TDTC [flt ] 26 (bytes 00 80 d2 41) TDTP [flt ] 26 (bytes 00 00 d1 41) TDVx [flt ] 25 (bytes 0e 23 c6 41) TDeL [flt ] 24 (bytes 00 00 c1 41) TDeR [flt ] 24 (bytes 00 80 c2 41) TF2S [flt ] 34 (bytes 18 0d 09 42) TG0B [ioft] (bytes cc cc 19 00 00 00 00 00) TG0C [ioft] (bytes 00 00 19 00 00 00 00 00) TG0H [ioft] (bytes 00 00 19 00 00 00 00 00) TG0V [ioft] (bytes cc cc 19 00 00 00 00 00) TG1B [ioft] (bytes cc cc 19 00 00 00 00 00) TG2B [ioft] (bytes 99 99 19 00 00 00 00 00) TH0a [flt ] 29 (bytes 00 a8 eb 41) TH0b [flt ] 30 (bytes 00 a0 ed 41) TH0x [flt ] 30 (bytes 00 a0 ed 41) TMVR [flt ] 33 (bytes b8 2e 05 42) TN00 [flt ] 32 (bytes 00 00 fe 41) TN01 [flt ] 32 (bytes 00 00 fc 41) TN02 [flt ] 32 (bytes 00 00 fc 41) TN03 [flt ] 32 (bytes 00 00 00 42) TPD0 [flt ] 46 (bytes d0 89 37 42) TPD1 [flt ] 40 (bytes 1c 3b 1f 42) TPD2 [flt ] 38 (bytes ac 83 18 42) TPD3 [flt ] 39 (bytes d0 c0 1a 42) TPD4 [flt ] 40 (bytes bc 30 20 42) TPD5 [flt ] 45 (bytes e4 19 32 42) TPD6 [flt ] 41 (bytes a4 11 23 42) TPD7 [flt ] 42 (bytes 70 d3 28 42) TPD8 [flt ] 39 (bytes 14 ac 1c 42) TPD9 [flt ] 38 (bytes cc 31 18 42) TPDX [flt ] 46 (bytes d0 89 37 42) TPDa [flt ] 36 (bytes 7c 28 11 42) TPDb [flt ] 36 (bytes 9c d6 10 42) TPDc [flt ] 36 (bytes d8 32 10 42) TPDd [flt ] 36 (bytes b8 84 10 42) TPDe [flt ] 37 (bytes 60 09 14 42) TPDf [flt ] 37 (bytes 80 b7 13 42) TPH3 [flt ] 30 (bytes d0 82 f2 41) TPMP [flt ] 39 (bytes 00 8f 1a 42) TPSP [flt ] 34 (bytes b4 59 08 42) TR0Z [ioft] (bytes ec d1 33 00 00 00 00 00) TR1d [ioft] (bytes db 73 1f 00 00 00 00 00) TR2d [ioft] (bytes 20 b7 1f 00 00 00 00 00) TRD0 [flt ] 32 (bytes 28 c6 ff 41) TRD1 [flt ] 31 (bytes 98 60 f9 41) TRD2 [flt ] 31 (bytes 20 a8 fa 41) TRD3 [flt ] 31 (bytes 98 60 f9 41) TRD4 [flt ] 32 (bytes 20 37 fd 41) TRD5 [flt ] 32 (bytes 78 7c 01 42) TRD6 [flt ] 32 (bytes 78 7c 01 42) TRD7 [flt ] 33 (bytes 1c 72 02 42) TRD8 [flt ] 31 (bytes 58 04 fa 41) TRD9 [flt ] 31 (bytes 58 04 fa 41) TRDX [flt ] 33 (bytes 1c 72 02 42) TRDa [flt ] 31 (bytes a0 ef fb 41) TRDb [flt ] 32 (bytes 68 22 ff 41) TRDc [flt ] 32 (bytes e8 da fd 41) TRDd [flt ] 32 (bytes 28 c6 ff 41) TRDe [flt ] 32 (bytes 68 22 ff 41) TRDf [flt ] 32 (bytes 28 c6 ff 41) TS0P [flt ] 31 (bytes 10 38 fa 41) TSG1 [flt ] 31 (bytes 78 eb fa 41) TTPD [flt ] -306783232 (bytes 20 49 92 cd) TUD0 [flt ] 30 (bytes 88 b3 f1 41) TUD1 [flt ] 31 (bytes 90 42 f4 41) TUD2 [flt ] 30 (bytes 48 c8 ef 41) TUD3 [flt ] 30 (bytes 10 fb f2 41) TUD4 [flt ] 31 (bytes d0 2d f6 41) TUD5 [flt ] 31 (bytes d8 bc f8 41) TUD6 [flt ] 31 (bytes a0 ef fb 41) TUD7 [flt ] 31 (bytes 58 04 fa 41) TUD8 [flt ] 30 (bytes 08 6c f0 41) TUD9 [flt ] 30 (bytes 48 57 f2 41) TUDX [flt ] 31 (bytes a0 ef fb 41) TUDa [flt ] 30 (bytes c8 0f f1 41) TUDb [flt ] 30 (bytes c8 0f f1 41) TUDc [flt ] 30 (bytes c8 0f f1 41) TUDd [flt ] 30 (bytes c8 0f f1 41) TUDe [flt ] 30 (bytes 88 b3 f1 41) TUDf [flt ] 30 (bytes d0 9e f3 41) TV11 [flt ] 31 (bytes 3c 84 f5 41) TV12 [flt ] 31 (bytes 65 62 f4 41) TV13 [flt ] 30 (bytes 4c 82 f2 41) TV14 [flt ] 14 (bytes a0 5f 5b 41) TVA0 [flt ] 18 (bytes ee 42 8c 41) TVAi [si32] (bytes 00 00 00 00) TVCi [si32] (bytes 00 00 00 00) TVD0 [flt ] 65 (bytes 66 ee 81 42) TVDA [flt ] 56 (bytes 9a d9 5e 42) TVDG [flt ] 48 (bytes cd 0c 40 42) TVDM [flt ] 61 (bytes 33 e3 75 42) TVDP [flt ] 65 (bytes 66 ee 81 42) TVDc [flt ] 65 (bytes 66 ee 81 42) TVDi [si32] (bytes 02 00 00 00) TVGi [si32] (bytes 28 00 00 00) TVMD [flt ] 1 (bytes 00 00 80 3f) TVMN [flt ] 31 (bytes 3c 84 f5 41) TVMR [flt ] 38 (bytes c8 b9 19 42) TVMX [flt ] 40 (bytes 00 00 20 42) TVMi [si32] (bytes 13 00 00 00) TVMj [si32] (bytes 00 00 00 00) TVMr [flt ] 38 (bytes af 23 18 42) TVNN [flt ] 32 (bytes 3c 84 fd 41) TVPi [si32] (bytes 02 00 00 00) TVS0 [flt ] 29 (bytes 39 4f e6 41) TVS1 [flt ] 27 (bytes 27 43 da 41) TVS2 [flt ] 27 (bytes 21 ae d8 41) TVS3 [flt ] 25 (bytes 0d f0 ca 41) TVV0 [flt ] 46 (bytes d0 89 37 42) TVVi [si32] (bytes 00 00 00 00) TVmS [flt ] 40 (bytes 00 00 20 42) TVms [flt ] 40 (bytes 00 00 20 42) TW0P [flt ] 32 (bytes 04 47 00 42) Ta00 [flt ] 47 (bytes 00 40 3d 42) Ta04 [flt ] 47 (bytes 00 40 3d 42) Ta08 [flt ] 47 (bytes 00 40 3d 42) Ta0K [flt ] 47 (bytes 00 40 3d 42) Ta0O [flt ] 47 (bytes 00 40 3d 42) Ta0R [flt ] 47 (bytes 00 40 3d 42) TaLP [flt ] 30 (bytes 98 e9 f3 41) TaLT [flt ] 30 (bytes 70 cf f1 41) TaLW [flt ] 28 (bytes 78 c9 e3 41) TaRF [flt ] 30 (bytes 18 09 ee 41) TaRT [flt ] 26 (bytes 90 04 d1 41) TaRW [flt ] 27 (bytes e8 8f d5 41) TaTP [flt ] 31 (bytes d8 9e fb 41) TfC0 [flt ] 43 (bytes 33 d3 2d 42) TfC1 [flt ] 32 (bytes 66 f6 fc 41) TfC3 [flt ] 32 (bytes cd 3c fd 41) TfC5 [flt ] 30 (bytes 9a 89 ed 41) TfCB [flt ] 0 (bytes 00 00 00 00) TfCD [flt ] 42 (bytes cd ac 28 42) TfCE [flt ] 38 (bytes 9a d1 19 42) TfCF [flt ] 33 (bytes cd 94 02 42) Tg08 [flt ] 38 (bytes 00 c0 18 42) Tg0C [flt ] 38 (bytes 00 10 19 42) Tg0O [flt ] 38 (bytes 00 00 19 42) Tg0R [flt ] 38 (bytes 00 60 19 42) Tg0U [flt ] 38 (bytes 00 c0 19 42) Tg0X [flt ] 38 (bytes 00 80 19 42) Tg0a [flt ] 38 (bytes 00 f0 19 42) Tg0d [flt ] 38 (bytes 00 f0 19 42) Tg0g [flt ] 38 (bytes 00 00 1a 42) Tg0j [flt ] 38 (bytes 00 80 19 42) Tg12 [flt ] 38 (bytes 00 40 19 42) Tg16 [flt ] 38 (bytes 00 20 19 42) Tg1I [flt ] 38 (bytes 00 70 19 42) Tg1M [flt ] 38 (bytes 00 40 19 42) Tg1Q [flt ] 39 (bytes 00 40 1a 42) Tg1U [flt ] 38 (bytes 00 b0 19 42) Tg1Y [flt ] 39 (bytes 00 80 1a 42) Tg1c [flt ] 39 (bytes 00 60 1a 42) Tg1k [flt ] 39 (bytes 00 c0 1a 42) Tg1o [flt ] 38 (bytes 00 d0 19 42) Tg1x [flt ] 40 (bytes 00 40 21 42) Tg29 [flt ] 40 (bytes 00 e0 21 42) Tg2D [flt ] 41 (bytes 00 90 22 42) Tg2P [flt ] 41 (bytes 00 b0 22 42) Tg2T [flt ] 41 (bytes 00 00 23 42) Tg2X [flt ] 41 (bytes 00 60 22 42) Tg2b [flt ] 41 (bytes 00 00 23 42) Tg2f [flt ] 41 (bytes 00 50 23 42) Tg2j [flt ] 41 (bytes 00 50 23 42) Tg2n [flt ] 41 (bytes 00 90 23 42) Tg2r [flt ] 41 (bytes 00 50 24 42) Tg3B [flt ] 41 (bytes 00 10 22 42) Tg3F [flt ] 41 (bytes 00 10 23 42) Tg3R [flt ] 41 (bytes 00 c0 22 42) Tg3V [flt ] 41 (bytes 00 70 23 42) Tg3Z [flt ] 41 (bytes 00 10 23 42) Tg3d [flt ] 41 (bytes 00 70 23 42) Tg3h [flt ] 41 (bytes 00 80 23 42) Tg3l [flt ] 41 (bytes 00 a0 23 42) Tg3t [flt ] 41 (bytes 00 d0 23 42) Tg3x [flt ] 41 (bytes 00 50 24 42) Tg43 [flt ] 40 (bytes 00 40 21 42) Tm00 [flt ] 45 (bytes 00 b0 32 42) Tm04 [flt ] 44 (bytes 00 40 2e 42) Tm08 [flt ] 43 (bytes 00 70 2d 42) Tm0C [flt ] 43 (bytes 00 00 2c 42) Tm0G [flt ] 42 (bytes 00 20 28 42) Tm0K [flt ] 42 (bytes 00 40 28 42) Tm0O [flt ] 46 (bytes 00 c0 36 42) Tm0R [flt ] 44 (bytes 00 b0 31 42) Tm0U [flt ] 45 (bytes 00 60 32 42) Tm0X [flt ] 43 (bytes 00 50 2d 42) Tm0a [flt ] 42 (bytes 00 90 29 42) Tm0d [flt ] 42 (bytes 00 c0 28 42) Tm0g [flt ] 43 (bytes 00 80 2a 42) Tm0j [flt ] 42 (bytes 00 70 27 42) Tm0m [flt ] 42 (bytes 00 b0 26 42) Tm0p [flt ] 42 (bytes 00 60 28 42) Tm0u [flt ] 41 (bytes 00 f0 23 42) Tm0y [flt ] 54 (bytes 00 b0 56 42) Tm1E [flt ] 43 (bytes 00 e0 2c 42) Tm1I [flt ] 43 (bytes 00 50 2c 42) Tm1M [flt ] 42 (bytes 00 30 29 42) Tm1Q [flt ] 42 (bytes 00 00 2a 42) Tm1U [flt ] 42 (bytes 00 c0 28 42) Tm1Y [flt ] 43 (bytes 00 70 2a 42) Tm1c [flt ] 42 (bytes 00 50 28 42) Tm1g [flt ] 42 (bytes 00 70 26 42) Tm1k [flt ] 41 (bytes 00 10 23 42) Tm1o [flt ] 41 (bytes 00 c0 24 42) Tm1s [flt ] 42 (bytes 00 a0 26 42) Tm1x [flt ] 41 (bytes 00 20 22 42) Tm21 [flt ] 41 (bytes 00 c0 22 42) Tm25 [flt ] 40 (bytes 00 f0 20 42) Tm29 [flt ] 41 (bytes 00 60 25 42) Tm2D [flt ] 41 (bytes 00 20 22 42) Tm2H [flt ] 40 (bytes 00 00 22 42) Tm2L [flt ] 40 (bytes 00 d0 20 42) Tm2P [flt ] 41 (bytes 00 20 22 42) Tm2T [flt ] 54 (bytes 00 b0 56 42) Tm2j [flt ] 41 (bytes 00 a0 23 42) Tm2n [flt ] 41 (bytes 00 10 22 42) Tp00 [flt ] 59 (bytes 00 10 6d 42) Tp04 [flt ] 55 (bytes 00 20 5a 42) Tp08 [flt ] 55 (bytes 00 d0 5b 42) Tp0C [flt ] 59 (bytes 00 80 6a 42) Tp0G [flt ] 53 (bytes 00 70 54 42) Tp0K [flt ] 51 (bytes 00 c0 4d 42) Tp0O [flt ] 56 (bytes 00 c0 5f 42) Tp0R [flt ] 54 (bytes 00 60 57 42) Tp0U [flt ] 54 (bytes 00 30 58 42) Tp0X [flt ] 55 (bytes 00 80 5d 42) Tp0a [flt ] 54 (bytes 00 b0 56 42) Tp0d [flt ] 54 (bytes 00 e0 58 42) Tp0g [flt ] 55 (bytes 00 b0 5a 42) Tp0j [flt ] 54 (bytes 00 20 57 42) Tp0m [flt ] 55 (bytes 00 f0 5b 42) Tp0p [flt ] 45 (bytes 00 c0 33 42) Tp0u [flt ] 46 (bytes 00 e0 38 42) Tp0y [flt ] 48 (bytes 00 d0 3f 42) Tp1E [flt ] 45 (bytes 00 50 33 42) Tp1I [flt ] 46 (bytes 00 70 39 42) Tp1Q [flt ] 45 (bytes 00 f0 35 42) Tp1U [flt ] 46 (bytes 00 30 38 42) Tp1g [flt ] 44 (bytes 00 00 30 42) Ts00 [flt ] 39 (bytes 00 40 1d 42) Ts04 [flt ] 38 (bytes 00 b0 16 42) Ts08 [flt ] 40 (bytes 00 a0 1e 42) Ts0C [flt ] 42 (bytes 00 50 29 42) Ts0G [flt ] 47 (bytes 00 40 3d 42) Ts0K [flt ] 42 (bytes 00 30 29 42) Ts0O [flt ] 42 (bytes 00 10 27 42) Ts0P [flt ] 25 (bytes 00 00 c6 41) Ts0R [flt ] 40 (bytes 00 80 1e 42) Ts0U [flt ] 41 (bytes 00 40 24 42) Ts0X [flt ] 39 (bytes 00 20 1d 42) Ts0a [flt ] 38 (bytes 00 c0 19 42) Ts1P [flt ] 24 (bytes 00 00 be 41) Tz11 [flt ] 0 (bytes 00 00 00 00) Tz12 [flt ] 0 (bytes 00 00 00 00) Tz13 [flt ] 0 (bytes 00 00 00 00) Tz14 [flt ] 0 (bytes 00 00 00 00) Tz15 [flt ] 0 (bytes 00 00 00 00) Tz16 [flt ] 0 (bytes 00 00 00 00) Tz17 [flt ] 0 (bytes 00 00 00 00) Tz18 [flt ] 0 (bytes 00 00 00 00) Tz1j [flt ] 0 (bytes 00 00 00 00) ================================================ FILE: reports/reports.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin // Package reports embeds raw SMC sensor dumps captured from real Macs and // exposes the union of T-prefixed keys observed for each chip family. The // guess subcommand cross-checks its detected sensors against this observed // set to flag (a) keys that exist in prior dumps but did not heat up in this // run, and (b) keys that have never been seen on this family. // // The dumps are captured as plain-text reports under reports/*.txt and follow // the format produced by the project's `dump` command: // // KEY [type] [decoded] (bytes b0 b1 b2 b3) // // Filenames encode the family: report-(-)?(-)?.txt, // e.g. report-m1-ultra.txt → "M1", report-m4-pro-2.txt → "M4". package reports import ( "embed" "strings" "sync" ) //go:embed *.txt var rawDumps embed.FS var ( parseOnce sync.Once byFamily map[string]map[string]struct{} ) // Keys returns the union of T-prefixed SMC keys observed across every embedded // report whose filename maps to the given family ("M1", "M2", "M3", "M4", "M5", // "A18", "Intel"). Returns nil when no report exists for the family. The result // is cached on first call; callers must not mutate the returned map. func Keys(family string) map[string]struct{} { parseOnce.Do(load) return byFamily[family] } // Families returns every family tag that has at least one embedded report. // Order is not guaranteed. func Families() []string { parseOnce.Do(load) out := make([]string, 0, len(byFamily)) for f := range byFamily { out = append(out, f) } return out } // load walks every embedded *.txt file, derives its family from the filename, // and parses out T-prefixed SMC keys. Errors are silently swallowed: a corrupt // or unparsable report should not break the guess command — at worst the // cross-check reports zero observed keys for that family. func load() { byFamily = make(map[string]map[string]struct{}) entries, err := rawDumps.ReadDir(".") if err != nil { return } for _, e := range entries { if e.IsDir() || !strings.HasSuffix(e.Name(), ".txt") { continue } family := familyFromFilename(e.Name()) if family == "" { continue } data, err := rawDumps.ReadFile(e.Name()) if err != nil { continue } ingest(byFamily, string(data), family) } } // familyFromFilename derives a family tag from a report filename. The convention // is report-(-)?(-)?.txt; the family is the first dash- // separated token after stripping the report- prefix. // // report-m4-pro.txt → "M4" // report-m1-ultra.txt → "M1" // report-a18.txt → "A18" // report-intel-t2.txt → "Intel" // // Returns "" when the filename does not follow the convention. func familyFromFilename(name string) string { stem := strings.TrimSuffix(name, ".txt") stem, ok := strings.CutPrefix(stem, "report-") if !ok || stem == "" { return "" } first, _, _ := strings.Cut(stem, "-") if first == "" { return "" } if first == "intel" { return "Intel" } return strings.ToUpper(first[:1]) + first[1:] } // ingest scans body for lines that start with a 4-character T-prefixed SMC // key and records each unique key under the given family in target. // // The expected line shape is: // // Tabc [type] [decoded] (bytes b0 b1 b2 b3) // // Anything that does not start with whitespace + Tabcd (where each abcd is // printable) is ignored, including comment lines and counter/header rows that // share the file but begin with non-T keys (e.g. "AC-B", "BNum"). func ingest(target map[string]map[string]struct{}, body, family string) { set, ok := target[family] if !ok { set = make(map[string]struct{}) target[family] = set } for line := range strings.SplitSeq(body, "\n") { fields := strings.Fields(line) if len(fields) == 0 { continue } key := fields[0] if len(key) != 4 || key[0] != 'T' { continue } set[key] = struct{}{} } } ================================================ FILE: reports/reports_test.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package reports import ( "testing" ) func TestFamilyFromFilename(t *testing.T) { t.Parallel() tests := []struct { name string want string }{ {"report-m1-pro.txt", "M1"}, {"report-m1-ultra.txt", "M1"}, {"report-m4-pro-2.txt", "M4"}, {"report-m4.txt", "M4"}, {"report-m5-pro.txt", "M5"}, {"report-a18.txt", "A18"}, {"report-intel-t2.txt", "Intel"}, {"report-.txt", ""}, // empty family {"some-other-file.txt", ""}, // no report- prefix {"report-m4-pro.notxt", "M4"}, // odd suffix still parses; family is leading token {"", ""}, // empty filename } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := familyFromFilename(tt.name) if got != tt.want { t.Errorf("familyFromFilename(%q) = %q, want %q", tt.name, got, tt.want) } }) } } // TestKeysIntegration exercises the embedded reports end-to-end: every chip // family that has a report file in reports/ should produce a non-trivial key // set with at least one Tp-prefixed key (CPU performance / super cores — // universal across every Apple Silicon variant). // // This test guards against (a) the embed directive accidentally being reduced // in scope, (b) the filename → family mapper drifting from the actual files, // and (c) the line parser silently dropping keys (e.g. column-format drift). // // We don't assert on specific Tp indices — M1 starts at Tp00, M3 at Tp04, M5 // Pro extends through Tp0X+ — only that the prefix is populated. Te (E-cores) // is intentionally NOT asserted: M5 Pro / Max have no E-cores, so currently // our M5 reports (which only cover M5 Pro) include no Te keys. func TestKeysIntegration(t *testing.T) { t.Parallel() for _, family := range []string{"M1", "M2", "M3", "M4", "M5", "A18"} { got := Keys(family) if len(got) < 20 { t.Errorf("Keys(%q): %d keys parsed, expected ≥20; "+ "check reports/*.txt for the family", family, len(got)) continue } hasTp := false for k := range got { if len(k) >= 2 && k[1] == 'p' { hasTp = true break } } if !hasTp { t.Errorf("Keys(%q) has no Tp-prefixed CPU core keys", family) } } // Intel report ships with a different fingerprint set (TC0c, TIOP, Tarc...). intelKeys := Keys("Intel") if len(intelKeys) == 0 { t.Error("Keys(\"Intel\") returned no keys; check reports/report-intel-t2.txt") } // TIOP is a hard fingerprint of Intel/T2 hardware; never appears on Apple Silicon. if _, ok := intelKeys["TIOP"]; !ok { t.Error("Keys(\"Intel\") missing canonical Intel fingerprint TIOP") } } // TestFamilies asserts that every family with at least one *.txt under // reports/ is enumerated. The actual list grows over time as the project // gains coverage, so we just spot-check that the well-known families are // present and there are no zero-length tags. func TestFamilies(t *testing.T) { t.Parallel() got := Families() if len(got) == 0 { t.Fatal("Families() returned no entries; embedded reports may be missing") } wantPresent := map[string]bool{"M1": false, "M4": false, "Intel": false} for _, f := range got { if f == "" { t.Error("Families() returned an empty family tag") } if _, ok := wantPresent[f]; ok { wantPresent[f] = true } } for f, found := range wantPresent { if !found { t.Errorf("Families() missing expected family %q", f) } } } // TestIngest_skipsNonTKeys uses a synthetic body to confirm that only // 4-character T-prefixed keys are recorded, and that comment / counter rows // (e.g. "AC-B", "#KEY") are filtered out. func TestIngest_skipsNonTKeys(t *testing.T) { t.Parallel() body := ` TB0T [flt ] 19 (bytes 98 99 99 41) AC-B [si8 ] -1 (bytes ff) #KEY [ui32] 2332 (bytes 00 00 09 1c) Tp00 [flt ] 35.5 (bytes 00 00 00 00) XYZ not a real key no leading whitespace ` local := map[string]map[string]struct{}{} ingest(local, body, "Test") got := local["Test"] if len(got) != 2 { t.Errorf("ingest recorded %d keys, want 2 (TB0T + Tp00): %v", len(got), got) } for _, want := range []string{"TB0T", "Tp00"} { if _, ok := got[want]; !ok { t.Errorf("ingest missing expected key %q", want) } } for _, reject := range []string{"AC-B", "#KEY", "XYZ"} { if _, ok := got[reject]; ok { t.Errorf("ingest erroneously recorded non-temperature key %q", reject) } } } ================================================ FILE: smc/conv.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "encoding/binary" "fmt" "math" "strings" "github.com/dkorunic/iSMC/gosmc" ) // FPConv type used for AppleFPConv map. type FPConv struct { Div float32 Signed bool } // AppleFPConv maps floating point type conversion constants and signedness property. var AppleFPConv = map[string]FPConv{ "fp1f": {Div: 32768.0}, "fp2e": {Div: 16384.0}, "fp3d": {Div: 8192.0}, "fp4c": {Div: 4096.0}, "fp5b": {Div: 2048.0}, "fp6a": {Div: 1024.0}, "fp79": {Div: 512.0}, "fp88": {Div: 256.0}, "fpa6": {Div: 64.0}, "fpc4": {Div: 16.0}, "fpe2": {Div: 4.0}, "sp1e": {Div: 16384.0, Signed: true}, "sp2d": {Div: 8192.0, Signed: true}, "sp3c": {Div: 4096.0, Signed: true}, "sp4b": {Div: 2048.0, Signed: true}, "sp5a": {Div: 1024.0, Signed: true}, "sp69": {Div: 512.0, Signed: true}, "sp78": {Div: 256.0, Signed: true}, "sp87": {Div: 128.0, Signed: true}, "sp96": {Div: 64.0, Signed: true}, "spa5": {Div: 32.0, Signed: true}, "spb4": {Div: 16.0, Signed: true}, "spf0": {Div: 1.0, Signed: true}, } // fpToFloat32 converts fp* SMC types to float32. func fpToFloat32(t string, x gosmc.SMCBytes, size uint32) (float32, error) { if v, ok := AppleFPConv[t]; ok { if size < 2 { return 0.0, fmt.Errorf("fpToFloat32: size %d too small for type %q", size, t) } res := binary.BigEndian.Uint16(x[:2]) if v.Signed { return float32(int16(res)) / v.Div, nil } return float32(res) / v.Div, nil } return 0.0, fmt.Errorf("unable to convert to float32 type %q, bytes %v", t, x) } // fltToFloat32 converts flt SMC type to float32. func fltToFloat32(x gosmc.SMCBytes, size uint32) (float32, error) { if size < 4 { return 0.0, fmt.Errorf("fltToFloat32: size %d too small for flt type", size) } return math.Float32frombits(binary.LittleEndian.Uint32(x[:4])), nil } // smcTypeToString converts UInt32Char array to regular Go string removing trailing null and whitespace. func smcTypeToString(x gosmc.UInt32Char) string { return strings.TrimRight(x.ToString(), "\x00 ") } // smcBytesToUint32 converts ui8/ui16/ui32 SMC types to uint32. Clamped to 4 bytes // to prevent shift overflow on unexpected key sizes. func smcBytesToUint32(x gosmc.SMCBytes, size uint32) uint32 { if size > 4 { size = 4 } var total uint32 for i := range size { total += uint32(x[i]) << ((size - 1 - i) * 8) } return total } // smcBytesToFloat32 converts ui8/ui16/ui32 SMC types to float32. func smcBytesToFloat32(x gosmc.SMCBytes, size uint32) float32 { return float32(smcBytesToUint32(x, size)) } // ioftToFloat32 converts ioft SMC type (48.16 unsigned fixed-point in LittleEndian) to float32. func ioftToFloat32(x gosmc.SMCBytes, size uint32) (float32, error) { if size < 8 { return 0.0, fmt.Errorf("ioftToFloat32: size %d too small for ioft type", size) } res := binary.LittleEndian.Uint64(x[:8]) return float32(res) / 65536.0, nil } // decodeToFloat32 converts bytes to float32 for continuous-valued SMC types: flt, ioft, and the // fp*/sp* fixed-point families. Returns (value, true) on success, (0, false) for unknown types. func decodeToFloat32(dataType string, bytes gosmc.SMCBytes, size uint32) (float32, bool) { switch dataType { case gosmc.TypeFLT: v, err := fltToFloat32(bytes, size) return v, err == nil case "ioft": v, err := ioftToFloat32(bytes, size) return v, err == nil default: v, err := fpToFloat32(dataType, bytes, size) return v, err == nil } } // DecodeValue converts raw SMC bytes to a human-readable string based on data type, // mirroring smcFanControl's printVal logic. Returns an empty string for unrecognised types. func DecodeValue(dataType string, bytes gosmc.SMCBytes, size uint32) string { if size == 0 { return "" } switch dataType { case gosmc.TypeUI8, gosmc.TypeUI16, gosmc.TypeUI32, "hex_": return fmt.Sprintf("%d", smcBytesToUint32(bytes, size)) case gosmc.TypeSI8: return fmt.Sprintf("%d", int8(bytes[0])) case gosmc.TypeSI16: if size < 2 { return "" } return fmt.Sprintf("%d", int16(binary.BigEndian.Uint16(bytes[:2]))) case gosmc.TypeSI32: if size < 4 { return "" } return fmt.Sprintf("%d", int32(binary.BigEndian.Uint32(bytes[:4]))) case gosmc.TypeFLAG: return fmt.Sprintf("%v", smcBytesToUint32(bytes, size) == 1) case "pwm": if size < 2 { return "" } pct := float32(binary.BigEndian.Uint16(bytes[:2])) * 100.0 / 65536.0 return fmt.Sprintf("%.1f%%", pct) default: v, ok := decodeToFloat32(dataType, bytes, size) if !ok { return "" } return fmt.Sprintf("%g", v) } } ================================================ FILE: smc/conv_test.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "testing" "github.com/dkorunic/iSMC/gosmc" "github.com/stretchr/testify/assert" ) // makeBytes creates a gosmc.SMCBytes with the provided bytes at the start. func makeBytes(b ...byte) gosmc.SMCBytes { var result gosmc.SMCBytes copy(result[:], b) return result } // makeUInt32Char creates a gosmc.UInt32Char from a string (up to 5 bytes). func makeUInt32Char(s string) gosmc.UInt32Char { var result gosmc.UInt32Char copy(result[:], s) return result } func Test_fpToFloat32(t *testing.T) { tests := []struct { name string smcType string bytes gosmc.SMCBytes size uint32 expected float32 wantErr bool }{ {"fp88 25 degrees", "fp88", makeBytes(0x19, 0x00), 2, 25.0, false}, {"sp78 25 degrees", "sp78", makeBytes(0x19, 0x00), 2, 25.0, false}, // sp78 sign-extended: 0xFF00 → int16(-256)/256 = -1.0. {"sp78 negative", "sp78", makeBytes(0xFF, 0x00), 2, -1.0, false}, {"fp1f 1.0", "fp1f", makeBytes(0x80, 0x00), 2, 1.0, false}, {"unknown type", "xxxx", makeBytes(0x00, 0x00), 2, 0.0, true}, {"size too small", "fp88", makeBytes(0x00), 1, 0.0, true}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result, err := fpToFloat32(tt.smcType, tt.bytes, tt.size) if tt.wantErr { assert.Error(t, err) } else { assert.NoError(t, err) assert.InDelta(t, tt.expected, result, 0.001) } }) } } func Test_fltToFloat32(t *testing.T) { tests := []struct { name string bytes gosmc.SMCBytes size uint32 expected float32 wantErr bool }{ {"25.0 degrees", makeBytes(0x00, 0x00, 0xC8, 0x41), 4, 25.0, false}, {"zero", makeBytes(0x00, 0x00, 0x00, 0x00), 4, 0.0, false}, {"1.0", makeBytes(0x00, 0x00, 0x80, 0x3F), 4, 1.0, false}, {"size too small", makeBytes(0x00), 1, 0.0, true}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result, err := fltToFloat32(tt.bytes, tt.size) if tt.wantErr { assert.Error(t, err) } else { assert.NoError(t, err) assert.InDelta(t, tt.expected, result, 0.001) } }) } } func Test_smcTypeToString(t *testing.T) { tests := []struct { name string input gosmc.UInt32Char expected string }{ {"sp78", makeUInt32Char("sp78"), "sp78"}, {"trailing null", makeUInt32Char("flt\x00"), "flt"}, {"trailing space", makeUInt32Char("ui8 "), "ui8"}, {"null only", makeUInt32Char("\x00\x00\x00\x00\x00"), ""}, {"fp88", makeUInt32Char("fp88"), "fp88"}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result := smcTypeToString(tt.input) assert.Equal(t, tt.expected, result) }) } } func Test_smcBytesToUint32(t *testing.T) { tests := []struct { name string bytes gosmc.SMCBytes size uint32 expected uint32 }{ {"zero 4 bytes", makeBytes(0x00, 0x00, 0x00, 0x00), 4, 0}, {"one 4 bytes", makeBytes(0x00, 0x00, 0x00, 0x01), 4, 1}, {"big endian 65536", makeBytes(0x00, 0x01, 0x00, 0x00), 4, 65536}, {"ui8 one", makeBytes(0x01), 1, 1}, {"ui16 256", makeBytes(0x01, 0x00), 2, 256}, // size>4 clamps to 4; 5th byte ignored. {"size 5 clamped to 4", makeBytes(0x00, 0x00, 0x00, 0x01, 0xFF), 5, 1}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result := smcBytesToUint32(tt.bytes, tt.size) assert.Equal(t, tt.expected, result) }) } } func Test_smcBytesToFloat32(t *testing.T) { tests := []struct { name string bytes gosmc.SMCBytes size uint32 expected float32 }{ {"zero", makeBytes(0x00, 0x00, 0x00, 0x00), 4, 0.0}, {"one", makeBytes(0x00, 0x00, 0x00, 0x01), 4, 1.0}, {"ui8 three", makeBytes(0x03), 1, 3.0}, {"ui8 255", makeBytes(0xFF), 1, 255.0}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result := smcBytesToFloat32(tt.bytes, tt.size) assert.InDelta(t, tt.expected, result, 0.001) }) } } // Test_AppleFPConvTable validates the AppleFPConv lookup table entries that are most // likely to be corrupted by a transcription error. TC-5 targets sp78 specifically // because it is the most common SMC temperature type and a wrong divisor (e.g. 128 // instead of 256) would silently double every temperature reading. func Test_AppleFPConvTable(t *testing.T) { tests := []struct { smcType string wantDiv float32 wantSigned bool }{ {"sp78", 256.0, true}, {"sp87", 128.0, true}, {"sp96", 64.0, true}, {"fp88", 256.0, false}, {"fp79", 512.0, false}, {"fp1f", 32768.0, false}, } for _, tt := range tests { t.Run(tt.smcType, func(t *testing.T) { v, ok := AppleFPConv[tt.smcType] assert.True(t, ok, "type %q must be present in AppleFPConv", tt.smcType) assert.Equal(t, tt.wantDiv, v.Div, "type %q divisor must be %g", tt.smcType, tt.wantDiv) assert.Equal(t, tt.wantSigned, v.Signed, "type %q signed flag must be %v", tt.smcType, tt.wantSigned) }) } } // Test_fpToFloat32_bigEndianAsymmetric explicitly verifies that fpToFloat32 reads // bytes in big-endian order (TC-1). Using the asymmetric input 0x01 0x00: // - big-endian: 0x0100 = 256; 256/256 = 1.0 (correct) // - little-endian: 0x0001 = 1; 1/256 = 0.0039 (wrong) func Test_fpToFloat32_bigEndianAsymmetric(t *testing.T) { result, err := fpToFloat32("fp88", makeBytes(0x01, 0x00), 2) assert.NoError(t, err) assert.InDelta(t, 1.0, result, 0.001, "fp88 0x01 0x00 must be 1.0 under big-endian interpretation") } // Test_fltToFloat32_littleEndianAsymmetric verifies that fltToFloat32 reads bytes // in little-endian order (TC-2). IEEE 754 float 1.0 in little-endian is 0x00 0x00 0x80 0x3F; // big-endian would produce a very different (garbage) float. func Test_fltToFloat32_littleEndianAsymmetric(t *testing.T) { result, err := fltToFloat32(makeBytes(0x00, 0x00, 0x80, 0x3F), 4) assert.NoError(t, err) assert.InDelta(t, 1.0, result, 0.001, "flt 0x00 0x00 0x80 0x3F must be 1.0 under little-endian interpretation") } // Test_smcBytesToUint32_bigEndianAsymmetric explicitly verifies that smcBytesToUint32 // assembles bytes in big-endian order (TC-3). Using 0x01 0x00: // - big-endian: 0x0100 = 256 (correct) // - little-endian: 0x0001 = 1 (wrong) func Test_smcBytesToUint32_bigEndianAsymmetric(t *testing.T) { result := smcBytesToUint32(makeBytes(0x01, 0x00), 2) assert.Equal(t, uint32(256), result, "smcBytesToUint32 must use big-endian byte order") } // Test_decodeToFloat32 dispatches to the correct converter for each SMC type family. // It verifies that: // - TypeFLT ("flt") routes through fltToFloat32 (little-endian IEEE 754) // - "ioft" routes through ioftToFloat32 (48.16 LE fixed-point) // - fp*/sp* types fall through to fpToFloat32 (big-endian fixed-point) // - Unknown types return (0, false) without panicking. func Test_decodeToFloat32(t *testing.T) { tests := []struct { name string dataType string bytes gosmc.SMCBytes size uint32 wantVal float32 wantOK bool }{ {"flt 25.0", gosmc.TypeFLT, makeBytes(0x00, 0x00, 0xC8, 0x41), 4, 25.0, true}, {"flt too small", gosmc.TypeFLT, makeBytes(0x00), 1, 0.0, false}, {"ioft 1.0", "ioft", makeBytes(0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00), 8, 1.0, true}, {"ioft too small", "ioft", makeBytes(0x00, 0x00, 0x01, 0x00), 4, 0.0, false}, {"sp78 25.0", gosmc.TypeSP78, makeBytes(0x19, 0x00), 2, 25.0, true}, {"fp88 1.0", gosmc.TypeFP88, makeBytes(0x01, 0x00), 2, 1.0, true}, {"unknown type", "xxxx", makeBytes(0x00, 0x00), 2, 0.0, false}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { got, ok := decodeToFloat32(tt.dataType, tt.bytes, tt.size) assert.Equal(t, tt.wantOK, ok) if tt.wantOK { assert.InDelta(t, tt.wantVal, got, 0.001) } }) } } // Test_DecodeValue verifies all code paths of DecodeValue: unsigned integers, signed integers, // boolean flag, pwm percentage, IEEE 754 float, ioft, fp*/sp* fixed-point, and the zero-size // and unknown-type short-circuits. func Test_DecodeValue(t *testing.T) { tests := []struct { name string dataType string bytes gosmc.SMCBytes size uint32 expected string }{ {"zero size", gosmc.TypeUI8, makeBytes(), 0, ""}, {"ui8 255", gosmc.TypeUI8, makeBytes(0xFF), 1, "255"}, {"ui16 256", gosmc.TypeUI16, makeBytes(0x01, 0x00), 2, "256"}, {"ui32 1", gosmc.TypeUI32, makeBytes(0x00, 0x00, 0x00, 0x01), 4, "1"}, {"hex_ 65536", "hex_", makeBytes(0x00, 0x01, 0x00, 0x00), 4, "65536"}, {"si8 -1", gosmc.TypeSI8, makeBytes(0xFF), 1, "-1"}, {"si8 127", gosmc.TypeSI8, makeBytes(0x7F), 1, "127"}, {"si16 -1", gosmc.TypeSI16, makeBytes(0xFF, 0xFF), 2, "-1"}, {"si16 too small", gosmc.TypeSI16, makeBytes(0xFF), 1, ""}, {"si32 -1", gosmc.TypeSI32, makeBytes(0xFF, 0xFF, 0xFF, 0xFF), 4, "-1"}, {"si32 too small", gosmc.TypeSI32, makeBytes(0xFF, 0xFF, 0xFF), 3, ""}, {"flag true", gosmc.TypeFLAG, makeBytes(0x01), 1, "true"}, {"flag false", gosmc.TypeFLAG, makeBytes(0x00), 1, "false"}, // pwm: BE u16 * 100 / 65536. {"pwm 50.0%", "pwm", makeBytes(0x80, 0x00), 2, "50.0%"}, {"pwm 25.0%", "pwm", makeBytes(0x40, 0x00), 2, "25.0%"}, {"pwm too small", "pwm", makeBytes(0x80), 1, ""}, {"flt 25.0", gosmc.TypeFLT, makeBytes(0x00, 0x00, 0xC8, 0x41), 4, "25"}, {"sp78 25.0", gosmc.TypeSP78, makeBytes(0x19, 0x00), 2, "25"}, {"fp88 1.0", gosmc.TypeFP88, makeBytes(0x01, 0x00), 2, "1"}, {"ioft 1.0", "ioft", makeBytes(0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00), 8, "1"}, {"unknown type", "xxxx", makeBytes(0x00, 0x00), 2, ""}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { got := DecodeValue(tt.dataType, tt.bytes, tt.size) assert.Equal(t, tt.expected, got) }) } } // Test_ioftToFloat32_divisor verifies that ioftToFloat32 uses the correct 2^16 = 65536 // divisor (TC-4). Using a raw value of 131072 (2^17 in the 48.16 fixed-point word): // - correct divisor 65536: 131072/65536 = 2.0 // - wrong divisor 32768: 131072/32768 = 4.0 func Test_ioftToFloat32_divisor(t *testing.T) { result, err := ioftToFloat32(makeBytes(0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00), 8) assert.NoError(t, err) assert.InDelta(t, 2.0, result, 0.001, "ioftToFloat32 must divide by 65536 (2^16)") } func Test_ioftToFloat32(t *testing.T) { tests := []struct { name string bytes gosmc.SMCBytes size uint32 expected float32 wantErr bool }{ {"one", makeBytes(0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00), 8, 1.0, false}, {"zero", makeBytes(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), 8, 0.0, false}, {"two", makeBytes(0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00), 8, 2.0, false}, {"size too small", makeBytes(0x00), 1, 0.0, true}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { result, err := ioftToFloat32(tt.bytes, tt.size) if tt.wantErr { assert.Error(t, err) } else { assert.NoError(t, err) assert.InDelta(t, tt.expected, result, 0.001) } }) } } ================================================ FILE: smc/gen-sensors.sh ================================================ #!/bin/sh set -e if [ -z "$1" ]; then echo "Missing target filename" exit 1 fi T=$(awk -F: '!/^[[:space:]]*\/\// { print " {Key:\"" $2 "\", Desc:\"" $1 "\", Platform:\"" $3 "\"}," }' < ../src/temp.txt) F=$(awk -F: '!/^[[:space:]]*\/\// { print " {Key:\"" $2 "\", Desc:\"" $1 "\", Platform:\"" $3 "\"}," }' < ../src/fans.txt) P=$(awk -F: '!/^[[:space:]]*\/\// { print " {Key:\"" $2 "\", Desc:\"" $1 "\", Platform:\"" $3 "\"}," }' < ../src/power.txt) V=$(awk -F: '!/^[[:space:]]*\/\// { print " {Key:\"" $2 "\", Desc:\"" $1 "\", Platform:\"" $3 "\"}," }' < ../src/voltage.txt) C=$(awk -F: '!/^[[:space:]]*\/\// { print " {Key:\"" $2 "\", Desc:\"" $1 "\", Platform:\"" $3 "\"}," }' < ../src/current.txt) echo " // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only // Code generated by go generate. DO NOT EDIT. // source template in smc/gen-sensors.sh //go:build darwin package smc var AppleTemp = []SensorStat{ $T } var AppleFans = []SensorStat{ $F } var ApplePower = []SensorStat{ $P } var AppleVoltage = []SensorStat{ $V } var AppleCurrent = []SensorStat{ $C } " | gofmt > "$1" gofumpt -w "$1" || true ================================================ FILE: smc/get.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "errors" "fmt" "math" "github.com/dkorunic/iSMC/gosmc" ) // Pre-built sentinel avoids fmt.Errorf allocs on the hot miss path. var errNoValue = errors.New("smc: no value") // getKeyFloat32 returns float32 value for a given SMC key. func getKeyFloat32(c uint, key string) (float32, string, error) { v, res := gosmc.SMCReadKey(c, key) if res != gosmc.IOReturnSuccess || v.DataSize == 0 { return 0.0, "", errNoValue } t := smcTypeToString(v.DataType) // Ta0P: mislabelled flt, decode as sp78. if t == gosmc.TypeFLT && key == "Ta0P" && v.DataSize >= 2 { val, err := fpToFloat32("sp78", v.Bytes, v.DataSize) return val, t, err } switch t { // TODO: Proper "hex_" handling. case gosmc.TypeUI8, gosmc.TypeUI16, gosmc.TypeUI32, "hex_": return smcBytesToFloat32(v.Bytes, v.DataSize), t, nil // Reject NaN/Inf from unused flt slots. case gosmc.TypeFLT: val, ok := decodeToFloat32(t, v.Bytes, v.DataSize) if !ok { return 0.0, "", fmt.Errorf("unable to decode SMC type %q to float32", t) } if math.IsNaN(float64(val)) || math.IsInf(float64(val), 0) { return 0.0, "", fmt.Errorf("SMC key %q has non-finite flt value", key) } return val, t, nil default: val, ok := decodeToFloat32(t, v.Bytes, v.DataSize) if !ok { return 0.0, "", fmt.Errorf("unable to decode SMC type %q to float32", t) } return val, t, nil } } // getKeyUint32 returns uint32 value for a given SMC key. func getKeyUint32(c uint, key string) (uint32, string, error) { v, res := gosmc.SMCReadKey(c, key) if res != gosmc.IOReturnSuccess || v.DataSize == 0 { return 0, "", errNoValue } t := smcTypeToString(v.DataType) switch t { // TODO: Proper "hex_" handling. case gosmc.TypeUI8, gosmc.TypeUI16, gosmc.TypeUI32, "hex_": return smcBytesToUint32(v.Bytes, v.DataSize), t, nil default: return 0, "", fmt.Errorf("unable to convert to uint32 type %q, bytes %v", t, v.Bytes[:v.DataSize]) } } // getKeyBool returns bool value for a given SMC key. func getKeyBool(c uint, key string) (bool, string, error) { v, res := gosmc.SMCReadKey(c, key) if res != gosmc.IOReturnSuccess || v.DataSize == 0 { return false, "", errNoValue } t := smcTypeToString(v.DataType) switch t { case gosmc.TypeFLAG: return smcBytesToUint32(v.Bytes, v.DataSize) == uint32(1), t, nil default: return false, "", fmt.Errorf("unable to convert to bool type %q, bytes %v", t, v.Bytes[:v.DataSize]) } } ================================================ FILE: smc/mapping_test.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "fmt" "sort" "strings" "testing" "github.com/stretchr/testify/assert" ) // m4Pro14CoreReport is a representative key→value snapshot captured from a real // M4 Pro 14-core (10 Performance + 4 Efficiency cores) SMC report. Sentinel // values (−4, 0, 2.2, 3.4, 5.2 °C) observed in Tp0* groups 0-7 are included // to verify they are rejected by isValidReading. var m4Pro14CoreReport = map[string]float32{ // ── Efficiency Core 1 (Te04/05/06 triplet) ───────────────────────────── "Te04": 35.33, "Te05": 41.13, "Te06": 44.81, // ── Efficiency Core 2 (Te0R/S/T triplet) ────────────────────────────── "Te0R": 34.92, "Te0S": 40.52, "Te0T": 43.50, // ── Efficiency Cores 3-4 (Tpx8-D; Te08-Te0I absent on M4 Pro 14-core) ─ "Tpx8": 39.13, "Tpx9": 48.25, "TpxA": 38.88, // E-core 3 "TpxB": 46.05, "TpxC": 39.04, "TpxD": 51.16, // E-core 4 // ── Efficiency cluster die aggregates ────────────────────────────────── "Tex0": 39.33, "Tex1": 44.81, // Die 1 "Tex2": 38.92, "Tex3": 43.50, // Die 2 // ── P-core Tp1*/Tp2* scheme: exactly 10 P-core triplets ──────────────── "Tp1i": 34.81, "Tp1j": 42.21, "Tp1k": 45.20, // Core 1 "Tp1m": 34.98, "Tp1n": 41.18, "Tp1o": 48.25, // Core 2 "Tp1q": 34.46, "Tp1t": 41.86, "Tp1u": 43.36, // Core 3 "Tp1v": 34.52, "Tp1w": 40.72, "Tp1x": 45.23, // Core 4 "Tp1y": 34.75, "Tp1z": 42.15, "Tp20": 46.38, // Core 5 "Tp21": 34.66, "Tp22": 40.86, "Tp23": 49.42, // Core 6 "Tp24": 34.60, "Tp25": 42.00, "Tp26": 47.58, // Core 7 "Tp27": 35.04, "Tp28": 41.24, "Tp29": 51.16, // Core 8 "Tp2A": 35.70, "Tp2B": 43.10, "Tp2C": 44.58, // Core 9 "Tp2D": 35.91, "Tp2E": 42.11, "Tp2G": 46.72, // Core 10 // ── Tp0* Core 9 override (Tp0W/X/Y, Tp0Z absent) ────────────────────── "Tp0W": 34.19, "Tp0X": 41.59, "Tp0Y": 42.20, // ── Tp0* Core 10 override (Tp0a sentinel, Tp0b below minTempCelsius) ─── "Tp0a": -4.0, "Tp0b": 2.2, "Tp0c": 41.94, // ── Tp0* groups 0-7: sentinel values (must be rejected, keys removed from // M4 sensor table but kept here to catch re-addition regressions) ──── "Tp00": -4.0, "Tp01": 3.4, "Tp02": 0.0, "Tp04": -4.0, "Tp05": 2.2, "Tp06": 0.0, "Tp08": -4.0, "Tp09": 3.4, "Tp0A": 0.0, "Tp0C": -4.0, "Tp0D": 2.2, "Tp0E": 0.0, "Tp0G": -4.0, "Tp0H": 3.4, "Tp0I": 0.0, "Tp0K": -4.0, "Tp0L": 2.2, "Tp0M": 0.0, "Tp0O": -4.0, "Tp0P": 3.4, "Tp0Q": 0.0, "Tp0S": -4.0, "Tp0T": 2.2, "Tp0U": 0.0, // ── Phantom P-cores 11-15 (removed from M4 table; present here to catch // re-addition regressions; values are real-looking but not physical P-cores) ─ "Tp2I": 34.89, "Tp2J": 42.29, "Tp2K": 42.61, // was phantom Core 11 "Tp2L": 34.94, "Tp2M": 41.14, "Tp2N": 42.30, // was phantom Core 12 "Tp2O": 35.72, "Tp2Q": 44.92, "Tp2R": 46.75, // was phantom Core 13 "Tp2S": 35.60, "Tp2T": 44.80, "Tp2U": 46.70, // was phantom Core 14 "Tp2V": 35.40, "Tp2W": 44.60, "Tp2X": 46.44, // was phantom Core 15 // ── Phantom Core 11 from Tp0d/e/f (removed from M4 table) ───────────── "Tp0d": 34.70, "Tp0e": 42.10, "Tp0f": 42.45, } // resolveM4Sensors simulates the addGeneric pipeline for a given set of sensors // and a key→value snapshot, without requiring a live SMC connection. // It applies the same isValidReading filter and last-write-wins semantics as the // production getGeneric+addGeneric path. func resolveM4Sensors(sensors []SensorStat, snapshot map[string]float32) map[string]float32 { out := make(map[string]float32) for _, s := range sensors { val, present := snapshot[s.Key] if !present { continue } if isValidReading(val, TempUnit) { out[s.Desc] = val } } return out } // Test_M4Pro14CoreMapping verifies that the M4 temperature sensor definitions in // AppleTemp, combined with the isValidReading filter, resolve the M4 Pro 14-core // SMC report snapshot to exactly 10 Performance Cores and 4 Efficiency Cores. // // It also asserts: // - every resolved core temperature is within a plausible idle/load range // - no phantom P-cores (11-15, from Tp2I-Tp2X) appear, even though those keys // return real-looking values in the snapshot // - Tp0* sentinel values (−4, 0, 2.2, 3.4 °C) do not overwrite valid readings func Test_M4Pro14CoreMapping(t *testing.T) { // Extract only M4-tagged sensors from the generated AppleTemp table. m4Sensors := make([]SensorStat, 0, 64) for _, s := range AppleTemp { if s.Platform == "M4" { m4Sensors = append(m4Sensors, s) } } resolved := resolveM4Sensors(m4Sensors, m4Pro14CoreReport) // Count distinct P-core and E-core descriptions. var ( pCores int eCores int pCoreNames []string eCoreNames []string ) for desc := range resolved { switch { case strings.HasPrefix(desc, "CPU Performance Core "): pCores++ pCoreNames = append(pCoreNames, desc) case strings.HasPrefix(desc, "CPU Efficiency Core "): eCores++ eCoreNames = append(eCoreNames, desc) } } assert.Equal(t, 10, pCores, "M4 Pro 14-core must resolve to exactly 10 Performance Cores; got %v", pCoreNames) assert.Equal(t, 4, eCores, "M4 Pro 14-core must resolve to exactly 4 Efficiency Cores; got %v", eCoreNames) // Verify each P-core has a plausible temperature (not a sentinel, not implausibly high). for _, name := range pCoreNames { temp := resolved[name] assert.GreaterOrEqual(t, temp, float32(minTempCelsius), "%s temperature %g °C is below minTempCelsius — sentinel not rejected", name, temp) assert.Less(t, temp, float32(110.0), "%s temperature %g °C is implausibly high", name, temp) } // Verify each E-core has a plausible temperature. for _, name := range eCoreNames { temp := resolved[name] assert.GreaterOrEqual(t, temp, float32(minTempCelsius), "%s temperature %g °C is below minTempCelsius", name, temp) assert.Less(t, temp, float32(110.0), "%s temperature %g °C is implausibly high", name, temp) } // Explicitly assert that no phantom P-cores 11-15 appeared. for i := 11; i <= 15; i++ { phantom := fmt.Sprintf("CPU Performance Core %d", i) _, found := resolved[phantom] assert.False(t, found, "phantom %q must not appear in resolved sensors", phantom) } } // a18ProReport is a representative key→value snapshot captured from report-a18.txt // (MacBook Neo, A18 Pro, 2 Performance + 4 Efficiency cores). It exercises the // hybrid sensor scheme: M1-style Tp0x triplets for P-cores, M3/M4-style Te triplets // plus lowercase/non-contiguous Tp0* triplets for E-cores, and cluster-level // aggregates at Tp08-0E, Tpx0-3, Tex0-3. var a18ProReport = map[string]float32{ // ── Performance Core 1 & 2 (M1-style Tp0x triplets) ─────────────────── "Tp00": 85.63, "Tp01": 92.76, "Tp02": 106.30, "Tp04": 87.36, "Tp05": 94.28, "Tp06": 110.56, // ── Performance Cluster aggregates (must not be counted as cores) ───── "Tp08": 86.01, "Tp09": 91.43, "Tp0A": 106.23, "Tp0C": 88.18, "Tp0D": 96.10, "Tp0E": 111.91, // ── Efficiency Core 1 (Te04/05/06 triplet) ──────────────────────────── "Te04": 77.69, "Te05": 82.62, "Te06": 88.64, // ── Efficiency Core 2 (Te0R/S/T triplet) ────────────────────────────── "Te0R": 69.32, "Te0S": 73.74, "Te0T": 77.38, // ── Efficiency Core 3 (lowercase Tp0l/m/n triplet) ──────────────────── "Tp0l": 75.68, "Tp0m": 80.01, "Tp0n": 88.34, // ── Efficiency Core 4 (non-contiguous Tp0o/q/t triplet) ─────────────── "Tp0o": 74.83, "Tp0q": 81.16, "Tp0t": 93.52, // ── Cluster die aggregates ──────────────────────────────────────────── "Tpx0": 92.37, "Tpx1": 111.91, "Tpx2": 79.77, "Tpx3": 93.52, "Tex0": 81.81, "Tex1": 88.64, "Tex2": 73.38, "Tex3": 77.38, } // a18ProFullReport is the full snapshot from report-a18.txt (lines 815-934), // including keys that should be filtered out (below minTempCelsius, zero, etc.). // Used to verify the resolved table matches what a user would see on real hardware. var a18ProFullReport = map[string]float32{ // Battery / board "TB0T": 28.5, "TBLp": 33.44162, // CPU die PMU "TCMb": 96.101906, "TCMz": 111.90625, // GPU die (ioft) — uppercase T keys "TG0A": 28.5, "TG0B": 28.5, "TG0C": 28.399994, "TG0H": 28.399994, "TG0V": 28.399994, // Flash/proximity "TH0p": 38.076584, // Power delivery "TPD0": 61.705124, "TPD1": 58.4552, "TPD2": 58.563522, "TPD3": 57.263565, "TPD4": 59.32184, "TPD5": 59.10518, "TPD6": 58.130203, "TPDX": 0, // ioft die probes — unmapped "TQ0d": 43.608704, "TQ0j": 42, "TR0Z": 51.820007, "TR1d": 25.733734, "TR2d": 33.113144, // RF proximity / delivery "TR5p": 46.506668, "TRD0": 34.06299, "TRD1": 33.414993, "TRD2": 33.414993, "TRD3": 34.17099, "TRDX": 0, // SSD proximity "TS0p": 54.604843, "TS1p": 59.980774, // Touch / USB-C / virtual "TTSp": 26.082855, "TUCp": 34.857666, "TVA0": 20.22112, "TVA1": 21.787788, "TVD0": 96.101906, "TVMD": 1, "TVMR": 64.25298, "TVS0": 31.172697, "TVS1": 31.886295, "TVS3": 32.129635, "TVS4": 33.311043, "TVV0": 0, "TVmS": 64.25298, // WiFi proximity "TW0p": 41.94023, // Ambient (all below minTempCelsius, should be rejected) "Ta00": 0, "Ta01": 6.525, "Ta08": 0, "Ta09": 7.325, "Ta0C": 0, "Ta0D": 6.725, "Ta0O": 0, "Ta0P": 7.725, "Ta0R": 0, "Ta0S": 7.725, "Ta0U": 0, "Ta0V": 7.025, // Ambient top — note lowercase p (TaTp), not uppercase P (TaTP) "TaTp": 32.75183, // E-cores (triplet, M3/M4-style) "Te04": 77.69375, "Te05": 82.61875, "Te06": 88.640625, "Te0R": 69.31753, "Te0S": 73.74253, "Te0T": 77.375, // E-cluster die "Tex0": 81.809494, "Tex1": 88.640625, "Tex2": 73.38319, "Tex3": 77.375, // GPU (doublets) "Tg04": 62.688957, "Tg05": 66.413956, "Tg0C": 63.862648, "Tg0D": 68.08765, "Tg0K": 62.33503, "Tg0L": 66.56003, "Tg0d": 63.28016, "Tg0e": 67.30516, // P-cores + cluster aggregates "Tp00": 85.63325, "Tp01": 92.75825, "Tp02": 106.296875, "Tp04": 87.35511, "Tp05": 94.28011, "Tp06": 110.5625, "Tp08": 86.0098, "Tp09": 91.43481, "Tp0A": 106.234375, "Tp0C": 88.1769, "Tp0D": 96.101906, "Tp0E": 111.90625, // E-core 3 & 4 (lowercase / non-contiguous triplets) "Tp0l": 75.68425, "Tp0m": 80.00925, "Tp0n": 88.34375, "Tp0o": 74.83265, "Tp0q": 81.157646, "Tp0t": 93.515625, // Cluster die aggregates "Tpx0": 92.37475, "Tpx1": 111.90625, "Tpx2": 79.76834, "Tpx3": 93.515625, // SSDs (triplets) "Ts00": 66.147606, "Ts01": 66.147606, "Ts02": 72.828125, "Ts04": 67.31417, "Ts05": 67.31417, "Ts06": 74.265625, "Ts08": 63.65429, "Ts09": 63.65429, "Ts0A": 68.8125, "Ts0C": 63.816048, "Ts0D": 63.816048, "Ts0E": 69.109375, "Ts0G": 74.8205, "Ts0H": 74.8205, "Ts0I": 84.5, "Ts0K": 72.43232, "Ts0L": 72.43232, "Ts0M": 81.296875, "Tsx0": 78.85631, "Tsx1": 84.5, // Thermal zones (all zero, rejected) "Tz11": 0, "Tz12": 0, "Tz13": 0, "Tz14": 0, "Tz15": 0, "Tz16": 0, "Tz17": 0, "Tz18": 0, "Tz1j": 0, } // resolveForFamily replays the full SMC resolution pipeline (family filter + // wildcard expansion + isValidReading + last-write-wins) against a snapshot, // matching what addGeneric would produce during a live SMC read. // It returns a map keyed by Desc (as shown to the user) → (key, value). func resolveForFamily(sensors []SensorStat, family string, snapshot map[string]float32) map[string]struct { Key string Val float32 } { out := make(map[string]struct { Key string Val float32 }) familyApple := strings.HasPrefix(family, "M") || strings.HasPrefix(family, "A") || family == "Apple" for _, s := range sensors { // Platform gate passes := false switch { case s.Platform == "Apple" && familyApple: passes = true case s.Platform == "" || s.Platform == "All": passes = true case s.Platform == family: passes = true } if !passes { continue } // Wildcard expansion (mirrors smc.getGenericSensors) if !strings.Contains(s.Key, "%") { if v, ok := snapshot[s.Key]; ok && isValidReading(v, TempUnit) { out[s.Desc] = struct { Key string Val float32 }{Key: s.Key, Val: v} } continue } for i := range 10 { iKey := strings.Replace(s.Key, "%", fmt.Sprintf("%d", i), 1) iDesc := strings.Replace(s.Desc, "%", fmt.Sprintf("%d", i+1), 1) if v, ok := snapshot[iKey]; ok && isValidReading(v, TempUnit) { out[iDesc] = struct { Key string Val float32 }{Key: iKey, Val: v} } } } return out } // Test_A18ProResolvedTable dumps the full resolved Temperature table as it // would appear to a user running `iSMC` on Mac17,5 with the A18 report // snapshot. Run with `go test -run Test_A18ProResolvedTable -v ./smc/` to // inspect the output. Also asserts invariants: 2 P-cores, 4 E-cores, no // sensor below minTempCelsius. func Test_A18ProResolvedTable(t *testing.T) { resolved := resolveForFamily(AppleTemp, "A18", a18ProFullReport) // Sort descriptions for stable output. names := make([]string, 0, len(resolved)) for name := range resolved { names = append(names, name) } sort.Strings(names) t.Logf("===== Resolved Temperature table for Mac17,5 (A18 Pro) =====") t.Logf("%-38s %-6s %10s", "Sensor", "Key", "Value °C") for _, name := range names { e := resolved[name] t.Logf("%-38s %-6s %10.4f", name, e.Key, e.Val) } t.Logf("===== %d rows resolved =====", len(resolved)) // Invariants var p, e int for name := range resolved { switch { case strings.HasPrefix(name, "CPU Performance Core "): p++ case strings.HasPrefix(name, "CPU Efficiency Core "): e++ } } assert.Equal(t, 2, p, "expected 2 P-cores") assert.Equal(t, 4, e, "expected 4 E-cores") for name, entry := range resolved { assert.GreaterOrEqual(t, entry.Val, float32(minTempCelsius), "%s resolved below minTempCelsius (%g)", name, entry.Val) } } // Test_A18ProMapping verifies that the A18 temperature sensor definitions, // combined with the isValidReading filter, resolve the A18 Pro SMC snapshot // to exactly 2 Performance Cores and 4 Efficiency Cores, with no stray // additional cores bleeding in from cluster-level aggregates (Tp08-0E). func Test_A18ProMapping(t *testing.T) { a18Sensors := make([]SensorStat, 0, 64) for _, s := range AppleTemp { if s.Platform == "A18" { a18Sensors = append(a18Sensors, s) } } resolved := resolveM4Sensors(a18Sensors, a18ProReport) var ( pCores int eCores int pCoreNames []string eCoreNames []string ) for desc := range resolved { switch { case strings.HasPrefix(desc, "CPU Performance Core "): pCores++ pCoreNames = append(pCoreNames, desc) case strings.HasPrefix(desc, "CPU Efficiency Core "): eCores++ eCoreNames = append(eCoreNames, desc) } } assert.Equal(t, 2, pCores, "A18 Pro must resolve to exactly 2 Performance Cores; got %v", pCoreNames) assert.Equal(t, 4, eCores, "A18 Pro must resolve to exactly 4 Efficiency Cores; got %v", eCoreNames) // Cluster aggregates must resolve under non-core labels (single P-cluster on A18 Pro). _, ca1 := resolved["CPU Performance Cluster Aggregate 1"] _, ca2 := resolved["CPU Performance Cluster Aggregate 2"] assert.True(t, ca1, "CPU Performance Cluster Aggregate 1 must resolve from Tp08/09/0A") assert.True(t, ca2, "CPU Performance Cluster Aggregate 2 must resolve from Tp0C/0D/0E") // Guard against phantom P-cores 3+: only 2 P-cores exist on A18 Pro. for i := 3; i <= 6; i++ { phantom := fmt.Sprintf("CPU Performance Core %d", i) _, found := resolved[phantom] assert.False(t, found, "phantom %q must not appear (A18 Pro has 2 P-cores)", phantom) } } // m2ProReport is a representative key→value snapshot captured from report-m2.txt // (M2 Pro, 8 P-cores + 4 E-cores). Per-E-core sensors are not exposed individually // on this SKU; the four E-cores share one Te04/05/06 cluster-aggregate triplet. // Tp0a/0b/0c violates third-is-max (third value 35.77 < probe-B 37.02) and is // mapped as a cluster aggregate rather than a per-core triplet. var m2ProReport = map[string]float32{ // ── P-Cores 1-4 (capital Tp triplets, M1-style) ─────────────────────── "Tp00": 31.821533, "Tp01": 37.92153, "Tp02": 40.415627, "Tp04": 31.96039, "Tp05": 37.04739, "Tp06": 38.72475, "Tp08": 31.56863, "Tp09": 37.66863, "Tp0A": 39.99375, "Tp0C": 31.724152, "Tp0D": 36.81115, "Tp0E": 38.302876, // ── P-Cores 5-8 (lowercase Tp triplets) ─────────────────────────────── "Tp0e": 31.713661, "Tp0f": 37.81366, "Tp0g": 39.853127, "Tp0i": 31.820509, "Tp0j": 36.90751, "Tp0k": 38.521626, "Tp0m": 30.874327, "Tp0n": 36.974327, "Tp0o": 38.7125, "Tp0q": 31.240982, "Tp0r": 36.32798, "Tp0s": 38.09975, // ── P-Cluster aggregate (third-is-max violation, clean mantissa) ────── "Tp0a": 31.569178, "Tp0b": 37.019176, "Tp0c": 35.765625, // ── E-Cluster aggregate (single triplet for 4 E-cores on this SKU) ──── "Te04": 31.497454, "Te05": 36.947453, "Te06": 38.51875, // ── GPU clusters (probe + max doublets) ─────────────────────────────── "Tg0e": 31.15997, "Tg0f": 35.767967, "Tg0m": 31.263393, "Tg0n": 35.87139, "Tg0q": 31.873512, "Tg0r": 36.481514, // ── SSD slots (probe-A/probe-B mirrored, third is max) ──────────────── "Ts0K": 31.30121, "Ts0L": 31.30121, "Ts0M": 31.921875, "Ts0O": 30.718437, "Ts0P": 30.718437, "Ts0Q": 31.171875, "Ts0S": 31.572407, "Ts0T": 31.572407, "Ts0U": 31.8125, "Ts0W": 31.525024, "Ts0X": 36.975025, "Ts0Y": 38.409374, "Ts0a": 31.75509, "Ts0b": 31.75509, "Ts0c": 32.328125, // ── SSD controllers ─────────────────────────────────────────────────── "Ts1P": 26.125, "TsOP": 27.375, } // Test_M2ProMapping verifies that the M2 temperature sensor definitions in // AppleTemp, combined with the isValidReading filter, resolve the M2 Pro // SMC report snapshot to exactly 8 Performance Cores, no per-E-core rows // (the 4 E-cores share a cluster-aggregate triplet on this SKU), and the // expected GPU / SSD / cluster-aggregate counts. func Test_M2ProMapping(t *testing.T) { m2Sensors := make([]SensorStat, 0, 64) for _, s := range AppleTemp { if s.Platform == "M2" { m2Sensors = append(m2Sensors, s) } } resolved := resolveM4Sensors(m2Sensors, m2ProReport) var ( pCores int eCores int gpus int ssds int pCoreNames []string ) for desc := range resolved { switch { case strings.HasPrefix(desc, "CPU Performance Core "): pCores++ pCoreNames = append(pCoreNames, desc) case strings.HasPrefix(desc, "CPU Efficiency Core "): eCores++ case strings.HasPrefix(desc, "GPU "): gpus++ case strings.HasPrefix(desc, "SSD ") && !strings.HasPrefix(desc, "SSD Controller"): ssds++ } } assert.Equal(t, 8, pCores, "M2 Pro must resolve to exactly 8 Performance Cores; got %v", pCoreNames) assert.Equal(t, 0, eCores, "M2 Pro must not resolve per-E-core rows (cluster aggregate only)") assert.Equal(t, 3, gpus, "M2 Pro must resolve to exactly 3 GPU clusters") assert.Equal(t, 5, ssds, "M2 Pro must resolve to exactly 5 SSD slots") _, pAgg := resolved["CPU Performance Cluster Aggregate 1"] _, eAgg := resolved["CPU Efficiency Cluster Aggregate 1"] assert.True(t, pAgg, "CPU Performance Cluster Aggregate 1 must resolve from Tp0a/0b/0c") assert.True(t, eAgg, "CPU Efficiency Cluster Aggregate 1 must resolve from Te04/05/06") // Guard against phantom P-cores 9+: only 8 P-cores exist on M2 Pro. for i := 9; i <= 16; i++ { phantom := fmt.Sprintf("CPU Performance Core %d", i) _, found := resolved[phantom] assert.False(t, found, "phantom %q must not appear (M2 Pro has 8 P-cores)", phantom) } // Each P-core's resolved value must be the triplet's max (third position), // not the probe-B value — verifies the triplet last-write-wins ordering. expectedMax := map[string]float32{ "CPU Performance Core 1": 40.415627, "CPU Performance Core 2": 38.72475, "CPU Performance Core 3": 39.99375, "CPU Performance Core 4": 38.302876, "CPU Performance Core 5": 39.853127, "CPU Performance Core 6": 38.521626, "CPU Performance Core 7": 38.7125, "CPU Performance Core 8": 38.09975, } for name, want := range expectedMax { got, ok := resolved[name] assert.True(t, ok, "%s missing from resolved map", name) assert.InDelta(t, want, got, 0.001, "%s resolved to %g °C; expected triplet max %g °C", name, got, want) } } // Test_isValidReading verifies the sentinel-rejection and minimum-temperature logic. func Test_isValidReading(t *testing.T) { tests := []struct { name string val float32 unit string want bool }{ {"negative sentinel", -4.0, TempUnit, false}, {"zero", 0.0, TempUnit, false}, {"near-zero rounds to 0", 0.004, TempUnit, false}, {"below minTemp", 2.2, TempUnit, false}, {"below minTemp 3.4", 3.4, TempUnit, false}, {"below minTemp 5.2", 5.2, TempUnit, false}, {"exactly minTemp", 10.0, TempUnit, true}, {"plausible idle", 35.0, TempUnit, true}, {"plausible load", 85.0, TempUnit, true}, // Non-temperature units must not apply the minTempCelsius guard. {"low voltage", 0.9, "V", true}, {"small current", 0.5, "A", true}, {"zero voltage", 0.0, "V", false}, {"negative voltage", -1.0, "V", false}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { got := isValidReading(tt.val, tt.unit) assert.Equal(t, tt.want, got, "isValidReading(%g, %q) = %v, want %v", tt.val, tt.unit, got, tt.want) }) } } ================================================ FILE: smc/raw.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "fmt" "os" "github.com/dkorunic/iSMC/gosmc" ) const ( keyCount = "#KEY" // Guards against a corrupt/spoofed #KEY; real Macs report ~1800. maxKeys = 4096 ) // RawKey holds raw SMC key data for reporting. type RawKey struct { Key string DataType string DataSize uint32 Bytes gosmc.SMCBytes } // GetRaw returns all SMC keys with their raw byte values func GetRaw() []RawKey { conn, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return nil } defer gosmc.SMCClose(conn) countVal, res := gosmc.SMCReadKey(conn, keyCount) if res != gosmc.IOReturnSuccess || countVal.DataSize == 0 { return nil } total := min(smcBytesToUint32(countVal.Bytes, countVal.DataSize), maxKeys) keys := make([]RawKey, 0, total) for i := range total { input := &gosmc.SMCKeyData{ Data8: gosmc.CMDReadIndex, Data32: i, } output, res := gosmc.SMCCall(conn, gosmc.KernelIndexSMC, input) if res != gosmc.IOReturnSuccess { continue } // Decode the uint32 key code as 4-char big-endian ASCII. k := output.Key keyStr := string([]byte{ byte(k >> 24), byte(k >> 16), byte(k >> 8), byte(k), }) val, res := gosmc.SMCReadKey(conn, keyStr) if res != gosmc.IOReturnSuccess { continue } keys = append(keys, RawKey{ Key: keyStr, DataType: smcTypeToString(val.DataType), DataSize: val.DataSize, Bytes: val.Bytes, }) } return keys } ================================================ FILE: smc/rawtemp.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "math" "github.com/dkorunic/iSMC/gosmc" ) // Plausible temperature window; rejects firmware-bug outliers like M5 Pro TTPD's −3e8 °C. const ( rawTempMin = float32(-100.0) rawTempMax = float32(200.0) ) // RawKeyToFloat32 converts a RawKey's raw bytes to a float32 value using the SMC type // information stored in the key. // // Supported types: flt, ioft, and all fp*/sp* fixed-point variants. // The Ta0P sensor is handled specially: it is labelled "flt" by the SMC but actually // encodes its value in sp78 (signed 7.8 fixed-point) format. // // Returns (value, true) on success and (0, false) for unsupported types, insufficient // data, non-finite results, or values outside the plausible temperature window. func RawKeyToFloat32(k RawKey) (float32, bool) { // Ta0P: mislabelled flt, decode as sp78. if k.DataType == gosmc.TypeFLT && k.Key == "Ta0P" && k.DataSize >= 2 { v, err := fpToFloat32("sp78", k.Bytes, k.DataSize) if err != nil { return 0, false } return finiteInRange(v) } switch k.DataType { case gosmc.TypeFLT: v, err := fltToFloat32(k.Bytes, k.DataSize) if err != nil { return 0, false } return finiteInRange(v) case "ioft": v, err := ioftToFloat32(k.Bytes, k.DataSize) if err != nil { return 0, false } return finiteInRange(v) default: v, err := fpToFloat32(k.DataType, k.Bytes, k.DataSize) if err != nil { return 0, false } return finiteInRange(v) } } // finiteInRange returns (v, true) if v is finite and within the temperature // sanity window, otherwise (0, false). Centralising the check keeps every type // branch in RawKeyToFloat32 in lockstep. func finiteInRange(v float32) (float32, bool) { if math.IsNaN(float64(v)) || math.IsInf(float64(v), 0) { return 0, false } if v < rawTempMin || v > rawTempMax { return 0, false } return v, true } ================================================ FILE: smc/rawtemp_test.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "testing" "github.com/dkorunic/iSMC/gosmc" "github.com/stretchr/testify/assert" ) // Test_RawKeyToFloat32 verifies the full type-dispatch and NaN/Inf-rejection logic of // RawKeyToFloat32 without requiring a live SMC connection. // // Special cases covered: // - Ta0P is mislabelled as "flt" by the SMC firmware but encodes its value in sp78; // the workaround in RawKeyToFloat32 must decode it via fpToFloat32("sp78",...). // - TypeFLT values that decode to NaN or ±Inf must be rejected (return false), while // finite values are accepted. func Test_RawKeyToFloat32(t *testing.T) { tests := []struct { name string key RawKey wantVal float32 wantOK bool }{ // TypeFLT (IEEE 754 little-endian). { // 0x41C80000 LE = 25.0. name: "flt 25.0", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFLT, DataSize: 4, Bytes: makeBytes(0x00, 0x00, 0xC8, 0x41)}, wantVal: 25.0, wantOK: true, }, { name: "flt too small", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFLT, DataSize: 1, Bytes: makeBytes(0x00)}, wantOK: false, }, { // 0x7FC00000 LE = quiet NaN. name: "flt NaN rejected", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFLT, DataSize: 4, Bytes: makeBytes(0x00, 0x00, 0xC0, 0x7F)}, wantOK: false, }, { // 0x7F800000 LE = +Inf. name: "flt +Inf rejected", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFLT, DataSize: 4, Bytes: makeBytes(0x00, 0x00, 0x80, 0x7F)}, wantOK: false, }, { // 0xFF800000 LE = -Inf. name: "flt -Inf rejected", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFLT, DataSize: 4, Bytes: makeBytes(0x00, 0x00, 0x80, 0xFF)}, wantOK: false, }, // ioft (48.16 unsigned fixed-point, little-endian). { // LE u64 0x10000 = 65536; /65536 = 1.0. name: "ioft 1.0", key: RawKey{Key: "IOFT", DataType: "ioft", DataSize: 8, Bytes: makeBytes(0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00)}, wantVal: 1.0, wantOK: true, }, { name: "ioft too small", key: RawKey{Key: "IOFT", DataType: "ioft", DataSize: 4, Bytes: makeBytes(0x00, 0x00, 0x01, 0x00)}, wantOK: false, }, { // ≈10¹⁴ °C; observed on report-m4-4.txt TR3d. name: "ioft above rawTempMax rejected", key: RawKey{Key: "TR3d", DataType: "ioft", DataSize: 8, Bytes: makeBytes(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF)}, wantOK: false, }, // fp*/sp* fixed-point (big-endian). { // BE 0x1900 = 6400 / 256 = 25.0. name: "sp78 25.0", key: RawKey{Key: "TC0H", DataType: gosmc.TypeSP78, DataSize: 2, Bytes: makeBytes(0x19, 0x00)}, wantVal: 25.0, wantOK: true, }, { // BE 0x0100 = 256 / 256 = 1.0. name: "fp88 1.0", key: RawKey{Key: "TC0H", DataType: gosmc.TypeFP88, DataSize: 2, Bytes: makeBytes(0x01, 0x00)}, wantVal: 1.0, wantOK: true, }, { name: "unknown type", key: RawKey{Key: "TC0H", DataType: "xxxx", DataSize: 2, Bytes: makeBytes(0x00, 0x00)}, wantOK: false, }, // Ta0P: mislabelled flt, decoded as sp78. { // BE 0x1900 / 256 = 25.0. name: "Ta0P sp78 workaround", key: RawKey{Key: "Ta0P", DataType: gosmc.TypeFLT, DataSize: 2, Bytes: makeBytes(0x19, 0x00)}, wantVal: 25.0, wantOK: true, }, { name: "Ta0P too small for sp78", key: RawKey{Key: "Ta0P", DataType: gosmc.TypeFLT, DataSize: 1, Bytes: makeBytes(0x19)}, wantOK: false, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { gotVal, gotOK := RawKeyToFloat32(tt.key) assert.Equal(t, tt.wantOK, gotOK, "RawKeyToFloat32(%+v).ok", tt.key) if tt.wantOK { assert.InDelta(t, tt.wantVal, gotVal, 0.001, "RawKeyToFloat32(%+v) value", tt.key) } }) } } ================================================ FILE: smc/sensors.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only // Code generated by go generate. DO NOT EDIT. // source template in smc/gen-sensors.sh //go:build darwin package smc var AppleTemp = []SensorStat{ {Key: "TZ%C", Desc: "Thermal Zone %", Platform: "All"}, {Key: "TC%D", Desc: "CPU Diode %", Platform: "All"}, {Key: "TC%E", Desc: "CPU Diode Virtual %", Platform: "All"}, {Key: "TC%F", Desc: "CPU Diode Filtered %", Platform: "All"}, {Key: "TC%H", Desc: "CPU Heatsink %", Platform: "All"}, {Key: "TC%P", Desc: "CPU Proximity %", Platform: "All"}, {Key: "TCAD", Desc: "CPU Package", Platform: "All"}, {Key: "TC%c", Desc: "CPU Core %", Platform: "All"}, {Key: "TC%C", Desc: "CPU Core %", Platform: "All"}, {Key: "TG%D", Desc: "GPU Diode %", Platform: "All"}, {Key: "TGDD", Desc: "GPU AMD Radeon", Platform: "All"}, {Key: "TG%H", Desc: "GPU Heatsink %", Platform: "All"}, {Key: "TG%P", Desc: "GPU Proximity %", Platform: "All"}, {Key: "TG%S", Desc: "GPU Sensor %", Platform: "All"}, {Key: "TG%T", Desc: "GPU Die %", Platform: "All"}, {Key: "TG%A", Desc: "GPU Probe A %", Platform: "All"}, {Key: "TG%B", Desc: "GPU Probe B %", Platform: "All"}, {Key: "TG%C", Desc: "GPU Probe C %", Platform: "All"}, {Key: "TG%V", Desc: "GPU Probe V %", Platform: "All"}, {Key: "Tm%P", Desc: "Memory Bank Proximity %", Platform: "All"}, {Key: "TM%P", Desc: "Memory Proximity %", Platform: "All"}, {Key: "TM%S", Desc: "Memory Slot %", Platform: "All"}, {Key: "TM%V", Desc: "Memory Virtual %", Platform: "All"}, {Key: "TW%P", Desc: "Airport %", Platform: "All"}, {Key: "TW%S", Desc: "Airport Sensor %", Platform: "All"}, {Key: "TL%P", Desc: "Display Proximity %", Platform: "All"}, {Key: "TI%P", Desc: "Thunderbolt %", Platform: "All"}, {Key: "TH%A", Desc: "Disk % (A)", Platform: "All"}, {Key: "TH%B", Desc: "Disk % (B)", Platform: "All"}, {Key: "TH%C", Desc: "Disk % (C)", Platform: "All"}, {Key: "TTLD", Desc: "Thunderbolt Left", Platform: "All"}, {Key: "TTRD", Desc: "Thunderbolt Right", Platform: "All"}, {Key: "TN%D", Desc: "Northbridge Diode %", Platform: "All"}, {Key: "TN%H", Desc: "Northbridge Heatsink %", Platform: "All"}, {Key: "TN%P", Desc: "Northbridge Proximity %", Platform: "All"}, {Key: "TB%T", Desc: "Battery %", Platform: "All"}, {Key: "TB%S", Desc: "Battery Sensor %", Platform: "All"}, {Key: "TD%P", Desc: "Thermal Diode %", Platform: "All"}, {Key: "TH%F", Desc: "Drive Bay Front %", Platform: "All"}, {Key: "TH%V", Desc: "Drive Bay SATA %", Platform: "All"}, {Key: "TH%P", Desc: "Drive Bay Proximity %", Platform: "All"}, {Key: "TA%D", Desc: "Ambient Diode %v", Platform: "All"}, {Key: "TA%E", Desc: "Ambient Enclosure %v", Platform: "All"}, {Key: "TA%P", Desc: "Ambient Front %v", Platform: "All"}, {Key: "TA%S", Desc: "Ambient Sensor %v", Platform: "All"}, {Key: "TA%T", Desc: "Ambient Top %v", Platform: "All"}, {Key: "TA%V", Desc: "Ambient Air %v", Platform: "All"}, {Key: "TN%D", Desc: "Northbridge Diode %", Platform: "All"}, {Key: "TN%H", Desc: "Northbridge Heatsink %", Platform: "All"}, {Key: "TN%P", Desc: "Northbridge Proximity %", Platform: "All"}, {Key: "TN%S", Desc: "Northbridge Sensor %", Platform: "All"}, {Key: "TV%R", Desc: "Voltage Regulator %", Platform: "All"}, {Key: "TH%a", Desc: "NVME % (A)", Platform: "All"}, {Key: "TH%b", Desc: "NVME % (B)", Platform: "All"}, {Key: "TH%c", Desc: "NVME % (C)", Platform: "All"}, {Key: "TPMP", Desc: "Power Management Proximity", Platform: "All"}, {Key: "TPSP", Desc: "Power Supply Proximity", Platform: "All"}, {Key: "TIOP", Desc: "IO Processor", Platform: "All"}, {Key: "TSCD", Desc: "System Controller", Platform: "All"}, {Key: "TSDD", Desc: "System Disk Diode", Platform: "All"}, {Key: "TCHP", Desc: "CPU Heatpipe", Platform: "All"}, {Key: "TMVR", Desc: "Memory Voltage Regulator", Platform: "All"}, {Key: "TT%D", Desc: "Thunderbolt Diode %", Platform: "All"}, {Key: "TIED", Desc: "Embedded Device", Platform: "All"}, {Key: "Th%H", Desc: "Heatpipe %", Platform: "Intel"}, {Key: "TCGC", Desc: "GPU Intel Graphics", Platform: "Intel"}, {Key: "TCSA", Desc: "System Agent", Platform: "Intel"}, {Key: "TCSC", Desc: "System Cluster", Platform: "Intel"}, {Key: "Tp%P", Desc: "Powerboard %", Platform: "Intel"}, {Key: "TG%G", Desc: "GPU %", Platform: "Intel"}, {Key: "THTG", Desc: "Thermal Group Target", Platform: "Intel"}, {Key: "TPSD", Desc: "PCH SD", Platform: "Intel"}, {Key: "TTTD", Desc: "Thunderbolt TD", Platform: "Intel"}, {Key: "TTXD", Desc: "Thunderbolt XD", Platform: "Intel"}, {Key: "Te%F", Desc: "PCIe Slot % Front", Platform: "Intel"}, {Key: "Te%S", Desc: "PCIe Slot % Side", Platform: "Intel"}, {Key: "Te%T", Desc: "PCIe Slot % Bottom", Platform: "Intel"}, {Key: "Te%P", Desc: "PCIe Slot % Ambient", Platform: "Intel"}, {Key: "Tp%C", Desc: "Power Supply %", Platform: "Intel"}, {Key: "Tp%D", Desc: "Power Supply Diode %", Platform: "Intel"}, {Key: "Tp%P", Desc: "Power Supply Proximity %", Platform: "Intel"}, {Key: "TaLP", Desc: "Airflow Left", Platform: "Apple"}, {Key: "TaRF", Desc: "Airflow Right", Platform: "Apple"}, {Key: "TH0x", Desc: "NAND", Platform: "Apple"}, {Key: "TaLT", Desc: "Thunderbolt Left Proximity", Platform: "Apple"}, {Key: "TaRT", Desc: "Thunderbolt Right Proximity", Platform: "Apple"}, {Key: "TaLW", Desc: "Airflow Left Wall", Platform: "Apple"}, {Key: "TaRW", Desc: "Airflow Right Wall", Platform: "Apple"}, {Key: "TaFL", Desc: "Airflow Front Left", Platform: "Apple"}, {Key: "TaFR", Desc: "Airflow Front Right", Platform: "Apple"}, {Key: "TaRL", Desc: "Airflow Rear Left", Platform: "Apple"}, {Key: "TaRR", Desc: "Airflow Rear Right", Platform: "Apple"}, {Key: "TAOL", Desc: "Ambient Outside Lid", Platform: "Apple"}, {Key: "TaTP", Desc: "Ambient Top Proximity", Platform: "Apple"}, {Key: "TS0P", Desc: "SSD Proximity 1", Platform: "Apple"}, {Key: "TS1P", Desc: "SSD Proximity 2", Platform: "Apple"}, {Key: "TSVR", Desc: "SoC Regulator V", Platform: "Apple"}, {Key: "TSWR", Desc: "SoC Regulator W", Platform: "Apple"}, {Key: "TSXR", Desc: "SoC Regulator X", Platform: "Apple"}, {Key: "TSG1", Desc: "Sensor Group 1", Platform: "Apple"}, {Key: "TSG2", Desc: "Sensor Group 2", Platform: "Apple"}, {Key: "TCMz", Desc: "CPU Die Max", Platform: "Apple"}, {Key: "TCMb", Desc: "CPU Die Average", Platform: "Apple"}, {Key: "TVD%", Desc: "Virtual Die %", Platform: "Apple"}, {Key: "TVMR", Desc: "Virtual Memory", Platform: "Apple"}, {Key: "TVMr", Desc: "Virtual Memory r", Platform: "Apple"}, {Key: "TVmS", Desc: "Virtual Memory Summary", Platform: "Apple"}, {Key: "TVms", Desc: "Virtual Memory Summary", Platform: "Apple"}, {Key: "TVA%", Desc: "Virtual Ambient %", Platform: "Apple"}, {Key: "TVS%", Desc: "Virtual Sensor %", Platform: "Apple"}, {Key: "TVSx", Desc: "Virtual Sensor x", Platform: "Apple"}, {Key: "TPD%", Desc: "Power Delivery IC %", Platform: "Apple"}, {Key: "TPDX", Desc: "Power Delivery IC Max", Platform: "Apple"}, {Key: "TPDA", Desc: "Power Delivery IC 11", Platform: "Apple"}, {Key: "TPDB", Desc: "Power Delivery IC 12", Platform: "Apple"}, {Key: "TPDC", Desc: "Power Delivery IC 13", Platform: "Apple"}, {Key: "TPDD", Desc: "Power Delivery IC 14", Platform: "Apple"}, {Key: "TPDE", Desc: "Power Delivery IC 15", Platform: "Apple"}, {Key: "TPDF", Desc: "Power Delivery IC 16", Platform: "Apple"}, {Key: "TPDa", Desc: "Power Delivery IC 17", Platform: "Apple"}, {Key: "TPDb", Desc: "Power Delivery IC 18", Platform: "Apple"}, {Key: "TPDc", Desc: "Power Delivery IC 19", Platform: "Apple"}, {Key: "TPDd", Desc: "Power Delivery IC 20", Platform: "Apple"}, {Key: "TPDe", Desc: "Power Delivery IC 21", Platform: "Apple"}, {Key: "TPDf", Desc: "Power Delivery IC 22", Platform: "Apple"}, {Key: "TPDg", Desc: "Power Delivery IC 23", Platform: "Apple"}, {Key: "TPDh", Desc: "Power Delivery IC 24", Platform: "Apple"}, {Key: "TPDi", Desc: "Power Delivery IC 25", Platform: "Apple"}, {Key: "TPDj", Desc: "Power Delivery IC 26", Platform: "Apple"}, {Key: "TRD%", Desc: "RF Delivery %", Platform: "Apple"}, {Key: "TRDX", Desc: "RF Delivery Max", Platform: "Apple"}, {Key: "TRDa", Desc: "RF Delivery 11", Platform: "Apple"}, {Key: "TRDb", Desc: "RF Delivery 12", Platform: "Apple"}, {Key: "TRDc", Desc: "RF Delivery 13", Platform: "Apple"}, {Key: "TRDd", Desc: "RF Delivery 14", Platform: "Apple"}, {Key: "TRDe", Desc: "RF Delivery 15", Platform: "Apple"}, {Key: "TRDf", Desc: "RF Delivery 16", Platform: "Apple"}, {Key: "TRDg", Desc: "RF Delivery 17", Platform: "Apple"}, {Key: "TRDh", Desc: "RF Delivery 18", Platform: "Apple"}, {Key: "TRDi", Desc: "RF Delivery 19", Platform: "Apple"}, {Key: "TRDj", Desc: "RF Delivery 20", Platform: "Apple"}, {Key: "TR0Z", Desc: "RF Reference", Platform: "All"}, {Key: "TR1d", Desc: "RF Probe 1", Platform: "All"}, {Key: "TR2d", Desc: "RF Probe 2", Platform: "All"}, {Key: "TR3d", Desc: "RF Probe 3", Platform: "All"}, {Key: "TR4d", Desc: "RF Probe 4", Platform: "All"}, {Key: "TR5d", Desc: "RF Probe 5", Platform: "All"}, {Key: "TD0%", Desc: "SoC Thermal Diode Cluster 1 Probe %", Platform: "Apple"}, {Key: "TD1%", Desc: "SoC Thermal Diode Cluster 2 Probe %", Platform: "Apple"}, {Key: "TD2%", Desc: "SoC Thermal Diode Cluster 3 Probe %", Platform: "Apple"}, {Key: "TDBP", Desc: "Board Diode Battery Proximity", Platform: "Apple"}, {Key: "TDEL", Desc: "Board Diode Edge Left", Platform: "Apple"}, {Key: "TDER", Desc: "Board Diode Edge Right", Platform: "Apple"}, {Key: "TDeL", Desc: "Board Diode edge Left", Platform: "Apple"}, {Key: "TDeR", Desc: "Board Diode edge Right", Platform: "Apple"}, {Key: "TDTP", Desc: "Board Diode Top Proximity", Platform: "Apple"}, {Key: "TDTC", Desc: "Board Diode Top Center", Platform: "Apple"}, {Key: "TDCR", Desc: "Board Diode Center Right", Platform: "Apple"}, {Key: "TDEC", Desc: "Board Diode Edge Center", Platform: "Apple"}, {Key: "TDVx", Desc: "Board Diode Virtual", Platform: "Apple"}, {Key: "Th00", Desc: "SoC Heatsink 1", Platform: "Apple"}, {Key: "Th01", Desc: "SoC Heatsink 1", Platform: "Apple"}, {Key: "Th02", Desc: "SoC Heatsink 1", Platform: "Apple"}, {Key: "Th04", Desc: "SoC Heatsink 2", Platform: "Apple"}, {Key: "Th05", Desc: "SoC Heatsink 2", Platform: "Apple"}, {Key: "Th06", Desc: "SoC Heatsink 2", Platform: "Apple"}, {Key: "Th08", Desc: "SoC Heatsink 3", Platform: "Apple"}, {Key: "Th09", Desc: "SoC Heatsink 3", Platform: "Apple"}, {Key: "Th0A", Desc: "SoC Heatsink 3", Platform: "Apple"}, {Key: "Th0C", Desc: "SoC Heatsink 4", Platform: "Apple"}, {Key: "Th0D", Desc: "SoC Heatsink 4", Platform: "Apple"}, {Key: "Th0E", Desc: "SoC Heatsink 4", Platform: "Apple"}, {Key: "Th0G", Desc: "SoC Heatsink 5", Platform: "Apple"}, {Key: "Th0H", Desc: "SoC Heatsink 5", Platform: "Apple"}, {Key: "Th0I", Desc: "SoC Heatsink 5", Platform: "Apple"}, {Key: "Th0K", Desc: "SoC Heatsink 6", Platform: "Apple"}, {Key: "Th0L", Desc: "SoC Heatsink 6", Platform: "Apple"}, {Key: "Th0M", Desc: "SoC Heatsink 6", Platform: "Apple"}, {Key: "Th20", Desc: "SoC Heatsink Die 2 1", Platform: "Apple"}, {Key: "Th21", Desc: "SoC Heatsink Die 2 1", Platform: "Apple"}, {Key: "Th22", Desc: "SoC Heatsink Die 2 1", Platform: "Apple"}, {Key: "Th24", Desc: "SoC Heatsink Die 2 2", Platform: "Apple"}, {Key: "Th25", Desc: "SoC Heatsink Die 2 2", Platform: "Apple"}, {Key: "Th26", Desc: "SoC Heatsink Die 2 2", Platform: "Apple"}, {Key: "Th28", Desc: "SoC Heatsink Die 2 3", Platform: "Apple"}, {Key: "Th29", Desc: "SoC Heatsink Die 2 3", Platform: "Apple"}, {Key: "Th2A", Desc: "SoC Heatsink Die 2 3", Platform: "Apple"}, {Key: "Th2C", Desc: "SoC Heatsink Die 2 4", Platform: "Apple"}, {Key: "Th2D", Desc: "SoC Heatsink Die 2 4", Platform: "Apple"}, {Key: "Th2E", Desc: "SoC Heatsink Die 2 4", Platform: "Apple"}, {Key: "Th2G", Desc: "SoC Heatsink Die 2 5", Platform: "Apple"}, {Key: "Th2H", Desc: "SoC Heatsink Die 2 5", Platform: "Apple"}, {Key: "Th2I", Desc: "SoC Heatsink Die 2 5", Platform: "Apple"}, {Key: "Tp08", Desc: "CPU Efficiency Core 1", Platform: "M1"}, {Key: "Tp09", Desc: "CPU Efficiency Core 1", Platform: "M1"}, {Key: "Tp0A", Desc: "CPU Efficiency Core 1", Platform: "M1"}, {Key: "Tp0S", Desc: "CPU Efficiency Core 2", Platform: "M1"}, {Key: "Tp0T", Desc: "CPU Efficiency Core 2", Platform: "M1"}, {Key: "Tp0U", Desc: "CPU Efficiency Core 2", Platform: "M1"}, {Key: "Tp00", Desc: "CPU Performance Core 1", Platform: "M1"}, {Key: "Tp01", Desc: "CPU Performance Core 1", Platform: "M1"}, {Key: "Tp02", Desc: "CPU Performance Core 1", Platform: "M1"}, {Key: "Tp04", Desc: "CPU Performance Core 2", Platform: "M1"}, {Key: "Tp05", Desc: "CPU Performance Core 2", Platform: "M1"}, {Key: "Tp06", Desc: "CPU Performance Core 2", Platform: "M1"}, {Key: "Tp0C", Desc: "CPU Performance Core 3", Platform: "M1"}, {Key: "Tp0D", Desc: "CPU Performance Core 3", Platform: "M1"}, {Key: "Tp0E", Desc: "CPU Performance Core 3", Platform: "M1"}, {Key: "Tp0G", Desc: "CPU Performance Core 4", Platform: "M1"}, {Key: "Tp0H", Desc: "CPU Performance Core 4", Platform: "M1"}, {Key: "Tp0I", Desc: "CPU Performance Core 4", Platform: "M1"}, {Key: "Tp0K", Desc: "CPU Performance Core 5", Platform: "M1"}, {Key: "Tp0L", Desc: "CPU Performance Core 5", Platform: "M1"}, {Key: "Tp0M", Desc: "CPU Performance Core 5", Platform: "M1"}, {Key: "Tp0O", Desc: "CPU Performance Core 6", Platform: "M1"}, {Key: "Tp0P", Desc: "CPU Performance Core 6", Platform: "M1"}, {Key: "Tp0Q", Desc: "CPU Performance Core 6", Platform: "M1"}, {Key: "Tp0W", Desc: "CPU Performance Core 7", Platform: "M1"}, {Key: "Tp0X", Desc: "CPU Performance Core 7", Platform: "M1"}, {Key: "Tp0Y", Desc: "CPU Performance Core 7", Platform: "M1"}, {Key: "Tp0a", Desc: "CPU Performance Core 8", Platform: "M1"}, {Key: "Tp0b", Desc: "CPU Performance Core 8", Platform: "M1"}, {Key: "Tp0c", Desc: "CPU Performance Core 8", Platform: "M1"}, {Key: "Tp28", Desc: "CPU Efficiency Core 3", Platform: "M1"}, {Key: "Tp29", Desc: "CPU Efficiency Core 3", Platform: "M1"}, {Key: "Tp2A", Desc: "CPU Efficiency Core 3", Platform: "M1"}, {Key: "Tp2S", Desc: "CPU Efficiency Core 4", Platform: "M1"}, {Key: "Tp2T", Desc: "CPU Efficiency Core 4", Platform: "M1"}, {Key: "Tp2U", Desc: "CPU Efficiency Core 4", Platform: "M1"}, {Key: "Tp20", Desc: "CPU Performance Core 9", Platform: "M1"}, {Key: "Tp21", Desc: "CPU Performance Core 9", Platform: "M1"}, {Key: "Tp22", Desc: "CPU Performance Core 9", Platform: "M1"}, {Key: "Tp24", Desc: "CPU Performance Core 10", Platform: "M1"}, {Key: "Tp25", Desc: "CPU Performance Core 10", Platform: "M1"}, {Key: "Tp26", Desc: "CPU Performance Core 10", Platform: "M1"}, {Key: "Tp2C", Desc: "CPU Performance Core 11", Platform: "M1"}, {Key: "Tp2D", Desc: "CPU Performance Core 11", Platform: "M1"}, {Key: "Tp2E", Desc: "CPU Performance Core 11", Platform: "M1"}, {Key: "Tp2G", Desc: "CPU Performance Core 12", Platform: "M1"}, {Key: "Tp2H", Desc: "CPU Performance Core 12", Platform: "M1"}, {Key: "Tp2I", Desc: "CPU Performance Core 12", Platform: "M1"}, {Key: "Tp2K", Desc: "CPU Performance Core 13", Platform: "M1"}, {Key: "Tp2L", Desc: "CPU Performance Core 13", Platform: "M1"}, {Key: "Tp2M", Desc: "CPU Performance Core 13", Platform: "M1"}, {Key: "Tp2O", Desc: "CPU Performance Core 14", Platform: "M1"}, {Key: "Tp2P", Desc: "CPU Performance Core 14", Platform: "M1"}, {Key: "Tp2Q", Desc: "CPU Performance Core 14", Platform: "M1"}, {Key: "Tp2W", Desc: "CPU Performance Core 15", Platform: "M1"}, {Key: "Tp2X", Desc: "CPU Performance Core 15", Platform: "M1"}, {Key: "Tp2Y", Desc: "CPU Performance Core 15", Platform: "M1"}, {Key: "Tp2a", Desc: "CPU Performance Core 16", Platform: "M1"}, {Key: "Tp2b", Desc: "CPU Performance Core 16", Platform: "M1"}, {Key: "Tp2c", Desc: "CPU Performance Core 16", Platform: "M1"}, {Key: "Tg04", Desc: "GPU 1", Platform: "M1"}, {Key: "Tg05", Desc: "GPU 1", Platform: "M1"}, {Key: "Tg0C", Desc: "GPU 2", Platform: "M1"}, {Key: "Tg0D", Desc: "GPU 2", Platform: "M1"}, {Key: "Tg0K", Desc: "GPU 3", Platform: "M1"}, {Key: "Tg0L", Desc: "GPU 3", Platform: "M1"}, {Key: "Tg0S", Desc: "GPU 4", Platform: "M1"}, {Key: "Tg0T", Desc: "GPU 4", Platform: "M1"}, {Key: "Tg0a", Desc: "GPU 5", Platform: "M1"}, {Key: "Tg0b", Desc: "GPU 5", Platform: "M1"}, {Key: "Tg0i", Desc: "GPU 6", Platform: "M1"}, {Key: "Tg0j", Desc: "GPU 6", Platform: "M1"}, {Key: "Tg0q", Desc: "GPU 7", Platform: "M1"}, {Key: "Tg0r", Desc: "GPU 7", Platform: "M1"}, {Key: "Tg0y", Desc: "GPU 8", Platform: "M1"}, {Key: "Tg0z", Desc: "GPU 8", Platform: "M1"}, {Key: "Tm00", Desc: "Memory 1", Platform: "M1"}, {Key: "Tm01", Desc: "Memory 1", Platform: "M1"}, {Key: "Tm02", Desc: "Memory 1", Platform: "M1"}, {Key: "Tm04", Desc: "Memory 2", Platform: "M1"}, {Key: "Tm05", Desc: "Memory 2", Platform: "M1"}, {Key: "Tm06", Desc: "Memory 2", Platform: "M1"}, {Key: "Tm08", Desc: "Memory 3", Platform: "M1"}, {Key: "Tm09", Desc: "Memory 3", Platform: "M1"}, {Key: "Tm0A", Desc: "Memory 3", Platform: "M1"}, {Key: "Tm0C", Desc: "Memory 4", Platform: "M1"}, {Key: "Tm0D", Desc: "Memory 4", Platform: "M1"}, {Key: "Tm0E", Desc: "Memory 4", Platform: "M1"}, {Key: "Te00", Desc: "CPU Die 1", Platform: "M1"}, {Key: "Te01", Desc: "CPU Die 2", Platform: "M1"}, {Key: "Te02", Desc: "CPU Die 3", Platform: "M1"}, {Key: "Te20", Desc: "CPU Die 4", Platform: "M1"}, {Key: "Te21", Desc: "CPU Die 5", Platform: "M1"}, {Key: "Ts00", Desc: "SSD 1", Platform: "M1"}, {Key: "Ts01", Desc: "SSD 1", Platform: "M1"}, {Key: "Ts02", Desc: "SSD 1", Platform: "M1"}, {Key: "Ts04", Desc: "SSD 2", Platform: "M1"}, {Key: "Ts05", Desc: "SSD 2", Platform: "M1"}, {Key: "Ts06", Desc: "SSD 2", Platform: "M1"}, {Key: "Ts0P", Desc: "SSD Controller", Platform: "M1"}, {Key: "Ts1P", Desc: "SSD Controller", Platform: "M1"}, {Key: "Ts20", Desc: "SSD 3", Platform: "M1"}, {Key: "Ts21", Desc: "SSD 3", Platform: "M1"}, {Key: "Ts22", Desc: "SSD 3", Platform: "M1"}, {Key: "Ts24", Desc: "SSD 4", Platform: "M1"}, {Key: "Ts25", Desc: "SSD 4", Platform: "M1"}, {Key: "Ts26", Desc: "SSD 4", Platform: "M1"}, {Key: "TpD%", Desc: "Power Delivery IC Die 2 %", Platform: "M1"}, {Key: "TpDX", Desc: "Power Delivery IC Die 2 Max", Platform: "M1"}, {Key: "TpDa", Desc: "Power Delivery IC Die 2 11", Platform: "M1"}, {Key: "TpDb", Desc: "Power Delivery IC Die 2 12", Platform: "M1"}, {Key: "TpDc", Desc: "Power Delivery IC Die 2 13", Platform: "M1"}, {Key: "TpDd", Desc: "Power Delivery IC Die 2 14", Platform: "M1"}, {Key: "TpDe", Desc: "Power Delivery IC Die 2 15", Platform: "M1"}, {Key: "TpDf", Desc: "Power Delivery IC Die 2 16", Platform: "M1"}, {Key: "TpDg", Desc: "Power Delivery IC Die 2 17", Platform: "M1"}, {Key: "TpDh", Desc: "Power Delivery IC Die 2 18", Platform: "M1"}, {Key: "TpDi", Desc: "Power Delivery IC Die 2 19", Platform: "M1"}, {Key: "TpDj", Desc: "Power Delivery IC Die 2 20", Platform: "M1"}, {Key: "TrD%", Desc: "RF Delivery Die 2 %", Platform: "M1"}, {Key: "TrDX", Desc: "RF Delivery Die 2 Max", Platform: "M1"}, {Key: "TrDa", Desc: "RF Delivery Die 2 11", Platform: "M1"}, {Key: "TrDb", Desc: "RF Delivery Die 2 12", Platform: "M1"}, {Key: "TrDc", Desc: "RF Delivery Die 2 13", Platform: "M1"}, {Key: "TrDd", Desc: "RF Delivery Die 2 14", Platform: "M1"}, {Key: "TrDe", Desc: "RF Delivery Die 2 15", Platform: "M1"}, {Key: "TrDf", Desc: "RF Delivery Die 2 16", Platform: "M1"}, {Key: "TrDg", Desc: "RF Delivery Die 2 17", Platform: "M1"}, {Key: "TrDh", Desc: "RF Delivery Die 2 18", Platform: "M1"}, {Key: "TrDi", Desc: "RF Delivery Die 2 19", Platform: "M1"}, {Key: "TrDj", Desc: "RF Delivery Die 2 20", Platform: "M1"}, {Key: "TPVD", Desc: "Power Probe Voltage Diode", Platform: "M1"}, {Key: "Tp00", Desc: "CPU Performance Core 1", Platform: "M2"}, {Key: "Tp01", Desc: "CPU Performance Core 1", Platform: "M2"}, {Key: "Tp02", Desc: "CPU Performance Core 1", Platform: "M2"}, {Key: "Tp04", Desc: "CPU Performance Core 2", Platform: "M2"}, {Key: "Tp05", Desc: "CPU Performance Core 2", Platform: "M2"}, {Key: "Tp06", Desc: "CPU Performance Core 2", Platform: "M2"}, {Key: "Tp08", Desc: "CPU Performance Core 3", Platform: "M2"}, {Key: "Tp09", Desc: "CPU Performance Core 3", Platform: "M2"}, {Key: "Tp0A", Desc: "CPU Performance Core 3", Platform: "M2"}, {Key: "Tp0C", Desc: "CPU Performance Core 4", Platform: "M2"}, {Key: "Tp0D", Desc: "CPU Performance Core 4", Platform: "M2"}, {Key: "Tp0E", Desc: "CPU Performance Core 4", Platform: "M2"}, {Key: "Tp0e", Desc: "CPU Performance Core 5", Platform: "M2"}, {Key: "Tp0f", Desc: "CPU Performance Core 5", Platform: "M2"}, {Key: "Tp0g", Desc: "CPU Performance Core 5", Platform: "M2"}, {Key: "Tp0i", Desc: "CPU Performance Core 6", Platform: "M2"}, {Key: "Tp0j", Desc: "CPU Performance Core 6", Platform: "M2"}, {Key: "Tp0k", Desc: "CPU Performance Core 6", Platform: "M2"}, {Key: "Tp0m", Desc: "CPU Performance Core 7", Platform: "M2"}, {Key: "Tp0n", Desc: "CPU Performance Core 7", Platform: "M2"}, {Key: "Tp0o", Desc: "CPU Performance Core 7", Platform: "M2"}, {Key: "Tp0q", Desc: "CPU Performance Core 8", Platform: "M2"}, {Key: "Tp0r", Desc: "CPU Performance Core 8", Platform: "M2"}, {Key: "Tp0s", Desc: "CPU Performance Core 8", Platform: "M2"}, {Key: "Tp0a", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M2"}, {Key: "Tp0b", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M2"}, {Key: "Tp0c", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M2"}, {Key: "Te04", Desc: "CPU Efficiency Cluster Aggregate 1", Platform: "M2"}, {Key: "Te05", Desc: "CPU Efficiency Cluster Aggregate 1", Platform: "M2"}, {Key: "Te06", Desc: "CPU Efficiency Cluster Aggregate 1", Platform: "M2"}, {Key: "Tg0e", Desc: "GPU 1", Platform: "M2"}, {Key: "Tg0f", Desc: "GPU 1", Platform: "M2"}, {Key: "Tg0m", Desc: "GPU 2", Platform: "M2"}, {Key: "Tg0n", Desc: "GPU 2", Platform: "M2"}, {Key: "Tg0q", Desc: "GPU 3", Platform: "M2"}, {Key: "Tg0r", Desc: "GPU 3", Platform: "M2"}, {Key: "Ts0K", Desc: "SSD 1", Platform: "M2"}, {Key: "Ts0L", Desc: "SSD 1", Platform: "M2"}, {Key: "Ts0M", Desc: "SSD 1", Platform: "M2"}, {Key: "Ts0O", Desc: "SSD 2", Platform: "M2"}, {Key: "Ts0P", Desc: "SSD 2", Platform: "M2"}, {Key: "Ts0Q", Desc: "SSD 2", Platform: "M2"}, {Key: "Ts0S", Desc: "SSD 3", Platform: "M2"}, {Key: "Ts0T", Desc: "SSD 3", Platform: "M2"}, {Key: "Ts0U", Desc: "SSD 3", Platform: "M2"}, {Key: "Ts0W", Desc: "SSD 4", Platform: "M2"}, {Key: "Ts0X", Desc: "SSD 4", Platform: "M2"}, {Key: "Ts0Y", Desc: "SSD 4", Platform: "M2"}, {Key: "Ts0a", Desc: "SSD 5", Platform: "M2"}, {Key: "Ts0b", Desc: "SSD 5", Platform: "M2"}, {Key: "Ts0c", Desc: "SSD 5", Platform: "M2"}, {Key: "Ts1P", Desc: "SSD Controller", Platform: "M2"}, {Key: "TsOP", Desc: "SSD Controller", Platform: "M2"}, {Key: "Te04", Desc: "CPU Efficiency Core 1", Platform: "M3"}, {Key: "Te05", Desc: "CPU Efficiency Core 1", Platform: "M3"}, {Key: "Te06", Desc: "CPU Efficiency Core 1", Platform: "M3"}, {Key: "Te0G", Desc: "CPU Efficiency Core 2", Platform: "M3"}, {Key: "Te0H", Desc: "CPU Efficiency Core 2", Platform: "M3"}, {Key: "Te0I", Desc: "CPU Efficiency Core 2", Platform: "M3"}, {Key: "Te0P", Desc: "CPU Efficiency Core 3", Platform: "M3"}, {Key: "Te0Q", Desc: "CPU Efficiency Core 3", Platform: "M3"}, {Key: "Te0R", Desc: "CPU Efficiency Core 4", Platform: "M3"}, {Key: "Te0S", Desc: "CPU Efficiency Core 4", Platform: "M3"}, {Key: "Te0T", Desc: "CPU Efficiency Core 4", Platform: "M3"}, {Key: "Te0U", Desc: "CPU Efficiency Core 5", Platform: "M3"}, {Key: "Te0K", Desc: "CPU Efficiency Core 6", Platform: "M3"}, {Key: "Te0L", Desc: "CPU Efficiency Core 6", Platform: "M3"}, {Key: "Te0M", Desc: "CPU Efficiency Core 6", Platform: "M3"}, {Key: "Tp04", Desc: "CPU Performance Core 1", Platform: "M3"}, {Key: "Tp05", Desc: "CPU Performance Core 1", Platform: "M3"}, {Key: "Tp06", Desc: "CPU Performance Core 1", Platform: "M3"}, {Key: "Tp0C", Desc: "CPU Performance Core 2", Platform: "M3"}, {Key: "Tp0D", Desc: "CPU Performance Core 2", Platform: "M3"}, {Key: "Tp0E", Desc: "CPU Performance Core 2", Platform: "M3"}, {Key: "Tp0K", Desc: "CPU Performance Core 3", Platform: "M3"}, {Key: "Tp0L", Desc: "CPU Performance Core 3", Platform: "M3"}, {Key: "Tp0M", Desc: "CPU Performance Core 3", Platform: "M3"}, {Key: "Tp0a", Desc: "CPU Performance Core 4", Platform: "M3"}, {Key: "Tp0b", Desc: "CPU Performance Core 4", Platform: "M3"}, {Key: "Tp0c", Desc: "CPU Performance Core 4", Platform: "M3"}, {Key: "Tp0g", Desc: "CPU Performance Core 5", Platform: "M3"}, {Key: "Tp0h", Desc: "CPU Performance Core 5", Platform: "M3"}, {Key: "Tp0i", Desc: "CPU Performance Core 5", Platform: "M3"}, {Key: "Tp0m", Desc: "CPU Performance Core 6", Platform: "M3"}, {Key: "Tp0n", Desc: "CPU Performance Core 6", Platform: "M3"}, {Key: "Tp0o", Desc: "CPU Performance Core 6", Platform: "M3"}, {Key: "Tp1E", Desc: "CPU Performance Core 7", Platform: "M3"}, {Key: "Tp1F", Desc: "CPU Performance Core 7", Platform: "M3"}, {Key: "Tp1G", Desc: "CPU Performance Core 7", Platform: "M3"}, {Key: "Tp1Q", Desc: "CPU Performance Core 8", Platform: "M3"}, {Key: "Tp1R", Desc: "CPU Performance Core 8", Platform: "M3"}, {Key: "Tp1S", Desc: "CPU Performance Core 8", Platform: "M3"}, {Key: "Tp0R", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp0S", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp0T", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp0U", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp0V", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp0W", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp3O", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp3P", Desc: "CPU Performance Cluster 1", Platform: "M3"}, {Key: "Tp1I", Desc: "CPU Performance Cluster 2", Platform: "M3"}, {Key: "Tp1J", Desc: "CPU Performance Cluster 2", Platform: "M3"}, {Key: "Tp1K", Desc: "CPU Performance Cluster 2", Platform: "M3"}, {Key: "Tp3W", Desc: "CPU Performance Cluster 2", Platform: "M3"}, {Key: "Tp3X", Desc: "CPU Performance Cluster 2", Platform: "M3"}, {Key: "Tp0y", Desc: "CPU Performance Core 9", Platform: "M3"}, {Key: "Tp0z", Desc: "CPU Performance Core 9", Platform: "M3"}, {Key: "Tp10", Desc: "CPU Performance Core 9", Platform: "M3"}, {Key: "Tp16", Desc: "CPU Performance Cluster 3", Platform: "M3"}, {Key: "Tp17", Desc: "CPU Performance Cluster 3", Platform: "M3"}, {Key: "Tp18", Desc: "CPU Performance Cluster 3", Platform: "M3"}, {Key: "Tp3S", Desc: "CPU Performance Cluster 3", Platform: "M3"}, {Key: "Tp3T", Desc: "CPU Performance Cluster 3", Platform: "M3"}, {Key: "Tf04", Desc: "GPU Fabric Block 0", Platform: "M3"}, {Key: "Tf0D", Desc: "GPU Fabric Block 0", Platform: "M3"}, {Key: "Tf0E", Desc: "GPU Fabric Block 0", Platform: "M3"}, {Key: "Tf05", Desc: "GPU Fabric Block 0 Min", Platform: "M3"}, {Key: "Tf06", Desc: "GPU Fabric Block 0 Max", Platform: "M3"}, {Key: "Tf08", Desc: "GPU Fabric Block 0 Probe 1", Platform: "M3"}, {Key: "Tf09", Desc: "GPU Fabric Block 0 Probe 2", Platform: "M3"}, {Key: "Tf0A", Desc: "GPU Fabric Block 0 Probe 3", Platform: "M3"}, {Key: "Tf0B", Desc: "GPU Fabric Block 0 Probe 4", Platform: "M3"}, {Key: "Tf14", Desc: "GPU Fabric Block 1", Platform: "M3"}, {Key: "Tf1D", Desc: "GPU Fabric Block 1", Platform: "M3"}, {Key: "Tf1E", Desc: "GPU Fabric Block 1", Platform: "M3"}, {Key: "Tf15", Desc: "GPU Fabric Block 1 Min", Platform: "M3"}, {Key: "Tf16", Desc: "GPU Fabric Block 1 Max", Platform: "M3"}, {Key: "Tf18", Desc: "GPU Fabric Block 1 Probe 1", Platform: "M3"}, {Key: "Tf19", Desc: "GPU Fabric Block 1 Probe 2", Platform: "M3"}, {Key: "Tf1A", Desc: "GPU Fabric Block 1 Probe 3", Platform: "M3"}, {Key: "Tf1B", Desc: "GPU Fabric Block 1 Probe 4", Platform: "M3"}, {Key: "Tf24", Desc: "GPU Fabric Block 2", Platform: "M3"}, {Key: "Tf2D", Desc: "GPU Fabric Block 2", Platform: "M3"}, {Key: "Tf2E", Desc: "GPU Fabric Block 2", Platform: "M3"}, {Key: "Tf25", Desc: "GPU Fabric Block 2 Min", Platform: "M3"}, {Key: "Tf26", Desc: "GPU Fabric Block 2 Max", Platform: "M3"}, {Key: "Tf28", Desc: "GPU Fabric Block 2 Probe 1", Platform: "M3"}, {Key: "Tf29", Desc: "GPU Fabric Block 2 Probe 2", Platform: "M3"}, {Key: "Tf2A", Desc: "GPU Fabric Block 2 Probe 3", Platform: "M3"}, {Key: "Tf2B", Desc: "GPU Fabric Block 2 Probe 4", Platform: "M3"}, {Key: "Tf34", Desc: "GPU Fabric Block 3", Platform: "M3"}, {Key: "Tf3D", Desc: "GPU Fabric Block 3", Platform: "M3"}, {Key: "Tf3E", Desc: "GPU Fabric Block 3", Platform: "M3"}, {Key: "Tf35", Desc: "GPU Fabric Block 3 Min", Platform: "M3"}, {Key: "Tf36", Desc: "GPU Fabric Block 3 Max", Platform: "M3"}, {Key: "Tf38", Desc: "GPU Fabric Block 3 Probe 1", Platform: "M3"}, {Key: "Tf39", Desc: "GPU Fabric Block 3 Probe 2", Platform: "M3"}, {Key: "Tf3A", Desc: "GPU Fabric Block 3 Probe 3", Platform: "M3"}, {Key: "Tf3B", Desc: "GPU Fabric Block 3 Probe 4", Platform: "M3"}, {Key: "Tf44", Desc: "GPU Fabric Block 4", Platform: "M3"}, {Key: "Tf4D", Desc: "GPU Fabric Block 4", Platform: "M3"}, {Key: "Tf4E", Desc: "GPU Fabric Block 4", Platform: "M3"}, {Key: "Tf45", Desc: "GPU Fabric Block 4 Min", Platform: "M3"}, {Key: "Tf46", Desc: "GPU Fabric Block 4 Max", Platform: "M3"}, {Key: "Tf48", Desc: "GPU Fabric Block 4 Probe 1", Platform: "M3"}, {Key: "Tf49", Desc: "GPU Fabric Block 4 Probe 2", Platform: "M3"}, {Key: "Tf4A", Desc: "GPU Fabric Block 4 Probe 3", Platform: "M3"}, {Key: "Tf4B", Desc: "GPU Fabric Block 4 Probe 4", Platform: "M3"}, {Key: "Tf9F", Desc: "GPU Fabric Aggregate", Platform: "M3"}, {Key: "TfA0", Desc: "GPU Fabric Aggregate Max", Platform: "M3"}, {Key: "Tg04", Desc: "GPU 1", Platform: "M3"}, {Key: "Tg05", Desc: "GPU 1", Platform: "M3"}, {Key: "Tg0C", Desc: "GPU 2", Platform: "M3"}, {Key: "Tg0D", Desc: "GPU 2", Platform: "M3"}, {Key: "Tg0K", Desc: "GPU 3", Platform: "M3"}, {Key: "Tg0L", Desc: "GPU 3", Platform: "M3"}, {Key: "Tg00", Desc: "GPU 4", Platform: "M3"}, {Key: "Tg01", Desc: "GPU 4", Platform: "M3"}, {Key: "Tg0U", Desc: "GPU 5", Platform: "M3"}, {Key: "Tg0u", Desc: "GPU 5", Platform: "M3"}, {Key: "Tg0V", Desc: "GPU 6", Platform: "M3"}, {Key: "Tg0v", Desc: "GPU 6", Platform: "M3"}, {Key: "Tg12", Desc: "GPU 7", Platform: "M3"}, {Key: "Tg13", Desc: "GPU 7", Platform: "M3"}, {Key: "Tg1A", Desc: "GPU 8", Platform: "M3"}, {Key: "Tg1B", Desc: "GPU 8", Platform: "M3"}, {Key: "Tg1k", Desc: "GPU 9", Platform: "M3"}, {Key: "Tg1l", Desc: "GPU 9", Platform: "M3"}, {Key: "Tg0y", Desc: "GPU 10", Platform: "M3"}, {Key: "Tg0z", Desc: "GPU 10", Platform: "M3"}, {Key: "Tg1E", Desc: "GPU 11", Platform: "M3"}, {Key: "Tg1F", Desc: "GPU 11", Platform: "M3"}, {Key: "Tg16", Desc: "GPU 12", Platform: "M3"}, {Key: "Tg17", Desc: "GPU 12", Platform: "M3"}, {Key: "Tg1s", Desc: "GPU 13", Platform: "M3"}, {Key: "Tg1t", Desc: "GPU 13", Platform: "M3"}, {Key: "Tg1x", Desc: "GPU 14", Platform: "M3"}, {Key: "Tg1y", Desc: "GPU 14", Platform: "M3"}, {Key: "Tg21", Desc: "GPU 15", Platform: "M3"}, {Key: "Tg22", Desc: "GPU 15", Platform: "M3"}, {Key: "Tg29", Desc: "GPU 16", Platform: "M3"}, {Key: "Tg2A", Desc: "GPU 16", Platform: "M3"}, {Key: "Tg2H", Desc: "GPU 17", Platform: "M3"}, {Key: "Tg2I", Desc: "GPU 17", Platform: "M3"}, {Key: "Tg33", Desc: "GPU 18", Platform: "M3"}, {Key: "Tg34", Desc: "GPU 18", Platform: "M3"}, {Key: "Tg3B", Desc: "GPU 19", Platform: "M3"}, {Key: "Tg3C", Desc: "GPU 19", Platform: "M3"}, {Key: "Tg3J", Desc: "GPU 20", Platform: "M3"}, {Key: "Tg3K", Desc: "GPU 20", Platform: "M3"}, {Key: "Tg3x", Desc: "GPU 21", Platform: "M3"}, {Key: "Tg3y", Desc: "GPU 21", Platform: "M3"}, {Key: "Ts00", Desc: "SSD 1", Platform: "M3"}, {Key: "Ts01", Desc: "SSD 1", Platform: "M3"}, {Key: "Ts02", Desc: "SSD 1", Platform: "M3"}, {Key: "Ts04", Desc: "SSD 2", Platform: "M3"}, {Key: "Ts05", Desc: "SSD 2", Platform: "M3"}, {Key: "Ts06", Desc: "SSD 2", Platform: "M3"}, {Key: "Ts0C", Desc: "SSD 3", Platform: "M3"}, {Key: "Ts0D", Desc: "SSD 3", Platform: "M3"}, {Key: "Ts0E", Desc: "SSD 3", Platform: "M3"}, {Key: "Ts0K", Desc: "SSD 4", Platform: "M3"}, {Key: "Ts0L", Desc: "SSD 4", Platform: "M3"}, {Key: "Ts0M", Desc: "SSD 4", Platform: "M3"}, {Key: "Ts0R", Desc: "SSD 5", Platform: "M3"}, {Key: "Ts0S", Desc: "SSD 5", Platform: "M3"}, {Key: "Ts0T", Desc: "SSD 5", Platform: "M3"}, {Key: "Ts0U", Desc: "SSD 6", Platform: "M3"}, {Key: "Ts0V", Desc: "SSD 6", Platform: "M3"}, {Key: "Ts0W", Desc: "SSD 6", Platform: "M3"}, {Key: "Ts0Y", Desc: "SSD 7", Platform: "M3"}, {Key: "Ts0Z", Desc: "SSD 7", Platform: "M3"}, {Key: "Ts0a", Desc: "SSD 7", Platform: "M3"}, {Key: "Ts0h", Desc: "SSD 8", Platform: "M3"}, {Key: "Ts0i", Desc: "SSD 8", Platform: "M3"}, {Key: "Ts0P", Desc: "SSD Controller", Platform: "M3"}, {Key: "Ts1P", Desc: "SSD Controller", Platform: "M3"}, {Key: "Te04", Desc: "CPU Efficiency Core 1", Platform: "M4"}, {Key: "Te05", Desc: "CPU Efficiency Core 1", Platform: "M4"}, {Key: "Te06", Desc: "CPU Efficiency Core 1", Platform: "M4"}, {Key: "Te0R", Desc: "CPU Efficiency Core 2", Platform: "M4"}, {Key: "Te0S", Desc: "CPU Efficiency Core 2", Platform: "M4"}, {Key: "Te0T", Desc: "CPU Efficiency Core 2", Platform: "M4"}, {Key: "Te08", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "Te09", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "Te0A", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "Te0G", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "Te0H", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "Te0I", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "Te0U", Desc: "CPU Efficiency Cluster Aggregate 1", Platform: "M4"}, {Key: "Te0V", Desc: "CPU Efficiency Cluster Aggregate 1", Platform: "M4"}, {Key: "Te0W", Desc: "CPU Efficiency Cluster Aggregate 2", Platform: "M4"}, {Key: "Te0X", Desc: "CPU Efficiency Cluster Aggregate 2", Platform: "M4"}, {Key: "Tpx8", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "Tpx9", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "TpxA", Desc: "CPU Efficiency Core 3", Platform: "M4"}, {Key: "TpxB", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "TpxC", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "TpxD", Desc: "CPU Efficiency Core 4", Platform: "M4"}, {Key: "Tex0", Desc: "CPU Efficiency Cluster Die 1", Platform: "M4"}, {Key: "Tex1", Desc: "CPU Efficiency Cluster Die 1", Platform: "M4"}, {Key: "Tex2", Desc: "CPU Efficiency Cluster Die 2", Platform: "M4"}, {Key: "Tex3", Desc: "CPU Efficiency Cluster Die 2", Platform: "M4"}, {Key: "Tp1i", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp1j", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp1k", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp1m", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp1n", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp1o", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp1q", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp1t", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp1u", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp1v", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp1w", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp1x", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp1y", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp1z", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp20", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp21", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp22", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp23", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp24", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp25", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp26", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp27", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp28", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp29", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp2A", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp2B", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp2C", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp2D", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp2E", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp2G", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp00", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp01", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp02", Desc: "CPU Performance Core 1", Platform: "M4"}, {Key: "Tp04", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp05", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp06", Desc: "CPU Performance Core 2", Platform: "M4"}, {Key: "Tp08", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp09", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp0A", Desc: "CPU Performance Core 3", Platform: "M4"}, {Key: "Tp0C", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp0D", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp0E", Desc: "CPU Performance Core 4", Platform: "M4"}, {Key: "Tp0G", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp0H", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp0I", Desc: "CPU Performance Core 5", Platform: "M4"}, {Key: "Tp0K", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp0L", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp0M", Desc: "CPU Performance Core 6", Platform: "M4"}, {Key: "Tp0O", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp0P", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp0Q", Desc: "CPU Performance Core 7", Platform: "M4"}, {Key: "Tp0S", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp0T", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp0U", Desc: "CPU Performance Core 8", Platform: "M4"}, {Key: "Tp0W", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp0X", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp0Y", Desc: "CPU Performance Core 9", Platform: "M4"}, {Key: "Tp0a", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp0b", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp0c", Desc: "CPU Performance Core 10", Platform: "M4"}, {Key: "Tp0d", Desc: "CPU Performance Fabric 1", Platform: "M4"}, {Key: "Tp0e", Desc: "CPU Performance Fabric 1", Platform: "M4"}, {Key: "Tp0f", Desc: "CPU Performance Fabric 1", Platform: "M4"}, {Key: "Tp0g", Desc: "CPU Performance Fabric 2", Platform: "M4"}, {Key: "Tp0i", Desc: "CPU Performance Fabric 2", Platform: "M4"}, {Key: "Tp0k", Desc: "CPU Performance Fabric 2", Platform: "M4"}, {Key: "Tp0l", Desc: "CPU Performance Fabric 3", Platform: "M4"}, {Key: "Tp0m", Desc: "CPU Performance Fabric 3", Platform: "M4"}, {Key: "Tp0n", Desc: "CPU Performance Fabric 3", Platform: "M4"}, {Key: "Tp0o", Desc: "CPU Performance Fabric 4", Platform: "M4"}, {Key: "Tp0q", Desc: "CPU Performance Fabric 4", Platform: "M4"}, {Key: "Tp0t", Desc: "CPU Performance Fabric 4", Platform: "M4"}, {Key: "Tp0u", Desc: "CPU Performance Fabric 5", Platform: "M4"}, {Key: "Tp0v", Desc: "CPU Performance Fabric 5", Platform: "M4"}, {Key: "Tp0w", Desc: "CPU Performance Fabric 5", Platform: "M4"}, {Key: "Tpx0", Desc: "CPU Performance Cluster 1 Die", Platform: "M4"}, {Key: "Tpx1", Desc: "CPU Performance Cluster 1 Die", Platform: "M4"}, {Key: "Tpx2", Desc: "CPU Performance Cluster 2 Die", Platform: "M4"}, {Key: "Tpx3", Desc: "CPU Performance Cluster 2 Die", Platform: "M4"}, {Key: "Tpx4", Desc: "CPU Performance Cluster 3 Die", Platform: "M4"}, {Key: "Tpx5", Desc: "CPU Performance Cluster 3 Die", Platform: "M4"}, {Key: "Tp0V", Desc: "CPU Performance Cluster 1", Platform: "M4"}, {Key: "Tp3O", Desc: "CPU Performance Cluster 1", Platform: "M4"}, {Key: "Tp3P", Desc: "CPU Performance Cluster 1", Platform: "M4"}, {Key: "Tp3W", Desc: "CPU Performance Cluster 2", Platform: "M4"}, {Key: "Tp3X", Desc: "CPU Performance Cluster 2", Platform: "M4"}, {Key: "Tp3S", Desc: "CPU Performance Cluster 3", Platform: "M4"}, {Key: "Tp3T", Desc: "CPU Performance Cluster 3", Platform: "M4"}, {Key: "Tp1A", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M4"}, {Key: "Tp1B", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M4"}, {Key: "Tp1C", Desc: "CPU Performance Cluster Aggregate 1", Platform: "M4"}, {Key: "Tp1E", Desc: "CPU Performance Cluster Aggregate 2", Platform: "M4"}, {Key: "Tp1F", Desc: "CPU Performance Cluster Aggregate 2", Platform: "M4"}, {Key: "Tp1G", Desc: "CPU Performance Cluster Aggregate 2", Platform: "M4"}, {Key: "Tp1Q", Desc: "CPU Performance Cluster Aggregate 3", Platform: "M4"}, {Key: "Tp1R", Desc: "CPU Performance Cluster Aggregate 3", Platform: "M4"}, {Key: "Tp1S", Desc: "CPU Performance Cluster Aggregate 3", Platform: "M4"}, {Key: "Tg0G", Desc: "GPU 1", Platform: "M4"}, {Key: "Tg0H", Desc: "GPU 2", Platform: "M4"}, {Key: "Tg0C", Desc: "GPU 3", Platform: "M4"}, {Key: "Tg0K", Desc: "GPU 3", Platform: "M4"}, {Key: "Tg0D", Desc: "GPU 4", Platform: "M4"}, {Key: "Tg0L", Desc: "GPU 4", Platform: "M4"}, {Key: "Tg0O", Desc: "GPU 5", Platform: "M4"}, {Key: "Tg0d", Desc: "GPU 5", Platform: "M4"}, {Key: "Tg0P", Desc: "GPU 6", Platform: "M4"}, {Key: "Tg0e", Desc: "GPU 6", Platform: "M4"}, {Key: "Tg0U", Desc: "GPU 7", Platform: "M4"}, {Key: "Tg0j", Desc: "GPU 7", Platform: "M4"}, {Key: "Tg0V", Desc: "GPU 8", Platform: "M4"}, {Key: "Tg0k", Desc: "GPU 8", Platform: "M4"}, {Key: "Tg0m", Desc: "GPU 9", Platform: "M4"}, {Key: "Tg0n", Desc: "GPU 10", Platform: "M4"}, {Key: "Tg04", Desc: "GPU 11", Platform: "M4"}, {Key: "Tg05", Desc: "GPU 12", Platform: "M4"}, {Key: "Tg0R", Desc: "GPU 13", Platform: "M4"}, {Key: "Tg0S", Desc: "GPU 14", Platform: "M4"}, {Key: "Tg0X", Desc: "GPU 15", Platform: "M4"}, {Key: "Tg0Y", Desc: "GPU 16", Platform: "M4"}, {Key: "Tg0y", Desc: "GPU 17", Platform: "M4"}, {Key: "Tg0z", Desc: "GPU 18", Platform: "M4"}, {Key: "Tg1E", Desc: "GPU 19", Platform: "M4"}, {Key: "Tg1F", Desc: "GPU 20", Platform: "M4"}, {Key: "Tg1U", Desc: "GPU 21", Platform: "M4"}, {Key: "Tg1V", Desc: "GPU 22", Platform: "M4"}, {Key: "Tg1c", Desc: "GPU 23", Platform: "M4"}, {Key: "Tg1d", Desc: "GPU 24", Platform: "M4"}, {Key: "Tg1k", Desc: "GPU 25", Platform: "M4"}, {Key: "Tg1l", Desc: "GPU 26", Platform: "M4"}, {Key: "Tg21", Desc: "GPU 27", Platform: "M4"}, {Key: "Tg22", Desc: "GPU 27", Platform: "M4"}, {Key: "Tg2H", Desc: "GPU 28", Platform: "M4"}, {Key: "Tg2I", Desc: "GPU 28", Platform: "M4"}, {Key: "Tg2P", Desc: "GPU 29", Platform: "M4"}, {Key: "Tg2Q", Desc: "GPU 29", Platform: "M4"}, {Key: "Tg2X", Desc: "GPU 30", Platform: "M4"}, {Key: "Tg2Y", Desc: "GPU 30", Platform: "M4"}, {Key: "Tg2f", Desc: "GPU 31", Platform: "M4"}, {Key: "Tg2g", Desc: "GPU 31", Platform: "M4"}, {Key: "Tg2n", Desc: "GPU 32", Platform: "M4"}, {Key: "Tg2o", Desc: "GPU 32", Platform: "M4"}, {Key: "Tg33", Desc: "GPU 33", Platform: "M4"}, {Key: "Tg34", Desc: "GPU 33", Platform: "M4"}, {Key: "Tg3J", Desc: "GPU 34", Platform: "M4"}, {Key: "Tg3K", Desc: "GPU 34", Platform: "M4"}, {Key: "Tg3Z", Desc: "GPU 35", Platform: "M4"}, {Key: "Tg3a", Desc: "GPU 35", Platform: "M4"}, {Key: "Tg3h", Desc: "GPU 36", Platform: "M4"}, {Key: "Tg3i", Desc: "GPU 36", Platform: "M4"}, {Key: "Tg3p", Desc: "GPU 37", Platform: "M4"}, {Key: "Tg3q", Desc: "GPU 37", Platform: "M4"}, {Key: "TaLR", Desc: "Airflow Left Rear", Platform: "M4"}, {Key: "TfC0", Desc: "GPU Fabric 1", Platform: "M4"}, {Key: "TfC1", Desc: "GPU Fabric 2", Platform: "M4"}, {Key: "TfC2", Desc: "GPU Fabric 3", Platform: "M4"}, {Key: "TfC3", Desc: "GPU Fabric 4", Platform: "M4"}, {Key: "TfC4", Desc: "GPU Fabric 5", Platform: "M4"}, {Key: "Tf04", Desc: "GPU Fabric Block 0", Platform: "M4"}, {Key: "Tf06", Desc: "GPU Fabric Block 0 Max", Platform: "M4"}, {Key: "Tf08", Desc: "GPU Fabric Block 0 Probe 1", Platform: "M4"}, {Key: "Tf09", Desc: "GPU Fabric Block 0 Probe 2", Platform: "M4"}, {Key: "Tf0A", Desc: "GPU Fabric Block 0 Probe 3", Platform: "M4"}, {Key: "Tf0B", Desc: "GPU Fabric Block 0 Probe 4", Platform: "M4"}, {Key: "Tf14", Desc: "GPU Fabric Block 1", Platform: "M4"}, {Key: "Tf16", Desc: "GPU Fabric Block 1 Max", Platform: "M4"}, {Key: "Tf18", Desc: "GPU Fabric Block 1 Probe 1", Platform: "M4"}, {Key: "Tf19", Desc: "GPU Fabric Block 1 Probe 2", Platform: "M4"}, {Key: "Tf1A", Desc: "GPU Fabric Block 1 Probe 3", Platform: "M4"}, {Key: "Tf1B", Desc: "GPU Fabric Block 1 Probe 4", Platform: "M4"}, {Key: "Tf24", Desc: "GPU Fabric Block 2", Platform: "M4"}, {Key: "Tf26", Desc: "GPU Fabric Block 2 Max", Platform: "M4"}, {Key: "Tf28", Desc: "GPU Fabric Block 2 Probe 1", Platform: "M4"}, {Key: "Tf29", Desc: "GPU Fabric Block 2 Probe 2", Platform: "M4"}, {Key: "Tf2A", Desc: "GPU Fabric Block 2 Probe 3", Platform: "M4"}, {Key: "Tf2B", Desc: "GPU Fabric Block 2 Probe 4", Platform: "M4"}, {Key: "Tf34", Desc: "GPU Fabric Block 3", Platform: "M4"}, {Key: "Tf36", Desc: "GPU Fabric Block 3 Max", Platform: "M4"}, {Key: "Tf38", Desc: "GPU Fabric Block 3 Probe 1", Platform: "M4"}, {Key: "Tf39", Desc: "GPU Fabric Block 3 Probe 2", Platform: "M4"}, {Key: "Tf3A", Desc: "GPU Fabric Block 3 Probe 3", Platform: "M4"}, {Key: "Tf3B", Desc: "GPU Fabric Block 3 Probe 4", Platform: "M4"}, {Key: "Tf44", Desc: "GPU Fabric Block 4", Platform: "M4"}, {Key: "Tf46", Desc: "GPU Fabric Block 4 Max", Platform: "M4"}, {Key: "Tf48", Desc: "GPU Fabric Block 4 Probe 1", Platform: "M4"}, {Key: "Tf49", Desc: "GPU Fabric Block 4 Probe 2", Platform: "M4"}, {Key: "Tf4A", Desc: "GPU Fabric Block 4 Probe 3", Platform: "M4"}, {Key: "Tf4B", Desc: "GPU Fabric Block 4 Probe 4", Platform: "M4"}, {Key: "TUD0", Desc: "Uncore Die 1", Platform: "M4"}, {Key: "TUD1", Desc: "Uncore Die 2", Platform: "M4"}, {Key: "TUD2", Desc: "Uncore Die 3", Platform: "M4"}, {Key: "TUD3", Desc: "Uncore Die 4", Platform: "M4"}, {Key: "TUD4", Desc: "Uncore Die 5", Platform: "M4"}, {Key: "TUD5", Desc: "Uncore Die 6", Platform: "M4"}, {Key: "TUD6", Desc: "Uncore Die 7", Platform: "M4"}, {Key: "TUD7", Desc: "Uncore Die 8", Platform: "M4"}, {Key: "TUD8", Desc: "Uncore Die 9", Platform: "M4"}, {Key: "TUD9", Desc: "Uncore Die 10", Platform: "M4"}, {Key: "TUDX", Desc: "Uncore Die Max", Platform: "M4"}, {Key: "TUDa", Desc: "Uncore Die 11", Platform: "M4"}, {Key: "TUDb", Desc: "Uncore Die 12", Platform: "M4"}, {Key: "TUDc", Desc: "Uncore Die 13", Platform: "M4"}, {Key: "TUDd", Desc: "Uncore Die 14", Platform: "M4"}, {Key: "TUDe", Desc: "Uncore Die 15", Platform: "M4"}, {Key: "TUDf", Desc: "Uncore Die 16", Platform: "M4"}, {Key: "Ts00", Desc: "SSD 1", Platform: "M4"}, {Key: "Ts01", Desc: "SSD 1", Platform: "M4"}, {Key: "Ts02", Desc: "SSD 1", Platform: "M4"}, {Key: "Ts04", Desc: "SSD 2", Platform: "M4"}, {Key: "Ts05", Desc: "SSD 2", Platform: "M4"}, {Key: "Ts06", Desc: "SSD 2", Platform: "M4"}, {Key: "Ts08", Desc: "SSD 3", Platform: "M4"}, {Key: "Ts09", Desc: "SSD 3", Platform: "M4"}, {Key: "Ts0A", Desc: "SSD 3", Platform: "M4"}, {Key: "Ts0C", Desc: "SSD 4", Platform: "M4"}, {Key: "Ts0D", Desc: "SSD 4", Platform: "M4"}, {Key: "Ts0E", Desc: "SSD 4", Platform: "M4"}, {Key: "Ts0G", Desc: "SSD 5", Platform: "M4"}, {Key: "Ts0H", Desc: "SSD 5", Platform: "M4"}, {Key: "Ts0I", Desc: "SSD 5", Platform: "M4"}, {Key: "Ts0K", Desc: "SSD 6", Platform: "M4"}, {Key: "Ts0L", Desc: "SSD 6", Platform: "M4"}, {Key: "Ts0M", Desc: "SSD 6", Platform: "M4"}, {Key: "Ts0O", Desc: "SSD 7", Platform: "M4"}, {Key: "Ts0Q", Desc: "SSD 7", Platform: "M4"}, {Key: "Ts0R", Desc: "SSD 7", Platform: "M4"}, {Key: "Ts0S", Desc: "SSD 8", Platform: "M4"}, {Key: "Ts0T", Desc: "SSD 8", Platform: "M4"}, {Key: "Ts0U", Desc: "SSD 8", Platform: "M4"}, {Key: "Ts0V", Desc: "SSD 9", Platform: "M4"}, {Key: "Ts0W", Desc: "SSD 9", Platform: "M4"}, {Key: "Ts0X", Desc: "SSD 9", Platform: "M4"}, {Key: "Ts0d", Desc: "SSD 10", Platform: "M4"}, {Key: "Ts0e", Desc: "SSD 10", Platform: "M4"}, {Key: "Ts0f", Desc: "SSD 10", Platform: "M4"}, {Key: "Ts0g", Desc: "SSD 11", Platform: "M4"}, {Key: "Ts0h", Desc: "SSD 11", Platform: "M4"}, {Key: "Ts0i", Desc: "SSD 11", Platform: "M4"}, {Key: "TS0p", Desc: "SSD Proximity 1", Platform: "M4"}, {Key: "TS1p", Desc: "SSD Proximity 2", Platform: "M4"}, {Key: "Ts0P", Desc: "SSD Controller", Platform: "M4"}, {Key: "TsOP", Desc: "SSD Controller", Platform: "M4"}, {Key: "Ts1P", Desc: "SSD Controller", Platform: "M4"}, {Key: "Tsx0", Desc: "SSD Aggregate", Platform: "M4"}, {Key: "Tsx1", Desc: "SSD Aggregate", Platform: "M4"}, {Key: "Tm0p", Desc: "Memory 1", Platform: "M4"}, {Key: "Tm1p", Desc: "Memory 2", Platform: "M4"}, {Key: "Tm2p", Desc: "Memory 3", Platform: "M4"}, {Key: "TSCP", Desc: "SoC Cooling Probe", Platform: "M4"}, {Key: "Tp00", Desc: "CPU Super Core 1", Platform: "M5"}, {Key: "Tp04", Desc: "CPU Super Core 2", Platform: "M5"}, {Key: "Tp08", Desc: "CPU Super Core 3", Platform: "M5"}, {Key: "Tp0C", Desc: "CPU Super Core 4", Platform: "M5"}, {Key: "Tp0G", Desc: "CPU Super Core 5", Platform: "M5"}, {Key: "Tp0K", Desc: "CPU Super Core 6", Platform: "M5"}, {Key: "Tp0O", Desc: "CPU Performance Core 1", Platform: "M5"}, {Key: "Tp0R", Desc: "CPU Performance Core 2", Platform: "M5"}, {Key: "Tp0U", Desc: "CPU Performance Core 3", Platform: "M5"}, {Key: "Tp0X", Desc: "CPU Performance Core 4", Platform: "M5"}, {Key: "Tp0a", Desc: "CPU Performance Core 5", Platform: "M5"}, {Key: "Tp0d", Desc: "CPU Performance Core 6", Platform: "M5"}, {Key: "Tp0g", Desc: "CPU Performance Core 7", Platform: "M5"}, {Key: "Tp0j", Desc: "CPU Performance Core 8", Platform: "M5"}, {Key: "Tp0m", Desc: "CPU Performance Core 9", Platform: "M5"}, {Key: "Tp0p", Desc: "CPU Performance Core 10", Platform: "M5"}, {Key: "Tp0u", Desc: "CPU Performance Core 11", Platform: "M5"}, {Key: "Tp0y", Desc: "CPU Performance Core 12", Platform: "M5"}, {Key: "Tp1E", Desc: "CPU Performance Cluster Aggregate", Platform: "M5"}, {Key: "Tp1I", Desc: "CPU Performance Cluster 1", Platform: "M5"}, {Key: "Tp1Q", Desc: "CPU Performance Cluster 2", Platform: "M5"}, {Key: "Tp1U", Desc: "CPU Performance Cluster 3", Platform: "M5"}, {Key: "Tp1g", Desc: "CPU Performance Cluster 4", Platform: "M5"}, {Key: "Ta00", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Ta04", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Ta08", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Ta0K", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Ta0O", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Ta0R", Desc: "CPU Die Thermal Headroom", Platform: "M5"}, {Key: "Tg08", Desc: "GPU 1", Platform: "M5"}, {Key: "Tg0C", Desc: "GPU 2", Platform: "M5"}, {Key: "Tg0O", Desc: "GPU 3", Platform: "M5"}, {Key: "Tg0R", Desc: "GPU 4", Platform: "M5"}, {Key: "Tg0U", Desc: "GPU 5", Platform: "M5"}, {Key: "Tg0X", Desc: "GPU 6", Platform: "M5"}, {Key: "Tg0a", Desc: "GPU 7", Platform: "M5"}, {Key: "Tg0d", Desc: "GPU 8", Platform: "M5"}, {Key: "Tg0g", Desc: "GPU 9", Platform: "M5"}, {Key: "Tg0j", Desc: "GPU 10", Platform: "M5"}, {Key: "Tg12", Desc: "GPU 11", Platform: "M5"}, {Key: "Tg16", Desc: "GPU 12", Platform: "M5"}, {Key: "Tg1I", Desc: "GPU 13", Platform: "M5"}, {Key: "Tg1M", Desc: "GPU 14", Platform: "M5"}, {Key: "Tg1Q", Desc: "GPU 15", Platform: "M5"}, {Key: "Tg1U", Desc: "GPU 16", Platform: "M5"}, {Key: "Tg1Y", Desc: "GPU 17", Platform: "M5"}, {Key: "Tg1c", Desc: "GPU 18", Platform: "M5"}, {Key: "Tg1k", Desc: "GPU 19", Platform: "M5"}, {Key: "Tg1o", Desc: "GPU 20", Platform: "M5"}, {Key: "Tg1x", Desc: "GPU 21", Platform: "M5"}, {Key: "Tg29", Desc: "GPU 22", Platform: "M5"}, {Key: "Tg2D", Desc: "GPU 23", Platform: "M5"}, {Key: "Tg2P", Desc: "GPU 24", Platform: "M5"}, {Key: "Tg2T", Desc: "GPU 25", Platform: "M5"}, {Key: "Tg2X", Desc: "GPU 26", Platform: "M5"}, {Key: "Tg2b", Desc: "GPU 27", Platform: "M5"}, {Key: "Tg2f", Desc: "GPU 28", Platform: "M5"}, {Key: "Tg2j", Desc: "GPU 29", Platform: "M5"}, {Key: "Tg2n", Desc: "GPU 30", Platform: "M5"}, {Key: "Tg2r", Desc: "GPU 31", Platform: "M5"}, {Key: "Tg3B", Desc: "GPU 32", Platform: "M5"}, {Key: "Tg3F", Desc: "GPU 33", Platform: "M5"}, {Key: "Tg3R", Desc: "GPU 34", Platform: "M5"}, {Key: "Tg3V", Desc: "GPU 35", Platform: "M5"}, {Key: "Tg3Z", Desc: "GPU 36", Platform: "M5"}, {Key: "Tg3d", Desc: "GPU 37", Platform: "M5"}, {Key: "Tg3h", Desc: "GPU 38", Platform: "M5"}, {Key: "Tg3l", Desc: "GPU 39", Platform: "M5"}, {Key: "Tg3t", Desc: "GPU 40", Platform: "M5"}, {Key: "Tg3x", Desc: "GPU 41", Platform: "M5"}, {Key: "Tg43", Desc: "GPU 42", Platform: "M5"}, {Key: "Tf04", Desc: "GPU Fabric Block 0", Platform: "M5"}, {Key: "Tf06", Desc: "GPU Fabric Block 0 Max", Platform: "M5"}, {Key: "Tf08", Desc: "GPU Fabric Block 0 Probe 1", Platform: "M5"}, {Key: "Tf09", Desc: "GPU Fabric Block 0 Probe 2", Platform: "M5"}, {Key: "Tf0A", Desc: "GPU Fabric Block 0 Probe 3", Platform: "M5"}, {Key: "Tf0B", Desc: "GPU Fabric Block 0 Probe 4", Platform: "M5"}, {Key: "Tf14", Desc: "GPU Fabric Block 1", Platform: "M5"}, {Key: "Tf16", Desc: "GPU Fabric Block 1 Max", Platform: "M5"}, {Key: "Tf18", Desc: "GPU Fabric Block 1 Probe 1", Platform: "M5"}, {Key: "Tf19", Desc: "GPU Fabric Block 1 Probe 2", Platform: "M5"}, {Key: "Tf1A", Desc: "GPU Fabric Block 1 Probe 3", Platform: "M5"}, {Key: "Tf1B", Desc: "GPU Fabric Block 1 Probe 4", Platform: "M5"}, {Key: "TfC0", Desc: "GPU Fabric 1", Platform: "M5"}, {Key: "TfC1", Desc: "GPU Fabric 2", Platform: "M5"}, {Key: "TfC3", Desc: "GPU Fabric 3", Platform: "M5"}, {Key: "TfC5", Desc: "GPU Fabric 4", Platform: "M5"}, {Key: "TfCD", Desc: "GPU Fabric 5", Platform: "M5"}, {Key: "TfCE", Desc: "GPU Fabric 6", Platform: "M5"}, {Key: "TfCF", Desc: "GPU Fabric 7", Platform: "M5"}, {Key: "TfC6", Desc: "GPU Fabric 8", Platform: "M5"}, {Key: "TfC7", Desc: "GPU Fabric 9", Platform: "M5"}, {Key: "TfC8", Desc: "GPU Fabric 10", Platform: "M5"}, {Key: "TfC9", Desc: "GPU Fabric 11", Platform: "M5"}, {Key: "TfCA", Desc: "GPU Fabric 12", Platform: "M5"}, {Key: "TVDA", Desc: "Virtual Die A", Platform: "M5"}, {Key: "TVDG", Desc: "Virtual Die G", Platform: "M5"}, {Key: "TVDM", Desc: "Virtual Die M", Platform: "M5"}, {Key: "TVDP", Desc: "Virtual Die P", Platform: "M5"}, {Key: "TVDc", Desc: "Virtual Die c", Platform: "M5"}, {Key: "Tm00", Desc: "Memory 1", Platform: "M5"}, {Key: "Tm04", Desc: "Memory 2", Platform: "M5"}, {Key: "Tm08", Desc: "Memory 3", Platform: "M5"}, {Key: "Tm0C", Desc: "Memory 4", Platform: "M5"}, {Key: "Tm0G", Desc: "Memory 5", Platform: "M5"}, {Key: "Tm0K", Desc: "Memory 6", Platform: "M5"}, {Key: "Tm0O", Desc: "Memory 7", Platform: "M5"}, {Key: "Tm0R", Desc: "Memory 8", Platform: "M5"}, {Key: "Tm0U", Desc: "Memory 9", Platform: "M5"}, {Key: "Tm0X", Desc: "Memory 10", Platform: "M5"}, {Key: "Tm0a", Desc: "Memory 11", Platform: "M5"}, {Key: "Tm0d", Desc: "Memory 12", Platform: "M5"}, {Key: "Tm0g", Desc: "Memory 13", Platform: "M5"}, {Key: "Tm0j", Desc: "Memory 14", Platform: "M5"}, {Key: "Tm0m", Desc: "Memory 15", Platform: "M5"}, {Key: "Tm0p", Desc: "Memory 16", Platform: "M5"}, {Key: "Tm0u", Desc: "Memory 17", Platform: "M5"}, {Key: "Tm0y", Desc: "Memory 18", Platform: "M5"}, {Key: "Tm1E", Desc: "Memory 19", Platform: "M5"}, {Key: "Tm1I", Desc: "Memory 20", Platform: "M5"}, {Key: "Tm1M", Desc: "Memory 21", Platform: "M5"}, {Key: "Tm1Q", Desc: "Memory 22", Platform: "M5"}, {Key: "Tm1U", Desc: "Memory 23", Platform: "M5"}, {Key: "Tm1Y", Desc: "Memory 24", Platform: "M5"}, {Key: "Tm1c", Desc: "Memory 25", Platform: "M5"}, {Key: "Tm1g", Desc: "Memory 26", Platform: "M5"}, {Key: "Tm1k", Desc: "Memory 27", Platform: "M5"}, {Key: "Tm1o", Desc: "Memory 28", Platform: "M5"}, {Key: "Tm1s", Desc: "Memory 29", Platform: "M5"}, {Key: "Tm1x", Desc: "Memory 30", Platform: "M5"}, {Key: "Tm21", Desc: "Memory 31", Platform: "M5"}, {Key: "Tm25", Desc: "Memory 32", Platform: "M5"}, {Key: "Tm29", Desc: "Memory 33", Platform: "M5"}, {Key: "Tm2D", Desc: "Memory 34", Platform: "M5"}, {Key: "Tm2H", Desc: "Memory 35", Platform: "M5"}, {Key: "Tm2L", Desc: "Memory 36", Platform: "M5"}, {Key: "Tm2P", Desc: "Memory 37", Platform: "M5"}, {Key: "Tm2T", Desc: "Memory 38", Platform: "M5"}, {Key: "Tm2j", Desc: "Memory 39", Platform: "M5"}, {Key: "Tm2n", Desc: "Memory 40", Platform: "M5"}, {Key: "Ts00", Desc: "SSD 1", Platform: "M5"}, {Key: "Ts04", Desc: "SSD 2", Platform: "M5"}, {Key: "Ts08", Desc: "SSD 3", Platform: "M5"}, {Key: "Ts0C", Desc: "SSD 4", Platform: "M5"}, {Key: "Ts0G", Desc: "SSD 5", Platform: "M5"}, {Key: "Ts0K", Desc: "SSD 6", Platform: "M5"}, {Key: "Ts0O", Desc: "SSD 7", Platform: "M5"}, {Key: "Ts0R", Desc: "SSD 8", Platform: "M5"}, {Key: "Ts0U", Desc: "SSD 9", Platform: "M5"}, {Key: "Ts0X", Desc: "SSD 10", Platform: "M5"}, {Key: "Ts0a", Desc: "SSD 11", Platform: "M5"}, {Key: "Ts0d", Desc: "SSD 12", Platform: "M5"}, {Key: "Ts0g", Desc: "SSD 13", Platform: "M5"}, {Key: "Ts0P", Desc: "SSD Controller", Platform: "M5"}, {Key: "Ts1P", Desc: "SSD Controller", Platform: "M5"}, {Key: "TN00", Desc: "Package 1", Platform: "M5"}, {Key: "TN01", Desc: "Package 2", Platform: "M5"}, {Key: "TN02", Desc: "Package 3", Platform: "M5"}, {Key: "TN03", Desc: "Package 4", Platform: "M5"}, {Key: "TN04", Desc: "Package 5", Platform: "M5"}, {Key: "TN05", Desc: "Package 6", Platform: "M5"}, {Key: "TN06", Desc: "Package 7", Platform: "M5"}, {Key: "TN07", Desc: "Package 8", Platform: "M5"}, {Key: "TV0%", Desc: "Voltage Probe %", Platform: "M5"}, {Key: "TV1%", Desc: "Voltage Probe (Group 1) %", Platform: "M5"}, {Key: "TVN%", Desc: "Voltage Probe Mirror %", Platform: "M5"}, {Key: "TVNN", Desc: "Voltage Probe Mirror Max", Platform: "M5"}, {Key: "TUD0", Desc: "Uncore Die 1", Platform: "M5"}, {Key: "TUD1", Desc: "Uncore Die 2", Platform: "M5"}, {Key: "TUD2", Desc: "Uncore Die 3", Platform: "M5"}, {Key: "TUD3", Desc: "Uncore Die 4", Platform: "M5"}, {Key: "TUD4", Desc: "Uncore Die 5", Platform: "M5"}, {Key: "TUD5", Desc: "Uncore Die 6", Platform: "M5"}, {Key: "TUD6", Desc: "Uncore Die 7", Platform: "M5"}, {Key: "TUD7", Desc: "Uncore Die 8", Platform: "M5"}, {Key: "TUD8", Desc: "Uncore Die 9", Platform: "M5"}, {Key: "TUD9", Desc: "Uncore Die 10", Platform: "M5"}, {Key: "TUDX", Desc: "Uncore Die Max", Platform: "M5"}, {Key: "TUDa", Desc: "Uncore Die 11", Platform: "M5"}, {Key: "TUDb", Desc: "Uncore Die 12", Platform: "M5"}, {Key: "TUDc", Desc: "Uncore Die 13", Platform: "M5"}, {Key: "TUDd", Desc: "Uncore Die 14", Platform: "M5"}, {Key: "TUDe", Desc: "Uncore Die 15", Platform: "M5"}, {Key: "TUDf", Desc: "Uncore Die 16", Platform: "M5"}, {Key: "Tp00", Desc: "CPU Performance Core 1", Platform: "A18"}, {Key: "Tp01", Desc: "CPU Performance Core 1", Platform: "A18"}, {Key: "Tp02", Desc: "CPU Performance Core 1", Platform: "A18"}, {Key: "Tp04", Desc: "CPU Performance Core 2", Platform: "A18"}, {Key: "Tp05", Desc: "CPU Performance Core 2", Platform: "A18"}, {Key: "Tp06", Desc: "CPU Performance Core 2", Platform: "A18"}, {Key: "Te04", Desc: "CPU Efficiency Core 1", Platform: "A18"}, {Key: "Te05", Desc: "CPU Efficiency Core 1", Platform: "A18"}, {Key: "Te06", Desc: "CPU Efficiency Core 1", Platform: "A18"}, {Key: "Te0R", Desc: "CPU Efficiency Core 2", Platform: "A18"}, {Key: "Te0S", Desc: "CPU Efficiency Core 2", Platform: "A18"}, {Key: "Te0T", Desc: "CPU Efficiency Core 2", Platform: "A18"}, {Key: "Tp0l", Desc: "CPU Efficiency Core 3", Platform: "A18"}, {Key: "Tp0m", Desc: "CPU Efficiency Core 3", Platform: "A18"}, {Key: "Tp0n", Desc: "CPU Efficiency Core 3", Platform: "A18"}, {Key: "Tp0o", Desc: "CPU Efficiency Core 4", Platform: "A18"}, {Key: "Tp0q", Desc: "CPU Efficiency Core 4", Platform: "A18"}, {Key: "Tp0t", Desc: "CPU Efficiency Core 4", Platform: "A18"}, {Key: "Tp08", Desc: "CPU Performance Cluster Aggregate 1", Platform: "A18"}, {Key: "Tp09", Desc: "CPU Performance Cluster Aggregate 1", Platform: "A18"}, {Key: "Tp0A", Desc: "CPU Performance Cluster Aggregate 1", Platform: "A18"}, {Key: "Tp0C", Desc: "CPU Performance Cluster Aggregate 2", Platform: "A18"}, {Key: "Tp0D", Desc: "CPU Performance Cluster Aggregate 2", Platform: "A18"}, {Key: "Tp0E", Desc: "CPU Performance Cluster Aggregate 2", Platform: "A18"}, {Key: "Tpx0", Desc: "CPU Performance Cluster Die 1", Platform: "A18"}, {Key: "Tpx1", Desc: "CPU Performance Cluster Die 1", Platform: "A18"}, {Key: "Tpx2", Desc: "CPU Performance Cluster Die 2", Platform: "A18"}, {Key: "Tpx3", Desc: "CPU Performance Cluster Die 2", Platform: "A18"}, {Key: "Tex0", Desc: "CPU Efficiency Cluster 1 Die", Platform: "A18"}, {Key: "Tex1", Desc: "CPU Efficiency Cluster 1 Die", Platform: "A18"}, {Key: "Tex2", Desc: "CPU Efficiency Cluster 2 Die", Platform: "A18"}, {Key: "Tex3", Desc: "CPU Efficiency Cluster 2 Die", Platform: "A18"}, {Key: "Tg04", Desc: "GPU 1", Platform: "A18"}, {Key: "Tg05", Desc: "GPU 1", Platform: "A18"}, {Key: "Tg0C", Desc: "GPU 2", Platform: "A18"}, {Key: "Tg0D", Desc: "GPU 2", Platform: "A18"}, {Key: "Tg0K", Desc: "GPU 3", Platform: "A18"}, {Key: "Tg0L", Desc: "GPU 3", Platform: "A18"}, {Key: "Tg0d", Desc: "GPU 4", Platform: "A18"}, {Key: "Tg0e", Desc: "GPU 4", Platform: "A18"}, {Key: "Ts00", Desc: "SSD 1", Platform: "A18"}, {Key: "Ts01", Desc: "SSD 1", Platform: "A18"}, {Key: "Ts02", Desc: "SSD 1", Platform: "A18"}, {Key: "Ts04", Desc: "SSD 2", Platform: "A18"}, {Key: "Ts05", Desc: "SSD 2", Platform: "A18"}, {Key: "Ts06", Desc: "SSD 2", Platform: "A18"}, {Key: "Ts08", Desc: "SSD 3", Platform: "A18"}, {Key: "Ts09", Desc: "SSD 3", Platform: "A18"}, {Key: "Ts0A", Desc: "SSD 3", Platform: "A18"}, {Key: "Ts0C", Desc: "SSD 4", Platform: "A18"}, {Key: "Ts0D", Desc: "SSD 4", Platform: "A18"}, {Key: "Ts0E", Desc: "SSD 4", Platform: "A18"}, {Key: "Ts0G", Desc: "SSD 5", Platform: "A18"}, {Key: "Ts0H", Desc: "SSD 5", Platform: "A18"}, {Key: "Ts0I", Desc: "SSD 5", Platform: "A18"}, {Key: "Ts0K", Desc: "SSD 6", Platform: "A18"}, {Key: "Ts0L", Desc: "SSD 6", Platform: "A18"}, {Key: "Ts0M", Desc: "SSD 6", Platform: "A18"}, {Key: "Tsx0", Desc: "SSD Aggregate", Platform: "A18"}, {Key: "Tsx1", Desc: "SSD Aggregate", Platform: "A18"}, {Key: "TQ0d", Desc: "ISP Sensor 1", Platform: "A18"}, {Key: "TQ0j", Desc: "ISP Sensor 2", Platform: "A18"}, {Key: "TBLp", Desc: "Backlight Proximity", Platform: "A18"}, {Key: "TH0p", Desc: "Flash/SSD Proximity", Platform: "A18"}, {Key: "TS0p", Desc: "SSD Proximity 1", Platform: "A18"}, {Key: "TS1p", Desc: "SSD Proximity 2", Platform: "A18"}, {Key: "TTSp", Desc: "Touch Sensor Proximity", Platform: "A18"}, {Key: "TUCp", Desc: "USB-C Proximity", Platform: "A18"}, {Key: "TW0p", Desc: "WiFi Proximity", Platform: "A18"}, {Key: "TR5p", Desc: "5 GHz Radio Proximity", Platform: "A18"}, {Key: "TaTp", Desc: "Ambient Top Proximity", Platform: "A18"}, } var AppleFans = []SensorStat{ {Key: "F%dAc", Desc: "Fan %d Current Speed", Platform: ""}, {Key: "F%dMn", Desc: "Fan %d Minimal Speed", Platform: ""}, {Key: "F%dMx", Desc: "Fan %d Maximum Speed", Platform: ""}, {Key: "F%dSf", Desc: "Fan %d Safe Speed", Platform: ""}, {Key: "F%dTg", Desc: "Fan %d Target Speed", Platform: ""}, } var ApplePower = []SensorStat{ {Key: "PC%C", Desc: "CPU Core %", Platform: ""}, {Key: "PCAM", Desc: "CPU Core (IMON)", Platform: ""}, {Key: "PCPC", Desc: "CPU Package", Platform: ""}, {Key: "PCTR", Desc: "CPU Total", Platform: ""}, {Key: "PCPT", Desc: "CPU Package Total", Platform: ""}, {Key: "PCPR", Desc: "CPU Package Total (SMC)", Platform: ""}, {Key: "PC%R", Desc: "CPU Computing High Side %", Platform: ""}, {Key: "PC%G", Desc: "CPU GFX %", Platform: ""}, {Key: "PCEC", Desc: "CPU VccEDRAM", Platform: ""}, {Key: "PCPG", Desc: "GPU Intel Graphics", Platform: ""}, {Key: "PG%R", Desc: "GPU %", Platform: ""}, {Key: "PCGC", Desc: "Intel GPU", Platform: ""}, {Key: "PCGM", Desc: "Intel GPU (IMON)", Platform: ""}, {Key: "PC3C", Desc: "RAM", Platform: ""}, {Key: "PPBR", Desc: "Battery", Platform: ""}, {Key: "PDTR", Desc: "DC In", Platform: ""}, {Key: "PSTR", Desc: "System Total", Platform: ""}, {Key: "PCPD", Desc: "CPU DRAM", Platform: ""}, {Key: "PCPL", Desc: "CPU Total", Platform: ""}, {Key: "PM0R", Desc: "Memory Rail", Platform: ""}, {Key: "PN0C", Desc: "MCH", Platform: ""}, {Key: "PN1R", Desc: "PCH Rail", Platform: ""}, {Key: "PD0R", Desc: "Mainboard S0 Rail", Platform: ""}, {Key: "PD5R", Desc: "Mainboard S5 Rail", Platform: ""}, {Key: "PH02", Desc: "Main 3.3V Rail", Platform: ""}, {Key: "PH05", Desc: "Main 5V Rail", Platform: ""}, {Key: "Pp0R", Desc: "12V Rail", Platform: ""}, {Key: "PD2R", Desc: "Main 12V Rail", Platform: ""}, {Key: "PO0R", Desc: "Misc. Rail", Platform: ""}, {Key: "PBLC", Desc: "Battery Rail", Platform: ""}, {Key: "PB0R", Desc: "Battery Rail", Platform: ""}, {Key: "P50R", Desc: "5V Low-Side", Platform: ""}, {Key: "PAPC", Desc: "Airport", Platform: ""}, {Key: "PB1R", Desc: "Discrete BMON On Battery", Platform: ""}, {Key: "PC0I", Desc: "CPU I/O High Side", Platform: ""}, {Key: "PC0M", Desc: "CPU Mem Load-Side", Platform: ""}, {Key: "PC0S", Desc: "CPU SA High Side", Platform: ""}, {Key: "PCLT", Desc: "CPU Package Total", Platform: ""}, {Key: "PCS0", Desc: "Chipset Low-Side", Platform: ""}, {Key: "PCS1", Desc: "Chipset IMon", Platform: ""}, {Key: "PD0D", Desc: "Power Supply Trend", Platform: ""}, {Key: "PD0E", Desc: "Power Supply Filtered", Platform: ""}, {Key: "PD0F", Desc: "Power Supply Filtered Adjusted", Platform: ""}, {Key: "PD0J", Desc: "Power Supply Max Error Filtered Output", Platform: ""}, {Key: "PD1R", Desc: "Average CPU 1V5", Platform: ""}, {Key: "PG0A", Desc: "GPU Aux Load-Side", Platform: ""}, {Key: "PG0C", Desc: "GPU", Platform: ""}, {Key: "PG0F", Desc: "GPU Frame Buf Input-Side", Platform: ""}, {Key: "PG0I", Desc: "GPU VDDCI Load-Side", Platform: ""}, {Key: "PG0M", Desc: "GPU Mem Ctl Load-Side", Platform: ""}, {Key: "PG0S", Desc: "GPU A VDDCI Low-Side", Platform: ""}, {Key: "PG0U", Desc: "GPU Uncore High Side", Platform: ""}, {Key: "PG0V", Desc: "GPU VRAM Load-Side", Platform: ""}, {Key: "PG1A", Desc: "GPU Aux Load-Side", Platform: ""}, {Key: "PG1C", Desc: "Ext GPU 1.8V", Platform: ""}, {Key: "PG1F", Desc: "GPU Mem Ctl Load-Side", Platform: ""}, {Key: "PG1S", Desc: "GPU B VDDCI Low-Side", Platform: ""}, {Key: "PG2C", Desc: "Ext GPU 1.05V", Platform: ""}, {Key: "PG3C", Desc: "Ext GPU 1.35V", Platform: ""}, {Key: "PH0F", Desc: "Drive 0 Total", Platform: ""}, {Key: "PH0R", Desc: "HDD1 Low-Side", Platform: ""}, {Key: "PH1F", Desc: "Drive 1 Filtered Low-Side * 16", Platform: ""}, {Key: "PH1R", Desc: "Drive 1", Platform: ""}, {Key: "PH2R", Desc: "Drive 2", Platform: ""}, {Key: "PHDC", Desc: "SSD", Platform: ""}, {Key: "PHPC", Desc: "Heatpipe", Platform: ""}, {Key: "PHSC", Desc: "Thunderbolt", Platform: ""}, {Key: "PHSP", Desc: "Thunderbolt", Platform: ""}, {Key: "PI0R", Desc: "TBT IO High Side", Platform: ""}, {Key: "PLDC", Desc: "LCD Panel", Platform: ""}, {Key: "PM0C", Desc: "Average Memory", Platform: ""}, {Key: "PM0f", Desc: "DIMM Load-Side / SQR(Fan RPM)", Platform: ""}, {Key: "PM1C", Desc: "DDR", Platform: ""}, {Key: "PM2C", Desc: "DDR 1.8V CPU", Platform: ""}, {Key: "PM3C", Desc: "DDR S3.", Platform: ""}, {Key: "PMTR", Desc: "Memory Total", Platform: ""}, {Key: "PN0R", Desc: "MCP VCore", Platform: ""}, {Key: "PN1C", Desc: "Average MCP Memory", Platform: ""}, {Key: "PO3R", Desc: "Other 3.3V High Side", Platform: ""}, {Key: "PO5R", Desc: "Other 5V High Side", Platform: ""}, {Key: "PP0R", Desc: "PBus", Platform: ""}, {Key: "PR0C", Desc: "3.3V S0", Platform: ""}, {Key: "PR0R", Desc: "S0 5.0V", Platform: ""}, {Key: "PR1C", Desc: "Other High Side Current.", Platform: ""}, {Key: "PR1R", Desc: "S3 3.30V", Platform: ""}, {Key: "PR2R", Desc: "S3 5.0V", Platform: ""}, {Key: "PR3C", Desc: "3.3V In S0", Platform: ""}, {Key: "PR3R", Desc: "S5 3.30V", Platform: ""}, {Key: "PR5C", Desc: "3.3V S5", Platform: ""}, {Key: "PS2C", Desc: "S2 Camera", Platform: ""}, {Key: "PSBC", Desc: "PCH Core", Platform: ""}, {Key: "PSDC", Desc: "SSD", Platform: ""}, {Key: "PTHC", Desc: "HP Target", Platform: ""}, {Key: "PTPC", Desc: "T101 Boost/PBus Accuator", Platform: ""}, {Key: "PTPR", Desc: "T25 - Track Pad", Platform: ""}, {Key: "PW0R", Desc: "Wifi Load-Side", Platform: ""}, {Key: "PZ0E", Desc: "Zone 0 Target", Platform: ""}, {Key: "PZ0F", Desc: "Zone 0 Filtered", Platform: ""}, {Key: "PZ0G", Desc: "Zone 0 Average", Platform: ""}, {Key: "PZ0T", Desc: "Zone 0 Abstract Throttle", Platform: ""}, {Key: "PZ1E", Desc: "Zone 1 Target", Platform: ""}, {Key: "PZ1F", Desc: "Zone 1 Filtered", Platform: ""}, {Key: "PZ1G", Desc: "Zone 1 Average", Platform: ""}, {Key: "PZ1T", Desc: "Zone 1 Abstract Throttle", Platform: ""}, {Key: "PZ2E", Desc: "Zone 2 Target", Platform: ""}, {Key: "PZ2F", Desc: "Zone 2 Filtered", Platform: ""}, {Key: "PZ2G", Desc: "Zone 2 Average", Platform: ""}, {Key: "PZ2T", Desc: "Zone 2 Abstract Throttle", Platform: ""}, {Key: "PZ3E", Desc: "Zone 3 Target", Platform: ""}, {Key: "PZ3F", Desc: "Zone 3 Filtered", Platform: ""}, {Key: "PZ3G", Desc: "Zone 3 Average", Platform: ""}, {Key: "PZ3T", Desc: "Zone 3 Abstract Throttle", Platform: ""}, {Key: "PZ4E", Desc: "Zone 4 Target", Platform: ""}, {Key: "PZ4F", Desc: "Zone 4 Filtered", Platform: ""}, {Key: "PZ4G", Desc: "Zone 4 Average", Platform: ""}, {Key: "PZ4T", Desc: "Zone 4 Abstract Throttle", Platform: ""}, {Key: "PZ5E", Desc: "Zone 5 Target", Platform: ""}, {Key: "PZ5F", Desc: "Zone 5 Filtered", Platform: ""}, {Key: "PZ5G", Desc: "Zone 5 Average", Platform: ""}, {Key: "PZ5T", Desc: "Zone 5 Abstract Throttle", Platform: ""}, {Key: "PZAP", Desc: "Airport", Platform: ""}, {Key: "PZBL", Desc: "Backlight", Platform: ""}, {Key: "PZDM", Desc: "Memory", Platform: ""}, {Key: "PZHD", Desc: "SSD", Platform: ""}, {Key: "PZOD", Desc: "ODD(PZOD)", Platform: ""}, {Key: "Pc0R", Desc: "Average Main Chipset", Platform: ""}, {Key: "PDBR", Desc: "Power Delivery Brightness", Platform: ""}, {Key: "PU1R", Desc: "Thunderbolt Left", Platform: ""}, {Key: "PU2R", Desc: "Thunderbolt Right", Platform: ""}, } var AppleVoltage = []SensorStat{ {Key: "VCAC", Desc: "CPU IA", Platform: ""}, {Key: "VCSC", Desc: "CPU System Agent", Platform: ""}, {Key: "VC%C", Desc: "CPU Core %", Platform: ""}, {Key: "VCTC", Desc: "GPU Intel Graphics", Platform: ""}, {Key: "VG%C", Desc: "GPU %", Platform: ""}, {Key: "VM%R", Desc: "Memory %", Platform: ""}, {Key: "Vb0R", Desc: "CMOS", Platform: ""}, {Key: "VD0R", Desc: "DC In", Platform: ""}, {Key: "VP0R", Desc: "12V Rail", Platform: ""}, {Key: "Vp0C", Desc: "12V VCC", Platform: ""}, {Key: "VV2S", Desc: "3V", Platform: ""}, {Key: "VR3R", Desc: "3.3V", Platform: ""}, {Key: "VV1S", Desc: "5V", Platform: ""}, {Key: "VV9S", Desc: "12V", Platform: ""}, {Key: "VeES", Desc: "PCI 12V", Platform: ""}, {Key: "VV1R", Desc: "CPU VTT", Platform: ""}, {Key: "VN1R", Desc: "PCH", Platform: ""}, {Key: "VN0C", Desc: "MCH", Platform: ""}, {Key: "VH05", Desc: "Main 5V", Platform: ""}, {Key: "VV7S", Desc: "Auxiliary 3V", Platform: ""}, {Key: "VV3S", Desc: "Standby 3V", Platform: ""}, {Key: "VV8S", Desc: "Standby 5V", Platform: ""}, {Key: "VBAT", Desc: "Battery", Platform: ""}, {Key: "V50R", Desc: "5V Low-Side", Platform: ""}, {Key: "VACC", Desc: "ACC", Platform: ""}, {Key: "VAPC", Desc: "Wireless", Platform: ""}, {Key: "VBLC", Desc: "Backlight Output Boosted", Platform: ""}, {Key: "VC0G", Desc: "CPU AXG Low-Side", Platform: ""}, {Key: "VC0M", Desc: "CPU Mem Load-Side", Platform: ""}, {Key: "VC0S", Desc: "CPU VSA Low-Side", Platform: ""}, {Key: "VC1R", Desc: "CPU High Side From EMC1704", Platform: ""}, {Key: "VCFR", Desc: "FIVR CPU Supply", Platform: ""}, {Key: "VCRP", Desc: "CPU Ripple", Platform: ""}, {Key: "VCS0", Desc: "CPU Core", Platform: ""}, {Key: "VG0F", Desc: "GPU Frame Buffer Input-Side", Platform: ""}, {Key: "VG0I", Desc: "GPU VDDCI Load-Side", Platform: ""}, {Key: "VG0S", Desc: "GPU A VDDCI Low-Side", Platform: ""}, {Key: "VG0U", Desc: "GPU Uncore High Side", Platform: ""}, {Key: "VG1F", Desc: "GPU Frame Buffer Input-Side", Platform: ""}, {Key: "VG1S", Desc: "GPU B VDDCI Low-Side", Platform: ""}, {Key: "VH0R", Desc: "SSD 3V3 Low-Side", Platform: ""}, {Key: "VH1R", Desc: "SSD 3.3V Low-Side", Platform: ""}, {Key: "VL3t", Desc: "LCD IR", Platform: ""}, {Key: "VM0C", Desc: "1.2V To CPU/MEM Low-Side", Platform: ""}, {Key: "VM1C", Desc: "1.8V S3 Low-Side", Platform: ""}, {Key: "VN0R", Desc: "Average GFX Vcore", Platform: ""}, {Key: "VN1C", Desc: "MCP Memory", Platform: ""}, {Key: "VODC", Desc: "ODD", Platform: ""}, {Key: "VP0T", Desc: "PSU", Platform: ""}, {Key: "VR1R", Desc: "PCH/GPU/TBT Load-Side", Platform: ""}, {Key: "VSDC", Desc: "SD Card", Platform: ""}, {Key: "VTPC", Desc: "T101 Accuator", Platform: ""}, {Key: "VZAP", Desc: "WIFI", Platform: ""}, {Key: "VZBL", Desc: "Backlight", Platform: ""}, {Key: "VZDM", Desc: "Memory", Platform: ""}, {Key: "VZHD", Desc: "SSD", Platform: ""}, {Key: "VZOD", Desc: "ODD", Platform: ""}, } var AppleCurrent = []SensorStat{ {Key: "IC0C", Desc: "CPU Core", Platform: ""}, {Key: "IC1C", Desc: "CPU VccIO", Platform: ""}, {Key: "IC2C", Desc: "CPU VccSA", Platform: ""}, {Key: "IC0R", Desc: "CPU High Side", Platform: ""}, {Key: "IC5R", Desc: "CPU DRAM", Platform: ""}, {Key: "IC8R", Desc: "CPU PLL", Platform: ""}, {Key: "IC0G", Desc: "CPU GFX", Platform: ""}, {Key: "IC0M", Desc: "CPU Memory", Platform: ""}, {Key: "IG0C", Desc: "GPU Rail", Platform: ""}, {Key: "IM0C", Desc: "Memory Controller", Platform: ""}, {Key: "IM0R", Desc: "Memory Rail", Platform: ""}, {Key: "IN0C", Desc: "MCH", Platform: ""}, {Key: "ID0R", Desc: "Mainboard S0 Rail (DC In)", Platform: ""}, {Key: "ID5R", Desc: "Mainboard S5 Rail", Platform: ""}, {Key: "IO0R", Desc: "Misc. Rail", Platform: ""}, {Key: "IB0R", Desc: "Battery Rail", Platform: ""}, {Key: "IPBR", Desc: "Charger BMON", Platform: ""}, {Key: "I50R", Desc: "5V Low-Side", Platform: ""}, {Key: "IAPC", Desc: "WLAN Low-Side", Platform: ""}, {Key: "IBAC", Desc: "Battery", Platform: ""}, {Key: "IBLC", Desc: "Backlight", Platform: ""}, {Key: "IDBR", Desc: "Brightness", Platform: ""}, {Key: "IC0I", Desc: "CPU I/O High Side", Platform: ""}, {Key: "IC0S", Desc: "CPU SA High Side", Platform: ""}, {Key: "IC1R", Desc: "CPU High Side From EMC1704", Platform: ""}, {Key: "IC3C", Desc: "CPU DDR", Platform: ""}, {Key: "ICMC", Desc: "Camera S2", Platform: ""}, {Key: "ICS0", Desc: "CPU Core", Platform: ""}, {Key: "ICS1", Desc: "CPU From CPU IMON", Platform: ""}, {Key: "ICTR", Desc: "CPU Riser 12V High Side", Platform: ""}, {Key: "ID1R", Desc: "CPU 1V5 Average", Platform: ""}, {Key: "ID2E", Desc: "Power Supply 12V Filtered", Platform: ""}, {Key: "ID2I", Desc: "Power Supply 12V Filter Input S7.8", Platform: ""}, {Key: "ID2J", Desc: "Power Supply 12V Max Error", Platform: ""}, {Key: "ID2R", Desc: "Power Supply 12V", Platform: ""}, {Key: "ID2T", Desc: "Power Supply 12V Trend", Platform: ""}, {Key: "IG0F", Desc: "GPU FB Input-Side", Platform: ""}, {Key: "IG0I", Desc: "GPU VDDCI Load-Side", Platform: ""}, {Key: "IG0R", Desc: "GPU High Side", Platform: ""}, {Key: "IG0S", Desc: "GPU A VDDCI Low-Side", Platform: ""}, {Key: "IG0U", Desc: "GPU Uncore High Side", Platform: ""}, {Key: "IG1A", Desc: "GPU Aux Input-Side", Platform: ""}, {Key: "IG1C", Desc: "GPU Core Input-Side", Platform: ""}, {Key: "IG1F", Desc: "GPU FB Input-Side", Platform: ""}, {Key: "IG1R", Desc: "GFX B Riser 12V High Side", Platform: ""}, {Key: "IG1S", Desc: "GPU B VDDCI Low-Side", Platform: ""}, {Key: "IG2C", Desc: "Ext GPU 1.05V", Platform: ""}, {Key: "IG3C", Desc: "Ext GPU VRAM & I/O", Platform: ""}, {Key: "IH02", Desc: "HDD 12V Low-Side", Platform: ""}, {Key: "IH05", Desc: "Drive 0 5V Load-Side", Platform: ""}, {Key: "IH0R", Desc: "SSD 3V3 Low-Side", Platform: ""}, {Key: "IH1R", Desc: "SSD 3.3V Low-Side", Platform: ""}, {Key: "IHDC", Desc: "SSD", Platform: ""}, {Key: "IHSC", Desc: "Thunderbolt", Platform: ""}, {Key: "IHSP", Desc: "Thunderbolt", Platform: ""}, {Key: "II0R", Desc: "TBT IO High Side", Platform: ""}, {Key: "ILDC", Desc: "LCD Panel", Platform: ""}, {Key: "IM1C", Desc: "1.8V S3 Low-Side", Platform: ""}, {Key: "IM2C", Desc: "LPDDR 1.8V", Platform: ""}, {Key: "IM3C", Desc: "DDR S3", Platform: ""}, {Key: "IMTR", Desc: "Memory 1V5 High Side", Platform: ""}, {Key: "IN0R", Desc: "GFX Vcore Average", Platform: ""}, {Key: "IN1C", Desc: "MCP DDR", Platform: ""}, {Key: "IN1R", Desc: "PCH Low-Side", Platform: ""}, {Key: "IO3R", Desc: "Current Other 3.3V High", Platform: ""}, {Key: "IO5R", Desc: "Battery BMON", Platform: ""}, {Key: "IODC", Desc: "ODD", Platform: ""}, {Key: "IP0R", Desc: "Battery Discrete", Platform: ""}, {Key: "IPB1", Desc: "Discrete Battery", Platform: ""}, {Key: "IR0C", Desc: "3.3V S0", Platform: ""}, {Key: "IR1C", Desc: "Other High Side", Platform: ""}, {Key: "IR1R", Desc: "PCH/GPU/TBT 1.05V High Side", Platform: ""}, {Key: "IR2C", Desc: "S3 5.0V", Platform: ""}, {Key: "IR3C", Desc: "3.3V S0", Platform: ""}, {Key: "IR5C", Desc: "5.0V S0", Platform: ""}, {Key: "IS2C", Desc: "S2 Camera", Platform: ""}, {Key: "ISBC", Desc: "PCH Core", Platform: ""}, {Key: "ISDC", Desc: "SSD", Platform: ""}, {Key: "ITPC", Desc: "Trackpad Actuator", Platform: ""}, {Key: "IW0R", Desc: "Wifi Low-Side", Platform: ""}, {Key: "IZAP", Desc: "WLAN", Platform: ""}, {Key: "IZBL", Desc: "LCD Backlight", Platform: ""}, {Key: "IZDM", Desc: "1V5S3", Platform: ""}, {Key: "IZHD", Desc: "HDD", Platform: ""}, {Key: "IZOD", Desc: "ODD", Platform: ""}, {Key: "IZOP", Desc: "Airport", Platform: ""}, {Key: "Ic0R", Desc: "CSreg", Platform: ""}, {Key: "IU1R", Desc: "Thunderbolt Left", Platform: ""}, {Key: "IU2R", Desc: "Thunderbolt Right", Platform: ""}, } ================================================ FILE: smc/smc.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "fmt" "os" "runtime" "strconv" "strings" "sync" "github.com/dkorunic/iSMC/gosmc" "github.com/dkorunic/iSMC/platform" ) const ( AppleSMC = "AppleSMC" FanNum = "FNum" BattNum = "BNum" BattPwr = "BATP" BattInf = "BSIn" KeyWildcard = "%" // Guards against a corrupt/spoofed FNum key; real Macs have ≤8 fans. maxFans = 32 TempUnit = "°C" // Rejects firmware sentinels from inactive sensor slots (observed: −4..5.2 °C). minTempCelsius = 10.0 ) // SensorStat is SMC key to description mapping. type SensorStat struct { Key string Desc string Platform string } //go:generate ./gen-sensors.sh sensors.go var ( filteredTempOnce sync.Once filteredTempSensors []SensorStat ) // filteredTemp returns AppleTemp filtered for the current platform, cached after the first call. func filteredTemp() []SensorStat { filteredTempOnce.Do(func() { filteredTempSensors = filterForPlatform(AppleTemp) }) return filteredTempSensors } // openSMC opens the Apple SMC. Returns (connection, nil) on success or (0, error) on failure. // The caller must close a successful connection with gosmc.SMCClose. func openSMC() (uint, error) { c, res := gosmc.SMCOpen(AppleSMC) if res != gosmc.IOReturnSuccess { return 0, fmt.Errorf("unable to open Apple SMC: return code %v", res) } return c, nil } // GetAll returns all SMC sensor readings grouped by category (Battery, Current, Fans, Temperature, Power, Voltage). func GetAll() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) sensors := make(map[string]any) sensors["Battery"] = getBattery(c) sensors["Current"] = getGenericSensors(c, "A", AppleCurrent) sensors["Fans"] = getFans(c) sensors["Temperature"] = getGenericSensors(c, TempUnit, filteredTemp()) sensors["Power"] = getGenericSensors(c, "W", ApplePower) sensors["Voltage"] = getGenericSensors(c, "V", AppleVoltage) return sensors } // GetBattery returns battery count, status flags, and AC power state read from SMC keys. func GetBattery() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getBattery(c) } // getBattery reads battery keys using the provided SMC connection. func getBattery(c uint) map[string]any { n, ty1, _ := getKeyUint32(c, BattNum) i, ty2, _ := getKeyUint32(c, BattInf) b, ty3, _ := getKeyBool(c, BattPwr) return map[string]any{ "Battery Count": map[string]any{ "key": BattNum, "value": n, "type": ty1, }, "Battery Info": map[string]any{ "key": BattInf, "value": i, "type": ty2, }, "Battery Power": map[string]any{ "key": BattPwr, "value": b, "type": ty3, }, } } // GetCurrent returns current sensor readings (in amperes) from SMC. func GetCurrent() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getGenericSensors(c, "A", AppleCurrent) } // GetFans returns fan count and per-fan speed readings (in RPM) from SMC. func GetFans() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getFans(c) } // getFans reads fan sensors using the provided SMC connection. func getFans(c uint) map[string]any { fans := make(map[string]any) val, smcType, _ := getKeyUint32(c, FanNum) val = min(val, maxFans) fans["Fan Count"] = map[string]any{ "key": FanNum, "value": val, "type": smcType, } for i := range val { for _, v := range AppleFans { key := fmt.Sprintf(v.Key, i) desc := fmt.Sprintf(v.Desc, i+1) fval, ftype, err := getKeyFloat32(c, key) if err != nil { continue } if isValidReading(fval, "rpm") { fans[desc] = map[string]any{ "key": key, "value": fmt.Sprintf("%4.0f rpm", fval), "type": ftype, } } } } return fans } // getGenericSensors reads each sensor in smcSlice from SMC using conn, expanding // wildcard keys (%) to indices 0–9, and returns a map of description → sensor entry // formatted with the given unit string. func getGenericSensors(conn uint, unit string, smcSlice []SensorStat) map[string]any { generic := make(map[string]any) for _, v := range smcSlice { key := v.Key desc := v.Desc if strings.IndexByte(key, KeyWildcard[0]) < 0 { addGeneric(generic, conn, key, desc, unit) continue } for i := range 10 { iKey := strings.Replace(key, KeyWildcard, strconv.Itoa(i), 1) iDesc := strings.Replace(desc, KeyWildcard, strconv.Itoa(i+1), 1) addGeneric(generic, conn, iKey, iDesc, unit) } } return generic } // isValidReading reports whether val is a plausible sensor reading for the given unit. // It rejects any value below 0.005, which covers zero, near-zero, and all // non-positive readings (float32 comparison against a positive threshold // implicitly excludes negatives). For temperature sensors (unit == TempUnit) it // additionally rejects readings below minTempCelsius, which are firmware // sentinel values from inactive or unimplemented sensor slots (observed: −4, // 2.2, 3.4, 5.2 °C on M4 Pro 14-core). func isValidReading(val float32, unit string) bool { if val < 0.005 { return false } if unit == TempUnit && val < minTempCelsius { return false } return true } // addGeneric reads a single SMC key and adds the result to generic under desc if the value is // valid according to isValidReading. func addGeneric(generic map[string]any, conn uint, key, desc, unit string) { val, smcType, err := getKeyFloat32(conn, key) if err != nil { return } if isValidReading(val, unit) { generic[desc] = map[string]any{ "key": key, "value": fmt.Sprintf("%g %s", val, unit), "type": smcType, } } } // GetPower returns power sensor readings (in watts) from SMC. func GetPower() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getGenericSensors(c, "W", ApplePower) } // GetTemperature returns temperature sensor readings (in °C) from SMC, filtered to the detected platform family. func GetTemperature() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getGenericSensors(c, TempUnit, filteredTemp()) } // GetVoltage returns voltage sensor readings (in volts) from SMC. func GetVoltage() map[string]any { c, err := openSMC() if err != nil { fmt.Fprintf(os.Stderr, "%v\n", err) return map[string]any{} } defer gosmc.SMCClose(c) return getGenericSensors(c, "V", AppleVoltage) } // filterForPlatform returns the subset of smcSlice whose Platform tag matches the detected hardware // family (e.g. "M1", "Intel"). Sensors tagged "All" or "" are always included; sensors tagged // "Apple" are included for any Apple Silicon family. Falls back to runtime architecture when the // model cannot be identified. func filterForPlatform(smcSlice []SensorStat) []SensorStat { family := resolveFamily() filteredSensors := make([]SensorStat, 0, len(smcSlice)) for _, v := range smcSlice { if platformMatches(v.Platform, family) { filteredSensors = append(filteredSensors, v) } } return filteredSensors } // resolveFamily returns the chip family for the current host, falling back to // the runtime architecture when platform.GetFamily cannot identify the model. func resolveFamily() string { family := platform.GetFamily() if family != "" && family != "Unknown" { return family } switch runtime.GOARCH { case "arm64": return "Apple" case "amd64", "386": return "Intel" } return family } // platformMatches reports whether a SensorStat row's Platform tag accepts the // given chip family. Mirrors the per-row scope of filterForPlatform but operates // on a caller-supplied family rather than querying platform.GetFamily, so it can // be used for offline cross-checks (e.g. cmd/guess against any family tag). // // rowPlatform == "" || "All": always matches. // rowPlatform == "Apple": matches any Apple Silicon family ("M*", "A*", or "Apple"). // rowPlatform == family: exact family match. func platformMatches(rowPlatform, family string) bool { if rowPlatform == "" || rowPlatform == "All" { return true } if rowPlatform == "Apple" { return strings.HasPrefix(family, "M") || strings.HasPrefix(family, "A") || family == "Apple" } return rowPlatform == family } // LookupTempDesc returns the canonical description from the AppleTemp table for // a single concrete SMC key, with the row's Platform column filtered against // family. Wildcard rows are expanded to digits 0–9 to mirror getGenericSensors. // // The returned description matches what GetTemperature would produce at runtime // (last-write-wins on duplicate (Key, Platform) entries). Useful for annotating // guess-command output with the description that already exists in src/temp.txt. func LookupTempDesc(key, family string) (string, bool) { var ( desc string found bool ) for _, s := range AppleTemp { if !platformMatches(s.Platform, family) { continue } if !strings.Contains(s.Key, KeyWildcard) { if s.Key == key { desc, found = s.Desc, true } continue } for i := range 10 { iKey := strings.Replace(s.Key, KeyWildcard, strconv.Itoa(i), 1) if iKey == key { desc = strings.Replace(s.Desc, KeyWildcard, strconv.Itoa(i+1), 1) found = true } } } return desc, found } // MappedTempKeys returns every concrete SMC temperature key mapped in the // AppleTemp table that is in scope for the given chip family. Wildcards are // expanded to digits 0–9; the returned map mirrors the resolved descriptions // emitted by GetTemperature for that family. func MappedTempKeys(family string) map[string]string { out := make(map[string]string) for _, s := range AppleTemp { if !platformMatches(s.Platform, family) { continue } if !strings.Contains(s.Key, KeyWildcard) { out[s.Key] = s.Desc continue } for i := range 10 { iKey := strings.Replace(s.Key, KeyWildcard, strconv.Itoa(i), 1) iDesc := strings.Replace(s.Desc, KeyWildcard, strconv.Itoa(i+1), 1) out[iKey] = iDesc } } return out } ================================================ FILE: smc/smc_test.go ================================================ // Copyright (C) 2019 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin package smc import ( "runtime" "strings" "testing" "github.com/dkorunic/iSMC/platform" "github.com/stretchr/testify/assert" ) func Test_filterForPlatform(t *testing.T) { allSensor := SensorStat{Key: "TALL", Desc: "All sensor", Platform: "All"} emptySensor := SensorStat{Key: "TEMP", Desc: "Empty platform sensor", Platform: ""} appleSensor := SensorStat{Key: "TAPL", Desc: "Apple Silicon sensor", Platform: "Apple"} intelSensor := SensorStat{Key: "TINT", Desc: "Intel-only sensor", Platform: "Intel"} m1Sensor := SensorStat{Key: "TM1S", Desc: "M1-only sensor", Platform: "M1"} input := []SensorStat{allSensor, emptySensor, appleSensor, intelSensor, m1Sensor} result := filterForPlatform(input) assert.Contains(t, result, allSensor, "sensor with Platform=All must always be included") assert.Contains(t, result, emptySensor, "sensor with Platform='' must always be included") } func Test_filterForPlatform_empty(t *testing.T) { result := filterForPlatform([]SensorStat{}) assert.Empty(t, result) } func Test_filterForPlatform_allOnly(t *testing.T) { sensors := []SensorStat{ {Key: "T1", Desc: "Sensor 1", Platform: "All"}, {Key: "T2", Desc: "Sensor 2", Platform: "All"}, } result := filterForPlatform(sensors) assert.Len(t, result, 2) } // Test_filterForPlatform_appleSiliconInclusion verifies TC-11: that sensors tagged // Platform="Apple" are included on Apple Silicon hardware. The bug under test replaces // strings.HasPrefix with strings.HasSuffix, which would never match "M1", "M2", "A18" // etc. (those strings end in digits, not "M" or "A"). // // This test is conditional: it only asserts Apple-specific inclusion when the actual // hardware reports an M- or A-family chip. func Test_filterForPlatform_appleSiliconInclusion(t *testing.T) { appleSensor := SensorStat{Key: "TAPL", Desc: "Apple Silicon sensor", Platform: "Apple"} intelSensor := SensorStat{Key: "TINT", Desc: "Intel-only sensor", Platform: "Intel"} input := []SensorStat{appleSensor, intelSensor} result := filterForPlatform(input) family := platform.GetFamily() if family == "" || family == "Unknown" { switch runtime.GOARCH { case "arm64": family = "Apple" case "amd64", "386": family = "Intel" } } isAppleSilicon := strings.HasPrefix(family, "M") || strings.HasPrefix(family, "A") || family == "Apple" if isAppleSilicon { assert.Contains(t, result, appleSensor, "Apple sensor must be included on Apple Silicon (family=%q)", family) assert.NotContains(t, result, intelSensor, "Intel sensor must NOT be included on Apple Silicon (family=%q)", family) } else { assert.NotContains(t, result, appleSensor, "Apple sensor must NOT be included on Intel (family=%q)", family) assert.Contains(t, result, intelSensor, "Intel sensor must be included on Intel (family=%q)", family) } } // filterByFamily is a pure-function mirror of the inner loop of filterForPlatform // that takes `family` as an explicit parameter. This enables deterministic tests // across family values (A18, M1, etc.) without depending on the host's sysctl // output. Any change here MUST be mirrored in filterForPlatform. func filterByFamily(smcSlice []SensorStat, family string) []SensorStat { filteredSensors := make([]SensorStat, 0, len(smcSlice)) familyApple := strings.HasPrefix(family, "M") || strings.HasPrefix(family, "A") || family == "Apple" for _, v := range smcSlice { if v.Platform == "Apple" && familyApple { filteredSensors = append(filteredSensors, v) continue } if v.Platform == "" || v.Platform == "All" { filteredSensors = append(filteredSensors, v) continue } if v.Platform == family { filteredSensors = append(filteredSensors, v) continue } } return filteredSensors } // Test_filterByFamily_A18 verifies the platform-filter contract for the Mac17,5 // (A18 Pro) family: All + Apple + A18-tagged rows are admitted, every other // family-specific row (M1-M5, Intel) is rejected. Runs deterministically // regardless of the host hardware. func Test_filterByFamily_A18(t *testing.T) { input := []SensorStat{ {Key: "TALL", Desc: "All", Platform: "All"}, {Key: "TEMP", Desc: "Empty", Platform: ""}, {Key: "TAPL", Desc: "Apple", Platform: "Apple"}, {Key: "TA18", Desc: "A18", Platform: "A18"}, {Key: "TM1S", Desc: "M1", Platform: "M1"}, {Key: "TM4S", Desc: "M4", Platform: "M4"}, {Key: "TM5S", Desc: "M5", Platform: "M5"}, {Key: "TINT", Desc: "Intel", Platform: "Intel"}, } result := filterByFamily(input, "A18") admitted := make(map[string]bool, len(result)) for _, s := range result { admitted[s.Desc] = true } for _, want := range []string{"All", "Empty", "Apple", "A18"} { assert.True(t, admitted[want], "family=A18 must admit Platform=%q", want) } for _, reject := range []string{"M1", "M4", "M5", "Intel"} { assert.False(t, admitted[reject], "family=A18 must reject Platform=%q", reject) } assert.Len(t, result, 4, "family=A18 must admit exactly 4 of the 8 test rows") } // Test_filterByFamily_A18_GeneratedTable exercises the actual AppleTemp slice // from the generated sensors.go with family="A18" and asserts that the core // A18 CPU sensors resolve through the filter. This guards against a regression // where the A18 rows are stripped from temp.txt or the filter rule changes. func Test_filterByFamily_A18_GeneratedTable(t *testing.T) { result := filterByFamily(AppleTemp, "A18") byPlatform := make(map[string]int) keys := make(map[string]string) for _, s := range result { byPlatform[s.Platform]++ keys[s.Key] = s.Platform } for _, mustHave := range []string{ "Tp00", "Tp01", "Tp02", "Tp04", "Tp05", "Tp06", "Te04", "Te05", "Te06", "Te0R", "Te0S", "Te0T", "Tp0l", "Tp0m", "Tp0n", "Tp0o", "Tp0q", "Tp0t", } { if plat, ok := keys[mustHave]; !ok { t.Errorf("A18 key %q not admitted through filterByFamily", mustHave) } else if plat != "A18" { t.Errorf("A18 key %q admitted with Platform=%q, want A18", mustHave, plat) } } for _, s := range result { switch s.Platform { case "M1", "M2", "M3", "M4", "M5", "Intel": t.Errorf("family=A18 leaked Platform=%q row (key=%q desc=%q)", s.Platform, s.Key, s.Desc) } } // 71 A18-exclusive rows expected (post-wildcard consolidation). assert.Equal(t, 71, byPlatform["A18"], "expected 71 A18-tagged rows in AppleTemp; got %d", byPlatform["A18"]) } // Test_filterForPlatform_exactFamilyMatch verifies that platform-specific sensors are // only included when the family string matches exactly (TC-11 supporting test). func Test_filterForPlatform_exactFamilyMatch(t *testing.T) { m1Sensor := SensorStat{Key: "TM1S", Desc: "M1-only sensor", Platform: "M1"} m2Sensor := SensorStat{Key: "TM2S", Desc: "M2-only sensor", Platform: "M2"} input := []SensorStat{m1Sensor, m2Sensor} result := filterForPlatform(input) family := platform.GetFamily() if family == "" || family == "Unknown" { t.Skip("platform family unknown, skipping exact-match test") } switch family { case "M1": assert.Contains(t, result, m1Sensor) assert.NotContains(t, result, m2Sensor) case "M2": assert.NotContains(t, result, m1Sensor) assert.Contains(t, result, m2Sensor) default: assert.NotContains(t, result, m1Sensor, "M1 sensor must not appear on family=%q", family) assert.NotContains(t, result, m2Sensor, "M2 sensor must not appear on family=%q", family) } } // Test_filterByFamily_NoPCIeLeakOnAppleSilicon guards against a regression where // the Intel-era PCIe slot wildcards (Te%F/P/S/T) are re-tagged Platform="All" // and start leaking phantom "PCIe Slot N Side/Bottom" labels onto Apple Silicon // families. On Apple Silicon (M*/A*) Te0S and Te0T are reassigned as E-core 2 // triplet probes, so any PCIe label referencing those keys is wrong. // // If this test fails, check src/temp.txt lines for "PCIe Slot %" and confirm // they are Platform: Intel, not All. func Test_filterByFamily_NoPCIeLeakOnAppleSilicon(t *testing.T) { for _, family := range []string{"M1", "M2", "M3", "M4", "M5", "A18", "Apple"} { result := filterByFamily(AppleTemp, family) for _, s := range result { if strings.HasPrefix(s.Desc, "PCIe Slot ") { t.Errorf("family=%q leaked PCIe label: Key=%q Desc=%q Platform=%q", family, s.Key, s.Desc, s.Platform) } } } } func Test_platformMatches(t *testing.T) { t.Parallel() tests := []struct { name string rowPlatform string family string wantMatching bool }{ {"empty row matches all", "", "M5", true}, {"All row matches all", "All", "Intel", true}, {"Apple row matches M-family", "Apple", "M1", true}, {"Apple row matches A-family", "Apple", "A18", true}, {"Apple row matches generic Apple", "Apple", "Apple", true}, {"Apple row rejects Intel", "Apple", "Intel", false}, {"Exact M5 match", "M5", "M5", true}, {"M3 row rejects M5 family", "M3", "M5", false}, {"Intel row rejects Apple Silicon", "Intel", "M1", false}, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() got := platformMatches(tt.rowPlatform, tt.family) if got != tt.wantMatching { t.Errorf("platformMatches(%q, %q) = %v, want %v", tt.rowPlatform, tt.family, got, tt.wantMatching) } }) } } // Test_LookupTempDesc_directMatch covers the three matching paths in // LookupTempDesc: direct (no-wildcard) keys, wildcard expansion, and // platform-scoped rejection. Sentinel: a key tagged Platform="M1" must not // resolve when queried under a different family. func Test_LookupTempDesc_directMatch(t *testing.T) { t.Parallel() tests := []struct { name string key string family string wantDesc string wantOK bool }{ { name: "M5 base Tp00 maps to Super Core 1", key: "Tp00", family: "M5", wantDesc: "CPU Super Core 1", wantOK: true, }, { name: "M3 Tp1E maps to Performance Core 7", key: "Tp1E", family: "M3", wantDesc: "CPU Performance Core 7", wantOK: true, }, { name: "Wildcard TC%c expands for digit indices", key: "TC0c", family: "Intel", wantDesc: "CPU Core 1", wantOK: true, }, { name: "Apple-tagged keys match any M-family", key: "TaLP", family: "M4", wantDesc: "Airflow Left", wantOK: true, }, { name: "Unknown key returns false", key: "ZZZZ", family: "M5", wantOK: false, }, { name: "M1-only key rejected on M3", key: "Tp08", family: "M3", wantOK: false, }, } for _, tt := range tests { t.Run(tt.name, func(t *testing.T) { t.Parallel() desc, ok := LookupTempDesc(tt.key, tt.family) if ok != tt.wantOK { t.Errorf("LookupTempDesc(%q, %q) ok = %v, want %v", tt.key, tt.family, ok, tt.wantOK) } if ok && desc != tt.wantDesc { t.Errorf("LookupTempDesc(%q, %q) desc = %q, want %q", tt.key, tt.family, desc, tt.wantDesc) } }) } } // Test_MappedTempKeys_M5 exercises the wildcard expansion path: every Tp0? // slot from AppleTemp's M5 rows must appear as a concrete key in the result. func Test_MappedTempKeys_M5(t *testing.T) { t.Parallel() got := MappedTempKeys("M5") for _, k := range []string{"Tp00", "Tp04", "Tp08", "Tp0C"} { if _, ok := got[k]; !ok { t.Errorf("MappedTempKeys(M5) missing %q", k) } } // Wildcard TC%c expands to TC0c..TC9c. for i := range 10 { want := "TC" + string(rune('0'+i)) + "c" if _, ok := got[want]; !ok { t.Errorf("MappedTempKeys(M5) missing wildcard-expanded key %q", want) } } if desc, ok := got["TS0P"]; !ok || desc != "SSD Proximity 1" { t.Errorf("MappedTempKeys(M5)[TS0P] = (%q, %v), want (\"SSD Proximity 1\", true)", desc, ok) } } // Test_MappedTempKeys_familyIsolation makes sure family-scoped rows do not leak // across families. Tp08 is M1-specific (Efficiency Core 1); querying M1 must // return it while querying other families must not. func Test_MappedTempKeys_familyIsolation(t *testing.T) { t.Parallel() m1 := MappedTempKeys("M1") m3 := MappedTempKeys("M3") if d, ok := m1["Tp08"]; !ok || d != "CPU Efficiency Core 1" { t.Errorf("MappedTempKeys(M1)[Tp08] = (%q, %v), want (\"CPU Efficiency Core 1\", true)", d, ok) } if _, ok := m1["Tp1E"]; ok { t.Errorf("MappedTempKeys(M1) leaked M3-only key Tp1E") } if d, ok := m3["Tp1E"]; !ok || d != "CPU Performance Core 7" { t.Errorf("MappedTempKeys(M3)[Tp1E] = (%q, %v), want (\"CPU Performance Core 7\", true)", d, ok) } } ================================================ FILE: src/current.txt ================================================ CPU Core:IC0C CPU VccIO:IC1C CPU VccSA:IC2C CPU High Side:IC0R CPU DRAM:IC5R CPU PLL:IC8R CPU GFX:IC0G CPU Memory:IC0M GPU Rail:IG0C Memory Controller:IM0C Memory Rail:IM0R MCH:IN0C Mainboard S0 Rail (DC In):ID0R Mainboard S5 Rail:ID5R Misc. Rail:IO0R Battery Rail:IB0R Charger BMON:IPBR 5V Low-Side:I50R WLAN Low-Side:IAPC Battery:IBAC Backlight:IBLC Brightness:IDBR CPU I/O High Side:IC0I CPU SA High Side:IC0S CPU High Side From EMC1704:IC1R CPU DDR:IC3C Camera S2:ICMC CPU Core:ICS0 CPU From CPU IMON:ICS1 CPU Riser 12V High Side:ICTR CPU 1V5 Average:ID1R Power Supply 12V Filtered:ID2E Power Supply 12V Filter Input S7.8:ID2I Power Supply 12V Max Error:ID2J Power Supply 12V:ID2R Power Supply 12V Trend:ID2T GPU FB Input-Side:IG0F GPU VDDCI Load-Side:IG0I GPU High Side:IG0R GPU A VDDCI Low-Side:IG0S GPU Uncore High Side:IG0U GPU Aux Input-Side:IG1A GPU Core Input-Side:IG1C GPU FB Input-Side:IG1F GFX B Riser 12V High Side:IG1R GPU B VDDCI Low-Side:IG1S Ext GPU 1.05V:IG2C Ext GPU VRAM & I/O:IG3C HDD 12V Low-Side:IH02 Drive 0 5V Load-Side:IH05 SSD 3V3 Low-Side:IH0R SSD 3.3V Low-Side:IH1R SSD:IHDC Thunderbolt:IHSC Thunderbolt:IHSP TBT IO High Side:II0R LCD Panel:ILDC 1.8V S3 Low-Side:IM1C LPDDR 1.8V:IM2C DDR S3:IM3C Memory 1V5 High Side:IMTR GFX Vcore Average:IN0R MCP DDR:IN1C PCH Low-Side:IN1R Current Other 3.3V High:IO3R Battery BMON:IO5R ODD:IODC Battery Discrete:IP0R Discrete Battery:IPB1 3.3V S0:IR0C Other High Side:IR1C PCH/GPU/TBT 1.05V High Side:IR1R S3 5.0V:IR2C 3.3V S0:IR3C 5.0V S0:IR5C S2 Camera:IS2C PCH Core:ISBC SSD:ISDC Trackpad Actuator:ITPC Wifi Low-Side:IW0R WLAN:IZAP LCD Backlight:IZBL 1V5S3:IZDM HDD:IZHD ODD:IZOD Airport:IZOP CSreg:Ic0R Thunderbolt Left:IU1R Thunderbolt Right:IU2R ================================================ FILE: src/fans.txt ================================================ Fan %d Current Speed:F%dAc Fan %d Minimal Speed:F%dMn Fan %d Maximum Speed:F%dMx Fan %d Safe Speed:F%dSf Fan %d Target Speed:F%dTg ================================================ FILE: src/power.txt ================================================ CPU Core %:PC%C CPU Core (IMON):PCAM CPU Package:PCPC CPU Total:PCTR CPU Package Total:PCPT CPU Package Total (SMC):PCPR CPU Computing High Side %:PC%R CPU GFX %:PC%G CPU VccEDRAM:PCEC GPU Intel Graphics:PCPG GPU %:PG%R Intel GPU:PCGC Intel GPU (IMON):PCGM RAM:PC3C Battery:PPBR DC In:PDTR System Total:PSTR CPU DRAM:PCPD CPU Total:PCPL Memory Rail:PM0R MCH:PN0C PCH Rail:PN1R Mainboard S0 Rail:PD0R Mainboard S5 Rail:PD5R Main 3.3V Rail:PH02 Main 5V Rail:PH05 12V Rail:Pp0R Main 12V Rail:PD2R Misc. Rail:PO0R Battery Rail:PBLC Battery Rail:PB0R 5V Low-Side:P50R Airport:PAPC Discrete BMON On Battery:PB1R CPU I/O High Side:PC0I CPU Mem Load-Side:PC0M CPU SA High Side:PC0S CPU Package Total:PCLT Chipset Low-Side:PCS0 Chipset IMon:PCS1 Power Supply Trend:PD0D Power Supply Filtered:PD0E Power Supply Filtered Adjusted:PD0F Power Supply Max Error Filtered Output:PD0J Average CPU 1V5:PD1R GPU Aux Load-Side:PG0A GPU:PG0C GPU Frame Buf Input-Side:PG0F GPU VDDCI Load-Side:PG0I GPU Mem Ctl Load-Side:PG0M GPU A VDDCI Low-Side:PG0S GPU Uncore High Side:PG0U GPU VRAM Load-Side:PG0V GPU Aux Load-Side:PG1A Ext GPU 1.8V:PG1C GPU Mem Ctl Load-Side:PG1F GPU B VDDCI Low-Side:PG1S Ext GPU 1.05V:PG2C Ext GPU 1.35V:PG3C Drive 0 Total:PH0F HDD1 Low-Side:PH0R Drive 1 Filtered Low-Side * 16:PH1F Drive 1:PH1R Drive 2:PH2R SSD:PHDC Heatpipe:PHPC Thunderbolt:PHSC Thunderbolt:PHSP TBT IO High Side:PI0R LCD Panel:PLDC Average Memory:PM0C DIMM Load-Side / SQR(Fan RPM):PM0f DDR:PM1C DDR 1.8V CPU:PM2C DDR S3.:PM3C Memory Total:PMTR MCP VCore:PN0R Average MCP Memory:PN1C Other 3.3V High Side:PO3R Other 5V High Side:PO5R PBus:PP0R 3.3V S0:PR0C S0 5.0V:PR0R Other High Side Current.:PR1C S3 3.30V:PR1R S3 5.0V:PR2R 3.3V In S0:PR3C S5 3.30V:PR3R 3.3V S5:PR5C S2 Camera:PS2C PCH Core:PSBC SSD:PSDC HP Target:PTHC T101 Boost/PBus Accuator:PTPC T25 - Track Pad:PTPR Wifi Load-Side:PW0R Zone 0 Target:PZ0E Zone 0 Filtered:PZ0F Zone 0 Average:PZ0G Zone 0 Abstract Throttle:PZ0T Zone 1 Target:PZ1E Zone 1 Filtered:PZ1F Zone 1 Average:PZ1G Zone 1 Abstract Throttle:PZ1T Zone 2 Target:PZ2E Zone 2 Filtered:PZ2F Zone 2 Average:PZ2G Zone 2 Abstract Throttle:PZ2T Zone 3 Target:PZ3E Zone 3 Filtered:PZ3F Zone 3 Average:PZ3G Zone 3 Abstract Throttle:PZ3T Zone 4 Target:PZ4E Zone 4 Filtered:PZ4F Zone 4 Average:PZ4G Zone 4 Abstract Throttle:PZ4T Zone 5 Target:PZ5E Zone 5 Filtered:PZ5F Zone 5 Average:PZ5G Zone 5 Abstract Throttle:PZ5T Airport:PZAP Backlight:PZBL Memory:PZDM SSD:PZHD ODD(PZOD):PZOD Average Main Chipset:Pc0R Power Delivery Brightness:PDBR Thunderbolt Left:PU1R Thunderbolt Right:PU2R ================================================ FILE: src/temp.txt ================================================ // All Thermal Zone %:TZ%C:All CPU Diode %:TC%D:All CPU Diode Virtual %:TC%E:All CPU Diode Filtered %:TC%F:All CPU Heatsink %:TC%H:All CPU Proximity %:TC%P:All CPU Package:TCAD:All CPU Core %:TC%c:All CPU Core %:TC%C:All GPU Diode %:TG%D:All GPU AMD Radeon:TGDD:All GPU Heatsink %:TG%H:All GPU Proximity %:TG%P:All GPU Sensor %:TG%S:All GPU Die %:TG%T:All // Aliased: TG0B ≈ TG0V ≈ TG1B/2B; TG0C runs cooler. GPU Probe A %:TG%A:All GPU Probe B %:TG%B:All GPU Probe C %:TG%C:All GPU Probe V %:TG%V:All Memory Bank Proximity %:Tm%P:All Memory Proximity %:TM%P:All Memory Slot %:TM%S:All Memory Virtual %:TM%V:All Airport %:TW%P:All Airport Sensor %:TW%S:All Display Proximity %:TL%P:All Thunderbolt %:TI%P:All Disk % (A):TH%A:All Disk % (B):TH%B:All Disk % (C):TH%C:All Thunderbolt Left:TTLD:All Thunderbolt Right:TTRD:All Northbridge Diode %:TN%D:All Northbridge Heatsink %:TN%H:All Northbridge Proximity %:TN%P:All Battery %:TB%T:All Battery Sensor %:TB%S:All Thermal Diode %:TD%P:All Drive Bay Front %:TH%F:All Drive Bay SATA %:TH%V:All Drive Bay Proximity %:TH%P:All Ambient Diode %v:TA%D:All Ambient Enclosure %v:TA%E:All Ambient Front %v:TA%P:All Ambient Sensor %v:TA%S:All Ambient Top %v:TA%T:All Ambient Air %v:TA%V:All Northbridge Diode %:TN%D:All Northbridge Heatsink %:TN%H:All Northbridge Proximity %:TN%P:All Northbridge Sensor %:TN%S:All Voltage Regulator %:TV%R:All NVME % (A):TH%a:All NVME % (B):TH%b:All NVME % (C):TH%c:All Power Management Proximity:TPMP:All Power Supply Proximity:TPSP:All IO Processor:TIOP:All System Controller:TSCD:All System Disk Diode:TSDD:All CPU Heatpipe:TCHP:All Memory Voltage Regulator:TMVR:All Thunderbolt Diode %:TT%D:All Embedded Device:TIED:All // Intel Heatpipe %:Th%H:Intel GPU Intel Graphics:TCGC:Intel System Agent:TCSA:Intel System Cluster:TCSC:Intel Powerboard %:Tp%P:Intel GPU %:TG%G:Intel Thermal Group Target:THTG:Intel PCH SD:TPSD:Intel Thunderbolt TD:TTTD:Intel Thunderbolt XD:TTXD:Intel PCIe Slot % Front:Te%F:Intel PCIe Slot % Side:Te%S:Intel PCIe Slot % Bottom:Te%T:Intel PCIe Slot % Ambient:Te%P:Intel Power Supply %:Tp%C:Intel Power Supply Diode %:Tp%D:Intel Power Supply Proximity %:Tp%P:Intel // Apple Airflow Left:TaLP:Apple Airflow Right:TaRF:Apple NAND:TH0x:Apple Thunderbolt Left Proximity:TaLT:Apple Thunderbolt Right Proximity:TaRT:Apple Airflow Left Wall:TaLW:Apple Airflow Right Wall:TaRW:Apple // Mac Studio 4-corner zones; distinct from TaL*/TaR* above. Airflow Front Left:TaFL:Apple Airflow Front Right:TaFR:Apple Airflow Rear Left:TaRL:Apple Airflow Rear Right:TaRR:Apple Ambient Outside Lid:TAOL:Apple Ambient Top Proximity:TaTP:Apple // Case-distinct from Ts0P/1P and A18 TS0p/1p. SSD Proximity 1:TS0P:Apple SSD Proximity 2:TS1P:Apple // SoC regulator V/W/X; Pro/Max/Ultra SKUs. SoC Regulator V:TSVR:Apple SoC Regulator W:TSWR:Apple SoC Regulator X:TSXR:Apple // Pro-tier only. Sensor Group 1:TSG1:Apple Sensor Group 2:TSG2:Apple // CPU die/PMU peak sensors. CPU Die Max:TCMz:Apple CPU Die Average:TCMb:Apple // M5 hex-letter slots listed under M5 section. Virtual Die %:TVD%:Apple Virtual Memory:TVMR:Apple Virtual Memory r:TVMr:Apple Virtual Memory Summary:TVmS:Apple Virtual Memory Summary:TVms:Apple Virtual Ambient %:TVA%:Apple Virtual Sensor %:TVS%:Apple // TVSx mirrors TVS0; % is digits-only. Virtual Sensor x:TVSx:Apple // Hex-letter slots need explicit rows. Power Delivery IC %:TPD%:Apple Power Delivery IC Max:TPDX:Apple Power Delivery IC 11:TPDA:Apple Power Delivery IC 12:TPDB:Apple Power Delivery IC 13:TPDC:Apple Power Delivery IC 14:TPDD:Apple Power Delivery IC 15:TPDE:Apple Power Delivery IC 16:TPDF:Apple Power Delivery IC 17:TPDa:Apple Power Delivery IC 18:TPDb:Apple Power Delivery IC 19:TPDc:Apple Power Delivery IC 20:TPDd:Apple Power Delivery IC 21:TPDe:Apple Power Delivery IC 22:TPDf:Apple // TPDg-j: M1 Pro/Max/Ultra only. Power Delivery IC 23:TPDg:Apple Power Delivery IC 24:TPDh:Apple Power Delivery IC 25:TPDi:Apple Power Delivery IC 26:TPDj:Apple // TRDa-f explicit; TRDA-F unobserved. RF Delivery %:TRD%:Apple RF Delivery Max:TRDX:Apple RF Delivery 11:TRDa:Apple RF Delivery 12:TRDb:Apple RF Delivery 13:TRDc:Apple RF Delivery 14:TRDd:Apple RF Delivery 15:TRDe:Apple RF Delivery 16:TRDf:Apple // TRDg-j: M1 Pro/Max/Ultra only. RF Delivery 17:TRDg:Apple RF Delivery 18:TRDh:Apple RF Delivery 19:TRDi:Apple RF Delivery 20:TRDj:Apple // TR0Z: fixed reference (~51.85°C); TR1d/2d live. // TR3d/4d/5d: M4 + Intel/T2. RF Reference:TR0Z:All RF Probe 1:TR1d:All RF Probe 2:TR2d:All RF Probe 3:TR3d:All RF Probe 4:TR4d:All RF Probe 5:TR5d:All // 3 clusters × 5 digit-slot probes. SoC Thermal Diode Cluster 1 Probe %:TD0%:Apple SoC Thermal Diode Cluster 2 Probe %:TD1%:Apple SoC Thermal Diode Cluster 3 Probe %:TD2%:Apple // Case-distinct: TDEL/TDeL, TDER/TDeR are different sensors. Board Diode Battery Proximity:TDBP:Apple Board Diode Edge Left:TDEL:Apple Board Diode Edge Right:TDER:Apple Board Diode edge Left:TDeL:Apple Board Diode edge Right:TDeR:Apple Board Diode Top Proximity:TDTP:Apple Board Diode Top Center:TDTC:Apple Board Diode Center Right:TDCR:Apple Board Diode Edge Center:TDEC:Apple Board Diode Virtual:TDVx:Apple // Heatsink triplets (probe, probe, max); M4/M5/A18 don't populate Th**. SoC Heatsink 1:Th00:Apple SoC Heatsink 1:Th01:Apple SoC Heatsink 1:Th02:Apple SoC Heatsink 2:Th04:Apple SoC Heatsink 2:Th05:Apple SoC Heatsink 2:Th06:Apple SoC Heatsink 3:Th08:Apple SoC Heatsink 3:Th09:Apple SoC Heatsink 3:Th0A:Apple SoC Heatsink 4:Th0C:Apple SoC Heatsink 4:Th0D:Apple SoC Heatsink 4:Th0E:Apple // M1 Max/Ultra extra triplet. SoC Heatsink 5:Th0G:Apple SoC Heatsink 5:Th0H:Apple SoC Heatsink 5:Th0I:Apple // M2 Pro extra triplet. SoC Heatsink 6:Th0K:Apple SoC Heatsink 6:Th0L:Apple SoC Heatsink 6:Th0M:Apple // M1 Ultra die 2. SoC Heatsink Die 2 1:Th20:Apple SoC Heatsink Die 2 1:Th21:Apple SoC Heatsink Die 2 1:Th22:Apple SoC Heatsink Die 2 2:Th24:Apple SoC Heatsink Die 2 2:Th25:Apple SoC Heatsink Die 2 2:Th26:Apple SoC Heatsink Die 2 3:Th28:Apple SoC Heatsink Die 2 3:Th29:Apple SoC Heatsink Die 2 3:Th2A:Apple SoC Heatsink Die 2 4:Th2C:Apple SoC Heatsink Die 2 4:Th2D:Apple SoC Heatsink Die 2 4:Th2E:Apple SoC Heatsink Die 2 5:Th2G:Apple SoC Heatsink Die 2 5:Th2H:Apple SoC Heatsink Die 2 5:Th2I:Apple // Triplet convention; last non-zero wins. CPU Efficiency Core 1:Tp08:M1 CPU Efficiency Core 1:Tp09:M1 CPU Efficiency Core 1:Tp0A:M1 CPU Efficiency Core 2:Tp0S:M1 CPU Efficiency Core 2:Tp0T:M1 CPU Efficiency Core 2:Tp0U:M1 CPU Performance Core 1:Tp00:M1 CPU Performance Core 1:Tp01:M1 CPU Performance Core 1:Tp02:M1 CPU Performance Core 2:Tp04:M1 CPU Performance Core 2:Tp05:M1 CPU Performance Core 2:Tp06:M1 CPU Performance Core 3:Tp0C:M1 CPU Performance Core 3:Tp0D:M1 CPU Performance Core 3:Tp0E:M1 CPU Performance Core 4:Tp0G:M1 CPU Performance Core 4:Tp0H:M1 CPU Performance Core 4:Tp0I:M1 CPU Performance Core 5:Tp0K:M1 CPU Performance Core 5:Tp0L:M1 CPU Performance Core 5:Tp0M:M1 CPU Performance Core 6:Tp0O:M1 CPU Performance Core 6:Tp0P:M1 CPU Performance Core 6:Tp0Q:M1 CPU Performance Core 7:Tp0W:M1 CPU Performance Core 7:Tp0X:M1 CPU Performance Core 7:Tp0Y:M1 CPU Performance Core 8:Tp0a:M1 CPU Performance Core 8:Tp0b:M1 CPU Performance Core 8:Tp0c:M1 // M1 Ultra die 2 (rejected on non-Ultra SKUs). CPU Efficiency Core 3:Tp28:M1 CPU Efficiency Core 3:Tp29:M1 CPU Efficiency Core 3:Tp2A:M1 CPU Efficiency Core 4:Tp2S:M1 CPU Efficiency Core 4:Tp2T:M1 CPU Efficiency Core 4:Tp2U:M1 CPU Performance Core 9:Tp20:M1 CPU Performance Core 9:Tp21:M1 CPU Performance Core 9:Tp22:M1 CPU Performance Core 10:Tp24:M1 CPU Performance Core 10:Tp25:M1 CPU Performance Core 10:Tp26:M1 CPU Performance Core 11:Tp2C:M1 CPU Performance Core 11:Tp2D:M1 CPU Performance Core 11:Tp2E:M1 CPU Performance Core 12:Tp2G:M1 CPU Performance Core 12:Tp2H:M1 CPU Performance Core 12:Tp2I:M1 CPU Performance Core 13:Tp2K:M1 CPU Performance Core 13:Tp2L:M1 CPU Performance Core 13:Tp2M:M1 CPU Performance Core 14:Tp2O:M1 CPU Performance Core 14:Tp2P:M1 CPU Performance Core 14:Tp2Q:M1 CPU Performance Core 15:Tp2W:M1 CPU Performance Core 15:Tp2X:M1 CPU Performance Core 15:Tp2Y:M1 CPU Performance Core 16:Tp2a:M1 CPU Performance Core 16:Tp2b:M1 CPU Performance Core 16:Tp2c:M1 GPU 1:Tg04:M1 GPU 1:Tg05:M1 GPU 2:Tg0C:M1 GPU 2:Tg0D:M1 GPU 3:Tg0K:M1 GPU 3:Tg0L:M1 GPU 4:Tg0S:M1 GPU 4:Tg0T:M1 // M1 Ultra die 2 GPU. GPU 5:Tg0a:M1 GPU 5:Tg0b:M1 GPU 6:Tg0i:M1 GPU 6:Tg0j:M1 GPU 7:Tg0q:M1 GPU 7:Tg0r:M1 GPU 8:Tg0y:M1 GPU 8:Tg0z:M1 Memory 1:Tm00:M1 Memory 1:Tm01:M1 Memory 1:Tm02:M1 Memory 2:Tm04:M1 Memory 2:Tm05:M1 Memory 2:Tm06:M1 Memory 3:Tm08:M1 Memory 3:Tm09:M1 Memory 3:Tm0A:M1 Memory 4:Tm0C:M1 Memory 4:Tm0D:M1 Memory 4:Tm0E:M1 // Die-level aggregates (M1 Pro/Max/Ultra). CPU Die 1:Te00:M1 CPU Die 2:Te01:M1 CPU Die 3:Te02:M1 // M1 Ultra die 2 aggregates. CPU Die 4:Te20:M1 CPU Die 5:Te21:M1 // SSD die sensors (M1 Pro/Max/Ultra). SSD 1:Ts00:M1 SSD 1:Ts01:M1 SSD 1:Ts02:M1 SSD 2:Ts04:M1 SSD 2:Ts05:M1 SSD 2:Ts06:M1 SSD Controller:Ts0P:M1 SSD Controller:Ts1P:M1 // M1 Ultra die-2 SSD. SSD 3:Ts20:M1 SSD 3:Ts21:M1 SSD 3:Ts22:M1 SSD 4:Ts24:M1 SSD 4:Ts25:M1 SSD 4:Ts26:M1 // Die 2 PD/RF (lowercase Tp/Tr); hex slots explicit. Power Delivery IC Die 2 %:TpD%:M1 Power Delivery IC Die 2 Max:TpDX:M1 Power Delivery IC Die 2 11:TpDa:M1 Power Delivery IC Die 2 12:TpDb:M1 Power Delivery IC Die 2 13:TpDc:M1 Power Delivery IC Die 2 14:TpDd:M1 Power Delivery IC Die 2 15:TpDe:M1 Power Delivery IC Die 2 16:TpDf:M1 Power Delivery IC Die 2 17:TpDg:M1 Power Delivery IC Die 2 18:TpDh:M1 Power Delivery IC Die 2 19:TpDi:M1 Power Delivery IC Die 2 20:TpDj:M1 RF Delivery Die 2 %:TrD%:M1 RF Delivery Die 2 Max:TrDX:M1 RF Delivery Die 2 11:TrDa:M1 RF Delivery Die 2 12:TrDb:M1 RF Delivery Die 2 13:TrDc:M1 RF Delivery Die 2 14:TrDd:M1 RF Delivery Die 2 15:TrDe:M1 RF Delivery Die 2 16:TrDf:M1 RF Delivery Die 2 17:TrDg:M1 RF Delivery Die 2 18:TrDh:M1 RF Delivery Die 2 19:TrDi:M1 RF Delivery Die 2 20:TrDj:M1 // M1 Pro/Max power-voltage probe. Power Probe Voltage Diode:TPVD:M1 // M2 // M1-style Tp triplets (probe A, probe B, max); last-write-wins captures the max. // Tp01 ≡ TCMb and Tp02 ≡ TCMz byte-for-byte on M2 — Core 1 may coincide with the // cluster max value when Core 1 is hottest. CPU Performance Core 1:Tp00:M2 CPU Performance Core 1:Tp01:M2 CPU Performance Core 1:Tp02:M2 CPU Performance Core 2:Tp04:M2 CPU Performance Core 2:Tp05:M2 CPU Performance Core 2:Tp06:M2 CPU Performance Core 3:Tp08:M2 CPU Performance Core 3:Tp09:M2 CPU Performance Core 3:Tp0A:M2 CPU Performance Core 4:Tp0C:M2 CPU Performance Core 4:Tp0D:M2 CPU Performance Core 4:Tp0E:M2 CPU Performance Core 5:Tp0e:M2 CPU Performance Core 5:Tp0f:M2 CPU Performance Core 5:Tp0g:M2 CPU Performance Core 6:Tp0i:M2 CPU Performance Core 6:Tp0j:M2 CPU Performance Core 6:Tp0k:M2 CPU Performance Core 7:Tp0m:M2 CPU Performance Core 7:Tp0n:M2 CPU Performance Core 7:Tp0o:M2 CPU Performance Core 8:Tp0q:M2 CPU Performance Core 8:Tp0r:M2 CPU Performance Core 8:Tp0s:M2 // Tp0a/0b/0c third position breaks third-is-max; treat as cluster aggregate. CPU Performance Cluster Aggregate 1:Tp0a:M2 CPU Performance Cluster Aggregate 1:Tp0b:M2 CPU Performance Cluster Aggregate 1:Tp0c:M2 // 4 E-cores share a single cluster-aggregate triplet on this M2 SKU. CPU Efficiency Cluster Aggregate 1:Te04:M2 CPU Efficiency Cluster Aggregate 1:Te05:M2 CPU Efficiency Cluster Aggregate 1:Te06:M2 // Three GPU clusters; probe + max doublets. GPU 1:Tg0e:M2 GPU 1:Tg0f:M2 GPU 2:Tg0m:M2 GPU 2:Tg0n:M2 GPU 3:Tg0q:M2 GPU 3:Tg0r:M2 // SSD triplets: probe A and probe B mirror; third position is the max. SSD 1:Ts0K:M2 SSD 1:Ts0L:M2 SSD 1:Ts0M:M2 SSD 2:Ts0O:M2 SSD 2:Ts0P:M2 SSD 2:Ts0Q:M2 SSD 3:Ts0S:M2 SSD 3:Ts0T:M2 SSD 3:Ts0U:M2 SSD 4:Ts0W:M2 SSD 4:Ts0X:M2 SSD 4:Ts0Y:M2 SSD 5:Ts0a:M2 SSD 5:Ts0b:M2 SSD 5:Ts0c:M2 // TsOP uses letter O, not digit 0. SSD Controller:Ts1P:M2 SSD Controller:TsOP:M2 // M3 CPU Efficiency Core 1:Te04:M3 CPU Efficiency Core 1:Te05:M3 CPU Efficiency Core 1:Te06:M3 CPU Efficiency Core 2:Te0G:M3 CPU Efficiency Core 2:Te0H:M3 CPU Efficiency Core 2:Te0I:M3 // Irregular: Te0P/Q→3, Te0R/S/T→4, Te0U→5; Te0V aliases Te0T (dropped). CPU Efficiency Core 3:Te0P:M3 CPU Efficiency Core 3:Te0Q:M3 CPU Efficiency Core 4:Te0R:M3 CPU Efficiency Core 4:Te0S:M3 CPU Efficiency Core 4:Te0T:M3 CPU Efficiency Core 5:Te0U:M3 // M3 Max additional E-cores. CPU Efficiency Core 6:Te0K:M3 CPU Efficiency Core 6:Te0L:M3 CPU Efficiency Core 6:Te0M:M3 CPU Performance Core 1:Tp04:M3 CPU Performance Core 1:Tp05:M3 CPU Performance Core 1:Tp06:M3 CPU Performance Core 2:Tp0C:M3 CPU Performance Core 2:Tp0D:M3 CPU Performance Core 2:Tp0E:M3 CPU Performance Core 3:Tp0K:M3 CPU Performance Core 3:Tp0L:M3 CPU Performance Core 3:Tp0M:M3 CPU Performance Core 4:Tp0a:M3 CPU Performance Core 4:Tp0b:M3 CPU Performance Core 4:Tp0c:M3 CPU Performance Core 5:Tp0g:M3 CPU Performance Core 5:Tp0h:M3 CPU Performance Core 5:Tp0i:M3 CPU Performance Core 6:Tp0m:M3 CPU Performance Core 6:Tp0n:M3 CPU Performance Core 6:Tp0o:M3 CPU Performance Core 7:Tp1E:M3 CPU Performance Core 7:Tp1F:M3 CPU Performance Core 7:Tp1G:M3 CPU Performance Core 8:Tp1Q:M3 CPU Performance Core 8:Tp1R:M3 CPU Performance Core 8:Tp1S:M3 // Cluster 1 companion keys. CPU Performance Cluster 1:Tp0R:M3 CPU Performance Cluster 1:Tp0S:M3 CPU Performance Cluster 1:Tp0T:M3 CPU Performance Cluster 1:Tp0U:M3 CPU Performance Cluster 1:Tp0V:M3 CPU Performance Cluster 1:Tp0W:M3 CPU Performance Cluster 1:Tp3O:M3 CPU Performance Cluster 1:Tp3P:M3 // Cluster 2 companion keys. CPU Performance Cluster 2:Tp1I:M3 CPU Performance Cluster 2:Tp1J:M3 CPU Performance Cluster 2:Tp1K:M3 CPU Performance Cluster 2:Tp3W:M3 CPU Performance Cluster 2:Tp3X:M3 // Tp0u/v/w alias Tp0y/z/10; dropped to avoid double-counting Core 9. CPU Performance Core 9:Tp0y:M3 CPU Performance Core 9:Tp0z:M3 CPU Performance Core 9:Tp10:M3 // Cluster 3 (3-cluster M3 Pro layout). CPU Performance Cluster 3:Tp16:M3 CPU Performance Cluster 3:Tp17:M3 CPU Performance Cluster 3:Tp18:M3 CPU Performance Cluster 3:Tp3S:M3 CPU Performance Cluster 3:Tp3T:M3 // Tf?4/D/E=aggregate, Tf?5=min, Tf?6=max, Tf?8-B=probes. GPU Fabric Block 0:Tf04:M3 GPU Fabric Block 0:Tf0D:M3 GPU Fabric Block 0:Tf0E:M3 GPU Fabric Block 0 Min:Tf05:M3 GPU Fabric Block 0 Max:Tf06:M3 GPU Fabric Block 0 Probe 1:Tf08:M3 GPU Fabric Block 0 Probe 2:Tf09:M3 GPU Fabric Block 0 Probe 3:Tf0A:M3 GPU Fabric Block 0 Probe 4:Tf0B:M3 GPU Fabric Block 1:Tf14:M3 GPU Fabric Block 1:Tf1D:M3 GPU Fabric Block 1:Tf1E:M3 GPU Fabric Block 1 Min:Tf15:M3 GPU Fabric Block 1 Max:Tf16:M3 GPU Fabric Block 1 Probe 1:Tf18:M3 GPU Fabric Block 1 Probe 2:Tf19:M3 GPU Fabric Block 1 Probe 3:Tf1A:M3 GPU Fabric Block 1 Probe 4:Tf1B:M3 GPU Fabric Block 2:Tf24:M3 GPU Fabric Block 2:Tf2D:M3 GPU Fabric Block 2:Tf2E:M3 GPU Fabric Block 2 Min:Tf25:M3 GPU Fabric Block 2 Max:Tf26:M3 GPU Fabric Block 2 Probe 1:Tf28:M3 GPU Fabric Block 2 Probe 2:Tf29:M3 GPU Fabric Block 2 Probe 3:Tf2A:M3 GPU Fabric Block 2 Probe 4:Tf2B:M3 GPU Fabric Block 3:Tf34:M3 GPU Fabric Block 3:Tf3D:M3 GPU Fabric Block 3:Tf3E:M3 GPU Fabric Block 3 Min:Tf35:M3 GPU Fabric Block 3 Max:Tf36:M3 GPU Fabric Block 3 Probe 1:Tf38:M3 GPU Fabric Block 3 Probe 2:Tf39:M3 GPU Fabric Block 3 Probe 3:Tf3A:M3 GPU Fabric Block 3 Probe 4:Tf3B:M3 GPU Fabric Block 4:Tf44:M3 GPU Fabric Block 4:Tf4D:M3 GPU Fabric Block 4:Tf4E:M3 GPU Fabric Block 4 Min:Tf45:M3 GPU Fabric Block 4 Max:Tf46:M3 GPU Fabric Block 4 Probe 1:Tf48:M3 GPU Fabric Block 4 Probe 2:Tf49:M3 GPU Fabric Block 4 Probe 3:Tf4A:M3 GPU Fabric Block 4 Probe 4:Tf4B:M3 GPU Fabric Aggregate:Tf9F:M3 GPU Fabric Aggregate Max:TfA0:M3 // GPU clusters (M1-style addressing). GPU 1:Tg04:M3 GPU 1:Tg05:M3 GPU 2:Tg0C:M3 GPU 2:Tg0D:M3 GPU 3:Tg0K:M3 GPU 3:Tg0L:M3 // M3 Pro secondary Tg* pairs. GPU 4:Tg00:M3 GPU 4:Tg01:M3 GPU 5:Tg0U:M3 GPU 5:Tg0u:M3 GPU 6:Tg0V:M3 GPU 6:Tg0v:M3 GPU 7:Tg12:M3 GPU 7:Tg13:M3 GPU 8:Tg1A:M3 GPU 8:Tg1B:M3 GPU 9:Tg1k:M3 GPU 9:Tg1l:M3 // M3 Max additional GPU clusters. GPU 10:Tg0y:M3 GPU 10:Tg0z:M3 GPU 11:Tg1E:M3 GPU 11:Tg1F:M3 GPU 12:Tg16:M3 GPU 12:Tg17:M3 GPU 13:Tg1s:M3 GPU 13:Tg1t:M3 GPU 14:Tg1x:M3 GPU 14:Tg1y:M3 GPU 15:Tg21:M3 GPU 15:Tg22:M3 GPU 16:Tg29:M3 GPU 16:Tg2A:M3 GPU 17:Tg2H:M3 GPU 17:Tg2I:M3 GPU 18:Tg33:M3 GPU 18:Tg34:M3 GPU 19:Tg3B:M3 GPU 19:Tg3C:M3 GPU 20:Tg3J:M3 GPU 20:Tg3K:M3 GPU 21:Tg3x:M3 GPU 21:Tg3y:M3 // SSD dies; Ts0P/Ts1P are controllers. SSD 1:Ts00:M3 SSD 1:Ts01:M3 SSD 1:Ts02:M3 SSD 2:Ts04:M3 SSD 2:Ts05:M3 SSD 2:Ts06:M3 SSD 3:Ts0C:M3 SSD 3:Ts0D:M3 SSD 3:Ts0E:M3 SSD 4:Ts0K:M3 SSD 4:Ts0L:M3 SSD 4:Ts0M:M3 SSD 5:Ts0R:M3 SSD 5:Ts0S:M3 SSD 5:Ts0T:M3 SSD 6:Ts0U:M3 SSD 6:Ts0V:M3 SSD 6:Ts0W:M3 SSD 7:Ts0Y:M3 SSD 7:Ts0Z:M3 SSD 7:Ts0a:M3 SSD 8:Ts0h:M3 SSD 8:Ts0i:M3 SSD Controller:Ts0P:M3 SSD Controller:Ts1P:M3 // M4 // E-core cluster 1 triplet. CPU Efficiency Core 1:Te04:M4 CPU Efficiency Core 1:Te05:M4 CPU Efficiency Core 1:Te06:M4 // E-core cluster 2 die-level triplet. CPU Efficiency Core 2:Te0R:M4 CPU Efficiency Core 2:Te0S:M4 CPU Efficiency Core 2:Te0T:M4 // Additional M4 base E-core triplets. CPU Efficiency Core 3:Te08:M4 CPU Efficiency Core 3:Te09:M4 CPU Efficiency Core 3:Te0A:M4 CPU Efficiency Core 4:Te0G:M4 CPU Efficiency Core 4:Te0H:M4 CPU Efficiency Core 4:Te0I:M4 // Te0U-X are cluster maxes (M4 base has no E-Core 5/6). CPU Efficiency Cluster Aggregate 1:Te0U:M4 CPU Efficiency Cluster Aggregate 1:Te0V:M4 CPU Efficiency Cluster Aggregate 2:Te0W:M4 CPU Efficiency Cluster Aggregate 2:Te0X:M4 // M4 Pro per-core; M4 base reuses Te08/Te0G slots. CPU Efficiency Core 3:Tpx8:M4 CPU Efficiency Core 3:Tpx9:M4 CPU Efficiency Core 3:TpxA:M4 CPU Efficiency Core 4:TpxB:M4 CPU Efficiency Core 4:TpxC:M4 CPU Efficiency Core 4:TpxD:M4 // E-cluster die-level sensors. CPU Efficiency Cluster Die 1:Tex0:M4 CPU Efficiency Cluster Die 1:Tex1:M4 CPU Efficiency Cluster Die 2:Tex2:M4 CPU Efficiency Cluster Die 2:Tex3:M4 // P-core triplets; idle gating produces sentinels. CPU Performance Core 1:Tp1i:M4 CPU Performance Core 1:Tp1j:M4 CPU Performance Core 1:Tp1k:M4 CPU Performance Core 2:Tp1m:M4 CPU Performance Core 2:Tp1n:M4 CPU Performance Core 2:Tp1o:M4 CPU Performance Core 3:Tp1q:M4 CPU Performance Core 3:Tp1t:M4 CPU Performance Core 3:Tp1u:M4 CPU Performance Core 4:Tp1v:M4 CPU Performance Core 4:Tp1w:M4 CPU Performance Core 4:Tp1x:M4 CPU Performance Core 5:Tp1y:M4 CPU Performance Core 5:Tp1z:M4 CPU Performance Core 5:Tp20:M4 CPU Performance Core 6:Tp21:M4 CPU Performance Core 6:Tp22:M4 CPU Performance Core 6:Tp23:M4 CPU Performance Core 7:Tp24:M4 CPU Performance Core 7:Tp25:M4 CPU Performance Core 7:Tp26:M4 CPU Performance Core 8:Tp27:M4 CPU Performance Core 8:Tp28:M4 CPU Performance Core 8:Tp29:M4 CPU Performance Core 9:Tp2A:M4 CPU Performance Core 9:Tp2B:M4 CPU Performance Core 9:Tp2C:M4 CPU Performance Core 10:Tp2D:M4 CPU Performance Core 10:Tp2E:M4 CPU Performance Core 10:Tp2G:M4 // M4 Pro: Tp00-Tp0c or Tp1i-Tp2G live, never both. CPU Performance Core 1:Tp00:M4 CPU Performance Core 1:Tp01:M4 CPU Performance Core 1:Tp02:M4 CPU Performance Core 2:Tp04:M4 CPU Performance Core 2:Tp05:M4 CPU Performance Core 2:Tp06:M4 CPU Performance Core 3:Tp08:M4 CPU Performance Core 3:Tp09:M4 CPU Performance Core 3:Tp0A:M4 CPU Performance Core 4:Tp0C:M4 CPU Performance Core 4:Tp0D:M4 CPU Performance Core 4:Tp0E:M4 CPU Performance Core 5:Tp0G:M4 CPU Performance Core 5:Tp0H:M4 CPU Performance Core 5:Tp0I:M4 CPU Performance Core 6:Tp0K:M4 CPU Performance Core 6:Tp0L:M4 CPU Performance Core 6:Tp0M:M4 CPU Performance Core 7:Tp0O:M4 CPU Performance Core 7:Tp0P:M4 CPU Performance Core 7:Tp0Q:M4 CPU Performance Core 8:Tp0S:M4 CPU Performance Core 8:Tp0T:M4 CPU Performance Core 8:Tp0U:M4 CPU Performance Core 9:Tp0W:M4 CPU Performance Core 9:Tp0X:M4 CPU Performance Core 9:Tp0Y:M4 CPU Performance Core 10:Tp0a:M4 CPU Performance Core 10:Tp0b:M4 CPU Performance Core 10:Tp0c:M4 // Die-fabric probes (not cores). CPU Performance Fabric 1:Tp0d:M4 CPU Performance Fabric 1:Tp0e:M4 CPU Performance Fabric 1:Tp0f:M4 CPU Performance Fabric 2:Tp0g:M4 CPU Performance Fabric 2:Tp0i:M4 CPU Performance Fabric 2:Tp0k:M4 CPU Performance Fabric 3:Tp0l:M4 CPU Performance Fabric 3:Tp0m:M4 CPU Performance Fabric 3:Tp0n:M4 CPU Performance Fabric 4:Tp0o:M4 CPU Performance Fabric 4:Tp0q:M4 CPU Performance Fabric 4:Tp0t:M4 CPU Performance Fabric 5:Tp0u:M4 CPU Performance Fabric 5:Tp0v:M4 CPU Performance Fabric 5:Tp0w:M4 // One Tpx doublet per P-cluster. CPU Performance Cluster 1 Die:Tpx0:M4 CPU Performance Cluster 1 Die:Tpx1:M4 CPU Performance Cluster 2 Die:Tpx2:M4 CPU Performance Cluster 2 Die:Tpx3:M4 CPU Performance Cluster 3 Die:Tpx4:M4 CPU Performance Cluster 3 Die:Tpx5:M4 // Cluster companions (M3-shared addresses). CPU Performance Cluster 1:Tp0V:M4 CPU Performance Cluster 1:Tp3O:M4 CPU Performance Cluster 1:Tp3P:M4 CPU Performance Cluster 2:Tp3W:M4 CPU Performance Cluster 2:Tp3X:M4 CPU Performance Cluster 3:Tp3S:M4 CPU Performance Cluster 3:Tp3T:M4 // Tp1A-S are P-cluster aggregates (M4 base, 1 cluster). CPU Performance Cluster Aggregate 1:Tp1A:M4 CPU Performance Cluster Aggregate 1:Tp1B:M4 CPU Performance Cluster Aggregate 1:Tp1C:M4 CPU Performance Cluster Aggregate 2:Tp1E:M4 CPU Performance Cluster Aggregate 2:Tp1F:M4 CPU Performance Cluster Aggregate 2:Tp1G:M4 CPU Performance Cluster Aggregate 3:Tp1Q:M4 CPU Performance Cluster Aggregate 3:Tp1R:M4 CPU Performance Cluster Aggregate 3:Tp1S:M4 GPU 1:Tg0G:M4 GPU 2:Tg0H:M4 GPU 3:Tg0C:M4 GPU 3:Tg0K:M4 GPU 4:Tg0D:M4 GPU 4:Tg0L:M4 GPU 5:Tg0O:M4 GPU 5:Tg0d:M4 GPU 6:Tg0P:M4 GPU 6:Tg0e:M4 GPU 7:Tg0U:M4 GPU 7:Tg0j:M4 GPU 8:Tg0V:M4 GPU 8:Tg0k:M4 GPU 9:Tg0m:M4 GPU 10:Tg0n:M4 // M4 Pro 20-core GPU clusters. GPU 11:Tg04:M4 GPU 12:Tg05:M4 GPU 13:Tg0R:M4 GPU 14:Tg0S:M4 GPU 15:Tg0X:M4 GPU 16:Tg0Y:M4 GPU 17:Tg0y:M4 GPU 18:Tg0z:M4 GPU 19:Tg1E:M4 GPU 20:Tg1F:M4 GPU 21:Tg1U:M4 GPU 22:Tg1V:M4 GPU 23:Tg1c:M4 GPU 24:Tg1d:M4 GPU 25:Tg1k:M4 GPU 26:Tg1l:M4 // M4 Max GPU; probe+max doublets. GPU 27:Tg21:M4 GPU 27:Tg22:M4 GPU 28:Tg2H:M4 GPU 28:Tg2I:M4 GPU 29:Tg2P:M4 GPU 29:Tg2Q:M4 GPU 30:Tg2X:M4 GPU 30:Tg2Y:M4 GPU 31:Tg2f:M4 GPU 31:Tg2g:M4 GPU 32:Tg2n:M4 GPU 32:Tg2o:M4 GPU 33:Tg33:M4 GPU 33:Tg34:M4 GPU 34:Tg3J:M4 GPU 34:Tg3K:M4 GPU 35:Tg3Z:M4 GPU 35:Tg3a:M4 GPU 36:Tg3h:M4 GPU 36:Tg3i:M4 GPU 37:Tg3p:M4 GPU 37:Tg3q:M4 // M4 MacBook ambient sensor. Airflow Left Rear:TaLR:M4 // TfC2/TfC4 are M4 base only. GPU Fabric 1:TfC0:M4 GPU Fabric 2:TfC1:M4 GPU Fabric 3:TfC2:M4 GPU Fabric 4:TfC3:M4 GPU Fabric 5:TfC4:M4 // M3 Max convention; min/alias slots unpopulated. GPU Fabric Block 0:Tf04:M4 GPU Fabric Block 0 Max:Tf06:M4 GPU Fabric Block 0 Probe 1:Tf08:M4 GPU Fabric Block 0 Probe 2:Tf09:M4 GPU Fabric Block 0 Probe 3:Tf0A:M4 GPU Fabric Block 0 Probe 4:Tf0B:M4 GPU Fabric Block 1:Tf14:M4 GPU Fabric Block 1 Max:Tf16:M4 GPU Fabric Block 1 Probe 1:Tf18:M4 GPU Fabric Block 1 Probe 2:Tf19:M4 GPU Fabric Block 1 Probe 3:Tf1A:M4 GPU Fabric Block 1 Probe 4:Tf1B:M4 GPU Fabric Block 2:Tf24:M4 GPU Fabric Block 2 Max:Tf26:M4 GPU Fabric Block 2 Probe 1:Tf28:M4 GPU Fabric Block 2 Probe 2:Tf29:M4 GPU Fabric Block 2 Probe 3:Tf2A:M4 GPU Fabric Block 2 Probe 4:Tf2B:M4 GPU Fabric Block 3:Tf34:M4 GPU Fabric Block 3 Max:Tf36:M4 GPU Fabric Block 3 Probe 1:Tf38:M4 GPU Fabric Block 3 Probe 2:Tf39:M4 GPU Fabric Block 3 Probe 3:Tf3A:M4 GPU Fabric Block 3 Probe 4:Tf3B:M4 GPU Fabric Block 4:Tf44:M4 GPU Fabric Block 4 Max:Tf46:M4 GPU Fabric Block 4 Probe 1:Tf48:M4 GPU Fabric Block 4 Probe 2:Tf49:M4 GPU Fabric Block 4 Probe 3:Tf4A:M4 GPU Fabric Block 4 Probe 4:Tf4B:M4 // Uncore die sensors (M4 Pro). Uncore Die 1:TUD0:M4 Uncore Die 2:TUD1:M4 Uncore Die 3:TUD2:M4 Uncore Die 4:TUD3:M4 Uncore Die 5:TUD4:M4 Uncore Die 6:TUD5:M4 Uncore Die 7:TUD6:M4 Uncore Die 8:TUD7:M4 Uncore Die 9:TUD8:M4 Uncore Die 10:TUD9:M4 Uncore Die Max:TUDX:M4 Uncore Die 11:TUDa:M4 Uncore Die 12:TUDb:M4 Uncore Die 13:TUDc:M4 Uncore Die 14:TUDd:M4 Uncore Die 15:TUDe:M4 Uncore Die 16:TUDf:M4 // SSD dies; Ts0P/Ts1P are controllers. SSD 1:Ts00:M4 SSD 1:Ts01:M4 SSD 1:Ts02:M4 SSD 2:Ts04:M4 SSD 2:Ts05:M4 SSD 2:Ts06:M4 SSD 3:Ts08:M4 SSD 3:Ts09:M4 SSD 3:Ts0A:M4 SSD 4:Ts0C:M4 SSD 4:Ts0D:M4 SSD 4:Ts0E:M4 SSD 5:Ts0G:M4 SSD 5:Ts0H:M4 SSD 5:Ts0I:M4 SSD 6:Ts0K:M4 SSD 6:Ts0L:M4 SSD 6:Ts0M:M4 SSD 7:Ts0O:M4 SSD 7:Ts0Q:M4 SSD 7:Ts0R:M4 SSD 8:Ts0S:M4 SSD 8:Ts0T:M4 SSD 8:Ts0U:M4 SSD 9:Ts0V:M4 SSD 9:Ts0W:M4 SSD 9:Ts0X:M4 // M4 Max SSD 10/11 triplets. SSD 10:Ts0d:M4 SSD 10:Ts0e:M4 SSD 10:Ts0f:M4 SSD 11:Ts0g:M4 SSD 11:Ts0h:M4 SSD 11:Ts0i:M4 // Lowercase p; distinct from TS0P/TS1P. SSD Proximity 1:TS0p:M4 SSD Proximity 2:TS1p:M4 SSD Controller:Ts0P:M4 // TsOP uses letter O, not digit 0. SSD Controller:TsOP:M4 SSD Controller:Ts1P:M4 SSD Aggregate:Tsx0:M4 SSD Aggregate:Tsx1:M4 // Memory sensors (M4 Max/Ultra). Memory 1:Tm0p:M4 Memory 2:Tm1p:M4 Memory 3:Tm2p:M4 // M4 Pro/Max SoC cooling probe. SoC Cooling Probe:TSCP:M4 // M5 CPU Super Core 1:Tp00:M5 CPU Super Core 2:Tp04:M5 CPU Super Core 3:Tp08:M5 CPU Super Core 4:Tp0C:M5 CPU Super Core 5:Tp0G:M5 CPU Super Core 6:Tp0K:M5 CPU Performance Core 1:Tp0O:M5 CPU Performance Core 2:Tp0R:M5 CPU Performance Core 3:Tp0U:M5 CPU Performance Core 4:Tp0X:M5 CPU Performance Core 5:Tp0a:M5 CPU Performance Core 6:Tp0d:M5 CPU Performance Core 7:Tp0g:M5 CPU Performance Core 8:Tp0j:M5 CPU Performance Core 9:Tp0m:M5 CPU Performance Core 10:Tp0p:M5 CPU Performance Core 11:Tp0u:M5 CPU Performance Core 12:Tp0y:M5 // Tp12/Tp16 removed: absent in every dump. // 5th cluster (M5 Pro/Max has no E-cores). CPU Performance Cluster Aggregate:Tp1E:M5 // M5 P-core cluster companion sensors. CPU Performance Cluster 1:Tp1I:M5 CPU Performance Cluster 2:Tp1Q:M5 CPU Performance Cluster 3:Tp1U:M5 CPU Performance Cluster 4:Tp1g:M5 // Ta00-Ta0R are aliases; collapse via last-write-wins. CPU Die Thermal Headroom:Ta00:M5 CPU Die Thermal Headroom:Ta04:M5 CPU Die Thermal Headroom:Ta08:M5 CPU Die Thermal Headroom:Ta0K:M5 CPU Die Thermal Headroom:Ta0O:M5 CPU Die Thermal Headroom:Ta0R:M5 // M5 GPU clusters. GPU 1:Tg08:M5 GPU 2:Tg0C:M5 GPU 3:Tg0O:M5 GPU 4:Tg0R:M5 GPU 5:Tg0U:M5 GPU 6:Tg0X:M5 GPU 7:Tg0a:M5 GPU 8:Tg0d:M5 GPU 9:Tg0g:M5 GPU 10:Tg0j:M5 GPU 11:Tg12:M5 GPU 12:Tg16:M5 GPU 13:Tg1I:M5 GPU 14:Tg1M:M5 GPU 15:Tg1Q:M5 GPU 16:Tg1U:M5 GPU 17:Tg1Y:M5 GPU 18:Tg1c:M5 // Tg1g removed: absent in dumps; 20..43 → 19..42. GPU 19:Tg1k:M5 GPU 20:Tg1o:M5 GPU 21:Tg1x:M5 GPU 22:Tg29:M5 GPU 23:Tg2D:M5 GPU 24:Tg2P:M5 GPU 25:Tg2T:M5 GPU 26:Tg2X:M5 GPU 27:Tg2b:M5 GPU 28:Tg2f:M5 GPU 29:Tg2j:M5 GPU 30:Tg2n:M5 GPU 31:Tg2r:M5 GPU 32:Tg3B:M5 GPU 33:Tg3F:M5 GPU 34:Tg3R:M5 GPU 35:Tg3V:M5 GPU 36:Tg3Z:M5 GPU 37:Tg3d:M5 GPU 38:Tg3h:M5 GPU 39:Tg3l:M5 GPU 40:Tg3t:M5 GPU 41:Tg3x:M5 GPU 42:Tg43:M5 // Tf?6 is a static ~64°C threshold. GPU Fabric Block 0:Tf04:M5 GPU Fabric Block 0 Max:Tf06:M5 GPU Fabric Block 0 Probe 1:Tf08:M5 GPU Fabric Block 0 Probe 2:Tf09:M5 GPU Fabric Block 0 Probe 3:Tf0A:M5 GPU Fabric Block 0 Probe 4:Tf0B:M5 GPU Fabric Block 1:Tf14:M5 GPU Fabric Block 1 Max:Tf16:M5 GPU Fabric Block 1 Probe 1:Tf18:M5 GPU Fabric Block 1 Probe 2:Tf19:M5 GPU Fabric Block 1 Probe 3:Tf1A:M5 GPU Fabric Block 1 Probe 4:Tf1B:M5 // M5 Pro and Max populate disjoint TfC* slots. GPU Fabric 1:TfC0:M5 GPU Fabric 2:TfC1:M5 GPU Fabric 3:TfC3:M5 GPU Fabric 4:TfC5:M5 GPU Fabric 5:TfCD:M5 GPU Fabric 6:TfCE:M5 GPU Fabric 7:TfCF:M5 GPU Fabric 8:TfC6:M5 GPU Fabric 9:TfC7:M5 GPU Fabric 10:TfC8:M5 GPU Fabric 11:TfC9:M5 GPU Fabric 12:TfCA:M5 // TVD% wildcard misses these hex slots. Virtual Die A:TVDA:M5 Virtual Die G:TVDG:M5 Virtual Die M:TVDM:M5 Virtual Die P:TVDP:M5 Virtual Die c:TVDc:M5 // M5 unified memory sensors. Memory 1:Tm00:M5 Memory 2:Tm04:M5 Memory 3:Tm08:M5 Memory 4:Tm0C:M5 Memory 5:Tm0G:M5 Memory 6:Tm0K:M5 Memory 7:Tm0O:M5 Memory 8:Tm0R:M5 Memory 9:Tm0U:M5 Memory 10:Tm0X:M5 Memory 11:Tm0a:M5 Memory 12:Tm0d:M5 Memory 13:Tm0g:M5 Memory 14:Tm0j:M5 Memory 15:Tm0m:M5 Memory 16:Tm0p:M5 Memory 17:Tm0u:M5 Memory 18:Tm0y:M5 Memory 19:Tm1E:M5 Memory 20:Tm1I:M5 Memory 21:Tm1M:M5 Memory 22:Tm1Q:M5 Memory 23:Tm1U:M5 Memory 24:Tm1Y:M5 Memory 25:Tm1c:M5 Memory 26:Tm1g:M5 Memory 27:Tm1k:M5 Memory 28:Tm1o:M5 Memory 29:Tm1s:M5 Memory 30:Tm1x:M5 Memory 31:Tm21:M5 Memory 32:Tm25:M5 Memory 33:Tm29:M5 Memory 34:Tm2D:M5 Memory 35:Tm2H:M5 Memory 36:Tm2L:M5 Memory 37:Tm2P:M5 Memory 38:Tm2T:M5 Memory 39:Tm2j:M5 Memory 40:Tm2n:M5 // M5 SSD slots and controllers. SSD 1:Ts00:M5 SSD 2:Ts04:M5 SSD 3:Ts08:M5 SSD 4:Ts0C:M5 SSD 5:Ts0G:M5 SSD 6:Ts0K:M5 SSD 7:Ts0O:M5 SSD 8:Ts0R:M5 SSD 9:Ts0U:M5 SSD 10:Ts0X:M5 SSD 11:Ts0a:M5 SSD 12:Ts0d:M5 SSD 13:Ts0g:M5 SSD Controller:Ts0P:M5 SSD Controller:Ts1P:M5 // M5 Max also populates TN04-TN07. Package 1:TN00:M5 Package 2:TN01:M5 Package 3:TN02:M5 Package 4:TN03:M5 Package 5:TN04:M5 Package 6:TN05:M5 Package 7:TN06:M5 Package 8:TN07:M5 // TVN% mirrors TV0% (~0.05°C drift). Voltage Probe %:TV0%:M5 Voltage Probe (Group 1) %:TV1%:M5 Voltage Probe Mirror %:TVN%:M5 Voltage Probe Mirror Max:TVNN:M5 // Uncore die sensors (M5 Pro/Max). Uncore Die 1:TUD0:M5 Uncore Die 2:TUD1:M5 Uncore Die 3:TUD2:M5 Uncore Die 4:TUD3:M5 Uncore Die 5:TUD4:M5 Uncore Die 6:TUD5:M5 Uncore Die 7:TUD6:M5 Uncore Die 8:TUD7:M5 Uncore Die 9:TUD8:M5 Uncore Die 10:TUD9:M5 Uncore Die Max:TUDX:M5 Uncore Die 11:TUDa:M5 Uncore Die 12:TUDb:M5 Uncore Die 13:TUDc:M5 Uncore Die 14:TUDd:M5 Uncore Die 15:TUDe:M5 Uncore Die 16:TUDf:M5 // A18 Pro (2P+4E); M1-style P-core triplets. CPU Performance Core 1:Tp00:A18 CPU Performance Core 1:Tp01:A18 CPU Performance Core 1:Tp02:A18 CPU Performance Core 2:Tp04:A18 CPU Performance Core 2:Tp05:A18 CPU Performance Core 2:Tp06:A18 // E-cores: Te-triplets (1/2), Tp0* triplets (3/4). CPU Efficiency Core 1:Te04:A18 CPU Efficiency Core 1:Te05:A18 CPU Efficiency Core 1:Te06:A18 CPU Efficiency Core 2:Te0R:A18 CPU Efficiency Core 2:Te0S:A18 CPU Efficiency Core 2:Te0T:A18 CPU Efficiency Core 3:Tp0l:A18 CPU Efficiency Core 3:Tp0m:A18 CPU Efficiency Core 3:Tp0n:A18 CPU Efficiency Core 4:Tp0o:A18 CPU Efficiency Core 4:Tp0q:A18 CPU Efficiency Core 4:Tp0t:A18 // Single P-cluster; Tp0E mirrors Tpx1. CPU Performance Cluster Aggregate 1:Tp08:A18 CPU Performance Cluster Aggregate 1:Tp09:A18 CPU Performance Cluster Aggregate 1:Tp0A:A18 CPU Performance Cluster Aggregate 2:Tp0C:A18 CPU Performance Cluster Aggregate 2:Tp0D:A18 CPU Performance Cluster Aggregate 2:Tp0E:A18 CPU Performance Cluster Die 1:Tpx0:A18 CPU Performance Cluster Die 1:Tpx1:A18 CPU Performance Cluster Die 2:Tpx2:A18 CPU Performance Cluster Die 2:Tpx3:A18 CPU Efficiency Cluster 1 Die:Tex0:A18 CPU Efficiency Cluster 1 Die:Tex1:A18 CPU Efficiency Cluster 2 Die:Tex2:A18 CPU Efficiency Cluster 2 Die:Tex3:A18 // A18 GPU; four probe+max doublets. GPU 1:Tg04:A18 GPU 1:Tg05:A18 GPU 2:Tg0C:A18 GPU 2:Tg0D:A18 GPU 3:Tg0K:A18 GPU 3:Tg0L:A18 GPU 4:Tg0d:A18 GPU 4:Tg0e:A18 // A18 SSD; M4-style triplets. SSD 1:Ts00:A18 SSD 1:Ts01:A18 SSD 1:Ts02:A18 SSD 2:Ts04:A18 SSD 2:Ts05:A18 SSD 2:Ts06:A18 SSD 3:Ts08:A18 SSD 3:Ts09:A18 SSD 3:Ts0A:A18 SSD 4:Ts0C:A18 SSD 4:Ts0D:A18 SSD 4:Ts0E:A18 SSD 5:Ts0G:A18 SSD 5:Ts0H:A18 SSD 5:Ts0I:A18 SSD 6:Ts0K:A18 SSD 6:Ts0L:A18 SSD 6:Ts0M:A18 SSD Aggregate:Tsx0:A18 SSD Aggregate:Tsx1:A18 // ISP/queue-pipeline (provisional names). ISP Sensor 1:TQ0d:A18 ISP Sensor 2:TQ0j:A18 // Lowercase p proximity sensors. Backlight Proximity:TBLp:A18 Flash/SSD Proximity:TH0p:A18 SSD Proximity 1:TS0p:A18 SSD Proximity 2:TS1p:A18 Touch Sensor Proximity:TTSp:A18 USB-C Proximity:TUCp:A18 WiFi Proximity:TW0p:A18 5 GHz Radio Proximity:TR5p:A18 Ambient Top Proximity:TaTp:A18 ================================================ FILE: src/voltage.txt ================================================ CPU IA:VCAC CPU System Agent:VCSC CPU Core %:VC%C GPU Intel Graphics:VCTC GPU %:VG%C Memory %:VM%R CMOS:Vb0R DC In:VD0R 12V Rail:VP0R 12V VCC:Vp0C 3V:VV2S 3.3V:VR3R 5V:VV1S 12V:VV9S PCI 12V:VeES CPU VTT:VV1R PCH:VN1R MCH:VN0C Main 5V:VH05 Auxiliary 3V:VV7S Standby 3V:VV3S Standby 5V:VV8S Battery:VBAT 5V Low-Side:V50R ACC:VACC Wireless:VAPC Backlight Output Boosted:VBLC CPU AXG Low-Side:VC0G CPU Mem Load-Side:VC0M CPU VSA Low-Side:VC0S CPU High Side From EMC1704:VC1R FIVR CPU Supply:VCFR CPU Ripple:VCRP CPU Core:VCS0 GPU Frame Buffer Input-Side:VG0F GPU VDDCI Load-Side:VG0I GPU A VDDCI Low-Side:VG0S GPU Uncore High Side:VG0U GPU Frame Buffer Input-Side:VG1F GPU B VDDCI Low-Side:VG1S SSD 3V3 Low-Side:VH0R SSD 3.3V Low-Side:VH1R LCD IR:VL3t 1.2V To CPU/MEM Low-Side:VM0C 1.8V S3 Low-Side:VM1C Average GFX Vcore:VN0R MCP Memory:VN1C ODD:VODC PSU:VP0T PCH/GPU/TBT Load-Side:VR1R SD Card:VSDC T101 Accuator:VTPC WIFI:VZAP Backlight:VZBL Memory:VZDM SSD:VZHD ODD:VZOD ================================================ FILE: stress/stress_darwin.go ================================================ // Copyright (C) 2026 Dinko Korunic // SPDX-License-Identifier: GPL-3.0-only //go:build darwin // Package stress provides CPU affinity helpers for macOS. package stress /* #include #include #include #include static int set_affinity_tag(int tag) { thread_affinity_policy_data_t policy; policy.affinity_tag = tag; return (int)thread_policy_set( mach_thread_self(), THREAD_AFFINITY_POLICY, (thread_policy_t)&policy, THREAD_AFFINITY_POLICY_COUNT ); } static int set_qos_class(int cls) { return pthread_set_qos_class_self_np((qos_class_t)cls, 0); } */ import "C" const ( QoSUserInteractive = 0x21 // QOS_CLASS_USER_INTERACTIVE; biases toward Super (M5+) or P-cores. QoSUserInitiated = 0x19 // QOS_CLASS_USER_INITIATED; biases toward P-cores. QoSBackground = 0x09 // QOS_CLASS_BACKGROUND; biases toward E-cores. ) // SetAffinityTag sets the macOS THREAD_AFFINITY_POLICY tag for the calling OS thread. // // Threads sharing the same non-zero tag are preferentially scheduled together on the // same hardware thread; threads with different non-zero tags are preferentially scheduled // on different hardware threads. Tag 0 clears any previous affinity preference. // // This is a hint only – the scheduler may not honour it. The function must be called from // a goroutine that has already called runtime.LockOSThread so that the tag is bound to a // stable OS thread for the lifetime of the stress run. // // Returns the raw kern_return_t value (0 = KERN_SUCCESS). func SetAffinityTag(tag int) int { return int(C.set_affinity_tag(C.int(tag))) } // SetQoS sets the QoS class for the calling OS thread via pthread_set_qos_class_self_np. // // Use QoSUserInitiated to bias scheduling toward P-cores and QoSBackground to bias // toward E-cores. This is a hint only; the function must be called from a goroutine // that has already called runtime.LockOSThread. // // Returns 0 on success, a non-zero errno value on failure. func SetQoS(qosClass int) int { return int(C.set_qos_class(C.int(qosClass))) }